EPI`s Debug Environment

www.epitools.com
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DUP#ᇚ⇚ⵣ␂#MWDJ#⮎Ⅺ᷆ⴲ㛮#)#᫒≂ሮ#
EPI Development Environments for ARM
Any GDB/Linux
Tool Kits
Microsoft
Platform Builder
Any
GDB/Linux
Software
Tool Kits
GDB
Remote
Protocol
EPI
Microsoft®
Platform
Builder
3.0 to 4.x
eXDI
API
MDIserver
EPI
MDI
API
MDI Lib
10/100
BaseT
Microcross GNU and
Visual X-Tools
IAR Systems
RDI-compliant Tools
GNU and
Visual X-Tools
Remote
Protocol
MDI Lib
10/100
BaseT
EPI
MDIserver
EPI
MDI
API
EPI
MDI
API
ARM
RDI
API
ARM
RDI
API
MDI Lib
10/100
BaseT
ARM &
3rd Party
RDIcompliant
Software
Tools
Embedded
Workbench
for ARM
GDB
eXDI Driver
& Plug-in
ARM & 3rd Party
RDI-compliant Tools
ARM & 3rd Party
Compilation Tools
ARM &
3rd Party
Compiler
Tools
COFF
ECOFF
DWARF
STABS
EPI EDB
Debugger
RDI Lib
RDI Lib
10/100
BaseT
10/100
BaseT
10/100
BaseT
PLSV#ᇚ⇚ⵣ␂#MWDJ#⮎Ⅺ᷆ⴲ㛮#)#᫒≂ሮ#
EPI Development Environments for MIPS
Any GDB/Linux
Tool Kits
Microsoft
Platform Builder
Any
GDB/Linux
Software
Tool Kits
GDB
Remote
Protocol
EPI
M icrosoft®
Platform
Builder
3.0 to 4.x
eXDI
API
MDIserver
EPI
MDI
API
10/100
BaseT
MDI Lib
10/100
BaseT
3rd Party
MDI-compliant Tool s
3rd Party
MIPS
MDIcompliant
Software
Tools
GNU and
Visual X-Tools
GDB
eXDI Driver
& Plug-in
EPI
MDI
API
MDI Lib
Microcross GNU and
Visual X-Tools
Remote
Protocol
EPI
MDI
API
10/100
BaseT
EPI
MDI server
EPI
MDI
API
3rd Party
Compilation Tools
3rd Party
MIPS
Compiler
Tools
COFF
ECOFF
DWARF
STABS
EPI EDB
Debugger
MDI Lib
MDI Lib
10/100
BaseT
10/100
BaseT
EDB , EPI , MA JIC and V irtual.O ne.S top are trademarks or registered trademarks of E mbedded P erformance, I nc . *O ther names /brands may be c laimed as the property of others .
Embedded Performance, Inc.
Virtual.One.StopTM Development Environments
www.epitools.com
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EPI Development Environments for XScale
Any GDB/Linux
Tool Kits
Microsoft
Platform Builder
Any
GDB/Linux
Software
Tool Kits
GDB
Remote
Protocol
EPI
Microsoft®
Platform
Builder
3.0 to 4.x
eXDI
API
MDIserver
EPI
MDI
API
MDI Lib
10/100
BaseT
eXDI Drive
& Plug-in
Intel C++ Software
Development Tool Suite
ARM &
3rd Party
RDIcompliant
Software
Tools
Intel® C++
Software
Development
Tool Suite
XDB
Debugger
Interface
EPI
MDI
API
EPI
XDB-MAJIC
MDI Lib
10/100
BaseT
ARM & 3rd Party
RDI-compliant Tools
10/100
BaseT
ARM
RDI
API
ARM & 3rd Party
Compilation Tools
ARM &
3rd Party
Compiler
Tools
COFF
ECOFF
DWARF
STABS
EPI EDB
Debugger
RDI Lib
10/100
BaseT
10/100
BaseT
EDB , EPI , MA JIC and V irtual.O ne.S top are trademarks or registered trademarks of E mbedded P erformance, I nc . *O ther names /brands may be c laimed as the property of others .
Embedded Performance, Inc.
Virtual.One.StopTM Development Environments
ARM / Xscale / Mips ࿋Ή⭔⇳GJTAG ⥿ Ὓ ᮷ ⬣ 㓟
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Embedded Linux
WinCE.Net
Fingerprint rcognition
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MP3 Player
MAJIC -Emulator
Platform Builder
Game Terminal
Router
10/100
Ethernet
USB
Taget System
HUB
Target Board
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MAJIC III ™ Multi - processor Advanced JTAG Interface Controller
MAJIC III™ JTAG Emulator :
· Non-intrusive, uses no target resources
· Supports specific on- chip debug interfaces
· Supports specific CPU core (s)
· Supports on-chip hardware breakpoints
· Unlimited software breakpoints
· Programmable JTAG clock
· Ethernet, USB and serial I/O ports for fast,
flexible host interface
· High speed download of application code
· Network compatibility allows shared and remote operation
· Internal RISC processor provides intelligent target control
· Internal Flash memory for easy firmware update
· Sleep-mode support (Except for Intel XScale™ CPU cores)
· LEDs display operation status
· ARM/Xscale/Mips
· Manufacture : EPI Inc (USA)
®
< MODEL : MAJIC III >
MDI Meta Debugger Interface (for MIPS,
ARM and XScale tools)
RDI Remote Debugger Interface (ARM)
eXDI for Platform Builder
MDIserver translates GDB remote to MDI
debug service requests to MAJIC III™
Major features of the MAJIC III ™
include:
E thernet Interfac e
T he 10B as e-T /100B as e -T E thernet interface
provides many advantages over s erial or
parallel interfaces to the hos t. Download of
your application code is over ten times fas ter
than with s erial interface. T his will
s ignificantly reduce the amount of time s pent
waiting for code changes to download to your
target board.
Network connection allows remote operation
of the MAJ IC III™ . Now you can acces s the
lab s etup directly from your des ktop. T his
allows multiple engineers to s hare a common
tes t bench.
F las h Memory
T he MAJ IC III™ firmware is eas ily upgraded
without the need to replace R OMs .
Ins tall new configuration kits eas ily and
quickly to add s upport for multiple C P U types
with a s imple firmware upgrade.
Us e the s imple program provided to
automatically program the updated firmware
into the on-board flas h memory.
F las h memory als o makes it eas y to program
an IP addres s into the MAJ IC III™ for pointto-point E thernet connection to a P C or
works tation.
Internal R IS C P roc es s or
T he us e of a high performance internal R IS C
proces s or allows fas t res pons e to debugger
operations s uch as s ingle-s tepping and
downloading of application code to the target.
S tatus L E Ds
T he MAJ IC III™ provides two LE Ds , which
s how the operational s tatus of the emulator.
C hoic e of C onfiguration K its
Y ou may configure the MAJ IC III™ to s upport
one or more of the s upported combinations
of C P U core and on-chip debug interface.
E ach configuration kit includes the firmware,
us er licens e and interconnections neces s ary
to s upport the C P U that you have chos en.
P leas e refer to the C onfiguration K it data
s heet for detailed s pecifications on the C P Us
and on-chip interfaces currently s upported.
P rogrammable J T A G C loc k
T he MAJ IC III™ features a programmable
T C K with a 0 to 10 MHz range. T his allows
you to tailor the J T AG operation to match the
performance of your target. It als o means
that you can us e the MAJ IC III™ with low
s peed AS IC
emulators ,
with F P G A
implementation of your S oC des ign, or with
devices that feature s leep mode operation.
C onvenient R es et S witc h
A convenient res et button on the MAJ IC III™
is protected agains t accidental activation, yet
is eas ily acces s ible by the us er when a
complete s ys tem res et is des ired.
International P ower S upply
T he MAJ IC III™ operates from a s tandard 5V
power s ource. It comes with an external
UL/C E approved AC adapter whos e AC input
range is compatible with all international AC
voltage and frequency ranges . A s tandard
three -wire power connector is compatible
with readily available power cords through
the world.
S pec ific ations :
MAJ IC III™
J T AG clock(T C K ):
0 to 1 0 MHz,
programmable
Download s peed: >100k bytes /s ec
(typical)
T arget voltage:
3.3V
S erial interface:
R S 232C
1900 -115.2k baud
E thernet interface: 10/100bas e -T ,
T C P /IP
US B :
US B 2.0 (E thernet-to-US B
Adapter – R efer to Application Note )
Indicator LE Ds :
P ower, s tatus , E thernet
S ize:
2.0 H x 7.4 W x 6.5 L
(inches )
Weight:
1.5 lbs
Input power:
9 V DC +/- 5%, 2 .0 A
P ower connector: 1.7 mm coaxial,
center pos itive, male
T emperature:
Operating
0 - 40 degrees C
Humidity:
Operating
15% - 95% R H
E xternal A C A dapter
Output:
Input voltage:
Input frequency:
Input power:
S ize:
Weight:
C ompliance:
AC connector:
DC connector:
E mbedded P erformanc e, Inc .
9 V DC , 2 .0 A
90 - 264 V AC
47 - 63 Hz
0. 6 A
1/8
7/8
1. H x 1. W x 4.25 L
(inches )
6 oz
UL, C UL, C E ,
T UV
E N 60320/13
1.7 mm coaxial,
center pos itive,
female
E mbedded P erformance, Inc .
MAJIC™ Multi-processor Advanced JTAG Interface Controller
MAJIC Development System Features:
•
Ideal for SoC based applications
•
Non-intrusive, uses no target resources
•
Supports a wide choice of on-chip debug interfaces
•
Supports a wide variety of CPU cores
•
Supports on-chip hardware breakpoints
•
Unlimited software breakpoints
•
Programmable JTAG Clock (TCK = 0 to 40 MHz)
•
Programmable trigger-in and trigger-out connections
•
Ethernet and Serial I/O Ports for fast, flexible host interface
•
High speed download (>200k bytes per second) of application code
•
Network compatibility allows shared and remote operation
•
Internal RISC Processor assures fast operation
•
Flash Memory for easy firmware updates to support for additional
CPU cores or on-chip debug interfaces.
•
External AC adapter compatible with all international power sources
•
Support Risc : Xscale / ARM / MIPS
MAJIC
•
Sleep-mode support
•
LED’s display operation status
•
Open API for debugger interface
•
EDB integrated debugger
Major features of the MAJIC include:
Ethernet Interface
The 10base-T/100base-T Ethernet
interface provides many advantages over
serial or parallel interfaces to the host.
Download of your application code is over
ten times faster than with serial interface.
This will significantly reduce the amount of
time spent waiting for code changes to
download to your target board.
Network connection allows remote
operation of the MAJIC. Now you can
access the lab setup directly from your
desktop. This allows multiple engineers to
share a common test bench.
Flash Memory
The MAJIC firmware is easily upgraded
without the need to replace ROMs.
Install new configuration kits easily and
quickly using the simple program provided.
You can add support for multiple CPU
types to the MAJIC with a simple firmware
upgrade.
New firmware updates will be available on
the our FTP site. Use the simple program
provided to automatically program the
updated firmware into the on-board flash
memory.
Flash memory makes it easy to program an
IP address into the MAJIC for point-to-point
ethernet connection to a PC or workstation.
Internal RISC Processor
The use of a high performance internal
RISC processor allows fast response to
debugger operations such as single
stepping, reading and writing memory,
reading and writing registers, and
downloading of application code to the
target.
PLUS
Version Includes Trace
MAJIC
For a version that includes execution
PLUS
data sheet.
tracing, see the MAJIC
Status LEDs
The MAJIC provides five LEDs which show
the operational status of the emulator.
These LEDs also indicate the results of the
built-in self test that is automatically
performed upon startup.
E mbedded P erformanc e, Inc .
Choice of Configuration Kits
You may configure the MAJIC to support
one or more of the supported combinations
of CPU core and on-chip debug interface.
Each configuration kit includes the
firmware, user license and interconnections
necessary to support the CPU that you
have chosen. Please refer to the
Configuration Kit data sheet for detailed
specifications on the CPUs and on-chip
interfaces currently supported.
Specifications:
Programmable JTAG Clock
The MAJIC features a programmable TCK
with a 0 to 40 MHz range. This allows you to
tailor the JTAG operation to match the
performance of your target. It also means
that you can use the MAJIC with low speed
ASIC emulators or with devices that feature
sleep mode operation.
Ethernet interface:
Convenient Reset Switch
A convenient reset button on the MAJIC is
protected against accidental activation, yet
is easily accessible by the user when a
complete system reset is desired.
Trigger Levels:
Indicator LEDs:
Programmable Trigger Control
The MAJIC provides the user control over
both the trigger-in and trigger-out signals.
The trigger-in signal may be used to create
a breakpoint or synchronize execution. A
trigger output may be set to define
execution status, indicate memory
accesses, or indicate a memory test failure.
W eight:
Input power:
Power connector:
International Power Supply
The MAJIC operates from a standard 5V
power source. It comes with an external
UL/CE approved AC adapter whose AC
input range is compatible with all
international AC voltage and frequency
ranges. A standard three-wire power
connector is compatible with readily
available power cords through the world.
MAJIC
JTAG clock(TCK):
Trace clock(DCK):
Download Speed:
Target voltage:
Serial interface:
Triggers:
Trigger Control
Trigger In:
Trigger Out:
Size:
Temperature:
Humidity:
Safety/EMC
0 to 40 MHz
Programmable
PLUS
)
0 to 100MHz (MAJIC
>200k bytes/sec
(Typical)
1.8∼5.0V
RS232C
1900-115.2k baud
10/100Base-T,
TCP/IP
Trigger input
Trigger output
Off, Run sync, Break
Off, Run sync, Memory
access, Memory test
error
TTL
Power, Status, Run,
Connect. Ethernet
2.0 H x 7.4 W x 6.5 L
(inches)
2.25 lbs
5 VDC +/- 5%, 4.0 A
2.1 mm coaxial,
center positive, male
Operating
0 - 40 degrees C
Operating
15% - 95% RH
CE
External AC Adapter
Output:
Input voltage:
Input frequency:
Input power:
Size:
W eight:
Compliance:
AC connector:
DC connector
5 VDC, 4.0 A
90 - 264 VAC
47 - 63 Hz
0.8 A
1.6 H x 2.8 W x 4.8 L
(inches)
10.3 oz
UL, CUL, CE,
TUV
EN 60320/13
2.1 mm coaxial,
center positive,
female
E mbedded P erformance, Inc .
MAJIC MX™ Multi-processor Advanced JTAG Interface Controller
®
MAJIC MX for Intel XScale
•
•
TM
MicroArchitecture :
•
Ideal for Intel XScale based applications
Supports the Intel PXA210/250 applications processors,
IOP310/321 I/O processors, and IXP425/2400/2800 and
IXP1100 Network processors, Bulverde
10/100Base-T Ethernet and serial I/O ports for fast, flexible
host interface
Supports the Intel XScale on-chip trace
•
Programmable JTAG clock (TCK = 2kHz to 40MHz)
•
Programmable trigger-in and trigger-out connections
•
Ethernet and serial I/O ports for fast, flexible host interface
•
High-speed download of application code
•
Network compatibility allows shared and remote operation
•
Works with EDB, or third party RDI 1.5.1 compliant debuggers
•
Wind River Tornado BackEnd Support
•
Proven to work with Intel DBPXA250, IQ80310, IQ80321,
ADI 80200EVB, BRH Development Platform...etc.
•
Unlimited software breakpoints
•
EDB
MAJICMX
•
Non-intrusive, uses no target resources
•
•
LEDs display operational status
Supports on -chip hardware breakpoints
Source-level Debugger
Key Features of EDB:
Extensive Set of GUI Debugger Window Types
Compatible with a wide selection of compilers
including: EPI, ARM, GNU-gcc, Mentor,
Metaware, MontaVista-gcc, Wind River gcc and
Diab.
Sophisticated Breakpoint Control Features
Supports the Most Extensive List of ARM,
MIPS, and Intel XScale Cores in the Industry
Customizable RTOS Support
Extensible Debugger Command Language
Multiple Context Support
Integrated GUI Support for MAJIC Series
Intelligent JTAG Debug Probes
Integrated Execution Tracing Window with
Source Code Annotation
Application Access to Host I/O System via
EPI-OS facility
Flash Programming Utilities & Sample Files
EDB features Integrated Trace Display
Embedded Performance, Inc.
Product Selection Guide
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MAJIC II
MAJIC III
Common
Features
Cores
Supported
Other
Differentiating
Features
Debug Interface
Protocol
Compatible
Debugger
Software
MAJIC II
MX
MAJIC II
PLUS
• Non- intrusive, needs no target resources
• Ideal for So C based applications
• Supports on- chip hardware breakpoints
• Unlimited software breakpoints
• ROM less booting
• Ethernet & Serial I/ O Ports
• High speed download of application code
• Shared and remote operation
• Easy firmware updates via flash
• LEDs display operation status
• All ARM cores, Qualcomm, OMAP
• Broadcom 1100, 3310, 3310b, 3345, 3350, 3352, 3360, 6352, 7100
• IDT 32332, 32364, 32334, 32355
• Intel Xscale PXA250, PXA210, i80200, IOP310, IOP321,
IXP425/2400/2800/2850, IXC1100, Bulverde
• Philips PR1900, PR1910, PR3940
• Lexra 4180, 4189, 4280, 4380, 5180, 5280, 8000
• LSI Logic 4102, 4103
• MTI 4kc, 4km, 4kp, 5kc
• Etc.
•10/ 100 base -T Ethernet / USB
•Supports ARM synthesizable
cores
•Programmab le JTA G clock
(2kHz to 10 M Hz)
• Supports sleep-mode
• Supports ARM RT clock
•Multi-TAP JTAG support
•Built-in memory test
• Concurrent debug mode
• Non-intrusive connect mode
(most CPUs)
•10/ 100 base -T Ethernet / serial
•Supports ARM synthesizable
cores
• Programmable JTAG clock
(2kHz to 40 M Hz)
• Supports sleep-mode
• Supports ARM RT clock
•Multi-TAP JTA G support
•Built-in memory test
• Concurrent debug mode
• Non-intrusive connect mode
• (most CPUs)
Logic Analyzer connections
(Trigger in/out)
• Microsoft eXDI for Platform Builder in Windows CE
• ARM RDI
• Intel UDI for XDB-JTAG
• EPI MDI(includes GNU/GDB)
• ARM SDT, A DS, ADW, AXD, Real-View
• EPI CADB, CADB25
• EPI EDB
• EPI XDB-JTAG
• GNU GDB
• Green Hills MULTI
• Intel XDB-JTAG
• Mentor Graphics XRAY
• Metaware SeeCode
• Microsoft Platform Builder
• Wind River Tornado(opt 83mvx)
• All the MAJIC II
features, plus:
• Supports on-chip
trace buffers
2
• MDS technology
•Supports multi-cores
debug
• Supports multiple
architecture debug
MX
• All the MAJIC II
features, plus:
• ARM ETM/ Real Time
Debug Trace Support
• EJTAG/PC Trace
support
• External trace trigger
• External trace enable
EPI's Debug Environment
Execution
window can
display source,
assembly or
interleaved
instruction
formats
Dockable
standard
windows
toolbars
Session
window
displays
history
Command line for EDB or MON allows for
scripted testing, disable, display, enable, enter,
find, fill, help, read or writing data in me mory
or registers, reset, and verify commands
Program Input/
Output Window
Memory window
displays multiple
formats. Data can
be edited
in window
Point and click
to set
break points
at gray circles
PC Trace Execution
reconstructs
cycle-by-cycle flow
based on CPU status
on each cycle
with disassembly of
instructions executed
Arrow shows
execution point
Eye represents
view point
Right click to
edit conditions/
scripts,
enable/disable
or ente r/delete
break points
Single step buttons
(into, out of, ove r)
permit independent
Assembly and Source level
viewing and stepping
Watch window
automatically
updates any
C construct
variables
Call stack
summary
Right click
displays local
variables
Register window shows
GP & CoProc register values
Can edit in window
Color changes when
value changes
Many right click
options Hype rlinking
automatically
aligns windows
at source lines
EDB displays raw,
data, instruction
or mixed modes
depending on CPU
imple mentation
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EDB EPI’s debug interface libraries support hardware breakpoints for debugging BSP/driver code
in ROM/Flash, and Flash memory programming utilities & sample Files.
WinCE.Net
Microcross
TM
X-Tools
MontaVista
Linux Prof.
µClinux
Linux
GDB
GDB
GDB
QNX
Neutrino
Mobile OS(RTOS):
Palm OS,
Symbian OS,
Nucleus OS and
Wind River Tornado OS
OS-independent Systems
GDB
GNU Tools
“du jour”
GDB
GDB
RTOS
Compilers
Compilers / Debug
ADS, AXD, Realview
GCC, GDB
Intel, XDB
ATI, UDB
IAR Systems
Allant Aspex
Green Hills MULTI
Mentor XRAY
Metaware SeeCode
VLSI JumpStart
Embedded Linux
EPI
MDI
API
EPI
MDIserver
GCC & 3rd Party
Compilers
MDILib
EPI EDB
Debugger
MAJIC
acket protocol
Remote
Protocol
10/100 Ethernet / USB
EPI
Products
Targets
ARM or MIPS
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E mbedded P erformance, Inc.
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Camera
Fingerprint rcognition
Platform Builder
MP3 Player
CPU CORE(s)
MAJ IC Emulator
Ethernet or Serial
SoC
JTA G
Game Terminal
ASIC
O n-Chip Debug
Router
Taget System
USB
HUB
Target Hardw are
E-Book
PDA
Home G/W
WLAN A/P
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Home R// F
Platform Builder
xDSL Modem
XScale T M
MicroArchiteture
On-Chip Trace
M A J I C MX
Ethernet or Serial
SoC
Performance Monitor
Debug Handler
JTAG
Handphone
ASIC
Taget System
GPS
Printer
Target Hardware
WLAN NIC
Card
Etc
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System on a Chip
(SoC) (SOPC)
DSP Debugger
FLASH
Program
Memory
Target System
SoC
I/O drivers
ARM
Core
DSP
Core
Custom
Logic
MIPS
Core
Config Cells
DSP Core
FLASH
Ethernet
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ZUGჿ⫐㙨ⶄGaGX⬧GXwj⬇G⚓♤ჿ⫐
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GGGT⚓♤⩘Gˆ——“Šˆ›–•G₣ᢋG⯋ႤGG
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GGGTivSG┻♓㢳ᰋᆧ᭗Gjk
GGGT㊯⬣⇃SG⣳ᚤ㑯
GGGTGჿ⭛GaG࿄⑛G⮯⭀
GGGTGl”œ“ˆ›–™GaGtˆŽŠGkŒ‰œŽŽŒ™G›––“
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TGGᑏGⶋGaGᶓ⪃G㕏⩃⬫GX⬫ླG
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GGGG⿧ႏ⬿ᱻGOჿ⫐⚋Gჿ⭛ᙃG⯋ႤះⵯG⣹♤ᙷᚓUPGG
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IAR Embedded
Workbench™ for ARM
The IAR Embedded Workbench is a
set of highly sophisticated and easyto-use development tools for programming embedded applications. It
integrates the IAR C/EC++ compiler,
assembler, linker, librarian, text editor,
project manager and C-SPY debugger in one integrated development
environment (IDE).With its built-in
chip-specific optimizer, the IAR
Embedded Workbench for ARM
generates very efficient and reliable
FLASH/PROMable code for the
ARM7™, ARM9™, ARM9E™,
ARM10™ and Intel® XScale™ families. C-SPY—IAR
Systems’ state-of-the-art high-level language
debugger—supports the ARM Multi-ICE JTAG interface
and other RDI-based JTAG interfaces, Macraigor’s
Raven and Wiggler JTAG interfaces as well as ARM
Angel. It also includes a CMX-RTX RTOS plug-in
module. In addition to solid technology, IAR also
provides professional world-wide technical support.
HIGHLIGHTS
• New project manager with text-based project files
• Sample projects included
• Support for the VFP9-S floating-point co-processor
• C-SPY RTOS plug-in module for Express Logic’s
ThreadX included
• C-SPY support for Macraigor’s mpDemon
• EPI JEENI driver now supports Ethernet connectivity
INTEGRATED DEVELOPMENT ENVIRONMENT
(IDE) WITH NEW PROJECT MANAGER
• A modular and extensible IDE running under Windows
98/ME/NT4/2000/XP
• Support for ARM7™, ARM9™, ARM9E™, ARM10™,
and Intel® XScale™. For detailed information about the
supported cores, see www.iar.com
• A modular and extensible IDE running under Windows
98/ME/NT4/2000/XP
• Create projects, edit files, compile, assemble, link and
debug your applications within the seamlessly
integrated environment
• Tool options configurable on global, group of source
files, or individual source files level
• Multiple projects in the same workspace
• Hierarchical project representation shows all different
source and output files and gives an overview of their
settings
• XML-based project files
• Easy to integrate external tools in the build process
• Multi-byte editor
From Idea To Target
www.iar.com
COMPILER
• ISO/ANSI standard C and Embedded C++ Compiler
• Each function can be compiled in ARM or Thumb
mode
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塶微埪殺嵢姢͑
• Multiple levels of optimizations for code size and
execution speed
• Extended ARM-specific keywords
• Built-in advanced ARM-specific optimizer
• Reentrant code
• Support for VFP9-S (see highlights)
• Extended support for EC++ including templates,
namespaces, mutable specifier, static cast, reinterpret
cast and const cast
• Easy and fast interrupt handling directly in C/EC++
• Mixed C/EC++ and assembler listings
• Multibyte character support
IAR C-SPY DEBUGGER
• Complex code and data breakpoints
• C/EC++ call stack with parameters
• Complete support for stack unwinding even at high
optimization levels
• I/O and interrupt simulation
• Versatile monitoring of registers, structures, call chain,
locals, global variables and peripheral registers
• Fine-grain single stepping
• Profiling and code coverage
• Target access to host file system via file I/O
• Continuous tracing and logging of arbitrary C-SPY
expressions such as variables and register values
• I/O register definition files for different ARM chips
• ARM Angel debug monitor support
• CMX-RTX RTOS plug-in module included
• ThreadX RTOS plug-in module included
• Compatibility with µC/OS-II RTOS; plug-in module
available from Micrium
IAR C-SPY JTAG INTERFACE
• Real-time execution
• ARM Multi-ICE JTAG interface and other RDI-based
JTAG interfaces
• Verified with EPI MAJIC, MAJIX-MX, MAJIC-PLUS,
Abatron BDI1000/BDI2000, Aiji OPENice32-A900,
Ashling OPELLA and Signum JTAGjet-ARM
• Macraigor mpDemon, Raven and Wiggler JTAG
interfaces
• EPI Jeeni JTAG interface
ASSEMBLER
• A powerful relocating macro assembler with a versatile
set of directives and operators
• Built-in C language preprocessor, accepting all C macro
definitions