LIQUID CRYSTAL GRAPHIC display modules

Transcription

October 1998
LIQUID
CRYSTAL
GRAPHIC
display modules
06-006D
Overview of Hitachi Liquid Crystal Display Activities
Hitachi is one of the world’s leading Liquid Crystal Display manufacturers, providing various
technologies to meet the growing demand for advanced display devices:
•
High resolution colour TFT displays with sizes up to 18.0" (45 cm) and resolutions up to UXGA.
The latest Super TFT technology featuring 140 degree viewing angle without colour change
puts Hitachi in a leading position for this technology.
•
High resolution colour STN displays with sizes up to 15.5" (39 cm) and resolutions up to XGA.
Hitachi’s new Hi-addressing driving technology improves display uniformity and will enable fast
speed products to be developed.
•
Monochrome and colour Poly-Silicon displays in 1" size with VGA resolution. These products
are ideal for projection and virtual imaging systems.
•
Medium and high resolution monochrome STN LCD modules with sizes from 2.5 “ (5 cm) to
10.4” (26 cm) diagonal and resolutions from one eighth VGA to full VGA. All latest products
feature excellent contrast, fast speed and high brightness. Several products have an integrated
controller and RAM for ease of use.
•
Medium resolution colour STN LCD modules with high contrast ratio, fast response time and
low power consumption targeted at handheld computers, micro note PCs, internet phones,
video phones and similar applications.
•
Full custom display module design and production capability. Close cooperation with our
customers and continuous strive for technical improvement have made Hitachi one of the
leading suppliers of customized graphic LCD modules.
In addition Hitachi’s LCD activities are supported by the following facilities:
•
Four research laboratories developing new materials, new technologies and new processes for
enhanced display performance.
•
Internal manufacturing of key components used in LCD module production like colour filters,
inverters and backlights etc. Hitachi as the world’s leading manufacturer of LCD drivers does
provide a high grade of design flexibility and can meet even the most stringent customer
requirements.
By combining the above technological capabilities with a strong commitment to our customers in
Europe, Hitachi is able to offer you leading products and outstanding support.
For further information or a product presentation please feel free to contact any of our sales offices or
distributors.
GRAPHICS LCD MODULES
Graphics Liquid Crystal Display Modules
Graphics LCD Module Quick Reference …………………………………………………………………………..
4
LCD Module Structures
6
Medium Size LCD Modules
LMG6381QHGE ………………………………………………………………………………………
8
10
LMG7380QHFC ………………………………………………………………………………………
12
LMG6400PLGR ………………………………………………………………………………………
14
LMG6401PLGE ………………………………………………………………………………………
16
LMG6402PLFR ………………………………………………………………………………………
18
LMG7400PLFC ………………………………………………………………………………………
20
LMG7401PLBC ……………………………………………………………………………………….
22
LMG7402PLFF ……………………………………………………………………………………….
24
LMG7420PLFC-X ……………………………………………………………………………………
26
SP10Q002 …………………………………………………………………………………………….
28
Quarter VGA LCD Modules
30
SR10Q001-T ………………………………………………………………………………………….
32
SP14Q001 …………………………………………………………………………………………….
34
SP14Q002 …………………………………………………………………………………………….
36
LMG7520RPFC ………………………………………………………………………………………
38
LMG7525RPFF ………………………………………………………………………………………
40
Half VGA LCD Module
SR16H005-R ………………………………………………………………………………………….
VGA LCD Modules
SP19V001 …………………………………………………………………………………………….
42
44
46
LMG5278XUFC-00T………………………………………………………………………………….
48
LMG7550XUFC……………………………………………………………………………………….
50
CFL Backlight Reference Data ………………………………………………………………………………………
52
CFL Inverters
CFL Inverter Quick Reference
54
INVC132 ………………………………………………………………………………………………
55
INVC186 ………………………………………………………………………………………………
56
INVC191 ………………………………………………………………………………………………
57
INVC196 ………………………………………………………………………………………………
58
INVC378 ………………………………………………………………………………………………
59
INVC444 ………………………………………………………………………………………………
60
INVC445 ………………………………………………………………………………………………
61
INVC473 ………………………………………………………………………………………………
62
INVC526 ………………………………………………………………………………………………
63
CONTENTS
Support Tools
Starter Kits ……………………………………………………………………………………………
65
Spare CFL Tubes ……………………………………………………………………………………
65
Controller Board …..…………………………………………………………………………………
66
Application Notes ……………………………………………………………………………………
68
HD61830 / HD61830B ………………………………………………………………………………
69
LCD Controller
LCM Handling Precautions …………………………………………………………………………………106
LCM Test Conditions
Environmental Conditions ………………………………………………………………………….. 110
Definition of Appearance Specification …………………………………………………………… 110
Definition of Optical Specification …………………………………………………………………. 111
LCM Lot Marking ……………………………………………………………………………………………..112
LCM Part Numbering ……………………………………………………………………………………… 113
Hitachi Sales Offices …………………………………………………………………………………………116
Hitachi Distributors …………………………………………………………………………………………..118
Notes: This data book may be subject to change without notice. This data book neither ensures the enforcement of any industrial properties on other rights, nor sanctions the enforcement
right thereof. All rights on this data book are reserved. It is not permitted to reproduce or duplicate, in any form the whole or a part of this data book without Hitachi’s permission
Resolution Part Name
Display Type
Display Colour Backlight
Type
Module Dimensions
H * W * D [mm]
Viewing Area
H * W [mm]
LMG6381QHGE
Transflective STN
Blue on Grey
EL
160*68*9.5
126.3*37.0
LMG7380QHFC
Transmissive FSTN
Black on White
CFL
160*68*11
124*34
LMG6400PLGR
Reflective STN
Blue on Grey
None
159.4*101*9.5
126*71
LMG6401PLGE
Transflective STN
Blue on Grey
EL
159.4*101*9.5
126*71
LMG6402PLFR
Reflective STN
Black on Grey
None
159.4*101*9.5
126*71
LMG7400PLFC
Transmissive FSTN
Black on White
CFL
159.4*101*11
126*71
LMG7401PLBC
Transmissive STN
Blue on White
CFL
159.4*101*11
126*71
LMG7402PLFF
Transflective FSTN
Black on Grey
CFL
159.4*101*11
126*71
LMG7420PLFC-X
Transmissive FSTN
Black on White
CFL
159.4*101*11
126*71
240*160
SP10Q002
Transmissive STN
Black on White
CFL
120*80*7.0
88.1*60
320*240
SR10Q001-T
Transflective EXSTN Black on White
LED
78.4*99.1*10.9
60.6*79.8
SP14Q001
Transmissive STN
Blue on White
CFL
167.1*109*11
120*90
SP14Q002
Transmissive FSTN
Black on White
CFL
167.1*109*11
120*90
LMG7520RPFC
Transmissive FSTN
Black on White
CFL
129.6*92.6*7.5
100*75.5
LMG7525RPFF
Transflective FSTN
Black on White
CFL
129.6*92.6*7.5
100*75.5
640*240
SR16H005-R
Reflective FSTN
Black on White
None
176.9*75.2*7.8
155.6*59.6
640*480
SP19V001
Transmissive FSTN
Black on White
CFL
197.0*145.0*8.5
115.74*153.7
LMG5278XUFC-00T
Transmissive FSTN
Black on White
CFL
257.5*174*7
200*152
LMG7550XUFC
Transmissive FSTN
Black on White
CFL
264*183*8.5
215.2*162.4
256*64
240*128
LMG7380QHFC
OVERVIEW
Dot Size
H * W [mm]
Dot Pitch
H * W [mm]
Duty
Ratio
Viewing Direction Controller
[o’clock]
(Suitable )
0.44*0.44
0.47*0.47
64
6
HD61830
LMG6381QHGE
0.44*0.44
0.47*0.47
64
6
T6963C
LMG7380QHFC
0.47*0.47
0.50*0.50
128
6
HD61830B
LMG6400PLGR
0.47*0.47
0.50*0.50
128
6
HD61830B
LMG6401PLGE
0.47*0.47
0.50*0.50
128
6
HD61830B
LMG6402PLFR
0.47*0.47
0.50*0.50
128
6
HD61830B
LMG7400PLFC
0.47*0.47
0.50*0.50
128
6
HD61830B
LMG7401PLBC
0.47*0.47
0.50*0.50
128
6
HD61830B
LMG7402PLFF
0.47*0.47
0.50*0.50
128
6
T6963C
LMG7420PLFC-X
0.335*0.335
0.35*0.35
160
6
(SED1331, MSM6255)
SP10Q002
0.225*0.225
0.24*0.24
320
6
(SED1331, MSM6255)
SR10Q001-T
0.345*0.345
0.36*0.36
240
6
(SED1331, MSM6255)
SP14Q001
0.345*0.345
0.36*0.36
240
6
(SED1331, MSM6255)
SP14Q002
0.285*0.285
0.30*0.30
240
6
(SED1331, MSM6255)
LMG7520RPFC
0.225*0.225
0.24*0.24
320
6
(SED1374, MSM6255)
LMG7525RPFF
0.225*0.225
0.24*0.24
240
6
(SED1374, MSM6255)
SR16H005-R
0.214*0.214
0.237*0.237
480
6
(SED1350, MSM6255)
SP19V001
0.27*0.27
0.30*0.30
242
12
(SED1350, MSM6255)
LMG5278XUFC-00T
0.3*0.3
0.33*0.33
242
12
(SED1350, MSM6255)
LMG7550XUFC
LMG7420PLFC-X
Part Name
Page
HITACHI LCD MODULE STRUCTURES
Hitachi offers various technologies for connecting together the LCD, drivers and PCB to form an LCD Module
(LCM). The following section gives an introduction on the different LCM structures.
Elastomer Connector
The QFP drivers are mounted on a rigid PCB. Contact pads for each driver output line on the PCB are aligned with
the LCD terminals and connected by an elastomer stripe positioned between the two parts. As the elastomer stripe
consists of horizontally alternating layers of conducting and non-conducting material it conducts between each pad
and its relevant LCD terminal but not between adjacent pads. The elastomer is held in position by a metal frame
which maintains the pressure necessary for good connection. This technology is suitable for dot pitches greater
than 0.3 mm.
Heat Seal Cable Connector
The QFP drivers are mounted on a rigid PCB. Contact pads on the PCB are aligned with the LCD terminals and a
flexible film cable is bonded with a heat seal process to both parts to form the connection.
Many of Hitachi’s standard LCM combine elastomer connectors and heat seal film cable connectors as shown in
Fig.1.
LCD
LIGHT GUIDE
PCB
METAL
FRAME
B
B'
DRIVER
ZEBRA
CONNECTOR
A-A'
HEATSEAL
METAL FRAME
LCD
B-B'
LIGHT GUIDE
PCB
DRIVER
Fig. 1
Straight Tape Carrier Package (TCP)
The newest generation of liquid crystal displays use driver with tape carrier packages (TCP).
The driver chip is mounted on a flexible film cable whose output pins are then bonded on the glass terminal with a
heat seal process. On the input side the tape is bonded to a small PCB whose function is to connect all segment
and common drivers and carry the output connectors.
Hitachi is a major manufacturer of LCD driver chips and so offers a variety of TCP standard packages allowing
high flexibility in display design. TCP drivers have a large number of output pins (80, 160 or higher) allowing high
resolution displays to be made with fewer drivers to reduce costs.
Hitachi’s new standard LCM employ a straight TCP structure and backlight within a metal frame. Compared to the
conventional structure where the frame is required to keep the connection between drivers and LCD, for TCP
structure the frame has only a supporting and protecting function and can easily modified.
MODULE STRUCTURES
METAL
FRAME 1
PCB
CABLE
MOLD
TCP
A
CFL
A'
METAL
FRAME 2
LIGHT GUIDE
LCD
B-B'
METAL FRAME 1
PCB
LCD
A-A'
LIGHT GUIDE
IC
MOLD
METAL FRAME 2
Fig. 2
Bent Tape Carrier Package (TCP)
Another package technology which even allows more compact design is Bent Tape Carrier Package. Compared to
straight TCP the flexible film cable is bent around the glass with the driver. The input side of the tape is then
bonded to a small PCB on the back of the LCD. Thus the fringe of the module is determined by the terminal width
and the bending radius of the film cable.
Bent TCP packages are more expensive and more difficult to handle in the manufacturing process than straight
TCP at present. Bent TCP drivers are mainly used for customized LCM in applications which require a very small
fringe such as personal digital assistants (PDA), personal communications assistants (PCA) or other handheld
devices. Also here Hitachi offers a wide range of standard packages which allow flexible and optimized design of
such custom LCM.
TCP
PCB
LCD
A
A'
B-B'
TCP
LCD
PCB
A-A'
IC
Fig. 3.
MEDIUM SIZE DISPLAYS OVERVIEW
LMG74xx Series
LMG74xx is a series of monochrome STN LCD modules with a resolution of 240 x 128 dots. It employs the newest
generation of liquid crystal material thus providing an excellent contrast which together with a brightness of 90
cd/sqm renders an outstanding image quality.
The LMG74xx series is available in three different display modes, Film STN transmissive, STN transmissive and
Film STN transflective.
ITEM
Display Type
LMG7400PLFC
LMG7401PLBC
LMG7402PLFF
LMG7420PLFC-X
UNIT
Black and White
Transmissive Film STN
Blue and White
Transmissive STN
Black and White
Transflective Film STN
Black and White
Transmissive Film STN
-
Controller
Resolution
HD61830B
T6963C
-
240 x 128
dots
Size
5.6
inch
Dot Size
0.44 x 0.44
mm
Dot Pitch
0.47 x 0.47
mm
External Dimensions
159.4 x 101 x 11
mm
Active Display Area
126 x 71
mm
Backlight
Brightness
1 Tube
-
90
cd/m
Contrast
18:1
-
Response Time (Rise)
160
ms
110
ms
Response Time (Fall)
Operating Temperature
Storage Temperature
CFL Tube Life Time
0 - + 50
°C
-20 - + 60
°C
10.000 typ.
hrs
2
All displays have a built-in controller and display memory thus allowing for easy interfacing to a microcontroller.
The most commonly used transmissive mode is available with two different controller options, built-in Hitachi
HD61830B or built-in Toshiba T6963C. Main difference between the two controllers is that the HD61830B has two
separate modes for displaying graphics and text while the T6963T can overlay both modes to display text and
graphics simultaneously.
LMG74xx series and LMG64xx series are mechanically compatible and all LMG640x types having the HD61830B
built-in are also electrically compatible to the LMG740x types.
In addition the LMG74xx series offers the following features
•
High contrast ratio of 18:1 based on new LC and polariser materials
•
High brightness of 90 cd /sqm based on new high efficiency CFL backlight and light guide
•
Anti-glare hard coat surface
•
Easy exchange of CFL tube
LMG7380QHFC
The LMG7380QHFC is a monochrome STN LCD module with a resolution of 256 x 64 dots. It employs the same
technology as LMG74xx series thus offering the following features:
•
High contrast ratio of 18:1 based on new LC and polariser materials
•
High brightness of 120 cd /sqm based on new high efficiency CFL backlight and light guide
•
•
Easy exchange of CFL tube
The LMG7380QHFC has a built in LCD controller Toshiba T6369 and display memory which allows easy
interfacing to a microcontroller. In addition it is mechanically compatible to the LMG6381QHGE.
MEDIUM SIZE DISPLAYS
LMG7380QHFC
LMG7420PLFC
LMG6381QHGE
256*64 Dots
FEATURES
♦
Blue on Grey STN Type
♦
Low Power EL Backlight
♦
Transflective Mode
♦
Built in LCD Controller HD61830
ELECTRICAL CHARACTERISTICS
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
Unit
Item
Symbol
Condition
Min
Typ
Max
Unit
160*68*9.5
126.3*37.0
256*64
0.44*0.44
0.47*0.47
115
mm
mm
dots
mm
mm
g
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
VDD - VSS
-
4.75
5.0
5.25
V
VEE - VSS
-
-12.5
-13.0
-13.5
V
35
2
-
VDD
mA
mA
V
-
V
-
0.2*
VDD
-
Hz
-
1/64
16.2
-
V
-
15.3
-
V
-
14.7
-
V
-
100
-
Vrms
OPTICAL DATA
Item
Symbol
Condition
Min
Typ
Max
Unit
K
Ø=10°,
θ=0°,
Note 1
-
3.0
-
-
-
-
Contrast Ratio
Brightness
-
Viewing
Direction
10
-
Viewing Angle
-
6
cd/m2
K=1.4,
Note 1
-
40
-
degree
Response Time
(Rise)
tR
Ø=10°,
θ=0°,
Note 1
-
250
400
ms
Response Time
(Fall)
tF
Ø=10°,
θ=0°,
Note 1
-
300
450
ms
ABSOLUTE MAXIMUM RATINGS
Item
Symbol
Condition
Min
Max
Unit
Supply Voltage
(Logic)
VDD - VSS
-
0
7
V
-
0
22
V
Input Voltage
VI
-
VSS
VDD
V
Operating
Temperature
TOP
Note 4,5
0
50
°C
Storage
Temperature
TST
Note 4,5
-20
60
°C
DATA INTERFACE PIN ASSIGNMENT
A1
A2
A3
A4
A5
A6
A7-A14
A15
A16
A17
A18-A20
E1-E2
fFLM
Backlight Lamp
Voltage
Backlight Lamp
Frequency
Backlight Lamp
Current
Symbol
Level
VSS
VDD
V0
RS
R/W
E
DB0 - DB7
Not CS
Not RES
VEE
NC
-
Ground
Power supply for logic
Power supply for LCD drive
Register select
Read / Write
Enable
Display data
Chip select
Reset
Power supply for LCD
No connection
VEL
-
Power supply for EL driving
High Level, 0.8*VD
Note 2
D
Low Level,
0
Note 2
-
VBL
Duty=1/64,
T=0°C,
Ø=10°,
Note 3
Duty=1/64,
T=25°C,
Ø=10°,
Note 3
Duty=1/64,
T=40°C,
Ø=10°,
Note 3
FEL=400Hz
fBL
-
-
400
-
Hz
IBL
VEL=100Vr
ms,
FEL=400Hz
-
-
100
mArms
Symbol
Min
Typ
Max
Unit
tCYC
tWEH
1000
450
-
-
ns
ns
tWEL
450
-
-
ns
tEr
tEf
tAS
tDSW
tDDR
tH
tAH
tDH
140
225
10
10
20
-
25
25
225
-
ns
ns
ns
ns
ns
ns
ns
ns
VDD -VO
TIMING CHARACTERISTICS
Item
VDD - VEE
Pin No
VIL
o’clock
Ø2 - Ø1
Supply Voltage
(LC Drive)
Input Voltage
(High Level)
Input Voltage
(Low Level)
Frame
Frequency
Duty Ratio
Recommended
LC Drive
Voltage
IDD
IEE
VIH
Enable cycle time
Enable pulse width (High
level)
Enable pulse width
(Low level)
Enable rise time
Enable fall time
Set up time
Data set up time
Data delay time
Hold time of Data
Address hold time
Data hold time
Function
INVERTER AND CONNECTORS
Recommended Inverter
Connector
NEC NEL-D32-48
No special connector required
Note1:
Definition of optical data, see page 84
Note 2:
Applied to DB0-DB7, NotCS, E, R/W, RS
Note 3:
Recommended LC driving voltage may fluctuate about +/- 0.5V by each
module
Note 4:
Background colour of the LCD changes depending on temperature.
Between 40-50°C optical characteristics of the LCD like contast and
viewing angle change but the display remains readable.
Note 5:
Storage at -20°C < 48 hr.
MECHANICAL DIMENSIONS
3.0+/-0.3
160.0+/-0.5
154.0+/-0.3
11.0+/-0.5
141.0+/-0.5
5.8+/-0.3
126.3+/-0.3
120.29+/-0.1
1.5 max.
(3.0)
1.5 max.
9.0 max.
E1
E2
0.44
0.47
EL SEALING AREA
(0.5)
B1
A1
B10
2.54
2.54
(22.86)
4- ∅3.0
A20
(48.26)
4.9+/-0.5
AL CAPACITOR
1.2+/-0.19
NOTE: PADS A1~A20 SHOULD NOT BE USED
USE PADS B1~B10 FOR INTERFACE
BLOCK DIAGRAM
POWER SUPPLY
FLM
CL1
CL2
D1
CS
RES
RS
R/W
E
DB0
X1
IC1
DB7
C
LCD
256 x 64
64
VDD
LCM
VSS
11
X64
R
RAM
VDD
VSS
VO
VEE
+5V
Y256
Y1
V0
VR
VEE
8
POWER
CIRCUIT
VLCD
TIMING
M'
80
80
80
16
IC2
IC3
IC4
IC5
INTERFACE TIMING DIAGRAM
-13.0V
VR :
10-20K Ω
VDD-V0 : LCD DRIVING VOLTAGE
POWER UP TIMING DIAGRAM
tCYC
tWEL
tWEHI
VDD
2.2V
E
0.8V
tEr
tEf
SIGNAL
0 ms min.
4.75V
0~50 ms
VALID
DATA
0 ms min.
VEE
2.2V
0.8V
tH
2.2V
DB0~DB7
(MPU TO LCM)
0.8V
tDD
2.4V
0.4V
tDH
VDD
SIGNAL
VEE
POWER ON
tDSW
DB0~DB7
(MPU TO LCM)
0~50 ms
tAH
tAS
CS,R/W,RS
5V
4.75V
POWER OFF
LMG7380QHFC
256*64 Dots
FEATURES
♦
Black on White Film STN Type
♦
Mechanical Compatibility to LMG63xx series
♦
Transmissive Mode
♦
Built-in LCD Controller T6963C
♦
High Brightness CFL Backlight
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
159.4*101*11
123*68
240*128
0.47*0.47
0.5*0.5
180
Unit
mm
mm
dots
mm
mm
g
OPTICAL DATA
Item
Contrast Ratio
Symbol
K
Brightness
-
Viewing
Direction
Viewing Angle
Ø2 - Ø1
Response Time
(Rise)
tR
Response Time
(Fall)
tF
Condition
Ø=10°,
θ=0°,
Note 1
T=25°C,
IL=5mA,
Note 8
K=2,
Note 1
Ø=10°,
θ=0°,
Note 1
Ø=10°,
θ=0°,
Note 1
Min
-
Typ
20
Max
-
Unit
-
70.0
90.0
-
cd/m2
6
40
-
degree
-
(160)
-
ms
(110)
-
Symbol
VDD - VSS
Condition
-
Min
0
Max
6.5
Unit
V
VDD - VEE
-
0
20.5
V
VI
TOP
Note 5,6
-0.3
0
0.3+VDD
50
V
°C
TST
Note 7
-20
60
°C
Pin No
A1
A2
A3
A4
Symbol
VSS (0V)
VDD (+5V)
V0
C/D
Level
-
A5
A6
A7-A14
A15
A16
A17
A18
Not WR
Not RD
DB0 - DB7
Not CE
Not RET
VEE (-15V)
Not DISP OFF
-
A19
F/S
-
A20
Reverse
-
Function
Ground
Power supply for logic circuit
WR=Low and C/D=High for Status
read, C/D=Low for Data Read
DW=Low for Data Write
RD=Low for Data read
Display data
Chip enable (CE must be low)
Reset
NC for Display ON, GND for Display
OFF
Character font selection (F/S=High
for 6x8 font, F/S=Low for 8x8 font)
Display mode reverse
CFL INTERFACE PIN ASSIGNMENT
Pin No
1
2
3
4
Symbol
GND
NC
NC
HV
Level
-
Condition
-
Min
4.75
Typ
5.0
Max
5.25
Unit
V
VEE - VSS
-
-15.5
-15.0
-14.5
V
IDD
IEE
VIH
Note 2
Note 2
High Level
11.0
1.9
-
14.0
4.0
VDD
mA
mA
V
VIL
Low Level
0.8*
VDD
0
-
V
fFLM
Note 4
-
75
0.2*
VDD
-
Hz
-
1/64
16.2
-
V
-
15.0
-
V
-
14.3
-
V
-
360
-
Vrms
VBL
Duty=1/64,
T=0°C,
Ø=10°,
Note 3
Duty=1/64,
T=25°C,
Ø=10°,
Note 3
Duty=1/64,
T=40°C,
Ø=10°,
Note 3
T=25°C
fBL
T=25 °C
30
70
85
kHz
IBL
T=25 °C
2.5
5.0
5.5
mArms
VS
T=25°C,
Note 9
(1000)
-
-
V
Min
100
10
80
Typ
-
Max
-
Unit
ns
ns
ns
80
40
10
-
150
50
ns
ns
ns
ns
VDD -VO
ms
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Operating
Temperature
Storage
Temperature
Input Voltage
(High Level)
Input Voltage
(Low Level)
Frame
Frequency
Duty Ratio
Recommended
LC Drive
Voltage
Symbol
VDD - VSS
o’clock
30
-
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
Function
CFL Ground
No connection
No connection
Power supply for CFL
Backlight Lamp
Voltage
Backlight Lamp
Frequency
Backlight Lamp
Current
Lamp Start
Voltage
Item
Symbol
C/D set up time
tCDS
C/D hold time
tCHD
Not CE, Not RD, Not WR Not tCE, Not
pulse width
tRD, Not tWR
Data set up time
tDS
Data hold time
tDH
Access time
tACC
Output hold time
tOH
HITACHI INVC191
Data Connector
JAE LZ-20P-SL-SMT-E3000
Lamp Connector
MITSUMI M63M83-04
Note1:
Note 2:
Starter Kit
START7380
Data Housing Connector
Lamp Housing Connector
M61M73-04, M60-04-30-114P or
M60-04-30-134P
fFRAME=75Hz, VDD-V0=15.7V, Ta=25°C
Note 3:
Recommended LCD driving may fluctuate about +/- 1.0V by each module.
Note 4:
.
Frame frequency may have to be varied to avoid flicker.
Note 5:
Background colour of the LCD changes depending on temperature. Between
40-50°C optical characteristics of the LCD like contast and viewing angle
change but the display remains readable.
Note 6:
Higher starting voltage of CFL and higher LCD driving voltage are needed while
operating at 0°C. The lifetime of CFL will be reduced at 0°C
Note 7:
Storage at -20°C < 48 hrs, at 60°C < 168 hr
Note 8:
Measurement after 10 minutes of CFL operation. Brightness control at 100%
Note 9:
Starting discharge voltage is increased when LCM is operating at lower
temperature. Please check the characteristics of inverter before applying.
159.4
1.515 max
(2.015)
(3.015)
139.4
152.4+/-0.3
142.4
124.0+/-0.3
123.0 min
0.5*239+0.47=119.97+/-0.1
6.5+/-0.5
2.015 max
6.6
2.5
3.5
12.0+/-0.3
10.0
3.5
8.5
6.9
1.2+/-0.2
0.03
1
0.47
20
48.26+/-0.3
2.54+/-0.3
2.54+/-0.3
CN 1
68.0 min
70.0+/-0.3
82.0
94.0+/-0.3
101.0
0.03
0.47
0.5*127+0.47=63.97+/-0.1
22.86+/-0.3
10
CN 3
NOTE 1
(50)
12.74+/-0.3
1
4- ∅3.0
30- ∅1.0
1
(50)
4
CN2
NOTE :
BLOCK DIAGRAM
8
DB7
CL2
D1
IC1
+5V
LCD
240*128
64
VSS
VR
V0
IC2
64
-15.0V
VEE
X128
Y1
8
RAM
VDD
VSS
V0
VEE
VDD
LCM
X1
13
OSC
11.0 max.
POWER SUPPLY / POWER UP TIMING DIAGRAM
FLM
CL1
CONTROLLER
HD61830B
F/S
CE
RET
C/D
WR
RD
DB0
DO NOT CONNECT ANY SIGNAL TO CN3
USE CN1 AS INTERFACE
VR :
10-20K Ω
V D D - V 0 : L C D D R I V I N G VO
Y240
80
80
80
IC3
IC4
IC5
5V
4.75V
VDD
POWER
CIRCUIT
VLCD
SIGNAL
TIMING
4.75V
0~50 ms
0~50 ms
VALID
DATA
0 ms min.
0 ms min.
VDD
SIGNAL
M'
VEE
D1'
VEE
POWER ON
POWER OFF
52.1ms<T<59.5ms
tCYC
LOAD
tWEHI
X1
X240
tWEL
2.2V
CP
X2
E
0.8V
D3
Y1
Y5
Y317
D2
Y2
Y6
Y318
tAS
D1
Y3
Y7
Y319
2.2V
D0
Y4
Y8
Y320
CS,R/W,RS
tEf
tEr
tAH
0.8V
tDSW
1.4us min
FRM
0.8V
tDD
LOAD
240*T
FRM
2.2V
DB0~DB7
(MPU TO LCM)
FRM
DB0~DB7
(MPU TO LCM)
tH
2.4V
0.4V
tDH
LMG6400PLGR
240*128 Dots
FEATURES
♦
♦
Reflective Mode
♦
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
159.4*101*9.5
126*71
240*128
0.47*0.47
0.5*0.5
160
Unit
mm
mm
dots
mm
mm
g
OPTICAL DATA
Item
Contrast Ratio
Symbol
K
Brightness
Viewing
Direction
Viewing Angle
-
Ø2 - Ø1
Response Time
(Rise)
tR
Response Time
(Fall)
tF
Condition
Ø=10°,
θ=0°,
Note 1
-
Min
-
Typ
(3.0)
Max
-
Unit
-
-
6
-
cd/m2
o’clock
K=1.4,
Note 1
Ø=10°,
θ=0°,
Note 1
Ø=10°,
θ=0°,
Note 1
-
40
-
degree
-
250
400
ms
-
300
450
ms
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Operating
Temperature
Storage
Temperature
Symbol Condition
VDD - VSS
-
Min
0
Max
7
Unit
V
VDD - VEE
-
0
22
V
VI
TOP
Note 4,5
VSS
0
VDD
50
V
°C
TST
Note 4,5
-20
60
°C
Pin No
A1
A2
A3
A4
A5
A6
A7-A14
A15
A16
A17
A18-A20
Symbol
VSS (0V)
VDD (+5V)
V0
RS
R/W
E
DB0 - DB7
Not CS
Not RES
VEE (-15.0V)
NC
Built-in LCD Controller HD61830B
Level
-
Function
Ground
Register select
Read / Write
Enable
Display data
Chip select
Reset
No connection
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
Input Voltage
(High Level)
Input Voltage
(Low Level)
Frame
Frequency
Duty Ratio
Recommended
LC Drive
Voltage
Symbol
VDD - VSS
Condition
-
Min
4.75
Typ
5.0
Max
5.25
Unit
V
VEE - VSS
-
-14.5
-15.0
-15.5
V
IDD
IEE
VIH
Note 2
Note 2
High Level
6.0
4.0
-
VDD
mA
mA
V
VIL
Low Level
0.8*
VDD
0
-
V
fFLM
-
-
75
0.2*
VDD
-
Hz
-
1/128
16.9
-
V
-
15.8
-
V
-
15.4
-
V
Symbol
tCYC
tWEH
Min
1000
450
Typ
-
Max
-
Unit
ns
ns
tWEL
450
-
-
ns
tEr
tEf
tAS
140
-
25
25
-
ns
ns
ns
tDIS
tDD
tH
tAH
225
10
10
-
225
-
ns
ns
ns
ns
tDH
20
-
-
ns
VDD -VO
Duty=1/128
T=0°C,
Ø=10°,
Note 3
Duty=1/128
T=25°C,
Ø=10°,
Note 3
Duty=1/128
T=40°C,
Ø=10°,
Note 3
Item
Enable cycle time
level)
Enable pulse width (Low
level)
Enable rise time
Enable fall time
Set up time of CS, R/W,
RS
Set up time of Input Data
Data delay time
Hold time of Data
Hold time of CS, R/W,
RS
Data hold time
CONNECTORS
Connector
Note1:
-
Note 2:
fFLM=75Hz, VDD-V0=15.8V, D=GND(VSS)
Note 3:
Recommended LC driving voltage may fluctuate about +- 0.5V by each
module
Note 4:
Note 5:
159.4
152.4+/-0.3
142.4
126.0+/-0.3
119.97+/-0.1
3.5
8.5
.
71.0+/-0.3
0.50*127+0.47=63.97+/-0.1
87.2
(3.5)
94.0+/-0.3
8.1
0.5
101.0
3.5
5.9
(3.0)
(3.5)
2.54
(3.5)
B10
.
1
NOTE:
B1
1.2+/-0.2
.
2.54
48.26+/-0.3
2.5
+/-0.3
12.0
4- ∅3.0
A20
(6.3)
A1
9.5MAX.
4.9
12.0+/-0.5
22.86+/-0.3
PIN B1 - B10 SHOULD NOT BE USED
USE PIN A1 - A20 FOR INTERFACE
BLOCK DIAGRAM
POWER SUPPLY
FLM
CS
RES
RS
R/W
E
DB0
8
CONTROLLER
HD61830
CL1
VDD
64
LCD
240*128
D1
IC2
DB7
VO
VR
X128
64
Y1
Y240
13
OSC
RAM
VDD
VSS
VO
VEE
+5V
X1
IC1
CL2
POWER
CIRCUIT
TIMING
VEE
80
80
80
IC3
IC4
IC5
-15V
8
VR: 10~20K Ω
VLCD
M'
tCYC
tWEH
E
tWEL
tEr
tEf
CS,R/W,RS
2.2V
0.8V
0~50 ms
tH
4.75V
VALID
DATA
0 ms min.
0 ms min.
VEE
2.4V
0.4V
tDH
SIGNA
VEE
POWER ON
0.8V
VDD
0~50 ms
2.2V
tDD
DB0~7
( LCM TO MPU)
5V
4.75V
SIGNAL
tDIS
DB0~7
(MPU TO LCM)
VDD
tAH
tAS
POWER OFF
LMG6401PLGE
240*128 Dots
FEATURES
♦
♦
Low Power EL Backlight
♦
Transflective Mode
♦
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
159.4*101*9.5
126*71
240*128
0.47*0.47
0.5*0.5
160
Unit
mm
mm
dots
mm
mm
g
OPTICAL DATA
Item
Contrast Ratio
Symbol
K
Brightness
Viewing
Direction
Viewing Angle
-
Ø2 - Ø1
Response Time
(Rise)
tR
Response Time
(Fall)
tF
Condition
Ø=10°,
θ=0°,
Note 1
-
Min
-
Typ
(3.0)
Max
-
Unit
-
-
10
6
-
cd/m2
o’clock
K=1.4,
Note 1
Ø=10°,
θ=0°,
Note 1
Ø=10°,
θ=0°,
Note 1
-
40
-
degree
-
250
400
ms
-
300
450
ms
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Operating
Temperature
Storage
Temperature
Symbol Condition
VDD - VSS
-
Min
0
Max
7
Unit
V
VDD - VEE
-
0
22
V
VI
TOP
Note 4,5
VSS
0
VDD
50
V
°C
TST
Note 4,5
-20
60
°C
Pin No
A1
A2
A3
A4
A5
A6
A7-A14
A15
A16
A17
A18-A20
E1-E2
Symbol
VSS (0V)
VDD (+5V)
V0
RS
R/W
E
DB0 - DB7
Not CS
Not RES
VEE (15.0V)
NC
VEL
Level
-
Function
Ground
Register select
Read / Write
Enable
Data bus
Chip select
Reset
No connection
Power supply for EL driving
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
Input Voltage
(High Level)
Input Voltage
(Low Level)
Frame
Frequency
Duty Ratio
Recommended
LC Drive
Voltage
Symbol
VDD - VSS
Condition
-
Min
4.75
Typ
5.0
Max
5.25
Unit
V
VEE - VSS
-
-14.5
-15.0
-15.5
V
IDD
IEE
VIH
Note 2
Note 2
High Level
6.0
4.0
-
VDD
mA
mA
V
VIL
Low Level
0.8*
VDD
0
-
V
fFLM
-
-
75
0.2*
VDD
-
Hz
-
1/128
16.9
-
V
-
15.8
-
V
-
15.4
-
V
-
100
-
Vrms
VEL
Duty=1/128
T=0°C,
Ø=10°,
Note 3
Duty=1/128
T=25°C,
Ø=10°,
Note 3
Duty=1/128
T=40°C,
Ø=10°,
Note 3
fEL=400Hz
fEL
-
-
400
-
Hz
IEL
VEL=100Vr
ms,
fEL=400Hz
-
-
160
mArms
Symbol
tCYC
tWEH
Min
1000
450
Typ
-
Max
-
Unit
ns
ns
tWEL
450
-
-
ns
tEr
tEf
tAS
140
-
25
25
-
ns
ns
ns
tDIS
tDD
tH
tAH
225
10
10
-
225
-
ns
ns
ns
ns
tDH
20
-
-
ns
VDD -VO
Backlight Tile
Voltage
Backlight Lamp
Frequency
Backlight Tile
Current
Item
Enable cycle time
level)
level)
Enable rise time
Enable fall time
RS
Data delay time
Hold time of Data
RS
Data hold time
CONNECTORS
Connector
Note1:
Note 2:
Note 3:
module
Note 4:
Note 5:
159.4
3.5
152.4+/-0.3
142.4
126.0+/-0.3
0.50*239+0.47=119.97+/-0.1
8.5
5.9
(3.0)
9.5MAX.
4.9
EL SEALING AREA
1.5 MAX
A20
A1
2.54
48.26+/-0.3
+/-0.5
12.0
4- ∅3.0
B1
2.54
(3.5)
(3.5)
BLOCK DIAGRAM
B10
1.2+/-0.2
22.86+/-0.3
12.0+/-0.5
POWER SUPPLY
FLM
CS
RES
RS
R/W
E
DB0
8
CONTROLLER
HD61830
CL1
VDD
64
LCD
240*128
D1
IC2
DB7
VO
VR
X128
64
Y1
Y240
13
OSC
RAM
VDD
VSS
VO
VEE
+5V
X1
IC1
CL2
POWER
CIRCUIT
TIMING
VEE
80
80
80
IC3
IC4
IC5
-15V
8
VR: 10~20K Ω
VLCD
M'
tCYC
tWEH
E
tWEL
tEr
tEf
2.2V
0.8V
0 ms min.
0 ms min.
VEE
POWER ON
0.8V
2.4V
0.4V
tDH
VDD
SIGNA
VEE
2.2V
tDD
DB0~7
( LCM TO MPU)
tH
4.75V
0~50 ms
VALID
DATA
SIGNAL
tDIS
DB0~7
(MPU TO LCM)
5V
4.75V
0~50 ms
tAH
tAS
CS,R/W,RS
VDD
POWER OFF
LMG6402PLFR
240*128 Dots
FEATURES
♦
Black on Grey Film STN Type
♦
Reflective Mode
♦
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
159.4*101*9.5
126*71
240*128
0.47*0.47
0.5*0.5
150
Unit
mm
mm
dots
mm
mm
g
OPTICAL DATA
Item
Contrast Ratio
Symbol
K
Brightness
Viewing
Direction
Viewing Angle
-
Ø2 - Ø1
Response Time
(Rise)
tR
Response Time
(Fall)
tF
Condition
Ø=10°,
θ=0°,
Note 1
-
Min
-
Typ
(3.0)
Max
-
Unit
-
-
6
-
cd/m2
o’clock
K=1.4,
Note 1
Ø=10°,
θ=0°,
Note 1
Ø=10°,
θ=0°,
Note 1
-
40
-
degree
-
250
400
ms
-
300
450
ms
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Operating
Temperature
Storage
Temperature
Symbol Condition
VDD - VSS
-
Min
0
Max
7
Unit
V
VDD - VEE
-
0
22
V
VI
TOP
Note 4,5
VSS
0
VDD
50
V
°C
TST
Note 4,5
-20
60
°C
Pin No
A1
A2
A3
A4
A5
A6
A7-A14
A15
A16
A17
A18-A20
Symbol
VSS (0V)
VDD (+5V)
V0
RS
R/W
E
DB0 - DB7
CS
RES
VEE (15.0V)
NC
Level
-
Function
Ground
Register select
Read / Write
Enable
Data bus
Chip select
Reset
No connection
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
Input Voltage
(High Level)
Input Voltage
(Low Level)
Frame
Frequency
Duty Ratio
Recommended
LC Drive
Voltage
Symbol
VDD - VSS
Condition
-
Min
4.75
Typ
5.0
Max
5.25
Unit
V
VEE - VSS
-
-14.5
-15.0
-15.5
V
IDD
IEE
VIH
Note 2
Note 2
High Level
6.0
4.0
-
VDD
mA
mA
V
VIL
Low Level
0.8*
VDD
0
-
V
fFLM
-
-
75
0.2*
VDD
-
Hz
-
1/128
16.9
-
V
-
15.8
-
V
-
15.4
-
V
Symbol
tCYC
tWEH
Min
1000
450
Typ
-
Max
-
Unit
ns
ns
tWEL
450
-
-
ns
tEr
tEf
tAS
140
-
25
25
-
ns
ns
ns
tDIS
tDD
tH
tAH
225
10
10
-
225
-
ns
ns
ns
ns
tDH
20
-
-
ns
VDD -VO
Duty=1/128
T=0°C,
Ø=10°,
Note 3
Duty=1/128
T=25°C,
Ø=10°,
Note 3
Duty=1/128
T=40°C,
Ø=10°,
Note 3
Item
Enable cycle time
level)
level)
Enable rise time
Enable fall time
RS
Data delay time
Hold time of Data
RS
Data hold time
CONNECTORS
Connector
Note1:
Note 2:
Note 3:
module
Note 4:
Note 5:
159.4
152.4+/-0.3
142.4
126.0+/-0.3
119.97+/-0.1
3.5
8.5
.
71.0+/-0.3
0.50*127+0.47=63.97+/-0.1
87.2
(3.5)
94.0+/-0.3
8.1
0.5
101.0
3.5
5.9
(3.0)
(3.5)
2.54
(3.5)
B10
.
1
NOTE:
B1
1.2+/-0.2
.
2.54
48.26+/-0.3
2.5
+/-0.3
12.0
4- ∅3.0
A20
(6.3)
A1
9.5MAX.
4.9
12.0+/-0.5
22.86+/-0.3
PIN B1 - B10 SHOULD NOT BE USED
USE PIN A1 - A20 FOR INTERFACE
BLOCK DIAGRAM
POWER SUPPLY
FLM
CS
RES
RS
R/W
E
DB0
8
CONTROLLER
HD61830
CL1
VDD
64
LCD
240*128
D1
IC2
DB7
VO
VR
X128
64
Y1
Y240
13
OSC
RAM
VDD
VSS
VO
VEE
+5V
X1
IC1
CL2
POWER
CIRCUIT
TIMING
VEE
80
80
80
IC3
IC4
IC5
-15V
8
VR: 10~20K Ω
VLCD
M'
tCYC
tWEH
E
tWEL
tEr
tEf
CS,R/W,RS
2.2V
0.8V
0~50 ms
tH
4.75V
VALID
DATA
0 ms min.
0 ms min.
VEE
2.4V
0.4V
tDH
SIGNA
VEE
POWER ON
0.8V
VDD
0~50 ms
2.2V
tDD
DB0~7
( LCM TO MPU)
5V
4.75V
SIGNAL
tDIS
DB0~7
(MPU TO LCM)
VDD
tAH
tAS
POWER OFF
LMG7400PLFC
240*128 Dots
FEATURES
♦
Black on White Film STN Type
♦
High Contrast LC Material
♦
Transmissive Mode
♦
♦
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
159.4*101*11
123*68
240*128
0.47*0.47
0.5*0.5
180
Unit
mm
mm
dots
mm
mm
g
OPTICAL DATA
Item
Contrast Ratio
Symbol
K
Brightness
-
Viewing
Direction
Viewing Angle
Ø2 - Ø1
Response Time
(Rise)
tR
Response Time
(Fall)
tF
Condition
Ø=10°,
θ=0°,
Note 1
T=25°C,
IL=5mA,
Note 8
K=2,
Note 1
Ø=10°,
θ=0°,
Note 1
Ø=10°,
θ=0°,
Note 1
Min
-
Typ
18
Max
-
Unit
-
70.0
90.0
-
cd/m2
6
40
-
degree
-
(160)
(210)
ms
(110)
(160)
Symbol Condition
VDD - VSS
-
Min
0
Max
6.5
Unit
V
VDD - VEE
-
0
20.5
V
VI
TOP
Note 5,6
-0.3
0
0.3+VDD
50
V
°C
TST
Note 7
-20
60
°C
Pin No
A1
A2
A3
A4
A5
A6
A7-A14
A15
A16
A17
A18
Symbol
VSS (0V)
VDD (+5V)
V0
RS
R/W
E
DB0 - DB7
Not CS
RES
VEE (-15V)
Not Disp OFF
Level
-
A19-A20
NC
-
Function
Ground
Register select
Read / Write
Enable
Display data
Chip select
Reset
NC for Display ON, GND forDisplay
OFF
No connection
Pin No
1
2
3
4
Symbol
GND
NC
NC
HV
Level
-
Condition
-
Min
4.75
Typ
5.0
Max
5.25
Unit
V
VEE - VSS
-
-14.5
-15.0
-15.5
V
IDD
IEE
VIH
Note 2
Note 2
High Level
9.7
2.5
-
12.0
4.0
VDD
mA
mA
V
VIL
Low Level
0.8*
VDD
0
-
V
fFLM
Note 4
-
75
0.2*
VDD
-
Hz
-
1/128
16.9
-
V
-
15.8
-
V
-
15.4
-
V
-
360
-
Vrms
VBL
Duty=1/128
T=0°C,
Ø=10°,
Note 3
Duty=1/128
T=25°C,
Ø=10°,
Note 3
Duty=1/128
T=40°C,
Ø=10°,
Note 3
T=25°C
fBL
T=25 °C
30
70
85
kHz
IBL
T=25 °C
2.5
5.0
5.5
mArms
VS
T=25°C,
Note 9
(1000)
-
-
V
Symbol
tCYC
tWEH
Min
1.0
0.45
Typ
-
Max
-
Unit
us
us
tWEL
0.45
-
-
us
tEr
tEf
tAS
140
-
25
25
-
ns
ns
ns
tDIS
tDD
tH
tAH
225
10
10
-
225
-
ns
ns
ns
ns
tDH
20
-
-
ns
VDD -VO
ms
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Operating
Temperature
Storage
Temperature
Input Voltage
(High Level)
Input Voltage
(Low Level)
Frame
Frequency
Duty Ratio
Recommended
LC Drive
Voltage
Symbol
VDD - VSS
o’clock
30
-
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
Function
CFL Ground
No connection
No connection
Backlight Lamp
Voltage
Backlight Lamp
Frequency
Backlight Lamp
Current
Lamp Start
Voltage
Item
Enable cycle time
level)
level)
Enable rise time
Enable fall time
RS
Data delay time
Hold time of Data
RS
Data hold time
HITACHI INVC191
Lamp Connector
MITSUMI M63M83-04
Starter Kit
STARTLMG74xx
M61M73-04 , M60-04-30-114P or
M60-04-30-134P
Note 5:
Note 6:
Higher starting voltage of CFL and higher LCD driving voltage are needed
while operating at 0°C. The lifetime of CFL will be reduced at 0°C
Note1:
Note 2:
Note 7:
Storage at -20°C < 48 hr, Ta at 60°C < 168 hr
Note 3:
Note 8:
Measurement after 10 minutes of CFL operating. Brightness control 100%
Note 4:
Need to make sure of flickering and rippling of display when setting the
FRAME Frequency in your set.
Note 9:
159.4
1.515 max
(2.015)
(3.015)
139.4
152.4+/-0.3
142.4
124.0+/-0.3
123.0 min
0.5*239+0.47=119.97+/-0.1
6.5+/-0.5
2.015 max
6.6
2.5
3.5
12.0+/-0.3
10.0
3.5
8.5
6.9
1.2+/-0.2
0.03
0.03
0.47
1
0.47
20
48.26+/-0.3
2.54+/-0.3
2.54+/-0.3
CN 1
68.0 min
70.0+/-0.3
82.0
94.0+/-0.3
101.0
0.5*127+0.47=63.97+/-0.1
22.86+/-0.3
10
CN 3
NOTE 1
(50)
12.74+/-0.3
1
4- ∅3.0
30- ∅1.0
1
(50)
4
CN2
NOTE :
BLOCK DIAGRAM
DB7
CONTROLLER
HD61830B
F/S
CE
RET
C/D
WR
RD
DB0
8
RAM
VDD
VSS
V0
VEE
11.0 max.
FLM
CL1
VDD
LCM
X1
CL2
D1
IC1
64
IC2
64
13
OSC
+5V
LCD
240*128
VSS
8
VR
V0
X128
Y1
Y240
80
80
80
IC3
IC4
IC5
POWER
CIRCUIT
VLCD
VR :
10-20KW
VDD-V0 : LCD DRIVING VOLTAGE
5V
4.75V
VDD
M'
4.75V
0~50 ms
0~50 ms
TIMING
SIGNAL
D1'
-15.0V
VEE
VALID
DATA
0 ms min.
0 ms min.
VEE
POWER OFF
tCYC
52.1ms<T<59.5ms
tWEHI
LOAD
E
X1
Y1
Y5
Y317
D2
Y2
Y6
Y318
D1
Y3
Y7
Y319
D0
Y4
Y8
Y320
1.4us min
0.8V
X2
D3
tEf
tEr
tAH
tAS
CS,R/W,RS
2.2V
0.8V
tDSW
FRM
0.8V
tDD
LOAD
240*T
DB0~DB7
(MPU TO LCM)
tH
2.2V
DB0~DB7
(MPU TO LCM)
FRM
FRM
tWEL
2.2V
X240
SIGNAL
VEE
POWER ON
CP
VDD
2.4V
0.4V
tDH
LMG7401PLBC
240*128 Dots
FEATURES
♦
Blue on White STN Type
♦
♦
Transmissive Mode
♦
♦
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
159.4*101*11
123*68
240*128
0.47*0.47
0.5*0.5
180
Unit
mm
mm
dots
mm
mm
g
OPTICAL DATA
Item
Contrast Ratio
Symbol
K
Brightness
-
Viewing
Direction
Viewing Angle
Ø2 - Ø1
Response Time
(Rise)
tR
Response Time
(Fall)
tF
Condition
Ø=10°,
θ=0°,
Note 1
T=25°C,
IL=5mA,
Note 8
K=2,
Note 1
Ø=10°,
θ=0°,
Note 1
Ø=10°,
θ=0°,
Note 1
Min
-
Typ
(18)
Max
-
Unit
-
(60.0)
(80.0)
-
cd/m2
6
Symbol Condition
VDD - VSS
-
30
40
-
degree
-
(160)
(210)
ms
-
(110)
(160)
ms
Min
0
Max
6.5
Unit
V
VDD - VEE
-
0
20.5
V
VI
TOP
Note 5,6
-0.3
0
0.3+VDD
50
V
°C
TST
Note 7
-20
60
°C
Pin No
A1
A2
A3
A4
A5
A6
A7-A14
A15
A16
A17
A18
Symbol
VSS (0V)
VDD (+5V)
V0
RS
R/W
E
DB0 - DB7
Not CS
Not RET
VEE (-15V)
Not DISP OFF
Level
-
A1- A20
NC
-
Function
Ground
Register select
Read / Write
Enable
Display data
Chip select
Reset
OFF
No connection
Pin No
1
2
3
4
Note1:
Note 2:
Note 3:
Note 4:
Symbol
GND
NC
NC
HV
Level
-
Condition
-
Min
4.75
-
-14.5
-15.0
-15.5
V
IDD
IEE
VIH
Note 2
Note 2
High Level
9.7
2.5
-
12.0
4.0
VDD
mA
mA
V
VIL
Low Level
0.8*
VDD
0
-
V
fFLM
Note 4
-
75
0.2*
VDD
-
Hz
-
1/128
16.9
-
V
-
15.8
-
V
-
15.4
-
V
-
360
-
Vrms
VBL
Duty=1/128
T=0°C,
Ø=10°,
Note 3
Duty=1/128
T=25°C,
Ø=10°,
Note 3
Duty=1/128
T=40°C,
Ø=10°,
Note 3
T=25°C
fBL
T=25 °C
30
70
85
kHz
IBL
T=25 °C
2.5
5.0
5.5
mArms
VS
T=25°C,
Note 9
(1000)
-
-
V
Symbol
tCYC
tWEH
Min
1.0
0.45
Typ
-
Max
-
Unit
us
us
tWEL
0.45
-
-
us
tEr
tEf
tAS
140
-
25
25
-
ns
ns
ns
tDIS
tDD
tH
tAH
225
10
10
-
225
-
ns
ns
ns
ns
tDH
20
-
-
ns
VDD -VO
Item
Enable cycle time
level)
level)
Enable rise time
Enable fall time
RS
Data delay time
Hold time of Data
RS
Data hold time
HITACHI INVC191
Lamp Connector
MITSUMI M63M83-04
Note 5:
Note 7:
Note 8:
Note 9:
Symbol
VDD - VSS
Backlight Lamp
Voltage
Backlight Lamp
Frequency
Backlight Lamp
Current
Lamp Start
Voltage
Note 6:
Function
CFL Ground
No connection
No connection
Item
Supply Voltage
(Logic)
Input Voltage
(High Level)
Input Voltage
(Low Level)
Frame
Frequency
Duty Ratio
Recommended
LC Drive
Voltage
VEE - VSS
o’clock
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Operating
Temperature
Storage
Temperature
Supply Voltage
(LC Drive)
Supply Current
Typ
5.0
Max
5.25
Unit
V
Starter Kit
START74xx
M61M73-04, M60-04-30-114P or
M60-04-30-134P
Measurement after 10 minutes of CFL operating. Brightness control100%
159.4
12.0+/-0.3
1.515 max
(2.015)
(3.015)
139.4
152.4+/-0.3
142.4
124.0+/-0.3
123.0 min
0.5*239+0.47=119.97+/-0.1
3.5
8.5
6.9
6.5+/-0.5
2.015 max
6.6
2.5
3.5
10.0
1.2+/-0.2
0.03
1
0.47
20
48.26+/-0.3
2.54+/-0.3
2.54+/-0.3
CN 1
68.0 min
70.0+/-0.3
82.0
94.0+/-0.3
101.0
0.03
0.47
0.5*127+0.47=63.97+/-0.1
22.86+/-0.3
10
CN 3
NOTE 1
(50)
12.74+/-0.3
1
4- ∅3.0
30- ∅1.0
1
(50)
4
CN2
NOTE :
BLOCK DIAGRAM
DB7
8
CL2
D1
IC1
+5V
LCD
240*128
64
VSS
VR
V0
IC2
64
-15.0V
VEE
X128
Y1
8
RAM
VDD
VSS
V0
VEE
VDD
LCM
X1
13
OSC
11.0 max.
FLM
CL1
CONTROLLER
HD61830B
F/S
CE
RET
C/D
WR
RD
DB0
VR :
10-20K Ω
Y240
80
80
80
IC3
IC4
IC5
5V
4.75V
VDD
POWER
CIRCUIT
VLCD
SIGNAL
TIMING
4.75V
0~50 ms
0~50 ms
VALID
DATA
0 ms min.
0 ms min.
VDD
SIGNAL
M'
VEE
D1'
VEE
POWER ON
POWER OFF
tCYC
52.1ms<T<59.5ms
tWEHI
LOAD
tWEL
2.2V
E
CP
X1
X240
0.8V
X2
D3
Y1
Y5
Y317
tAS
D2
Y2
Y6
Y318
2.2V
D1
Y3
Y7
Y319
D0
Y4
Y8
Y320
CS,R/W,RS
tEf
tEr
tAH
0.8V
tDSW
2.2V
DB0~DB7
(MPU TO LCM)
1.4us min
0.8V
FRM
tDD
FRM
2.4V
DB0~DB7
(MPU TO LCM)
LOAD
240*T
FRM
tH
0.4V
tDH
LMG7402PLFF
240*128 Dots
FEATURES
♦
Black on Grey Film STN
♦
♦
Transflective Mode
♦
♦
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
159.4*101*11
123*68
240*128
0.47*0.47
0.5*0.5
180
Unit
mm
mm
dots
mm
mm
g
OPTICAL DATA
Item
Contrast Ratio
Symbol
K
Brightness
-
Viewing
Direction
Viewing Angle
Ø2 - Ø1
Response Time
(Rise)
tR
Response Time
(Fall)
tF
Condition
Ø=10°,
θ=0°,
Note 1
T=25°C,
IL=5mA,
Note 8
K=2,
Note 1
Ø=10°,
θ=0°,
Note 1
Ø=10°,
θ=0°,
Note 1
Min
-
Typ
(18)
Max
-
Unit
-
(60.0)
(80.0)
-
cd/m2
6
40
-
degree
-
(160)
(210)
ms
(110)
(160)
Symbol Condition
VDD - VSS
-
Min
0
Max
6.5
Unit
V
VDD - VEE
-
0
20.5
V
VI
TOP
Note 5,6
-0.3
0
0.3+VDD
50
V
°C
TST
Note 7
-20
60
°C
Pin No
A1
A2
A3
A4
A5
A6
A7-A14
A15
A16
A17
A18
Symbol
VSS (0V)
VDD (+5V)
V0
RS
R/W
E
DB0 - DB7
Not CS
Not RET
VEE (-15V)
Not DISP OFF
Level
-
A1- A20
NC
-
Function
Ground
Register select
Read / Write
Enable
Display data
Chip select
Reset
OFF
No connection
Pin No
1
2
3
4
Symbol
GND
NC
NC
HV
Level
-
Condition
-
Min
4.75
Typ
5.0
Max
5.25
Unit
V
VEE - VSS
-
-14.5
-15.0
-15.5
V
IDD
IEE
VIH
Note 2
Note 2
High Level
9.7
2.5
-
12.0
4.0
VDD
mA
mA
V
VIL
Low Level
0.8*
VDD
0
-
V
fFLM
Note 4
-
75
0.2*
VDD
-
Hz
-
1/128
16.9
-
V
-
15.8
-
V
-
15.4
-
V
-
360
-
Vrms
VBL
Duty=1/128
T=0°C,
Ø=10°,
Note 3
Duty=1/128
T=25°C,
Ø=10°,
Note 3
Duty=1/128
T=40°C,
Ø=10°,
Note 3
T=25°C
fBL
T=25 °C
30
70
85
kHz
IBL
T=25 °C
2.5
5.0
5.5
mArms
VS
T=25°C,
Note 9
(1000)
-
-
V
Symbol
tCYC
tWEH
Min
1.0
0.45
Typ
-
Max
-
Unit
us
us
tWEL
0.45
-
-
us
tEr
tEf
tAS
140
-
25
25
-
ns
ns
ns
tDIS
tDD
tH
tAH
225
10
10
-
225
-
ns
ns
ns
ns
tDH
20
-
-
ns
VDD -VO
ms
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Operating
Temperature
Storage
Temperature
Input Voltage
(High Level)
Input Voltage
(Low Level)
Frame
Frequency
Duty Ratio
Recommended
LC Drive
Voltage
Symbol
VDD - VSS
o’clock
30
-
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
Function
CFL Ground
No connection
No connection
Backlight Lamp
Voltage
Backlight Lamp
Frequency
Backlight Lamp
Current
Lamp Start
Voltage
Item
Enable cycle time
level)
level)
Enable rise time
Enable fall time
RS
Data delay time
Hold time of Data
RS
Data hold time
HITACHI INVC191
Lamp Connector
MITSUMI M63M83-04
Starter Kit
START74xx
M61M73-04, M60-04-30-114P or
M60-04-30-134P
Note 5:
Note 6:
Note1:
Note 2:
Note 7:
Note 3:
Note 8:
Measurement after 10 minutes of CFL operating. Brightness control100%
Note 4:
Note 9:
159.4
1.515 max
(2.015)
(3.015)
139.4
152.4+/-0.3
142.4
124.0+/-0.3
123.0 min
0.5*239+0.47=119.97+/-0.1
6.5+/-0.5
2.015 max
6.6
2.5
3.5
12.0+/-0.3
10.0
3.5
8.5
6.9
1.2+/-0.2
0.03
1
0.47
20
48.26+/-0.3
2.54+/-0.3
2.54+/-0.3
CN 1
68.0 min
70.0+/-0.3
82.0
94.0+/-0.3
101.0
0.03
0.47
0.5*127+0.47=63.97+/-0.1
22.86+/-0.3
10
CN 3
NOTE 1
(50)
12.74+/-0.3
1
4- ∅3.0
30- ∅1.0
1
(50)
4
CN2
NOTE :
BLOCK DIAGRAM
DB7
CONTROLLER
HD61830B
F/S
CE
RET
C/D
WR
RD
DB0
8
FLM
CL1
RAM
VDD
VSS
V0
VEE
11.0 max.
CL2
D1
VDD
LCM
+5V
X1
IC1
LCD
240*128
64
VSS
VR
V0
IC2
64
13
OSC
8
-15.0V
VEE
X128
Y1
VR :
10-20K Ω
Y240
80
80
80
IC3
IC4
IC5
5V
4.75V
VDD
POWER
CIRCUIT
VLCD
SIGNAL
TIMING
4.75V
0~50 ms
0~50 ms
VALID
DATA
0 ms min.
0 ms min.
VDD
SIGNAL
M'
VEE
D1'
VEE
POWER ON
POWER OFF
tCYC
52.1ms<T<59.5ms
tWEHI
LOAD
E
CP
X1
X240
D3
Y1
Y5
X2
D2
Y2
Y6
Y318
Y3
Y7
Y319
D0
Y4
Y8
Y320
0.8V
tEf
tEr
tAH
tAS
Y317
D1
CS,R/W,RS
2.2V
0.8V
tDSW
0.8V
tDD
FRM
DB0~DB7
(MPU TO LCM)
FRM
LOAD
240*T
tH
2.2V
DB0~DB7
(MPU TO LCM)
1.4us min
FRM
tWEL
2.2V
2.4V
0.4V
tDH
LMG7420PLFC-X
240*128 Dots
FEATURES
♦
Black on White Film STN TYPE
♦
♦
Transmissive Mode
♦
Built-in LCD Controller T6963C
♦
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
159.4*101*11
123*68
240*128
0.47*0.47
0.5*0.5
180
Unit
mm
mm
dots
mm
mm
g
OPTICAL DATA
Item
Contrast Ratio
Symbol
K
Brightness
-
Viewing
Direction
Viewing Angle
Ø2 - Ø1
Response Time
(Rise)
tR
Response Time
(Fall)
tF
Condition
Ø=10°,
θ=0°,
Note 1
T=25°C,
IL=5mA,
Note 8
K=2,
Note 1
Ø=10°,
θ=0°,
Note 1
Ø=10°,
θ=0°,
Note 1
Min
-
Typ
18
Max
-
Unit
-
60.0
80.0
-
cd/m2
6
40
-
degree
-
160
210
ms
110
160
Symbol Condition
VDD - VSS
-
Min
0
Max
6.5
Unit
V
VDD - VEE
-
0
20.5
V
VI
TOP
Note 5,6
-0.3
0
0.3+VDD
50
V
°C
TST
Note 7
-20
60
°C
Pin No
A1
A2
A3
A4
A5
A6
A7-A14
A15
A16
A17
A18
Symbol
VSS (0V)
VDD (+5V)
V0
C/D
Level
-
Not WR
Not RD
DB0 - DB7
Not CE
Not RET
VEE (-15V)
Not DISP OFF
-
A19
F/S
-
A20
Reverse
-
Function
Ground
Not WR=Low and C/D=High for
Command Write, C/D= Low for Data
Write, Not RD = Low and C/D=High
for Status Read, C/D = Low for Data
Read
DW=Low for Data Write
RD=Low for Data read
Display data
Chip enable (Not CE must be Low)
Reset
OFF
Character font selection (F/S=High
for 6x8 font, F/S=Low for 8x8 font)
Display mode reverse
Pin No
1
2
3
4
Symbol
GND
NC
NC
HV
Level
-
Condition
-
Min
4.75
Typ
5.0
Max
5.25
Unit
V
VEE - VSS
-
-14.5
-15.0
-15.5
V
IDD
IEE
VIH
Note 2
Note 2
High Level
11.7
2.5
-
14.0
4.0
VDD
mA
mA
V
VIL
Low Level
0.8*
VDD
0
-
V
fFLM
Note 4
-
75
0.2*
VDD
-
Hz
-
1/128
16.9
-
V
-
15.8
-
V
-
15.2
-
V
-
360
-
Vrms
VBL
Duty=1/128
T=0°C,
Ø=10°,
Note 3
Duty=1/128
T=25°C,
Ø=10°,
Note 3
Duty=1/128
T=50°C,
Ø=10°,
Note 3
T=25°C
fBL
T=25 °C
30
70
85
kHz
IBL
T=25 °C
2.5
5.0
5.5
mArms
VS
T=25°C,
Note 9
(1000)
-
-
V
Min
100
10
80
Typ
-
Max
-
Unit
ns
ns
ns
80
40
10
-
150
50
ns
ns
ns
ns
VDD -VO
ms
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Operating
Temperature
Storage
Temperature
Input Voltage
(High Level)
Input Voltage
(Low Level)
Frame
Frequency
Duty Ratio
Recommended
LC Drive
Voltage
Symbol
VDD - VSS
o’clock
30
-
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
Function
CFL Ground
No connection
No connection
Backlight Lamp
Voltage
Backlight Lamp
Frequency
Backlight Lamp
Current
Lamp Start
Voltage
Item
Symbol
C/D set up time
tCDS
C/D hold time
tCHD
Not CE, Not RD, Not WR Not tCE, Not
pulse width
tRD, Not tWR
Data set up time
tDS
Data hold time
tDH
Access time
tACC
Output hold time
tOH
HITACHI INVC191
Lamp Connector
MITSUMI M63M83-04
Note1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Starter Kit
START74xx
M61M73-04, M60-04-30-114P or
M60-04-30-134P
Recommended LCD driving may fluctuate about +- 1.0V by each module.
Measurement after 10 minutes of CFL operating. Brightness control:100%
159.4
12.0+/-0.3
1.515 max
(2.015)
(3.015)
139.4
152.4+/-0.3
142.4
124.0+/-0.3
123.0 min
0.5*239+0.47=119.97+/-0.1
3.5
8.5
6.9
6.5+/-0.5
2.015 max
6.6
2.5
3.5
10.0
1.2+/-0.2
0.03
0.03
0.47
1
0.47
20
48.26+/-0.3
2.54+/-0.3
2.54+/-0.3
CN 1
68.0 min
70.0+/-0.3
82.0
94.0+/-0.3
101.0
CN 3
NOTE 1
0.5*127+0.47=63.97+/-0.1
22.86+/-0.3
10
(50)
12.74+/-0.3
1
4- ∅3.0
30- ∅1.0
1
(50)
4
CN2
NOTE :
BLOCK DIAGRAM
DB7
CONTROLLER
T6369C
F/S
CE
RET
C/D
WR
RD
DB0
8
RAM
VDD
VSS
V0
VEE
11.0 max.
FLM
CL1
VDD
LCM
+5V
X1
CL2
D1
IC1
LCD
240*128
64
VSS
VR
V0
IC2
64
13
OSC
8
-15.0V
VEE
X128
Y1
VR :
10-20K Ω
Y240
80
80
80
IC3
IC4
IC5
POWER
CIRCUIT
VLCD
VDD
5V
4.75V
SIGNAL
VDD
0~50 ms
VALID
DATA
0 ms min.
TIMING
M'
4.75V
0~50 ms
SIGNAL
0 ms min.
VEE
D1'
VEE
POWER ON
POWER OFF
52.1ms<T<59.5ms
C/D
LOAD
VIH
VIL
VIH
VIL
tCDS
X1
X240
D3
tCDH
CE
CP
Y1
Y5
X2
VIH
VIL
Y317
D2
Y2
Y6
Y318
D1
Y3
Y7
Y319
D0
Y4
Y8
Y320
RD,WR
VIH
VIL
VIL
tDS
D0-D7
(MPU TO LCM)
1.4us min
VIL
tCE,tRD,tWR
VIH
VIH
VIL
VIL
tDH
FRM
D0-D7
(LCM TO MPU)
240*T
FRM
VIH
VIL
tACC
LOAD
VIH
VIL
tOH
SP10Q002
240*160 Dots
FEATURES
• Black on White Film STN Type
• Transmissive Mode
• High Brightness
• High Contrast LC Material
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
120*80*7.0
88.1*60
240*160
0.335*0.335
0.35*0.35
110
Unit
mm
mm
dots
mm
mm
g
OPTICAL DATA
Item
Contrast Ratio
Brightness
Viewing
Direction
Viewing Angle
Response Time
(Rise)
Response Time
(Fall)
Symbol
K
Condition
Ø=10°,
θ=0°
Min
-
Typ
20
Max
-
Unit
-
K
IL=4.5mA
Note 7
-
80
120
-
cd/m2
Ø2 - Ø1
tR
K>2
Ø=10°,
θ=0°, 25°C
-
40
160
-
degree
ms
tF
Ø=10°,
θ=0°, 25°C
-
110
-
ms
6
o’clock
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Operating
Temperature
Storage
Temperature
Symbol Condition
VDD - VSS
-
Min
0
Max
6.5
Unit
V
VDD - VEE
-
0
27.5
V
VI
TOP
Note 2
Note 5,6
-0.3
0
0.3+VDD
50
V
°C
TST
Note 5,6
-20
60
°C
Pin No
1
2
3
4
5
6
7-10
11
12
Symbol
FRAME
LOAD
CP
VDD
VSS
VEE
D0-D3
DISP OFF
GND
Level
H
H->L
H->L
H/L
H/L
-
Function
First Line Marker
Data latch
Data shift
Power supply for logic (+5V)
Ground
Power supply for LC
Display Data
H for ON/ L for OFF
Frame Ground
Pin No
1
2
3
4
Note 2:
Note 3:
Note 4:
Note 5:
Symbol
HV
NC
NC
GND
Level
-
Function
High Voltage Supply for CFL
No connection
No connection
Ground
Applied to Not DISP OFF, FRAME, LOAD, CP, D0-D3
fFRAME=75Hz, D0-D3=0.1.0.1...VDD-VEE=23.0V, T=25°C
Recommended LC driving voltage may fluctuate about +-1.0V by each
module
Between 40-50°C optical characteristics of the LCD like contrast and
viewing angle change but the LCD remains readable.
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
Input Voltage
(High Level)
Input Voltage
(Low Level)
Frame
Frequency
Duty Ratio
Recommended
LC Drive
Voltage
Symbol
VDD - VSS
Condition
-
Min
3.0
Typ
5.0
Max
5.25
Unit
V
VEE - VSS
-
-
-22
-
V
IDD
IEE
VIH
Note 3
Note 3
High Level,
Note 2
Low Level,
Note 2
Note 8
0.8*
VDD
0
(10)
(7)
-
VDD
mA
mA
V
-
V
70
75
0.2*
VDD
140
Hz
-
1/160
(18)
-
V
-
(17)
-
V
-
(16)
-
V
-
(300)
-
Vrms
VIL
fFLM
Backlight Lamp
Voltage
Backlight Lamp
Frequency
Backlight Lamp
Current
Lamp Start
Voltage
VBL
Duty=1/160
T=0°C
Note 4
Duty=1/160
T=25°C
Note 4
Duty=1/160
T=40°C
Note 4
-
fBL
-
30
70
85
kHz
IBL
-
4
4.5
5
mA
1000
-
-
Vrms
Backlight Lamp
Lifetime
TL
-
hrs
Max
6.5
20
-
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
VDD -VEE
VS
T=25°C
15.000 20.000
Item
Clock frequency
CL2 Pulse Width
Clock Rise/Fall Time
Data Set Up Time
Data Hold Time
Load Set Up Time
Load to Clock Time
Frame Set Up Time
Frame Hold Time
Load Pulse Width
Symbol
fCP
fW
tr,tf
tDSU
tDHD
tLSU
tLC
TSETUP
THOLD
tWC
Min
63
50
50
80
80
100
100
125
Typ
-
INVC444, INVC445, INVC473
Starter Kit
STARTSP10Q00x
Data Connector
MOLEX 52103-1217
12 Pin FPC (1 mm pitch)
MOLEX 510-1500
Lamp Connector
MITSUMI M63M83-04
M61M73-04,M60-04-30-114P or
M60-04-30-134P
Note 6:
Note 7:
Note 8:
Note 9:
Operation upt to 40°C at 85%RH max, above 40°C absolute humidity
must be lower than the humidity of 85%RH at 40°C.
Storage at -20°C < 48 hrs at 60°C < 168 hrs
Measurement after 10 minutes of CFL operation. Brightness control at
100%
Flicker or ripples may occur if the LCD is operated at higher or lower
frame frequencies.
Starting discharge voltage increases when LCM is operating at lower
120
17.3
90.1±0.3
(1.0)
88.1 min
2.06
83.985±0.1
(100)
0.015
0.015
(10)
13.5
63 ± 0.3
(7)
0.335
(62)
60 min
55.985 ± 0.1
62 ± 0.3
73 ± 0.3
(7)
1
0.335
80
(5)
(9)
(1.0)
4
2.01
12.4
(7)
3.5
(7)
(7)
1
12
3.5
113 ± 0.3
2.5
2.5
7.0MAX.
4- f3.5 ± 0.3
BLOCK DIAGRAM
FUSE
VDD
+5V,+3.3V
D0~D3
LCM
FRAME
IC1
IC2
VSS
Tr
VEE
IC3
C1
C2
-22.0V,-23.7V
LOAD
Y240
Y161
Y160
IC4
DISP OFF
Y81
X1
Y80
Y1
1
C1 : 3.3mF
C2 : 3.3mF
X1,Y1 X1,Y2 X1,Y3 X1,Y4
X80
D3
D2
D1
D0
CP
4.75V
LCD 240x160 DOTS
X81
IC5
X160
VEE
GND
VALID DATA
SIGNAL
GND
GND
0 min
POWER
SUPPLY
VEE
VDD
SIGNAL
0 min .
GND
GND
VEE
0 min
0 min
VCFL
GND
(CFL)
0~50ms
GND
VDD
VSS
4.75V
5V
0~50ms
VDD
CFL
DISP OFF
GND
GND
POWER ON
POWER OFF
44.64µs < T < 89.29µs
tw
tw
tw
tf
LOAD
CP
CP
X160
X1
D3
Y1
Y5
D2
Y2
Y6
0.8VDD
0.8VDD
X2
tr
0.8VDD
0.2VDD
0.2VDD
tDSU
tDHD
0.8VDD
0.2VDD
0.8VDD
0.2VDD
Y237
Y238
D1
Y3
Y7
D0~D3
Y239
D0
Y4
Y8
tLSU
Y240
LOAD
FRAME
0.2VDD
0.8VDD
twc
tLC
0.8VDD
tf
LOAD
0.2VDD
tr
tSETUP
tHOLD
160xT
FRAME
FRAME
D0~D3
X1
X2
X159 X160
0.8VDD
0.8VDD
0.8VDD
DISP OFF
QUARTER VGA RESOLUTION DISPLAYS OVERVIEW
ITEM
SP14Q001
SP14Q002
LMG7520RPFC
LMG7525RPFF
UNIT
Blue and White
Transmissive STN
Black and White
Transmissive Film
STN
Black and White
Transmissive Film
STN
Black and White
Transflective Film
STN
-
5.7
5.7
4.7
4.7
Dot Size
0.345 x 0.345
0.33 x 0.33
0.285x0.285
0.285x0.285
mm
Dot Pitch
0.36 x 0.36
0.36 x 0.36
0.3 x 0.3
0.3 x 0.3
mm
External Dimensions
167.1 x 109 x 11
167.1 x 109 x 11
129.6 x 92.6 x 7.5
129.6 x 92.6 x 7.5
mm
Active Display Area
120 x 91
120 x 91
100 x 75.5
100 x 75.5
mm
90
90
100
25
cd/m
Display Type
Resolution
Size
320 x 240
Backlight
Brightness
Contrast
dots
inch
Single Tube CFL
-
12 : 1
20 : 1
20 : 1
8:1
-
160
160
160
160
ms
110
110
110
110
ms
0 - + 50
2
°C
Storage Temperature
-20 - + 60
°C
CFL Tube Life Time
20.000 typ
hrs
SP14Q00x Series
The SP14Q00x series of 5.7” Quarter VGA Monochrome LCD modules is another representative of Hitachi’s
newest generation LCD technology combining high contrast, high brightness with an extremly wide viewing angle.
Both transmissive Film STN and transmissve STN types are available. Reflective and transflective versions are
available on request from a minimum order quantity of 3000 pcs.
The SP14Q00x series offers the following advanced features :
•
High contrast ratio of up to 20:1 based on new LC material and high aperture technology
•
High brightness of 90 cd/sqm based on new high efficiency cold fluorescent lamp and light guide
•
Extremely wide viewing angle
•
Easily replacable long lifetime CFL tube
•
The SP14Q00x series is controllerless and various external LCD controllers may be used. Suitable controllers are
HITACHI HD64645/HD64646, Oki MSM6255/MSM6355, Seiko SED1350, SED1374 or Yamaha YGV610B.
LMG752x Series
Within the LMG752x series of 4.7” Quarter VGA Monochrome LCD modules a FSTN transmissive and transflective
version are available as standard products. The LMG752x series offers the following advanced features:
•
Very compact external dimensions and low weight due to the use of the latest TCP driver technology
•
High contrast ratio of 20:1 (8:1 Reflective) based on new LC materials combined with high aperture ratio
•
High brightness of 100 cd /sqm based on new high efficiency cold fluorescent lamp and light guide
•
Since LMG7520RPFC is fully electrically compatible to the SP14Q00x series the same controllers can be used for
interfacing.
All of the above LCD modules employ a new long life CFL tube providing 20.000 hrs half brightness lifetime.
QUARTER VGA DISPLAYS
SP14Q002
LMG7520RPFC
SR10Q001-T
240*320 Dots
Preliminary Specification
FEATURES
• High Contrast EX STN Technology
• Transflective Mode
• Ultra Low Power Consumption
• High Brightness LED Backlight
• Compact and Lightweight Design
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
71.4 x 101.0 x 6.1
60.6 x 79.8
240 x 320
0.225 x 0.225
0.24 x 0.24
-
Unit
mm
mm
dots
mm
mm
g
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
Symbol
Condition Min
VDD - VSS T=25°C
2.7
Typ
3.3
Max
4.7
Unit
V
VEE - VSS T=25°C
26.0
-
33.0
V
IDD
-
0.4
-
mA
-
2.6
-
mA
0.8*
VDD
-
VDD
V
0
-
V
70
-
0.2*
VDD
120
Hz
-
1/320
27.2
-
V
-
26.0
-
V
-
25.2
-
V
tbd
tbd
tbd
Vrms
tbd
tbd
tbd
mArm
s
IEE
OPTICAL DATA
Item
Contrast Ratio
Symbol
K
Brightness
Viewing
Direction
Viewing Angle
-
Condition
Ø=10°,
q=0°,
Note 1
T=25°C
-
Min
-
Typ
12
Max
-
Unit
-
-
8
6
-
cd/m2
o’clock
K=2,
Note 1
Ø=10°,
q=0°,
Note 1
Ø=10°,
q=0°,
Note 1
-
40
-
degree
-
200
-
ms
-
400
-
ms
Ø2 - Ø1
Response
Time (Rise)
tR
Response
Time (Fall)
tF
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Operating
Temperature
Storage
Temperature
Symbol
VDD VSS
VEE VSS
VI
TOP
Condition Min
0.3
Max
7.0
Unit
V
-
0
36.0
V
Note 2
Note 5,6
-0.3
0
0.3+VDD
50
V
°C
TST
Note 7
-20
60
°C
Pin No
1
2
3
4
5
6
Symbol
VDD
VSS
VEE
FLM
DISPOFF
M
Level
H
H/L
H/L
H/L
7
8
9
10-13
14
15
16
CL1
CL2
VSS
D0 - D3
VSS
LED (+)
LED (-)
H->L
H->L
H/L
-
Function
Power Supply for Logic (3.3V)
Shield Ground
Power Supply for LCD
First Line Marker
High for ON, Low for OFF
Switching Singal to convert LCD
Driving Waveform into AC Signal
Data Latch
Shift Clock
Shield Ground
Display Data
Shield Ground
Power Supply for LED
Power Supply for LED
Input Voltage
(High Level)
VIH
Input Voltage VIL
(Low Level)
Frame
fFLM
Frequency
Duty Ratio
Recommended VEE -VSS
LC Drive
Voltage
Backlight
Lamp Voltage
Backlight
Lamp Current
Note 3,
3.3V
Note 3,
3.3V
High
Level,
Note 2
Low Level,
Note 2
Note 8
VBL
Duty=1/24
2 T=0°C,
Note 4
Duty=1/24
2 T=25°C,
Note 4
Duty=1/24
2 T=40°C,
Note 4
T=25°C
IBL
T=25°C
Item
CL1 Pulse Width
Clock Frequency
CL2 Pulse Width
Clock Set Up Time
Clock Hold Time
Clock Rise Fall Time
Data Set Up Time
Data Hold Time
FRAME Set Up Time
FRAME Hold Time
Symbol
Min
Typ
Max
Unit
tWHCL1
30
ns
fCP
12.0
MHz
(VDD=3.155.5V)
tWCL2
30
ns
tSCL1
100
ns
tHCL1
100
ns
tr,tf
50
ns
tr,tf<(1/fcp-2tWCL2)/2 and tr,tf< 50 ms
tDSU
20
ns
tDH
25
ns
tFS
100
ns
tFH
30
ns
Not required
Data Connector
FPC (pitch 1 mm)
Starter Kit
e.g. MOLEX
Note 6:
Applied to Not DISP.OFF, FRAME, LOAD, CP, UD0-UD3, LD0-LD3
Note 7:
Storage at -25°C < 48 hr, at 60°C < 168 hr
FRAME=140Hz, UD0-UD3=0.1.0.1...LD0-LD3=1.0.1.0..VDDVEE=22.7V,T=25°C
Note 8:
frame frequencies.
Note1:
Definition of optical data, see page XXX
Note 2:
Note 3:
Note 4:
module
(7.8)
2.2+/-0.3
5.2+/-0.
6.3+/-0.5
10.0+/-0.5
50.0+/-0.3
2.7+/-0.3
R3.0
F 1.6
1
(1.0)
(3.0)
(1.0)
(0.6)
16
DOTS AREA
(0.4)
79.8+/-0.3
WINDOW OF BEZEL
0.24+/-319+0.225=76.785
101.0+/-0.5
(21.0)
(6.0)
(41.0)
VIEWING
DIRECTION
0.24*239+0.225=57.585
6.1MAX (EXCEPT PARTS AREA)
60.6+/-0.3
(5.5)
4.0+/-0.5
71.4+/-0.5
CONDUCTIVE SIDE
BLOCK DIAGRAM
D0~D3
CL2
VLCD
FUSE
LCM
R
+33V
VDD
C
2.7V
IC1
FLM(YD)
4.7V
VSS
Y1
5V
Y240
0.8VDD
160
IC2
VDD
X1
SIGNAL
M
CL1
D.OFF
VLCD
VDD
GND
IC3
0~50ms
GND
0~50ms
GND
0 min
VEE
GND
GND
0 min
LED(-)
LED BACKLIGHT
LED(+)
DISP.OFF
GND
POWER OFF
260m S<=T<=44.6 m S
LOAD
T/60
tWHCL1
LOAD
tf
tr
X1
D2
Y2 Y6
D1
Y3 Y7
D0
Y4 Y8
X2
CL1
Y237
tWCL2
tr
Y238
Y239
tSCL1
tHCL1
tf
CL2
Y240
tWCL2
300ns max
tDSU
tDH
M
D0~D7
LOAD
tCYC
320*T
tFS
YD
FRAME
VEE
DISP.OFF
GND
Y1 Y5
SIGNAL
0 min
POWER ON
D3
GND
0 min
VDD
X320
160
X320
GND
VALID
DATA
tFH
SP14Q001
320*240 Dots
FEATURES
• Blue on White STN Type
• High Brightness CFL Backlight
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
167.0*109*8.5
120*89
320*240
0.345*0.345
0.360*0.360
160
Unit
mm
mm
dots
mm
mm
g
Input Voltage
(High Level)
OPTICAL DATA
Item
Symbol
Contrast Ratio K
Brightness
-
Viewing
Direction
Viewing Angle Ø2 - Ø1
Response
Time (Rise)
tR
Response
Time (Fall)
tF
Condition
Ø=0°,
q=0°,
Note 1
T=25°C,
Note 7
K=2,
Note 1
Ø=0°,
q=0°,
Note 1
Ø=0°,
q=0°,
Note 1
Min
-
-
Typ
12
80.0
Max
-
-
6
Unit
-
cd/m2
o’clock
-
40
-
degree
-
120
-
ms
-
150
-
ms
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Operating
Temperature
Storage
Temperature
Symbol
VDD VSS
VDD VEE
VI
TOP
Condition Min
0
Max
6
Unit
V
-
0
27.5
V
Note 2
Note 5,6
-0.3
0
0.3+VDD
50
V
°C
TST
Note 5,6
-20
60
°C
Pin No
1-4
5
6
7
8
9
10
11
12
13
14
Symbol
D0 - D3
DISP OFF
FRAME
NC
LOAD
CP
VDD
VSS
VEE
V0
FGND
Level
H/L
H/L
H
H->L
H->L
-
Function
Display data
High for ON / Low for OFF
First Line Marker
Do not connect
Data latch
Data shift
Ground
Power supply for LC drive circuit
Operating voltage for LC driving
Front panel ground
Pin No
1
2
3
4
Symbol
VCFL
NC
NC
VCFL
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
Level
-
Function
No connection
No connection
CFL Ground
Symbol
Condition Min
VDD - VSS 3.0
Typ
5.0
Max
5.25
Unit
V
VEE - VSS -
-20.9
-22.0
-23.1
V
IDD
IEE
VIH
Note 3
Note 3
High
Level,
Note 2
Low Level,
Note 2
-
0.8*
VDD
6
5
-
VDD
mA
mA
V
0
-
V
70
75
0.2*
VDD
80
-
1/240
23.8
-
V
-
22.9
-
V
-
22.0
-
V
VBL
Duty=1/24
0 T=0°,
Ø=10°,
Note 4
Duty=1/24
0 T=25°C,
Ø=10°,
Note 4
Duty=1/24
0 T=40°C,
Ø=10°,
Note 4
T=25°C
-
300
-
Vrms
fBL
T=25°C
30
70
85
kHz
IBL
T=25°C
4
5
6
VS
T=25°C
(1000) -
-
mArm
s
V
TL
T=25°C
15.000 20.000 -
hrs
Min
63
50
50
80
80
100
100
125
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
Input Voltage VIL
(Low Level)
Frame
fFLM
Frequency
Duty Ratio
Recommended VDD -VO
LC Drive
Voltage
Backlight
Lamp Voltage
Backlight
Lamp
Frequency
Backlight
Lamp Current
Lamp Start
Voltage
Backlight
Lamp Lifetime
Hz
Item
Clock frequency
Clock pulse width
Rise, Fall time
Data set up time
Data hold time
LOAD set up time
LOAD -> Clock time
FRAME set up time
FRAME hold time
LOAD pulse width
Symbol
fCP
tw
tr, tf
tDSU
tDHD
tLSU
tLC
tSETUP
tHOLD
twc
Typ
-
Max
6.5
20
-
HITACHI INVC132, INVC186,
INVC196
Lamp Connector
JAE IL-G-4S-S3C23
Starter Kit
STARTSP14Q00x
-
Note1:
Note 2:
Applied to NotDISP.OFF, FRAME, LOAD, CP, D0-D3
Note 3:
FRAME=75Hz, D0-D3=0.1.0.1...VDD-VEE=23.7V,T=25°C
Note 4:
Recommended LC driving voltage may fluctuate about +-/1.0V by each
module
Note 5:
Note 6:
Note 7:
Measurement after 10 minutes of CFL operating. Brightness control at100 %
167.0+/-0.5
160.0+/-0.5
4.0+/-0.3
152.0+/-0.3
(25.0)
(200.0)
(122.0)
1.0max.
(2.4075)
4-¿3.5+/-0.3
CONTACT
SI
120.0min
0.36*319+0.345=115.185
)
5
7
0
3
.1
(
7.3+/-0.5
7.0+/-0.5
.
x
a)
m5
5
. .(8
1
3
.
0
-/
+
0
.4
)0
.5
(3
7.0+/-0.5
5
8
.3
6
8
=
5
4
.3
0
+
9
1
*3
6
3
.0
in
)
m0
.
.0 2
9 (9
8
.3
0
/+
0
.
1
0
1
.5
0
/+
0
.
9
0
1
7.0+/-0.5
CN1
7.0+/-0.5
(200.0)
1
14
7.3+/-0.5
5
.
0
-/
+
5
.
7
(35.0)
BLOCK DIAGRAM
2
.
0
-/ p
y
t
+5
0
. 8
.
1
D
STIFFENER
0.85+/-0.2
0.8+/-0.1
1.25+/-0.1
0.3+/-0.1
VDD
D0 - D3
LCM
+5V
VSS
V0
VR
VEE
IC1
FRAME
IC2
LOAD
NOTE 1:
Y1
IC5
DISP OFF
Y241Y320
IT IS RECOMMENDED TO ADD FUS
(1 A) TO VDD LINE
NOTE 2: VR = 10 kΩ
X1
IC6
X81
X160
X161
VCFL
VCFL
Y81 Y160
X1
X80
TIMING
CIRCUIT
CP
VDD
VSS
VEE
V0
Y80
-22.0V
IC4
IC7
D3
D2
D1
D0
4.75V
VDD
LCD
320 x 240
SIGNAL
X240
VEE
X240
0~50ms
GND
4.75V
5V
0~50ms
GND
GND
GND
VDD
SIGNAL
VEE
0 min
0 min
DISP OFF
GND
0 min .
0 min
POWER
SUPPLY
CFL
GND
VALID DATA
GND
GND
POWER ON
DISP OFF
POWER OFF
52.1µs < T < 59.5µs
LOAD
tw
CP
X240
D3
tw
tw
tf
X1
Y1
tr
X2
0.8VDD 0.8VDD
Y5
0.8VDD 0.8VDD
0.2VDD
0.2VDD
CP
Y317
D2
Y2
tDSU
Y6
Y318
D1
Y3
D0-D3
Y7
0.8VDD
tHOLD
0.2VDD
tDHD
0.8VDD
0.2VDD
Y319
D0
Y4
Y8
tLSU
tLC
Y320
LOAD
FRAME
0.2VDD
0.8VDD
0.8VDD
tWC
tr
0.2VDD
tf
tSETUP
LOAD
240*T
FRAME
FRAME
D0-D3
X1
X2
X239 X240
0.8VDD
0.8VDD
SP14Q002
320*240 Dots
FEATURES
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
167.0*109*10.0
120*89
320*240
0.345*0.345
0.360*0.360
160
Unit
mm
mm
dots
mm
mm
g
Input Voltage
(High Level)
OPTICAL DATA
Item
Symbol
Contrast Ratio K
Brightness
-
Viewing
Direction
Response
Time (Rise)
tR
Response
Time (Fall)
tF
Condition
Ø=0°,
q=0°,
Note 1
T=25°C,
Note 7
K=2,
Note 1
Ø=0°,
q=0°,
Note 1
Ø=0°,
q=0°,
Note 1
Min
-
-
Typ
20
80.0
Max
-
-
6
Unit
-
cd/m2
o’clock
-
40
-
degree
-
120
-
ms
-
150
-
ms
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Operating
Temperature
Storage
Temperature
Symbol
VDD VSS
VDD VEE
VI
TOP
Condition Min
0
Max
6
Unit
V
-
0
27.5
V
Note 2
Note 5,6
-0.3
0
0.3+VDD
50
V
°C
TST
Note 5,6
-20
60
°C
Pin No
1-4
5
6
7
8
9
10
11
12
13
14
Symbol
D0 - D3
DISP OFF
FRAME
NC
LOAD
CP
VDD
VSS
VEE
V0
FGND
Level
H/L
H/L
H
H->L
H->L
-
Function
Display data
First Line Marker
Do not connect
Data latch
Data shift
Ground
Power supply for LC drive circuit
Operating voltage for LC driving
Front panel ground
Pin No
1
2
3
4
Symbol
VCFL
NC
NC
VCFL
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
Level
-
Function
No connection
No connection
CFL Ground
Symbol
Condition Min
VDD - VSS 3.0
Typ
5.0
Max
5.25
Unit
V
VEE - VSS -
-20.9
-22.0
-23.1
V
IDD
IEE
VIH
Note 3
Note 3
High
Level,
Note 2
Low Level,
Note 2
-
0.8*
VDD
6
5
-
VDD
mA
mA
V
0
-
V
70
75
0.2*
VDD
80
-
1/240
23.0
-
V
-
22.0
-
V
-
21.0
-
V
VBL
Duty=1/24
0 T=0°,
Ø=10°,
Note 4
Duty=1/24
0 T=25°C,
Ø=10°,
Note 4
Duty=1/24
0 T=40°C,
Ø=10°,
Note 4
T=25°C
-
300
-
Vrms
fBL
T=25°C
30
70
85
kHz
IBL
T=25°C
4
5
6
VS
T=25°C
(1000) -
-
mArm
s
V
TL
T=25°C
15.000 20.000 -
hrs
Min
63
50
50
80
80
100
100
125
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
Input Voltage VIL
(Low Level)
Frame
fFLM
Frequency
Duty Ratio
Recommended VDD -VO
LC Drive
Voltage
Backlight
Lamp Voltage
Backlight
Lamp
Frequency
Backlight
Lamp Current
Lamp Start
Voltage
Backlight
Lamp Lifetime
Hz
Item
Clock frequency
Clock pulse width
Rise, Fall time
Data set up time
Data hold time
LOAD set up time
LOAD -> Clock time
FRAME set up time
FRAME hold time
LOAD pulse width
Symbol
fCP
tw
tr, tf
tDSU
tDHD
tLSU
tLC
tSETUP
tHOLD
twc
Typ
-
Max
6.5
20
-
INVC196
Lamp Connector
JAE IL-G-4S-S3C23
Starter Kit
STARTSP14Q00x
-
Note1:
Note 2:
Note 3:
FRAME=75Hz, D0-D3=0.1.0.1...VDD-VEE=23.7V,T=25°C
Note 4:
Recommended LC driving voltage may fluctuate about +-/1.0V by each
module
Note 5:
Note 6:
Note 7:
Measurement after 10 minutes of CFL operating. Brightness control at100
%
167.0+/-0.5
160.0+/-0.5
152.0+/-0.3
4.0+/-0.3
(25.0)
(200.0)
(122.0)
1.0max.
(2.4075)
CONTACT
SI
4-¿3.5+/-0.3
120.0min
0.36*319+0.345=115.185
)
5
7
0
3
.1
(
7.3+/-0.5
7.0+/-0.5
.x
a)
m5
5
. .(8
1
3
.
-0
/+
0
.4
)0
.5
3
(
7.0+/-0.5
5
8
.3
6
8
=
5
4
.3
0
+
9
1
3
*6
3
.0
in
)
m0
.
.0 2
9 (9
8
.3
-0
/
+
.0
1
0
1
.5
-0
/
+
.0
9
0
1
7.0+/-0.5
CN1
7.0+/-0.5
(200.0)
1
14
7.3+/-0.5
5
.
0
-/
+
5
.
7
(35.0)
BLOCK DIAGRAM
2
.
0
-/
+
0
.
1
p
ty
5
.8
D
STIFFENER
0.85+/-0.2
0.8+/-0.1
1.25+/-0.1
0.3+/-0.1
VDD
D0 - D3
+5V
LCM
VSS
V0
VR
VEE
FRAME
IC1
LOAD
Y1
IC5
DISP OFF
X1
X80
IC6
X81
X160
VCFL
VCFL
IC7
Y81 Y160
NOTE 1:
Y241Y32
-22.0V
IT IS RECOMMENDED TO ADD FUSE
(1 A) TO VDD LINE
NOTE 2: VR = 10 kW
D3
D2
D1
D0
4.75V
LCD
320 x 240 DOTS
VDD
X240
X161
VDD
VSS
VEE
V0
Y80
IC4
X1
TIMING
CIRCUIT
CP
IC2
SIGNAL
X240
POWER
SUPPLY
VEE
0~50ms
GND
4.75V
5V
0~50ms
GND
VALID DATA
GND
0 min
GND
0 min .
GND
GND
0 min
VDD
SIGNAL
VEE
0 min
CFL
DISP OFF
GND
GND
POWER ON
DISP OFF
POWER OFF
52.1µs <= T <= 59.5µs
LOAD
tw
tw
tw
CP
X240
X1
D3
Y1
Y5
D2
Y2
Y6
D1
Y3
Y7
D0
Y4
Y8
tr
tf
X2
0.8VDD 0.8VDD
Y317
0.8VDD 0.8VDD
0.2VDD
0.2VDD
0.2VDD
CP
tDSU
tDHD
Y318
D0-D3
Y319
0.8VDD
0.2VDD
0.8VDD
0.2VDD
Y320
FRAME
tLSU
LOAD
0.2VDD
0.8VDD
tLC
0.8VDD
tWC
tf
LOAD
240*T
0.8VDD
FRAME
8
tr
tHOLD
tSETUP
FRAME
D0-D3
X1 X2
X239 X240
0.2VDD
0.8VDD
LMG7520RPFC
320*240 Dots
FEATURES
• Improved Contrast through
Smaller Dot Gap and New LC Material
• Wide Viewing Angle
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
129.6*92.6*7.5
100*75.5
320*240
0.285*0.285
0.3*0.3
110
Unit
mm
mm
dots
mm
mm
g
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
Input Voltage
(High Level)
OPTICAL DATA
Item
Symbol
Contrast Ratio K
Brightness
-
Viewing
Direction
Response
tR
Time (Rise)
Response
tF
Time (Fall)
Condition
Ø=10°,
q=0°
Note 1
T=25°C,
IL=5mA,
Note 7
K>2
Ø=10°,
q=0°
Ø=10°,
q=0°
Min
-
Typ
20
Max
-
Unit
-
80.0
100.0
-
cd/m2
6
40
160
-
degree
ms
-
110
-
ms
Typ
5.0
Max
5.25
Unit
V
VEE - VSS -
-
-22.0
-
V
IDD
IEE
VIH
0.8*
VDD
8.0
6.0
-
VDD
mA
mA
V
0
-
V
70
-
0.2*
VDD
140
Hz
-
1/240
24.1
-
V
-
23.0
-
V
-
21.6
-
V
-
300
-
Vrms
Input Voltage VIL
(Low Level)
Frame
fFLM
Frequency
Duty Ratio
Recommended VDD -VO
LC Drive
Voltage
o’clock
-
Symbol
Condition Min
VDD - VSS 3.0
VBL
Duty=1/24
0 T=0°,
Ø=10°,
Note 4
Duty=1/24
0 T=25°C,
Ø=10°,
Note 4
Duty=1/24
0 T=40°C,
Ø=10°,
Note 4
T=25°C
fBL
T=25°C
30
70
85
kHz
IBL
T=25°C
4
5
6
VS
T=25°C,
Note 9
T=25°C
(1000) -
-
mArm
s
V
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Operating
Temperature
Storage
Temperature
Symbol
VDD VSS
VDD VEE
VI
TOP
Condition Min
0
Max
6.5
Unit
V
-
0
27.5
V
Note 2
Note 5,6
-0.3
0
0.3+VDD
40
V
°C
TST
Note 5,6
-20
60
°C
Backlight
Lamp Voltage
Backlight
Lamp
Frequency
Backlight
Lamp Current
Lamp Start
Voltage
Backlight
Lamp Lifetime
Pin No
1
2
3
4
5
6
7-10
11
12
Symbol
FRAME
LOAD
CP
VDD
VSS
VEE
D0-D3
Not DISP OFF
NC
Level
H
H->L
H->L
H/L
H/L
-
Function
First Line Marker
Data latch
Data shift
Ground
Power supply for LC
Display data
No connection
Symbol
HV
NC
NC
GND
Level
-
Function
No connection
No connection
CFL Ground
Note1:
Note 2:
Note 3:
Note 4:
module
Note 5:
, Note 6:
TL
15.000 20.000 -
hrs
Min
63
50
50
80
80
100
100
125
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
Item
Clock frequency
Clock pulse width
Rise, Fall time
Data set up time
Data hold time
LOAD set up time
LOAD -> Clock time
FRAME set up time
FRAME hold time
LOAD pulse width
Pin No
1
2
3
4
Note 3
Note 3
High
Level,
Note 2
Low Level,
Note 2
Note 8
Symbol
fCP
tW
tr, tf
tDSU
tDHD
tLSU
tLC
tsetup
thold
twc
Typ
-
Max
6.5
20
-
INVC473
Data Connector
MOLEX 52103-1217
Lamp Connector
MITSUMI M63M83-04
Starter Kit
START752x
MOLEX 510-1500
M61M73-04, M60-04-30-114P or
M60-04-30-134P
Note 7:
Measurement after 10 minutes of CFL operation. Brightness control at
100%
Note 8:
frame frequencies.
Note 9:
.
129.6±0.5
104.0±0.3
100.0min
320x0.3-0.015=95.985±0.1
2.8±0.3
4.8±0.3
(6.815)
(14.065)
12.3±0.3
(14.8)
10.3±0.3
(30.0)
4-R1.5
(73.8)
0.015
0.285 0.015
0.285
1
320x240
12
(4.0)
IF1
240x0.3-0.015=71.985±0.1
75.5min
(73.8)
79.5±0.3
92.6±0.5
(50.1)
(14.8)
CN1
7.5 max.
(2.2)
(4.0)
(138.6)
(142.6)
BLOCK DIAGRAM
FUSE
VDD
+5V,+3.3V
D0 - D3
LCM
VSS
Tr
VEE
FRAME
IC1
TIMING
CIRCUIT
D1
C1 : 3.3mF
C2 : 3.3mF
Y320
D2
Y241
IC6
X81
X160
X1
D3
4.75V
X161
IC7
GND
VALID DATA
GND
GND
0 min
GND
X240
GND
GND
POWER ON
CFL
POWER OFF
29.8µs < =T <= 59.5µs
LOAD
tw
CP
D3
tw
tw
tf
X240
X1
Y1
CP
Y317
D2
Y2
Y6
D1
Y3
Y7
D0
Y4
Y8
tr
X2
Y5
0.8VDD
0.8VDD
0.2VDD
tDSU
tDHD
0.8VDD
0.2VDD
0.8VDD
0.2VDD
0.8VDD
0.2VDD
Y318
D0~D3
Y319
tLSU
tLC
Y320
1.4µs min.
LOAD
FRAME
0.2VDD
0.8VDD
twc
0.8VDD
tf
tHOLD
240*T
FRAME
FRAME
D0-D3
0.2VDD
tr
tSETUP
LOAD
X1
X2
X239 X240
SIGNAL
VEE
0 min
0 min
DISP OFF
VDD
0 min .
GND
X240
POWER
SUPPLY
VCFL
VCFL
0-50ms
GND
SIGNAL
LCD
320 x 240 DOTS
4.75V
5V
0-50ms
VDD
D0
VEE
VDD
VSS
VEE
V0
C2
-22.0V,-23.7V
IC4
Y160
X1
X80
Y81
CP
IC5
Y80
DISP OFF
IC2
Y1
LOAD
C1
0.8VDD
0.8VDD
0.8VDD
DISP OFF
LMG7525RPFF
320*240 Dots
FEATURES
• Black on White FSTN Type
• Low Power Consumption
• Transflective Mode
• High Contrast
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
129.6*92.6*7.5
100*75.5
320*240
0.285*0.285
0.3*0.3
110
Unit
mm
mm
dots
mm
mm
g
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
Input Voltage
(High Level)
OPTICAL DATA
Item
Symbol
Contrast Ratio K
Brightness
-
Viewing
Direction
Response
tR
Time (Rise)
Response
tF
Time (Fall)
Condition
Ø=10°,
q=0°
Note 1
T=25°C,
IL=5mA,
Note 7
-
Min
-
Typ
5
Max
-
Unit
-
15
25
-
cd/m2
6
K>2
Ø=10°,
q=0°,25°C
Ø=10°,
q=0°,25°C
-
degree
ms
350
-
ms
Typ
5.0
Max
5.25
Unit
V
VEE - VSS -
-
-22.0
-
V
IDD
IEE
VIH
0.8*
VDD
8.0
6.0
-
VDD
mA
mA
V
0
-
V
70
-
0.2*
VDD
140
Hz
-
1/240
24.8
-
V
-
23.8
-
V
-
23.0
-
V
-
300
-
Vrms
Input Voltage VIL
(Low Level)
Frame
fFLM
Frequency
Duty Ratio
Recommended VDD -VO
LC Drive
Voltage
o’clock
40
250
Symbol
Condition Min
VDD - VSS 3.0
VBL
Duty=1/24
0 T=0°,
Ø=10°,
Note 4
Duty=1/24
0 T=25°C,
Ø=10°,
Note 4
Duty=1/24
0 T=40°C,
Ø=10°,
Note 4
T=25°C
fBL
T=25°C
30
70
85
kHz
IBL
T=25°C
4
5
6
mA
VS
T=25°C,
Note 9
T=25°C
(1000) -
-
V
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Operating
Temperature
Storage
Temperature
Symbol
VDD VSS
VDD VEE
VI
TOP
Condition Min
0
Max
6.5
Unit
V
-
0
27.5
V
Note 2
Note 5,6
-0.3
0
0.3+VDD
40
V
°C
TST
Note 5,6
-20
60
°C
Backlight
Lamp Voltage
Backlight
Lamp
Frequency
Backlight
Lamp Current
Lamp Start
Voltage
Backlight
Lamp Lifetime
Pin No
1
2
3
4
5
6
7-10
11
12
Symbol
FRAME
LOAD
CP
VDD
VSS
VEE
D0-D3
Not DISP OFF
NC
Level
H
H->L
H->L
H/L
H/L
-
Function
First Line Marker
Data latch
Data shift
GND
Power supply for LC
Display data
No connection
Symbol
HV
NC
NC
GND
Level
-
Function
No connection
No connection
CFL Ground
Note1:
Note 2:
Note 3:
Note 4:
module
Note 5:
, Note 6:
TL
15.000 20.000 -
hrs
Min
63
50
50
80
80
100
100
125
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
Item
Clock frequency
Clock pulse width
Rise, Fall time
Data set up time
Data hold time
LOAD set up time
LOAD -> Clock time
FRAME set up time
FRAME hold time
LOAD pulse width
Pin No
1
2
3
4
Note 3
Note 3
High
Level,
Note 2
Low Level,
Note 2
Note 8
Symbol
fCP
tW
tr, tf
tDSU
tDHD
tLSU
tLC
tsetup
thold
twc
Typ
-
Max
6.5
20
-
INVC473
Data Connector
MOLEX 52103-1217
Lamp Connector
MITSUMI M63M83-04
Note 7:
Starter Kit
START752x
MOLEX 510-1500
M61M73-04, M60-04-30-114P or
M60-04-30-134P
Measurement after 10 minutes of CFL operation. Brightness control at 100%
Note 8:
frame frequencies.
Note 9:
.
129.6±0.5
104.0±0.3
100.0min
320x0.3+0.015=95.85±0.1
(30.0)
14.065±0.3
(12.3)
(14.8)
10.3±0.3
2.8
4.8
6.815±0.3
4-R1.5
0.285
0.015
0.285
(73.8)
0.015
1
240x0.3+0.015=71.985±0.1
75.5min
(73.8)
79.5±0.3
92.6±0.5
(50.1)
(14.8)
CN1
(4.0)
12
(2.2)
7.5 max.
(4.0)
(138.6)
(142.6)
BLOCK DIAGRAM
FUSE
VDD
+5V,+3.3V
D0 - D3
LCM
VSS
Tr
VEE
FRAME
IC1
TIMING
CIRCUIT
D1
C1 : 3.3mF
C2 : 3.3mF
Y320
D2
Y241
IC6
X81
X160
X1
D3
4.75V
X161
IC7
GND
VALID DATA
GND
GND
0 min
GND
X240
GND
GND
POWER ON
CFL
POWER OFF
29.8µs<=T<=59.5µs
LOAD
tw
X240
D3
tw
X1
Y1
X2
CP
0.8VDD
Y317
Y2
Y6
D1
Y3
Y7
Y318
0.8VDD
0.2VDD
tDSU
tDHD
D0~D3
0.8VDD
0.2VDD
0.8VDD
0.2VDD
Y319
Y4
tr
0.8VDD
0.2VDD
Y5
D2
D0
tw
tf
CP
tLSU
Y8
tLC
Y320
LOAD
1.4ms min.
FRAME
0.2VDD
0.8VDD
twc
0.8VDD
tf
tHOLD
240xT
FRAME
FRAME
D0-D3
0.2VDD
tr
tSETUP
LOAD
X1
X2
X239
X240
SIGNAL
VEE
0 min
0 min
DISP OFF
VDD
0 min .
GND
X240
POWER
SUPPLY
VCFL
VCFL
0-50ms
GND
SIGNAL
LCD
320 x 240 DOTS
4.75V
5V
0-50ms
VDD
D0
VEE
VDD
VSS
VEE
V0
C2
-22.0V,-23.7V
IC4
Y160
X1
X80
Y81
CP
IC5
Y80
DISP OFF
IC2
Y1
LOAD
C1
0.8VDD
0.8VDD
0.8VDD
DISP OFF
SR16H005-R
640*240 Dots
FEATURES
• Low Power Consumption
• Reflective Mode
• High Contrast EX STN Technology
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
176.9*75.2*7.8
155.6*59.6
640*240
0.225*0.225
0.24*0.24
tbd
Unit
mm
mm
dots
mm
mm
g
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
Input Voltage
(High Level)
OPTICAL DATA
Item
Symbol
Contrast Ratio K
Viewing
Direction
Response
Time (Rise)
Response
Time (Fall)
tR
tF
Condition Min
Ø=0°,
q=0°
6
Typ
10
Max
-
Unit
-
K>2,
Note 1
Ø=0°,
q=0°
Ø=0°,
q=0°
-
40
-
degree
-
250
-
ms
-
350
-
ms
o’clock
Symbol
VDD VSS
VDD VEE
VI
TOP
Condition Min
-0.3
Max
7.0
Unit
V
-
0
27.5
V
Note 2
Note 5,6
-0.3
0
0.3+VDD
40
V
°C
TST
Note 5,6
-20
60
°C
6
7-10
11
12
13
14
Symbol
CP
VDD
LOAD
DISP OFF
GND
Level
H->L
H/L
H/L
-
NC
D0-D3
VSS
FRAME
VEE
NC
H/L
H/L
H
-
Function
Data Shift Clock
Power Supply for Logic
Latch Clock
Control Display Off
Shield GND
(Isolated from Logic Ground)
No Connection
Display Data
Logic GND
Frame Clock
Power Supply for LCD
No Connection
Note1:
Note 2:
Note 3:
Note 4:
module
Max
3.6
Unit
V
VEE - VSS -
-
-20.1
-
V
IDD
IEE
VIH
0.8*
VDD
2.5
1.5
-
VDD
mA
mA
V
0
-
V
70
75
0.2*
VDD
140
Hz
-
1/240
24.5
-
V
-
23.4
-
V
-
22.0
-
V
Min
63
50
50
80
80
100
100
125
Typ
-
Max
4.0
20
-
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 3
Note 3
High
Level,
Note 2
Low Level,
Note 2
Note 8
Item
Clock Frequency
Clock Pulse Width
Clock Rise, Fall Time
Data Set Up Time
Data Hold Time
LOAD Set Up Time
LOAD -> Clock Time
FRAME Set Up Time
FRAME Hold Time
LOAD Pulse Width
Pin No
1
2
3
4
5
Typ
3.3
Input Voltage VIL
(Low Level)
Frame
fFLM
Frequency
Duty Ratio
Recommended VDD -VEE Duty=1/24
LC Drive
0 T=0°,
Voltage
Ø=0°,
Note 4
Duty=1/24
0 T=25°C,
Ø=0°,
Note 4
Duty=1/24
0 T=40°C,
Ø=0°,
Note 4
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Operating
Temperature
Storage
Temperature
Symbol
Condition Min
VDD - VSS 3.0
Symbol
fCP
tW
tr, tf
tDSU
tDHD
tLSU
tLC
tSETUP
tHOLD
twc
Not required
Data Connector
MOLEX 52745-1490
Starter Kit
TBD
-
Note 5:
Note 6:
Storage at -20°C < 48 hrs at 60°C < 168 hr
Storage at 50°C, 85%RH < 48 hrs
.
160.2 ± 0.3
(2.4)
11.6max.
155.6min.
(1.6)
(12.6)
(8.5)
7.5max.
5.1 ± 0.3
3.0 ± 0.5
173.9 ± 0.5
9.3 ± 0.3
0.24*639+0.225=153.585 ± 0.1
0.225
0.24
1
(20.0)
14
(2.2)
75.2 ± 0.5
0.24*239+0.225=57.585 ± 0.1
59.6min.
64.4 ± 0.3
69.2 ± 0.5
4-(ø2.5)
0.24
0.225
(6.0)
(1.75)
176.9 ± 0.5
1.5 ± 0.5
CN1
(2.8)
7.8max.
(38.15)
PARTS
BLOCK DIAGRAM
VDD
+3.3V
VEE
VSS
VDD
POWER
LCM
SUPPLY
IC9
CP
IC10
DISP . OFF
X1
X80
X81
X160
-17V ~ 2 2 V
X1
VEE
D3 D2 D1 D0
640*240 DOTS
X161
IC11
GND
X240
IC2
Y640
Y160
IC1
FRAME
Y561
Y81
Y1
Y80
TIMING
LOAD
0.8VDD
0.8VDD
VDD
IC8
GND
0~50ms
SIGNAL
GND
0 min
0~50ms
GND
VDD
D 0~ D 3
VEE
VALID DATA
SIGNAL
GND
0 min
GND
GND
0 min
0 min
DISP OFF
GND
DISP OFF
GND
29.8 µ s<=T<=59.5 µ s
tw
tw
tw
tf
LOAD
tr
T/160
0.8VDD 0.8VDD
0 . 8 V D D0 . 8 V D D
CP
CP
X240
D3
0.2VDD
0.2VDD
X2
X1
tDHD
tDSU
Y1 Y5
Y637
D2
Y2 Y6
D1
Y3 Y7
D0
Y4 Y8
Y638
D0~D3
0.8VDD
0.8VDD
0.2VDD
0.2VDD
Y639
tLC
tLSU
Y640
LOAD
M
0.2VDD
0 . 8 V D D0 . 8 V D D
twc
0.2VDD
tr
tf
tHOLD
tSETUP
LOAD
240*T
Y0
YD
VEE
0.8VDD 0.8VDD
VGA RESOLUTION DISPLAYS OVERVIEW
ITEM
SP19V001
Display Type
LMG5278XUFC00T
LMG7550XUFC
Black and White Film STN Transmissive
Resolution
-
640 x 480
Size
UNIT
dots
7.5
9.4
10.4
Dot Size
0.214 x 0.214
0.27 x 0.27
0.3 x 0.3
mm
Dot Pitch
0.237 x 0.237
0.3 x 0.3
0.33 x 0.33
mm
External Dimensions
197 x 145 x 8.5
258 x 174 x 6.7
274 x 183 x 9
mm
Active Display Area
115.74 x 153.7
196 x 148
215.2 x 162.4
mm
Backlight
Backlight Lifetime
Brightness
70
Duty Ratio
inch
CFL (1Tube)
-
typ.10.000
hrs
60
100
cd/m
1:480 (Single Scan)
1:240 (Dual Scan)
-
Contrast
15:1
18 : 1
-
270
160
ms
110
ms
Operating Voltage
3.3
3.3/5
3.3/5
V
Power Consumption
1.7
1.8
2
W
+5 - +50
Storage Temperature
0 - +50
-20 - + 60
2
°C
°C
Features
All VGA displays employ film compensated STN technology with the newest high contrast LC materials, thus
offering the following feature:
•
High Contrast Ratio of up to 18 : 1
•
High Brightness up to 100 cd/sqm
•
Wide Viewing Angle
•
Fast Response Time of 270 ms (Rise and Fall Time)
VGA DISPLAYS
LMG5278XUFC-00T (9.4”)
LMG7550XUFC (10.4”)
SP19V001
640*480 Dots
FEATURES
• High Performance Multi Line Addressing
• Compact and Lightweight Design
• Low Cost Single Scan Structure
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
197 x 145 x 0.5
153.7 x 115.74
640 x 480
0.217 x 0.217
0.237 x 0.237
-
Unit
mm
mm
dots
mm
mm
g
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
Symbol
Condition Min
VDD - VSS T=25°C
2.7/
4.75
VEE - VSS T=25°C
-
Typ
Max
3.3/5.0 3.45/
5.25
40
Unit
V
IDD
-
(16)
(25)
mA
-
(30)
(50)
mA
0.8*
VDD
-
VDD
V
0
-
V
70
120
0.2*
VDD
140
Hz
-
1/480
(37)
-
V
-
(36)
-
V
-
(35)
-
V
-
450
-
Vrms
IEE
OPTICAL DATA
Item
Symbol
Contrast Ratio K
Brightness
-
Viewing
Direction
Response
Time (Rise)
tR
Response
Time (Fall)
tF
Condition
Ø=0°,
q=0°,
Note 1
T=25°C,
Note 9
K=2,
Note 1
Ø=0°,
q=0°,
Note 1
Ø=0°,
q=0°,
Note 1
Min
15
Typ
-
Max
-
Unit
-
65
-
-
cd/m2
6
o’clock
-
40
-
degree
-
160
-
ms
-
110
-
ms
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Input Current
Operating
Temperature
Storage
Temperature
Symbol
VDD VSS
VEE VSS
VI
II
TOP
TST
Condition Min
0
Max
7.0
Unit
V
-
0
42.0
V
Note 2
Note 5,6
-0.3
0
5
0.3+VDD
1
50
V
A
°C
Note 7
-20
+60
°C
Pin No
1
2
4
5
6
7
8-11
12-15
Symbol
FRAME
LOAD
CP
Not DISP OFF
VDD
VSS
VEE
UD0 - UD3
LD0 - LD3
Level
H
H->L
H->L
H/L
H/L
H/L
Function
First Line Marker
Data Latch
Data Shift
Ground
Power Supply for LC
Display Data (Upper Half)
Display Data (Lower Half)
Pin No
1
2
3
4
Symbol
GND
NC
NC
HV
Level
-
Function
CFL Ground
No connection
No connection
Note1:
Note 2:
Applied to NotDISP.OFF, FRAME, LOAD, CP, UD0-UD3, LD0-LD3
Note 3:
Note 4:
module
Note 5:
A higher starting voltage will be needed for CFL at 0°C. Lifetime of CFL is
reduced at 0°C.
Input Voltage
(High Level)
VIH
Input Voltage VIL
(Low Level)
Frame
fFLM
Frequency
Duty Ratio
Recommended VEE -VSS
LC Drive
Voltage
Backlight
Lamp Voltage
Backlight
Lamp
Frequency
Backlight
Lamp Current
Lamp Start
Voltage
Note 3,
3.3V
Note 3,
3.3V
High
Level,
Note 2
Low Level,
Note 2
Note 8
V
VBL
Duty=1/24
2 T=5°C,
Note 4
Duty=1/24
2 T=25°C,
Note 4
Duty=1/24
2 T=40°C,
Note 4
T=25°C
fBL
T=25°C
60
70
85
kHz
IBL
T=25°C
3.5
4.0
5.0
VS
T=5°C,
Note 10
1400
-
-
mArm
s
Vrms
Symbol
fCP
tW
tr, tf
tDSU
tDHD
tLSU
tLC
Min
37
35
35
100
100
Typ
-
Max
10.0
50
-
Unit
MHz
ns
ns
ns
ns
ns
ns
tLC
100
-
-
ns
tsetup
thold
tWC
100
30
50
-
-
ns
ns
ns
Item
Clock frequency
Clock pulse width
Rise, Fall time
Data set up time
Data hold time
LOAD set up time
LOAD->Clock time,
3.3V
LOAD->Clock time,
5.0V
FRAME set up time
FRAME hold time
LOAD pulse width
HITACHI INVC445, INVC473
Data Connector
FPC (pitch 1,0 mm)
Lamp Connector
MITSUMI M63M83-04
Starter Kit
JAE IL-402-22S-SIL-SA
M61M73-04 , M60-04-30-114P or
M60-04-30-134P
Note 5:
Note 7:
Note 8:
Frame Frequency in your set
Note 9:
Measurement after 10 minutes of CFL operating. Brightness control at
100%
Note 10:
8.5 max.
(2.5)
CONNECTIVE SIDE
(2.5)
CFL I / F :
MITSUMI/M63-M83-04
3.0+/-0.3
(20.0)
(22.4)
(23.42)
(16.63)
(15.63)
14.5+/-0.3
4.5+/-0.3
197.0+/-0.5
191.0+/-0.5
158.5+/-0.5
(153.7)
0.237*640-0.02=151.66+/-0.1
(20.0)
8.5 max.
1
4
W I N D O W O F B E Z E L DOTS AREA EFFECTIVE DISPLAY
0.237*480-0.02=113.74+/-0.1
(115.74)
118+/-0.3
136+/-0.5
145+/-0.5
(50.0)
VIEWING DIRECTION
42.0+/-3.0
37.5+/-3.0
1
22
R1.6(2X)+/-0.3
(2.5)
(2.5)
F 3.2(2X)+/-0.3
BLOCK DIAGRAM
FRAME
VDD
+5V 0R+3.3
X1
CL1
IC1
M SIGNAL
X160
VSS
LCM
X1
GENERATION
C1
D7 D6 D5 D4 D3 D2 D1 D0
C2
VR
VLCD
DISP.OFF
+40V
Tr
X161
IC2
CL2
X320
X240
640*480 DOTS
X241
D0~D7
X480
X321
tDLD
tDLD
Y640
Y481
Y480
Y321
Y320
Y161
Y160
Y1
IC3
TS1
VDD
IC4
NOTE
IC5
IC6
IC7
CL1
tCH
tCH
0.8*VDD
0.8*VDD
tDLCf
tDLCr
TS2
VLCD
tDLCs
VDD
VSS
VLCD
POWER SUPPLY
DISP.OFF
VCFL
VCFL
tDLCs
0.8*VDD
0.2*VDD
0.8*VDD
0.2*VDD
tLDH
NOTE : TEMPERATURE SENSORS TDK NTCCS20124CH104KCT
tLDH
tDOf
tDOr
CFL
T
CL1
tW
CL2
X1
D7
Y1
Y9
Y633
D6
Y2
Y10
Y634
tW
CL2
0.8VDD
Y3
Y11
D4
Y4
Y12
tr
0.8VDD
0.8VDD
0.2VDD
tDSU
D5
tW
tf
X2
0.8VDD
0.2VDD
tDHD
Y635
Y636
D0~D7
0.8VDD
0.8VDD
0.2VDD
0.2VDD
X2
X1
tHCL
D3
Y5
Y13
Y637
D2
Y6
Y14
Y638
D1
Y7
Y15
Y639
D0
Y8
Y16
Y640
tLSU
CL1
0.8VDD
0.8VDD
0.2VDD
0.2VDD
tWC
tr
tf
tSETUP
30.0ms min.
tHOLD
30.0ms min.
FRAME
(REDUCT I ON )
FRAME
0.8VDD
0.8VDD
CL1
480*T
0.8VDD
0.2VDD
FRAME
D0~D7
X1
X2
X479 X480
tM
LMG5278XUFC-00T
640*480 Dots
FEATURES
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
257.5*174*7
196*148
640*480
0.27*0.27
0.3*0.3
350
Unit
mm
mm
dots
mm
mm
g
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
Symbol
Condition Min
VDD - VSS T=25°C
3.0
Typ
Max
3.3/5.0 5.25
Unit
V
VEE - VSS T=25°C
-
-22.0
-
V
IDD
-
22/20
32/30
mA
-
20/18
27/25
mA
0.8*
VDD
-
VDD
V
0
-
V
120
130
0.2*
VDD
140
-
1/242
23.9
-
V
-
22.7
-
V
-
21.6
-
V
-
360
-
Vrms
IEE
OPTICAL DATA
Item
Symbol
Contrast Ratio K
Brightness
-
Viewing
Direction
Response
Time (Rise)
tR
Response
Time (Fall)
tF
Condition
Ø=10°,
q=0°,
Note 1
T=25°C,
Note 9
K=2,
Note 1
Ø=10°,
q=0°,
Note 1
Ø=10°,
q=0°,
Note 1
Min
14
Typ
18
Max
-
Unit
-
40.0
60.0
-
cd/m2
12
o’clock
30
40
-
degree
-
160
210
ms
-
110
160
ms
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Operating
Temperature
Storage
Temperature
Symbol
VDD VSS
VDD VEE
VI
TOP
Condition Min
0
Max
6.5
Unit
V
-
0
27.5
V
Note 2
Note 5,6
-0.3
0
0.3+VDD
50
V
°C
TST
Note 7
-20
60
°C
Pin No
1
2
4
5
6
7
8-11
12-15
Symbol
FRAME
LOAD
CP
Not DISP OFF
VDD
VSS
VEE
UD0 - UD3
LD0 - LD3
Level
H
H->L
H->L
H/L
H/L
H/L
Function
First Line Marker
Data Latch
Data Shift
Ground
Power Supply for LC
Display Data (Upper Half)
Display Data (Lower Half)
Pin No
1
2
3
4
Symbol
GND
NC
NC
HV
Level
-
Function
CFL Ground
No connection
No connection
Note1:
Note 2:
Applied to NotDISP OFF, FRAME, LOAD, CP, UD0-UD3, LD0-LD3
Note 3:
Note 4:
module
Note 5:
Operating voltage is increased when CFL is operated at 0°C. Lifetime of
CFL is reduced at 0°C.
Input Voltage
(High Level)
VIH
Input Voltage VIL
(Low Level)
Frame
fFLM
Frequency
Duty Ratio
Recommended VDD -VO
LC Drive
Voltage
Backlight
Lamp Voltage
Backlight
Lamp
Frequency
Backlight
Lamp Current
Lamp Start
Voltage
Note 3,
3.3V/5V
Note 3,
3.3V/5V
High
Level,
Note 2
Low Level,
Note 2
Note 8
Hz
VBL
Duty=1/24
2 T=0°C,
Note 4
Duty=1/24
2 T=25°C,
Note 4
Duty=1/24
2 T=45°C,
Note 4
T=25°C
fBL
T=25°C
30
70
85
kHz
IBL
T=25°C
2.5
5.0
5.5
VS
T=25°C,
Note 10
1000
-
1500
mArm
s
V
Symbol
fCP
tW
tr, tf
tDSU
tDHD
tLSU
tLC
Min
63
50
50
80
120
Typ
-
Max
6.5
20
-
Unit
MHz
ns
ns
ns
ns
ns
ns
tLC
80
-
-
ns
tsetup
thold
tWC
100
100
125
-
-
ns
ns
ns
Item
Clock frequency
Clock pulse width
Rise, Fall time
Data set up time
Data hold time
LOAD set up time
LOAD->Clock time,
3.3V
LOAD->Clock time,
5.0V
FRAME set up time
FRAME hold time
LOAD pulse width
HITACHI INVC378, INVC218
Data Connector
MOLEX 53261-1510
Lamp Connector
MITSUMI M63M83-04
Starter Kit
START5278
51021-1500
M61M73-04 , M60-04-30-114P or
M60-04-30-134P
Note 5:
Note 7:
Note 8:
frame frequencies.
Note 9:
Measurement after 10 minutes of CFL operating. Brightness control at
100%
Note 10:
Starting discharge voltage is increased when CFL is operating at lower
32.0±0.5
3.5±0.3
6-R1.75±0.3
(5.5)
(20.0)
.
5.0±0.5
7.0±0.5
(10.5)
1.5±0.3
13.0max
3.0±0.5
257.5±0.7
238.0±0.5
(201.0)
196.0 min
0.3x639+0.27=191.97±0.1
2.0±0.5
(27.5)
30.0max
1
0.27
0.30
(80)
174.0±/0.5
164.0±0.5
160.0+/0.5
(153.0)
150.0±0.5
148.0min
0.3x479+0.27=143.97±0.1
CN2
GND
(50.0)
0.27
0.30
1 CN1
4
H.V.
∅2.1±0.2
2-∅3.5±0.3
4.5±0.3
3.0±0.5
2.3±0.3
0.5
2-R1.05±0.2
6.5±0.5
3.0±0.3
15
BLOCK DIAGRAM
FUSE
UD0~UD3
VDD
+5V,+3.3V
FRAME
LCM
LOAD
IC17
TIMING
CIRCUIT
X90
X1
IC1
IC2
UD3 UD2 UD1 UD0
X240
X241
IC20
X100
X1
LD3 LD2 LD1
X480
IC21
X100
X11
C1
Tr
-22.0V,-23.7V
C1 : 3.3mF
C2 : 3.3mF
X1
(640 x 480 Dots)
LD0
4.75/3.0V
IC10
Y1280
Y1201
Y721
IC9
LCD Panel
Y800
Y641
Y720
LD0~LD3
C2
Y640
X100
X51
X50
X1
Y561
IC19
Y160
Y81
Y80
Y1
X100
X1
CP
IC8
VEE
IC18
DISP OFF
VSS
IC16
VDD
SIGNAL
VEE
0-50ms
GND
5V/3.3V
GND
20ms min
0 min
DISP OFF
CFL
GND
GND
GND
VDD
SIGNAL
VEE
0 min
GND
GND
POWER ON
VCCFL
VCCFL
GND
.
20ms min
Power
Supply
4.75/3.0V
0-50ms
VALID DATA
DISP OFF
POWER OFF
NOTE: CHANGING FROM 3.3V TO 5V AND BACK
SHOULD BE DONE AFTER POWER OFF
29.5m s < T <34.4m s
tW
tW
0.8VDD 0.8VDD
CP
CP
DUMMY
X1
DATA
UD3
Y1 Y5
UD2
Y2 Y6
UD1
Y3 Y7
X2
tDSU
Y637
UD0 - UD3
Y638
LD0 - LD3
tr
0.8VDD 0.8VDD
0.2VDD
0.2VDD
tDHD
0.8VDD 0.8VDD
0.2VDD 0.2VDD
tLSU
Y638
UD0
DUMMY
tW
tf
LOAD
tLC
Y4 Y8
DATA
X241
Y640
X242
LOAD
LD3
Y641
Y645
Y1277
Y642
Y646
Y1278
Y643
Y647
Y1279
Y 6 4 4Y 6 4 8
1.4m s min
Y1280
0.2VDD
0.8VDD 0.8VDD
tWC
tf
tsetup
0.2VDD
tr
thold
LD2
LD1
LD0
FRAME
(REDUCTION)
LOAD
242 x T
FRAME
UD0 - UD3
X1 X2
LD0 - LD3
X241 X242
0.8VDD 0.8VDD
FRAME
DUMMY DATA
X239 X240
DUMMY DATA
X479 X480
LMG7550XUFC
640*480 Dots
FEATURES
MECHANICAL DATA
Item
Module Dimensions
Viewing Area
Resolution
Dot Size
Dot Pitch
Weight
Value
274*183*9
215.2*162.4
640*480
0.3*0.3
0.33*0.33
450
Unit
mm
mm
dots
mm
mm
g
Input Voltage
(High Level)
OPTICAL DATA
Item
Symbol
Contrast Ratio K
Brightness
-
Viewing
Direction
Response
Time (Rise)
tR
Response
Time (Fall)
tF
Condition
Ø=10°,
q=0°,
Note 1
T=25°C,
IL=5mA,
Note 7
K=2,
Note 1
Ø=10°,
q=0°,
Note 1
Ø=10°,
q=0°,
Note 1
Min
10
80
Typ
18
100
Max
-
-
12
Unit
-
cd/m2
o’clock
30
40
-
degree
-
160
-
ms
-
110
-
ms
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Input Voltage
Operating
Temperature
Storage
Temperature
Symbol
VDD VSS
VDD VEE
VI
TOP
Condition Min
0
Max
6.5
Unit
V
-
0
27.5
V
Note 2
Note 5,6
-0.3
0
0.3+VDD
50
V
°C
TST
Note 5,6
-20
60
°C
Pin No
1
2
3
4
5
6
7
8-11
12-15
Symbol
FRAME
LOAD
CP
Not DISP OFF
VDD
VSS
VEE
UD0 - UD3
LD0 - LD3
Level
H
H->L
H->L
H/L
H/L
H/L
Function
First Line Marker
Data latch
Data shift
GND
Power supply for LC
Display data (upper half)
Display data (lower half)
Pin No
1
2
3
4
Symbol
HV
NC
NC
GND
Item
Supply Voltage
(Logic)
Supply Voltage
(LC Drive)
Supply Current
Level
-
Function
No connection
No connection
CFL Ground
Note1:
Note 2:
Applied to NotDISP.OFF, FRAME, LOAD, CP,LD0-LD3, UD0-UD3
Note 3:
fFRAME=140Hz, UD0-UD3=0.1.0.1...LD0-LD3=1.0.1.0...VDDV0=22.7V,T=25°C
Note 4:
Recommended LCD driving may fluctuate about +/-1.0V by each module
Symbol
Condition Min
VDD - VSS 3.0
Typ
5.0
Max
5.25
Unit
V
VEE - VSS -
-
-
-
V
IDD
IEE
VIH
0.7*
VDD
(25.0) (30.0) mA
(19.0) (30.0) mA
VDD
V
0
-
70
Input Voltage VIL
(Low Level)
Frame
fFLM
Frequency
Duty Ratio
Recommended VDD -VO
LC Drive
Voltage
Backlight
Lamp Voltage
Backlight
Lamp
Frequency
Backlight
Lamp Current
Lamp Start
Voltage
Note 3
Note 3
High
Level,
Note 2
Low Level,
Note 2
Note 8
-
0.3*
VDD
110
V
Hz
-
1/244
(23.9)
-
V
-
(22.7)
-
V
-
(21.6)
-
V
-
(430)
-
Vrms
VBL
Duty=1/24
4 T=0°C,
Note 4
Duty=1/24
4 T=25°C,
Note 4
Duty=1/24
4 T=40°C,
Note 4
T=25°C
fBL
T=25°C
50
-
70
kHz
IBL
T=25°C
4
4.5
6
VS
T=25°C,
Note 9
1000
-
-
mArm
s
V
Symbol
fCP
tW
tr, tf
tDSU
tDHD
tLSU
tLC
Min
63
50
50
80
120
Typ
-
Max
6.5
20
-
Unit
MHz
ns
ns
ns
ns
ns
ns
tLC
80
-
-
ns
tSETUP
tHOLD
tWC
100
100
125
-
-
ns
ns
ns
Item
Clock frequency
Clock pulse width
Rise, Fall time
Data set up time
Data hold time
LOAD set up time
LOAD->Clock time,
3.3V
LOAD->Clock time,
5.0V
FRAME set up time
FRAME hold time
LOAD pulse width
INVC473
Data Connector
MOLEX 53261-1510
Lamp Connector
MITSUMI M63M83-04
Starter Kit
START7550
51021-1500
M61M73-04, M60-04-30-114P or
M60-04-30-134P
Note 5:
Note 6:
Note 7:
Measurement after 10 minutes of CFL operating. Brightness control
at100%
Note 8:
frame frequencies.
Note 9:
264.0
(220.2)
258±0.3
(215.2 min)
211.17±0.1
(13)
7
24.9
8.615
Detail of B
27.41
(2.015)
20.5
3.5
2.0±0.3
50±10
(133)
(10.0)
(2-C1)
(R6.5)
(R3.5)
0.7
C
(2.015)
8.5±0.5
4
1
0.33
0.3
(11.0)
2.0
4.0
4 4
(11)
R1
Detail OF C
(11)
4 4
Detail of A
1
142±0.3
4.5
3.5
2
183.0
(165.77)
(162.4 min)
158.37±0.1
142.0±0.3
(11.5)
(91.5)
640x480
(R7)
(R4)
4±0.5
0.8
0.33
0.3
A
B
(2-C1)
I/F1
15
R1
4.5
3.5
2
4-R1.75
4-R1
(11.5)
(R4)
(R7)
D
(2-C1)
3±0.5
Detail OF D
BLOCK DIAGRAM
FUSE
VDD
UD0~UD3
+5V
FRAME
LOAD
VSS
LCM
IC17
TIMING
CIRCUIT
X90
X1
IC1
Y640
LD0
Y1280
IC10
Y1201
IC9
-22.0V
C1,C2 : 3.3µF (ALUMINIUM ELECTRO
VR : 10 - 20 kΩ
TR : 2SA673APKC (Hfe=100, Ic=500m A
OR EQUIVALENT
LCD Panel
Y721
X100
X11
C2
VR
(640 x 480 Dots)
Y800
IC21
LD3 LD2 LD1
X480
Y641
X100
X1
LD0~LD3
Y720
IC20
Y561
CP
TR
X1
UD3 UD2 UD1 UD0
X240
X241
C1
VEE
IC8
Y160
IC19
X100
X51
X50
X1
Y81
X100
X1
Y80
Y1
DISP OFF
IC18
IC2
FUSE
VDD
SIGNAL
IC16
VEE
4.75V
0-50ms
GND
5V/3.3V
4.75V
0-50ms
GND
VALID DATA
GND
20ms min
GND
0 min .
GND
GND
VCCFL
VCCFL
DISP OFF
CFL
SIGNAL
VEE
0 min
20ms min
Power
Supply
VDD
GND
GND
POWER ON
DISP OFF
POWER OFF
37.6ms < T <59.9ms
tW
LOAD
DUMMY
X1
DATA
UD3
Y1 Y5
UD2
Y2 Y6
UD1
Y3 Y7
0.8VDD 0.8VDD
X2
CP
tDSU
Y637
Y638
UD0 - UD3
Y638
UD0
DUMMY
Y4 Y8
X241
DATA
LD3
Y640
X242
LD0 - LD3
tW
LD1
LD0
tr
0.8VDD 0.8VDD
0.2VDD
0.2VDD
tDHD
0.8VDD 0.8VDD
0.2VDD 0.2VDD
tLSU
Y641
Y645
Y1277
Y642
Y646
Y1278
Y643
Y647
Y1279
Y 6 4 4Y 6 4 8
1.4m s min
Y1280
LD2
LOAD
(REDUCTION)
LOAD
244 x T
FRAME
X1 X2
LD0 - LD3
X241 X242
DUMMY DATA
X239 X240
DUMMY DATA
X479 X480
0.2VDD
tf
tLC
0.8VDD 0.8VDD
tWC
tsetup
0.2VDD
tr
thold
0.8VDD 0.8VDD
FRAME
FRAME
UD0 - UD3
tW
tf
CP
COLD CATHODE FLUORESCENT LAMP BACKLIGHT
Some Hitachi LCD modules have built-in Cold Cathode Fluorescent Lamp (CFL) backlight. This backlight type
offers high brightness, high efficiency combined with low cost and a long lifetime.
Fig.1 shows the typical structure of a CFL backlight. The cold cathode fluorescent tube is placed at the edge of an
acrylic lightguide into which the light is coupled. To increase the coupling efficiency a reflector is wrapped around
the opposite side of the tube. A reflector foil at the bottom of the light guide reflects the light to the top side. In order
to equalize the uneven brightness distribution the bottom of the lightguide is covered with a reflection dot pattern
with the pattern density increasing towards the opposite side of the CFL. The brightness homogenity is then further
increased by a diffusor foil on the top of the light guide.
In some cases additional prisma foils are used to focus the light towards the top side. These foils increase the
brightness while narrowing the spatial brightness distribution.
Prisma Foil
Diffusion Foil
CFL Tube
Light Guide
Ø2 < Ø1
Printed Reflection Pattern
Ø2
Reflector
Prisma Foil
DiffusionFoil
Ø1
Reflection Pattern
Reflection Sheet
Fig. 1
Lifetime and brightness of a CFL depend strongly on the operating conditions. The following gives some typical
values for these dependencies.
100
Life Time [Khrs]
Lifetime versa Lamp Current
The lifetime of a CFL backlight is typically between
10.000 and 20.000 hours depending on the operating
conditions. Main parameters influencing the lifetime
are temperature and lamp current. As shown in Fig. 2
the lifetime reduces with higher current passing
through the CFL tube. It is therefore possible to
increase the lifetime by driving the CFL with a current
lower than specified.
10
1
3
Fig. 2
4
5
6
7
8
Lamp Current [mA]
9
10
CFL BACKLIGHT
Brightness versa Lamp Current
As shown in Fig. 3 the lamp current is also
determining the brightness of the CFL.
Reducing the current from 6 mA to 4 mA will double
the lifetime but at the same time reduce brightness
by around 25 percent.
Another method to increase lifetime without
sacrificing brightness is to dim or switch off the CFL
backlight while the display is not used for some time.
Relative Brightness [%]
100
90
80
70
60
50
40
30
20
3
4
5
6
7
8
Lamp Current [mA]
9
10
Fig. 3
Life Time versa Ambient Temperature
100
Life Time [hrs]
Besides the lamp current the tube lifetime is strongly
depending on the temperature as shown in Fig. 4.
10
Operation at lower temperatures may therefore
significantly reduce the lifetime of the CFL. Especially
frequent switching and longer operation of the CFL at
negative temperatures may cause a lifetime
reduction to several hundred hours.
1
0,1
-10
The CFL tube should therefore not be switched at
negative ambient temperatures.
0
10
20
Temperature [°C]
30
50
Fig. 4
1000
900
Another effect which does influene the characteristics
of the CFL at lower temperatures is the temperature
dependancy of the ignition voltage (Fig. 5) As a result
of the increased ignition voltage the CFL may not be
switched on at negative temperatures.
Ignition Voltage [V]
Ignition Voltage versa Lamp Length
800
700
0°C
600
25°C
500
400
300
200
50 75 100 125 150 175 200 225 250 275 300
Lamp Length [mm]
Fig. 5
CFL INVERTER
INVERTERS FOR COLD CATHODE FLUORESCENT LAMP
An effective backlighting system depends not only on the choice of the CFL tube but also on the DC/AC inverter
which provides high voltage necessary for ignition and operation of the CFL tube. To this end Hitachi has designed
a range of inverters which are adjusted ideally to the CFL tubes used in its LCD modules.
INVERTER AVAILABILITY
CFL inverters from Hitachi are available for the following LCD modules :
Inverter Part
Number
Suitable Displays
Display Part
Name
Suitable Inverter
INVC132
SP14Q00x
LMG527x
INVC378
INVC186
SP14Q00x
LMG7380QHPC
INVC191
LMG532x, LMG74xx,
LMG7380QHFC
LMG74xx
LMG7520RPFC
INVC196
SP14Q00x
LMG7550XUFC
INVC378
LMG527x
SP10Q002
INVC445, INVC473
INVC444
LMG7550XUFC, LMG7520RPFC
SP14Q00x
INVC445
LMG7550XUFC, LMG7520RPFC,
SP10Q002, SP19V001, LMG74xx,
LMG7380QHFC
SP19V001
INVC445, INVC473
INVC473
LMG7550XUFC, LMG7520RPFC,
SP10Q002, SP19V001, LMG74xx,
LMG7380QHFC
PRECAUTIONS FOR USE
Inverters from other manufacturers may be suitable as well. However, when choosing an inverter the following
points should be observed to ensure that the full lifetime will be achieved.
The lamp current should not exceed the value given in the Hitachi specification. Driving the CFL with higher current
will reduce the lifetime. Also the lamp frequency should be within the specified margins. Too low frequency will
result in reduced inverter efficiency. The ignition voltage should not stay below the specified value. Besides
possible lifetime reduction, low ignition voltage will cause problems when switching on the CFL at lower
temperatures.
Losses on the output leads due to stray capacities may significantly reduce the inverter efficiency. The following
recommendations should be observed in order to obtain maximum lamp brightness. Use UL1330 equivalent for the
inverter output leads. Keep the length of output leads under 100 mm. Avoid binding high voltage and low voltage
leads together. Avoid placing leads near the shield or any large grounded area.
INVERTER RELIABILITY DATA
The following general test conditions apply to all Hitachi inverters.
Item
Test Conditions
Low Temperature Operation
10°C, 12V, 100% Output, 500 hrs
High Temperature Operation
50°C, 12V, 100% Output, 500 hrs
Low Temperature Stock
High Temperature Stock
High Temperature/High Humidity
Cyclic Temperature Operation
-20°C, 500 hrs
70°C, 500 hrs
50°C, 95% RH, 12V, 100% Output, 50 cycles
10°C to 25°C to 50°C, 1 hr each, 12 V, 100% Output, 50 cycles
Thermal Shock
-20°C to +70°C, 0.5 hrs each, 50 cycles
Vibration Test
3G, 30-200 Hz, 0.5 hrs, XYZ axis
Impact Test
50G, XYZ axis
INVC132
This Inverter is designed and adjusted for cold fluorescent lamps used in the LMG691x and SP14Q00x series of
STN liquid crystal display modules.
FEATURES
• Very small and low power consumption design
• External On/Off switching of backlight
• Dimmable from 100 down to 60 percent with variable resistor
• Low noise
GENERAL DATA
INPUT AND OUTPUT CONNECTORS
Item
Module Dimensions
Weight
Output Power
Efficiency
Mean Time Between Failure
(MTBF)
Value
103 x 20
15.0 max
1.3 nominal
50 min
60.000min
Unit
mm
g
W
%
hrs
Input Connector
JST S5B-PH-K-S
Output Connector
JAE IL-G-4P-S3L2E
INPUT CONNECTOR PIN ASSIGNMENT
Item
Input Voltage
Operating
Temperature
Storage
Temperature
Humidity
Symbol
VMAX
TOP
Condition
-
Min
7.0
10
Max
18.0
50
Unit
V
°C
TST
-
-20
70
°C
-
-
-
90
% RH
Item
Input Voltage
Input Current
Rush Current
Lamp Current
Lamp Power
Frequency
Dimming
Range
Startup
Characteristics
Symbol
VIN
IIN
Condition
12V,
T=25°C
IS
12V,
T=25°C
IL
12V,
T=25°C
PL
12V,
T=25°C
fL
12V,
T=25°C
12V,
T=25°C
10°C +/- 1°C, DC 8.0V
Min
8.0
0.15
Typ
12.0
0.20
Max
17.0
0.35
Unit
V
A
-
-
1.0
A
4.0
5.0
5.5
mA
-
1.25
-
W
60
70
80
kHz
-
65
-
%
10
3.5
OUT PUT CONNECTOR
130+/-0.5
90+/-0.5
3
1
13
4
1
MAX10
1
2.5
2-Ø 2.8
3.5
5
20+/-0.5
INPUT CONNECTOR
Input Housing Connector
PHR-5
Output Housing Connector
IL-G-4S-S3C2
Pin No
1
2
3
4
Symbol
GND
VCC
ON/OFF
BR1
5
BR2
Comment
Low for ON, open for OFF
Dimming
through
variable
resistor
2.5kOhm
Brightness max at 0 kOhm, min at 2.5
kOhm
OUTPUT CONNECTOR PIN ASSIGNMENT
Pin No
1
2
3
4
Symbol
CFLGND
NC
NC
CFL HV
Comment
Ground
High voltage output
INVC186 (Low cost version of INVC132)
This Inverter is designed and adjusted for cold fluorescent lamp used in the LMG691x STN liquid crystal display
modules.
FEATURES
• Low cost
• 12 V input voltage
• Low noise
GENERAL DATA
Item
Module Dimensions
Weight
Output Power
Efficiency
(MTBF)
Value
90x20x12.5
13.5 max
1.4 nominal
65 min
60.000 min
Unit
mm
g
W
%
hrs
Item
Input Voltage
Operating
Temperature
Storage
Temperature
Humidity
Symbol
VMAX
TOP
Condition Min
5
Max
14.5.0
50
Unit
V
°C
TST
-
-20
70
°C
-
-
-
90
% RH
Item
Input Voltage
Input Current
Symbol
VIN
IIN
Rush Current
Lamp Current
Lamp Power
Frequency
Startup
Characteristics
Condition
12V,
T=25°C
IS
12V,
T=25°C
IL
12V,
T=25°C
PL
12V,
T=25°C
fL
12V,
T=25°C
5°C +/- 1°C, DC 10.8.V
Min
10.8
0.11
Typ
12.0
0.16
Max
13.2
0.21
Unit
V
A
-
-
1.0
A
4.0
5.0
6.0
mA
-
1.4
-
W
65
75
85
kHz
90
70
10
10
6.5
3.5
4
20
1
1
10
OUTPUT CONNECTOR
8.4
INPUT CONNECTOR
2-Ø 2.8
1.6
2.5
6.5
1.0
3.5
3
Input Connector
JST S3B-PH-K-S
Output Connector
JAE IL-G-4P-S3L2E
PHR-3
IL-G-4S
Pin No
1
2
3
Symbol
CFL ON/OFF
GND
Vin
Comment
On at 0V , Off at 12V or open
12V +/- 10°C
Pin No
1
2
3
4
Symbol
CFL HV
NC
GND
CFL GND
Comment
High voltage output
Ground
INVC191
This Inverter is designed and adjusted for cold fluorescent lamp used in the LMG5320XUFC, LMG74xx, LMG7380
FEATURES
• Very small, very thin and low power consumption design
• Adaptable to a wide range of input voltages
• Dimmable from 100 down to 50 percent with a variable resistor
• Low noise
GENERAL DATA
Item
Module Dimensions
Weight
Output Power
Efficiency
(MTBF)
Value
95 x 15
11.0 max
1.35 nominal
60 min
60.000 min
Unit
mm
g
W
%
hrs
Item
Input Voltage
Operating
Temperature
Storage
Temperature
Humidity
Symbol
VMAX
TOP
Condition Min
5
Max
18.0
50
Unit
V
°C
TST
-
-20
70
°C
-
-
-
90
% RH
Item
Input Voltage
Input Current
Symbol
VIN
IIN
Rush Current
Lamp Current
Lamp Power
Frequency
Dimming
Range
Startup
Characteristics
Condition
12V,
T=25°C
IS
12V,
T=25°C
IL
12V,
T=25°C
PL
12V,
T=25°C
fL
12V,
T=25°C
12V,
T=25°C
10°C +/- 1°C, DC 7.0V
Min
7.0
0.13
Typ
12.0
0.18
Max
17.0
0.23
Unit
V
A
-
-
1.0
A
3.5
4.2
4.9
mA
-
1.35
-
W
50
65
80
kHz
-
100-50 -
%
OUTPUT CONNECTOR
95+/-0.5
2.5
4
1
1
11
2-Ø 1.7+/-0.1
1.0
INPUT CONNECTOR
2.5+/-0.3
5
10
2.5
6.5+/-0.5
10+/-0.3
78+/-0.3
7.5+/-0.5
MAX6.0
15.0+/-0.5
6.0+/-0.3
20
Input Connector
MOLEX 53261-0510
Output Connector
MITSUMI M60-04-30-134P
51021-0500
M60-04
Pin No
1
2
3
4
5
Symbol
VCC
GND
CFL ON/OFF
BR1
BR2
Comment
7 - 17V
OFF at Open, ON at Low (V=0.8V,I=2mA)
Dimming through variable resistor 5kOhm
kOhm
Pin No
1
2
3
4
Symbol
CFL HV
NC
NC
CFL HV
Comment
High voltage output
High voltage output
This Inverter is designed and adjusted for cold fluorescent lamp used in the SP14Q00x STN liquid crystal display
modules.
FEATURES
• Low cost
• 5V input voltage
• Low noise
GENERAL DATA
Item
Module Dimensions
Weight
Output Power
Efficiency
(MTBF)
Value
90x20x12.5
13.5 max
1.35 nominal
70 min
60.000 min
Unit
mm
g
W
%
hrs
Input Connector
JST S3B-PH-K-S
Output Connector
JAE IL-G-4P-S3L2E
Pin No
1
2
3
Item
Input Voltage
Operating
Temperature
Storage
Temperature
Humidity
Symbol
VMAX
TOP
Condition Min
5
Max
6.0
50
Unit
V
°C
TST
-
-20
70
°C
-
-
-
90
% RH
Symbol
VIN
IIN
Rush Current
Lamp Current
Lamp Power
Frequency
Dimming
Range
Startup
Characteristics
Condition
12V,
T=25°C
IS
12V,
T=25°C
IL
12V,
T=25°C
PL
12V,
T=25°C
fL
12V,
T=25°C
12V,
T=25°C
5°C +/- 1°C, DC 4.5V
Min
4.5
0.31
Typ
5.0
0.36
Max
5.5
0.41
Unit
V
A
-
-
1.0
A
4.0
5.0
6.0
mA
-
1.35
-
W
65
75
85
kHz
-
-
-
%
90
70
6.5
3.5
10
10
4
20
1
1
3
3.5
10
OUTPUT CONNECTOR
8.4
INPUT CONNECTOR
2-Ø 2.8
1.6
2.5
6.5
1.0
Symbol
CFL ON/OFF
GND
Vin
Comment
On:at 0V , Off at 5V or open
5V +/- 10°C
Item
Input Voltage
Input Current
PHR-3
IL-G-4S
Pin No
1
2
3
4
Symbol
CFL HV
NC
GND
CFL GND
Comment
High voltage output
Ground
INVC378 (New Fully Compatible Replacement for INVC218)
This Inverter is designed and adjusted for cold fluorescent lamp used in the LMG5278XUFC STN liquid crystal
display modules.
FEATURES
• Low noise
GENERAL DATA
Item
Module Dimensions
Weight
Output Power
Efficiency
(MTBF)
Value
130 x 18
15.0 max
1.7 nominal
65 min
60.000 min
Unit
mm
g
W
%
hrs
Input Connector
JAE IL-Z-5PL-SMTY
Output Connector
Pin No
1
2
3
4
5
Item
Input Voltage
Operating
Temperature
Storage
Temperature
Humidity
Symbol
VMAX
TOP
Condition Min
5
Max
18.0
50
Unit
V
°C
TST
-
-20
70
°C
-
-
-
90
% RH
Rush Current
Lamp Current
Lamp Power
Frequency
Dimming
Range
Startup
Characteristics
Symbol
VIN
IIN
Condition
12V,
T=25°C
IS
12V,
T=25°C
IL
12V,
T=25°C
PL
12V,
T=25°C
fL
12V,
T=25°C
12V,
T=25°C
10°C +/- 1°C, DC 8.0V
Min
8.0
0.15
Typ
12.0
0.20
Max
17.0
0.25
Unit
V
A
-
-
1.0
A
3.7
4.2
4.7
mA
-
1.7
-
W
50
65
80
kHz
-
100-60 -
Pin No
1
2
3
4
%
130.0+/-0.5
20.0
4
5
1
1
18.0+/-0.5
90.0+/-0.3
3.5
3.5
20.0
1.0
OUTPUT CONNECTOR
6.0MAX
INPUT CONNECTOR
2.0MAX
2-Ø 2.8
Symbol
GND
VCC
CFL ON/OFF
BR1
BR2
Comment
8V - 17V
OFF at Open, ON at Low (V<0.8V, I=2mA)
kOhm
Item
Input Voltage
Input Current
IL-Z-5S-S125C3
M60-04
Symbol
CFL HV
NC
NC
CFL HV
Comment
High voltage output
High voltage output
INVC444 (New Fully Compatible Replacement for INVC304)
This Inverter is designed and adjusted for cold fluorescent lamp used in the LMG7550RPFC and LMG7520RPFC
FEATURES
• Adaptable to a wide range of input voltages (7-19 V)
• External adjustment of two maximum brightness levels
GENERAL DATA
Item
Module Dimensions
Weight
Output Power
Efficiency
(MTBF)
Value
110x13x8
10.0 max
2.4 nominal
65 min
60.000 min
Unit
mm
g
W
%
hrs
Item
Symbol
Condition Min
Max
Input Voltage
VMAX
-
6.0
21.0
Unit
V
Operating
Temperature
TOP
-
0
50
°C
Storage
Temperature
TST
-
-20
70
°C
Humidity
-
-
-
90
% RH
Rush Current
Lamp Current
Lamp Power
Frequency
Dimming
Range
Startup
Characteristics
Symbol
VIN
IIN
Condition
12V,
T=25°C;
IS
12V,
T=25°C
IL
12V,
T=25°C;
PL
12V,
T=25°C;
fL
12V,
T=25°C
12V,
T=25°C
0°C +/- 1°C, DC 7.0V
Min
7.0
0.26
Typ
12.0
0.31
Max
19.0
0.36
Unit
V
A
-
-
2.0
A
4.0
5.0
6.0
mA
-
2.4
-
W
60
70
80
kHz
-
100-50 -
%
GND PATTERN (Ø 2.6)
Ø 2.9
Ø 2.9
3.5
3.5
4
1
6
3.5
13 +/-0.3
1
1
3.5
110+/0.3
OUTPUT CONNECTOR
10
INPUT CONNECTOR
DF13-6S-1.25C
M60-04
Pin No
1
2
3
4
5
6
Symbol
VCC
GND
CFL ON/OFF
BR1
BR2
H/L
Comment
7V-19V
Open or High = OFF, Low (V<0.8V) = ON
Brightness max at 0 Ohm, min at 10kOhm
Lamp Current 5mA at Open/,6mA at Low
Item
Input Voltage
Input Current
Input Connector
HIROSE DF13-6P-1.25H
Output Connector
Pin No
Symbol
Comment
1
2
3
4
CFL GND
NC
NC
CFL HV
Ground
High voltage output
FEATURES
• Low cost
• Low noise
GENERAL DATA
Item
Module Dimensions
Weight
Output Power
Efficiency
(MTBF)
Value
90x22x14.1
20.0 max
1.8 nominal
85 min
60.000 min
Unit
mm
g
W
%
hrs
Input Connector
JST PHR-3
Output Connector
Pin No
1
2
3
Item
Input Voltage
Operating
Temperature
Storage
Temperature
Humidity
Symbol
VMAX
TOP
Condition Min
0.5
0
Max
15.0
50
Unit
V
°C
TST
-
-20
70
°C
-
-
-
90
% RH
Rush Current
Lamp Current
Lamp Power
Frequency
Startup
Characteristics
Symbol
VIN
IIN
Condition
12V,
T=25°C
IS
12V,
T=25°C
IL
12V,
T=25°C
PL
12V,
IL
=4.5mA,
T=25°C
fL
12V,
T=25°C
0°C +/- 1°C, DC 10.8.V
Pin No
1
2
3
4
Min
10.8
0.15
Typ
12.0
0.2
Max
13.2
0.25
Unit
V
A
-
-
3.0
A
4.0
4.5
5.0
mA
-
1.8
-
W
50
60
70
kHz
1 8 .5 ±0 .5
3 .5
9 0 ±0 .5
2 -Ø 2 .8 +-00 .1
CN2
4
CN1
22
1
1
3
10
10M A X
7 0 ±0 .2
2 .5 M A X
1 .6
10
Symbol
CFL ON/OFF
GND
Vin
Comment
On at low (0.8V min) , Off at open
12V +/- 10%
Item
Input Voltage
Input Current
JST S3B-PH-K-S
MITSUMI M60-04
Symbol
CFL HV
NC
NC
CFL GND
Comment
Connect to lamp high voltage side
Connect to lamp low voltage side
FEATURES
• Low cost
• Low noise
GENERAL DATA
Item
Module Dimensions
Weight
Output Power
Efficiency
(MTBF)
Value
90x22x14.1
20 max
1.8 nominal
85 min
60.000 min
Unit
mm
g
W
%
hrs
Input Connector
JST PHR-3
Output Connector
MITSUMI M60-30-134P
Pin No
1
2
3
Item
Input Voltage
Operating
Temperature
Storage
Temperature
Humidity
Symbol
VMAX
TOP
Condition Min
0.5
0
Max
7.0
50
Unit
V
°C
TST
-
-20
70
°C
-
-
-
90
% RH
Frequency
Startup
Characteristics
Symbol
VIN
IIN
IS
IL
PL
Condition
5V, T=25°C
5V, T=25°C
5V, T=25°C
5V,
IL =
4.5mA,
T=25°C
fL
5V, T=25°C
0°C +/- 1°C, DC 4.5.V
Pin No
1
2
3
4
Min
4.5
0.4
4.0
-
Typ
5.0
0.45
4.5
1.8
Max
5.5
0.5
3.0
5.0
-
Unit
V
A
A
mA
W
50
60
70
kHz
1 8 .5 ±0 .5
3 .5
9 0 ±0 .5
2 -Ø 2 .8 +-00 .1
CN2
4
CN1
22
1
1
3
10
10M A X
7 0 ±0 .2
2.5 M A X
1.6
10
Symbol
CFL ON/OFF
GND
Vin
Comment
On at low (0.8V min) , Off at open
5.0 +/- 10%
Item
Input Voltage
Input Current
Rush Current
Lamp Current
Lamp Power
JST S3B-PH-K-S
MITSUMI M60-04
Symbol
CFL HV
NC
NC
CFL GND
Comment
Connect to lamp high voltage side
Connect to lamp low voltage side
INVC526
This Inverter is designed and adjusted for cold fluorescent lamp used in the TX31D27VC1CAB colour TFT liquid
crystal display modules.
FEATURES
• Low noise
GENERAL DATA
Item
Module Dimensions
Weight
Efficiency
(MTBF)
Value
130.0 x 15 x 7
11.0 max
80 min
60.000 min
Unit
mm
g
%
hrs
Input Connector
MOLEX 53261-0810
Output Connector
JST SM02(8.0)B-BHS-1
Item
Input Voltage
Operating
Temperature
Storage
Temperature
Humidity
Symbol
VMAX
TOP
Condition
-
Min
5
Max
19.0
50
Unit
V
°C
TST
-
-20
70
°C
-
-
-
90
% RH
Pin No
1
2
3
4
5
6
7
Item
Input Voltage
Input Current
Lamp Current
Lamp Power
Frequency
Dimming
Range
Startup
Characteristics
Symbol
VIN
IIN
Condition
12V,
T=25°C
IL
12V,
T=25°C
PL
12V,
T=25°C
fL
12V,
T=25°C
12V,
T=25°C
10°C +/- 1°C, DC 7.0V
Min
7.0
-
8
Max
19.0
-
Unit
V
A
-
mA
-
Typ
12.0
0.48 /
0.38
6.5 /
5.0
5.76
-
W
50
65
80
kHz
-
100-50 -
-
Pin No
1
2
%
130.0+/-0.5
66.5+/-0.2
3.5
3.5
8.0+/-0.2
6.5
1
15
6.5
6.5
3.25 3.25
ø2.2
Symbol
VCC
VCC
GND
GND
ON/OFF
Variable
Resistor
Variable
Resistor
Mode Change
Comment
7 - 19V
7 - 19V
Ground
Ground
OFF at Open, ON at Low (V=0.8Vmax)
Brightness max at 0 kOhm, min at 10kOhm
IL=5.0mA at OPEN, IL=6.5mA at LOW
(V=0.8Vmax)
9
51021-0800
-
1
Symbol
CFL HV
CFL HV
Comment
High voltage output
High voltage output
STARTER KITS
In order to enable purchasers of a LCD module to set up fast and easily a working prototype of their display
system, Hitachi has prepared Starter Kits for several of its LCD modules.
Starter Kit Contents
These starter kits contain:
•
a comprehensive instruction leaflet with module and inverter details, handling precautions, lists
of driver chip suppliers and connector manufacturer addresses throughout Europe.
•
the relevant inverter board.
•
input connector(s) for data input to the module.
•
input connector to the inverter with flying leads.
Starter Kit Availability
The following starter kits for flat panel display modules are available:
Display Part Name
Starter Kit Part Name
SP14Q00x Series
START14Q00x
SP10Q002
START10Q00x
LMG752x Series
START7520x
LMG7380QHFC
START7380
LMG5278XUFC-00T
START5278
LMG7550XUFC
START7550
LMG74xx Series
START74xx
SPARE CFL TUBES
Most Hitachi LCD modules allow the easy exchange of the CFL backlight tube. Spare backlight units are available
for the following displays :
Display Part No
CFL Tube Part No
CFL Unit Part No
LMG5278XUFC-00T
CFL LMG5278
5278CFL
LMG6911RPBC-00T
CFL LMG6911-00T
6911-00TCABLE
LMG6912RPFC
CFL LMG6912
6912CFL
LMG6912RPFC-00T
CFL LMG6912-00T
6912-00TCABLE
LMG7380QHFC
-
7380BL-UNIT 2
LMG74xx
-
74XXBL-UNIT 2
LMG7550XUFC
CFL LMG7550
7550CFL
LMG9520RPCC
CFL LMG9520
-
LMG9520RPCC-A
CFL LMG9520A
-
1
LMG752x
SP10Q002
SP14Q00x
1
2
Complete Backlight Unit consisting of CFL tube, cable and connector
Complete Backlight Unit consisting of CFL tube, lightguide, reflection foil, cable and connector
LOW COST CONTROLLER BOARD LCMEVB-001
In order to enable purchasers of a Hitachi LCD module to easily set up an evaluation system of their display,
Hitachi offers a controller board which can interface its whole range of medium size monochrome displays.
The board is based on the Yamaha YGV610B LCD controller and can drive
• 8 bit colour single scan LCD modules with 16 out of 512 colours
• 4 bit monochrome LCD modules from 128 x 128 pixels to 640 x 240 pixels with 16 greyscales
• 8 bit monochrome dual scan LCD modules up to 640 x 480 pixels with 16 greyscales
System Input
The board is designed such that a number of host MCU/MPU can be interfaced. Primarily the Hitachi H8/300H
family and the Hitachi SuperH SH1 family will be supported. In order to facilitate easy development and testing the
design of the board allows to plug it onto the evaluation board for Hitachi SH series microcontrollers. In addition,
interfacing to the Motorola 68x family and Intel 80x86 family is also possible.
System Output
The controller board will be able to control monochrome displays up to 640 x 480 pixel with 16 greyscales and
colour displays up to 640 x 240 pixel with 16 out of 512 colours.
In particular the following Hitachi displays can be interfaced:
• VGA Displays
(LMG5278XUFC-00T, LMG7550XUFC)
• Quarter VGA Displays
(LMG7520RPFC, SP14Q00x)
• Eigth VGA Display
(SP10Q002)
Software
Together with the controller board comes an ANSI-C library containing initialization routines for the different
displays as well as basic graphics routines like
• Color setting foreground and background
• Set/ reset of pixels
• Drawing of lines, rectangles and circles
• Displaying characters in two different fonts
This library is made available as source code to enable portability across various host MCU/MPU. Based on some
demonstration programs which are included the customer will be able display text and graphics within a very short
time.
The mechanical layout of the controller board LCMEVB-001 is shown to scale in Fig.1.
Outer dimensions are 80 x 90 mm.
Fig. 1
Photo LCMEVB-001
APPLICATION NOTES
The following gives an overview of the display related application notes. All the below can be
downloaded from the Hitachi WWW Site at : www.hitachi-eu.com/hel/ecg/products/displays.
Interfacing OKI MSM6255 LCD Controller to Hitachi LCD Modules
Describes how to interface the OKI MSM6255 LCD controller to quarter VGA displays like
SP14Q00x and LMG752x series.
Interfacing to Hitachi LCD Modules with Toshiba T6963C LCD Controller
Describes how to configure the Toshiba T6963C LCD controller which is built into the LMG742x
series and LMG7380 medium resolution LCD modules.
Interfacing to Hitachi LCD Modules with HD61830 LCD Controller
Describes how to configure the Hitachi HD61830 LCD controller which is built into the
LMG638x, LMG640x and LMG740x series medium resolution LCD modules.
Driving the LMG7480PMFE LCD Module directly from Hitachi SH Microcontroller
Describes how by using the evaluation board for Hitachi's SH7032 risk processor and a power
supply circuit, all of the timing wave forms and voltages necessary for driving LMG7480 PMFE
(240 x 160 Dot) can be generated.
HD61830/HD61830B
LCDC (LCD Timing Controller)
Description
The HD61830/HD61830B is a dot matrix liquid crystal graphic display controller LSI that stores the
display data sent from an 8-bit microcontroller in the external RAM to generate dot matrix liquid crystal
driving signals.
It has a graphic mode in which 1-bit data in the external RAM corresponds to the on/off state of 1 dot on
liquid crystal display and a character mode in which characters are displayed by storing character codes in
the external RAM and developing them into the dot patterns with the internal character generator ROM.
Both modes can be provided for various applications.
The HD61830/HD61830B is produced by the CMOS process. Thus, combined with a CMOS
microcontroller it can complete a liquid crystal display device with lower power dissipation.
Features
• Dot matrix liquid crystal graphic display controller
• Display control capacity
 Graphic mode: 512k dots (216 bytes)
 Character mode: 4096 characters (212 characters)
• Internal character generator ROM: 7360 bits
 160 types of 5 × 7 dot characters
 32 types of 5 × 11 dot characters
Total 192 characters
 Can be extended to 256 characters (4 kbytes max.) with external ROM
1
HD61830/HD61830B
• Interfaces to 8-bit MPU
• Display duty cycle (can be selected by a program)
Static to 1/128 duty cycle
• Various instruction functions
 Scroll, cursor on/off/blink, character blink, bit manipulation
• Display method: Selectable A or B types
• Internal oscillator (with external resistor and capacitor) HD61830
• Operating frequency
 1.1 MHz HD61830
 2.4 MHz HD61830B
• Low power dissipation
• Power supply: Single +5 V ±10%
• CMOS process
2
HD61830/HD61830B
Differences between Products
HD61830 and HD61830B
HD61830
HD61830B
Oscillator
Internal or external
External only
Operating frequency
1.1 MHz
2.4 MHz
Pin arrangement
and signal name
Pin 6: C
Pin 7: R
Pin 9: CPO
Pin 6: CE
Pin 7: OE
Pin 9: NC
Package marking
to see figure
A
B
Package Marking
3D13
A
Lot No.
HD61830A00
JAPAN
3D13
B
Lot No.
HD61830B00
JAPAN
Ordering Information
Type No.
Package
HD61830A00H
60-pin plastic QFP (FP-60)
HD61830B00H
3
HD61830/HD61830B
MB
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
4
3
2
1
60
59
58
57
56
55
54
MA10
(CE) C
6
53
MA11
(OE) R
7
52
MA12
CR
8
51
MA13
(NC) CPO
9
50
MA14
FLM
10
49
MA15
CL1
11
48
D2
SYNC
12
47
D1
WE
13
46
CL2
RES
14
45
RD0
CS
15
44
RD1
E
16
43
RD2
R/W
17
42
RD3
RS
18
41
RD4
MA
19
40
RD5
GND
20
39
RD6
DB7
21
38
RD7
DB6
22
37
MD0
DB5
23
36
MD1
( ) is for HD61830B
4
5
Pin Arrangement
24
25
26
27
28
29
30
31
32
33
34
35
DB4
DB3
DB2
DB1
DB0
VCC
MD7
MD6
MD5
MD4
MD3
MD2
FP-60
(Top view)
HD61830/HD61830B
Terminal Functions
Symbol
Pin Number
I/O
Function
DB0–DB7
28–21
I/O
Data bus: Three-state I/O common terminal
Data is transferred to MPU through DB0 to DB7.
CS
15
I
Chip select: Selected state with CS = 0
R/W
17
I
Read/Write:R/W = 1: MPU ← HD61830
R/W = 0: MPU → HD61830
RS
18
I
Register select: RS = 1: Instruction register
RS = 0: Data register
E
16
I
Enable: Data is written at the fall of E
Data can be read while E is 1
CR
8
I
CR oscillator (HD61830), External clock input (HD61830B)
C
6
—
CR oscillator to capacitor (HD61830 only)
R
7
—
CR oscillator to resistor (HD61830 only)
CPO
9
O
Clock signal for HD61830 in slave mode (HD61830 only)
CE
6
O
Chip enable (HD61830B only)
CE = 0: Chip enables make external RAM in active
OE
7
O
Output enable (HD61830B only)
OE = 1: Output enable informs external RAM that HD61830B requires
data bus
NC
9
Open Unused terminal. Don’t connect any wires to this terminal
(HD61830B only)
MA0–MA15
4–1, 60–49
O
External RAM address output
In character mode, the line code for external CG is output through
MA12 to MA15 (0: Character 1st line, F: Character 16th line)
MD0–MD7
37–30
I/O
Display data bus: Three-state I/O common terminal
RD0–RD7
45–38
I
ROM data input: Dot data from external character generator is input
WE
13
O
Write enable: Write signal for external RAM
CL2
46
O
Display data shift clock for LCD drivers
CL1
11
O
Display data latch signal for LCD drivers
FLM
10
O
Frame signal for display synchronization
MA
19
O
Signal for converting liquid crystal driving signal into AC, A type
MB
5
O
Signal for converting liquid crystal driving signal into AC, B type
D1
47
O
D2
48
Display data serial output
D1: For upper half of screen
D2: For lower half of screen
SYNC
12
I/O
Synchronous signal for parallel operation
Three-state I/O common terminal (with pull-up MOS)
Master: Synchronous signal is output
Slave: Synchronous signal is input
RES
14
I
Reset: Reset = 0 results in display off, slave mode and Hp = 6
5
8
I/O interface circuit
DB0–DB7
CS
E
RS
R/W
RES
Dot counter
(DC)
Data
input
register
(DIR)
Dot registers
(DR)
8
8
Data
output
register
(DOR)
4
Busy
flag
(BF)
Instruction
register
(IR)
6
Mode
control
register
(MCR)
Line address
counter
8
Multiplexer
(OE)
Refesh address 16
counter (1)
(RAC1)
Refesh address 16
counter (2)
(RAC2)
Cursor address 16
counter
(CAC)
RAM
*
MD0–MD7
4
Character
generator
ROM
(CGROM)
Cursor
signal
generator
Control
signal
WE
Extended
external
ROM
RD0–RD7
Multiplexer
Control
signal
Oscillator
circuit
Oscillator
circuit
Parallel/serial
converter
D1
Parallel/serial
converter
D2
Cf
(CL2)
CL2
Rf
CPO
(CR)
* When extended external ROM is used, MA0–MA11
are applied to RAM, MA12 –MA15 are applied to
extended external ROM.
( ) is for HD61830B
HD61830/HD61830B
(CE)
Block Diagram
6
SYNC CL1 MA MB FLM
HD61830/HD61830B
Block Functions
Registers
The HD61830/HD61830B has the five types of registers: instruction register (IR), data input register (DIR),
data output register (DOR), dot registers (DR), and mode control register (MCR).
The IR is a 4-bit register that stores the instruction codes for specifying MCR, DR, a start address register,
a cursor address register, and so on. The lower order 4 bits DB0 to DB3 of data buses are written in it.
The DIR is an 8-bit register used to temporarily store the data written into the external RAM, DR, MCR,
and so on.
The DOR is an 8-bit register used to temporarily store the data read from the external RAM. Cursor address
information is written into the cursor address counter (CAC) through the DIR. When the memory read
instruction is set in the IR (latched at the falling edge of E signal), the data of external RAM is read to DOR
by an internal operation. The data is transferred to the MPU by reading the DOR with the next instruction
(the contents of DOR are output to the data bus when E is at the high level).
The DR are registers used to store dot information such as character pitches and the number of vertical
dots, and so on. The information sent from the MPU is written into the DR via the DIR.
The MCR is a 6-bit register used to store the data which specifies states of display such as display on/off
and cursor on/off/blink. The information sent from the MPU is written in it via the DIR.
Busy Flag (BF)
The busy flag = 1 indicates the HD61830 is performing an internal operation. Instructions cannot be
accepted. As shown in Control Instruction, read busy flag, the busy flag is output on DB7 under the
conditions of RS = 1, R/W = 1, and E = 1. Make sure the busy flag is 0 before writing the next instruction.
Dot Counters (DC)
The dot counters are counters that generate liquid crystal display timing according to the contents of DR.
7
HD61830/HD61830B
Refresh Address Counters (RAC1/RAC2)
The refresh address counters, RAC1 and RAC2, control the addresses of external RAM, character generator
ROM (CGROM), and extended external ROM. The RAC1 is used for the upper half of the screen and the
RAC2 for the lower half. In the graphic mode, 16-bit data is output and used as the address signal of
external RAM. In the character mode, the high order 4 bits (MA12–MA15) are ignored. The 4 bits of line
address counter are output instead and used as the address of extended ROM.
Character Generator ROM
The character generator ROM has 7360 bits in total and stores 192 types of character data. A character code
(8 bits) from the external RAM and a line code (4 bits) from the line address counter are applied to its
address signals, and it outputs 5-bit dot data.
The character font is 5 × 7 (160 characters) or 5 × 11 (32 characters). The use of extended ROM allows 8 ×
16 (256 characters max.) to be used.
Cursor Address Counter
The cursor address counter is a 16-bit counter that can be preset by instruction. It holds an address when the
data of external RAM is read or written (when display dot data or a character code is read or written). The
value of the cursor address counter is automatically increased by 1 after the display data is read or written
and after the set/clear bit instruction is executed.
Cursor Signal Generator
The cursor can be displayed by instruction in character mode. The cursor is automatically generated on the
display specified by the cursor address and cursor position.
Parallel/Serial Conversion
The parallel data sent from the external RAM, character generator ROM, or extended ROM is converted
into serial data by two parallel/serial conversion circuits and transferred to the liquid crystal driver circuits
for upper screen and lower screen simultaneously.
8
HD61830/HD61830B
Display Control Instructions
Display is controlled by writing data into the instruction register and 13 data registers. The RS signal
distinguishes the instruction register from the data registers. 8-bit data is written into the instruction register
with RS = 1, and the data register code is specified. After that, the 8-bit data is written in the data register
and the specified instruction is executed with RS = 0.
During the execution of the instruction, no new instruction can be accepted. Since the busy flag is set
during this, read the busy flag and make sure it is 0 before writing the next instruction.
1. Mode Control: Code $„00“ (hexadecimal) written into the instruction register specifies the mode
control register.
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Instruction reg.
0
1
0
0
0
0
0
0
0
0
Mode control reg.
0
0
0
0
Mode data
Cursor/blink
CG
DB3
DB2
DB1
DB0
1/0
1/0
0
0
0
0
0
1
Cursor on
1
0
Cursor off, character blink
1
1
Cursor blink
0
0
0
1
Cursor on
1
0
Cursor off, character blink
1
1
Cursor blink
0
0
1
0
Master/slave
DB4
Display ON/OFF
DB5
Ext./Int. CG
DB7
Graphic/character
mode
RS
Cursor
R/W
Blink
1
Internal CG
Cursor off
Graphic/character
display
Character display
(Character mode)
Cursor off
External CG
Register
Graphic mode
1: Master mode
0: Slave mode
1: Display ON
0: Display OFF
9
HD61830/HD61830B
2. Set Character Pitch: Vp indicates the number of vertical dots per character. The space between the
vertically-displayed characters is included in the determination. This value is meaningful only during
character display (in the character mode) and becomes invalid in the graphic mode.
H p indicates the number of horizontal dots per character in display, including the space between
horizontally-displayed characters. In the graphic mode, the Hp indicates the number of bits of 1-byte display
data to be displayed.
There are three Hp values (Table 1).
Register
R/W
RS
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Instruction reg.
0
1
0
0
0
0
0
0
0
1
Character pitch reg.
0
0
Table 1
(Vp – 1) binary
0
Hp Values
Hp
DB2
DB1
DB0
Horizontal Character Pitch
6
1
0
1
6
7
1
1
0
7
8
1
1
1
8
10
(Hp – 1) binary
HD61830/HD61830B
3. Set Number of Characters: HN indicates the number of horizontal characters in the character mode or
the number of horizontal bytes in the graphic mode. If the total sum of horizontal dots on the screen is
taken as n,
n = Hp × HN
HN can be set to an even number from 2 to 128 (decimal).
Register
R/W
RS
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Instruction reg.
0
1
0
0
0
0
0
0
1
0
Number-of-characters reg.
0
0
0
(HN – 1) binary
4. Set Number of Time Divisions (Inverse of Display Duty Ratio): NX indicates the number of time
divisions in multiplex display.
1/NX is the display duty ratio.
A value of 1 to 128 (decimal) can be set to NX.
Register
R/W
RS
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Instruction reg.
0
1
0
0
0
0
0
0
1
1
Number-of-time-divisions reg.
0
0
0
(NX – 1) binary
5. Set Cursor Position: Cp indicates the position in a character where the cursor is displayed in the
character mode. For example, in 5 × 7 dot font, the cursor is displayed under a character by specifying Cp =
8 (decimal). The cursor horizontal length is equal to the horizontal character pitch Hp. A value of 1 to 16
(decimal) can be set to C p. If a smaller value than the vertical character pitch Vp is set (Cp ≤ Vp), and a
character overlaps with the cursor, the cursor has higher priority of display (at cursor display on). If Cp is
greater than Vp, no cursor is displayed. The cursor horizontal length is equal to H p.
Register
R/W
RS
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Instruction reg.
0
1
0
0
0
0
0
1
0
0
Cursor position reg.
0
0
0
0
0
0
(Cp – 1) binary
11
HD61830/HD61830B
6. Set Display Start Low Order Address: Cause display start addresses to be written in the display start
address registers. The display start address indicates a RAM address at which the data displayed at the top
left end on the screen is stored. In the graphic mode, the start address is composed of high/low order 16
bits. In the character display, it is composed of the lower 4 bits of high order address (DB3–DB0) and 8 bits
of low order address. The upper 4 bits of high order address are ignored.
Register
R/W
RS
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Instruction reg.
0
1
0
0
0
0
1
0
0
0
Display start address reg.
(low order byte)
0
0
(Start low order address) binary
Set Display Start High Order Address
Register
R/W
RS
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Instruction reg.
0
1
0
0
0
0
1
0
0
1
Display start address reg.
(high order byte)
0
0
(Start high order address) binary
7. Set Cursor Address (Low Order) (RAM Write Low Order Address): Cause cursor addresses to be
written in the cursor address counters. The cursor address indicates an address for sending or receiving
display data and character codes to or from the RAM.
That is, data at the address specified by the cursor address are read/written. In the character mode, the
cursor is displayed at the character specified by the cursor address.
A cursor address consists of the low-order address (8 bits) and the high-order address (8 bits). Satisfy the
following requirements setting the cursor address (Table 2).
The cursor address counter is a 16-bit up-counter with set and reset functions. When bit N changes from 1
to 0, bit N + 1 is incremented by 1. When setting the low order address, the LSB (bit 1) of the high order
address is incremented by 1 if the MSB (bit 8) of the low order address changes from 1 to 0. Therefore, set
both the low order address and the high order address as shown in the Table 2.
Register
R/W
RS
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Instruction reg.
0
1
0
0
0
0
1
0
1
0
Cursor address counter
(low order byte)
0
0
12
(Cursor low order address) binary
HD61830/HD61830B
Set Cursor Address (High Order) (RAM Write High Order Address)
Register
R/W
RS
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Instruction reg.
0
1
0
0
0
0
1
0
1
1
Cursor address counter
(high order byte)
0
0
Table 2
(Cursor high order address) binary
Cursor Address Setting
Condition
Requirement
When you want to rewrite (set ) both the low order
address and the high order address.
Set the low order address and then set the high
order address.
When you want to rewrite only the low order address. Do not fail to set the high order address again after
setting the low order address.
When you want to rewrite only the high order address. Set the high order address. You do not have to set
the low order address again.
13
HD61830/HD61830B
8. Write Display Data: After the code $„0C“ is written into the instruction register with RS = 1, 8-bit data
with RS = 0 should be written into the data register. This data is transferred to the RAM specified by the
cursor address as display data or character code. The cursor address is increased by 1 after this operation.
Register
R/W
RS
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Instruction reg.
0
1
0
0
0
0
1
1
0
0
RAM
0
0
MSB (pattern data, character code) LSB
9. Read Display Data: Data can be read from the RAM with RS = 0 after writing code $„0D“ into the
instruction register. Figure 1 shows the read procedure.
This instruction outputs the contents of data output register on the data bus (DB0 to DB7) and then
transfers RAM data specified by the cursor address to the data output register, also increasing the cursor
address by 1. After setting the cursor address, correct data is not output at the first read but at the second
one. Thus, make one dummy read when reading data after setting the cursor address.
Register
R/W
RS
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Instruction reg.
0
1
0
0
0
0
1
1
0
1
RAM
1
0
B
OB
MSB (pattern data, character code) LSB
CS
E
R/W
RS
B
DB
0A
Busy Cursor
check address
set
mode
Cursor
address
NL
Cursor Busy
low
check
order
address
write
Cursor
address
set
mode
NL
NU
B
Cursor Busy
high
check
order
address
write
0D
Data
read
mode
*
Dummy
read
N
Data output
register
(N)
B
(N+1)
Busy N
check address
data
read
Busy N + 1
check address
data
read
N+1
N+2
N+3
N address data N + 1 address data N + 2 ...
Figure 1 Read Procedure
14
B
HD61830/HD61830B
10. Clear Bit: The clear/set bit instruction sets 1 bit in a byte of display data RAM to 0 or 1, respectively.
The position of the bit in a byte is specified by NB and RAM address is specified by cursor address. After
the execution of the instruction, the cursor address is automatically increased by 1. NB is a value from 1 to
8. NB = 1 and NB = 8 indicates LSB and MSB, respectively.
Register
R/W
RS
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Instruction reg.
0
1
0
0
0
0
1
1
1
0
Bit clear reg.
0
0
0
0
0
0
0
R/W
RS
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Instruction reg.
0
1
0
0
0
0
1
1
1
1
Bit set reg.
0
0
0
0
0
0
0
(NB – 1) binary
Set Bit
Register
(NB – 1) binary
11. Read Busy Flag: When the read mode is set with RS = 1, the busy flag is output to DB7. The busy
flag is set to 1 during the execution of any of the other instructions. After the execution, it is set to 0. The
next instruction can be accepted. No instruction can be accepted when busy flag = 1. Before executing an
instruction or writing data, perform a busy flag check to make sure the busy flag is 0. When data is written
in the register (RS = 1), no busy flag changes. Thus, no busy flag check is required just after the write
operation into the instruction register with RS = 1.
The busy flag can be read without specifying any instruction register.
Register
R/W
RS
DB7
Busy flag
1
1
1/0
DB6
DB5
DB4
DB3
DB2
DB1
DB0
*
15
HD61830/HD61830B
Hp
RD7
NX
Cp
Vp
RD0
CURA
STA
HN (digit)
Symbol
Name
Meaning
Value
Hp
Horizontal character pitch
Horizontal character pitch
6 to 8 dots
HN
Number of horizontal
characters
Number of horizontal characters per
line (number of digits) in the character
mode or number of bytes per line in
the graphic mode
2 to 128 digits
(an even number)
Vp
Vertical character pitch
Vertical character pitch
1 to 16 dots
Cp
Cursor position
Line number on which the cursor
can be displayed
1 to 16 lines
NX
Number of time divisions
Inverse of display duty ratio
1 to 128 lines
Note: If the number of vertical dots on the screen is m, and the number of horizontal dots is n,
1/m = 1/NX = display duty ratio
n = Hp × HN,
m/Vp = Number of display lines
Cp ≤ Vp
Figure 2 Display Variables
16
Character
display
Display Data
from MPU
Liquid Crystal
Display Panel
RAM
Character code
(8 bits)
Hp
Display Mode
Display Mode
b7 b6 b5 b4 b3 b2 b1 b0
A
B
C
0 1 0 0 0 0 0 1
Start
address
0 1 0 0 0 0 1 0
Hp: 6, 7, or 8 dots
Graphic
Display pattern
(8 bits)
b0
Hp
b7
b7 b6 b5 b4 b3 b2 b1 b0
8 dots
0 1 0 1 0 1 0 1
Start
address
1 1 1 1 1 1 1 1
Hp: 8 dots
17
HD61830/HD61830B
8 dots
HD61830/HD61830B
Internal Character Generator Patterns and Character Codes
Lower
4 bits
Higher
4 bits
xxxx0000
xxxx0001
xxxx0010
xxxx0011
xxxx0100
xxxx0101
xxxx0110
xxxx0111
xxxx1000
xxxx1001
xxxx1010
xxxx1011
xxxx1100
xxxx1101
xxxx1110
xxxx1111
18
0010 0011 0100 0101 0110 0111 1010 1011 1100 1101 1110 1111
HD61830/HD61830B
Example of Correspondence between External CGROM Address Data and
Character Pattern
8 × 8 Dot Font
A10
0
0
0
1
A 9
0
0
0
1
A 8
0
0
1
1
A 7
0
1
0
1
A6 A5 A4 A3 A2 A1 A0 00 01 02 03 04 05 06 07 00 01 02 03 04 05 06 07
0
0
0
0
0
0
0
0
0
1
1
0
0
0
1
1
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
0
1
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
0
1
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
1
0
1
0
0
0
0
0
1
0
1
0
1
0
0
0
1
0
1
1
0
0
1
0
0
0
0
1
0
0
1
0
0
0
0
1
1
0
1
0
0
0
1
0
0
0
0
1
1
0
1
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
0
1
1
1
0
0
1
0
0
0
1
0
0
0
0
0
1
0
1
1
0
0
0
0
1
0
0
0
0
0
1
0
0
0
1
0
1
0
0
0
0
0
1
0
0
0
0
0
0
0
1
0
1
0
0
1
0
1
0
0
1
0
0
1
1
1
0
0
0
0
1
0
0
0
1
1
0
0
1
0
0
0
1
0
1
0
0
0
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
8 × 16 Dot Font
A11
0
0
A10
0
0
A 9
0
0
A 8
0
1
A7 A6 A5 A4 A3 A2 A1 A0 00 01 02 03 04 05 06 07 00 01 02 03 04 05 06 07
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0 1 0
0 0 1 1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 1 0 0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0 0 0
0 0 0 1
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
0
0
0
0
0
1 0 0 1
0
0
0
1
1
1
1
0
1
0
1
0
0
0
0
0
0
0
0
1 1 1 0
1 1 1 1
0 0 0 0
0
0
0
0
0
0
0
0
1
1
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
19
HD61830/HD61830B
Example of Configuration
Graphic Mode or Character Mode (1) (Internal Character Generator)
HD61830
HD61830B
MPU
Liquid crystal
display module
MA0 –MA15 at graphic mode,
MA0 –MA11 at character mode
MD0–MD7
RAM
Character Mode (2) (External Character Generator)
HD61830
HD61830B
MPU
MA12–
RD0–RD7 MA15
ROM
20
MD0 –
MD7
Liquid crystal
display module
MA0–MA11
RAM
HD61830/HD61830B
Parallel Operation (HD61830)
(Master)
MPU
HD61830 (1)
CS CPO SYNC
RAM
Liquid crystal
Liquid crystal
display module (1) display module (2)
Driving both of two
module by same
common signal
CR SYNC
HD61830 (2)
CS (Slave)
RAM
Parallel Operation (HD61830B)
(Master)
MPU
HD61830B (1)
CS
SYNC
RAM
Liquid crystal
Liquid crystal
display module (1) display module (2)
Driving both of two
module by same
common signal
SYNC
HD61830B (2)
CS (Slave)
RAM
21
HD61830/HD61830B
HD61830 Application (Character Mode, External CG, Character Font 8 × 8)
HD61830
HD6800
A0
A12
A13
A14
A15
VMA
D0
to
D7
ø2
DB0
to
DB7
E
R/W
R/W
CS
A0–A2
VCC
D1
FLM
MB
CL1
CL2
D2
MA
SYNC
CPO
RES
R
C
D0
to
D7
A3 –A10
ROM
HN462716
OE
CE
D1
FLM
M
CL1
CL2
D2
+5 V
GND
–5 V
V0
Open
CR
C
R
+5 V
GND
–5 V
OE
RAM (2)
A0
HM6116
to
A10
CS
MA11
MA12
to
MA14
MA15
MD0
to
MD7
RD0
to
RD7
Open
WE
WE
OE
A0 RAM (1)
HM6116
to
A10
CS
WE
MA0
to
MA10
RS
LCD module
HD61830 Application (Graphic Mode)
DB0–DB7
CS E
RS R/W
RES
HD61830
controller
D1
D2
Segment
driver
CL1, CL2
MB, FLM
MA0 –
MA15
MD0–MD7
WE
RAM
16 kbits
CMOS
LCD
Segment
driver
GND
VDD (5 V)
VEE (–5 V)
22
Segment
driver
Common
driver
HD6800
MPU
V1 – V6
Power supply for
liquid crystal
display drive
Segment
driver
HD61830/HD61830B
HD61830B Application (Character Mode, External CG, Character Font 8 × 8)
HD6303
HD61830B
A0
RS
A1
to
A15
CS
OE
CE
MA11
MA12
to
MA15
MD0
to
MD7
Decoder
D0
to
D7
DB0
to
DB7
E
E
R/W
R/W
OE
WE
D0
A0 RAM (1) to
to HM6116 D7
A10
CS
WE
MA0
to
MA10
A0–A3
RD0
to
RD7
Open
VCC
External
clock
D1
FLM
MB
CL1
CL2
D2
MA
SYNC
RES
CR
D0
to
D7
WE
A0 RAM (2)
HM6116
to
A10
OE
D0
to
D7
CS
A4–A11
ROM
HN482732A
OE
CE
D1
FLM
M
CL1
CL2
D2
+5 V
GND
–5 V
Open
LCD module
V0
+5 V
GND
–5 V
HD61830B Application (Graphic Mode)
D1
DB0 –DB7
HD61830B
controller
CS E
RS R/W
RES
Segment
driver
D2
Segment
driver
CL1, CL2
MB, FLM
MA0 –
MA15
OE
CE
MD0–MD7
WE
RAM
16 kbits
CMOS
Common
driver
HD6303
MPU
LCD
Segment
driver
GND
Segment
driver
V1 – V6
Power supply for
liquid crystal
display drive
VDD (5 V)
VEE (–5 V)
23
HD61830/HD61830B
HD61830 Absolute Maximum Ratings
Item
Symbol
Value
Unit
Notes
Supply voltage
VCC
–0.3 to +0.7
V
1, 2
Terminal voltage
VT
–0.3 to VCC +0.3
V
1, 2
Operating temperature
Topr
–20 to +75
°C
Storage temperature
Tstg
–55 to +125
°C
Notes: 1. All voltages are referenced to GND = 0 V.
2. If LSIs are used beyond absolute maximum ratings, they may be permanently destroyed.
We strongly recommend that you use the LSIs within electrical characteristic limits for normal
operation, because use beyond these conditions will cause malfunction and poor reliability.
24
HD61830/HD61830B
HD61830 Electrical Characteristics (VCC = 5 V ±10%, GND = 0 V, T a = –20 to
+75°C)
Item
Symbol Min
Typ
Max
Unit
Test Condition Notes
Input high voltage (TTL)
VIH
2.2
—
VCC
V
1
Input low voltage (TTL)
VIL
0
—
0.8
V
2
Input high voltage
VIHR
3.0
—
VCC
V
3
Input high voltage (CMOS)
VIHC
0.7 VCC
—
VCC
V
4
Input low voltage (CMOS)
VILC
0
—
0.3 VCC
V
4
Output high voltage (TTL)
VOH
2.4
—
VCC
V
–I OH = 0.6 mA
5
Output low voltage (TTL)
VOL
0
—
0.4
V
I OL = 1.6 mA
5
Output high voltage (CMOS)
VOHC
VCC – 0.4 —
VCC
V
–I OH = 0.6 mA
6
Output low voltage (CMOS)
VOLC
0
—
0.4
V
I OL = 0.6 mA
6
Input leakage current
I IN
–5
—
5
µA
VIN = 0 – VCC
7
Three-state leakage current
I TSL
–10
—
10
µA
VOUT = 0 – VCC 8
Power dissipation (1)
PW 1
—
10
15
mW
CR oscillation
f osc = 500 kHz
9
Power dissipation (2)
PW 2
—
20
30
mW
External clock
f cp = 1 MHz
9
Internal clock operation
(Clock oscillation frequency)
f osc
400
500
600
kHz
Cf = 15 pF ±5% 10
Rf = 39 kΩ ±2%
External clock operation
(External clock operating frequency)
f cp
100
500
1100
kHz
11
External clock duty
Duty
47.5
50
52.5
%
11
External clock rise time
t rcp
—
—
0.05
µs
11
External clock fall time
t fcp
—
—
0.05
µs
11
Pull-up current
I PL
2
10
20
µA
VIN = GND
12
Notes: The I/O terminals have the following configuration:
1. Applied to input terminals and I/O common terminals, except terminals SYNC, CR, and RES.
2. Applied to input terminals and I/O common terminals, except terminals SYNC and CR.
3. Applied to terminal RES.
4. Applied to terminals SYNC and CR.
5. Applied to terminals DB0–DB7, WE, MA0–MA15, and MD0–MD7.
6. Applied to terminals SYNC, CP0, FLM, CL1, CL2, D1, D2, MA, and MB.
7. Applied to input terminals.
8. Applied to I/O common terminals. However, the current which flows into the output drive MOS is
excluded.
25
HD61830/HD61830B
PW (mW)
9. The current which flows into the input and output circuits is excluded. When the input of CMOS is
in the intermediate level, current flows through the input circuit, resulting in the increase of power
supply current. To avoid this, input must be fixed at high or low.
The relationship between the operating frequency and the power dissipation is given below.
50
Max
40
30
Typ
20
10
0
250
500
750
1000
1250
1500
fOSC (kHz)
10. Applied to the operation of the internal oscillator when oscillation resistor Rf and oscillation
capacity Cf are used.
Cf = 15 pF ±5%
Rf = 39 kΩ ±2%
(when fOSC =
500 kHz typ)
R
Rf
C
Cf
CR
The relationship among oscillation frequency, R f and Cf is given below.
Ta = 25°C, VCC = 5 V
fOSC (kHz)
800
600
400
Cf = 10 pF
Cf = 15 pF
200
0
26
40
60
80
100
120
140
160
180
Rf (kΩ)
HD61830/HD61830B
11. Applied to external clock operation.
TI
Th
Open
R
Open
C
Oscillator
0.7 VCC
0.5 VCC
0.3 VCC
CR
Duty cycle =
trcp
tfcp
Th
× 100%
Th + TI
12. Applied to SYNC, DB0–DB7, and RD0–RD7.
27
HD61830/HD61830B
Input Terminal
Applicable terminal: CS, E, RS, R/W, RES, CR (without pull-up MOS)
VCC
PMOS
NMOS
Applicable terminal: RD0–RD7 (with pull-up MOS)
VCC
PMOS
VCC
PMOS
(Pull-up MOS)
NMOS
28
HD61830/HD61830B
Output Terminal
Applicable terminal: CL1, CL2, MA, MB, FLM, D1, D2, WE, CPO, MA0–MA15
VCC
PMOS
NMOS
I/O Common Terminal
Applicable terminal: DB0–DB7, SYNC, MD0–MD7 (MD0–MD7 have no pull-up MOS)
VCC
PMOS
VCC
PMOS
VCC
(Pull-up MOS)
Enable
NMOS
PMOS
Data
Input circuit
NMOS
Output circuit
(Three state)
29
HD61830/HD61830B
Timing Characteristics
HD61830 MPU Interface (V CC = 5 V ±10%, GND = 0 V, Ta = –20 to +75°C)
Item
Symbol
Min
Typ
Max
Unit
Enable cycle time
t CYC
1.0
—
—
µs
High level
t WEH
0.45
—
—
µs
Low level
t WEL
0.45
—
—
µs
Enable rise time
t Er
—
—
25
ns
Enable fall time
t Ef
—
—
25
ns
Setup time
t AS
140
—
—
ns
Data setup time
t DSW
225
—
—
ns
Data delay time
t DDR
—
—
225
ns *
Data hold time
t DHW
10
—
—
ns
Address hold time
t AH
10
—
—
ns
Output data hold time
t DH
20
—
—
ns
Enable pulse width
Note: * The following load circuit is connected for specification:
tCYC
tWEH
tWEL
2.2 V
E
0.8 V
tEr
tEf
tAS
tAH
2.2 V
CS, R/W, RS
0.8 V
tDSW
tDHW
2.2 V
0.8 V
DB0–DB7
(MPU→HD61830)
tDDR
DB0–DB7
(MPU←HD61830)
tDH
2.4 V
0.4 V
VCC
D1
RL
Test point
D2
R
30
C
D3
D4
RL = 2.4 kΩ
R = 11 kΩ
C = 130 pF (C includes jig capacitance)
Diodes D1 to D4 : 1S2074 H
HD61830/HD61830B
HD61830 External RAM and ROM Interface (VCC = 5 V ±10%, GND = 0 V, Ta = –20 to +75°C)
Item
Symbol
Min
Typ
Max
Unit
SYNC delay time
t DSY
—
—
200
ns
t WSY
900
—
—
ns
t CCPO
900
—
—
ns
High level
t WCPOH
450
—
—
ns
Low level
t WCPOL
450
—
—
ns
MA0 to MA15 refresh delay time
t DMAR
—
—
200
ns
MA0 to MA15 write address delay time
t DMAW
—
—
200
ns
MD0 to MD7 write data delay time
t DMDW
—
—
200
ns
MD0 to MD7, RD0 to RD7 setup time
t SMD
900
—
—
ns
Memory address setup time
t SMAW
250
—
—
ns
Memory data setup time
t SMDW
250
—
—
ns
WE delay time
t DWE
—
—
200
ns
WE pulse width (low level)
t WWE
450
—
—
ns
SYNC pulse width
Low level
CPO cycle time
CPO pulse width
SYNC
tDSY
1
V
2 CC
tWSY
tCCPO
1
V
2 CC
CPO
tWCPOL
tWCPOH
2.4 V
0.4 V
MA0–MA15
tDMAR
tDMAR
MD0–MD7
*
2.2 V
0.8 V
tSMD
RD0–RD7
tDMAW
tSMAW
*
2.2 V
0.8 V
*
tDMDW
2.4 V
0.4 V
tSMDW
2.2 V
0.8 V
tSMD
*
2.4 V
0.4 V
WE
tDWE
tWWE
Notes: 1. No load is applied to all the output terminals.
2. “*” indicates the delay time of RAM and ROM.
31
HD61830/HD61830B
HD61830 LCD Driver Interface (VCC = 5 V ±10%, GND = 0 V, Ta = –20 to +75°C)
Item
Symbol
Min
Typ
Max
Unit
Clock pulse width (high level)
t WCL1
450
—
—
ns
Clock delay time
t DCL2
—
—
200
ns
Clock cycle time
t WCL2
900
—
—
ns
High level
t WCH
450
—
—
ns
Low level
t WCL
450
—
—
ns
MA, MB delay time
t DM
—
—
300
ns
FLM delay time
t DF
—
—
300
ns
Data delay time
t DD
—
—
200
ns
Data setup time
t SD
250
—
—
ns
Clock pulse width
Note: No load is applied to all the output terminals (MA, MB, FLM, D1, and D2).
tWCL1
CL1
1V
2 CC
tWCL2
tDCL2
1V
2 CC
CL2
tWCH
1V
2 CC
MA, MB
tDM
tDF
FLM
1V
2 CC
D1
tDD
D2
32
tWCL
tSD
1V
2 CC
HD61830/HD61830B
HD61830B Absolute Maximum Ratings
Item
Symbol
Value
Unit
Notes
Supply voltage
VCC
–0.3 to +0.7
V
1, 2
Terminal voltage
VT
–0.3 to VCC +0.3
V
1, 2
Operating temperature
Topr
–20 to +75
°C
Storage temperature
Tstg
–55 to +125
°C
Notes: 1. All voltage is referred to GND = 0 V.
2. If LSIs are used beyond absolute maximum ratings, they may be permanently destroyed.
We strongly recommend that you use the LSIs within electrical characteristic limits for normal
operation, because use beyond these conditions will cause malfunction and poor reliability.
33
HD61830/HD61830B
HD61830B Electrical Characteristics (VCC = 5V ±10%, GND = 0V, T a = –20 to
+75°C)
Item
Symbol
Min
Typ
Max
Unit
Test Condition Notes
Input high voltage (TTL)
VIH
2.2
—
VCC
V
1
Input low voltage (TTL)
VIL
0
—
0.8
V
2
Input high voltage
VIHR
3.0
—
VCC
V
3
Input high voltage (CMOS)
VIHC
0.7 VCC
—
VCC
V
4
Input low voltage (CMOS)
VILC
0
—
0.3 VCC
V
4
Output high voltage (TTL)
VOH
2.4
—
VCC
V
–I OH = 0.6 mA
5
Output low voltage (TTL)
VOL
0
—
0.4
V
I OL = 1.6 mA
5
Output high voltage (CMOS)
VOHC
VCC – 0.4 —
VCC
V
–I OH = 0.6 mA
6
Output low voltage (CMOS)
VOLC
0
—
0.4
V
I OI = 0.6 mA
6
Input leakage current
I IN
–5
—
5
µA
VIN = 0 – VCC
7
Three-state leakage current
I TSL
–10
—
10
µA
VOUT = 0 – VCC 8
Pull-up current
I PL
2
10
20
µA
Vin = GND
9
Power dissipation
PW
—
—
50
mW
External clock
f cp = 2.4 MHz
10
Applied to input terminals and I/O common terminals, except terminals SYNC, CR, and RES.
Applied to input terminals and I/O common terminals, except terminals SYNC and CR.
Applied to terminal RES.
Applied to terminals SYNC and CR.
Applied to terminals DB0–DB7, WE, MA0–MA15, OE, CE, and MD0–MD7.
Applied to terminals SYNC, FLM, CL1, CL2, D1, D2, MA, and MB.
Applied to input terminals.
Applied to I/O common terminals. However, the current which flows into the output drive MOS is
excluded.
9. Applied to SYNC, DB0–DB7, and RD0–RD7.
10. The current which flows into the input and output circuits is excluded. When the input of CMOS is
in the intermediate level, current flows through the input circuit, resulting in the increase of power
supply current. To avoid this, input must be fixed at high or low.
Notes: 1.
2.
3.
4.
5.
6.
7.
8.
34
HD61830/HD61830B
Input Terminal
Applicable terminal: CS, E, RS, R/W, RES, CR (without pull-up MOS)
VCC
PMOS
NMOS
Applicable terminal: RD0–RD7 (with pull-up MOS)
VCC
PMOS
VCC
PMOS
(Pull-up MOS)
NMOS
35
HD61830/HD61830B
Output Terminal
Applicable terminal: CL1, CL2, MA, MB, FLM, D1, D2, WE, OE, CE, MA0–MA15
VCC
PMOS
NMOS
I/O Common Terminal
Applicable terminal: DB0–DB7, SYNC, MD0–MD7 (MD0–MD7 have no pull-up MOS)
VCC
VCC
PMOS
PMOS
VCC
(Pull-up MOS)
Enable
PMOS
NMOS
Data
Input circuit
NMOS
Output circuit
(Three state)
36
HD61830/HD61830B
Timing Characteristics
HD61830B Clock Operation (V CC = 5 V ±10%, GND = 0V, Ta = –20 to +75°C)
Item
Symbol
Min
Typ
Max
Unit
Notes
External clock operating frequency
f cp
100
—
2400
kHz
1
External clock duty
Duty
47.5
50
52.5
%
1
External clock rise time
t rcp
—
—
25.0
ns
1
External clock fall time
t fcp
—
—
25.0
ns
1
SYNC output hold time
t HSYO
30
—
—
ns
2, 3
SYNC output delay time
t DSY
—
—
210
ns
2, 3
SYNC input hold time
t HSYI
10
—
—
ns
2
SYNC input set-up time
t SSY
—
—
180
ns
2
Th
Tl
Notes: 1. Applied to external clock input terminal.
0.7 VCC
0.5 VCC
0.3 VCC
Oscillator
CR
tfcp
trcp
Duty cycle =
Th
× 100%
Th + Tl
2. Applied to SYNC terminal.
0.7 VCC
CR
0.3 VCC
tDSY
tHSYO
SYNC
(Output:
at master
mode)
SYNC
(Input:
at slave
mode)
tDSY
tHSYO
0.7 VCC
0.3 VCC
tHSYI
tSSY
tHSYI
tSSY
0.7 VCC
0.3 VCC
3. Testing load circuit.
Test point
CL
CL = 30 pF
(CL includes jig capacitance)
37
HD61830/HD61830B
HD61830B MPU Interface (VCC = 5V ±10%, GND = 0V, Ta = –20 to +75°C)
Item
Symbol
Min
Typ
Max
Unit
Enable cycle time
t CYC
1.0
—
—
µs
High level
t WEH
0.45
—
—
µs
Low level
t WEL
0.45
—
—
µs
Enable rise time
t Er
—
—
25
ns
Enable fall time
t Ef
—
—
25
ns
Setup time
t AS
140
—
—
ns
Data setup time
t DSW
225
—
—
ns
Data delay time
t DDR
—
—
225
ns *
Data hold time
t DHW
10
—
—
ns
Address hold time
t AH
10
—
—
ns
Output data hold time
t DH
20
—
—
ns
Enable pulse width
Note:
*
The following load circuit is connected for specification:
tCYC
tWEH
tWEL
2.2V
E
0.8V
tEr
tEf
tAS
tAH
2.2V
CS, R/W, RS
0.8V
tDSW
tDHW
2.2V
0.8V
DB0–DB7
(MPU→HD61830B)
tDDR
DB0–DB7
(MPU←HD61830B)
tDH
2.4V
0.4V
VCC
D1
RL
Test point
D2
R
C
D3
D4
38
RL = 2.4 kΩ
R = 11 kΩ
HD61830/HD61830B
HD61830B External RAM and ROM Interface (VCC = 5V ±10%, GND = 0V, Ta = –20 to +75°C)
Item
Symbol
Min
Typ
Max
Unit
Notes
MA0–MA15 delay time
t DMA
—
—
300
ns
1, 2, 3
MA0–MA15 hold time
t HMA
40
—
—
ns
1, 2, 3
CE delay time
t DCE
—
—
300
ns
1, 2, 3
CE hold time
t HCE
40
—
—
ns
1, 2, 3
OE delay time
t DOE
—
—
300
ns
1, 3
OE hold time
t HOE
40
—
—
ns
1, 3
MD output delay time
t DMD
—
—
150
ns
1, 3
MD output hold time
t HMDW
10
—
—
ns
1, 3
WE delay time
t DWE
—
—
150
ns
1, 3
WE clock pulse width
t WWE
150
—
—
ns
1, 3
MD output high impedance time (1)
t ZMDF
10
—
—
ns
1, 3
MD output high impedance time (2)
t ZMDR
50
—
—
ns
1, 3
RD data set-up time
t SRD
50
—
—
ns
2
RD data hold time
t HRD
40
—
—
ns
2
MD data set-up time
t SMD
50
—
—
ns
2
MD data hold time
t HMD
40
—
—
ns
2
Notes: 1. RAM write timing
T1
T2
T3
T1
0.7 VCC
CR
0.3 VCC
tHCE
CE
0.6V
tDMA
tHMA
2.4V
0.6V
tDOE
tHOE
2.4V
0.6V
tDMA
tHMA
MA0–MA15
tDOE
tHOE
OE
tDWE
tZMDR
WE
tDMD
MD0–MD7
(output)
tDWE
(High impedance)
2.4V
0.6V
2.4V
0.6V
tWWE
Valid
data
tZMDF
2.4V
0.6V
tHMDW
T1: Memory data refresh timing for upper screen
T2: Memory data refresh timing for lower screen
T3: Memory read/write timing
39
HD61830/HD61830B
2. ROM/RAM read timing
T1
T2
T3
T1
CR
(*1)
a
a
(*1)
tDCE
tHCE
tDCE
tHCE
b
tDCE
tHCE
2.4V
CE
0.6V
OE
MA0–MA15
(*2)
0.6V
(*2)
tDMA
tHMA
tDMA
tHMA
2.4V
Address for
the lower screen
Address for upper screen
0.6V
tSMD
2.2V
MD0–MD7
(input)
RD0–RD7
tHMD
tSRD
2.2V
tHRD
Data for the upper screen
0.8V
tSMD
tSRD
tHMA
(*3)
tHMD
Data for
the lower screen
Data for the upper screen
0.8V
tDMA
tHMA
tSMD
tHMD
(*4)
tHRD
Data for the
lower screen
Invalid data
*1
This figures shows the timing for Hp = 8.
For Hp = 7, time shown by „b“ becomes zero. For Hp = 6, time shown by „a“ and „b“
become zero.
Therefore, the number of clock pulses during T1 become 4, 3, or 2 in the case of Hp = 8,
Hp = 7, or Hp = 6 respectively.
*2
The waveform for instructions with memory read is shown with a dash line. In other cases,
the waveform shown with a solid line is generated.
*3
When an instruction with RAM read/write is executed, the value of cursor address is
output. In other cases, invalid data is output.
*4
When an instruction with RAM read is executed, HD61830B latches the data at this timing.
In other cases, this data is invalid.
3. Test load circuit
VCC
D1
RL
Test point
D2
R
C
D3
D4
40
RL = 2.4 kΩ
R = 11 kΩ
HD61830/HD61830B
HD61830B LCD Driver Interface (VCC = 5V ±10%, GND = 0V, Ta = –20 to +75°C)
Item
Symbol
Min
Typ
Max
Unit
Notes
Clock cycle time
t WCL2
416
—
—
ns
1, 3
Clock pulse width(high level) t WCH
150
—
—
ns
1, 3
Clock pulse width(low level)
t WCL
150
—
—
ns
1, 3
Data delay time
t DD
—
—
50
ns
1, 3
Data hold time
t DH
100
—
—
ns
1, 3
Clock phase difference (1)
t CL1
100
—
—
ns
1, 3
t CL2
100
—
—
ns
1, 3
t CL3
100
—
—
ns
1, 3
MA, MB delay time
t DM
–200
—
200
ns
1, 3
FLM set-up time
t SF
400
—
—
ns
2, 3
FLM hold time
t HF
1000
—
—
ns
2, 3
MA set-up time
t SMA
400
—
—
ns
2, 3
MA hold time
t HMA
1000
—
—
ns
2, 3
41
HD61830/HD61830B
Notes: 1.
tWCL2
tWCH
tWCL
0.7 VCC
0.3 VCC
CL2
tCL1
tCL2
tCL3
0.7 VCC
0.3 VCC t
WCH
CL1
tDH
tDD
D1, D2
0.7 VCC
0.3 VCC
tDM
0.7 VCC
0.3 VCC
MA, MB
2.
0.7 VCC
0.3 VCC
CL1
tSF
tHF
tSMA
tHMA
0.7 VCC
0.3 VCC
FLM
0.7 VCC
0.3 VCC
MA
3. Test load circuit
Test point
CL
42
CL = 100 pF
(CL includes jig capacitance)
1. Liquid Crystal Display
The LCD is composed of glass and polarizer. Please pay attention to the following items when handling.
(1) Please keep the temperature within the specified range for use and storage. Polarizer degradation, bubble generation or
polarizer peel-off may occur at high temperature and high humidity.
(2) Do not touch, push or rub the exposed polarizers with anything harder than an HB hardness (glass, tweezers, etc.).
(3) N-hexane is recommended for cleaning the adhesives used to attach front / rear polarizers and reflectors. These adhesives
will be damaged by such chemicals as acetone,toluene, ethanol and isopropylalcohol.
(4) When the display surface becomes dusty, wipe gently with absorbent cotton or other soft material like chamois soaked in
petroleum benzin. Do not scrub hard to avoid damaging the display surface.
(5) Wipe off saliva or water drops immediately. Contact with water over a long period of time may cause deformation of color
fading.
(6) Avoid contact with oil and fats.
(7) Condensation on the surface and contact terminals due to cold will damage, stain or dirty the polarizers. After products are
tested at low temperatures they must be warmed up in a container before coming in contact with room temperature air.
(8) Do not put or attach anything on the display area to avoid leaving marks on.
(9) Do not touch the display area with bare hands.This will stain the display area and degradate insulation between terminals.
(10) As glass is fragile, it tends to become cracked or chipped during handling especially on the edges. Please avoid dropping
or jarring.
2. Liquid Crystal Display Module
2.1 Installing LCD Modules
The holes in the printed circuit board are used to mount the LCM. Attend to the following items when installing the LCM.
(1) Cover the surface with a transparent protective plate to protect the polarizer and LCD glass.
(2) When assembling the LCM into other equipment, the spacer to be fit between the LCM and the fitting plate should have
enough height to avoid causing any stress to the module surface. Refer to the individual specifications for measurements.
The measurement tolerance should be +/- 0.1 mm.
2.2 Handling LCD Modules
Since the LCM has been assembled and adjusted with a high degree of precision, avoid applying excessive shocks to the
module or making any alterations or modifications to it.
(1) Do not alter, modify or change the shape of the tab on the metal frame.
(2) Do not make extra holes on the printed circuit board, modify its shape or change the positions of components to be
attached.
(3) Do not damage or modify the pattern wiring on the printed circuit board.
(4) Absolutely do not modify the conductive rubber strip (elastomere connector) or touch it with another subject.
(5) Except for soldering the interface, do not make any alterations or modifications with a soldering iron.
(6) Do not drop, bend or twist LCM.
2.3 Avoiding Electrostatic Discharge
Since this module uses a CMOS LSI, the same careful attention should be paid to electrostatic discharge as for an ordinary
CMOS IC.
(1) Make certain that you are grounded when handling LCM.
(2) Before removing LCM from its packing case or incoporating it into a set, be sure that the module and your body have the
same electic potential.
(3) When soldering the terminal of LCM, make certain that the AC power source for the soldering iron does not leak.
(4) When using an electric screwdriver to attach LCM, the screwdriver should be of ground potentiality to minimize as much as
possible any transmission of electro-magnetic waves produced by sparks coming from the comutator of the motor.
(5) As far as possible make the electric potential of your work clothes and that of the work bench the ground potential.
(6) To reduce the generation of static electricity, be careful that the air in the work is not too dried. (A relative humidity of 50%60% is recommended.)
2.4 Soldering Precautions
(1)
Observe the following when soldering lead wire, connector cable, etc., to the LCM
HANDLING PRECAUTIONS
(2)
(3)
Soldering iron temperature:
280°C +/- 10°C
Soldering time:
3 - 4 sec.
Solder:
eutectic-solder
If soldering flux is used, be sure to remove any remaining flux after finishing the soldering operation. (This does not apply in
the case of a non-halogen type of flux). It is recommended that you protect the LCD surface with a cover during soldering
to prevent any damage due to flux spatters.
When soldering the electroluminescent panel and PC board, the panel and board should not be detached more than three
times. This maximum number is determined by the temperature and time conditions mentioned above, though there
may be some variance depending on the temperature of the soldering iron.
When removing the electroluminescent panel from the PC board, be sure that the solder has completely melted first. If you
try to pull the components apart before the solder is completely melted, the soldered pad on the PC board could be
damaged.
3. Operation Precautions
(1)
(2)
(3)
(4)
(5)
(6)
Viewing angle varies with the change of liquid crystal driving voltage (V0). Adjust V0 to show the best contrast.
Driving an LCD in the voltage above the limit shortens its life.
Response time is greatly delayed at temperature below the operating temperature range. The display area becomes dark
blue at temperature above this range. However, this does not mean the LCD is out of order; it will recover when it returns to
the specified temperature range.
If the display is pushed hard during operation, the display will become abnormal. However, it will return to normal operation
after being turned off and on.
Condensation on the terminal can cause an electrochemical reaction disrupting the terminal circuit. Therefore, it must be
used under the relative condition of 40°C, 50% RH.
When turning the power on / off input each signal after the positive/negative voltage becomes stable.
4. Storage Precautions
(1)
(2)
(3)
(4)
(5)
When storing LCDs as spares for some years, the following precautions are necessary:
Store them in a sealed polyethylene bag. If properly sealed, there is no need for dessicant.
Store them in a dark place; do not expose to sunlight or fluorescent light. Keep the temperature between 0°C and 35°C.
The polarizer surface should not come in contact with any other object. (We advise you to store them in the container in
which they were shipped).
Environmental conditions:
(a) Humidity
Observe the following conditions both in storage and in operations.
Below 40°C humidity should stay at 85% RH or less
Above 40°C humidity should not exceed maximum absolute humidity of 40°C 85% RH
(b) Exposure to high humidity and temperature
Do not leave them for more than 168 hrs.at 40°C
Do not leave them for more than 168 hrs.at 60°C.
As for X-type LCM, should not be left for more than 48 hrs. at -20°C.
5. Handling Precautions for Electroluminescent Panels
5.1 Selecting Electroluminescent Panels
(1) The electroluminescent panel is inserted between the liquid crystal display (LCD) and printed circuit board of a liquid crystal
module (LCM). Therefore it is essential to select an electroluminescent panel that is insulated on both the PC board side
and the LCD side. It is especially important to make sure that the electroluminescent panel is insulated on the PC board
side, as the wiring of the through-hole portion is exposed.
(2) It is recommended that you use an electroluminescent panel with insulated. If the ends of the electroluminescent panels
are exposed, a short might occur with the liquid crystal module, resulting in damage to the module.
(3) Select the electroluminescent panel that has the right size for each liquid crystal module. There is a recommended size for
each standard Hitachi liquid module. Information on panel sizes is available on request.
5.2 Installing Electroluminescent Panels
(1)
(2)
(3)
(4)
(5)
The gaps at either end of the Liquid Crystal Display Module through which the electroluminescent panel is inserted are
made of conductive rubber (interconnectors). When inserting the electroluminescent panel, be especially careful not to
move the conductive rubber. Do not push the rubber with the edge of the panel, as the rubber might be moved from its
proper position. This could damage the connection between the LCD and the PC Board, resulting in a display failure.
Since high voltage is applied to the feeder terminal of the electroluminescent panel, be careful to install the panel such that
the feeder terminal does not touch the front panel or the PC board. ( The voltage is high in comparison with that applied to
the C-MOS drive circuit used in the liquid crystal. module.) If the feeder terminal is touching the front panel or PC board
when the lighting voltage is applied to the panel, the drive circuit and LCD will fail. There is also the possibility that other
circuits (e.g. controller on the set side, MPU, etc.) may be adversely affected by the passage of voltage through the
interface.
Install the electroluminescent panel such that the luminous part coincides with the window frame (effective display area) of
the LCM front panel. The distance between the window frame of the front panel and the conductive rubber (dimension a in
Fig. 2) vaaries with each liquid crystal module, but an average is about 2.0 mm. When determining the position where the
electroluminescent panel is to be installed, be careful not to move the conductive rubber with the panel.
Observe the following standards when soldering the electroluminescent panel to the PC board.
Soldering iron temperature:
280°C +- 10°C
Soldering time:
3 - 4 sec.
Solder:
eutectic solder
If soldering flux is used, be sure to remove any remaining flux after finishing the soldering operation. (This does not apply in
the case of a non-halogen type of flux.) It is recommended that you protect the LCD surface with a cover during soldering
to prevent any damage due to flux spatters.
When soldering the electroluminescent panel and PC board, the panel and board should not be detouched more than three
times. This maximum number is determined by the temperature and time time conditions mentioned above, though there
may be some variance depending on the temperature of the soldering gun.
When removing the electroluminescent panel from the PC board, be sure that the solder has completely melted first. If you
try to pull the components apart before the solder is completely melted, the soldered pad on the PC board could be
damaged.
5.3 Driving Electroluminescent Panels
(1)
The luminance and life time of an electroluminescent panel vary depending on the drive voltage and frequency. Therefore,
it is recommended that you select the drive circuit suggested by the electroluminescent panel manufacturer. Using the
recommended product will assure the optimum brightness and working life of the electroluminescent panel.
6. Safety
(1)
It is recommended to crush damaged or unnecessary LCDs into pieces and wash them off with solvents such as acetone
and ethanol, which should later be burned.
(2) If any liquid leakes out of a damaged glass cell and comes in contact with the hands, wash off thoroughly with soap and
water.
1. Environmental Conditions
Item
Operating
Storage
Max
Min
Max
Refer to individual specifications
max 85%RH
below max absolute humidity of 40°C 85%RH
2
4.9 m/s2
19.6 m/s
(0.5G)
(2G)
2
29.4 m/s2
490 m/s
(3G)
(2G)
2
2.45 m/s2
11.76 m/s
(0.25G)
(1.2G)
Remarks
Min
Ambient Temperature
Humidity
Vibration
Shock
Vibration
Shock
29.4 m/s2
-
Corrosive gases
-
490 m/s2
(50G)
T < 40°C
T > 40°C
xyz direction
f = 5Hz-100Hz
(except resonance
frequency)
xyz direction
No corrosive gases
2. Appearance Standard
1. Appearance Inspections Condition
Visual inspections under single 20W fluorescent lamp with eyes to LCD distance 25 cm and lamp to LCD distance
25 - 30 cm. Viewing angle should be smaller than 45°.
2. Appearance Standard
No
1
2
Items
Scratches
Dents
3
Wrinkles in
Polarizer
Bubbles
4
5
Stains, foreign
materials
Applied Area
Distinguished ones are not acceptable
(To be judged by HITACHI limit sample)
Average diameter (mm)
Max.accept. number
1.0 < D
0
0.5 < D • 1.0
1
0.3 < D • 0.5
5
D • 0.3
Ignore
Filamentous
Length
(mm)
Ignore
2.0 •
1.0 •
6
7
8
9
10
Interference
fringe
Non-display
Chipped glass
Dimensions
Dark spots
Display
Thickness
Max. accept. number
(mm)
0.02 •
Ignore
0.03 •
4
0.06 •
None
Round
Average diameter (mm) Max. accept. number
D < 0.25
Ignore
0.25 • D • 0.35
4
0.35 • D
None
Those can be wiped off easily are acceptable
Distinguished ones are not acceptable
(To be judged by HITACHI limit sample)
There should be none
If it has nothing to do with function, ignore
Refer to individual acceptance specifications
Average diameter (mm) Max. accept. number
0 < 0.1
Ignore
0.1 • D < 0.3
3
Display
PCB
Module
Display
TEST CONDITIONS
3. Definition of Optical Data
Definition of q and f
Definition of viewing angle f1 and f2
φ2
K
φ1
Contrast Ratio
y θ=
180o
x’
x
φ1<25’< φ2
1,4
φ1
y’ θ = 0o
φ2
Viewing angle
Definition of Optical Response (Rise/Fall Time)
Definition of Contrast K
K=
Brightness on selected dot(B1)
Brightness on non-selected dot(B2)
(D i = “H”)
Brightness
Set Point
10%
B1
90%
100%
Brightness
Non-selected State
B2
Rise Time
(D i = “L”)
Fall Time
Operating Voltage
LOT MARKING
LOT MARKING
1. Signification of Lot Number
Lot Numbers of Hitachi LCD modules consist of four digits with the first digit for the year, the second and third digit
for the month and the fourth digit for the week.
Year Mark
Week Mark
Month Mark
Year
Figure
Week
(Day)
Figure
Month
Figure
Month
Figure
1987
7
21 - 27
1
Jan.
01
Jul.
07
1988
8
28 - 3
2
Feb.
02
Aug.
08
1989
9
4 - 10
3
Mar.
03
Sept.
09
1990
0
11 - 17
4
Apr.
04
Oct.
10
1991
1
18 - 20
5
May
05
Nov.
11
1992
2
Jun.
06
Dec.
12
1993
3
For example the lot number 4051 indicates that the display was manufactured between 21-27 May 1994.
2. Position of Lot Number
The lot number is indicated on the printed circuit board or in some cases on the metal frame on the back of the
display module
PART NUMBERING
PART NUMBERING
Original Part Numbering Convention (used until October 1996 for new display introductions) for Monochrome STN
and Colour-STN Liquid Crystal Displays.
e.g.
LMG 7380 QH F C xxx
1
2
3
4
5
6
1. Display Type
LMG = Liquid Crystal Graphics Module
2. Serial Number ( 4 digit )
3. Resolution ( 2 digit )
1st digit defines horizontal resolution, 2nd digit defines vertical resolution
Type
Number of Dots
Type
Number of Dots
A
8
N
200
B
16
P
240
C
20
Q
256
D
24
R
320
E
32
S
360
F
40
T
400
G
48
U
480
H
64
V
540
J
80
W
600
K
100
X
640
L
128
Y
740
M
160
Z
1152
4. Colour Mode and Type
S
Type
H
Grey
Mode
Feature
Normal
Temp
Y
B
G
Yellow
Blue
New Grey
Wide
Temp
W
F
C
Black/White
Double
Layer
Colour
Film
5. Viewing Mode
Type
R
F
L
E
C
Mode
Reflective
Transflective
LED
EL
CFL
Backlight
6. Options ( 3 digit )
PART NUMBERING
The following explains the part numbering convention (implemented for new displays introduced from October
1996) for Monochrome STN and Colour-STN Liquid Crystal Displays.
S P 14 Q 001 - xxx
e.g.
1 2
3
4
5
6
1. Display Type
S = Super Twisted Nematic Graphic Liquid Crystal Display
2. Module Type
Type
Mode
Backlight
X
Colour
Yes
A
Colour
No
P
Monochrome
Yes
R
Monochrome
No
3. Screen Diagonal Size (cm)
e.g. 287mm → 29,
68.7mm → 07,
14.2cm → 14
4. Display Resolution
Type
Display Type
Resolution
Y
Super XGA
1024 x 768 <Y
X
XGA
800 x 600 < X < 1024 x 768
S
Super VGA
640 x 480 < S < 800 x 600
V
VGA
480 x 320 < V < 640 x 480
H
Half VGA
320 x 240 < H < 480 x 320
Q
Quarter VGA
240 x 128 < Q < 320 x 240
N
-
128 x 64 < N < 240 x 128
M
-
M < 128 x 64
5. Serial Number ( 3 digit )
6. Options ( 3 digit )
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Headquarters
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Viale Fulvio Testi 280, I-20126 Milano
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Via O. Simoni 8
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Tel.: +39 51 73 47 00
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Via Baracca, 183; I-50100 Firenze
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Netherlands
SEI Netherland B.V.
Takkebijsters 2, NL-4817 BL Breda
Tel.: +31 76 57 22 500
Fax: +31 76 58 72 353
Norway
Jakob Hatteland Electronics AS
N-5578 Nedre Vats
Tel.: +47 53 76 30 00
Fax: +47 53 76 53 39
Email: sales/[email protected]
Postboks 34; N-1361 Billingstad
Tel.: +47 66 84 18 10
Fax: +47 66 84 19 09
Poland
ATEST
ul. Sowinskiego 5; PL-44101 Gliwice
Tel.: +48 32 380 360
Fax: +48 32 380 692
ADM Electronica S.A.
C/Tomas Breton, 50; E-28045 Madrid
Tel.: +34 91 530 41 21
Fax: +34 91 530 01 64
Sweden
S-16481 Kista; Stockholm
Tel.: +46 87 57 49 00
Fax: +46 87 57 53 53
Jakob Hatteland Electronic AB
Box 3009
S-163 03 Spånga
Tel.: +46 8 445 75 00
Fax: +46 8 364 686
Switzerland
DÄTWYLER Electronics AG
“Basix+Fenner”
Hardturmstr. 181; CH-8005 Zürich
Tel.: +41 1 276 11 92
Fax: +41 1 276 11 89
Turkey
Portugal
Amitron-Arrow, LDA
Quinta Grande lote 20 Alfragide
P-2700 Amadora
Tel.: +351 1 471 48 06
Fax: +351 1 471 08 02
South Africa
T.E.C. Timeous Electronic Components
P.O.Box 15435; Farrarmere; Johannesburg
Tel.: +27 11 425 41 93/4
Fax: +27 11 425 41 95
Email: TEC<t.e.c.@ global.co.za>
HI-Q Electronics CC.
P.O.Box 13215; N1 City (Cape Town) 7463
Tel.: +27 21 595 13 07/9
Fax: +27 21 595 38 20
Spain
Amitron Arrow SA
Albasanz, 75; E-28037 Madrid
Tel.: +34 1 30 43 040
Fax: +34 1 32 72 472
Fil Electronic Vertriebs GmbH
Hans-Böckler-Str. 17; D-73230 Kirchheim unter Teck
Tel.: +49 7021 98 530
Fax: +49 7021 98 533 4
Inter Mühendislik Danismanlik ve Ticaret A.S.
Hasircibasi Caddesi No:55;
TR-81310 Kadikoy-Istanbul
Tel.: +90 216 34 99 400
Fax: +90 216 34 99 430
United Kingdom
Abacus Polar Ltd.
Cherry Court Way
Leighton Buzzard LU7 8YY, UK
Tel.: +44 1525 37 70 93
Fax: +44 1525 85 80 01
Arrow-Jermyn Electronics
St. Martins Business Centre
Cambridge Road
Bedford MK42 0LF, UK
Tel.: +44 1234 27 00 27
Fax: +44 1234 214 674
Eurodis Bytech Ltd.
12a Cedar Wood; Chineham Business Park
Crockford Lane; Basingstoke
Hampshire RG24 0WD, UK
Tel.: +44 1256 70 72 22; Fax: +44 1256 70 71 62
Farnell Dialogue
Edinburgh Way; Harlow
Essex CM20 2DF, UK
Tel.: +44 1279 44 29 71
Fax: +44 1279 44 34 17
Farnell Electronic Components Ltd.
Canal Road; Leeds LS12 2TW; UK
Tel.: +44 1132 63 63 11
Fax: +44 1132 63 34 11
GD Technik
Tudor House; 24 High Street
Twyford
Berks RG 10 9 AG
Tel.: +44 1734 34 22 77
Fax: +44 1734 34 28 96
Macro Group
Burnham Lane, Slough
Berkshire SL1 6LN, UK
Tel.: +44 1628 60 43 83
Fax: +44 1628 66 68 73
MMD Limited
3 Bennet Court; Bennet Road; Reading;
Berkshire RG2 0QX; UK
Tel.: +44 1734 63 37 80
Fax: +44 1734 63 38 99

LIQUID CRYSTAL GRAPHIC display modules

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