Annual Report 2001 - Fraunhofer-Institut für Siliziumtechnologie

Transcription

Achievements and Results
Annual Report 2001
The double-axis articulated scanner is capable of directing light reflected
from a laser beam along variable paths an its x- and y- axis. If hundreds
and thousands of such micro-mechanical elements are combined in optical
cross-connects, they can be used to switch data in a fiber-optic network.
Annual Report 2001
4
Fraunhofer ISIT Achievements and Results – Annual Report 2001
Annual Report 2001
Preface............................................. 6
Representative Results of Work
Important Names, Data, Events
Lecturing Assignments
at Universities.................................. 58
Profile of the Institute
Brief Portrait.................................... 11
IC-Technology
Application Specific Trench IGBTs..... 32
Memberships in Coordinationboards
and Committees............................... 58
Main Fields of Activity...................... 13
Array of Microguns for
Parallel E-Beam Nanolithography...... 34
Cooperation with Institutes and
Universities.......................................58
Microsystems Technology
Optical MEMS for
Telecommunication Networks...........36
Trade Fairs and Exhibitions............... 59
Offers for Research and Service
Service Offers...................................21
Customers....................................... 22
Innovation Catalogue.......................24
MP-CC:
A Competence Cluster for Silicon
and Polymer Micro System Technology
in Schleswig-Holstein / Germany....... 37
Miscellaneous Events........................59
Scientific Publications
Journal Papers and
Contributions to Conferences.......... 60
Variable RF-MEMS Capacitors...........39
Representative Figures
Budget.............................................26
Talks and Poster Presentations.......... 60
Digital Micromirror Arrays for
Optical Switching............................. 40
Diploma Theses................................62
Staff Development........................... 27
Resist Development Tool
for Graytone Lithography................. 42
General View on Projects..............63
The Fraunhofer-Gesellschaft
at a Glance
The Research Organization...............28
IC-Design
Finite Element Simulation
of a RF-Switch..................................44
Location of the
Research Establishments...................29
Development of Designkits for
Technology Dependent Accelerated
Chipfinishing....................................45
Patents........................................... 64
Biotechnical Microsystems
Bio-MST Study
“Detection of Biological Weapons”... 46
Module Integration
A New Pilot Line for
Wafer-Level-Packaging..................... 48
Contact and Further
Information....................................65
Imprint........................................... 65
Manufacturing of an Optical
Module for UV-Laser Ablation and
Polishing the Cornea Surfaces of
Human Eyes..................................... 50
Rework of Electronic Assemblies...... 52
5
Preface
2001 was marked by the sudden onset of one
of the deepest recessions in the history of the
microelectronics industry. Its effects spread
through the whole market at an unprecedented
speed. As the year began, the industry battled to
cope with a peak in demand that effectively
absorbed any free capacity in semiconductor
production. Over a matter of weeks the market
suddenly changed, and by the end of the first
quarter the downturn was so dramatic that many
semiconductor manufacturers found themselves
in an extremely precarious situation.
Amazingly, the ISIT was hit only indirectly by the
collapse of the market. The institute’s R&D
projects were not in the least affected by the
economic crisis; not one project has had to
be canceled so far. On the contrary, the ISIT
continued to acquire major contracts from
industry even as the recession hit its lowest
point. As a result, the ISIT was able to report
2001 as its most profitable year since the
institute was founded, as illustrated by the
operational business results in the graph below.
What’s more, the institute’s workload for 2002
is already well assured, and there are promising
signs that the economic health of the semiconductor industry is likely to recover in the
course of the year. Why the ISIT was not itself
severely affected by the general malaise can
presumably be explained by the fact that
companies in the industry are increasingly
tending to cut back on in-house research in
favor of outsourcing such activities, calling on
the expertise of outside specialists like the
Fraunhofer-Gesellschaft.
Nevertheless, the economic downturn has had
an unwelcome indirect negative impact on the
ISIT’s activities: The construction of the new
semiconductor production line planned by SMI
GmbH, Itzehoe, had to be halted in May 2001,
partly in response to the recession but mainly as
a result of financial problems encountered by the
project’s main industrial sponsor, Standard
MEMS, Inc. It is now planned to find a replacement for Standard MEMS as a partner in the
joint venture, and to continue with the construction of the new semiconductor fabrication
facilities once the market situation has stabilized.
According to present planning estimates, the
project is expected to be re-launched in the last
quarter of 2002 or the first quarter of 2003.
Delays have also affected the institute’s second
major project, involving the construction of buildings to house a pilot production line for storage
cells for the company Solid Energy GmbH and a
production unit for the manufacturer of diamond
films Condias, plus facilities for various other
spin-offs of the ISIT. However, it was not the
economic situation that was responsible for the
delays, but in this case the administrative
problems related to planning permission and the
transfer of ownership of the real estate to the
investor. These problems have meanwhile been
solved, and construction work was able to go
ahead in late December 2001.
The production hall of Condias and Solid Energy to
be completed in summer 2002.
6
A satisfactory solution has ultimately also been
found for the ISIT, whereby the investor has
agreed to integrate workspace for spin-offs from
the ISIT successively on a modular basis. The two
companies involved are now waiting impatiently
for the building work to be completed in the
spring of 2002. They were both able to secure
the necessary funds for the first stage of
construction in 2001, and as a result the first
production plant is also ready for installation in
the building, as soon as it is finished. Solid
Energy intends to install a pilot production line
for lithium storage cells for the telecommunications industry, with an output of around 5 million
devices per year. Condias GmbH will be setting
up a production unit for the manufacture of
conductive diamond films (diamond-like carbon
film), which have potential uses in a large
number of applications.
One of the more interesting possible uses of
these diamond films is in waste treatment
systems for effluents that are difficult to dispose
of or break down. The company’s electrolytic
process based on conductive diamond layers
is capable of breaking down even the most
stable compounds. On the customer side, a
consortium composed of almost all of Germany’s
dockyards is intending to build sewage plants for
marine vessels where bilge water (the mixedcomposition polluted waste water that collects
in the hull of ships) can be processed in an
environmentally sound manner, rather than being
discharged into the ocean, as at present.
Condias GmbH is a spin-off of the Fraunhofer
Institute for Surface Engineering and Thin Films
(IST) in Braunschweig, set up jointly by the IST
and the ISIT in Itzehoe. In this connection,
I would like to express my deepest thanks to the
staff of the IST, and especially to Professor
Bräuer, for their cooperation.
Another company, eBiochip GmbH, which works
in the field of electrical biochips, has also started
to establish a presence in the market in terms of
turnover. Its success, and the results of many
projects in this field being worked on at the ISIT,
are an indication that the time has now come for
electrical biochips to begin to find their first practical applications in the detection of DNA/RNA,
proteins and haptenes. eBiochip’s business is
based on the further development and production of detection systems based on biochips
developed at the ISIT. I am convinced that the
research market currently being served by
eBiochip will soon turn into an end-user market.
There is good news to report in the field of interconnection and packaging techniques. A separate department for interconnection and packaging
techniques, AVT, has been set up at the ISIT
through the integration of the former Centrum
für Mikroverbindungstechnik, CEM gGmbH in
Wirtschaftsdaten Budget zum Betriebshaushalt 2001
Industrie 77,6 %
Ertragsgruppe Betrag in kEuro
Industrie
EU
Land Schleswig-Holstein
Bund/Projektträger
Sonstige
Summe Erträge BHH
Grundfinanzierung BHH
Aufwand BHH
13.779
1.714
718
1.097
439
17.747
-448
17.299
EU 9,7 %
Land Schleswig-Holstein 4 %
Bund/Projektträger 6,2 %
Sonstige 2,5 %
7
Preface
Neumünster. The merger was completed in 2001
and CEM gGmbH was officially wound up in the
autumn of 2001. The company’s former owners,
the “Deutsche Verband für Schweißen und verwandte Verfahren”, DVS, and the “Fachverband
für Sensorik”, AMA, have transferred their original
investment to the ISIT as a donation, for which I
would like to thank them most sincerely.
The new department for interconnection and
packaging techniques at the ISIT has greatly
expanded with respect to the number of staff
employed by CEM gGmbH in Neumünster, and is
now operating on the lines of the Fraunhofer
funding model, predominantly through industrial
sources of revenue. Special emphasis has been
placed on expanding the services provided to
small and medium-sized firms in the electronicsprocessing industry in Schleswig-Holstein.
The AVT department at present generates an
annual turnover of 1 million Euro from minor
service contracts, mainly related to the solving of
ISIT Organigram
MANAGEMENT
TASKS
Managing Director
Prof. Dr. Heuberger
Member of Institute Management
Dr. Windbracke
Secretary
Perna, Greiff,
Rosemann
Administration
Finder
1
2
3
4
5
IC-Technology
Microsystem
Technology
Biotechnical
Systems
Packaging,
Module
Integration
Integrated
Power Systems
Friedrich
Dr. Zwicker
Dr. Wagner
Dr. Reimer
Dr. Hintsche
Pape
Dr. Gulde
Design / Simulation
Eichholz
8
Planning of new R&D areas in cooperation with
Universities: Dr. Bernt
Marketing: Dr. Dudde
Public Relations: Wacker
Building and Installation: Dr. Krullmann
soldering problems in the manufacture of
electronic modules or circuit assemblies.
The problem of recruiting qualified staff has
become much less acute in 2001 as a result of
the recession, but it is still almost impossible to
find suitable candidates in certain specialist
fields, for instance circuit designers. Here, the
German government’s “green card” initiative,
which relaxes the conditions for the acquisition
of work and residence permits for certain categories of non-EU citizens, is beginning to have a
positive effect – there are now 5 members of
staff at the ISIT who have benefited from this
arrangement. Nevertheless, we have to expect
further full-scale confrontations with this
problem, for instance when the second
semiconductor manufacturing facility is expanded.
It remains an urgent request that political
decision-makers work towards creating more
flexible conditions in the labor market, rather
than acerbating the situation by bowing to
short-sighted trade-union pressure or imposing
excessive bureaucratic restrictions.
Meanwhile, the ISIT continues to persevere in its
efforts to give young people a taste for the fields
of microelectronics, microsystems engineering
and microengineering at an early stage in their
education. Noteworthy activities include a joint
lobbying initiative with the comprehensive
vocational training center in Itzehoe, in an effort
to establish “microtechnologist” as an official
category in the German registry of recognized
training professions. This initiative is complemented by the institute’s practice of offering sponsored, paid placements to students at participating
schools/colleges, allowing them to gain work
experience at the ISIT during academic vacations.
Both schemes are in such great demand that the
ISIT is rapidly reaching the limits of its capacity.
Overall, despite the recession in the semiconductor
industry, 2001 was a highly satisfactory year for
the ISIT. Once again, it was demonstrated that
the ISIT’s new operating philosophy responds to
the needs of industry, and is much appreciated
by its customers. The key feature of this concept
is that the ISIT, in collaboration with its partners
in industry, is capable of offering a complete
range of services, from the development of new
systems and the construction of demonstration
Dr. Jochim Scholz, AMA (l.) and Prof. Detlef von Hofe,
DVS (r.) present Prof. Anton Heuberger the CEM common
capital stock.
and test models through to series production.
Now that the ISIT no longer employs inefficiently
utilized laboratory technology for its specialized
services, but instead makes use of cost-optimized,
qualified and certified industrial manufacturing
processes from the outset, the institute is also in
a position to compete on costs.
Thanks to the commitment and outstanding
efforts of the highly qualified experts working for
the ISIT and its partners, it has been possible to
successfully translate this theory into practice,
and for this I would like to express my most
heartfelt gratitude to everyone involved in these
projects.
Anton Heuberger
9
Angular rate sensor for automotive and
virtual reality applications.
Main fields of Activity
Micro channel array for fluidic applications.
12
IC-Technology
The IC-Technology department is focused on
the development and fabrication of active and
passive silicon based devices.
In the field of active devices IGBTs, PowerMOS
and diodes are of special importance. Here, ISIT
can rely on a qualified core technology for power
devices provided by our industrial partner.
Customer specific development of power devices
is supported by simulation, design and electrical
characterisation.
Further, ISIT has many years of experience
in developing advanced CMOS processes
with appropriate simulation and circuit design
capability.
Passive components like chip-capacitors, -resistors and -coils are another field of ISIT activities.
Evaluation of new materials and its integration in
complete processes is one important topic for
passive IC development.
In addition ISIT offers customer specific wafer
processing in small and medium quantities
based on standard IC and MST technology.
This includes the development of new single
processes and process modules for all relevant
fields of semiconductor technology.
Detlef Friedrich
+49(0)4821 / 17-4301
email: [email protected]
Top and right:
various concentric channel structures made by
high rate etching.
13
Chemical-Mechanical Polishing
IC-Design
Planarisation by means of chemical-mechanical
polishing (CMP) is a key process for the fabrication of advanced ICs. The institute’s CMP
application lab is equipped with CMP cluster
tools, single- and double-sided polishers and
post-CMP cleaners for substrate diameters of up
to 300 mm and offers services on all aspects
of CMP development like
Besides the main tasks of designing and testing
mixed-signal ASICs, mainly in co-operation
with in-house departments for microsystem
development, the IC-Design department offers
the design of micromechanical and microoptical
elements using analogue HDL for modelling and
IC-layout and IC-verification tools.
• Testing of CMP equipment
• Development of CMP processes for
- dielectrics (oxide, low-k materials, ...)
- metals (tungsten, copper, ...)
- silicon
• Testing of polishing slurries and pads
• Post-CMP cleaning
• CMP-related measurement
• Custom-specific CMP services for device
manufacturing
State of the art IC-Design, FEM, and mathematics
software is used. For test purposes laboratories
equipped with hardware for electrical measurements in time and frequency domain and
for mechanical and optical standard tests are
available.
Jörg Eichholz
+49 (0) 4821 / 17 - 4537
In the field of CMP ISIT co-operates closely with
equipment and pad/slurry manufacturers, production CMP users and the wafer industry.
Dr. Gerfried Zwicker
+49(0)4821 / 17-4309
16 bit Sigma-Delta-A/D-converter.
14
ICs for MEMS applications:
prototype- and volume production.
Bildunterschriften?
15
Microsystems – MEMS
The MEMS department focuses on the application
specific development of optical, mechanical,
fluidic, and RF-MEMS components and the
integration to microsystems. We have access to
the 6-inch silicon frontend technology of the
in-house industrial semiconductor production.
Specific MEMS processes, such as wet etching
and deep RIE of Si, deposition of non-IC-compatible materials, thick resist lithography, grey-scale
lithography, electroplating, replication technologies,
wafer bonding and chemical-mechanical polishing
are available in a separate cleanroom.
The department Biotechnical Microsystems of is
focusing its activities in the field of electrical biosensor technologies. Our activities aim at the
design and construction of novel sensing arrays
in miniaturized formats. The development of so
called ultramicroelectrodes enable novel sensor
constructions and the evaluation of highly sensitive and new approaches of selective detecting
principles, e.g. the redox recycling.
The optical MEMS activities are driven by applications for optical communication and measuring
systems. Examples are fiber-optic switching
systems, laser scanners, digital micromirror arrays,
spectrometers, and also passive optical components , e.g. refractive and diffravtive microlenses.
RF-MEMS components, such as RF-switches, tunable capacitors and micro-relays are developed for
wireless communication applications. Examples of
fluidic microsystems are pneumatic microvalves,
sensor-controlled micro-pipettes and micropumps.
The physical sensor group focuses on mechanical
sensors, especially angular rate, acceleration
and pressure, and on thermal sensors. In the
EUROPRACTICE frame we offer design-house
service also for external MEMS foundry processes.
The MEMS department works in close collaboration
with the ASIC-Design and the packaging
departments in order to offer integrated microsystem solutions.
Dr. Bernd Wagner
+49 (0) 48 21 / 17-42 23
Dr. Klaus Reimer
+49 (0) 48 21 / 17 45 06
16
The integration of transducers made in silicon
technology and microfluidic systems with active
manipulation of biomolecules opens new applications in biochemical assays, medical diagnostics
and environmental analytics.
Sub-µm-electrode arrays have been developed
as a widely applicable technology platform
for analytic approaches. In combination with
microfluidic components on chip and miniaturized
or integrated electronics these components form
the basis of smart portable analytical systems.
The department Biotechnical Microsystems offers
R&D and services in the multi-channel sensor
array technology as an attractive feature for fully
electrical DNA and protein chips. Also a novel
micromachined glucose sensor enables long term
online monitoring of human body fluids.
Such biochips may be used as parts of
”lab-on-chips” and micro-total analysis systems.
For market activities a spin off company
(www. ebiochipsystems.com) have been
positioned to improve the way of biochemical
and molecular biological analysis.
Dr. Rainer Hintsche
+ 49 (0) 48 21/ 17-42 21
Foundry Service
The technological services of ISIT extend from
the development of single proccess steps
and single devices to the set-up of complete
microsystems. In close co-operation with
the industrial partner Vishay ISIT is also offering
serial production of microsystem devices with
advanced silicon production technologies.
For this foundry services ISIT assures its customers strict confidentiality concerning production
processes and products. The same methods of
quality control and qualification are applied that
were introduced into the ISIT for the qualified
and certified running Vishay production.
IC for the control of pipetting systems in sub-µl-range.
For microsystem foundry production all
technologies are available on 6‘‘ wafers
that were developed and introduced by ISIT.
These are especially:
•
•
•
•
•
Bulk Micromachining,
Surface Micromachining,
Metal Surface Micromachining,
High Aspect Ratio Microforming,
CMOS and DMOS Technologies.
Different microstructures: hologram (1), graytone sample (2),
clamping structure (3), retroreflector (4)
1
2
3
4
Dr. Ralf Dudde
+49 (0) 48 21 / 17-42 12
Wolfgang Pilz
+49 (0) 48 21 / 17-42 22
17
Assembly and Packaging Technology for
Microsystems, Sensors and Multichip Modules
Quality and Reliability of
Microelectronic Assemblies
In advanced packaging technology ISIT focuses
on wafer level packaging (WLP) and direct chip
attach techniques for multichip modules (MCMs)
and for MEMS components. For WLP a 150 mm
wafer pilot line for small to medium volume runs
has been established with following features:
under bump metallization, BCB passivation,
bumping, grinding, backsite metallization,
parameter test and dicing. The bonding of bare
dice and microsensors is realised by applying
chip-on-board (COB) and especially flip-chip
tech-nology, where bare ICs are mounted and
simultaneously interconnected face down onto
the substrate. The processes available at ISIT
include wafer preparation with chemical deposition of NiAu, different bumping techniques
(printed solder bumps, Au stud bumps), flip-chip
placement and inter-connection by adhesive
joining or soldering. Furthermore, ISIT deals with
mounting and packaging technology of power
electronic components and modules.
The main competence is attributed to the evaluation of the manufacturing quality and the
reliability of microelectronic assemblies and
modules including the as-delivered quality of
components and circuit boards. Methods are
destructive metallographic as well as non
destructive (e.g. x-ray) principles. The evaluation
of the long-time behaviour of the assemblies is
based on the matrix of requirements using model
calculations, environmental and load tests up to
failure analyses. For optimisation of manufacturing processes the institute applies process
models and fabricates samples on in-line
equipment including mass production as well as
rework systems. Furthermore, in the field of
thermal management and reliability ISIT works
on customer specific power modules.
Standard processes for hermetic package
sealing are available, e.g. metallic packages are
sealed by laser welding in inert gas atmosphere.
Furthermore, ISIT works on wafer level encapsulation of MEMS devices using glass frit and
metallic seal bonding. Automatic equipment
facilitates to enable the production of demonstration series under industrial conditions.
Karin Pape
+49(0)48 21 / 17-42 29
Thomas Harder
+49(0)48 21 / 17-46 20
18
Karin Pape
+49(0)48 21 / 17-42 29
Dr. Thomas Ahrens
+49(0)48 21 / 17-46 05
Integrated Power Systems
The increasing demand for portable systems
calls for new types of rechargeable batteries.
Besides high energy density and long service life,
safety and environmental compatibility also play
an important role. For these requirements ISIT
offers a new concept of battery based on lithium
ions, which has been developed by ISIT in
co-operation with the Faculty of Technology at
the University of Kiel. Instead of conventional
liquid electrolytes, the new batteries contain
a solid-state electrolyte. The high energy density
typical for lithium systems is in no way compromised. As the materials used are sufficiently
inert, there is no need for the usual elaborate
leakproof metal casing. The raw materials
are available in paste form, and the batteries are
produced using inexpensive thick-film technologies. They can be laid down on rigid or flexible
substrates, but it is also possible to extrude
the pastes as films which can be laminated to
form flexible foil batteries requiring no substrate.
A large number of shapes can be created by
cutting and rolling; the battery is then sealed
and encapsulated in metallized plastic.
Dr. Peter Gulde
+49(0)4821 / 17-4606
Flip-chip solder bumps on wafer.
Angular rate sensor system:
ASIC (l.), micro-mechanical sensor (r.).
19
Equipment
For the ISIT activities at Itzehoe, a complete
150/200 mm silicon technology line in a clean
room area of 2000 m2 (Class 1) including a
combined mini-environment- and SMIF-concept
for 0.5 µm CMOS technology and microsystems
technology is used. The equipment was chosen
in accordance to the latest state-of-the-art in
semiconductor industry. For specific processes of
microsystems and multichip module technology
an additional clean room area of 450 m2
(class 100) with appropriate equipment is used.
A seperate 200 m2 clean room laboratory was set
up for chemical mechanical polishing (CMP) and
post CMP cleaning processes.
Additionally, a laboratory area of 1500 m2 is
utilised for the development of chemical, biological and thermal processes, for electrical, mechanical and thermomechanical characterisation of
components and systems, for assembly and
packaging and for multichip module technology.
For the production of lithium solid polymer
cells in the capacity range of 600 – 1000 mAh
a pilot line has been established.
Both for the simulation and the design of
components and systems different commercial
software tools are installed on our in-house
computer network.
System IC for angular rate sensors.
20
Retroreflector.
Service Offers
Service Offers of ISIT
in Detail
Microelectronic components and
microsystems are used in a multitude
of products.
Studies for development of application-specific sensors, actuators,
optical and mechanical components,
microsystems, MCMs as well as for
the basics of future integration technologies.
Mounting and packaging technologies
for microsystems, sensors and MCMs.
Contract research for the development
of demonstrators to verify the feasibility of components and systems.
Failure and process analysis in
soldering technology.
The institute offers its service to
different branches of industry and
cooperates with small and medium
sized firms as well as with big
companies.
From single components to complete
systems ISIT offers design, simulation
and manufacturing to their customers.
The customers specifies the field of
application of the desired products
and the profile of requirements.
The execution of the tasks is accomplished in close cooperation with
the client. After the realisation of
demonstration models and prototypes,
the technology developed within the
project will be transferred to the
customer. Confidentiality of results and
exchanged intellectual property is
ensured.
The services of ISIT are very profitable
for small- and medium-sized enterprises which cannot afford the big
capital investments of a technological
infrastructure. They can utilise the
competence of the institute for
development, testing and introduction
of necessary technological innovations.
The auditorium and lecture rooms
of ISIT cover an area of circa 1000 m2
and are available for conferences,
workshops and other events for up to
400 participants.
Evaluation of quality and reliability of
microelectronic assemblies and power
modules.
Production of prototypes of integrated
subsystems for the development of
systems and products.
Design and manufacturing of components and assemblies in pilot- and
customer specific series by ISIT.
Consulting and support for setting up
technological production facilities.
Technology-oriented seminars
with practical training sessions and
customer specific in-house courses.
Design of components and systems
utilising industrial foundries (analogue/
mixed-signal ASICs and microsystems).
Transfer of the developed technologies,
components and subsystems to industrial technology suppliers for the
production phase or the manufacturing
in ISIT following industrial quality
standards, respectively.
Development of production tools
and process technologies for the
fabrication of semiconductors and
microsystems in co-operation with
equipment manufacturers.
Development of individual processes
for the production of integrated
circuits and microsystems.
Integration of semiconductor components with biological materials.
Module integration of microelectronic
systems and preparation of sample
series for MCM and Chip-Size packages
(CSP).
21
Customers
ISIT cooperates with companies of different
sectors and sizes. In the following some
companies are presented as a reference:
ABB, Heidelberg
Bullith Batteries AG, München
Degussa AG, Hanau
Advanced Technology Line LTO.,
Anyang City, Korea
Bundesanstalt für
Materialforschung und -prüfung,
Berlin
Detectomat
Brandmeldesysteme GmbH,
Timmendorfer Strand
Braun AG, Kronberg
Disetronic Medical Systems AG,
Burgdorf, Switzerland
HL Planartechnik GmbH,
Dortmund
IBM- Speichersysteme GmbH,
Mainz
Alcatel Kirk, Ballerup, DK
Alcatel, Stuttgart
CamLine, Petershausen
APPLIED MATERIALS, Santa Clara,
USA
C – MAC Electromag n.v.
Ronse, Belgium
Astrium, München
IC-Haus GmbH, Bodenheim
ICT, München
Dräger Pro Tech GmbH,
Lübeck
Implex GmbH,
Ismaning/München
D-Tech GmbH, Bielefeld
Conti Temic, Ottobrunn
Atmel GmbH, Heilbronn
EADS, Ottobrunn
Infineon Technologies AG,
München
EADS, Ulm
ISiltec GmbH, Erlangen
Easylab, Itzehoe
ITT Automotive Europe GmbH,
Eberhahn
Continental AG, Hannover
Atotech Deutschland GmbH,
Berlin
Basler Vision Technologies,
Ahrensburg
Contrade GmbH, Wiernsheim
Corning Frequency Control
GmbH & Co. KG,
Neckarbischofsheim
Bayer AG, Leverkusen
eBiochip Systems GmbH, Itzehoe
Judex Datasystems A/S,
Aalborg, Denmark
Creavis GmbH, Marl
Eppendorf-Netheler-Hinz GmbH,
Hamburg
Daimler Benz Aerospace,
Bremen
ESW-EXTEL Systems GmbH,
Wedel
BERU, Ludwigsburg
Danfoss Lighting Controls,
Nordborg, Denmark
Evotec Biosystems GmbH,
Hamburg
BioGaia Fermentation AB
(BioGaia), Lund, Sweden
Danfoss Drives,
Graasten, Denmark
Fibronix, Kiel
Kendrion
Binder Magnete GmbH,
VS-Villingen
Biotronik GmbH, Berlin
Danfoss Silicon Power, Nortorf
Flextronics International,
Althofen, Austria
Kolbenschmidt Pierburg AG,
Neuss
Bodenseewerk Gerätetechnik,
Überlingen
Danfoss Silicon Power GmbH,
Schleswig
Force Computers GmbH,
Neubiberg
Kugler GmbH, Salem
Borg Instruments, Remchingen
Datacon, Radfeld/Tirol
Fresnel Optics, Apolda
Bosch Telecom GmbH,
Backnang
Decker Anlagenbau GmbH,
Berg
Fuba GmbH, Gittfelde
Becker Automotive Systems,
Karlsbad
Kapsch, Wien, Austria
Beiersdorf AG, Hamburg
Kember Associates,
Bristol, UK
Kuhnke GmbH, Malente
LEICA, Jena
Bosch, Reutlingen
22
Litef, Freiburg
Heidelberger Druckmaschinen,
Kiel
Mannesmann VDO AG,
Babenhausen
Mannesmann VDO AG,
Karben
OK Media Disc Service
GmbH & Co.KG, Nortorf
Scana Holography Company
GmbH, Schenefeld
Mair Elektronik GmbH,
Neufahrn
Orbis Technologies Ltd.,
Branbury, UK
SEF GmbH, Scharnebek
Tesa AG, Hamburg
Thomson, Paris, France
Max Stegmann GmbH,
Donaueschingen
Orga Kartensysteme GmbH,
Flintbeck
microParts GmbH, Dortmund
Oticon, A/S, Hellerup, Denmark
Miele & Cie., Gütersloh
PAV Card GmbH, Lütjensee
Minimax GmbH, Bad Oldesloe
PAS GmbH, Itzehoe
Montronic-Schackmann GmbH,
Rheinstetten
Pohlmann & Partner GmbH,
Quickborn
Motorola GmbH, Flensburg
Perkin Elmer Optoelectronics,
Wiesbaden
mrt – Micro-Resist-Technology,
Berlin
MST Systemtechnik GmbH,
Doanuworth
Neutronics Althofen Electronics
GmbH, Althofen, Austria
Nokia Research Center,
Nokia Group, Helsinki, Finland
Pharmacia & Upjoh AB
(Pharmacia), Strängnäs, Sweden
Philips Semiconductors,
Gratkorn
NU-Tech GmbH, Neumünster
SensoNor, Horten, Norway
Tricumed GmbH, Kiel
Sentech Instruments GmbH,
Berlin
Trioptics GmbH, Wedel
Tronics, Grenoble, France
Sextant, Avionique,
Valence, France
Siemens AG, Bocholt
Siemens AG, Zentrale Technik,
Erlangen
VDMA
Fachgemeinschaft Fluidtechnik,
Frankfurt
Vega, Schiltach
Vishay, Holon, Israel
Siemens VDO Automotive AG,
Karben
Vishay Semiconductor GmbH,
Itzehoe
Mannesmann-VDO, Karben
SMA Regelsysteme GmbH,
Niestetal
Wabco Fahrzeugbremsen,
Hannover
Philips Semiconductors,
Hamburg
Smith Meter GmbH, Ellerbeck
P. M. C. GmbH, Usingen
Solid Energy GmbH, Itzehoe
Peter Wolters CMP Systeme
GmbH, Rendsburg
PräTEC GmbH, Rohr
Sparkolor, Inc.,
Santa Clara, USA
Woowon Technology,
Korea
ST Microelectronics,
Mailand, Italy
W. S. I.
Wafer Service International,
Evry Cedex, Paris, France
Quintenz Hybridtechnik,
Neuried bei München
November AG, Erlangen
Novo ZYMES A/S (NOVO),
Bagsvaerd, Denmark
Trelleborg GmbH, Werk 2,
Neumünster
Siemens AG, München
m-u-t GmbH, Wedel
Nanophotonics AG, Mainz
SensLab GmbH, Leipzig
Raytheon Anschütz GmbH,
Kiel
Technolas, München
Robert Bosch GmbH,
Salzgitter
TELE QUARZ GmbH,
Neckar-Bischofsheim
YAGEO EUROPE GmbH,
Pinneberg
Temic microelectronic GmbH,
Ottobrunn
23
Innovation Catalogue
ISIT offers its customers various products and services already developed
for market introduction. The following
table presents a summary of the
essential products and services.
Beyond that the utilisation of patents
and licences is included in the service.
Product / Service
Market
Contact Person
Testing of semiconductor
manufacturing equipment
Semiconductor equipment
manufacturers
+ 49 (0) 48 21 / 17-43 09, [email protected]
Chemical-mechanical
polishing (CMP), planarization
Semiconductor device
manufacturers
+ 49 (0) 48 21 / 17-43 09, [email protected]
Wafer polishing, single
and double side
Si substrates for
device manufacturers
+ 49 (0) 48 21 / 17-43 09, [email protected]
IC processes
CMOS, PowerMOS, IGBTs
Semiconductor industry
IC-users
Detlef Friedrich
+ 49 (0) 48 21 / 17-43 01, [email protected]
Single processes and
process module development
semiconductor equipment
manufacturers
Detlef Friedrich
+ 49 (0) 48 21 / 17-43 01, [email protected]
Customer specific
processing
semiconductor equipment
manufacturers
Detlef Friedrich
+ 49 (0) 48 21 / 17-43 01, [email protected]
PowerMOS devices
Electronic industry
Dr. Ralf Dudde
+ 49 (0) 48 21 / 17-42 12, [email protected]
Plasma source development
manufacturers
Christoph Huth
+49 (0) 48 21 / 17-46 28, [email protected]
Plasma diagnostics
manufacturers
Joachim Janes
+ 49 (0) 48 21/ 17-46 04, [email protected]
Etching and
deposition process control
Joachim Janes
+ 49 (0) 48 21 / 17-4 60 4l, [email protected]
Ion projection,lithography
open stencil mask technology and
resist processes
Dr. Wilhelm Brünger
+ 49 (0) 48 21 / 17-42 28, [email protected]
E-beam circuit testing and e-beam induced
circuit modification
Dr. Wilhelm Brünger
+ 49 (0) 48 21 / 17-42 28, [email protected]
Inertial sensors
Motorvehicle technology,
navigation systems, measurements
Dr. Bernd Wagner
+ 49 (0) 48 21 / 17-42 23, [email protected]
Design for commercial MST processes
Micro sensors and actuators
Dr. Bernd Wagner
+ 49 (0) 48 21 / 17-42 23, [email protected]
Microvalves for gases and liquids
Analytic, medical technology
measurement
Hans Joachim Quenzer
+ 49 (0 ) 48 21 / 17-45 24, [email protected]
Microoptical scanner
Biomedical technology,
optical measurement industry,
telecommunication
Dr. Bernd Wagner
+ 49 (0) 48 21 / 17-42 23, [email protected]
Microoptical components
Optical measurement
Dr. Klaus Reimer
+ 49 (0) 48 21 / 17-4 50, [email protected]
Design and test of analogue and
mixed-signal ASICs
Measurement,
automaticcontrol industry
Jörg Eichholz
+ 49 (0) 48 21 / 17-45 37, [email protected]
24
Product / Service
Market
Contact Person
Design Kits
MST foundries
Jörg Eichholz
+ 49 (0) 48 21 / 17-45 37, [email protected]
RF-MEMS
Telecommunication
Dr. Bernd Wagner
+ 49 (0) 48 21 / 17-42 23, [email protected]
MST Design and
behavioural modelling
Measurement,
automatic control industry
Jörg Eichholz
+ 49 (0) 48 21 / 17-45 37, [email protected]
Electrodeposition of
microstructures
Surface micromachining
Dr. Bernd Wagner
+ 49 (0) 48 21 / 17-42 23, [email protected]
Digital micromirror devices
Communication technology
Dr. Klaus Reimer
+ 49 (0) 48 21 / 17-45 06, [email protected]
Ultra micro electrode arrays
Biotechnology, medical diagnostics,
environmental analysis, process control
Dr. Rainer Hintsche
+ 49 (0) 48 21 / 17-42 21, [email protected]
Electrical protein DNA chips
Biotechnology, medical diagnostics,
environmental analysis
Dr. Rainer Hintsche
+ 49 (0) 48 21 / 17-42 21, [email protected]
Electrochemical sensors
Home care service
Dr. Rainer Hintsche
+49 (0) 48 21 / 17-42 21, [email protected]
Electrical sensor chips
Biotechnology, related electronics
medical diagnostics, environmental analysis
Dr. Rainer Hintsche
+ 49 (0) 48 21/ 17-42 21, [email protected]
Analytical microfluidic
systems
Biotechnology ,medical diagnostics,
environmental analysis
Dr. Rainer Hintsche
+ 49 (0) 48 21 / 17-42 21, [email protected]
Systemintegration
Smart card industry
Wolfgang Pilz
+49 (0) 48 21 / 7-42 22, [email protected]
Microelectrode development
Smart card industry, sensor industry,
home care industry
Wolfgang Pilz
+49 (0) 48 21 /1 7-42 22, [email protected]
Secondary lithium batteries based on
solid state ion conductors
Mobile electronic equipment,
medical applications, automotive,
smart cards, labels, tags
Dr. Peter Gulde
+49 (0) 48 21 / 17-46 06, [email protected]
Quality and reliability of electronic
assemblies (http://www.isit.fhg.de)
Microelectronic and
power electronic industry
Karin Pape
+ 49 (0) 4821/17-4229, [email protected]
Material and damage
analysis
Microelectronic and
Dr. Thomas Ahrens
+ 49 (0) 48 21 / 17-46 05, [email protected]
Thermal measurement
and simulation
Microelectronic and
Dr. M. H. Poech
+ 49 (0) 48 21 / 17-46 07, [email protected]
Packaging for microsystems, sensors,
multichip modules (http://www.isit.fhg.de)
Microelectronic, sensoric and
medical industry
Karin Pape
+ 49 (0) 48 21 / 17-42 29, [email protected]
Wafer level and ultra thin
Si packaging
medical industry
Wolfgang Reinert
+ 49 (0) 48 21 / 17-46 17, [email protected]
Direct chip attach using
flip chip techniques
medical industry
Thomas Harder
+ 49 (0) 48 21 / 17-4620, [email protected]
25
Representative Figures
Expenditure
In 2001 the operating expenditure of
Fraunhofer ISIT amounted to kEuro
17.276,8. Salaries and wages were
kEuro 5.633,3, consumables and other
costs were kEuro 11.643,5.
FhG-Allocations 4 %
Maintenance 2 %
Other positions 9 %
Salaries & wages 33 %
Consumables 16 %
Subcontracting 10 %
External R&D and license-fee 6 %
Rent, leasing costs 20 %
Income
The budget was financed by proceeds
of projects of industry/industrial
federations/small and medium sized
companies amounting to kEuro
13.779,2, of government/project
sponsors/federal states amounting
to kEuro 1.815 and of European
Union/others amounting to
kEuro 2.153.
Industry/Economy 77,6 %
European Union 9,7 %
Federal State of Schleswig-Holstein 4 %
Government/project sponsor 6,2 %
Others 2,5 %
26
Capital Investment
In 2001 the institutional budget of
capital investment was kEuro 3.942,8.
The amount of operating investment
was kEuro 408,6, project related
investments were amounted to kEuro
2.934,2 and strategic investments to
kEuro 600.
Strategic
Investments
Operative
Investments
Project related
Investments
0
500
1000
1500
2000
2500
3000
Staff Developement
In 2001, on anual average the staff
constisted of 95 employees. 47 were
employed as scientific personnel,
36 as graduated / technical personnel
and 12 worked within organisation
and administration.
3 scientists, 25 scientific assistents
and 5 apprentice supported the staff
as external assistance.
Scientists
Graduated/
technical staff
Administration
staff
External scientists
Scientific assistance
Apprentice
0
5
10
15
20
25
30
35
40
45
50
27
The Fraunhofer-Gesellschaft at a Glance
The Fraunhofer-Gesellschaft
The Fraunhofer-Gesellschaft is the leading
organization for institutes of applied research in
Europe, undertaking contract research on behalf
of industry, the service sector and the government. Commissioned by customers in industry,
it provides rapid, economical and immediately
applicable solutions to technical and organizational problems. Within the framework of the
European Union’s technology programs, the
Fraunhofer-Gesellschaft is actively involved in
industrial consortiums which seek technical
solutions to improve the competitiveness of
European industry.
The Fraunhofer-Gesellschaft also assumes a
major role in strategic research: Commissioned
and funded by Federal and Länder ministries
and governments, the organization undertakes
future-oriented research projects which contribute to the development of innovations in
spheres of major public concern and in key
technologies. Typical research fields include
communications, energy, microelectronics,
manufacturing, transport and the environment.
The global alignment of industry and research
has made international collaboration imperative.
Furthermore, affiliate Fraunhofer institutes in
Europe, in the USA and in Asia ensure contact to
the most important current and future economic
markets.
At present, the organization maintains 56 research
establishments at locations throughout Germany.
A staff of some 11,000 – the majority of whom
are qualified scientists and engineers – generate
the annual research volume of more than 900
million. Of this amount, over 800 million is derived
from contract research. Research contracts on
behalf of industry and publicly financed research
projects generate approximately two thirds of the
Fraunhofer-Gesellschaft’s contract revenue.
One third is contributed by the Federal and
Länder governments, as a means of enabling
the institutes to work on solutions to problems
that are expected to attain economic and social
relevance in the next five to ten years.
Fraunhofer scientists specialize in complex
research tasks involving a broad spectrum of
research fields. When required, several institutes
pool their interdisciplinary expertise to develop
system solutions.
The Fraunhofer-Gesellschaft was founded in
1949 and is a recognized non-profit organization.
Its members include well-known companies and
private patrons who contribute to the promotion
of its application-oriented policy.
The organization takes its name from Joseph von
Fraunhofer (1787-1826), the successful Munich
researcher, inventor and entrepreneur.
28
Locations of the Research Establishments
Itzehoe
Rostock
Hamburg
Bremen
Berlin
Hannover
Golm
Teltow
Braunschweig
Magdeburg
Paderborn
Cottbus
Oberhausen
Dortmund
Halle
Duisburg Schmallenberg
Dresden
Sankt Augustin
Aachen
Ilmenau
Euskirchen
Jena
Chemnitz
Frankfurt
Würzburg
Darmstadt
Kaiserslautern
Erlangen
Wertheim
St. Ingbert
Nürnberg
Saarbrücken
Karlsruhe
Pfinztal
Stuttgart
Freisingen
Freiburg
Efringen–Kirchen
München
Holzkirchen
29
Representative
Results of Work
Representative Results of Work:
IC Technology
Application Specific Trench IGBTs
Insulated Gate Bipolar Transistors (IGBTs) are
currently the most important power switching
devices for medium power levels in the voltage
range of 600 V - 1700 V. The device principle of
an IGBT is based on a MOS transistor which is
controlling the switching current of a Bipolar
transistor. For state of the art IGBTs a so called
trench architecture is favoured with the MOS
gate electrode embedded inside vertical trenches.
The main advantage of trench IGBTs is the
reduction of the on-state losses compared to
planar IGBTs.
VCEsat (V)
An application specific development of IGBTs
means the definition of the best trade-off
between the key features as there are the
on-state and switching losses as well as the short
circuit stability. In terms of device parameters
these features are correlated with the on-state
voltage drop VCEsat, the rise- and fall- time
of the forward current and the self limiting
on-current in a short circuit state. Unfortunately,
these parameters partly exclude each other for
device physics reasons. Within an optimisation
strategy, a compromise has to be found for the
best trade-off.
5,5
Cell Design
5
4,5
4
3,5
2,5
2
PTs
1
0,5
1,5
2
2,5
3
3,5
Figure 1:
Characteristic of on-state voltage drop VCEsat for PT- and
NPT- trench IGBTs in dependence of the trench depth.
IC
3
Figure 2:
Time characteristic of a NPT trench IGBT under short circuit
conditions. The collector-emitter voltage ( VCE, 100 V / DIV,
green ), the collector current ( I C, 2 A / DIV, red ), and
the gate voltage ( VG, 10 V / DIV, blue ) are representing the
turn-on and -off behaviour of the IGBT at T j =25 °C.
The time scale is 1 µs per division.
With regard to Punch-Through IGBTs (PT-IGBT)
the trade-off adjustment between on-state
and switching losses was maintained by proton
irradiation from the back side of the wafer.
The physical effect of proton irradiation is the
localised generation of recombination centers
within the drift zone of the IGBT in order to
speed up the carrier recombination during the
switch off phase.
4
Trench Depth (µm)
32
VCE
Depending on the choice of the proton dose
and the energy a good compromise between
the on-state voltage drop of VCEsat =2,2 V and
the fall time tfall =300 ns for a 600 V IGBT was
achieved. It has to be mentioned that the initial
values before irradiation amount to VCEsat =1,2 V
and tfall = 8 µs.
NPTs
3
1,5
B
VG
The optimisation of the Non-Punch-Through
IGBTs (NPT-IGBT) was carried out by the adjustment of the emitter efficiency of the wafer back
side p-n junction and the choice of the trench
and p-body depths.
The emitter efficiency was optimised by adaptation of the wafer grinding process (IGBT wafers
are thinned by grinding) and the choice of the
boron implantation parameters for the back
side emitter. Furthermore, the trench and p-body
configuration of the front side IGBT-cells have
significant impact on the on-state losses. As
depicted in figure 1 the on-state voltage drop
VCEsat strongly depends on the trench depths
for the NPT-IGBTs. In case of PT-IGBTs the VCEsat
reduction by trench deepening is less pronounced,
but after all in the 10 % range. Deeper trenches
are increasing the MOS-controlled electron injection into the drift region leading to a smaller
voltage drop and hence reduced on-state losses.
Typical saturation voltages of VCEsat = 2,5 V with
a corresponding fall time of tfall = 80 ns were
achieved for 1200 V NPT trench IGBTs.
The short circuit stability was adjusted by
blanking the source area inside the IGBT cells
which is decreasing the percentage of electron
injecting MOS cells. The current characteristic
of a nominal 4A NPT-IGBT under short circuit
conditions is shown in figure 2. The self stabilising current saturation occurs at a peak value of
about 6A. As an alternative to this approach
trench IGBTs were designed with an integrated
current sense for a current limitation which is
controlled electronically.
The technological process of trench IGBTs suitable for 600 V and 1200 V is illustrated by the
SEM cross section shown in figure 3. The picture
shows the cell arrangement of a fully processed
IGBT with a cell pitch of 5 µm. The trench depth
amounts to 3,6 µm with a width of 1 µm.
Within the trenches the gate oxide along the
edge and the poly-Si gate electrode is clearly
seen. The top aluminum metallisation is
covering the entire active area of the IGBT with
a dielectric isolation of the trench regions in
between. The IGBT process is based on a
qualified production technology of our industrial
partner VISHAY.
Figure 3:
SEM cross section of a fully processed trench IGBT. The
trench depth is 3,6 µm. The gate oxide appears as small
double line between silicon substrate and the poly-Si gate
electrode material. The metalization is interconnecting the
source areas of the IGBT.
33
IC Technology
Array of Microguns for Parallel
E-Beam Nanolithography
Parallel e-beam lithography based on an electronically driven array of electron microguns has
the potential for future use in high throughput
mask fabrication. In cooperation with Thales/
Thomson-CSF, the University of Cambridge and
the University of Lyon, ISIT is developing a
demonstrator suitable for sub 100 nm parallel
e-beam lithography. This research activity is
carried out within the frame of the European
project NANOLITH.
resist with sub 100 nm e-beam size
HV-CMOS circuit
(microgun control units)
post accelaration system
(PAS)
Extraction and
focusing electrodes
Carbon nanotubes (CNT)
The goal of the project is the fabrication of a
first demonstrator with parallel driven microguns
for resist exposure experiments at ISIT site.
The demonstrator is consisting out of a microgun
chip and a special ASIC for current and dose
control assembled by hybrid integration, as
shown in figure 1.
The working principle of the microgun is based
on the electron field emission properties of
single carbon nanotubes (CNT) with low electron
affinity. Each microgun is composed of a single
nanotube, an extracting lens and a focusing lens.
Figure 2:
SEM picture of cathodes with single carbon nanotubes
(CNTs) as emission sources (University of Cambridge).
Patterned CNT
Catalyst
53 nm
CNT
body
10 µm
34
Figure 1:
Schematic cross section of an array of electron microguns.
The CNTs are fabricated at the University of
Cambridge by CVD based solid phase epitaxy
on Ni catalysts, as illustrated in figure 2.
An average field emission current in the nA-range
was achieved for single carbon nanotubes.
With regard to the overall system specifications
of CNT currents in the 1-10 nA range within
exposure intervals up to 10 µs a special electronic
circuit was designed, fabricated and analysed
by ISIT. Since the extracting voltage for the
microgun amounts to 50 V a high voltage CMOS
process was required.
The purpose of the microgun electronics depicted
in figure 3 is to select a CNT-pixel and control a
CNT emission current flow within a fixed time
interval by switching a high voltage transistor.
It is the goal to ensure a constant current-timeproduct, which is equivalent to a specific dose
value for resist exposure. That means, a fixed
time interval per pixel corresponds to a minimum
current value in order to reach a required exposure dose for the resist. If the emission current is
e.g. 1 nA the exposure time needed for a resist
sensitivity of 20 µC/cm2 amounts to 2 µs for a
pixel size of 100 nm x 100 nm. In case the current
value is higher the exposure time has to be
reduced by the dose control circuit. In conclusion,
the dose control unit ensures the required dose
also in case of varying current values of the
CNT emitters. Next to the dose control circuit
also the pixel current is controlled in order to
avoid an under exposure if the current is below a
certain limit. The microscopic picture of figure 3
illustrates the analog part of the ASIC for the
pixel electronic of one microgun.
As predicted by circuit simulation the general
function of the charge and current control
could be verified by first measurements with
current values below 10 nA within exposure time
intervals in the µs-range.
The functioning of the dose control was verified
by the course of the start and stop signal illustrated
in figure 4. Both signals representing the status
of the driver transistor for the CNT emitter.
In order to demonstrate the ability of the dose
control unit the electronic circuit was externally
adjusted for two different dose values by
corresponding input data. The time interval
between the start signal (green) and the response
of the stop signal (red, blue) gives the measure
for the dose calculation under the assumption
of a constant emission current. In this example
the adjusted dose values were reached within an
exposure interval of approx. 3 µs (red) and 5 µs
(blue) for an emission current below 10 nA.
It has to be mentioned that beside to lithographic
applications the CNT microgun approach seems
to be feasible for flat panel display techniques,
also.
stop
start
0
0,0
1,0
2,0
3,0
4,0
5,0
6,0
7,0
8,0
9,0
time [µs]
Figure 4:
Dose control measurement results. The interval between the
start and stop signal indicates the required exposure time.
Figure 3:
Microscopic picture of the analog part of the microgun
circuit.
35
Optical MEMS Switches for
Telecommunication Networks
In order to increase the bit-rate and capacity
modern telecommunication continuously moves
towards optical fiber networks. Especially the
development of dense wavelength division
multiplexing (DWDM) that enables parallel
transmission of large numbers of individual data
channels through a single optical fiber has
increased the demand for optical components.
Presently, the delay and effort caused by the
conversion of optical into electrical signals
(OEO conversion) at the network nodes slow
down the data transmission and limit the
network expansion. A smart solution for alloptical switching is based on MEMS technology.
Tiny movable micromirrors can be fabricated
to redirect the beam from the input fiber onto a
certain output fiber. Such an Optical CrossConnect (OXC) will eliminate the need of OEO
conversion and thus enables much higher data
rates. In the United States MEMS technology
is dominantly based on polysilicon surface
micromachining. However, thin polysilicon
micromirrors have an unsufficient mirror flatness
and surface roughness. This leads to a high
power transmission loss in an optical switch.
Based on several years of experience in fabrication of electrostatically driven miniature laser
scanners for advanced imaging applications ISIT
has developed an array of optical MEMS-switches
(figure 1). Each of these silicon micromirrors
can be deflected two-axial by electrostatic forces
in order to provide an optical connection of N
input fibers to N output fibers. This concept
allows to build optical cross-connects scalable
to large port counts. Each MEMS scanner
consists of a bulk Silicon mirror plate suspended
by nickel torsional hinges. The combination
of bulk silicon technology with metal surface
micromachining seems to be ideal for dense
arrangements of large movable mirrors. While
suspensions made of silicon would either be
to fragile or to stiff, electroplated nickel
suspensions however can combine robustness
and reliability with sufficient flexibility to enable
the required mirror deflections. Since the
thickness of the single-crystalline mirror plate
largely influences the flatness the thickness
can be adapted to the required optical
specifications without changing the mechanical
behaviour.
Figure 1:
Micromirror array for 16 x 16 optical cross-connects.
36
MP-CC: A Competence Cluster for Silicon
and Polymer Micro System Technology in
Schleswig-Holstein/Germany
The “Micro Plastics – Competence Cluster”
(MP-CC) integrates in unique way the knowledge
and technological skills of fine mechanics,
plastics engineering and silicon technology in
Schleswig-Holstein. On the one hand, the project
partners act as a technology and service provider
for customer specific products. On the other
hand, the joint network develops and prototypes
high tech products for MST applications like
micro lenses, diffractive optical elements (DOEs)
or fluidic channel structures.
High precision surface topography is generated
by advanced lithography process technology.
Digital or arbitrary shaped surface reliefs from
nanometer to micrometer scale can be formed.
Furthermore diffractive gratings and dot matrix
holograms for decoration or security application
can be created. The resist structures are then
copied to metal shims by a special electroplating
process. These Nickel shims are available for
various polymer replication processes like hot
embossing, roll embossing or injection molding.
The combination of silicon and plastic technology
leads to innovative fields of application.
By integrating silicon micro system devices into
the injection molding process the plastic encapsulation of these silicon chips can have additional
functional structures. MP-CC thus represents
the complete technology chain and offers global
services (figure 1).
Up to date three different mastering technologies
are used for the generation of functional surface
structures for optical, mechanical and fluidic
micro devices. In addition to digital lithography
with thin and thick resist layers the Fraunhofer
Institute for Silicon Technology ISIT has profound
knowledge in grey scale lithography. It enables
the production of arbitrary formed 3D surface
topographies, including the production of
refractive micro lens arrays with various lens
diameter and lens height up to 25 µm. Other
applications are diffractive optical elements
(DOEs), e.g. echelette gratings, Fresnel lenses,
wave corrector plates or corner cubes (figure 2).
Figure 2:
Grey scale micro lenses and corner cubes.
Scana Holographic Company GmbH has set up a
nickel electroplating process with high grade
planarization characteristics to manufacture nikkel shim copies of the original resist surface.
Scana also uses dot matrix resist exposure for
mastering holographic elements. In visible spectra these holograms are utilized for security
labels, product identification or visual design.
Moreover, holograms which are invisible for
human eyes are used to carry hidden information for increased security needs. Replication of
the nickel master into thermoplastic polymers is
carried out on the in-house developed ScanaFigure 1:
MP-CC technology chain.
press 2001 roll embossing machine (figure 3).
resist mastering
advanced lithographic 3D structuring
replication
injection molding
galvano mastering
nickel galvano forming
roll embossing
silicon-in plastic integration
37
Figure 3:
Silicon master, nickel shim and roll embossing replication in
polyacetate foil.
For higher aspect ratios, replication by hot
injection molding process is preferred. The core
competence of Kuhnke GmbH is injection
molding for various applications like electrical
relays or pneumatic valves. The high volume
manufacturing of plastic precision components is
based on fine mechanics for molding tool
construction and excellent micro injection process
control. Besides the replication of 3D surfaces
a key technology will be the integration of
Silicon MEMS devices in polymer encapsulation
within the injection molding process. In addition
the molded plastic housing can contain
functional geometrical elements. Examples are
micro channels or armature shafts.
As a potential application partner Basler Vision
Technologies takes over the role of prototyping
optical elements and systems. The costs of
automated optical quality control like compact
disc inspection or web inspection (paper, textile
or rolled steel production) can be lowered
substantially through the use of high quality
polymer optics.
38
The IZET Innovationszentrum Itzehoe completes
the scope of the competence cluster by
providing marketing and market analysis
skills and knowledge. The website www.mpcc.de integrates the marketing efforts of
MP-CC products and services and acts as a
common data base.
The interaction between the particular technology processes is ensured by internal standard
interface geometries. Fast prototyping of
new geometry designs is offered. MP-CC services
are open to any potential customer and reaches
from advisory consultation up to full customer
adapted production.
Variable RF-MEMS Capacitors
Future micromechanically variable RF-capacitors
represent a challenging alternative to existing
semiconductor devices. The major advantages of
RF-MEMS capacicators / switches are low insertion
loss, high isolation and high Q-values. Figure 1
shows a scematic view of a RF-MEMS switch. The
upper electrode of a MEMS capacitor is formed
as a suspended microbeam. Using electrostatic
forces the air gap and thus the capacitance can
be changed in a digital or analog operation mode.
Typical on-capacitance values are in the order of
1 pF, the off-capacitance about a factor of 50 lower.
The RF-MEMS switches are realized in a metal
surface micromachining process using nickel
electroplating. Compared to polysilicon the metal
process achieves lower resistive losses and better
RF-performance. In oder to reduce substrate
losses high resistance silicon substrates are used.
To obtain a high on/off capacitance ratio the
dielectrics
suspended bridge
CPW lines
capacicator
Figure 1:
Scematic view of an RF-MEMS variable capacitor.
Figure 2:
Top view of an electroplated nickel suspended capacitor plate.
lower electrode and the sacrificial layer have to
be smooth. For the sacrificial layer electroplated
copper has been chosen which can be etched
selective to the nickel beam. The developement
concentrates on the reduction of driving voltage,
switching time and temperature sensitivity.
Figure 2 shows a micrograph of the nickel bridge
suspended over the lower electrode.
RF-MEMS switches can be implemented in
several important applications. At first, in mobile
communication RF-switches are needed in future
multistandard-multiband mobile phones, wireless
LAN and in the base stations. A second application are phased-array antennas, which can be
electronically steered and reconfigured. Here,
RF-MEMS devices switch phase shifters of the
individual antenna elements. Further applications
can be found in automotive anti-collision radar
systems, RFIDs and in test equipment.
39
Figure 1:
Digital Micromirror array (DMA) with 65536 mirror elements
(The array is trapezohedral distorted for application reasons).
Figure 2: Corner of the DMA.
40
Figure 3: Shaped driving electrodes.
Figure 4: Tilted mirror.
Digital Micromirror Arrays
for Optical Switching
Fraunhofer ISIT is active in the field of digital
micromirror arrays (DMA) for more than seven
years. Optimizing our metal surface micromachining technology we are able to fabricate
DMAs with 420 mm2 array area and 65536
elements with optical surface quality (figure 1+2).
DMAs are becoming a key component for a
new class of digital devices, such as projection
displays, imaging systems and printing systems.
Especially in telecommunication optical switching
is an important feature. Selection free connection
of optical fiber bundles e.g. in telephone central
offices is one of the main application.
The actual process flow allows a wide range
of parameter variation. A single mirror line with a
few tenth of elements is just possible as an array
of 256 x 256 elements. The mirrorplate size
could vary from 50 µm x 50 µm to 150 µm x 150
µm (more details see table 1). Our 3D electroplating enables us to integrate wedge shaped
electrodes (figure 3) to reduce the address
voltage for the electrostatic mirror actuation.
Chip size:
Mirror edgelength:
Mirror array size:
Tilting angle:
Resonant frequency:
Switching speed
Mirrorplate flatness:
Driving voltage:
Up to 30 mm x 30 mm
50 µm to 150 µm
Up to 256 x 256 elem.
Up to ± 15° (mech.)
Up to 25 kHz
About 50 µs
< 120 nm
160 V (typical value)
60 V (biassing mode)
Monolithical integration
on address circuit:
Feasible
Table 1:
Typical parameters for DMAs at Fraunhofer ISIT.
A good CD control reduces the mirror spacing to
less than 2 µm (figure 4). The stress optimized
electroplating process for the mirrorplate results
in flatness values smaller than 120 nm (figure 5).
Because of the low process temperatures during
the metal surface micro-machining process
monolithical integration of the mirrorarray on a
preprocessed wafer with the mirror address
circuits fabricated in BCD technology is feasible.
Figure 5:
White light interferometer plot of
100 µm mirror plate flatness.
41
Resist Development Tool
for Graytone Lithography
Graytone Lithography is a promising technique
for real 3D structuring of resist surfaces
(figure 1 + 2), which can be used in a wide field
of application, like micro electronics, micro
fluidics and micro optics. Beside sophisticated
mask design the resist development has to be
well controlled. In the case of digital lithography
inhomogeneities across the wafer during the
resist development process can be compensated
by over development. This degree of freedom
is not applicable for developing graytone
exposed resist.
Figure 1:
Retroreflector structures (corner cubes)
Therefore the Fraunhofer ISIT desined and
constructed a specific graytone development
tool. Main goal was to ensure the constant
supply with the same concentration of developer
over the whole wafer independent of the local
coverage and the local developmant rate. In
addition the tool should work automatically and
should process in minimum four wafers at a
time. Figure 3 shows the concept of the graytone
resist development tool. There are three parameters to adjust separately: the vertical developer
flow, the wafer rotation and the wafer tilting
relative to the vertical flow. A set of values
for each parameter has been evaluated. Figure 4
shows the graytone development tool integrated
in the wet bench equipment in the lithography
cleanroom area. With graytone lithography
fabricated micro lens arrays (figure 5) replicated
in Polycarbonate show a variation of the effective
focal length of less than 1% (1 σ) over the whole
wafer area.
Up to now the Fraunhofer ISIT has three resist
thicknesses (9 µm, 17 µm and 25 µm) with two
different resist contrast values available. Combined with five shape-tables (0,80 µm – 0,96 µm
pitch) for the graytone design a wide range of
different topographies could be realized to cover
the fabrication capabilities for a lot of devices.
Figure 2:
Central part of a fresnellens.
42
Figure 3:
Concept of the graytone resist development tool.
Figure 4
Installed graytone resist development tool.
Figure 5
Part of micro lens array replicated in polycarbonate.
(lens pitch = 150 µm, 10000 lenses)
43
IC Design
Finite Element Simulation
of a RF-Switch
capacitance [pF]
The finite element (FEM) tool ANSYS was used to
simulate the behavior of a capacitive bridge
switch. This device consists of a Nickel membrane
with an air gap underneath. By applying a DCvoltage to an underlying signal line the membrane is pulled down and stops finally at the passivation layer, which protects the metallic signal line.
no roughness
+/- 150 nm roughness
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
The bridge switches between a low OFF capacity
and a high ON capacity, which can be viewed as
a short circuit for RF frequencies. The development and optimization of such devices is part of
European MELODICT project. Finite element
Figure 1:
View of the bridge switch with a DC-voltage applied.
The dark blue region of the 500 µm long bridge has collapsed to the broad signal line
0
5
10
15
20
25
30
voltage[V]
Figure 3:
C-V curve of a bridge switch. The blue curve was simulated
neglecting roughness of the membrane, the red curve
includes roughness by assuming in the ON state a
remaining 150 nm air gap, which leads to the reduced ON
capacity of 0.8 pF.
modeling of this kind of electrostastic actuators
includes electro-mechanical coupling. This is
done in an iterative scheme, i.e. switching between mechanical simulations to obtain the
deformed membrane, and electrostatic simulations to obtain the electric field in the deformed
geometry. The electric field then yields the force
for the next mechanical simulation. This has to be
repeated until field and deformation do not
change anymore.
The mechanical part of the FEM simulation has to
be handled carefully to avoid numerical divergence.
This is due to the highly nonlinear character of
the contact problem and stress stiffening. It
turned out that the critical parameter in ANSYS
for controlling convergence is the so called
contact stiffness, that must be tuned adequately.
Having successfully overcome the divergence
problems, the modeling of the bridge switch was
extended to include the influence of external
temperature, prestress and stress gradient.
Figure 2:
Side view of the bridge switch with 20 V applied. The undeformed and deformed membrane can be seen. The electrostatic force is shown by arrows pointing down.
44
The most important data, which the simulation
has to compute, is the C-V curve, i.e. capacity as
a function of applied DC voltage. This curve
shows a typical hysteresis and has two discontinuities, which define the collapse voltage and
the release voltage.
Development of Designkits for Technology
Dependent Accelerated Chipfinishing
With the ability to process an increasing amount of
designs in an increasing number of different technologies the need for accelerated chipfinishing procedures has arised to speed up the time from the
finished product design to final mask design. The
aim is it to take the single product design, made by
ISIT or the customer himself, and to generate a
cost and place optimised final mask design. To
reduce errors the procedure is fully automised and
integrated in the design environment of CADENCE,
the IC-design-software that is used.
FhG-ISIT
Final Mask Placement
Based on the optimisation results the final
step in mask preparation is the placement of the
product design as an array into the reticle design
including process specific lithography and test
structures.
The entire tool, programmed in the CADENCE
specific command language SKILL, is the ideal tool
for design engineers which are intesively involved
in process development and mask generation.
Customers
Designs
Technology A
Technology B
Designkit
• Litho Mark Generator
• Reticle Array Optimizer
• Final Mask Placement
Technology C
Figure 2: Cross-Section window.
Submission to Mask-Shop
Figure 1: Design flow.
Generator for Lithography
and Monitoring Structures
To introduce new technologies an important task
is the generation of a set of process dependend
structures for alignment and monitoring. This set
can be generated automatically and the result
can be checked by the integrated cross-section
viewer. It is actually planned to integrate an
additional direct interface to fab control systems
to control the direct effect of process modifications on the given structures.
Figure 3:
Stepping array optimisation based
on generic algorithms.
Figure 4:
Top GUI (graphical user
interface) of the new tool.
Reticle Array Optimizer
Stepping time as well as the ideal amount of
exploitation of the given wafer area is of interest
for an economical production. Therefore a tool
has been implemented which calculates the
optimal reticle size configuration based on
generic algorithms.
45
Figure 1:
Portable detection system with electrical biochips.
fluidic control
waste
data transmission
environmental
sample
sample
preparation
electrical
biochip
46
evaluation
electronics
Bio-MST Study
“Detection of biological weapons”
“The threat potentials posed by biological
weapons are largely underestimated by the
German politics as well as by the German public.”
This is the first sentence of a study published
in July 2001 bearing the subtitle “defence
strategies from the viewpoint of new microsystem and biochip technologies.”
The approximately 90-pages study reviewing
the detection of biological weapons was compiled
by Anton Heuberger and Rainer Hintsche
on behalf of the federal ministry of defence
and published by the Fraunhofer Institute of
scientific-technical trend analysis (INT), more than
3 month before the tragic attacks have happened
in the USA. Due to the anthrax attacks in the
USA the statements in the study proved to
be very close to reality and gained great interest
in the public.
The study shows the immense threat potential
posed by the use of different biological weapons.
It brings to attention the often much higher
toxicity of such substances compared to chemicals
and the relatively easy availability. In the closing
words it warns explicitly of the danger of attacks
by terrorist organisations. “Due to the fact that
we are living in a time of great politic stability
the need for action results primarily due to the
threat posed by terrorism including state terrorism
by rouges countries. It would be fatal to wait
with preventive measures until the first worst case
has happened.“
Figure 2: Scheme of a bioweapons detector.
The analysis of existing and utilised systems for
the defence of biological weapons reveals a
limitation towards classical decentralised lab
systems, except a few very conventional and
insufficient systems in the USA. The immediate
set-up of a rapid to be activated and possible
area-wide detection system for the protection of
the civil population is strongly recommended.
Here the application of electrical biochip
technology, developed at ISIT in the department
“biotechnical microsystems” in combination
with a microfluidic module is an option.
The application of an autonomous detection
system automatically taking environmental
samples (water, air) and testing them for several
biological hazardous substances was evaluated.
The results of the tests are transmitted to a
central control station. The core of the detection
system consists of electrical biochips and antibody-coated particles. In initial feasibility studies
such a system proved the suitability for a highly
sensitive and specific detection of environmental
toxins.
Even the detection of picomolar concentrations
of proteins like toxins was proven. This very
low detection limit is suitable for the detection
of the most toxic biological weapon known
to mankind, the botulinus toxin (0.1 µg are
lethal for an average human). With a total
of 5 death victims the USA had to learn how
insufficient they are prepared for such attacks
and as a result remarkably increased the
financial support for the development of
protective systems. It is to be hoped that there
has not to be a first tragic case in Germany
before it will act in a similar way.
Source: Anton Heuberger und Rainer Hintsche,
“Detektion biologischer Kampfstoffe – Abwehrstrategien unter dem Gesichtspunkt neuer
Mikrosystem- und Biochiptechnologien”,
Erstellt im Auftrag des Bundesministeriums der
Verteidigung, Herausgegeben vom Fraunhofer
Institut für Naturwissenschaftlich-Technische
Trendanalysen (INT), Juli 2001.
47
Module Integration
A New Pilot Line for Wafer-Level-Packaging
In september 2001 a new pilot line for wafer
level packaging was put into operation at
Fraunhofer ISIT in cooperation with a customer.
Wafer-level-packaging (WLP) is a new packaging
concept for electronic devices. All devices on a
wafer are concurrently supplied with a miniaturized chip-size package (WL-CSP) as additional
process step of the front end process.
The minimized assembly area of electronic
devices in wafer-level-packaging (WLP) is of
major importance for mobile electronic devices.
To improve their mobility, consumers demand a
very compact geometry of devices like cellular
phones, GPS-receivers and Personal Digital
Assistants (PDA).
Figure 1:
Crustomer specific chip-size packages with solder balls and
BCB passivation before wafer dicing.
48
The advantage of the new packaging concept is
the distribution of the electrical contacts over the
full area of the component. Even with a contact
pitch of 0,8 mm, 25 contacts can be placed on a
device with an area of 4,5 mm x 4,5 mm.
This package contains all major functional
elements of a standard leadframe package in a
very restricted geometry. The package provides
electrical contacts and a passivation layer for
each device. The electrical contacts of each
device can be replaced from the periphery to the
area of the devices. This redistribution is achieved
by a sputter deposited under bump metalization
layer (UBM). The UBM is composed of an
adhesion promoting layer, a diffusion barrier and
a solderable surface. The UBM can be directly
applied on the primary wafer passivation layer.
Before UBM depositon, sputter back etching is
performed to achieve a low contact resistance to
the device bond pads. The UBM layer has a total
thickness of less than 2 µm. During the wet
chemical etching of the UBM, solder pads and
lateral redistribution tracks can be formed at the
same time. Subsequently, the UBM is covered
with a solder resist mask.
The basic steps of the wafer level
package process are:
• UBM (under bumb metallization)
• BCB (benzocyclobutene)
• wafer grinding
• ball attachment
• backside marking
• wafer testing
• wafer dicing
Although a wafer leaves the front end with a
final wafer passivation layer, e.g. silicon nitride,
Benzocyclobutene (BCB) as an organic secondary
passivation layer is applied on the wafer additionally to the front end process. This passivation
layer is only applied on the active side of the
wafer improving the protection against
environmental influences like e.g. moisture.
The edges and the backside of the device are left
without any further protection. Additionally,
the organic BCB passivation layer of about 5 µm
thickness serves as a solder resist layer for soft
solder contact balls.
Preformed solder balls of a diameter between
300 µm and 500 µm are attached and soldered
to the solder pads on wafer level. The balls are
automatically centered on the solder pads. For
devices with 0,8 mm pitch, about 25000 balls
can be placed on each 6" wafer.
Being in wafer state, the components are marked
by laser on the backside of the wafer. After
wafer testing and dicing, a taping machine
checks the presence of the solder balls and laser
markings of each component and tapes the
component with the bumps upside down.
This is the usual way of supply to the SMT
assembly operation. The SMT pick&place
machine will check for the pin-1 mark of the
device and will place the device corresponding
to the outline.
Figure 2:
Cross section of a solder ball, part of a CSP with
interconnection and BCB passivation.
Depending on the application, a large contact
pitch of the WL-CSP of 0,8 mm can be chosen.
This pitch corresponds with the standard-JEDEC
definition of a CSP mounting surface and allows
the use of clean- and non-clean flux processes
during the substrate assembly. No additional
underfill process is required to achieve industrial
reliability levels during thermal cycling.
The wafer level packaging is beneficial for silicon
devices with small to medium contact numbers
and for integrated passive high-frequency devices.
The processes for tacky flux print, solder ball
application, and reflow are compatible with
wafers up to 300 mm diameter.
The Fraunhofer ISIT pilot line is not only available
for devices manufactured in Itzehoe but the
service is offered to other companies as well.
Different companies developing new products on
wafer level, stated their interest for co-operation
and service offers.
49
Module Integration
Manufacturing of an Optical Module for
UV-Laser Ablation and Polishing
the Cornea Surfaces of Human Eyes
Manufacturing
Using UV-Lasers the dream to live without glasses
or contact lenses is becoming real. Today wavefront aberrations caused by astigmatism or
higher order aberrations can be compensated by
a thickness modelling of the outer cornea.
Laser Treatment Techniques
Laser ablation techniques of the human cornea
have been continuously improved. Older
techniques directly ablated the outer cornea
(PRK-treatment) by laser radiation.
The actual Lasik-technique cuts first a 160 µm thin
circular flap of the epithel that is bend to one side
and then thins down the cornea by local laser
ablation to achieve the desired wavefront correction. The flap is then bent back and pressed.
By capillary forces, the flap sucks down to
the cornea by itself serving as a natural plaster.
The treatment of the inner cornea is less painful
and improves and fasten the heal up process.
Today, the healing process is performed according
to scientific directions of the commission for refractive surgery on an area around 6 mm diameter to
avoid so called ghost pictures in the dark. This
effect is caused when the pupil widens beyond
the laser treated zone. The patient senses a second
view area. According to the directions, a minimum
cornea thickness above 250 µm is retained.
The Zyoptix-technique developed by the german
company Technolas Ophthalmologische Systeme
GmbH, a subsidiary of Bausch & Lomb is the
furthest developed laser treatment technique
today, offering a fast individually designed
treatment. It is based on the above mentioned
Lasik-method with further improvements in the
measurement of physiological eye anomalies,
improved laser scan control by fast eye tracking
and truncated gaussian laser beam profile with
two spot sizes to ablate and polish the cornea
surface. With this technique, the surgeon is able
to provide an individual treatment to correct the
specific wavefront aberrations of each eye of a
patient.
50
Laser Beam Modification
A special UV-radiation intensity profile was
developed by Fraunhofer ISIT and Technolas to
achieve smooth transitions between overlapping
ablation spots on the cornea. In a joint research
effort, the feasibility for a intensity profiling,
radiation hard UV-mask with very low back
reflection and indication of use could be demonstrated. The glass chips are manufactured on
double side polished 150 mm quartz wafer.
The demanded truncated gaussian intensity
profile could be realised by a special computer
based mask structuring algorithm. Experimental
devices used chips precision bonded in cavities
of chip card-like carriers to ease handling and
shipping. During the development phase,
different departments became involved ranging
from mask design, microsystems technology
including wafer dicing and inspection operations
up to module integration.
Maturing of a Process Flow
To provide a sufficient number of experimental
chips, Fraunhofer ISIT established a customer
specific production flow with all the required
quality assessment steps and work organisation.
Embedded in a logistics schedule provided by
Technolas, ISIT became one link of a supplychain. The internal process flow was re-organised
at ISIT to avoid extra work and improve efficiency.
A further optimisation was gained from harmonising the ISIT process flow with the processes of
the other suppliers and the customer itself.
The single work-steps became distributed to
the site which is best experienced. In this way,
a cost efficient, well balanced and supervised
process flow could be realised for this precision
experimental device. Each work step is defined in
a work description to provide the base for
a later quality audit through Technolas.
The operators are trained frequently to secure a
high state of knowledge.
Each single treatment opening in the chips is
inspected before and after dicing to screen out
patterning defects, resident particles or scratches
in the substrate. For this purpose, a semi-automatic wafer defect finder was constructed at ISIT.
The machine is fitted with a high resolution
CCD-camera and different lighting to visualise
defects. Pictures are automatically evaluated
in respect to given failure criteria and devices
become inked in case of a failure.
A UV-dicing tape is used to lower the necessary
forces for chip pick-up. The chip is then assembled
at ISIT into the cavity of a flat carrier. A precision
flip chip placing machine from ESEC Micron 2 is
available for this purpose. A UV-curing adhesive
is used to attach the diaphragms into position.
Each placement position is automatically inspected
and recorded together with the barcode identification of each carrier. The database is later on
used for process control and yield statistics.
Fracture tests are statistically performed on
the final product to control the stability of the
adhesive bond.
The finalised carriers are supplied to Technolas
for final quality control, software activation and
distribution.
• The scientific experience and technical infrastructure of different departments within
ISIT were successfully integrated to achieve an
efficient internal process flow and work
organisation homogeneously interfaced with
the additional companies in the supplychain.
• A medium size volume production was started
at ISIT according to the quality specifications
of Technolas.
• Beside the pure technical issues, a mutual
confidence could be developed between
the different suppliers in the supply-chain
which eased the further harmonisation of the
processes and quality assessment procedures
at different companies.
Figure 1:
Zyoptix-card with
three apertures for
UV-laser ablation of
the cornea after
assembly at ISIT.
Conclusions
• ISIT has developed a chip for the modification
of the intensity profile of a UV-laser according
to a customer specification. The chip integrates
the truncated gaussian intensity profile characteristics together with very low back reflectivity,
radiation tolerance and treatment indication.
• A versatile carrier concept, the so called
Zyoptix-card was developed. The chip
is implanted into the treatment card which
provides mechanical protection as well as
counterfeit and misuse protection as an
integral part of a risk management system.
Figure 2:
The Zyoptix-card provides an individual
treatment to correct the specific defective vision of each eye.
51
Module Integration
Rework of Electronic Assemblies
Due to its long-period experience in the field of
qualification of electronic assemblies the working
group “Quality and Reliability of Electronic
Assemblies” as part of the department Module
Integration has developed to a center of competence. A new crucial field of work is the
rework of complex electronic assemblies. Failure
analysis, development of rework strategies as
well as customized optimization of rework
process technologies are the goals of these
activities.
The increasing rate of automation and systems
intelligence in the manufacture of printed board
assemblies has not diminished the importance
of rework and repair. A zero-defect manufacturing is not attainable. At present, the acceptable limit of defects in a large-scale production
Figure 1:
Layout ISIT rework-testboard layer 4.
52
lies at about 100 dpm (defects per million),
however, often this quality is not reached. From
the fluctuation of defect rates it can be
demonstrated that a reliable process control
by optimization and by the definition of the
production steps is essential for success.
Therefore, all relevant parameters have to be
defined. Investigations show that in most cases
this is not realized. Additionally, inspections,
notations, analyses and deducting arrangements
as well as an integration into the continuous
improvement process are of importance.
For preserving value-added quota, repairing
processes have to be qualified and integrated
into the manufacturing process of devices.
The increasing application of BGAs and CSPs
leads to advancements in the repair process.
Figure 2:
ISIT rework-testboard, components placed.
Module Integration
Hidden soldered connections require machine
supported repairing, because manual soldering
is not applicable.
Based on our ongoing investigations, a rework
testboard has been developed which features the
following:
• typical complex SMDs requiring the use of
system assisted rework,
• rigid multi-layer board containing two inner
layers with variations in Cu density to simulate
different thermal demands in the soldering
process,
• different Pb-free soldering surfaces
(e.g. chem. Sn, chem. NiAu).
The central point of repairing complex components is heating without damaging.
On the one hand, there is the soldering heat
requirement which is necessary e.g. for the
activating the flux, heating the assembly up
to soldering temperature (distinctly higher
then the liquidus of the used solder) as well
as achieving the soldering temperature after
maximally 3-5 min. On the other hand, there is
the soldering heat resistance of both the component and the circuit board. The heating rate
should not exceed 1-2 K/s, the temperature
should be above 100°C for maximally 5 min and
maximally 60 s above liquidus. Theoretical observations from simulations and temperature
measurements using the practice-oriented ISIT
rework testboard yield the fundamental principles for a successful soldering with Rework and
series process.
Training at either the customer's site or the ISIT
complements the comprehensive services offered.
Based on a detailed analysis, a custom reworkstrategy is developed with the electronic
assembly manufacturer. Concrete proposals are
presented for integrating a rework system into
the existing production concept, accompanied by
development of customer-specific solutions.
Rework stations, also appropriate for the selective mounting e.g. for the prototyping, enable
a reliable process control and offer possibilities
for a process-related documentation.
The systematics of profiling for the rework
process is demonstrated using the ISIT rework
testboard and by the customized electronic
assemblies. A temperature profile within the
defined process section will be worked out.
Hereby, rework offers directly controlled
processing. Manufacturing sequence (process
optimization) as well as influencing factors
300
temperature [°C]
temperature [°C]
Figure 3:
Measured solder profiles, comparison between Pb-free
and SnPb.
temperature profile of BGA soldering
with Sn 62 Pb 36 Ag 2 solder paste
250
219°C)
205°C)
200
300
temperature profile of BGA soldering
with Sn 95.5 Ag 3.8 Cu 0.7 solder paste
257°C)
250
236°C)
200
150
150
100
100
upper side of BGA (max. 257°C)
upper side of BGA (max. 219°C)
50
50
lower side of PCB (max. 202°C)
lower side of PCB (max. 239°C)
solder joint (max. 236°C)
solder joint (max. 205°C)
0
0
0
60
120
180
240
time [sec]
54
0
60
120
180
240
time [sec]
Figure 4:
BGA-solder joints, side view and cross sectional view.
(design) can be varied and the result can be
observed immediately. This knowledge contributes to understand the series process. The
participants of this workshop are encouraged to
conduct practical training with various hot-gas
and infra-red rework systems, respectively. In the
course of this training they are introduced and
supported to the following items:
• temperature profiling during rework,
• application of different selectiv soldering
systems,
• preparation of the soldering surfaces including
reballing
• set-up of soldering programs,
• soldering out and in of complex ICs
(BGA and CSP),
• treatment of special assembly arrangements,
• the subject of multiple soldering.
The output in the field of rework is qualified
by a quality assessment of the electronic
assembly. Possible process defects are presented
and analysed. Hereby, the evaluation takes
place on the basis of technical state-of-the-art
standards (e.g. ICP-A-610). Besides the general
quality requirements these standards describe
more detailed demands for soldered connections.
It has to be emphasised that there is no guarantee for reliability by only visual quality control of
soldered connections but the complete soldering
procedure as well as the environmental factors
are of importance. Methods are destructive
metallographic as well as non destructive
(e.g. x-ray) principles. The evaluation of the
long-time behaviour of the assemblies is based
on the matrix of requirements using model
calculations, environmental and load tests up to
failure analyses.
55
Annual Report 2001
Lecturing Assignments
at Universities
Memberships in
Coordination Boards
and Committees
H. Bernt:
Halbleitertechnologie I und II,
Technische Fakultät der ChristianAlbrechts-Universität, Kiel
T. Ahrens:
Coordinator of AOI-Anwenderkreis
(Automated Optical Inspection)
A. Heuberger:
Lehrstuhl für Halbleitertechnologie,
Christian-Albrechts-Universität, Kiel
P. Lange:
Lehrbeauftragter Elektrotechnik,
Fachhochschule Westküste, Heide
T. Ahrens:
Member of DVS Fachausschuß
Löten
R. Hintsche:
National Delegate of COST
Nanoscience & Technology
Advisory Group (NanoSTAG)
K. Pape:
Member of VDI Fachausschuß
Assembly Test, VDI, Frankfurt
T. Ahrens:
Member of DVS Fachausschuß
Mikroverbindungstechnik
K. Pape:
Member of BVS, Bonn
T. Ahrens:
Member of Hamburger Lötzirkel
K. Pape:
Member of FED
W. H. Brünger:
Member of Steering Committee:
Electron, Ion and Photon Beams
and Nanofabrication, EIPBN, USA
H. C. Petzold:
Member of NEXUS Executive Board
W. H. Brünger:
Member of VDI Fachausschuß:
Maskentechnik, VDI, Düsseldorf
H. C. Petzold:
Co-editor of mst news
M. Reiter:
Member of “Arbeitskreis
Lotpasten”
T. Harder:
Member of European Network
˝Adhesives in Electronics˝
M. Reiter:
Member of “Arbeitskreis Bleifreie
Verbindungstechnik in der
Elektronik”
A. Heuberger:
Advisory Editor of International
Journal of Semiconductor
Manufacturing Technology;
Microelectronic Engineering
A. Heuberger:
Member of NEXUS Board
A. Heuberger:
Member of NEXUS Excecutive
Board
A. Heuberger:
Member of NEXUS Academic
Working Group
A. Heuberger:
2. Chairman of an International
Conference on Micro Electro,
Opto, Mechanic Systems and
Components
Institut für fluidtechnische Antriebe
und Steuerungen, RWTH, Aachen
Institut für Werkstoffe der
Elektrotechnik, RWTH, Aachen
Aalborg University, Aalborg,
Denmark
Hahn-Meitner-Institut, Berlin
Technische Universität Berlin
TU Braunschweig, Fachbereich
Elektrotechnik, Institut für
Elektrophysik
Technical University of Budapest,
Department of Electronic
Technology, Budapest, Ungarn
Cambridge University, UK
M. Reiter:
Member of Gf Korr “Arbeitskreis
Korrosionsschutz in der Elektronik”
W. H. Brünger:
Section Head: Micro and Nano
Engineering, MNE 01, Grenoble
T. Harder:
Member of European Network
˝COMPETE˝
58
Cooperation with
Institutes and Universities
Rutherford Appleton Laboratories,
Didicot, UK
TU Dresden, Institut für Halbleiterund Mikrosystemtechnik
Karl-Franzens University, Graz,
Austria
Ernst-Moritz-Arndt-Universität
(EMAU), Greifswald
CEA Leti, Grenoble, France
M. Reiter:
Member of “Industrie-Arbeitskreis
Know-How-Transfer mikrotechnischer Produktion”
G. Zwicker:
Head of Fachgruppe Planarisierung /
Fachausschuss Verfahren / Fachbereich Halbleitertechnologie und
–fertigung der GMM des VDE/VDI
Max-Planck-Institut für
Mikrostrukturphysik, Halle
Universitätskrankenhaus
Eppendorf, Hamburg
Universität Hamburg, Abteilung für
Biochemie und Molekularbiologie
Fachhochschule Westküste, Heide
University of Technology, Helsinki,
Finland
Institut für Fügetechnik und
Werkstoffprüfung (IFW), Jena
Christian-Albrechts-Universität,
Technische Fakultät und Institut für
Meereskunde, Kiel
FH Kiel
IEMN-ISEN, Lille, France
City University, London, UK
University of Southern California,
Los Angeles, USA
Université catholique de Louvain,
Louvain-la-Neuve, Belgium
Fachhochschule Lübeck
CNRS-Université Claude Benard,
Lyon, France
TU München
Universität der Bundeswehr,
München
SINTEF, Oslo, Norway
Universität Oulu, Finland
Rutherford Appleton Laboratory
Oxford, UK
University of Perugia, Perugia, Italy
Royal Institute of Technology
(KTH), Stockholm, Sweden
VDI/VDE-Technologenzentrum
Informationstechnik, Teltow
Fachhochschule Wedel
Technische Universität Wien,
Austria
Trade Fairs and
Exhibitions
Miscellaneous Events
Flip Chip & Chip Scale
Europe 2001.
International Convention &
Exhibition on Innovative Electronic
Packaging and Assembly
Technologies,
March 21 – March 22, 2001,
Böblingen
“Aspekte moderner Siliziumtechnologie” Public lectures. Monthly
presentations, ISIT Itzehoe
Hannover Messe 2001,
AMA Sensorik Centrum.
April 23 – April 28, 2001,
Hannover
Hannover Messe 2001,
Innovation Market for
Research and Development.
April 23 – April 28, 2001,
Hannover
SMT/ES&S/Hybrid 2001.
System Integration in Micro
Electronics, Exhibition and
Conference,
April 24 – April 26, 2001,
Nürnberg
Sensor 2001.
10th International Trade Fair and
International Congress: "Sensoren,
Messaufnehmer und Systeme”.
May 8 – May 10, 2001,
Nürnberg
Laser 2001.
15th International Trade Fair and
International Congress,
June 18 – June 22, 2001,
München
Productronica 2001.
14th International Trade Fair for
Electronic Production,
November 6 – November 9, 2001,
München
“Inspektion in der Baugruppenfertigung” Seminar. February 7
– February 8, 2001, ISIT Itzehoe
“Mikrotechnologie: Arbeitsplätze
der Zukunft”. Information event
and press conference. Speakers:
Michael Rocca, Staatssekretär im
Ministerium für Wirtschaft,
Technologie und Verkehr des
Landes Schleswig-Holstein, Prof.
Anton Heuberger, ISIT, HansJoachim Ramlow, ÜAZ,
February 14, 2001, ISIT Itzehoe
“Manuelles Löten von SMTBauelementen” Seminar.
February 21 – February 23, 2001,
ISIT Itzehoe
“Der Lötprozess in der
Elektronikfertigung” Seminar.
October 15 – October 17, 2001,
ISIT Itzehoe
“Manuelles Löten von SMT-Bauelementen” Seminar. November
14 – November 16, 2001,
ISIT Itzehoe
“SMT-Rework-Praktikum” Seminar.
November 14 – November 16,
2001, ISIT Itzehoe
“Erfolgreiche Integration des CEM
in das Fraunhofer ISIT” Press
conference. Speakers: Prof. Detlef
von Hofe, Deutscher Verband für
Schweißen und verwandte
Verfahren, Dr. Joachim Scholz,
Fachverband für Sensorik e.V.,
Karin Pape, ISIT, Prof. Anton
Heuberger, ISIT, December 20,
2001, ISIT Itzehoe
“Der Lötprozess in der
Elektronikfertigung” Seminar.
March 5 – March 7, 2001,
ISIT Itzehoe
“SMT-Rework-Praktikum” Seminar.
April 4 – April 5, 2001, ISIT Itzehoe
“Direktmontage ungehäuster
Bauelemente” Seminar.
May 16 – May 17, 2001,
ISIT Itzehoe
ISIT-, Vishay-Presentation at “Tag
der beruflichen Bildung” organized
by Berufliche Schule des Kreises
Steinburg. July 17, 2001, Itzehoe
“Mobiles SMT-Rework-Praktikum”
Seminar. September 5 –
September 6, 2001, DVS,
Düsseldorf
ISIT, Vishay-Presentation at
“Tag der Ausbildung” organized by
ÜAZ Itzehoe. September 15, 2001,
Itzehoe
“Direktmontage ungehäuster
Bauelemente” Seminar.
September 19 – September 20, 2001,
ISIT Itzehoe
59
Journal Papers
and Contributions to
Conference
T. Ahrens:
Zerstörungsfreie Prüfung in der
Qualitätsbewertung elektronischer
Baugruppen.
VTE – Aufbau- und Verbindungstechnik in der Elektronik 4,
p.194-203, August, 2001
T. Ahrens:
Elektronische Baugruppen zerstörungsfrei prüfen.
VTE – Aufbau- und Verbindungstechnik in der Elektronik 6,
p.305-313, December, 2001
Talks and Poster
Presentations
V. Sukhorukov, M. Kürschner,
S. Dilky, T. Lisec, B. Wagner,
W. A. Schenk, R. Benz,
U. Zimmermannn:
Phloretic-Induced Changes of
Lipophilic Ion Transport across the
Plasma Membrane of Mammalian
Cells. Biophysical Journal,
Vol. 81, p. 1006-1013, 2001
M. Christophersen, P. Merz,
J. Quenzer, J. Carstensen, H. Föll:
Deep Electrochemical Trench
Etching with Organic Hydrofluoric
Electrolytes.
Sensors and Actuators A, 88 (3) ,
p. 241-246, 2001
T. Harder, W. Reinert:
Low-Profile Flip Chip Assembly
using Ultra-Thin ICs. Proceedings
of 13th European Microelectronics
and Packaging Conf. (IMAPS),
p.310, Strasbourg May, June, 2001
W.I. Milne, K. B. K. Teo,
M. Chhowalla, G. A. Amaratunga,
J. Yuan, J. Robertson,
P. Legagneux, G. Pirio, D. Pribat,
K. Bouzehouane, W. H. Brünger
C. Trautmann:
Carbon Films for Use as the Electron
Source in a Parallel e-Beam Lithography System. New Diamond and
Frontier Carbon Technology Vol 11,
No.4, p. 235, 2001
H. Pristauz, W. Reinert:
Handling Concepts for Ultra-Thin
Wafers. Proceedings of 13th
European Microelectronics and
Packaging Conf. (IMAPS),
Strasbourg p. 336, May, June,
2001
O. Schwarzelbach, G. Fakas,
W. Nienkirchen:
New Approach for Frequency
Matching of Tuning Fork
Gyrocopes by Using a Nonlinear
Driving Concept. Proceedings of
Transducers 01 11 th International
Conference on Solid-State Sensors
and Actuators, p. 464-467,
June 10 – June 14, 2001
60
T. Ahrens:
Rework komplexer SMT-Baugruppen.
Seminar: Manuelles Löten von
SMT- Bauelementen, ISIT, Itzehoe,
February 21, 2001
T. Ahrens:
Lötqualität. Seminar: Der Lötprozess
in der Fertigung elektronischer
Baugruppen, ISIT, Itzehoe, March 5,
2001
T. Ahrens:
Rework-Strategien. Seminar: Der
Lötprozess in der Fertigung elektronischer Baugruppen, ISIT, Itzehoe,
March 6, 2001
T. Ahrens:
Einbau der Zuverlässigkeit.
Seminar: Der Lötprozess in der
Fertigung elektronischer
Baugruppen, ISIT, Itzehoe,
March 7, 2001
T. Ahrens:
Rework and Repair von elektronischen Baugruppen.
4. Europäische ElektroniktechnologieKolleg, Colonia St. Jordi, Mallorca,
Spanien, March 16, 2001
T. Ahrens:
Rework-Strategien.
Der Lötprozess in der Fertigung
elektronischer Baugruppen, ISIT,
Itzehoe, October 15, 2001
T. Ahrens:
Baugruppen- und Fehlerbewertung.
Seminar: Der Lötprozess in der
Fertigung elektronischer Baugruppen, ISIT, Itzehoe, October 16,
2001
T. Ahrens:
Lötqualität.
Seminar: Der Lötprozess in der Fertigung elektronischer Baugruppen,
ISIT, Itzehoe, October 16, 2001
Diploma Theses
L. Blohm:
Realisierung der drahtlosen
Anbindung eines µC-gesteuerten
Messgerätes an eine PC-Plattform
in Verbindung mit der Optimierung
der Datenerfassungs- und
Steuersoftware.
Fachhochschule Westküste, Heide,
2001
U. Bott:
Untersuchung und Weiterentwicklung eines Herstellungsprozesses
von Mikrolinsen auf Glassubstraten.
Fachhochschule Lübeck,
2001
C. Werlich:
Entwicklung eines autarken
Gatetreiberbausteins für
Zuverlässigkeitsuntersuchungen.
Fachhochschule Westküste, Heide,
2001
62
General View on Projects
Overview of Projects
•
Hochtemperatur-ElektronikStudie
•
Entwicklung von Super-JunctionStrukturen für HochvoltPowerMOS-Anwendungen
•
•
•
•
Halbleiterbauelemente hoher
Leistung
Entwicklung einer Fertigungstechnologie für NPT-Trench-IGBTs
im Spannungsbereich bis 1.2 KV
Entwicklung eines Prozessmoduls zur Herstellung lokaler
Wärmesenken auf vollständig
prozessierten BCDMOS Wafern
Prozessierung von Wafern mittels
Silizium-Trockenätzen
zur Erzeugung spezieller
Si-Strukturen
•
Fabrication of Capacitor
Structures
•
Development of a Metal Resistor
Process Module and its Integration
into an Existing ID-Process
•
Evaluierung eines IR-Ofens zur
thermischen Behandlung dicker
Lacke, IR BAKER
•
•
•
•
•
•
Micromachined Electromechanical
Devices for Integrated Wireless
Communication Transceivers,
MELODICT
•
Entwicklung eins modularen
Mikroanalysesystems, EASY-LAB
•
Micro-Scanning Endoscope
with Diagnostic and Anhanced
Resolution Attributes
•
Entwicklung eines Spektrometers
mit Stufenplatten
•
Herstellung von Nanolichtquellen
zur hochauflösenden Inspektion
von biologischen Proben
•
Kostengünstige Herstellung von
Mikrosystemen: Verbundtechnik
von Kunststoff und Silizium
(MP-CC)
•
Entwicklung eines hochdruckfesten Drucksensors
•
Entwurf einer 1/0- Schaltung für
Handy-Anwendungen
Herstellung mikrooptischer
Linsenarrays aus Glas
•
Untersuchung an mikromechanischen Drehraten-Sensoren
Electric DNA Chips for Bioprocess
Control
•
Integriertes mikrobiologisches
Sensorsystem zur Abwasseranalyse
Aufstellung und Erprobung
einer Waferreinigungsanlage
auf der Basis von Ozon mit
kryomagnetischer Siliziumscheibenlagerung
Evaluierung von Slurries zum
chemisch-mechanischen Polieren
von SiO2
Planarisierung von Glaswafern
Prozessentwicklung für die
Herstellung von terrasierten
Silizium-Strukturen
Maskenentwurf für “Integrated
Discretes”
•
Developement of an Micro
Gyroscope (Mechanics and
Electronics), STARS
•
Entwicklung eines ASICs für
Automotive-Anwendungen
(LIBRA)
•
•
•
Entwicklung eines mikromechanischen Luftmassensensors
•
Entwicklung eines in Siliziumtechnologie hergestellten
pneumatischen 3/2-WegeMikroventils
•
•
Fabrication of Inductor Structures
•
Herstellung von SiGe BraggGittern
•
Optische Reflexionsgitter auf
Tantalpentoxid
•
Einsatz der Ionen-ProjektionsLithographie im Fertigungsprozess für die kontaktlose
Strukturierung planarer,
magnetischer Speichermedien
•
Herstellung und Replikation von
großflächigen 3D-Nano- und
Mikrostrukturen, NanoFab
•
Entwicklung von kapazitiven
HF-Schaltern
•
Kalte Ionenquelle für die
Ionen-Projektions-Lithographie
•
•
Ausgasverhalten von
e-beam-Lacken
Herstellung eines statischen
Spiegel-Arrays mit GrautonLithographie
•
Entwicklung und Herstellung
von Flowsensoren
•
Musterfertigung von Blendenkarten mit Soft-Blenden
•
Fertigung eines Spiegelarrays
mit elektrischem Anschluß und
Beurteilung der Mikrospiegeltechnologie
•
Micro Well Plates with Transparent Stimulation Electrodes
•
Entwicklung eines 4x4 Arrays
von Zweiachsen-Mikrospiegeln
•
Fabrication, Assembly and
Testing of a Miniature Two-Axis
Laser Scanner and a High
Voltage Amplifier
•
Prozessentwicklung zur
Herstellung von Nonostrukturen
in Siliziumnitrid
Arrays of Microguns for Parallel
e-Beam Nanolithography,
NANOLITH
•
Entwicklung von Post-CMPReinigungsprozessen für die
Fertigung von zukünftigen
integrierten Schaltkreisen in der
Si-Technologie
•
Erprobung eines Post-CMPReinigungssystems auf der Basis
des Jet-Steam-Cleaning für
300mm Wafer
•
European Access to Manufacturing Service for MEMS on
SOI Micromachining Technologies
•
Silizium-Chipsystem für die
biochemische Analysentechnik:
Technologische Plattform und
Systemintegration Teilvorhaben:
Messverfahren und biochemische Assays
•
Silizium-Chipsystem für die
biochemische Analysentechnik:
Technologische Plattform und
Systemintegration, Teilvorhaben:
Testchips und Testverfahren
•
Entwicklung von Ultramikroelektrodenarrays und Integration
in ein automatisiertes fluidisches
Analysesystem
•
Advanced Insulin Infusion Using
a Control Loop
•
•
Festkörper-Lithiumakkumulatoren
•
Network of Excellence in
Multifunctional Microsystems,
NEXUS 2000
•
Customer Support and Design
Centre for Physical Measurement
Systems, EUROPRACTICE III
CCMeSys
•
Microactuator Competence
Centre, EUROPRACTICE III
CCMicro
•
Alternatives Löten von Mikrobausteinen
•
Laserlöten von Silizium-Pyrex
mittels Glaslot zur Kapselung
von Mikrosensoren
•
Mikrosystemtechnik 2000+,
µ-Encoder mit zentrischer
optischer Abtastung
•
Bonden mit Cu-Draht in der
Leistungselektronik
•
Flip-Chip-Technologie mit
gedünnten Siliziumchips für
intelligente Etiketten
(Smart-Label)
•
Chipkartenbestückung mit
Grautonblenden
•
Ultra-Thin Packaging Solutions
using Thin Silicon
•
Thematic Network “Adhesives in
Electronics”
•
Flip Chip Die Bonder for UltraThin Silicon
•
Herstellung porenarmer Weichlötverbindungen
•
Reflow und Wellenlöten mit
bleifreien Loten
•
Zuverlässigkeit mikrotechnischer
Lötverbindungen
•
Die elektronische Baugruppe der
Zukunft
•
Modulintegration und Gehäusetechnik für großflächige Mikrosysteme
•
Stressoptimierte Montage und
Gehäusetechnik für mikromechanisch hergestellte SiliziumDrehratensensoren
Manufacturing Cluster,
EUROPRACTICE III MC 1
63
Contact
Please contact us for further information.
We would be glad to answer your questions.
Fraunhofer-Institut
für Siliziumtechnologie Itzehoe
Fraunhoferstraße 1
25524 Itzehoe
Telephone +49(0) 4821 / 17-4211 (Secretary)
Fax +49(o) 4821 / 17-4251
e-mail [email protected]
http://www.isit.fhg.de
Press and Public Relations
Claus Wacker
Telephone +49 (0) 48 21 / 17-42 14
email [email protected]
Imprint
Editor
Claus Wacker
Layout / Setting
Anne Brodmeier, Hamburg
Lithography
TypoDesign GmbH, Hamburg
Printing
Beisner Druck GmbH, Hamburg
Photographs:
Title, pp. 10, 14, 15, 17 top, 19, 20 bottom,
36, 40 top, 46, 53 photo company Itzehoe
p. 51 Technolas
other pictures ISIT

Annual Report 2001 - Fraunhofer-Institut für Siliziumtechnologie

Transcription

Similar documents

read more - Night Hotels

ISIT brochure

AC SAR - RWTH Aachen University

View - Fraunhofer-Allianz Energie - Fraunhofer

Annual Report 2003 - Fraunhofer-Institut für Siliziumtechnologie

Annual Report 2004 - Fraunhofer-Institut für Siliziumtechnologie

Layout 3

Flyer Minting - Sack und Kiesselbach

in construction and facility management

QUICK INSTALLATION GUIDE SPECIFICATIONS

CONOSCOPE offers

Scooter Soundboards - WilTec Wildanger Technik GmbH