The AVE55 service manual

Transcription

ORDER NO. AVS9602118C8
Digital AV Mixer
WJ-AVE55
SPECIFICATIONS
Source Input :
Video Input :
Y/C input:
Audio Input :
Character Input :
Recording Output :
Video Output :
Y/C Output :
Audio Output :
Preview Output :
Video Output :
Back Colour :
Wipe Patterns :
Video Gain :
S/N (typical) :
x4 (SOURCE 1/4)
1.0 Vp-p/75Ω PAL composite signal, pin-jack
Y signal : 1.0 V[p-p]/75Ω, C signal : 0.3 V[p-p]/75Ω Mini Din 4-pin connector
–6 dBs 20 kΩ pin jack (L/R)
x1 (TITLE) ; 10-pin connector for optional Character Generator WJ-TTL7
x1 (REC OUT )
1.0 Vp-p/75Ω PAL Composite signal, pin-jacks
Y signal ; 1.0 V[p-p]/75Ω, C signal ; 0.3 V[p-p]/75Ω Mini Din 4-pin connector
–6 dBV/1 kΩ, pin jacks (L/R)
1.0 Vp-p/75Ω PAL Composite signal, pin-jacks
White, Yellow, Cyan, Green, Magenta, Red, Blue,Black and Useable
157 patterns
Unity
Video 50 dB (composite), 50 dB (Y/C)
Audio ; 60 dB
Power Source :
220 - 240V AC, 50 Hz
Power Consumption :
Approx 19W
Ambient Operating Temperature : 0°C - 40°C (32°F - 104°F)
Ambient Operating Humidity :
Less than 90%
Dimensions:
420 (W) x 300 (H) x 88 (D) mm
Weight:
2.5 kg
Weight and dimensions indicated above are approximate.
Specifications are subject to change without notice.
C 1996 Matsushita Communication Industrial Co., Ltd.
All rights reserved. Unauthorized copying and
distribution is a violation of law.
!
WARNING
This service information is designed for experienced repair technicians only and is not designed for use by the
general public.
It does not contain warnings or cautions to advise non-technical individuals of potential dangers in attempting to
service a product.
Products powered by electricity should be serviced or repaired only by experienced professional technicians. Any
attempt to service or repair the product or products dealt with in this service information by anyone else could
result in serious injury or death.
This symbol warns the user that uninsulated voltage within
the unit may have sufficient magnitude to cause electric
shock. Therefore, it is dangerous to make any kind of contact
with any inside part of this unit.
CAUTION
RISK OF ELECTRIC SHOCK
DO NOT OPEN
CAUTION:
TO REDUCE THE RISK OF ELECTRIC SHOCK,
DO NOT REMOVE COVER (OR BACK). NO USER
SERVICEABLE PARTS INSIDE.
REFER SERVICING TO QUALIFIED SERVICE
PERSONNEL.
This symbol alerts the user that impotant literature concerning
the operation and maintenance of this has been included.
Therefore, it should be read carefully in order to avoid
any problems.
IMPORTANT SAFETY NOTICE
There are special components used in this equipment which are important for safety. These parts are indicated
by the ” Y ” mark on the schematic diagram and the replacement parts list. It is essential that these critical
parts should be replaced with manufacturer's specified parts to prevent shock, fire, or other hazards.
Do not modify the original design without permission of manufacture.
Standard Accessory
Optional Accessory
Power Cord
Character Generator
1 pc.
WJ-TTL7
CONTENTS
MAJOR OPERATING CONTROLS AND THEIR FUNCTIONS ........................................................................................... 1
SYSTEM CONNECTION ...................................................................................................................................................... 5
CIRCUIT DESCRIPTION
IC DESCRIPTION .............................................................................................................................................................. 6
ADJUSTMENT PROCEDURE..............................................................................................................................................27
LOCATION OF TEST POINTS AND ADJUSTING CONTROLS .........................................................................................30
APPEARANCE OF IC,TRANSISTOR AND DIODE.............................................................................................................31
CHIP COMPONENTS...........................................................................................................................................................32
BLOCK DIAGRAM
SWITCH BOARD ...............................................................................................................................................................34
MAIN BOARD(1/2) .............................................................................................................................................................35
MAIN BOARD(2/2) .............................................................................................................................................................36
SCHEMATIC DIAGRAM
MAIN BOARD(2/2) .............................................................................................................................................................38
MAIN BOARD(1/2) .............................................................................................................................................................40
SWITCH BOARD ...............................................................................................................................................................41
POWER BOARD................................................................................................................................................................41
CONDUCTOR VIEW
MAIN BOARD ....................................................................................................................................................................37
SWITCH BOARD ...............................................................................................................................................................41
POWER BOARD................................................................................................................................................................41
EXPLODED VIEW ................................................................................................................................................................42
REPLACEMENT PARTS LIST.............................................................................................................................................43
MAJOR OPERATING CONTROLS AND THEIR FUNCTIONS
Side View
(1) Power Switch (POWER ON/OFF)
POWER
ON
OFF
POWER Section
(2) Power Indicator
POWER
TRANSITION SELECT Section
TRANSITION SELECT
WIPE/MIX
LUM KEY CHROMA KEY
SET
(3) Wipe / Mix Selection Button (WIPE/MIX)
(5) Chroma Key Button
Used to replace certain colour of one picture with a
second picture.
Used to select either the Wipe or Mix Effect.
Lighting :
shows the Wipe selection
Blinking :
shows the Mix selection
(6) Set Button
Used to select the position for the chroma function.
(4) Luminance Key Button
Used to replace certain luminance of one picture with a
second picture.
1
ON SCREEN DISPLAY SETTING Section
ON SCREEN DISPLAY SETTING
WIPE
EFFECT
COL.
FADE
AUDIO
(7) Wipe Button (WIPE)
(10) Fade Button (FADE)
Used to display the Wipe menu on the preview monitor.
Used to display the Fade Setting menu on the preview
monitor.
(8) Effect Button (EFFECT)
(11) Audio Button (AUDIO)
Used to display the Effect Setting menu on the preview
monitor.
Used to display the Audio Setting menu on the preview
monitor.
(9) Colour Button (COL.)
Used to select the colour for the back screen or wipe
edge.
POSITION/COL. CORRECT Section
POSITION/COL.CORRECT
SELECT
SCENE
COL.
POSITION GRABBER CORRECT
R
G
B
(12) Select Button (SELECT)
(14) Scene Grabber Indicator (SCENE. GRA.)
Used to select the POSITION, SCENE GRABBER or
COL CORRECT.
Notes :
1. Scene Grabber is available in
pattern.
2. When selecting the CHROMA ON mode and press
the desired Effect Output Button, colour correction
is available.
(15) Colour Correct Indicator (COL CORRECT)
(16) Joystick Control
This joystick Control has two functions - setting the
position of the specified wipe pattern , moving the cursor for setting the chroma key and correcting the
Colour A-bus / B-bus.
(13) Position Indicator (POSITION)
2
SOURCE SELECT Section
SOURCE SELECT
TIME
2
1
4
MIN
MAX
8
A BUS
AUTO FADE
SOURCE
1
SOURCE
2
SOURCE
3
SOURCE
4
BACK
COL.
EFFECT
STILL
AUTO TAKE
B BUS
(17) A-bus Selection Buttons (A)
(20) Still Out Buttons (STILL)
SOURCE 1: Used to select Source 1 Audio/Video
Signals (35)(36)(37) supplied to the rear panel.
BACK COL: Used to select the Back Colour.
An instant still or frozen image can be obtained by
pressing this button.
(21) Mix/Wipe Control (MIX WIPE EFFECT)
Mix and wipe can be performed by operating this control.
(22) Time Control (TIME)
For adjusting the transition time of Auto Fade Function
and Auto Take Function.
(18) B-bus Selection Buttons
Same selection can be available as mentioned in the Abus Selection buttons (17).
(23) Auto Fade Button (AUTO FADE)
(19) Effect Out Buttons (EFFECT)
(24) Auto Take Button (AUTO TAKE)
Automatic fade can be executed according to the time
set by TIME Control.
Used to supply the effect signal to the preview and Rec
Out connectors.
Automatic wipe or mix can be executed according to
the time set by TIME Control (22).
MODE SETTING Section
(25) Event Memory Button (EVENT MEMORY)
Used to memorize the present status.
(26) Call Button (CALL)
Used to recall the
memorized status.
MODE SETTING
(27) Number Button (No.)
EVENT
MEMORY
CALL
No.
(28) Up Button
(29) Left Button
1
2
3
(30) Down Button
4
5
6
(31) Right Button
7
8
9
(32) SELECT/UNDO Button
(33) Enter Button (
)
0
SELECT
/UNDO
3
Front Panel
(34) Titler Connector (TITLE)
TITLE
Rear Panel
SOURCE 1
SOURCE 2
AUDIO
L
SOURCE 3
AUDIO
Y/C
L
SOURCE 4
AUDIO
Y/C
L
REC OUT
AUDIO
Y/C
L
AUDIO
Y/C
L
GPI
Y/C
-AC IN
COMP
R
COMP
R
COMP
R
COMP
R
COMP
PREVIEW
SERIAL
R
(35) Source 1 Audio Input Jack (SOURCE 1 AUDIO)
(46) Source 4 Composite Video Signal Input Jack
(36) Source 1 S-video Input Connector (Y/C)
(47) Recording Out Audio Output Jack
(REC OUT AUDIO)
(48) Recording Out S-video Output Connector
(REC OUT Y/C)
(49) Recording Out Composite Video Signal
Output Jack
(50) GPI Connector (GPI)
Refer to the qualified service personnel or system
Installers for this connection.
(51) Preview Output Connector
Connect to video input connector of the preview monitor.
(52) Serial Connector (SERIAL)
Refer to the qualified service personnel or system
Installers for this connection.
(53) Power Socket (AC IN)
Connect the Power Cord (provided) to this socket.
4
SYSTEM CONNECTION
Output Monitor
WJ-TTL7
,,
,,
SOURCE 1
SOURCE 2
AUDIO
L
SOURCE 3
AUDIO
Y/C
L
SOURCE 4
AUDIO
Y/C
L
REC OUT
AUDIO
L
Y/C
GPI
AUDIO
Y/C
L
Y/C
-AC IN
COMP
R
COMP
R
COMP
COMP
R
R
COMP
PREVIEW
SERIAL
R
Power
Cord
Preview Monitor
Types of Input and Output Jacks
SOURCE 1
AUDIO
L
Y/C
Q Composite (RCA-style) video and audio
W S-video (Y/C)
Q W
5
CIRCUIT DESCRIPTION
2. Main Board
IC Description
2.1. IC1 on the Main Board is using the Octal 3-State Bus
Buffers IC MC74HC541AF.
1. Power Board
Description of this IC is as follows:
1.1. IC2 on the Power Board is using the Variable Shunt
Regulator IC YWTA76431S.
E1
1
20 Vcc
1A
2
19 E2
2A
3
18 1Y
3A
4
17 2Y
4A
5
5A
6
15 4Y
6A
7
14 5Y
7A
8
13 6Y
8A
9
12 7Y
GND 10
11 8Y
3 Cathode
2 Anode
1 Reference
Reference 1
3 Cathode
+
–
2 Anode
(TOP VIEW)
16 3Y
Truth Table
INPUTS
1.2. IC1 on the Power Board is using the-3-terminal
Y
A
∗
∗
Voltage Regulator IC YWUPC24M12HF.
OUTPUT
E2
L
E1
L
H
Z
H
∗ : Don’t care.
Z : High Impedance
2.2. IC6 and IC7 on the Main Board are using the Octal 3State D-FFs IC MC74HC374AF.
GND 2
Output 3
Input 1
3 Output
ASO Limiter
Driver
1
20 Vcc
1Q
2
19 8Q
1D
3
18 8D
2D
4
17 7D
2Q
5
3Q
6
15 6Q
3D
7
14 6D
4D
8
13 5D
4Q
9
12 5Q
GND 10
11 EG
(TOP VIEW)
Error
Amp.
Truth Table
Over-current
Protector
Over-heat
Protector
Reference Voltage Generator
Starter
Input 1
OE
INPUTS
2 GND
FUNCTION
OE
EG
∗
∗
L
Latch
H
Q=D
H
∗ : Don’t
∗
care.
Z : High Impedance
6
Z
16 7Q
2.3. IC62 on the Main Board is using the 2-D Low Pass Filter HCMOS Gate Array Logic IC YWAJ0016.
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
Vss
SHGA
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
SD8
CHAR
KBB
KBG
KBR
SD7
TD9
TD8
CH4/TD7
CH3/TD6
VDD
CHO
LMRST
CH2/TD5
CH1/TD4
WP4/TD3
WP3/TD2
WP2/TD1
WP1/TD0
VDD
WPO
SD6
MD0
MD1
PAL
TM0
TM1
TM2
WPTST
D0
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
(TOP VIEW)
D1
D2
D3
D4
D5
D6
D7
Vss
REG0
REG1
REG2
REG3
REG4
REG5
ST
OSD
OSDR
OSDG
OSDB
VP
VD
HD
SYNC
ASYNC
VDD
Vss
PVWY7
PVWY6
PVWY5
PVWY4
PVWY3
PVWY2
PVWY1
PVWY0
VDD
XHI
SD5
OS1
Vss
SPC
Y3C
Vss
HPC
FS4
RECC0
RECC1
RECC2
RECC3
VDD
RECC4
RECC5
RECC6
RECC7
Vss
Y2C
VDD
RECY0
RECY1
RECY2
RECY3
RECY4
RECY5
RECY6
RECY7
VDD
SD0
SD1
SD2
SD3
SD4
Vss
PVWC0
PVWC1
PVWC2
PVWC3
VDD
PVWC4
PVWC5
PVWC6
PVWC7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
VDD
SHGB
BIN7
BIN6
BIN5
BIN4
BIN3
BIN2
BIN1
BIN0
Vss
DLC
DLY1
VDD
BGP
XBS0
TESTOUT
EXT0
SD9
SD10
TN
XBSI
XLS
ESY
EXT
VDD
HS
DLY0
XH0
SD11
RST
RCLK
SD12
SD13
VDD
YCLK
VPN
Vss
OSC2IN
VDD
Pin
1
2
3
4
5
6
7
Name
Y3C
Vss
HPC
FS4
RECC0
RECC1
RECC2
I/O
O
–
O
O
O
O
O
8
9
10
11
12
13
14
15
RECC3
VDD
RECC4
RECC5
RECC6
RECC7
Vss
Y2C
O
–
O
O
O
O
–
O
Description
Y3C signal output terminal.
Ground terminal.
HPC signal output terminal.
FS4 signal output terminal.
Pin
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
REC(C) signal output terminals.
Power supply terminal.
REC(C) signal output terminals.
Ground terminal.
Y2C signal output terminal.
7
Name
VDD
RECY0
RECY1
RECY2
RECY3
RECY4
RECY5
RECY6
RECY7
VDD
SD0
SD1
SD2
SD3
SD4
Vss
I/O
–
O
O
O
O
O
O
O
O
–
I
I
I
I
I
–
Description
REC(Y) signal output terminals.
SD signal input terminals.
Ground terminal.
Pin
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
Name
PVWC0
PVWC1
PVWC2
PVWC3
Vss
PVWC4
PVWC5
PVWC6
PVWC7
SPC
VDD
OS1I
SD5
XHI
VDD
PVWY0
PVWY1
PVWY2
PVWY3
PVWY4
PVWY5
PVWY6
PVWY7
Vss
VDD
ASY
SYC
HD
VD
VP
OSDB
OSDG
OSDR
OSD
ST
REG5
REG4
REG3
REG2
REG1
REG0
Vss
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
I/O
O
O
O
O
–
O
O
O
O
O
–
I
I
I
–
O
O
O
O
O
O
O
O
–
–
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
–
I
I
I
I
I
I
I
I
Description
Preview(C) signal output terminals.
Ground terminal.
Preview(C) signal output terminals.
SPC signal output terminal.
OS signal input terminal
SD signal input terminal.
XH signal input terminal.
Preview(Y) signal output terminals.
Ground terminal.
ASY signal output minals
SYC signal output terminas.
HD signal output terminal.
VD signal output terminal.
VP signal output terminals.
OSDB signal input terminal.
OSDG signal input terminal.
OSDR signal input terminal
OSD signal input terminal.
Strobe signal input terminal.
Register signal input terminals.
Ground terminal.
DATA signal input terminals.
8
Pin
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
Name
WPTST
TM2
TM1
TM0
PAL
MD1
MD0
SD6
CHOB
VDD
WP1/TD0
WP2/TD1
WP3/TD2
WP4/TD3
CH1/TD4
CH2/TD5
LMRST
CHOA
VDD
CH3/TD6
CH4/TD7
TD8
TD9
SD7
KBR
KBG
KBB
CHAR
SD8
AIN7
AIN6
AIN5
AIN4
AIN3
AIN2
AIN1
AIN0
SHGA
Vss
VDD
SHGB
BIN7
I/O
I
I
I
I
I
I
I
I
O
–
I
I
I
I
I
I
O
O
–
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
–
I
–
I
124
125
126
127
128
129
BIN6
BIN5
BIN4
BIN5
BIN2
BIN1
I
I
I
I
I
I
130 BIN0
131 Vss
I
–
Description
WPTST signal input terminal.
TM signal input terminals.
PAL signal input terminal.
MD signal input terminals.
CHOB signal output terminal.
TD signal input terminals.
LMRST signal output terminal.
CHOA signal output terminal.
Ground terminal.
TD signal input terminals.
SD signal input treminal.
Red signal input terminal.
Green signal input terminal.
Blue signal input terminal.
Character signal input terminal.
A signal input terminals.
SHGA signal input treminal.
Ground terminal.
SHGB signal input terminal.
B signal input terminals.
Ground terminal.
2.5. IC28, IC42 and IC59 on the Main Board are using the
Pin
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
Name
DLC
DLY1
VDD
BGP
XBSO
TESTOUT
EXT0
SD9
SD10
TN
XBSI
XLS
XSY
EXT
VDD
HS
DLY0
XH0
SD11
RST
RCLK
SD12
SD13
VDD
YCLK
VPN
Vss
OS2I
VDD
I/O
O
O
–
O
O
O
O
I
I
I
I
I
I
I
–
O
I
O
I
I
I
I
I
–
O
O
–
I
–
Description
DLC signal output terminal.
DLY1 signal output terminal.
Burst Gate Pulse output terminal.
XBSO signal output terminal.
TEST signal output terminal.
External signal output terminal.
PAL 1,135-word x 8-Bit FIFO High Speed Line Buffers
IC YWUPD42102G3.
SD Data input terminals.
TN signal input terminal.
XBSI signal input terminal.
XLS signal input terminal.
XSY signal input terminal.
External signal input terminal.
HS signal output terminal.
DLY0 signal input terminal.
XH signal output terminal.
SD signal input terminals.
RST signal input terminal.
Clock pulse input terminal.
Clock pulse output terminal.
VPN signal output terminal.
Ground terminal.
Oscillation signal input terminal.
2.4. IC64 on the Main Board is using the 3-Terminal
Voltage Regulator IC YW78L09UATE2.
Description of these IC is as follows:
Output 1
GND 2
Input 3
1 Output
Over-current
Protector
Over-heat Protector
1
24 DI0
DO1
2
23 DI1
DO2
3
22 DI2
DO3
4
21 DI3
RE
5
20 WE
RSTR
6
GND
7
18 VDD
RCK
8
17 WCK
DO4
9
16 DI4
DO5 10
15 DI6
DO6 11
14 DI6
DO7 12
13 DI7
Pin Name I/O
SD Data input terminals.
Input 3
DO0
Error Amp.
Reference
Voltage
Generator
2 GND
9
(TOP VIEW)
19 RSTW
Description
1
DO0
O
2
DO1
O
3
4
DO2
DO3
O
O
5
RE
I Read Enable signal input terminal.
6
RSTR
I Reset Read pulse input terminal.
7
GND
– Ground terminal.
Data output terminals. (8-Bit)
8
RCK
I Read Clock pulse input terminal.
9
DO4
O
10
DO5
O
11
DO6
O
12
DO7
O
13
DI7
I
14
DI6
I
15
DI5
I
16
DI4
I
17
WCK
I Write Clock pulse input terminal.
18
VDD
– Power supply terminal.
Data output terminals. (8-Bit)
Data input terminals. (8-Bit)
19
RSTW I Reset Write Pulse input terminal.
20
WE
I Write Enable signal input terminal.
21
DI3
I
22
DI2
I
23
DI1
I
24
DI0
I
Data input terminals. (8-Bit)
2.6. IC12, IC47, IC49, and IC50 on the Main Board are
2.8. IC511 and IC512 on the Main Board are using the
using the Single 2-Input AND Gate IC YWSC7S08F.
Video Sync. Separator IC YWLM1881M.
IN1 1
Truth Table
5 Vcc
Inputs
Output
IN1 IN2
IN2 2
GND 3
4 OUT
(TOP VIEW)
L
L
H
H
L
H
L
H
H
H
H
L
Comp.
Sync
1
8
Video In
2
7
Vertical
Sync
3
6
GND
4
5
VCC
Odd/Even
Field Index
RSET
Burst/Back
Porch Clamp
(TOP VIEW)
2.7. IC14 on the Main Board is using the Dual 6dB Video
Amplifier IC with 75Ω Driver YWNJM2268V.
8
VCC
Regulator
1
VIN1 1
8 VIN2
GND 2
7 Vcc
Comp.
Sync
+
–
V
VCC
(TOP VIEW)
VSAG1 3
6 N.C.
VOUT1 4
5 VOUT2
VA
R
+
D
Q
7
Q
–
CK
2
Pin Name I/O
VCC
Video
In
Description
1 VIN1
I Input terminal for Amplifier 1.
2 GND
Odd/
Even
Field
Index
CK
–
VB
+
V1
5
Burst/
Back
Porch
Clamp
–
+
+
–
3 VSAG1 – Sag compensation terminal for Amplifier 1.
4 VOUT1 O Output terminal for Amplifier 1.
+
V2
–
5 VOUT2 O Output terminal for Amplifier 2.
– Non connection.
7 Vcc
8 VIN2
V2
+
–
V1
Vcc
4 VOUT1
2.8K
2.2K
+
R Q
2.8K
75 Ω
Driver
GND
D
–
3
Q
Vertical
Sync
OSC
Capacitor Charge
Current
750
3 VSAG1
5 VOUT2
6 dB
Amp.
S
RSET
8
Clamp
VIN2
75 Ω
Driver
6 dB
Amp.
+
7
1
Bias
VIN1
–
1/8
6 N.C.
6 N.C.
2
10
6
GND
4
2.9. IC26 and IC40 on the Main Board are using the Comb/BPF Filter IC YWMC141625BFU.
D4
D5
D6
D7
C0
C1
C2
C3
C4
C5
C6
C7
36
35
34
33
32
31
30
29
28
27
26
25
Pin
37
38
39
40
41
42
43
44
45
46
47
48
TE1
TE0
MODE1
MODE0
ADCLK
DGND
NC (AD GND)
VIN
CLOUT
CLC
RBT
RTP
24
23
22
21
20
19
18
17
16
15
14
13
(TOP VIEW)
I/O
–
2 DVCC
–
–
Non Connection.
4 YOUT
O
5 DAREF
I
6 DAGND
–
7 DAVCC
–
8 COUT
O
9 N.C.
10 IBIAS
–
I
11 ADGND
–
12 ADVCC
–
13 RTP
I
14 RBT
I
15 CLC
I
16 CLOUT
O
17 VIN
I
Luminance signal output
terminal.
Reference Voltage input
terminal for D/A Converter
circuit.
Ground terminal for D/A
Converter Circuit.
+5V supply terminal for
D/A Converter Circuit.
Chroma signal output
terminal.
Non Connection.
Current Control terminal
for A/D and D/A Coverter
Circuits.
Ground terminal for A/D
Converter Circuit.
+5V supply terminal for
A/D Converter Circuit.
Top Reference Voltage
input terminal for A/D
Converter Circuit.
Bottom Reference Voltage
input terminal for A/D
Converter Circuit.
Clamp Time Constant
setting terminal.
Clamp Voltage output
terminal.
Voltage input terminal
for A/D Converter Circuit;
3.3Vp-p max.
28 C4
18 N.C.
19 DGND
–
–
27 C5
26 C6
20
ADCLK
I
21
MODE0
I
22
MODE1
I
23
TE0
I
24
TE1
I
25
C7
I/O
26
C6
I/O
DGND
DVcc
NC
YOUT
DAREF
DAGND
DAVcc
COUT
NC
IBIAS
ADGND
ADVcc
NC (AD GND)
DGND
19
18
PORT
CONTROL LOGIC
1H/2H
CLAMP
IBIAS
1H/2H
16 CLOUT
15 CLC
32 C0
31 C1
29 C3
DAC
25 C7
8 COUT
DAC
CONTROL LOGIC
BPF
PORT
Comb/
46
BPF
A.C.F. PROCESSING
CLK 45
BPF
ADCLK 20
33 D7
30 C2
CLKBUF
PAL/ 42
NTSC
CLKBUF
M/M 41
36 D4
34 D6
MEMORY MODE
IBIAS 10
37 D3
35 D5
BPF
VIN 17
38 D2
BPF
RTP 13
39 D1
SELF BIAS
RBT 14
40 D0
ADC
MODE1 22
MODE0 21
MODE
TE1 24
TE0 23
4 YOUT
BW 48
43 DGND
Bypass 47
44 DVcc
1
2
3
6
7
9
11
12
DGND
DVcc
NC
DAGND
DAVcc
NC
ADGND
ADVcc
DAREF 5
Description
Ground terminal for Digital
Circuit.
+5V supply terminal for Digital
Circuit.
3 N.C.
1
2
3
4
5
6
7
8
9
10
11
12
D3
D2
D1
D0
M/M
PAL/NTSC
DGND
DVcc
CLK
Comb/BPF
Bypass
BW
Name
1 DGND
11
Non Connection.
Ground terminal for Digital
Circuit.
Clock pulse input terminal for
A/D Converter Circuit.
Mode set signal input terminals.
Test Mode set signal input
terminals.
Data(Y) input/output terminals.
Pin
Name
I/O
33
D7
I/O
34
D6
I/O
35
D5
I/O
36
D4
I/O
37
D3
I/O
38
D2
I/O
39
D1
I/O
40
D0
I/O
41
N/M
I
42
PAL/NTSC
I
43 DGND
44 DVcc
–
–
45 CLK
46 COMB/BPF
I
I
47 BYPASS
48 BW
I
I
2.11. IC48 on the Main Board is using the Single 2-Input
Description
NAND Gate IC YWSC7S00F.
IN1 1
Chrominance Data input/output
terminals.
5 Vcc
Truth Table
Inputs
Output
IN1 IN2
IN2 2
GND 3
4 OUT
(TOP VIEW)
L
L
H
H
L
H
L
H
H
H
H
L
Colour TV Sytem Select signal input
terminals.
N/M
L
L
H
H
PAL/NTSC
SYSTEM
L
PAL B, G, H, I
L
NTSC
H
PAL N
H
PAL M
2.12. IC18, IC19, IC33, IC44, IC53, IC56, IC100 and IC101
on the Main Board are using the Single Inverter IC
YWSC7SU04F.
Ground terminal for Digital Circuit.
+5V supply terminal for Digital
Circuit.
N.C. 1
Truth Table
5 Vcc
Input
L
H
In 2
Clock Pulse input terminal.
Filter Select signal input terminal.
L: Comb Filter; H: Band Pass Filter
Bypass signal input terminal.
Band switching signal input terminal
for Chrominance signal.
L : Narrow Band; H : Wide Band
GND 3
4 Out
Output
H
L
(TOP VIEW)
2.13. IC3 on the Main Board is using the Voltage Detector
IC YWM51953AFP.
2.10. IC500-503 on the Main Board are using the 2Channel Electronic Volume/Balance IC YWM51132
8 N.C.
N.C. 1
FP.
1.25V
Regulator
GND 4
15
(TOP VIEW)
16
VCC
Control
Voltage
Generator
4
4.25V
0.65V
10
6
8
5 Cd In
VCA 1
2
7
6 Output
+
14
5
7 Vcc
-
-
N.C. 3
1
25µA
Typical
5µA
Typical
N.C. 2
Mode
Switch
t
VCA 2
H
11
output
indefined
Output
9
td
td
L
t
td
12
0.34 x Cd (pF) µsec.
2.14. IC30 and IC46 on the Main Board are using the 4-MB Cache DRAM IC YWM5M4V416TP.
Vcc
DQCI
70 Vss
1
2
DQCU
3
69 AD9
68 AD8
CC1#
4
67 AD7
CC0#
WE#
5
6
66 N.C.
CS#
CMD#
CMS#
7
8
9
64 AS9
63 AS8
K 10
61 AS6
65 N.C.
62 AS7
DQ0 11
Vss 12
60 DQ15
59 Vss
DQ1 13
DQ2 14
VccQ 15
58 DQ14
57 DQ13
56 VccQ
DQ3 16
Vss 17
55 DQ12
(TOP VIEW)
54 Vcc
DQ4 19
52 DQ11
51 VccQ
VccQ 20
50 DQ10
49 DQ9
48 Vss
DQ5 21
DQ6 22
Vss 23
DQ7 24
47 DQ8
46 N.C.
N.C. 25
AS0 26
AS1 27
45 G#
44 AS5
43 AS4
42 AS3
AS2 28
RAS# 29
CAS# 30
DTD#
AD0
AD1
AD2
Vcc
Pin
Name
41
40
39
38
37
36
31
32
33
34
35
I/O
1 Vcc
–
2 DQCI
I
3 DQCU
I
4 CC1#
I
5 CC0#
I
6 WE#
I
AD6
AD5
AD4
AD3
N.C.
Vss
Description
Power supply.
DQC signal input terminals.
Control clock pulse input
terminals.
Write Enable signal input
terminal.
7 CS#
I
Chip Select signal input terminal.
8 CMD#
I
DRAM clock mask signal input
terminal.
9 CMS#
I
SRAM clock mask signal input
terminal.
10 K
I
K signal input terminal.
11 DQ0
12 Vss
I/O DQ signal input/output terminal.
13 DQ1
I/O
14 DQ2
I/O
DQ signal input/output terminals.
13
Pin
Name
15 VccQ
I/O
Description
– Power supply.
16 DQ3
17 Vss
19 DQ4
20 VccQ
21 DQ5
22 DQ6
I/O
I/O
23 P52/A10
I/O P52/A10 signal input/output
terminal.
24 Vss
–
Ground terminal.
25 N.C.
–
No connection.
26 AS0
I
27 AS1
I
28 AS2
I
29 RAS#
I
RAS signal input terminal.
30 CAS#
I
CAS signal input terminal.
31 DTD#
I
DTD signal input terminal.
32 Ad0
I
33 Ad1
I
34 Ad2
I
AS signal input terminals.
Address signal input terminals.
35 Vcc
36 Vss
37 N.C.
–
38 AD3
I
39 AD4
I
40 AD5
I
41 AD6
I
42 AS3
I
43 AS4
I
44 AS5
I
45 G#
I
No connection.
Address signal input terminals.
AS signal input terminals.
G signal input terminal.
46 N.C.
47 DQ8
48 Vss
I No connection.
49 DQ9
50 DQ10
51 VccQ
I/O
I/O
I Power supply terminal.
52 DQ11
54 Vcc
55 DQ12
56 VccQ
2.16. IC11 on the Main Board is using the 3-Terminal
Description
Voltage Regulator IC YW78L05UATE2.
I/O
I/O
61 AS6
I
62
63
64
65
I AS signal input terminals.
I
I
– No connection.
AS7
AS8
AS9
N.C.
66 N.C.
– No connection.
67 AD7
I
68 AD8
I Address signal input terminals.
69 AD8
I
70 Vss
GND 2
Input 3
DQ13
DQ14
Vss
DQ15
I/O
Output 1
57
58
59
60
Name
1 Output
Input 3
Over-current
Protector
Error Amp.
Over-heat Protector
Pin
Voltage Regulator Driver IC YWM5237ML.
Reference
Voltage
Generator
2 GND
1 INPUT
2.17. IC513 on the Main Board are using the Quad 3-State
2 GND
Bus Transceivers IC YW74ABT244DB.
3 VADJ
G1
1
20 Vcc
1A1
2
19 G2
2Y4
3
18 1Y1
1A2
4
17 2A4
2Y3
5
1A3
6
15 2A3
2Y2
7
14 1Y3
1A4
8
13 2A2
2Y1
9
12 1Y4
GND 10
11 2A1
REFERENCE
VOLTAGE
GENERATOR
ASO
PROTECTION
1
3
VADJ
OVER CURRENT
PROTECTION
ERROR AMP.
–
+
OVER
TEMPERATURE
PROTECTION
START-UP
VIN
(TOP VIEW)
Truth Table
INPUTS
G
A
H
L
L
L
H
∗
2
∗:
GND
Z :
14
OUTPUT
Y
Z
L
H
Don’t care.
High Impedance
16 1Y2
2.18. IC25 and IC39 on the Main Board are using the C-MOS 8-Bit 2-Channel High Speed A/D Converter IC MN65752H.
VRBSB
VRBB
DVDD
DVss
NPOWDB
DVss
CLK
NOE
DB7
DB6
DB5
DB4
36
35
34
33
32
31
30
29
28
27
26
25
Pin
37
38
39
40
41
42
43
44
45
46
47
48
(TOP VIEW)
24
23
22
21
20
19
18
17
16
15
14
13
DB3
DB22
DB1
DB0
DVDD
DVDDL
DVDDL
DVDD
DA7
DA6
DA5
DA4
VRBSA 1
VRBA 2
DVDD 3
DVss 4
NPOWDA 5
DVss 6
NBSM 7
BSD 8
DA0 9
DA1 10
DA2 11
DA3 12
VRTSB
VRTB
AVDD
VINB
AVss
AVDD
AVss
AVss
VINN
AVDD
VRTA
VRTSA
Name
I/O
Description
Description
23 DB2
O
24 DB3
O
25
26
27
28
29
30 CLK
O
Digital code output terminals.
O
O
O
I Digital output enable signal input
terminal.
I Clock pulse input terminal.
31 DVss
32 NPOWDB
–
I
33 DVss
34 DVDD
–
–
35 VRBB
I
DB4
DB5
DB6
DB7
NOE
36 VRBSB
Pin Name
I/O
Digital ground terminal.
Power down mode signal input
terminal.
Digital power supply terminal.
Bottom side reference voltage
input terminal.
O Bottom side reference voltage
output terminal.
37 VRTSB
O
Top side reference voltage
output terminal.
1 VRBSA
2 VRBA
O VRBSA signal output terminal.
I VRBA signal inut terminal.
38 VRTB
I
3 DVDD
–
39 AVDD
–
Top side reference voltage
input terminal.
Analog Power supply terminal.
4 DVss
–
40 VINB
I
Analog signal input terminal.
Power down mode signalinput
terminal.
41 AVss
–
Analog ground terminal.
42 AVDD
–
Analog Power supply terminal.
43 AVss
–
44 AVss
–
45 VINA
I
46 AVDD
47 VRTA
– Analog Power supply terminal.
I Top side reference voltage
input terminal.
O Top side reference voltage
output terminal.
5 NPOWDA I
6 DVss
–
7 NBSM
I
8 BSD
I
9 DA0
O
10 DA1
O
11 DA2
O
TEST signal input terminals.
12 DA3
O
13 DA4
O
14 DA5
15 DA6
O
O
16 DA7
O
17 DVDD
–
Low Voltage Digital power supply
terminals.
18 DVDDL
–
19 DVDDL
–
20 DVDD
21 DB0
– Digital power supply terminal.
O
O
22 DB1
48 VRTSA
15
Analog ground terminals.
Analog signal input terminal.
2.19. IC52 and IC55 on the Main Board are using the 8-Bit 2-Channel D/A Converter IC YWMB40968PF.
A5
1
28 A4
A6
2
27 A3
A7
3
26 A2
A1 25
A8
4
25 A1
A2 26
B4
9
A6
2
A7
3
A8
4
CLKA
5
21 A.GND
19 VccA
B6 11
18 VRIN
2R
R
2R
R
2R
R
R
2R
R
VccA
20 BOUT
B7 12
17 VROUT
B1
6
B8 13
16 COMP
B2
7
CLKB 14
15 D.GND
B3
8
B4
9
B5 10
Pin Name I/O
Description
B6 11
B7 12
1
A5
I
2
A6
I
3
A7
I
4
A8
I (LSB)
B8 13
R
R
2R
R
2R
R
2R
R
R
Ach Digital Data input terminals. (8-Bit)
2R
R
VccA
CLKB 14
5
CLKA
I Ach Clock pulse input terminal.
6
B1
I (MSB)
7
B2
I
8
B3
I
9
B4
I
10 B5
I
11 B6
I
12 B7
13 B8
I
I (LSB)
14 CLKB
I Bch Clock pulse input terminal.
REFERENCE
RESISTOR
AMP.
VRIN 13
COMP 16
Bch Digital Data input terminals. (8-Bit)
REFERENCE VOLTAGE
I Phase Compensation terminal.
O Reference Voltage output terminal.
18 VRIN
I Reference Voltage input terminal.
19 VccA
– Power supply terminal for Analog circuit.
20 BOUT
O Bch Analog signal output terminal.
21 A.GND – Ground terminal for Analog circuit.
22 AOUT
O Ach Analog signal output terminal.
23 VccA
– Power supply terminal for Analog circuit.
24 VccD
– Power supply terminal for Digital circuit.
25 A1
I (MSB)
26 A2
I
27 A3
I
28 A4
I
17 VROUT
19 VccA
15 D.GND – Ground terminal for Digital circuit.
17 VROUT
R
20 BOUT
B5 10
16 COMP
CURRENT SWITCH (A)
8
22 AOUT
CURRENT SWITCH (B)
B3
(TOP VIEW)
1
BUFFER (A)
7
A5
BUFFER (B)
B2
23 VccA
MASTER SLAVE F/F (A)
6
A4 28
MASTER SLAVE F/F (B)
B1
24 VccD
INPUT BUFFER (A)
5
A3 27
INPUT BUFFER (B)
CLKA
22 AOUT
R
Ach Digital Data input terminals. (8-Bit)
16
D.GND 15
23 VccA
A.GND 21
24 VccD
2.20. IC16 on the Main Board is using the RS-232C Driver
2.21. IC20, IC21, IC34, and IC35 on the Main Board are
IC YWUPD4721GS.
using the Analog Multiplexer/Demultiplexer IC
MC74HC4052F.
VDD
1
20 C4+
YB0 1
16 VDD
C1+
2
19 GND
YB2 2
15 YA2
Vcc
3
18 C4–
ZB 3
14 YA1
C1–
4
17 Vss
C5+
5
16 STBY
C5–
6
15 VCHA
DIN1
7
14 DOUT1
DIN2
8
13 DOUT2
ROUT1
9
12 RIN1
ROUT2 10
11 RIN2
(TOP VIEW)
YB3 4
13 ZA
(TOP VIEW)
YB1 5
12 YA0
E 6
11 YA3
VSS 7
10 SA
GND 8
9 SB
Truth Table
Pin
Name I/O
Description
1 VDD
2 C1+
– Positive side of capacitor 1 connecting
terminal.
3 Vcc
4 C1–
– Negative side of capacitor 1 connecting
terminal.
terminal.
terminal.
I
Driver signal input terminals.
I
5 C5+
6 C5–
7 DIN1
8 DIN2
9 ROUT1 O
10 ROUT2 O
E
L
L
L
L
H
B
L
L
H
H
A X COMMON Y COMMON
L
0X
0Y
H
1X
1Y
L
2X
2Y
H
3X
3Y
NONE
NONE
∗ ∗
∗ : Don’t care.
2.22. IC5 on the Main Board is using the Hex D-FFs IC
YWMC74HC175F.
16 VCC
CLEAR 1
15 4Q
1Q 2
Receiver signal output terminals.
14 4QN
1QN 3
11 RIN2
I
12 RIN1
I
13 DOUT2
O
14 DOUT1
O
15 VCHA
–
Charge voltage supply terminal.
16 STBY
I
Standby signal input terminal.
17 Vss
–
Ground terminal.
18 C4–
terminal.
19 GND
–
20 C4+
terminal.
Receiver signal input terminals.
1D 4
(TOP VIEW)
12 3D
2D 5
Driver signal output terminals.
13 4D
11 3QN
2QN 6
10 3Q
2Q 7
9 CLK
GND 8
Truth Table
INPUTS
Ground terminal.
∗
H
L
H
H
∗
H
∗
17
D
CLR
L
OUTPUTS
CLK
∗
: Don’t care.
Q
Q
L
H
L
H
H
Qn
L
Qn
Function
Clear
No Change
2.23. IC58 on the Main Board is using the Character Generator IC YWBU2874FV.
CLK 1
Protector
Circuit
20 HSYNC
DATA 3
Character
Size
Register
Horizontal
Address
Register
Write
Address
Counter
Horizontal
Size
Counter
Horizontal
Position
Counter
Horizontal
Address
Counter
Data Selector
Data Input
Shift Register
CS 2
RESET 4
19 VSYNC
18 VB
Video RAM
17 VG
16 VR
OSCIN 8
Vertical
Position
Counter
Vertical
Address
Counter
OSC
TEST 9
Test
15 VBLK
Output Control
Vertical
Size
Counter
OSCOUT 7
Background Control
Data Register
Vertical Address
Registor
CKOUT 6
Indication Control
Data Register
VDD 5
14 VC2
13 BLK2
12 VC1
Character Generator
ROM
12 x 18 Bit x 255 word
11 BLK1
Vss 10
(TOP VIEW)
Pin
Name
I/O
Description
Pin
Name
I/O
Description
1 CLK
I
Clock Pulse input terminal.
11 BLK1
O Blanking Pulse-1 output terminal.
2 CS
3 DATA
I
I
Chip Select signal input terminal.
Serial Data input terminal.
12 VC1
13 BLK2
O Character singal-1 output terminal.
O Blanking Pulse-2 output terminal.
4 RESET
I
Reset pulse input terminal.
14 VC2
O Character signal-2 output terminal.
5 VDD
15 VBLK
O V. Blanking pulse output terminal.
16 VR
17 VG
O
O Character Data output terminals.
18 VB
O
19 VSYNC
20 HSYNC
I
I
6 CKOUT
O Clock pulse output terminal.
7 OSCOUT O Oscillator output terminal.
8 OSCIN
9 TEST
10 Vss
I
Oscillator input terminal.
I Test terminal.
18
Vertical Sync signal input termnal.
Horizontal Sync singal input terminal.
2.24. IC15 on the Main Board is using the 8-Bit 12-Channel D/A Converter YWM62352GP.
VSS
(VrefL)
AO3
1
20
GND
2
19
AO2
AO4
3
18
AO1
AO5
4
17
DI
VSS
(VrefL)
2 AO3
O
3
AO4
O
4
AO5
O
5
AO6
O
AO6
5
16
CLK
AO7
6
15
LD
AO8
7
14
DO
AO9
8
13
AO12
AO10
9
12
AO11
VDD
(VrefU)
10
11
VCC
DO
14
Pin Name I/O
1
(TOP VIEW)
15
–
AO7
O
AO8
O
8
AO9
O
9
10
AO10
VDD
(VrefU)
O
–
11
VCC
–
12
AO11
O
13
AO12
O
14
DO
O
MSB Data output terminal from 12Bit Shift Register.
15
LD
I
Load signal input terminal.
Data of 12-Bit Shift Register should
be loaded to Decoder and D/A
Output Registers when LD = H.
16
CLK
I
Shift Clock pulse input terminal.
Serial Data from DI terminal should
be input to Decoder and 12-Bit Shift
Register at raising edge of this
signal.
12-Bit Serial Data input terminal.
DAC12
16
CLK
D0
8-Bit R-2R + Segment
D/A Converter
8-Bit R-2R + Segment
D/A Converter
17
8-Bit Latch
DI
12-Bit Shift Register
D8
8-Bit Latch
D9
Address Decoder
D10
+
–
+
–
13
AO12
AO1
18
D7
DAC1
19
Analog Data output terminals.
6
A1
D11
Lower reference voltage supply
terminal for D/A Converter circuit.
7
LD
A12
Description
17
DI
I
18
AO1
O
19
AO2
O
20
GND
–
Upper reference voltage supply
terminal for D/A Converter circuit.
Power supply terminal terminal.
Ground terminal.
2.25. IC4 on the Main Board is using the 16-Bit Microprocessor IC YW78P4026GCA.
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
XPOSI
24SW
FADELD
FADECLK
FADEDAT
VDD
OSDCLK
OSDCS
OSDDAT
PAL/NTSC
ST1
OSDRST
SUSELA
SUSELB
TEST
Vss
ASTB
DATA0
DATA1
DATA2
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
(TOP VIEW)
DATA3
DATA4
DATA5
DATA6
DATA7
ADD8
ADD9
ADD10
ADD11
ADD12
ADD13
ADD14
ADD15
ADD16
ADD17
ST2
BUSCLK
RD
WE
REGCLK
SCAN0
SCAN1
SCAN2
SCAN3
SCAN4
KEYGATE
RESET
VDD
X2
X1
Vss
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
LEDCLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
YPOSI
TAKE
SPEED
AVDD
AVref1
AVss
ANO0
ANO1
AVref2
AVref3
NMI
VBLK
HBLK
GPI
BIAS4
BIAS3
BIAS2
BIAS1
DR1
DT1
Pin
Name
I/O
Description
Pin
Name
I/O
Description
1 SCAN0
O
15 DATA3
I/O
2 SCAN1
O
16 DATA4
I/O
3 SCAN2
O Key Scan signal output terminals.
17 DATA5
4 SCAN3
O
18 DATA6
Data input/output terminals.
I/O (8-Bit)
I/O
5 SCAN4
6 KEYGATE
O
19 DATA7
I/O
20 LEDCLK
7 RESET
8 VDD
I
O LED Clock pulse output
terminal.
21 REGCLK
O Register Clock pulse output
terminal.
22 WE
10 X1
– Crystal Oscillator connecting
I terminals.
O Write Enable signal output
terminal.
11 Vss
23 RD
O Read Strobe pulse output
terminal.
24 BUSCLK
O Bus Clock pulse output terminal.
25 ST2
O ST signal output terminal.
9 X2
O Key Gate signal output terminal.
12 DATA0
I/O
13 DATA1
I/O
14 DATA2
I/O
Reset pulse input terminal.
(8-Bit)
20
Pin
Name
I/O
Description
Pin
Name
I/O
Description
26 ADD17
27 ADD16
O
70 AVref3
– Reference voltage terminal 3.
O
71 NMI
28 ADD15
O
I Non Maskable Interrupt signal
input terminal.
29 ADD14
72 VBLK
30 ADD13
O Address signal output terminals.
O (12-Bit)
I V.Blanking signal input terminal.
I H.Blanking signal input terminal.
31 ADD12
O
74 GPI
32 ADD11
O
75 BIAS4
33 ADD10
O
I
34 ADD9
O
76 BIAS3
77 BIAS2
35 ADD8
O
78 BIAS1
I
36 DATA7
I/O
37 DATA6
I/O
79 DR1
80 DT1
I DR signal input terminal.
O DT signal output terminal.
38 DATA5
I/O
39 DATA4
I/O
40 DATA3
I/O
41 DATA2
I/O
2.26. IC23 and IC37 on the Main Board are using Quad
42 DATA1
I/O
Analog Switches/Multiplexers/Demultiplexers IC
43 DATA0
44 ASTB
I/O
YWMC74HC4066F.
O Address Strobe signal output
terminal.
73 HBLK
I GPI signal input terminal.
I
I
BIAS signal input terminals.
(8-Bit)
45 Vss
46 TEST
I
47 SVSELB
O SVSELB signal output terminal.
48 SVSELA
I/O 1 1
14 Vcc
O/I 1 2
13 Control 1
O SVSELA signal output terminal.
O/I 2 3
12 Control 4
49 OSDRST
50 ST1
O OSDRST signal output terminal.
O ST1 signal output terminal.
I/O 2 4
11 I/O 4
Control 2 5
10 O/I 4
51 PAL/NTSC
I
Control 3 6
9 O/I 3
52 OSDDAT
53 OSDCS
54 OSDCLK
O
55 VDD
56 FADE DAT
57 FADECLK
TEST signal input terminal.
PAL/NTSC signal input terminal.
59 24SW
60 XPOSI
I
XPOSI signal input terminal.
61 YPOSI
I
YPOSI signal input terminal.
62 TAKE
I
TAKE signal inout terminal.
63 SPEED
I SPEED signal inout terminal.
– Analog Power supply terminal.
64 AVDD
65 AVref1
67 ANO0
– Analog Ground terminal.
O Analog 0 signal output terminal.
68 ANO1
69 AVref2
O Analog 1 signal output terminal.
66 AVss
8 I/O 3
(TOP VIEW)
Truth Table
Input
O FADEDAT signal output terminal.
O FADECLK signal output terminal.
O FADELD signal output terminal.
I 24SW input terminal.
58 FADELD
GND 7
Port signal input/output terminals.
O (8-Bit)
O
Switch
Control I/O – O/I
21
L
OFF
H
ON
2.27. IC13 on the Main Board is using the 6 dB Video
Amplifier with 75Ω Driver IC YWNJM2267M.
3-Input Video Switch IC YWNJM2245M.
Vin 1 1
8 Vin 2
GND 2
7 Vcc
VIN1 1
8 GND
SW1 2
7 OUT
5 Vout 2
VIN2 3
SW2 4
4
Vout 1 O Output terminal for Amplifier 1.
Vout 2 O Output terminal for Amplifier 2.
Vsag 2 – Sag compensation terminal for Amplifier
2.
Vcc
Vin 2
7
8
Vcc
L
H
2.07K
L
L
VIN1
VIN2
H
VIN3
: Don’t care.
4 Vout 1
75 Ω
Driver
6.2 dB
Amp.
750
Quad 2-Input AND Gate IC YWMC74F08M.
3 Vsag 1
2.2K
8
5 Vout 2
75 Ω
Driver
6.2 dB
Amp.
2.07K
Clamp
Vin 2
SW1 SW2 OUT
7
1
Clamp
Vin 1
5 VIN3
Truth Table
Vsag 1 – Sag compensation terminal for Amplifier
1.
5
6 Vcc
(TOP VIEW)
3
6
BIAS
15K
Pin Name I/O
Description
1 Vin 1
2 GND
6dB
Amp.
Vout 1 4
15K
6 Vsag 2
15K
(TOP VIEW)
Vsag 1 3
750
6
2.2K
GND
Vsag 2
2
Dual Operational Amplifier IC NJM3404AM.
1A 1
14 Vcc
1B 2
13 4B
1Y 3
12 4A
2A 4
11 4Y
2B 5
10 3B
2Y 6
9 3A
GND 7
8 3Y
(TOP VIEW)
Truth Table
OUT1 1
INPUTS
8 Vcc
A
L
L
H
H
– +
IN–1 2
7 OUT2
+ –
IN+1 3
6 IN2–
Vss 4
5 IN+2
(TOP VIEW)
22
B
L
H
L
H
OUTPUT
Y
L
L
L
H
2.31. IC29 and IC43 on the Main Board are using Write Control Gate Array Logic IC YWAJ0014.
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
GND
VDD
AS6
AS7
AS8
AS9
GND
AD7
AD8
AD9
GND
S/V
VDD
TEST5
TEST4
TEST3
TEST2
TEST1
TEST0
RHS4
RHS3
RHS2
RHS1
RHS0
PHASE2
PGI3
PGI4
A/B
PAL/NTSC
SELCOUNT
OFFSET
D0
D1
D2
D3
D4
D5
D6
D7
REG0
REG1
REG2
REG3
REG4
REG5
GND
ST2
GND
Y3CLK
CCLK
PHASE1
PHASE0
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
(TOP VIEW)
GND
YCLK
GND
TSTOUT
TN
GND
H
V
SHDG
GND
VDD
GND
YAD7
YAD6
YAD5
YAD4
YAD3
YAD2
YAD1
YAD0
VDD
GND
FRMLM0
FRMLM1
FRMLM2
FRMLM3
FRMLM4
FRMLM5
FRMLM6
FRMLM7
VDD
GND
TOLM7
TOLM6
TOLM5
TOLM4
TOLM3
TOLM2
TOLM1
TOLM0
WRST
RRST
LMCLK
GND
CLMP
VDD
GND
GND
PCO
VDD
GND
GND
GND
OSC1IN
GND
PCO
GND
VDD
4FSC
GND
GND
SC7
SC6
SC5
SC4
SC3
SC2
SC1
SC0
GND
GND
YADCLK
GND
SY7
SY6
SY5
SY4
SY3
SY2
SY1
SY0
GND
4FSCS
VDD
COMPC0
COMPC1
COMPC2
COMPC3
COMPC4
COMPC5
COMPC6
COMPC7
GND
GND
COMPY0
COMPY1
COMPY2
COMPY3
COMPY4
COMPY5
COMPY6
COMPY7
GND
OSC2IN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
GND
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
VDD
AS5
AS4
AS3
VDD
AD6
AD5
AD4
AD3
AD2
AD1
AD0
VDD
GND
DTD
CAS
RAS
AS2
AS1
AS0
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
GND
VDD
CMD
WE
CC0
CC1
RST
DCARE
EXI
EXSYNC
GND
OSC1D
GND
VDD
GND
Pin
1
2
3
4
5
6
7
8
9
10
Name
GND
OSC1IN
GND
PCO
GND
VDD
4FSC
GND
GND
SC7
I/O
–
I
–
O
–
–
O
–
–
I
Description
Ground terminal.
Ground terminal.
PCO signal output terminal.
Ground terminal.
4FSC signal output terminal.
Ground terminal.
Ground terminal.
Serial clock pulse input terminal.
Pin
11
12
13
14
15
16
17
18
19
20
23
Name
SC6
SC5
SC4
SC3
SC2
SC1
SC0
GND
GND
YADCLK
I/O
Description
I
I
I
I Serial clock pulse input terminals.
I
I
I
–
Ground terminal.
–
– Not used.
Pin
Name
I/O
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
GND
SY7
SY6
SY5
SY4
SY3
SY2
SY1
SY0
GND
4FSCS
VDD
COMPC0
COMPC1
COMPC2
COMPC3
COMPC4
COMPC5
COMPC6
COMPC7
GND
GND
COMPY0
COMPY1
COMPY2
COMPY3
COMPY4
COMPY5
COMPY6
COMPY7
GND
OSC2IN
GND
GND
VDD
PCO
GND
GND
VDD
CLMP
GND
LMCLK
RRST
WRST
TOLM0
TOLM1
TOLM2
TOLM3
TOLM4
TOLM5
TOLM6
–
I
I
I
I
I
I
I
I
–
O
–
I
I
I
I
I
I
I
I
–
–
I
I
I
I
I
I
I
I
I
I
–
–
–
O
–
–
–
O
–
O
O
O
O
O
O
O
O
O
O
Description
Ground terminal.
SY signal input terminals.
Ground terminal.
4FSCS signal output terminal.
Power Supply termianl.
COMPC signal input terminals.
Ground terminal.
Ground terminal.
COMPY signal input terminals.
Ground terminal.
Ground terminal.
Ground terminal.
PCO signal output terminal.
Ground terminal.
Ground terminal.
CLMP signal output terminal.
Ground terminal.
LMCLK signal output terminal.
R Reset signal output terminal.
W Reset signal output terminal.
TOLM signal output terminals.
24
Pin
Name
I/O
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
TOLM7
GND
VDD
FRMLM7
FRMLM6
FRMLM5
FRMLM4
FRMLM3
FRMLM2
FRMLM1
FRMLM0
GND
VDD
YAD0
YAD1
YAD2
YAD3
YAD4
YAD5
YAD6
YAD7
GND
VDD
GND
SHDG
V
H
GND
TN
TSTOUT
GND
YCLK
GND
PHASE0
PHASE1
CCLK
Y3CLK
GND
ST2
GND
REG5
REG4
REG3
REG2
REG1
REG0
D7
D6
D5
D4
O
–
–
I
I
I
I
I
I
I
I
–
–
O
O
O
O
O
O
O
O
–
–
–
I
I
I
–
I
O
–
I
–
I
I
I
I
–
I
I
I
I
I
I
I
I
I
I
I
I
Description
TOLM signal output terminal.
Ground terminal.
FRMLM signal input terminals.
Ground terminal.
YAD signal output terminals.
Ground terminal.
Ground terminal.
SHDG signal input terminal.
V signal input terminal.
H signal input terminal.
Ground terminal.
TN signal input terminal.
Test signal output terminal.
Ground terminal.
Y Clock pulse input terminal.
Ground terminal.
PHASE signal input terminal.
C Clock pulse terminal.
Y3 Clock pulse terminal.
Ground terminal.
ST signal input terminal.
Ground terminal.
Register signal input terminals.
Data input terminals.
Pin
Name
122 D3
123 D2
124 D1
125 D0
126 OFF SET
127 SEL COUNT
128 PAL/NTSC
129 A/B
130 PGI4
131 PGI3
132 PHASE2
133 RHS0
134 RHS1
135 RHS2
136 RHS3
137 RHS4
138 TEST0
139 TEST1
140 TEST2
141 TEST3
142 TEST4
143 TEST5
144 VDD
145 S/V
146 GND
147 AD9
148 AD8
149 AD7
150 GND
151 AS9
152 AS8
153 AS7
154 AS6
155 VDD
156 GND
157 GND
158 DQ15
159 DQ14
160 DQ13
161 DQ12
162 DQ11
163 DQ10
164 DQ9
165 DQ8
166 VDD
167 AS5
168 AS4
169 AS3
170 VDD
171 AD6
172 AD5
I/O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
–
I
–
O
O
O
–
O
O
O
O
–
–
–
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
–
O
O
O
–
O
O
Pin
Description
173
174
175
176
177
178
179
180
181
Data input terminals.
OFF SET signal input terminal.
SEL COUNT signal input terminal.
PAL/NTSC signal input terminal.
A/B signal input terminal.
PGI signal input terminal.
PGI signal input terminal.
Name
ADR 4
ADR 3
ADR 2
ADR 1
ADR 0
VDD
GND
DTD
CAS
182 RAS
RHS signal input terminal.
TEST signal input terminal.
S/V signal input terminal.
Ground terminal.
Address signal output terminal.
Ground terminal.
AS signal output terminals.
Ground terminal.
Ground terminal.
DQ signal input/output terminal.
AD signal output terminals.
25
I/O
O
O
O
O
O
–
–
O
O
Description
ADR signal output terminal.
Power Supply terminal.
Ground terminal.
DTD signal output terminal.
Column Address Strobe signal
output terminal.
O Row Address Strobe signal
output terminal.
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
AS2
AS1
AS0
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
GND
VDD
CMD
WE
O
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
–
–
O
O
198
199
200
201
202
203
204
205
206
207
208
CC0
CC1
RST
DC ARE
EXI
EXSYNC
GND
OSC1D
GND
VDD
GND
O
O
I
I
I
I
–
–
–
–
–
Ground terminal.
CMD signal output terminal.
Write enable signal output
terminal.
CC signal output terminals.
Reset signal input terminal.
DC ARE signal input terminal.
External signal input terminal.
External sync signal input terminal.
Ground terminal.
Not used.
Ground terminal.
Ground terminal.
2.32. IC800 on the Main Board are using Gate Array Logic IC YWUPD6511GC.
CCI
CC0
XWE
DQ0
CK1
Vcc
GND
CKUO
CKU
DQ1
DQ2
DQ3
DQ4
Description
28
DQ3
I
29
DQ2
I
39
38
37
36
35
34
33
32
31
30
29
28
27
Pin
I/O
30
DQ1
I
31
CKU
I
CKU signal input terminal.
32
CKUO
I
CKUO signal input terminal.
33
GND
I
Ground terminal.
34
Vcc
I
35
CKI
I
CKI signal input terminal.
36
DQ0
I
DQ signal input terminal.
37
XWE
I
Write enable input terminal.
38
CC0
I
1
2
3
4
5
6
7
8
9
10
11
12
13
XCC1
XCC0
XWE
XDQ0
XDQ1
XDQ2
XDQ3
XDQ4
XDQ5
XDQ6
XDQ7
XAS0
XAS1
Name
39
CC1
I
XAS2
XDQ8
XDQ9
XDQ10
XDQ11
XDQ12
GND
XDQ13
XDQ14
XDQ15
SEL
DQ15
DQ14
Pin
40
XCC1
O
41
XCC0
O
42
XWB
43
XDQ0
O XWB signal output terminal.
O
44
XDQ1
O
45
XDQ2
O
46
XDQ3
O
47
XDQ4
O
48
XDQ5
O
49
XDQ6
O
50
XDQ7
O
51
XAS0
O
52
XAS1
O
40
41
42
43
44
45
46
47
48
49
50
51
52
Name
(TOP VIEW)
I/O
1
XAS2
O
2
XDQ8
O
3
XDQ9
O
4
XDQ10
O
5
XDQ11
O
6
XDQ12
O
7
GND
–
8
XDQ13
O
9
XDQ14
O
10 XDQ15
O
11 SEL
I
12 DQ15
I
13 DQ14
I
14 N.C.
–
15 DQ13
I
16 DQ12
I
17 DQ11
I
18 DQ10
I
19 DQ9
I
20 DQ8
I
21 AS2
I
22 AS1
I
23 AS0
I
24 DQ7
I
25 DQ6
I
26 DQ5
I
27 DQ4
I
26
25
24
23
22
21
20
19
18
17
16
15
14
DQ5
DQ6
DQ7
AS0
AS1
AS2
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
N.C.
Description
XAS signal output terminal.
XDQ signal output terminals.
Ground termial.
SEL signal input terminal.
DQ signal output terminals.
No connection.
DQ signal input terminals.
AS signal input terminal.
DQ signal output terminals.
26
DQ signal input terminals.
CC signal input terminals.
XCC signal output terminals.
XAS signal output terminals.
ADJUSTMENT PROCEDURE
Remove five screws.
1. Test Equipment Required
The following Test Equipments are required for
adjustment of the Digital AV Mixer WJ-AVE55.
Oscilloscope
Frequency Counter
Digital Voltmeter
Vectorscope
Waveform Monitor
Underscanned Colour Video Monitor
Video Signal Generator
Audio Generator
Disconnect the flat cable.
Extension Board (Part Number: YWV01034AN) for Power
Remove five screws.
Board and Main Board as shown Fig. 1-1.
Fig. 2-2
Referring to Fig. 2-3, connect the Extension Board
Fig. 1-1
between CN3 on the Power Board and CN3 on the Main
Board.
2. Disassembling Procedure for
Adjustment
Referring to Fig. 2-1, remove nine screws that secure the
Upper Cover and remove the Upper Cover.
Connect the Extension Board.
Fig. 2-3
Remove nine screws.
Fig. 2-1
Referring to Fig. 2-2, remove five screws that secure the
Shield Cover and remove the Shield Cover.
Disconnect the Flat Cable from CN3 on the Power Board
and CN3 on the Main Board.
Remove five screws that secure the Main Board and
remove the Main Board.
27
3. Write A VCO Adjustment
3. Connection and Setting Up for
Adjustment
Test Point:
TP2 (WRITE A VCO)
Main Board
Adjust:
L72 (WRITE A VCO)
Main Board
The Fig. 3-1 shows the connection diagram for the
Supply the Composite Video signal to the COMP
adjustment procedure.
Connector of the SOURCE1 section.
Waveform
Monitor
Vectorscope
Underscanned
Colour Video
Monitor
Press the SOURCE1 Button of the A-Bus.
Connect the Digital Voltmeter to TP2.
Adjust L72 to obtain 1.8 ± 0.1V.
4. Write B VCO Adjustment
75Ω
COMP.
REC OUT
WJ-AVE55
TP4 (WRITE B VCO)
Main Board
Adjust:
L71 (WRITE B VCO)
Main Board
SOURCE1/2
COMP.
Lch Rch
Test Point:
Connector of the SOURCE1 section.
Audio
Generator
Press the SOURCE1 Button of the B-Bus.
Video Signal
Generator
Fig. 3-1
Connect the Underscanned Colour Video Monitor through
5. A-Bus Y Gain Adjustment
Waveform Monitor to the COMP OUT Connector on the
Test Point:
COMP Connector of REC OUT
Rear Panel
REC OUT Section of the Rear Panel.
Adjust:
VR2 (Y GAIN)
Main Board
Terminate the input terminal of the Underscanned Colour
Video Monitor with 75 Ω.
Connectors of the SOURCE1 and SOURCE2 sections.
Connect the probe of the Digital Voltmeter, Oscilloscope
Press the SOURCE1 Button of the A-Bus and SOURCE2
or Frequency Counter at the desired Test Point in each
Button of the B-Bus.
adjustment step.
Connect the Colour Video Monitor to the Preview Output
The adjustments should be done after 10-minute warm up.
Connector on the Rear Panel.
Press the Wipe Button, the Wipe Menu should be displayed on the Colour Video Monitor.
4. Adjustment Procedure
Refer to the Location of the Test Points and
Adjusting Controls on page 30.
Select
by using the Up/Down/Left/Right Buttons.
Select
by using the SELECT/UNDO Button.
Connect the terminated Oscilloscope with 75Ω to the
COMP Connector of the REC OUT section.
Set the Mix/Wipe Control to the B-Bus side (down side).
1. Subcarrier Frequency Adjustment
Test Point:
TP21 (FSC)
Main Board
Adjust:
VR3 (FSC)
Main Board
Confirm the Luminance signal level of the B-bus.
Set the Mix/Wipe Control to the A-Bus side (upper side).
Adjust VR2 so that the Luminance signal level becomes
Disconnect all signals from the Input terminals of the WJ-
same level ± 21 mV as B-Bus Luminance signal level as
AVE55.
shown in Fig. 4-1.
Connect the Frequency Counter to TP21.
Adjust VR3 to obtain 17.732676 MHz ± 5 Hz.
2. Read VCO Adjustment
Test Point:
TP6 (READ VCO)
Main Board
Adjust:
L929 (READ VCO)
Main Board
Disconnect all signals from the Source Input Connectors
of the WJ-AVE55.
28
B-Bus Y Level
± 21 mV
Fig. 4-1
6. A-B H Phase Adjustment
Test Point:
Adjust:
TP10 (A SYNC)
Main Board
TP11 (B SYNC)
Main Board
VR5 (H PHASE)
Main Board
Supply the Composite Cross-hatch Pattern signal to the
COMP Connectors of the SOURCE1.
Press the Mix/Wipe Button.
Press the SOURCE1 Button of the A-Bus and B-Bus.
Connect the Video Monitor to the Preview Output
Connector on the Rear panel.
Set the WIPE/MIX Control to the Center position.
Adjust VR5 so that the Cross-hatch Pattern signal of ABus and B-Bus becomes coincides on the Video Monitor
as shown in Fig. 4-2.
No Good
Good
Fig. 4-2
29
LOCATION OF TEST POINTS AND ADJUSTING CONTROLS
MAIN BOARD (Component Side)
TP10 (A SYNC)
TP2 (WRITE A VCO)
TP16 (Y GAIN)
L72 (WRITE A VCO)
VR2 (Y GAIN)
VR5 (H PHASE A-B)
TP11 (H PHASE A-B)
TP18
TP4 (WRITE B VCO)
Rear
Front
L71 (WRITE B VCO)
L929 (READ VCO)
TP6 (READ VCO)
TP9 (HBLK)
TP21 (FSC)
TP8 (VBLK)
VR3 (FSC)
30
APPEARANCE OF IC, TRANSISTOR AND DIODE
YWAJ0014
YWAJ0016
YW78P4026GCA
YWM5M4V416
YWUPD6511GC
YWM141625BFU
MN65752H
YWMB40968PF
YWUPD42102G3
36
105
27
104
80
81
26
40
41
25
3
13
15
24
52
156
53
157
52
120
41
121
40
54
21
60
49
20
61
17
208
1
80
1
160
14
36
13
13
37
19
12
24
28
40
14
12
70
1
52
48
1
1
1
1
1
MC74HC374AF
YWUPD4721GS
YWM62352GP
MC74HC541F
YW74ABT244DB
YWM51132FP
MC74HC4052F
YWMC74HC175F
11
MC74HC4066F
YWMC74HC08F
9
8
YWSC7SU04F
YWSC7S00F
YWSC7S08F
10
YW78L05UATE1
YW78L05UATE2
5
8
8
YWM5237ML
7
2
1
1
1
1
2
1
3
1
1
1SV153
YWERA1502
YWERA84009
YWERA34-10
YWERA9102
K
YWKV1471
MA141KTX
MA741TX
K
YWRB421D
K
A
A
2SC3377
1
2
3
1
2SC2866
2
K
A
3
2SK662-PQR
K
A
C
4
2
3
3
2
G
A
1
2SA1576
2SC4081
2SD1979
2SB1219QRST
2SC4713K
2SD601-QR
3
1
2
A
S1WBA60
2
3
2
2
1
K
YWRD18JT1B2
3
3
YWUPC24M12HF
3
3
4
2
1
YWTA76431S
4
5
14
16
20
YWNJM2267M
YWLM1881M
YWNJM2268V
NJM3404AM
YWM51953AFP
1
1
– 31 –
B
E
E
C
B
B
C
E
S
D
CHIP COMPONENTS
2. Chip Diode
1. Chip Transistor
The diode number is indicated on the top surface of the chip
diode using two alphabet letters.
The transistor number is indicated on the top surface of the
chip transistor using two alphabet letters or one numerical
number and two alphabet letters.
M
Type
Diode
Rank of DC Current Gain (hFE)
Transistor Number
Diode Number
Transistor Number
Letter
MA
MB
MC
MD
ME
MF
MH
MH
MC
(Chip Transistor)
Letter Transistor No. Letter
A
2SB709
X
B
2SB709A
Y
2SB710
Z
C
2SB710A
1A
D
2SA1022
1B
E
2SA1034
1C
F
2SA1035
1F
H
I
2SB792
1K
K
2SC2778
1L
P
2SD814
1M
2SD813
1N
Q
2SC2480
1O
R
2SC2405
1T
S
2SC2406
1X
T
2SC2404
1Z
U
2SC2295
2B
V
2SD602
2C
W
BQ
2SB766A
UMT
Transistor No.
2SD602A
2SD601
2SD601A
2SB799
2SB814
2SB902
2SK321
2SK316
2SK247
2SJ84
2SK199
2SK198
2SC3077
2SC2845
2SD1030
2SK374
2SK116
2SC4081
Example:
3
The resistor value is indicated on the bottom surface of the
chip resistor using three digit numbers.
Rank of DC Current Gain (hFE)
Transistor Number
Example:
330
561
123
Transistor
C: Collector
B: Base
E: Emitter
E
FET
Gate
2
1
Eacept 2SK199
2SK199
Source
1
Drain
Gate
2
Source
Drain
33 x 10 0 = 33 Ω
56 x 10 1 = 560 Ω
12 x 10 3 = 12 kΩ
Note: Zero ohm resistor (jumper chip) is colored red or
green.
Drain
3
1
2
3
–
Anode Cathode
–
Anode Cathode
Cathode Anode
–
Anode Cathode
Anode
Cathode Cathode Anode
Cathode Anode Common
Anode Cathode
–
Anode Cathode Common
–
Cathode
Anode
Anode
–
Cathode
3. Chip Resistor
Appearance and Symbols
B
Cathode
1
MA28/MA28W/MA28T
MA151K/MA152K
MA151A/MA152A
MA151WK/MA152WK
MA151WA/MA152WA
MA153
MA141K
MA143
MA3062
RD421D
2SD602-Q
2SD601-Q
2SB814-S
C
Anode
2
Letter Transistor No. Letter Transistor No.
XN1501
5H
XP4501
5R
7S
XN1601
XP4601
5C
XN4501
5H
XP4501
5H
XN4601
5C
XP5501
5L
XN5501
5L
4N
XP5601
4N
XN5601
7S
XP6501
5N
XN6501
7W
XP6435
7W
XN6435
7F
XP6534
7F
XN6534
UMX1
X1
XP1501
UMZ1
5R
Z1
7S
XP1601
WQ
YQ
1BS
Letter Diode No.
MI
MA152K
MK
MA28W-B
ML
MA28T-A
MN
MA151WA
MO
MA152WA
MT
MA151WK
MU
MA152WK
6.2
MA3062
SMD RD421D
Appearance and Symbols
(Small Chip Transistor) (Pair Transistor)
Letter Transistor No.
A
2SB1218
B
2SB1218A
2SB1219A
D
U
2SC3931
W
2SD1820
X
2SD1820A
Y
2SD1819
E3
2SA1226
2SB1219
OS
UC
2SA1532
2SC3938
YU
Diode No.
MA151A
MA152A
MA153
MA28-A
MA28-B
MA28W-A
MA151K
MA141K
MA143
3
Gate
Source
32
5-1. Removal (Transistor, Diode, Resistor and
Capacitor)
1. Add the solder to both ends of the chip (three leads for
chip transistor).
2. While attaching the soldering iron to both ends of the chip
(three leads for chip transistor) as shown below, remove
the chip by turning with tweezers.
4. Chip Capacitor
The capacitive value of replacement chip capacitors is indicated on the bottom surface. Original parts have no value
indication.
If the capacitive value is less than 100 pF, the value will be
indicated by one or two digit number expressing the capacity
directly in pF.
Note: Be careful not to damage other chips.
Example:
0.5
0.5 pF
.75
0.75 pF
2.5
2.5 pF
33
33 pF
Tweezers
1
1 pF
82
82 pF
If the capacitive value is 100 pF or greater, the value will be
indicated by an alpha-numeric code. The letter precedes the
number and expresses a numerical value to be multiplied by
the number which follows.
Chip
Soldering iron
5-2. Removal (IC)
1. Add the solder wick and soldering iron to each lead of the
IC and remove solder.
Multiplier (1 - 5)
Numerical Value
Solder wick
Numerical Value
Letter Value
A
10
B
11
C
12
D
13
E
F
G
H
J
K
L
M
15
16
18
20
22
24
27
30
Chip
Letter Value
N
33
P
36
Q
39
R
43
S
T
U
V
W
X
Y
Z
Soldering iron
2. Add the soldering iron to each lead of the IC and left each
lead of the IC using thinner pin.
47
51
56
62
68
75
82
91
Thinner Pin
3. Remove the IC turning with pliers.
* Letters I and O are not used.
Example:
10 x 10
1
= 100 pF
N2
33 x 10
2
= 3300 pF
S3
47 x 10 3 = 47000 pF
A1
Soldering iron
Chip
Pliers
Turn
Chip
5. Precautions in replacing the chip component
5-3. Mounting
1. Place the solder thinly on the chip mounting foil.
2. Solder the chip temporarily while holding the chip with the
tweezers.
1. Make sure that the unit is turned OFF when replacing the
chip.
2. Use tweezers to prevent any damage to the chip surface.
3. Do not re-use the chips after removal.
4. Do not rub the electrode of chips.
5. Do not subject the chips to excessive stress.
6. It is recommended that a pencil-type soldering iron to be
used.
7. The solder whose diameter is less than 0.5 mm is recommended.
8. Do not heat the chip more than 3 seconds.
9. Maintain temperature control under 260°C (500°F) when
soldering.
Tweezers
Chip
Solder
Soldering iron
3. Solder both ends of the chip (three leads for chip transistor).
Chip
Solder
Soldering iron
33
BLOCK DIAGRAM OF SWITCH BOARD
POSITIONER BOARD
SWITCH BOARD
CN3
10
7
UPPER
SIDE
1
2
3
LOWER
SIDE
9
6
5
4
UPPER
LOWER
F.G.
XPOSI
YPOSI
N.C.
N.C.
N.C.
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
7
1
UPPER
LOWER
F.G.
XPOSI
YPOSI
GND
GND
GND
8
2
6
UPPER
5
XPOSI
YPOSI
5
1
2
3
VR2
SPEED
4
F.G.
SPEED
TAKE
LOWER
UPPER
4
3
9
6
10
LOWER
VR1 TAKE
CN1
D31
POWER
CN2
F.G.
LOWER
UPPER
XPOSI
YPOSI
TAKE
SPEED
VR3 POSITIONER
SW7
SW8
WIPE/MIX
LUM KEY
CHROMA
KEY
NO.
SET
FADE
AUDIO
SELECT
SW9
SW10
SW11
SW12
SW13
SW14
SW15
SW16
A
SOURCE 1
A
SOURCE 2
A
SOURCE 3
A
B.C.
OSD
WIPE
OSD
DVE
OSD
COL
A
SOURCE 4
SW17
SW18
SW19
SW20
SW21
SW22
SW23
A
DVE
A
FREEZE
AUTO
FADE
AUTO
TAKE
1
2
SW25
SW26
SW27
SW28
SW29
B
SOURCE 1
B
SOURCE 2
B
SOURCE 3
B
B.C.
SW33
SW34
SW35
B
DVE
B
FREEZE
EVENT
MEMORY
D3
D7
D8
D9
D10
WIPE/MIX
LUM KEY
CHROMA
KEY
NO.
A
SOURCE 4
D11
D12
D13
D14
D15
SW24
A
SOURCE 1
A
SOURCE 2
A
SOURCE 3
A
B.C.
POSITION
3
4
D16
D17
D18
D19
D20
SW30
SW31
SW32
A
DVE
A
FREEZE
AUTO
FADE
AUTO
TAKE
SCENE
5
6
7
8
D21
D22
D23
D24
D25
SW36
SW37
SW38
SW39
SW40
B
SOURCE 1
B
SOURCE 2
B
SOURCE 3
B
B.C.
COLOR
CORRECT
EVENT
CALL
9
0
ENTER
B
SOURCE 4
D26
D27
D28
D29
D30
B
DVE
B
FREEZE
EVENT
MEMORY
EVENT
CALL
B
SOURCE 4
– 34 –
Q10
Q9
LED3
Q8
LED2
LED1
LED0
Q6
KEY0
KEY1
KEY2
KEY3
KEY4
KEY5
KEY6
KEY7
Q7
D5
D4
D6
SCAN0
SCAN1
SCAN2
SCAN3
SCAN4
KEY0
KEY1
KEY2
KEY3
KEY4
KEY5
KEY6
KEY7
LED0
LED1
LED2
LED3
LED4
LED4
SW6
Q5
SW5
Q4
SW4
Q3
SW3
Q2
SW2
Q1
SW1
D2
D1
SCAN0
SCAN1
SCAN2
SCAN3
SCAN4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
5V
5V
GND
GND
F.G.
LOWER
UPPER
XPOSI
YPOSI
TAKE
SPEED
SCAN0
SCAN1
SCAN2
SCAN3
SCAN4
KEY0
KEY1
KEY2
KEY3
KEY4
KEY5
KEY6
KEY7
LED0
LED1
LED2
LED3
LED4
To
Main Board (2/2)
BLOCK DIAGRAM OF MAIN BOARD (1/2)
MAIN BOARD
SOURCE 1 S-Y
4
Q39
BUFFER
SOURCE 1 COMP 8
SOURCE 1 BIAS
6
SOURCE 2 S-C
9
SOURCE 2 S-Y
12
BUFFER
14
SOURCE 3 S-C
17
SOURCE 3 S-Y
20
BIAS2
Q45
SOURCE 3 COMP 24
SOURCE 3 BIAS
BIAS3
22
SOURCE 4 S-C
25
SOURCE 4 S-Y
28
Q48
BUFFER
SOURCE 4 COMP 32
SOURCE 4 BIAS
10
9
BUFFER
2
3
A5V
4
A5V
+12V
5
+12V
GND
6
FGND
7
FGND
8
SOURCE 1L
37
15
SYNC
SEPARATOR
OUT2
IN1
OUT1
SOURCE 1L GND 36
CONT1
5
IC501
SOURCE 2R GND 38
ELECTRONIC VR
SOURCE 2 R
40
SOURCE 2 L
42
11
15
SOURCE 2L GND 41
SOURCE 3R GND 43
SOURCE 3 R
45
SOURCE 3 L
47
11
15
SOURCE 3L GND 46
SOURCE 4R GND 48
SOURCE 4 R
50
SOURCE 4 L
52
SOURCE 4L GND 51
11
15
IN2
IN1
OUT2
4
ZB 3
CONT1
OUT1
5
IC502
ELECTRONIC VR
IN2
OUT2
IN1
OUT1
CONT1
5
IC503
ELECTRONIC VR
IN2
IN1
OUT2
CONT1
5
OUT1
54
REC OUT R
56
REC OUT S-C
57
REC OUT S-Y
60
3
Q125
BUFFER
FILTER
AMP.
3
IC901 SWITCH
203
202
68
70
RS232C DR
71
IC39 A/D CONVERTER
TP17
BUFFER
40
9-16
VINB
21-28
IC505(1/2)
Q133
BUFFER
BUFFER
45
VINA
1
AMP.
FILTER
Q138
BIAS
7
6
IC504(2/2)
FADE3
7
AMP.
22-29
SC0-SC7
10-17
TP4
(WRITE B VCO)
IC44,D15
L71 (WRITE
B VCO) 2
OSC
Q137
Q150
10
SY0-SY7
DA0-DA7
DB0-DB7
TP18
Q130
TP5
FILTER
4
Q146,X3
OSC
IC505(2/2)
Q132
CLAMP
Q513
BUFFER
FADE4
5
AMP.
8
Q140
Q9-Q11
BUFFER
AMP.
17
CLOUT
VIN
YOUT
D0-D7
45
D0-D7
CLK
C0-C7
25-32
4
AMP.
1
IC13(1/2)
4
AMP.
1
IC13(2/2)
5
AMP.
8
Q141
BUFFER
BUFFER
IC52
D/A CONVERTER
Q5,Q6
FILTER
BUFFER
Q13
Q12
IC14(1/2)
CF5
Q17
CF6
BUFFER
AMP.
Q7,Q8
FILTER
BUFFER
COUT
YOUT
B1-B8
20
BOUT
22 AOUT
A1-A8
Q14-Q16
Q20
CLKB
MIX
Q36
MIX
CCLK
HD
1-4, 25-28
14
CLKA
Q28
Q25-Q27
BUFFER
SVSELB
6-13
BIAS
CF7
AMP.
VD
Q37
BUFFER
TOGPI
BUFFER
IC16
RS232C DRIVER
14
DOUT1
12
RIN1
DIN1
ROUT1
AMP.
FILTER
9
DT1
DR1
197
1
2
CMD
RAS
CAS
DTD
PCO
CLMP
147-149,171-177
107
98
97
H
AS3-AS9
PAL/NTSC
A/B
IC801(4/4)
20
YOUT
22
CLKA
BOUT
AOUT
CLKB
VD5V
10
9
5
14
6-13
B1-B8
A1-A8
1-4, 25-28
– 35 –
90
98
VD5V
WP2/TD1
86
WP1/TD0
PAL
WP0
LMRST
VD5V
IC48
CHAR
199
198
197
11
15-20,
GATE ARRAY LOGIC
24-30,36
DQ0 XDQ0
|
|
DQ15 XDQ15
21-23
AS0
XAS0 1,51,52
|
|
AS2
XAS2 40
39
XCC1
CC1
41
38
XCC0
CC0
42
35
XWE
WE
32
31
BCKUI
CKUI CKUO 35
CKI
R830-R832
1
13
12
CMD
RAS
CAS
DTD
VD5V
16 1Y2
1A2 4
18 1Y1
1A1 3
12 1Y4
1A4 8
14 1Y3
1A3 6
1
KBB
156
KBR
YCLK
KBG
AIN0-AIN7,SHGA
111-119
BIN0-BIN7,SHGB
122-130
+9V REG
3
2
CN4
1 CHARIN
RCLK
8 B
9 R
107
10 G
To
Titler
152
CCLK
TP6
(READ VCO)
IC53,D930
L929(READ VCO)
OSC
Q3
FILTER
159
BIN0-BIN7
OSC2IN
SHGB
D0B-D7B,ST1B 66-72
REG0B-REG5B 74-80 ST1
HPC 3
REG0-REG5
D0-D7
5-8,
10-13
RECC0-RECC7
HD
32-35,
37-40
47-54
11,13,14,16,
19,21-24, IC46
47,49,50,
52,55,57, CACHE D-RAM
58,60
DQ0-DQ15
FS4
2YCLK
SYNC
4
15
58
TP9
(HD)
4
5
6
10
CC1
CC0
WE
K
59
HD
61
VD
PRVC0-PRVC7
PRVY0-PRVY7
FS4
HBLK
2YCLK
VBLK
SYNC
TP21
(FSC)
26-28
AS0-AS2
RECY0-RECY7 VP
64
2
IC101
2
63 62 65
4
IC100
IC58
4
CHARACTER 16 17 18 11
GENERATOR
VR VG VB BLK1
8
CCLK
OSDCS
OSDDAT
OSDCLK
2
3
1
4
OSCIN
CS
DATA
19
VSYNC
20
HSYNC
CLK
RESET
42-44,61-64
AD0-AD9
IC804(4/4)
11
13
12
VD5V
CMD
RAS
CAS
DTD
VBLK
HBLK
GPI
BIAS1
BIAS2
BIAS3
BIAS4
DR1
DT1
FADE1
FADE2
FADE3
FADE4
SVSELA
SVSELB
OSDCS
OSDDAT
OSDCLK
OSDRST
5 +9VOUT
7 KB15SW
106
AIN0-AIN7
SHGA
17-24
4 GND
6 GND
108
TP8
(VD)
8
29
30
31
8
4
Y3C
32-34,38-41,67-69
VD5V
IC49
IC64
IC513 BUS BUFFER
OSDRST
R841
R842
R843
10
9
1
2
3 SYNC
+12V
AS3-AS9
103
Q2
BUFFER
K
BCKUI
147-149,171-177
1
2
109 4
WE
ACKUI
196
CMD
182
RAS
181
CAS
180
DTD
108
Y3CLK
YCLK
IC55
D/A CONVERTER
92
VR3
(FSC)
2 GND
8
29
30
31
151-154,167-169
V
93
OSC
IC56,D7,
D8,X5
CH0
WP3/TD2
32-34,38-41,67-69
108
AS0-AS2
CCLK
99
94
43
OSC1
CH1/TD4
VD5V
196
182
181
180
183-185
WE
96
TP7 VD5V
CH2/TD5
42-44,61-64
IC803
CC0
CC0
AD0-AD9
158-165
DQ0 186-193
|
DQ15
CC1
CC1
CH4/TD7
CH3/TD6
97
AS3-AS9
IC804(3/4)
COUT
AS0-AS2
4
5
6
10
S/V
129
BUFFER
SYNC
R811
R812
R813
151-154,167-169
26-28
IC62 SYNC GENERATOR
102
101
12
11
13
10
14
9
15
16
4
21
3
22
2
23
1
24
6
19
8
17
DO7
DO6
DI7
DO5
DI6
DO4
RE
DI5
WE
DI4
DO3
DI3
DO2
DI2
DO1
DI1
DO0
DI0
RSTR
RSRW
RCLK
WCLK
SYNC
AS3-AS9
145
128
BUFFER
VD5V
IC12
WE
198
Q23,Q24
Q30-Q32
4
7
CC0
199
85-92 YAD0-YAD7
SHDG
EXSYNC
96
YAD0-YAD7
EXI
SHDG
D0B-D7B, ST2B
REG0B-REG5B
ST2,
REG0-REG5
D0-D7 110, 112-125
SY0-SY7
IC42 LINE MEMORY
1-4,
75-82
9-12
FRMLM0
5
SC0-SC7
DO0-DO7 RE
|
20
FRMLM7
13-16,
WE
21-24
TOLM0 65-72
|
TOLM0-TOLM7
TOLM7
62
8
RCLK
LMCLK
17
WCLK
OSC1IN
6
63
RSTR
RRST
64
19
PCO
R833-R840
RSTW
WRST
R846-R853
VD5V
2YCLK
BIAS
CF8
183-185
CC1
11,13,14,16,
19,21-24, IC30
47,49,50,
52,55,57, CACHE D-RAM
58,60
DQ0-DQ15
AD0-AD9
Q29
Q33
DQ0-DQ15
103
8
YCLK
PAL/NTSC
85-92, 96
YAD0-YAD7
SHDG
110,112-125
ST2, REG0-REG5
D0-D7
D0B-D7B,ST2B
REG0B-REG5B
FS4
5
Q21,Q22
FILTER
V
33-40 COMPC0
|
COMPC7
31 4FSCS
43-50 COMPY0
|
COMPY7
33-40
16
C0-C7
IC14(2/2)
R803-R809
R816-R823
R862
15-20,
GATE ARRAY LOGIC
24-30,36
DQ0 XDQ0
|
|
DQ15 XDQ15
21-23
AS0
XAS0 1,51,52
|
|
AS2
XAS2 40
39
XCC1
CC1
41
38
XCC0
CC0
42
35
XWE
WE
32
31
ACKUI
CKUI CKUO 35
CKI
R800-R802
OSC2IN
60
IC40 Y/C SEPARATOR
16
19
5
20
52
56
10
6
RCLK
WCLK
RSTR
RSTW
IC43 WRITE CONTROL
TP11 (H PHASE A-B)
Q135
8
IC801(3/4)
128
IC37(3/4)
SWITCH
2
H
VD5V
9
62
158-165
186-193
Y3CLK
Q126-Q129
BIAS
MIXING
97
VD
Q508
6
98
4
IC504(1/2)
16
S/V
CF12,CF13
2
ZA 13 8
PCO
CLMP
145
HD
BIAS
4
PRV OUT COMP 66
RS232C DT
25-32
C0-C7
RE
WE
5
20
TOLM0-TOLM7
63
RRST
64
WRST
AD0-AD9
6
FADE2
REC OUT COMP 64
GPI
YOUT
C0-C7
CN5(3/3)
REC OUT L
CLK
4
IC18
11 YA3
1
VIN
D0-D7
45
2
16
16
IC50
CLOUT
1
SA
MIXING
60
SVSELA
7
10
2
4
DO0-DO7
AS0-AS2
OSC2IN
VR5 (H PHASE A-B)
5
15 YA2
10
17
LMCLK
PCO
52
33-40 COMPC0
|
COMPC7
31
4FSCS
43-50 COMPY0
|
COMPY7
33-40
D0-D7
AMP.
4 YB3
10
SA
9
SB
FADE1
1
2
1
Q119-Q124
IC37(2/4)
SWITCH
2 YB2
IN2
OSC
Q131
14 YA1
11
Q145,X2
TP3
CLAMP
16
13-16,
21-24
IC59 LINE MEMORY
IC28 LINE MEMORY
IC800
OSC1IN
4
FILTER
+5V
IC512
SB
12 YA0
35
OSC
IC26 Y/C SEPARATOR
2
IC35 SELECTOR
SOURCE 1R
Q118
BIAS
Q511
SVSELB
SOURCE 1R GND 33
Q117
9
ZA 13
5 YB1
IC500
ELECTRONIC VR
FILTER
Q151
IC23(3/4)
SWITCH
1 YB0
CN5(2/3)
TP2 (WRITE A VCO)
IC33,D13
L72 (WRITE
A VCO) 2
VINA
3
Q113
11 YA3
9
10-17
SC0-SC7
SC0-SC7
1
BUFFER
15 YA2
10
45
6
14 YA1
BSEL1
BUFFER
65-72
17
DB0-DB7
IC900 SWITCH
12 YA0
BSEL0
Q115
BUFFER
SY0-SY7
21-28
TP16 (Y GAIN)
Q139
SY0-SY7
DA0-DA7
Q101-Q104
IC34 SELECTOR
DGND
9-16
VINB
56
ZA 13 8
D5V
To
Power
Board
. . CN3
AMP.
4
11 YA3
DGND 1
40
1-4,
9-12
TOLM0-TOLM7
22-29
IC19
15 YA2
AGND
FILTER
2
SA
14 YA1
D5V
CF10,CF11
BUFFER
2
SB
12 YA0
CN3
VR2 (Y GAIN)
7
IC21 SELECTOR
BUFFER
Q49
Q100
SVSELA
BIAS4
30
BUFFER
5
BUFFER
Q47
Q114
BIAS
3
4 YB3
9
SB
10
SA
BUFFER
Q46
4
ZB 3
2 YB2
BUFFER
Q44
BUFFER
IC23(2/4)
SWITCH
EXSYNC
EXI
IC25 A/D CONVERTER
TP15
Q105
5 YB1
Q43
202
AMP.
1 YB0
BUFFER
4
Q106-Q111
ZA 13
15 YA2
BUFFER
Q41
SOURCE 2 COMP 16
SOURCE 2 BIAS
14 YA1
Q40
1
2
1
SYNC
SEPARATOR
11 YA3
BIAS1
Q42
12 YA0
BUFFER
IC511
75-82
OSD
1
2
FRMLM0
|
FRMLM7
OSDB
Q38
SOURCE 1 S-C
IC20 SELECTOR
203
OSDR
ASEL1
CN5(1/3)
IC29 WRITE CONTROL
TP10 (ASYNC)
IC47
OSDG
+5V
ASEL0
D0B-D7B (8-BIT)
REG0-REG5 (6-BIT)
STB1B, ST2B
VBLK
HBLK
GPI
BIAS1
BIAS2
BIAS3
BIAS4
DR1
DT1
FADE1
FADE2
FADE3
FADE4
SVSELA
SVSELB
OSDCS
OSDDAT
OSDCLK
OSDRST
To
Main
Board
(2/2)
BLOCK DIAGRAM OF MAIN BOARD (2/2)
MAIN BOARD
VD5V
D1
D2
IC4 MICROPROCESSOR
F5V
8
51
55
64
71
+
–
+12V
IC11
5V
REGULATOR
Q1
RIPPLE
FILTER
1
IN
L2
D3
2
OUT
GND
3
L3
IC3
RESET
6
Vcc
L1
To
Switch Board
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
AVREF1
–
–
7
CN1
65
+
+
VD5V
5V
5V
GND
GND
F.G.
LOWER
UPPER
XPOSI
YPOSI
TAKE
SPEED
SCAN0
SCAN1
SCAN2
SCAN3
SCAN4
KEY0
KEY1
KEY2
KEY3
KEY4
KEY5
KEY6
KEY7
LED0
LED1
LED2
LED3
LED4
N.C.
VDD
PAL/NTSC
VDD
AVDD
NMI
7
RESET
GND
4
RESET
VBLK
HBLK
GPI
BIAS4
BIAS3
BIAS2
BIAS1
DR1
DT1
+
–
UPPER
LOWER
UPPER
XPOSI
YPOSI
TAKE
SPEED
SCAN0
SCAN1
SCAN2
SCAN3
SCAN4
KEY0
KEY1
KEY2
KEY3
KEY4
KEY5
KEY6
KEY7
LED0
LED1
LED2
LED3
LED4
LOWER
2
3
4
5
6
7
8
9
A1
A2
A3
A4
A5
A6
A7
A8
IC1
BUS
BUFFER
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
18
17
16
15
14
13
12
11
D0
D1
D2
D3
D4
D5
D6
D7
OE1 OE2
1
19
KEYGATE
66
XPOSI
YPOSI
TAKE
SPEED
SCAN0
SCAN1
SCAN2
SCAN3
SCAN4
D0
D1
D2
D3
D4
D5
D6
D7
LEDCLK
ST1
ST2
60
61
62
63
1
2
3
4
5
12
13
14
15
16
17
18
19
20
50
25
KEYGATE
6
9
X1
2
5
6
9
12
1
1Q
2Q
3Q
4Q
5Q
1D
2D
3D
4D
5D
6D
7D
8D
OC CLK
XPOSI
YPOSI
TAKE
SPEED
SCAN0
SCAN1
SCAN2
SCAN3
SCAN4
3
4
7
8
13
14
17
18
11
D0
D1
D2
D3
D4
59
VBLK
HBLK
GPI
BIAS4
BIAS3
BIAS2
BIAS1
DR1
DT1
IC15
D/A CONVERTER
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
LEDCLK
ST1
ST2
FADELD
FADECLK
FADEDAT
58
57
56
SVSELA
SVSELB
48
47
15
16
17
LD
AO3
CLK AO4
DI
AO5
AO6
BUSCLK
24
2
3
4
5
FADE1
FADE2
FADE3
FADE4
SVSELA
SVSELB
IC5
D-FFs
BUSCLK
D0
D1
D2
D3
9
4
5
12
13
CLK
1D
2D
3D
4D
To
Main Board (1/2)
VD5V
G
1Q
2Q
3Q
4Q
1
2
7
10
15
ASEL0
ASEL1
BSEL0
BSEL1
KEYGATE
X2
X1
OSDDAT
OSDCS
OSDCLK
OSDRST
C15
IC7
D-FFs
LED0
LED1
LED2
LED3
LED4
10
Vss
72
73
74
75
76
77
78
79
80
52
53
54
49
OSDDAT
OSDCS
OSDCLK
OSDRST
24SW
IC6
D-FFs
REGCLK
LEDCLK
21
REGCLK
D0
D1
D2
D3
D4
D5
11
3
4
7
8
13
14
17
18
1
CLK
1D
2D
3D
4D
5D
6D
7D
8D
OC
1Q
2Q
3Q
4Q
5Q
6Q
2
5
6
9
12
15
REG0
REG1
REG2
REG3
REG4
REG5
R720-R735
– 36 –
REG0-REG5 (6-Bit)
D0B - D7B (8-BIT)
ST1B, ST2B
EXPLODED VIEW
Numbers show screws.
No.
1
2
3
4
Screws
XSB3+10FX
XSB26+4FX
XTB3+10CFX
XTB3+10CFXK
Description
Binding Head Screws
Binding Head Screws
Binding Head Tapping Screws
Binding Head Tapping Black Screws
M5
M3
2
M4
M2
M27
M10
A
M25
M1
FB1
M18
M8
3
M11
FB2
3
FB2
M15
M14
M24
M22
M30
M23
PCB4
B
PCB5
PCB1
M16
CF101
1
M21
M13
M18
M28
PCB3
3
M19
M17
1
FB1
PACKAGING
3
4
M41
M42,43,44
M6
M26
M12
M20
M40
M47
B
A
M46
M45
PCB2
3
E1
WJ-AVE55
M48
M47
M7
M9
Serial No.
Label
M47
4
Serial No.
Label
M50
CN1
– 42 –
M49
M49
Printed in Japan
C-573 N 5,12,23

The AVE55 service manual

Transcription

Similar documents

MEGAPOLITAN

EF1000-3000

Cylindrical GEM Inner Tracker for BESIII

service manual

349 025 300 113 Chevrolet Captiva, 06/2006 – 2013

SERVICE MANUAL

342 197 300 113 Jeep Renegarde, 2014 - Westfalia

SM2010 “Marco” * Line preamplifier

to Company Profile

Z6 Z16