Würth Elektronik Circuit Board Technology

Transcription

Würth Elektronik Circuit Board Technology
Webinar 2014: Benefits of flex-rigid & Co.:
Impedance matching for good signal integrity
Würth Elektronik Circuit Board Technology
www.we-online.com
page 1
03.09.2014
Agenda
S Impedance and the circuit board
I Signal integrity and flex-rigid
G Design options with flex-rigid
N Co-operative design flow
A Measurement and documentation
L Summary, Q&A
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Reasons for a change in the signal
Interface
specification
Quelle: Polar
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Impedance and the circuit board
 PCB not an optimal tranfer medium between transmitter and
receiver
 Change of the information on a pcb influenced by:
•
•
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Length and width of conductor
Losses by ohmic, capacitive and inductive resistances
Raw material - loss factor and permittivity
Changes in connector´s cross-sectional area = Impedance jump
Switch of reference layers = Impedance jumps
Reflections due to PTHs
Crosstalk between conductors
Noise interference from external sources (EMC shielding)
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03.09.2014
Signal integrity and the PCB
Core topics are:
 Impedance power matching
 Signal time (Timing) / bus timing
 Reflections
Example from USB3-design:
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Impedance matched PCB
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PCB as an information carrier
Optimum situation: Power matching Z=constant  Impedance matched PCB
T
Receiver
Sender
Z Conductor=50Ω
Z Source=50Ω
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Circuit Board
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Z Receiver=50Ω
03.09.2014
Parameters for the circuit board

Simple modell: Single Strip Line with one reference layer
Assumption:
Loss-free transmission
R;G=0
R
Z=
R+jωL
R;G=0 Widerstands und Ableitungsbelag
C
G+jωC
L
Z=
L
C
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03.09.2014
Parameters for the circuit board
L mainly length of
conductor
Z=
L
C
R
C mainly given by:
Length x Width; dielectric thickness; εr
C
L
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03.09.2014
Models: Layers/ track configurations
Layer configurations:
Surface
Coplanar
Embedded
Microstrip
Surface
Microstrip
Stripline
Track configurations:
line width
Single Ended
line width
space
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Differential Pair
03.09.2014
Parameters for impedance calculations
C2
thickness solder resist
over track
S1
gap
layout
W2
upper track width (head)
T1
copper thickness
r
dielectric constant
solder resist
[typ. 3,5]
C1=C3
thickness solder resist
over FR4
H1
layer distance
Signal > Reference
r
W1
lower track width (foot)
= layout
dielectric constant
FR4
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Effect of parameters
Impedanz - Einflussgrößen
medium
low
strong
strong
Track width
Copper thickness
Layer distance
Dielectric constant
εr
w+h = layouter / developer
+ PCB producer
t
t = galvanic process, base copper
εr = base material
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w
h
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Specialties with flex-rigid
 big material mix
(rigid material, flexible cores, adhesives, Bondply,
etc.)
 Different stack-up´s in rigid and flexible
areas
– See example: Symmetrical-Strip-Line in rigid
converts to Surface Strip Line in flexible area

Low r values for Polyimide

Low dielectric thicknesses
– Standard Polyimide: 50µm
– thicker PI-filmes are very expensive
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03.09.2014
Specialties with flex-rigid
Solution:
 Define target impedance value
 Choose impedance model
 Choose H of flexible layer
– (! 75µm / 100µm PI are cost drivers!)
– ? Are there mechanical requirements?
(i.e. bending radii, dynamical bendings?)
 Simulation: fit line width
consider Wmin with PCB producer
 „Hatch“ - Option for reference layer
Zflex = Zrigid
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03.09.2014
So now we will have a….
Which parameter especially for flex-rigid has to be regarded carefully
and has a big impact on the impedance value?
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Effect of line / width parameters
Design line / width, Polyimide 50µm
100
95
Line width
Z diff []
90
85
100µm
80
125µm
75
150µm
70
65
60
55
50
100
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150
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200
Separation [µm]
250
300
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Hatch: reference / shield openings
Reference layer with cross-hatch
microstrip 125µm/150µm/125µm
130
Polyimidfilm
120
100µm
Z diff []
110
75µm
100
50µm
90
80
70
60
25%
Copper removal
•
Improving bendability
•
Improving drying process
•
Rising impedance value
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50%
75%
cross-hatch copper area
100%
Tipp for diff. pair:
(here 20% Cu)
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Reference layer with “shield opening”
Differential pairs in flexible area
• Below pairs 100% copper
• Rest of area with shield opening
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IPC 2223
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Calculation and documentation 5Ri-4F-5Ri
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Calculation and documentation 5Ri-4F-5Ri
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Calculation and documentation 5Ri-4F-5Ri
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Layer configuration: 1-layer in flexible / bendable area
Surface Coplanar – without reference layer

Flex-rigid 1F–xRi

FR4 Semiflex 1Ri–xRi
Remark: no reasonable values with single ended – only differential pairs possible!
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Layer configuration: 2-layers in flexible / bendable area
Surface Microstrip – with 1 referenece layer

Flex-rigid xRi–2F–xRi

FR4 Semiflex 2Ri–xRi
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03.09.2014
Layer configuration: > 2-layers in flexible / bendable area
Stripline – with 2 reference layers

Flex-rigid > xRi–2F–xRi, i.e. 1Ri–6F–1Ri
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Impedance measurement with test coupons

Standard
23
mm
– Single ended
– Differential pair
28
mm

Specific
150 mm
– Flex and flex-rigid possible
– Smaller for integration into panel-frame
– Mixed modules possible
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Impedance measurement
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TDR Technology
Windows based
10% - 90% rise time lower than 65ps
Ultra stable time base (RMS-Jitter < 500fs)
Analog sampling bandwidth > 10GHz
All specifications valid for 0°C ≤ T ≤ 40°C
High stability w/o recurring calibrations

Product from Germany
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Impedance measurement diagram
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Impedance measurement protocol
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So now we will have a….
Which of the following items is most important for you?
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03.09.2014
Dientleistungen
Summary
Signal integrity with flex-rigid
 There are system advantages with flex-rigid and
Semiflex
 Stack-up constraints require special actions in
design & layout
 NEW: integrative calculation and documentation
of rigid and flexible area
 NEW: ability of calculation of hatched reference
layers
 Design and measurement of specific flex-rigid
impedance test coupons with reduced area
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03.09.2014
Understanding the context is the secret to success!
Thank you very much for your attention!
Andreas Schilpp
WÜRTH ELEKTRONIK GmbH & Co. KG
Produkt Management
Circuit Board Technology
T.: +49 7940 946 330
E. [email protected]
W. www.we-online.de/flex
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