W3V/A SCHEMATIC V2.1

Transcription

A
B
C
D
E
W3V/A SCHEMATIC V2.1
PAGE
1
Content
PAGE
SYSTEM PAGE REF.
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Content
1
POWER PAGE REF.
DOTHAN CPU-1
DOTHAN CPU-2
CPU CAP/THERMAL SENSOR/ITP
ALVISO: CPU
ALVISO: DDR2 & DMI & PEG
ALVISO: DDR2
ALVISO: POWER & Caps
ALVISO: GND & NCTF & Straps
CLOCK GEN (ICS954213)
DDR2 SODIMM(0) & Caps
DDR2 SODIMM(1) & Caps
DDR2 TERMINATOR
ATI M24: MAIN
ATI M24: MEMORY/SS
ATI M24: PWR & GND
ATI M24: Strapping
LVDS/INVERTER
CRT/TV/TPM CONN
ICH6: SATA/LPC/IDE/ACZ (1)
ICH6: PCI/DMI/USB/PCIE(2)
ICH6M: PWR/GND/CAPS(3)
ICH6: PULL UP & Straping
SATA to PATA BRIDGE
HDD CON
SWAP BAY CON
USB PORTS
SUPER I/O (LPC47N207)
FIR & FWH
KBC 38857
Azalia AUDIO (ALC861-VS)
AUDIO AMP/JACKS
MIC AMP
SMBUS
PCI GIGA LAN (88E8001)
RJ11_RJ45/MDC/BT
MINIPCI
PCI CARDBUS (R5C841)
PCI PCMCIA SOCKET A
IEEE1394A/3in1 CONN
LEDs & DEBUG PORT
DJ/HOTKEY/TP LED
PWR SW/RESET/KBC LED
FAN & DC_IN
POWER-ON SEQUENCE
DISCHARGE/EMI/VCCA
49 VCORE_MAX1987
50 SYSTEM
51 1.5V,1.8V,2.5V,1.05V
52 VGA VCORE
53 1.5VA & DDR2
54 PIC16C54/BATCON/PWOK
55 CHARGER
56 BATLOW/SD#
57 LOAD SWITCH
58 BATCON
59 Power Flowchart
60 HISTORY
61 DC_IN CONN.
62 ODD CONN.
63 TP&LED CONN
2
3
4
5
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
Monday, January 17, 2005
1
OF
63
SCHEMATIC FILE NAME :
DESCRIPTION:
Content & History
C
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
D
E
A
B
C
D
E
W3V/A:Dothan & Alviso-PM+M24-CSP/Alviso-GM
BLOCK DIAGRAM
VCORE
49
1
MAIN
BATTERY
(4S2P)
2nd
BATTERY
(3S2P)
58
SYSTEM
50
1.5V,1.8V,
1.05V,2.5V 51
58
TV CONN
21
1
....
Dothan
CLOCK GEN.
ICS954213
478 uFCPGA
CHARGE
CPU
CAP/RES
RESET
6
55
SM_BUS
45
36
PIC16C54
4,5
54
12
LVDS &
INVERTER
20
CONN
2
CRT CONN
21
BATLOW/SD#
HOST BUS
AGTL 1.468V,133MHZ
ATI
M24/M22
DDR2 400/533
SODIMM X2
DDR2 SDRAM 400/533MHz
PCI-E x16
ALVISO
1257 uFCBGA
16,17,18,19
+1.8V
+0.9VS
7,8,9,10,11
...
DDR
CAP/RES
15
USB x3
USB2.0
TOUCHPAD BOARD
PATA
LED FPC
SWAP
BAY 28
TOUCHPAD
LEDs
57
VGA VCORE
52
Thermal
Sensor
(MAX6657)
1.5VA,0.9VS
53
6
3.3V, 33MHz
PCI_BUS
IDE_BUS
KEYBOARD COVER FPC
LID SENSOR
LOAD Switch
46
ICH6-M
29
LEDs
DCIN
RTC
FAN
CON.
13,14
DMI x4
3
2
56
3
609 BGA
Azalia
SATA
22,23,24,25
SATA to PATA
BRIDGE
SILICON IMAGE
Sil3811
26
GIGA LAN
MARVELL
88E8001
MINI-PCI
TYPEII 39
37
3-IN-1
CARD
READER
CARDBUS
42
RICOH
R5C841
40
PATA
AUDIO DJ FPC
Azalia
CODEC
ALC861-VS33
HDD
AUDIO DJ SWITCH
4
27
Azalia
MDC
CONN. 38
RJ11+RJ45
JACK CONN
LAN IO
38
38
1394
SLOT
CARDBUS
1 SLOT
42
AUDIO DJ LED
VCCA, VCCB
VPPA, VPPB
LPC, 33MHz
AUDIO AMP
TPA0212
HOTKEY FPC
4
41
34
INSTANT KEYS
SUPER I/O
SMSC
47N207 30
DC-IN BOARD
DC-IN JACK
KEYBOARD
CONTROLLER
M3885XHP 32
FWH
31
Headphone
34
ODD BOARD
5
FIR
ODD CON.
INTERNAL
KEYBOARD
MIC AMP
NJM2100
32
31
5
MIC IN
35
34
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
2
OF
63
DESCRIPTION:
BLOCK DIAGRAM
C
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
D
E
A
B
PCI Device
Chipset (Host to PCI)
Mini_PCI
LAN --88E8001
CardBus
1394
3 IN 1
1
IDSEL#
C
REQ/GNT#
(AD30 internal)
AD18
AD16
AD17
AD17
n/a
3
0
1
1
1
2
3
Used As
E
Azalia
USB 0,1
USB 2,3
USB 4,5
PC/PCI
Interrupts
B,D
C
B
A
C
:
:
:
:
PCI_INTB#
PCI_INTA#
PCI_INTD#
PCI_INTC#
1
SMBUS ADDRESS :
M38857_GPIO Used_As
ICH6M_GPIO
D
Signal Name
CLK
DDR_SODIMM0
DDR_SODIMM1
THERMAL
=
=
=
=
1101001x
1010010x
1010000x
1001100x
(
(
(
(
D2
A4
A0
98
)
)
)
)
Signal_Name
P20
GPO
KBCRSM
P21
GPO
BAT_SEL
GPO
BAT_LEARN
GPIO00
GPI
KBDDT0
P22
GPIO01
GPI
KBDDT1
P23
GPO
MSK_INSTKEY#
GPIO06
GPI
PM_BMBUSY#
P42
GPO
WATCHDOG
GPIO07
GPI
FIR_SEL
P43
GPI
SWDJ_EN#
GPIO08
GPI
EXTSMI#_3A
P44
GPO
KBCPURST_3Q
GPIO11
GPI
LID_ICH#_3A
P45
GPO
KBC_GA20
GPIO12
GPI
KBDSCI_3
P46
GPO
KBSCI_3Q
GPIO13
GPI
ATI_OVERTEMP#
P47
GPI
PM_CLKRUN#
GPIO14
GPI
GPI14
P50
GPI
BAT_LLOW#_KBC
GPIO15
GPI
CHG_EN#_OC
P51
GPO
DJ_LED_EN
GPIO16
GPO
GPO16
P52
GPO
WIRELESS_LED#
GPO
BAT_LOW#_KBC
2
M38857_GPIO
Used_As
Signal_Name
P27
GPO
--
P26
GPO
NUM_LED#
P25
GPO
CAP_LED#
P24
GPO
SET_PCIRSTNS#
P41
GPO
BT_LED#
P40
GPO
KBC_EXTSMI
3
GPIO17
GPO
GPO17
P53
GPIO21
GPO
BACK_OFF#
P54
GPI
BAYDOCK_IN#
GPIO23
GPO
FWH_WP#
P55
GPI
BAT1_IN#_OC
GPIO24
GPO
CB_SD#
P56
GPO
FAN_DA
GPO
ADJ_BL
GP10
GPI
47N207_GPIO
Used_As
Signal_Name
BAY_IN0
GPIO25
BLINK
ICH6_1HZ
P57
GPIO26
GPI
SATA_DET_#0
P60
GPI
BT_#
GP11
GPI
BAY_IN1
GPIO27
GPI
PCB_VID0
P61
GPI
INTERNET_#
GP12
GPI
--
GPIO28
GPI
PCB_VID1
P62
GPI
CPUFAN_SPD_A
GP13
GPI
SW_RST#
GPIO29
GPI
PCB_VID2
P63
GPI
WIRELESS_#
GP14
GPIO
--
GPIO30
GPI
SATA_DET_#2
P64
GPI
ACIN_OC
GP15
GPO
BAY_RST
GPIO31
GPI
AGP_EXT
P65
GPI
MARATHON_#
GP16
GPO
DJKEY_EN
GPIO33
GPO
XIDE_EN#_3
P66
GPO
PANLOCK_#
GP17
GPO
802_EN#
GPIO34
GPO
OP_SD#
P67
GPI
BAT2_IN#_OC
GP34
GPO
OVER_CLK1
GPIO40
GPI
PID0
P76
GPIO
SMD_BAT_KBC
GP35
GPO
OVER_CLK2
GPIO41
GPI
PID1
P77
GPO
SMC_BAT_KBC
GP36
GPO
--
4
4
5
5
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
3
OF
63
DESCRIPTION:
SYSTEM INFORMATION
C
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
D
E
5
4
3
2
1
H_D#[63:0] 7
DEFER#
DRDY#
DBSY#
L4
H2
M2
H_DEFER# 7
H_DRDY# 7
H_DBSY# 7
7
7
7
H_INIT#
LOCK#
J2
H_LOCK# 7
22
+VCCP
R748
54.9Ohm
1%
/*
H_CPURST# 6,7
H_RS#2
H_RS#1
H_RS#0
7
7
7
TRDY#
M3
H_RS#[2:0] 7
H_TRDY# 7
HIT#
HITM#
K3
K4
H_HIT#
H_HITM#
H_DINV#1
H_DSTBN#1
H_DSTBP#1
H_DINV#3 7
H_DSTBN#3 7
H_DSTBP#3 7
C
SOCKET479P
+1.8VS
7
7
R7841
SOCKET479P
R7831
P/N = 12-046004791
VCCA_+1.5VS_+1.8VS
/*
/*
2 0Ohm
+1.8VS_VCCA
R7851
2 0Ohm R7821
+1.8VS_VCCA
2 0Ohm /*
2 0Ohm
R1.1#1
1
C769
C198
2
0.01UF
2
10UF/10V
C770
10UF/10V
C201
0.01UF
C200
10UF/10V
C202
0.01UF
C778
1
+1.8VS_PROC
+1.5VS
10UF/10V
C768
0.01UF
2
B11
L2
K1
H1
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
H_D#53
H_D#52
H_D#51
H_D#50
H_D#49
H_D#48
1
RESET#
RS[2]#
RS[1]#
RS[0]#
AF26
AF22
AF25
AD21
AE21
AF20
AD24
AF23
AE22
AD23
AC25
AC22
AC20
AB24
AC23
AB25
AD20
AE24
AE25
2
DPWR#
INIT#
B5
D[63]#
D[62]#
D[61]#
D[60]#
D[59]#
D[58]#
D[57]#
D[56]#
D[55]#
D[54]#
D[53]#
D[52]#
D[51]#
D[50]#
D[49]#
D[48]#
DINV[3]#
DSTBN[3]#
DSTBP[3]#
1
C19
A4
D[31]#
D[30]#
D[29]#
D[28]#
D[27]#
D[26]#
D[25]#
D[24]#
D[23]#
D[22]#
D[21]#
D[20]#
D[19]#
D[18]#
D[17]#
D[16]#
DINV[1]#
DSTBN[1]#
DSTBP[1]#
2
DPWR#
1 56Ohm
IERR#
K25
N25
H26
M25
N24
L26
J25
M23
J23
G24
F25
H24
M26
L23
G25
H23
J26
K24
L24
1
7
R738 2
H_D#31
H_D#30
H_D#29
H_D#28
H_D#27
H_D#26
H_D#25
H_D#24
H_D#23
H_D#22
H_D#21
H_D#20
H_D#19
H_D#18
H_D#17
H_D#16
+VCCP
D
H_DINV#2 7
H_DSTBN#2 7
H_DSTBP#2 7
2
H_ADSTB#1
C
A[31]#
A[30]#
A[29]#
A[28]#
A[27]#
A[26]#
A[25]#
A[24]#
A[23]#
A[22]#
A[21]#
A[20]#
A[19]#
A[18]#
A[17]#
ADSTB[1]#
7
1
7
AF1
AE1
AF3
AD6
AE2
AD5
AC6
AB4
AD2
AE4
AD3
AC3
AC7
AC4
AF4
AE5
H_BR0#
H_IERR#
2
H_A#31
H_A#30
H_A#29
H_A#28
H_A#27
H_A#26
H_A#25
H_A#24
H_A#23
H_A#22
H_A#21
H_A#20
H_A#19
H_A#18
H_A#17
N4
1
H_A#[31:17]
BR0#
H_DINV#0
H_DSTBN#0
H_DSTBP#0
2
H_DBRESET# 6,22
DATA GROUP 0
A7
H_D#47
H_D#46
H_D#45
H_D#44
H_D#43
H_D#42
H_D#41
H_D#40
H_D#39
H_D#38
H_D#37
H_D#36
H_D#35
H_D#34
H_D#33
H_D#32
DATA GROUP
DBR#
7
7
D[47]#
D[46]#
D[45]#
D[44]#
D[43]#
D[42]#
D[41]#
D[40]#
D[39]#
D[38]#
D[37]#
D[36]#
D[35]#
D[34]#
D[33]#
D[32]#
DINV[2]#
DSTBN[2]#
DSTBP[2]#
Y25
AA26
Y23
V26
U25
V24
U26
AA23
R23
R26
R24
V23
U23
T25
AA24
Y26
T24
W25
W24
3
H_BNR#
H_BPRI#
D[15]#
D[14]#
D[13]#
D[12]#
D[11]#
D[10]#
D[9]#
D[8]#
D[7]#
D[6]#
D[5]#
D[4]#
D[3]#
D[2]#
D[1]#
D[0]#
DINV[0]#
DSTBN[0]#
DSTBP[0]#
DATA GROUP 1
L1
J3
C25
E23
B23
C26
E24
D24
B24
C20
B20
A21
B26
A24
B21
A22
A25
A19
D25
C23
C22
2
H_REQ#[4:0]
BNR#
BPRI#
1
7
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_ADS# 7
H_BPM#4 6
H_BPM#5 6
ADS#
PRDY#
PREQ#
H_D#15
H_D#14
H_D#13
H_D#12
H_D#11
H_D#10
H_D#9
H_D#8
H_D#7
H_D#6
H_D#5
H_D#4
H_D#3
H_D#2
H_D#1
H_D#0
1
7
H_ADSTB#0
A[16]#
A[15]#
A[14]#
A[13]#
A[12]#
A[11]#
A[10]#
A[9]#
A[8]#
A[7]#
A[6]#
A[5]#
A[4]#
A[3]#
ADSTB[0]#
REQ[4]#
REQ[3]#
REQ[2]#
REQ[1]#
REQ[0]#
N2
A10
B10
CONTROL
7
U52A
ADDRESS GROUP 0
D
AA2
Y3
AA3
U1
Y1
Y4
W2
T4
W1
V2
R3
V3
U4
P4
U3
T1
P1
T2
P3
R2
2
H_A#16
H_A#15
H_A#14
H_A#13
H_A#12
H_A#11
H_A#10
H_A#9
H_A#8
H_A#7
H_A#6
H_A#5
H_A#4
H_A#3
DATA GROUP
U52B
H_A#[16:3]
ADDRESS GROUP 1
7
6
THERMDA
6
THERMDC
6 H_THRMTRIP_S#
H_PROCHOT_S#
2
R192
49
PM_PSI#
12,48 CPU_BSEL0
12
T124
CPU_BSEL1
A
A-STEP B-STEP
FSB BSEL1 BSEL0 BSEL0
bom
400
533
0
0
N/A
N/A
T312
T125
1
0Ohm
1
1
1
1
R791
PWRGOOD
GTLREF[3]
GTLREF[2]
GTLREF[1]
GTLREF[0]
VID[5]
VID[4]
VID[3]
VID[2]
VID[1]
VID[0]
VCCA[3]
VCCA[2]
VCCA[1]
VCCA[0]
B18
A18
C17
B17
THERMDA
THERMDC
THERMTRIP#
PROCHOT#
E1
C16
C3
C14
AF7
B2
RSVD5
RSVD4
RSVD3
RSVD2
RSVD1
RSVD0
AC1 1
G1
E26
1
AD26
T126
GTLREF0
T326
COMP1, COMP3 should be routed as Zo=55ohm
traces shorter than 0.5"
1KOhm
H_DPRSTP# 22
R790
TEST1
TEST2
C5
F23
TCK
TDI
TDO
TMS
TRST#
A13
C12
A12
C11
B13
R740 2
R781 2
1 1KOhm
1 1KOhm
/*
/*
R190
R189
R786
R787
H_COMP3
H_COMP2
H_COMP1
H_COMP0
2KOhm
1%
54.9Ohm 1%
27.4Ohm 1%
54.9Ohm 1%
27.4Ohm 1%
2
2
2
2
1
1
1
1
+VCCP
+VCCP
+VCCP
1
AC26
N1
B1
F26
+1.8VS_PROC
VCCSENSE
TDI
TCK
2
+VCCP
150Ohm 1%
TDO
TMS
2
680Ohm
TRST#
1
R750
1
R753
VCCSENSE
AE7
2
R195
1
54.9Ohm
/*
1%
1
54.9Ohm
/*
1%
6
6
6
6
6
Reserve for ITP
=> check
R745
R757
R737
56Ohm
/*
56Ohm
200Ohm
VSSSENSE
VSSSENSE
AF6
2
R194
SOCKET479P
H_BPM#5
H_PROCHOT_S#
H_PWRGD
A
R736 2
5
1 1KOhm
/*
H_PWRGD_ITP 6
Reserve for ITP
ITP: Stuff
No ITP: N/A
1
0
PROJECT: W3V
B
2
+1.8VS_VCCA
120mA
Layout note:
COMP0 and COMP2 need to be Zo=27.4ohm traces.
Best estimate is 18mil wide trace for outer layers and
14mil if on internal layer. See RDDP of Banias.
Traces should be shorter than 0.5". Refer to latest CS layout
+VCCP
1
H4
G4
G3
F3
F2
E2
6
6
6
6
2
E4
VR_VID5
VR_VID4
VR_VID3
VR_VID2
VR_VID1
VR_VID0
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
1
1.05V OUTPUT
VCCA layout: T/S:
100mil/25mil
H_PWRGD
C9
A9
B8
C8
Place near CPU pin
2
H_PWRGD
VR_VID[5:0]
BPM[3]#
BPM[2]#
BPM[1]#
BPM[0]#
H_COMP3
H_COMP2
H_COMP1
H_COMP0
2
22
49
AB1
AB2
P26
P25
2
B
A20M#
FERR#
IGNNE#
DPSLP#
SLP#
LINT0
LINT1
SMI#
STPCLK#
COMP[3]
COMP[2]
COMP[1]
COMP[0]
1
22
H_A20M#
22
H_FERR#
22
H_IGNNE#
22
H_DPSLP#
7,22 H_CPUSLP#
22
H_INTR
22
H_NMI
22
H_SMI#
22
H_STPCLK#
BCLK[0]
BCLK[1]
ITP_CLK[0]
ITP_CLK[1]
MISC
B15
B14
2
A16
2 49.9Ohm 1% A15
49.9Ohm 1%
C2
D3
A3
B7
A6
D1
D4
B4
C6
1
R756 1
R754
LEGACY CPU
12 CLK_CPU_BCLK
12 CLK_CPU_BCLK#
HOSTCLK
U52C
REVISION
2.1
DATE:
SHEET
4
4
OF
63
DESCRIPTION:
DOTHAN CPU(1)
3
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
2
1
5
4
W4
P23
VCCQ[1]
VCCQ[0]
D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16
K6
L5
L21
M6
M22
N5
N21
P6
P22
R5
R21
T6
T22
U21
VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19
VCCP20
VCCP21
VCCP22
VCCP23
VCCP24
VCCP25
1
VCC
U52E
A2
A5
A8
A11
A14
A17
A20
A23
A26
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
SOCKET479P
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
D
GND
VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
VSS133
VSS132
VSS131
VSS130
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
AC24
AC21
AC18
AC16
AC14
AC12
AC10
AC8
AC5
AC2
AB26
AB23
AB21
AB19
AB17
AB15
AB13
AB11
AB9
AB7
AB5
AB3
AA25
AA22
AA20
AA18
AA16
AA14
AA12
AA10
AA8
AA6
AA4
AA1
Y24
Y21
Y5
Y2
W26
W23
W22
W6
W3
V25
V21
V5
V4
V1
U24
U22
U6
U2
T26
T23
T21
T5
T3
R25
R22
R6
R4
R1
P24
P21
Mobile Dothan VID Table
VID[5..0]
000000
000001
000010
000011
000100
000101
000110
000111
001000
001001
001010
001011
001100
001101
001110
001111
010000
010001
010010
010011
010100
010101
010110
010111
011000
011001
011010
011011
011100
011101
011110
011111
Voltage
1.708V
1.692V
1.676V
1.660V
1.644V
1.628V
1.612V
1.596V
1.580V
1.564V
1.548V
1.532V
1.516V
1.500V
1.484V
1.468V
1.452V
1.436V
1.420V
1.404V
1.388V
1.372V
1.356V
1.340V
1.324V
1.308V
1.292V
1.276V
1.260V
1.244V
1.228V
1.212V
VID[5..0]
Voltage
100000
100001
100010
100011
100100
100101
100110
100111
101000
101001
101010
101011
101100
101101
101110
101111
110000
110001
110010
110011
110100
110101
110110
110111
111000
111001
111010
111011
111100
111101
111110
111111
1.196V
1.180V
1.164V
1.148V
1.132V
1.116V
1.100V
1.084V
1.068V
1.052V
1.036V
1.020V
1.004V
0.988V
0.972V
0.956V
0.940V
0.924V
0.908V
0.892V
0.876V
0.860V
0.844V
0.828V
0.812V
0.796V
0.780V
0.764V
0.748V
0.732V
0.716V
0.700V
C
B
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1
M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
AF18 VCC72
AF16 VCC71
AF14 VCC70
AF12 VCC69
AF10 VCC68
AF8 VCC67
AE19 VCC66
AE17 VCC65
AE15 VCC64
AE13 VCC63
AE11 VCC62
AE9 VCC61
B
D6
D8
D18
D20
D22
E5
E7
E9
E17
E19
E21
F6
F8
F18
F20
F22
G5
G21
H6
H22
J5
J21
K22
U5
V6
V22
W5
W21
Y6
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AF24
AF21
AF19
AF17
AF15
AF13
AF11
AF9
AF5
AF2
AE26
AE23
AE20
AE18
AE16
AE14
AE12
AE10
AE8
AE6
AE3
AD25
AD22
AD19
AD17
AD15
AD13
AD11
AD9
AD7
AD4
AD1
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VSS192
VSS191
VSS190
VSS189
VSS188
VSS187
VSS186
VSS185
VSS184
VSS183
VSS182
VSS181
VSS180
VSS179
VSS178
VSS177
VSS176
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
VSS168
VSS167
VSS166
VSS165
VSS164
VSS163
VSS162
VSS161
U52D
C
2
+VCORE
D
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
+VCCP
3
SOCKET479P
A
A
bom
PROJECT: W3V
5
REVISION
DATE:
2.1
SHEET
4
5
OF
63
DESCRIPTION:
DOTHAN CPU (2)
3
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
2
1
B
C
D
VCORE 10uF/10V * 35
220uF/2V
*4
VCCP 0.1uF
* 10 for CPU
150uF
* 1 for CPU
0.1uF
* 10 for Alviso
150uF
* 2 for Alviso
4.7uF
* 1 for Alviso
2.2uF
* 1 for Alviso
0.47uF
* 2 for Alviso on A6 B2 G1 V1
0.22uF
* 2 for Alviso on A6 B2 G1 V1
Decoupling guide from INTEL
H_BPM#1
H_BPM#0
27A for 1.8G
1
4
TCK
+
R822
2.2KOhm
/*
27.4Ohm
1%
1
R821
2.2KOhm
/*
+
220UF/2V
R796
R798
R797
220Ohm
/*
54.9Ohm
1%
/*
39.2Ohm
1%
H_DBRESET# 4,22
2
R799
1
27.4Ohm
1% /*
2
R800
62
TDO
TRST#
TDI
TMS
1
22.6Ohm
1% /*
2
220Ohm
/*
1
R801
ITP
CE13
1
CLK_ITP_BCLK 12
CLK_ITP_BCLK# 12
ITP_CON_60P
/*
ITP: Stuff
No ITP: N/A
2
CE12
4
4
4
4
H_CPURST# 4,7
2
Reserve for ITP
Place resistance close ITP
+3VS
THERMAL SENSOR
Do Not Stuff
/*
2
2
2
2
Do Not Stuff
1
2
CE30
R788
C227
10UF/10V
2
+
Do Not Stuff
1
1
CE14
+2.5VS
1
1
1
C214
10UF/10V
2
C215
10UF/10V
2
+
C755
10UF/10V
2
C233
10UF/10V
2
2
C223
10UF/10V
2
C225
10UF/10V
2
C213
10UF/10V
C219
10UF/10V
2
2
1
C221
10UF/10V
1
2
1
1
1
1
1
2
1
C235
10UF/10V
2
C229
10UF/10V
1
C245
10UF/10V
2
C218
10UF/10V
1
C217
10UF/10V
1
1
1
2
2
CTL_DATA
CTL_CLK
2
54.9Ohm
1% /*
ITP: Stuff
No ITP: N/A
+VCCP
1
8
8
1
R789
2
2
2
C732
10UF/10V
4 H_PWRGD_ITP
2
2
10UF/10V
1
2
1
2
C728
10UF/10V
2
C723
10UF/10V
ITP: Stuff
No ITP: N/A
C722
1
C753
10UF/10V
1
2
C746
10UF/10V
2
C224
10UF/10V
C754
10UF/10V
1
2
10UF/10V
1
1
1
C756
10UF/10V
2
C230
10UF/10V
2
C234
10UF/10V
C237
1
2
10UF/10V
1
2
1
C748
10UF/10V
1
C242
10UF/10V
1
C749
2
C241
10UF/10V
2
2
10UF/10V
2
C228
1
2
10UF/10V
2
10UF/10V
C211
1
C210
1
1
2
10UF/10V
1
1
1
+VCCP
C231
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
2
H_BPM#3
H_BPM#2
4
4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
NP_NC1
NP_NC2
1
4
4
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
2
H_BPM#5
H_BPM#4
1
+VCORE
4
4
2
1
E
CN28
1
A
+3VS
R212
200Ohm
1%
1
19,22,25 PM_THRM#
0.1UF
SMBCLK
7
SMBDATA
6
ALERT#
1
2
0.1UF
OVERT
4
OS#_OC
DXP
2
THERMDA 4
DXN
3
THERMDC 4
GND
12,13,14,19,21,36 SDA_3S
C206
2
0.1UF
2
0.1UF
C244
1
C222
1
1
0.1UF
2
2
0.1UF
C208
2
C209
1
1
C216
0.1UF
2
0.1UF
2
150U/4.0V
C212
2
CE29
1
1
1
12,13,14,19,21,36 SCL_3S
+
8
3
R210
C239
100KOhm
VCC
Do Not Stuff Do Not Stuff U18
/*
/*
NEAR CPU
PIN P23
1
NEAR CPU
PIN W4
2.5A for 1.8G
1
+VCCP
R239
1
R240
R1.1#16
2
1
2
2
3
1
C243
10/10/10 mil
2
2200PF/10V
C207
SM Bus Address fix at:
1001 100x (98, 99), Resolution :
+/- 1 degree
C205
2
0.1UF
2
0.1UF
2
0.1UF
1
C226
1
1
5
MAX6657
47
4
4
+VCCP
1
DOTHAN VID TABLE
H_THRMTRIP#_R
+VCCP
R772
1.4G
1.2G
1.8G
1.308V
1.292V
1.260V
1.228V
LFM
0.6G
C3/C4
0.844V
0.748V
75Ohm
R775
2
1G
1.7G
4 H_THRMTRIP_S#
R769 1
2 0Ohm
8 GMCH_THRMTRIP#
R767 1
2 0Ohm
/*
330Ohm
1
1 B
R1.1#33
R766 1
C767
2
1.196V
H_THRMTRIP# 22
2
0.1UF
C920
100PF
/*
D
S 2
OTP_RESET# 47,53
3
3
C
E
2
G
1
Q132
PMBS3904
5
2 56Ohm
2
1.6G
1
HFM
VOLTAGE
1
CPU
FREQ.
Q134
2N7002
5
8,21,22,23,28,30,31,32 BUF_PLT_RST#
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
6
OF
63
DESCRIPTION:
Caps & THERMAL & ITP
C
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
D
E
5
4
3
2
1
2
H_XRCOMP
24.9
1%
H_D#[0..63]
H_A#[3..31] 4
2
+VCCP
221
1%
1
R690
221Ohm
1%
C614
10UF/10V
/*
C592
0.1UF
1
2
R685
100Ohm
1%
1
100
1%
2
C
1
2
H_XSWING
2
H_YRCOMP
R706
24.9Ohm
1%
1
24.9 1%
+VCCP
54.9 1%
2
B
C1
C2
D1
T1
L1
P1
HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING
1
R698
54.9Ohm
1%
H_YSCOMP
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
HADS#
HADSTB0#
HADSTB1#
HVREF
HBNR#
HBPR#
HBREQ0#
HCPURST#
F8
B9
E13
J11
A5
D5
E7
H10
H_ADS#
H_ADSTB#0
H_ADSTB#1
HCLKINN
HCLKINP
AB1
AB2
HDBSY#
HDEFER#
HDINV0#
HDINV1#
HDINV2#
HDINV3#
HDPWR#
HDRDY#
HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#
HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#
HEDRDY#
HHIT#
HHITM#
HLOCK#
HPCREQ#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HRS0#
HRS1#
HRS2#
HCPUSLP#
HTRDY#
C6
E6
H8
K3
T7
U5
G6
F7
G4
K1
R3
V3
G5
K2
R2
W4
F6
D4
D6
B3
A11
A7
D7
B8
C7
A8
A4
C5
B4
G8
B5
2
+VCCP
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
221 1%
R705
221Ohm
1%
D
+VCCP
H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR#
H_BPRI#
H_BR0#
H_CPURST#
100
1%R
R125
100Ohm
1%
C
H_VREF
H_BNR# 4
H_BPRI# 4
H_BR0# 4
H_CPURST# 4,6
200
1%R
R124
200Ohm
1%
1
H_XSCOMP
G9
C9
E9
B7
A10
F9
D8
B10
E10
G10
D9
E11
F10
G11
G13
C10
C11
D11
C12
B13
A12
F12
G12
E12
C13
B11
D13
A13
F13
C120
0.1UF
2
1
R675
54.9Ohm
1%
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
2
54.9
1%
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
1
2
+VCCP
E4
E1
F4
H7
E2
F1
E3
D3
K7
F2
J7
J8
H6
F3
K8
H5
H1
H2
K5
K6
J4
G3
H3
J1
L5
K4
J5
P7
L7
J3
P5
L3
U7
V6
R6
R5
P3
T8
R7
R8
U8
R4
T4
T5
R1
T3
V8
U6
W6
U3
V5
W8
W7
U2
U1
Y5
Y2
V4
Y7
W1
W3
Y3
Y6
W2
HOST
U48D
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
D
2
4
1
1
R682
24.9Ohm
1%
CLK_MCH_BCLK# 12
CLK_MCH_BCLK 12
H_DBSY# 4
H_DEFER# 4
H_DINV#0 4
H_DINV#1 4
H_DINV#2 4
H_DINV#3 4
DPWR#
4
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DRDY# 4
H_DSTBN#0 4
H_DSTBN#1 4
H_DSTBN#2 4
H_DSTBN#3 4
H_DSTBP#0 4
H_DSTBP#1 4
H_DSTBP#2 4
H_DSTBP#3 4
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
TP_H_EDRDY#
TP_H_PCREQ#
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
R115 1
H_HIT#
4
H_HITM# 4
H_LOCK# 4
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
/*
B
1
T55
1
T264
4
4
4
4
4
H_RS#0 4
H_RS#1 4
H_RS#2 4
H_CPUSLP# 4,22
H_TRDY# 4
2 0Ohm
1
ALVISO_BGA1257
10UF/10V
/*
1
C654
0.1UF
1
2
C655
2
R704
100Ohm
1%
100 1%
1
2
H_YSWING
A
A
bom
PROJECT: W3V
5
REVISION
DATE:
2.1
SHEET
4
7
OF
63
DESCRIPTION:
MCH: CPU
3
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
2
1
4
3
23 DMI_TXN[0..3]
Y31
AA35
AB31
AC35
DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
AA33
AB37
AC33
AD37
DMITXN0
DMITXN1
DMITXN2
DMITXN3
23 DMI_RXP[0..3]
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
Y33
AA37
AB33
AC37
DMITXP0
DMITXP1
DMITXP2
DMITXP3
1 TP_SMCK2
1 TP_SMCK5
DCLK0
DCLK1
13
13
DCLK3
DCLK4
14
14
1 TP_SMCK#2
13
13
1 TP_SMCK#5
T106
T105
AM33
AL1
AE11
AJ34
AF6
AC10
SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5
AN33
AK1
AE10
AJ33
AF5
AD10
SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
DCLK3#
DCLK4#
14,15
14,15
13,15
13,15
SCKE0
SCKE1
SCKE2
SCKE3
AP21
AM21
AH21
AK21
14,15
14,15
13,15
13,15
SCS0#
SCS1#
SCS2#
SCS3#
AN16
AM14
AH15
AG16
M_OCDCOMP0
M_OCDCOMP1
AF22
AF16
SM_OCDCOMP0
SM_OCDCOMP1
R172
40.2Ohm
1%
ODT0
ODT1
ODT2
ODT3
AP14
AL15
AM11
AN10
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
AK10
AK11
AF37
AD1
AE27
AE28
AF9
AF10
SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT
14,15
14,15
13,15
13,15
M_RCOMPN
M_RCOMPP
1
1
R166
40.2Ohm
1%
VTT_REF
SMXSLEW
+1.8V
2
80.6Ohm
1%
2
SMYSLEW
1
R734
B
1 1KOhm
T63
T75
1
1
1
T80
1
1
1
1
1
1
T69
T42
T61
T71
T62
T70
1
T83
T57
T77
T68
T87
T268
T267
T76
T263
1
1
1
1
1
1
1
1
+2.5VS
21 TVDAC_A_GM
MCH_SEL1 12 21 TVDAC_B_GM
MCH_SEL0 12 21 TVDAC_C_GM
CFG5
CFG6
CFG7
11
11
11
CFG9
11
21
21
21
DDC2BC_GM
DDC2BD_GM
DAC_B_GM
CFG16
11
21
DAC_G_GM
CFG18
CFG19
11
11
21
DAC_R_GM
T262
H24
H25
AB29
AC29
SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP
J23
PM_EXTTS#0
J21
PM_EXTTS#1
H22
F5
AD30
AE29 2
1
R164
100Ohm
1%
A24
A23
C37
D37
BM_BUSY#
EXT_TS0#
EXT_TS1#
THRMTRIP#
PWROK
RSTIN#
TP_NC1
TP_NC2
TP_NC3
TP_NC4
TP_NC5
TP_NC6
TP_NC7
TP_NC8
TP_NC9
TP_NC10
TP_NC11
AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
R1.1_No5
1
1
1
1
1
1
1
1
1
1
1
EXP_COMPI
EXP_ICOMPO
D36
D34
1
R680
EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8
EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15
E30
F34
G30
H34
J30
K34
L30
M34
N30
P34
R30
T34
U30
V34
W30
Y34
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15
D30
E34
F30
G34
H30
J34
K30
L34
M30
N34
P30
R34
T30
U34
V30
W34
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
1
E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27
LBKLT_CRTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL
EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3
EXP_TXN4
EXP_TXN5
EXP_TXN6
EXP_TXN7
EXP_TXN8
EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15
E32
F36
G32
H36
J32
K36
L32
M36
N32
P36
R32
T36
U32
V36
W32
Y36
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
B30
B29
C25
C24
LACLKN
LACLKP
LBCLKN
LBCLKP
B34
B33
B32
LADATAN0
LADATAN1
LADATAN2
L_IBG
L_LVBG
L_LVREFH
L_LVREFL
1
1
1
1
EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3
EXP_TXP4
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_TXP8
EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15
D32
E36
F32
G36
H32
J36
K32
L36
M32
N36
P32
R36
T32
U36
V32
W36
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
R79
R78
0Ohm
0Ohm
0Ohm
LADATAP0
LADATAP1
LADATAP2
C29
D28
C27
LBDATAN0
LBDATAN1
LBDATAN2
C28
D27
C26
LBDATAP0
LBDATAP1
LBDATAP2
DAC_B_GM
R92
1
TVDAC_B_GM#
DAC_G_GM
R88
1
TVDAC_C_GM
R649 1
2 0Ohm
TVDAC_C_GM#
DAC_R_GM
R93
1
2
TVDAC_A_GM#
2 0Ohm
2
2 0Ohm
R650 1
R120 1
2 0Ohm
REFSET_GM
Ext VGA: 0 ohm
Int VGA: N/A
2 0Ohm
/*
2 0Ohm
/*
2 0Ohm
/*
R101 1
16 DAC_VSYNC_GM
+1.5VS
DAC_B_GM#
16 DAC_HSYNC_GM
1
2 39Ohm
/*
VSYNC_GM
R77
1
2 39Ohm
/*
HSYNC_GM
Disable TV_OUT:
TVDAC A/B/C, TVIRTN A/B/C, TV_REFSET, VCCA_TV,DAC
A/B/C... (ALL TV POWER) connect to GND.
Ext VGA: N/A
Int VGA: 39 ohm
D
PEG_RXP[0..15] 16
C
Ext VGA: stuff
Int VGA: N/A
PEG_TXN0 1
PEG_TXP0 C96
PEG_TXN1 1
PEG_TXP1 C610
PEG_TXN2 1
PEG_TXP2 C104
PEG_TXN3 1
PEG_TXP3 C615
PEG_TXN4 1
PEG_TXP4 C110
PEG_TXN5 1
PEG_TXP5 C619
PEG_TXN6 1
PEG_TXP6 C123
DAC_R_GM#
2 0Ohm
1
R90
1
R91
Ext VGA: 0 ohm
Int VGA: N/A
R647
R648
R670
R671
DAC_G_GM#
Ext VGA: 0 ohm
Int VGA: 255 ohm_1%
R76
PEG_RXN[0..15] 16
PEG_TXN7 1
PEG_TXP7 C633
1
R99
1
1
1
1
2
2
2
2
PEG_TXN9 1
PEG_TXP9 C652
DREFCLK#
0Ohm
DREFCLK
0Ohm
0Ohm DREFSSCLK#
0Ohm DREFSSCLK
Ext VGA: N/A
Int VGA: 0 ohm
2
0Ohm
2
0Ohm
PEG_TXN12 1
PEG_TXP12C151
1
R81
PEG_TXN13 1
PEG_TXP13C665
L_IBG
2
1.5KOhm
1%
PEG_TXN14 1
PEG_TXP14C157
PEG_TXN15 1
PEG_TXP15C668
+2.5VS
1
3
5
7
Ext VGA: 0 ohm
Int VGA: N/A
PEG_TXN10 1
PEG_TXP10C147
PEG_TXN11 1
PEG_TXP11C656
2
0Ohm /*
2 0Ohm
A
2
24.9Ohm 1%
PEG_TXN8 1
PEG_TXP8 C137
Ext VGA: N/A
Int VGA: 150 ohm_1%
R651 1
2
A34
A33
B31
1
1
1
R80
TVDAC_B_GM
TV_REFSET_GM R130 1
DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET
Disable CRT:
R/G/B, R#/G#/B#, REFSET, VCCA_CRTDAC connect to GMCH Core.
HSYNC/VSYNC/VCC_SYNC connect to GND.
TVDAC_A_GM
+VCC_GMCH_CORE
E24
E23
E21
D21
C20
B20
A19
B19
H21
G21
J20
ALVISO_BGA1257
+VCC_GMCH_CORE
Ext VGA: 0 ohm
Int VGA: 4.99K ohm_1%
DAC_B_GM
DAC_B_GM#
DAC_G_GM
DAC_G_GM#
DAC_R_GM
DAC_R_GM#
VSYNC_GM
HSYNC_GM
REFSET_GM
20 LVDS_YB0P_GM
20 LVDS_YB1P_GM
20 LVDS_YB2P_GM
ALVISO_BGA1257
Ext VGA: 0 ohm
Int VGA: N/A
TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC
GMCH_THRMTRIP# 6
VRM_PWRGD 12,45,48,49,54 20 LVDS_CLKAM_GM
BUF_PLT_RST# 6,21,22,23,28,30,31,32
20 LVDS_CLKAP_GM
20 LVDS_CLKBM_GM
DREFCLK# 12
20 LVDS_CLKBP_GM
DREFCLK 12
DREFSSCLK# 12
20 LVDS_YA0M_GM
DREFSSCLK 12
20 LVDS_YA1M_GM
20 LVDS_YA2M_GM
T302
T298
T304
20 LVDS_YA0P_GM
T305
20 LVDS_YA1P_GM
T303
20 LVDS_YA2P_GM
T300
T270
T266
20 LVDS_YB0M_GM
T269
20 LVDS_YB1M_GM
T265
20 LVDS_YB2M_GM
T261
R735
80.6Ohm
1%
Ext VGA: 0 ohm
Int VGA: 150 ohm_1%
A15
C16
A17
J18
B15
B16
B17
EDID_CLK_GM
EDID_DAT_GM
T47
T58
T78
T65
PM_BMBUSY# 22
TVDAC_A_GM
TVDAC_B_GM
TVDAC_C_GM
TV_REFSET_GM
TVDAC_A_GM#
TVDAC_B_GM#
TVDAC_C_GM#
1
20 LCD_BACKEN_GM
6
CTL_CLK
6
CTL_DATA
20 EDID_CLK_GM
20 EDID_DAT_GM
20 LCD_VDD_EN_GM
DREF_CLKN
DREF_CLKP
DREF_SSCLKN
DREF_SSCLKP
2
2
Layout Note:
Route as short as
possible.
DCLK0#
DCLK1#
NC
C
14
14
DDR MUXING
PM
23 DMI_RXN[0..3]
T99
SDVO_SMDATA
1 SDVO_SMCLK
12 CLK_MCH_3GPLL#
12 CLK_MCH_3GPLL
T85
LVDS
VGA
PCI-EXPRESS GRAPHICS
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
G16 R119 2
H13
G14
CFG3
F16
CFG4
F15
CFG5
G15
CFG6
E16
CFG7
D17
CFG8
J16
CFG9
D15
CFG10
E15
CFG11
D14
CFG12
E14
CFG13
H12
CFG14
C14
CFG15
H15
CFG16
J15
CFG17
H14
CFG18
G22
CFG19
G23
CFG20
D23
G25
G24
J17
A31
A30
D26
D25
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
DMI
DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3
CLK
23 DMI_TXP[0..3]
AA31
AB35
AC31
AD35
D
T109
U48F
2
2.2KOhm
/*
U48A
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
1
+1.5VS_PCIE
R1.1#4
1
R941
SDVOCRTL_DATA Int PD
0: No SDVO device
1: SDVO device present
2
MISC
+2.5VS
SDVO SMbus Int PD
TV
5
10KOhm
10KOhm
10KOhm
10KOhm
2
4
6
8
RN4A
RN4B
RN4C
RN4D
PEG_G_RXN[0..15] 16
2
0.1UF 1
C89
2
0.1UF 1
C596
2
0.1UF 1
C102
2
0.1UF 1
C613
2
0.1UF 1
C106
2
0.1UF 1
C616
2
0.1UF 1
C118
2
0.1UF 1
C620
2
0.1UF 1
C127
2
0.1UF 1
C637
2
0.1UF 1
C141
2
0.1UF 1
C653
2
0.1UF 1
C149
2
0.1UF 1
C657
2
0.1UF 1
C153
2
0.1UF 1
C666
PEG_G_RXP[0..15] 16
PEG_G_RXN0
2 PEG_G_RXP0
0.1UF
PEG_G_RXN1
2 PEG_G_RXP1
0.1UF
PEG_G_RXN2
2 PEG_G_RXP2
0.1UF
PEG_G_RXN3
2 PEG_G_RXP3
0.1UF
PEG_G_RXN4
2 PEG_G_RXP4
0.1UF
PEG_G_RXN5
2 PEG_G_RXP5
0.1UF
PEG_G_RXN6
2 PEG_G_RXP6
0.1UF
PEG_G_RXN7
2 PEG_G_RXP7
0.1UF
PEG_G_RXN8
2 PEG_G_RXP8
0.1UF
PEG_G_RXN9
2 PEG_G_RXP9
0.1UF
PEG_G_RXN10
2 PEG_G_RXP10
0.1UF
PEG_G_RXN11
2 PEG_G_RXP11
0.1UF
PEG_G_RXN12
2 PEG_G_RXP12
0.1UF
PEG_G_RXN13
2 PEG_G_RXP13
0.1UF
PEG_G_RXN14
2 PEG_G_RXP14
0.1UF
PEG_G_RXN15
2 PEG_G_RXP15
0.1UF
B
A
PM_EXTTS#0
PM_EXTTS#1
EDID_DAT_GM
EDID_CLK_GM
bom
PROJECT: W3V
5
REVISION
DATE:
2.1
SHEET
4
8
OF
63
DESCRIPTION:
MCH: DDR2/DMI/PEG
3
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
2
1
5
4
3
2
1
D
D
13 M_B_DQ[0..63]
14 M_A_DQ[0..63]
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
AJ37
AP35
AL29
AP24
AP9
AP4
AJ2
AD3
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
AK36
AP33
AN29
AP23
AM8
AM4
AJ1
AE5
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
AK35
AP34
AN30
AN23
AN8
AM5
AH1
AE4
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
AL17
AP17
AP18
AM17
AN18
AM18
AL19
AP20
AM19
AL20
AM16
AN20
AM20
AM15
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#
AN15
AP16
AF29
AF28
AP15
TP_MA_RCVENIN#
TP_MA_RCVENOUT#
M_A_DQS[0..7] 14
M_A_DQS#[0..7] 14
M_A_A[0..13] 14,15
R1691
M_A_WE# 14,15
M_A_CAS# 14,15
M_A_RAS# 14,15
2 0Ohm
/*
C189
10UF/10V
/*
ALVISO_BGA1257
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63
SB_BS0#
SB_BS1#
SB_BS2#
AJ15
AG17
AG21
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
AF32
AK34
AK27
AK24
AJ10
AK5
AE7
AB7
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
AF34
AK32
AJ28
AK23
AM10
AH6
AF8
AB4
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#
AF35
AK33
AK28
AJ23
AL10
AH7
AF7
AB5
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
AH17
AK17
AH18
AJ18
AK18
AJ19
AK19
AH19
AJ20
AH20
AJ16
AG18
AG20
AG15
SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#
M_B_BS#0 13,15
M_B_BS#1 13,15
M_B_BS#2 13,15
M_B_DM[0..7] 13
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_DQS[0..7] 13
C
M_B_DQS#[0..7] 13
M_B_A[0..13] 13,15
AH14
M_B_CAS# 13,15
AK14
M_B_RAS# 13,15
AF15 TP_MB_RCVENIN#
AF14 TP_MB_RCVENOUT# R1651
2 0Ohm
/*
AH16
M_B_WE# 13,15
1
M_B_DQ0 AE31
M_B_DQ1 AE32
M_B_DQ2 AG32
M_B_DQ3 AG36
M_B_DQ4 AE34
M_B_DQ5 AE33
M_B_DQ6 AF31
M_B_DQ7 AF30
M_B_DQ8 AH33
M_B_DQ9 AH32
M_B_DQ10 AK31
M_B_DQ11 AG30
M_B_DQ12 AG34
M_B_DQ13 AG33
M_B_DQ14 AH31
M_B_DQ15 AJ31
M_B_DQ16 AK30
M_B_DQ17 AJ30
M_B_DQ18 AH29
M_B_DQ19 AH28
M_B_DQ20 AK29
M_B_DQ21 AH30
M_B_DQ22 AH27
M_B_DQ23 AG28
M_B_DQ24 AF24
M_B_DQ25 AG23
M_B_DQ26 AJ22
M_B_DQ27 AK22
M_B_DQ28 AH24
M_B_DQ29 AH23
M_B_DQ30 AG22
M_B_DQ31 AJ21
M_B_DQ32 AG10
M_B_DQ33 AG9
M_B_DQ34 AG8
M_B_DQ35 AH8
M_B_DQ36 AH11
M_B_DQ37 AH10
M_B_DQ38 AJ9
M_B_DQ39 AK9
M_B_DQ40 AJ7
M_B_DQ41 AK6
M_B_DQ42 AJ4
M_B_DQ43 AH5
M_B_DQ44 AK8
M_B_DQ45 AJ8
M_B_DQ46 AJ5
M_B_DQ47 AK4
M_B_DQ48 AG5
M_B_DQ49 AG4
M_B_DQ50 AD8
M_B_DQ51 AD9
M_B_DQ52 AH4
M_B_DQ53 AG6
M_B_DQ54 AE8
M_B_DQ55 AD7
M_B_DQ56 AC5
M_B_DQ57 AB8
M_B_DQ58 AB6
M_B_DQ59 AA8
M_B_DQ60 AC8
M_B_DQ61 AC7
M_B_DQ62 AA4
M_B_DQ63 AA5
M_A_BS#0 14,15
M_A_BS#1 14,15
M_A_BS#2 14,15
M_A_DM[0..7] 14
2
AK15
AK16
AL21
1
B
U48C
SA_BS0#
SA_BS1#
SA_BS2#
2
C
SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63
DDR SYSTEM MEMORY A
M_A_DQ0 AG35
M_A_DQ1 AH35
M_A_DQ2 AL35
M_A_DQ3 AL37
M_A_DQ4 AH36
M_A_DQ5 AJ35
M_A_DQ6 AK37
M_A_DQ7 AL34
M_A_DQ8 AM36
M_A_DQ9 AN35
M_A_DQ10 AP32
M_A_DQ11 AM31
M_A_DQ12 AM34
M_A_DQ13 AM35
M_A_DQ14 AL32
M_A_DQ15 AM32
M_A_DQ16 AN31
M_A_DQ17 AP31
M_A_DQ18 AN28
M_A_DQ19 AP28
M_A_DQ20 AL30
M_A_DQ21 AM30
M_A_DQ22 AM28
M_A_DQ23 AL28
M_A_DQ24 AP27
M_A_DQ25 AM27
M_A_DQ26 AM23
M_A_DQ27 AM22
M_A_DQ28 AL23
M_A_DQ29 AM24
M_A_DQ30 AN22
M_A_DQ31 AP22
M_A_DQ32 AM9
M_A_DQ33 AL9
M_A_DQ34 AL6
M_A_DQ35 AP7
M_A_DQ36 AP11
M_A_DQ37 AP10
M_A_DQ38 AL7
M_A_DQ39 AM7
M_A_DQ40 AN5
M_A_DQ41 AN6
M_A_DQ42 AN3
M_A_DQ43 AP3
M_A_DQ44 AP6
M_A_DQ45 AM6
M_A_DQ46 AL4
M_A_DQ47 AM3
M_A_DQ48 AK2
M_A_DQ49 AK3
M_A_DQ50 AG2
M_A_DQ51 AG1
M_A_DQ52 AL3
M_A_DQ53 AM2
M_A_DQ54 AH3
M_A_DQ55 AG3
M_A_DQ56 AF3
M_A_DQ57 AE3
M_A_DQ58 AD6
M_A_DQ59 AC4
M_A_DQ60 AF2
M_A_DQ61 AF1
M_A_DQ62 AD4
M_A_DQ63 AD5
DDR SYSTEM MEMORY B
U48B
B
C174
10UF/10V
/*
ALVISO_BGA1257
A
A
bom
PROJECT: W3V
5
REVISION
DATE:
2.1
SHEET
4
9
OF
63
DESCRIPTION:
MCH: DDR2
3
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
2
1
5
PROJECT: W3V
C708
+
0.1UF
+1.5VS
0.1UF
CE9
REVISION
DATE:
2.1
SHEET
4
10
OF
Place near pin
A25, B25, B26
63
10UF/10V
0.1UF
DESCRIPTION:
3
MCH: POWER
R150
0Ohm
C558
R104
0Ohm
VCCDQ_TVDAC
0.01UF
Place near pin A35
R137
150U/4.0V
0Ohm
2
V1.8_DDR_CAP5
V1.8_DDR_CAP2
V1.8_DDR_CAP1
+1.5VS
0.1UF
VCCA_TVBG
C156
0.1UF
/*
VCCD_TVDAC
C134
0.1UF
/*
L34
1
L37
1
R98
1
0.1UF
CE8
VCCA_TVDACA
VCCA_TVDACB
VCCA_TVDACC
VCCA_TVBG
E18
F18
C18
D18
E17
F17
VCCA_TVDACC1
VCCA_TVDACC0
VCCA_TVDACB1
VCCA_TVDACB0
VCCA_TVDACA1
VCCA_TVDACA0
G18 VSSA_TVBG
H18 VCCA_TVBG
H17 VCCDQ_TVDAC
D19 VCCD_TVDAC
10UF/10V
+3VS
2
120Ohm/100MHz
/*
2
0Ohm /*
2
120Ohm/100MHz
/*
1
1
1
1
C154
0.1UF
2
1
C140
2
2
2
2
2
10UF/10V
<OrgName>
1
C113
0.1UF
C155
R64
0.01UF
/*
0Ohm
C91
R94
0.1UF
/*
0Ohm
C133
R138
0.01UF
/*
0Ohm
C68
0.1UF
/*
C87
0.1UF
/*
C142
0.1UF
/*
1
Note: All VCCSM pins
shorted internally.
VCCDQ_TVDAC
VCCD_TVDAC
POWER
C119
2
C678
1
A25 VCCD_LVDS2
B25 VCCD_LVDS1
B26 VCCD_LVDS0
10UF/10V
1
0.1UF
C146
1
C74
A35 VCCA_LVDS
2
2
0.1UF
2
+2.5VS
1
1
Ext VGA: N/A
Int VGA: stuff
1
R1.1#34
A21 VCCHV2
B21 VCCHV1
B22 VCCHV0
K17
K18
T18
V18
W18
K19
U19
V19
K20
T20
U20
W20
K21
K22
K23
K24
J25
K25
H26
K26
H27
J27
K27
L27
M27
N27
P27
R27
T27
U27
V27
G28
H28
J28
K28
L28
M28
N28
P28
R28
T28
U28
V28
J29
K29
M29
N29
R29
T29
R1.1#34
2
10UF/10V
1
C83
C672
0.1UF
+2.5VS
VCCA_TVDACA
VCCA_TVDACB
VCCA_TVDACC
RELEASE DATE :
1
23
23
1
+1.5VS_DPLLA
2
120Ohm/100Mhz
+VCC_GMCH_CORE
+3VS
Ext VGA: stuff R, no-stuff L,C
Int VGA: stuff L,C, no-stuff R
1
L23
1
L26
C148
1
L36
0.01UF
/*
bom
DESIGN ENGINEER :
M.Y.
1
2
1
2
2
1
2
1
1
+1.5VS_HPLL
1
2
2
2
CE3
1
C71
150U/4.0V
/*
2
+1.5VS_3GPLL
1
+2.5VS
2
+1.5VS
2
C702
1
0.1UF
C85
1
L16
1
+
CE5
2
1
C694
150U/4.0V
/*
2
120Ohm/100Mhz
2
+1.8V
2
0.1UF
VCC48
VCC47
VCC46
VCC45
VCC44
VCC43
VCC42
VCC41
VCC40
VCC39
VCC38
VCC37
VCC36
VCC35
VCC34
VCC33
VCC32
VCC31
VCC30
VCC29
VCC28
VCC27
VCC26
VCC25
VCC24
VCC23
VCC22
VCC21
VCC20
VCC19
VCC18
VCC17
VCC16
VCC15
VCC14
VCC13
VCC12
VCC11
VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1
VCC0
VCCP_GMCH_CAP1
1
VCC_SYNC
1
L25
+
1
C776
2
AA2
AA1
C35
B23
AC1
AC2
VCCA_CRTDAC
+
R1.1#34
1
C557
VCCA_MPLL
VCCA_HPLL
VCCA_DPLLB
VCCA_DPLLA
VCCH_MPLL0
VCCH_MPLL1
10UF/10V
2
120Ohm/100Mhz
2
B
1
Ext VGA: N/A
Int VGA: stuff
0.1UF
1
10UF/10V
2
C639
1
L99
1
2
C285
C707
1
0.1UF
150U/4.0V
C675
2
C555
G19
E19
F19
2
120Ohm/100Mhz
CE25
1
+1.5VS
VSSA_CRTDAC
VCCA_CRTDAC1
VCCA_CRTDAC0
0.1UF
+
1
10UF/10V
/*
1
Ext VGA: N/A
Int VGA: stuff
H20
+1.5VS_MPLL
1
2
2
C143
VCC_SYNC
1
1
C101
1
C556
1
V1.8_DDR_CAP6
V1.8_DDR_CAP4
V1.8_DDR_CAP3
1
0.1UF
0.1UF
2
Note: All VCCSM pins
shorted internally.
2
2
0.1UF
C699
1
C
1
+1.5VS_PCIE
1
0Ohm /*
1
0Ohm
1
+1.5VS
C688
1
+2.5VS
2
2
1
Ext VGA: N/A
Int VGA: stuff
2
+1.5VS_DDRDLL
C107
2
R126
2
R140
2
10UF/10V
2
1
150U/4.0V
1
0.1UF
1
C82
CE27
2
1
+2.5VS
2
2
Ext VGA: GND
Int VGA: +2.5VS
1
L100
2
10UF/10V
AE1 VCCSM64
AM1 VCCSM63
AP8 VCCSM62
AB9 VCCSM61
AB10 VCCSM60
AB11 VCCSM59
AC11VCCSM58
AD11VCCSM57
AE12 VCCSM56
AF12 VCCSM55
AG12VCCSM54
AH12VCCSM53
AJ12 VCCSM52
AK12 VCCSM51
AL12 VCCSM50
AM12VCCSM49
AN12VCCSM48
AP12 VCCSM47
AE13 VCCSM46
AF13 VCCSM45
AG13VCCSM44
AH13VCCSM43
AJ13 VCCSM42
AK13 VCCSM41
AL13 VCCSM40
AM13VCCSM39
AN13VCCSM38
AP13 VCCSM37
AE14 VCCSM36
AE15 VCCSM35
AE16 VCCSM34
AE17 VCCSM33
AE18 VCCSM32
AE19 VCCSM31
AE20 VCCSM30
AE21 VCCSM29
AE22 VCCSM28
AE23 VCCSM27
AE24 VCCSM26
AE25 VCCSM25
AF25 VCCSM24
AG25VCCSM23
AH25VCCSM22
AJ25 VCCSM21
AK25 VCCSM20
AL25 VCCSM19
AM25VCCSM18
AN25VCCSM17
AP25 VCCSM16
AE26 VCCSM15
AF26 VCCSM14
AG26VCCSM13
AH26VCCSM12
AJ26 VCCSM11
AK26 VCCSM10
AL26 VCCSM9
AM26VCCSM8
AN26VCCSM7
AP26 VCCSM6
AC27VCCSM5
AD27VCCSM4
AD28VCCSM3
AP29 VCCSM2
AH37VCCSM1
AM37VCCSM0
VCCP_GMCH_CAP3
1
VCCP_GMCH_CAP2
3
2
2
120Ohm/100Mhz
A27 VCCTX_LVDS2
A28 VCCTX_LVDS1
B28 VCCTX_LVDS0
2
+
1
0.1UF
AF18 VCCA_SM3
AF19 VCCA_SM2
AP19 VCCA_SM1
AF20 VCCA_SM0
2
1
4
2
1
L102
C684
0.1UF
2
150U/4.0V
/*
C158
2
A
CE26
0.1UF
2
1
0.1UF
C650
1
+
150U/4.0V
/*
2
1
2
120Ohm/100Mhz
C163
CE24
2
2
0.1UF
+
1
0.01UF
1
1.05V
C100
2
2
5
2
2
1
2
120Ohm/100Mhz
1
+VCCP
J37 VCC3G6
L37 VCC3G5
N37 VCC3G4
R37 VCC3G3
U37 VCC3G2
W37 VCC3G1
AE37 VCC3G0
2
0.1UF
/*
Y27 VCCA_3GPLL2
Y28 VCCA_3GPLL1
Y29 VCCA_3GPLL0
G1
M1
N1
V1
B2
M2
N2
M3
N3
M4
N4
M5
N5
A6
M6
N6
M7
N7
M8
N8
J9
L9
M9
N9
P9
R9
U9
W9
Y9
J10
K10
M10
N10
P10
R10
T10
U10
V10
W10
K11
L11
M11
N11
P11
R11
T11
U11
V11
W11
K12
J13
K13
C138
1
C669
G37 VSSA_3GBG
F37 VCCA_3GBG
VTT51
VTT50
VTT49
VTT48
VTT47
VTT46
VTT45
VTT44
VTT43
VTT42
VTT41
VTT40
VTT39
VTT38
VTT37
VTT36
VTT35
VTT34
VTT33
VTT32
VTT31
VTT30
VTT29
VTT28
VTT27
VTT26
VTT25
VTT24
VTT23
VTT22
VTT21
VTT20
VTT19
VTT18
VTT17
VTT16
VTT15
VTT14
VTT13
VTT12
VTT11
VTT10
VTT9
VTT8
VTT7
VTT6
VTT5
VTT4
VTT3
VTT2
VTT1
VTT0
2
0Ohm
/*
1
2
1
1
L29
2
1
L101
0.1UF
2
1
0.1UF
C618
1
0.1UF
2
0Ohm
1
1
L35
2
Ext VGA: N/A
Int VGA:
stuff
1
L32
2
2
C581
1
+2.5VS
1
2
1
C559
1
2
+VCC_GMCH_CORE
2
2
2
1
D
2
2
Ext VGA: stuff
Int VGA: N/A
+1.5VS
1
+1.5VS
D52
BAT54C
/*
D49
BAT54C
/*
R631
1KOhm
/*
R632
1KOhm
/*
D
+1.5VS_DPLLB
1.05V
+VCC_GMCH_CORE
C144
0.1UF
CAP4
U48G
ALVISO_BGA1257
1.8V:
1A for DDR2 400 1 channel
2A for DDR2 400 2 channel
1.3A for DDR2 533 1 channel
2.7A for DDR2 533 2 channel
1.05VS:850mA for CPU
3100mA for external gfx
1.5VS: 1264mA
2.5VS: 293mA
3VS:
120mA
2
120Ohm/100MHz
/*
C
C704
0.1UF
C681
0.01UF
B
+2.5VS
150U/4.0V
2
120Ohm/100MHz
/*
+3VS
C67
0.01UF
/*
C687
+1.5VS
2
120Ohm/100MHz
/*
C94
+1.5VS
0.01UF
/*
A
1
A
1
1
2
8
R67
2.2KOhm
/*
CFG7: CPU STRAP
LOW = Mobile Prescott
R68
2.2KOhm
/*
8
PROJECT: W3V
5
REVISION
DATE:
2.1
SHEET
4
2
CFG5
HIGH = Dothan CPU (Default)
1
CFG5: LOW = DMI X 2
HIGH = DMI X 4 (Default)
CFG9
11
OF
VTT_NCTF17
VTT_NCTF16
VTT_NCTF15
VTT_NCTF14
VTT_NCTF13
VTT_NCTF12
VTT_NCTF11
VTT_NCTF10
VTT_NCTF9
VTT_NCTF8
VTT_NCTF7
VTT_NCTF6
VTT_NCTF5
VTT_NCTF4
VTT_NCTF3
VTT_NCTF2
VTT_NCTF1
VTT_NCTF0
Y12 VSS_NCTF68
AA12 VSS_NCTF67
Y13 VSS_NCTF66
AA13 VSS_NCTF65
L14 VSS_NCTF64
M14 VSS_NCTF63
N14 VSS_NCTF62
P14 VSS_NCTF61
R14 VSS_NCTF60
T14 VSS_NCTF59
U14 VSS_NCTF58
V14 VSS_NCTF57
W14 VSS_NCTF56
Y14 VSS_NCTF55
AA14 VSS_NCTF54
AB14 VSS_NCTF53
L15 VSS_NCTF52
M15 VSS_NCTF51
N15 VSS_NCTF50
P15 VSS_NCTF49
R15 VSS_NCTF48
T15 VSS_NCTF47
U15 VSS_NCTF46
V15 VSS_NCTF45
W15 VSS_NCTF44
Y15 VSS_NCTF43
AA15 VSS_NCTF42
AB15 VSS_NCTF41
L16 VSS_NCTF40
M16 VSS_NCTF39
N16 VSS_NCTF38
P16 VSS_NCTF37
R16 VSS_NCTF36
T16 VSS_NCTF35
U16 VSS_NCTF34
V16 VSS_NCTF33
W16 VSS_NCTF32
Y16 VSS_NCTF31
AA16 VSS_NCTF30
AB16 VSS_NCTF29
R17 VSS_NCTF28
Y17 VSS_NCTF27
AA17 VSS_NCTF26
AB17 VSS_NCTF25
AA18 VSS_NCTF24
AB18 VSS_NCTF23
AA19 VSS_NCTF22
AB19 VSS_NCTF21
AA20 VSS_NCTF20
AB20 VSS_NCTF19
R21 VSS_NCTF18
Y21 VSS_NCTF17
AA21 VSS_NCTF16
AB21 VSS_NCTF15
Y22 VSS_NCTF14
AA22 VSS_NCTF13
AB22 VSS_NCTF12
Y23 VSS_NCTF11
AA23 VSS_NCTF10
AB23 VSS_NCTF9
Y24 VSS_NCTF8
AA24 VSS_NCTF7
AB24 VSS_NCTF6
Y25 VSS_NCTF5
AA25 VSS_NCTF4
AB25 VSS_NCTF3
Y26 VSS_NCTF2
AA26 VSS_NCTF1
AB26 VSS_NCTF0
L12
M12
N12
P12
R12
T12
U12
V12
W12
L13
M13
N13
P13
R13
T13
U13
V13
W13
+VCC_GMCH_CORE
R56
1KOhm
/*
2
CFG7
VCC_NCTF78
VCC_NCTF77
VCC_NCTF76
VCC_NCTF75
VCC_NCTF74
VCC_NCTF73
VCC_NCTF72
VCC_NCTF71
VCC_NCTF70
VCC_NCTF69
VCC_NCTF68
VCC_NCTF67
VCC_NCTF66
VCC_NCTF65
VCC_NCTF64
VCC_NCTF63
VCC_NCTF62
VCC_NCTF61
VCC_NCTF60
VCC_NCTF59
VCC_NCTF58
VCC_NCTF57
VCC_NCTF56
VCC_NCTF55
VCC_NCTF54
VCC_NCTF53
VCC_NCTF52
VCC_NCTF51
VCC_NCTF50
VCC_NCTF49
VCC_NCTF48
VCC_NCTF47
VCC_NCTF46
VCC_NCTF45
VCC_NCTF44
VCC_NCTF43
VCC_NCTF42
VCC_NCTF41
VCC_NCTF40
VCC_NCTF39
VCC_NCTF38
VCC_NCTF37
VCC_NCTF36
VCC_NCTF35
VCC_NCTF34
VCC_NCTF33
VCC_NCTF32
VCC_NCTF31
VCC_NCTF30
VCC_NCTF29
VCC_NCTF28
VCC_NCTF27
VCC_NCTF26
VCC_NCTF25
VCC_NCTF24
VCC_NCTF23
VCC_NCTF22
VCC_NCTF21
VCC_NCTF20
VCC_NCTF19
VCC_NCTF18
VCC_NCTF17
VCC_NCTF16
VCC_NCTF15
VCC_NCTF14
VCC_NCTF13
VCC_NCTF12
VCC_NCTF11
VCC_NCTF10
VCC_NCTF9
VCC_NCTF8
VCC_NCTF7
VCC_NCTF6
VCC_NCTF5
VCC_NCTF4
VCC_NCTF3
VCC_NCTF2
VCC_NCTF1
VCC_NCTF0
VCCSM_NCTF31
VCCSM_NCTF30
VCCSM_NCTF29
VCCSM_NCTF28
VCCSM_NCTF27
VCCSM_NCTF26
VCCSM_NCTF25
VCCSM_NCTF24
VCCSM_NCTF23
VCCSM_NCTF22
VCCSM_NCTF21
VCCSM_NCTF20
VCCSM_NCTF19
VCCSM_NCTF18
VCCSM_NCTF17
VCCSM_NCTF16
VCCSM_NCTF15
VCCSM_NCTF14
VCCSM_NCTF13
VCCSM_NCTF12
VCCSM_NCTF11
VCCSM_NCTF10
VCCSM_NCTF9
VCCSM_NCTF8
VCCSM_NCTF7
VCCSM_NCTF6
VCCSM_NCTF5
VCCSM_NCTF4
VCCSM_NCTF3
VCCSM_NCTF2
VCCSM_NCTF1
VCCSM_NCTF0
L17
M17
N17
P17
T17
U17
V17
W17
L18
M18
N18
P18
R18
Y18
L19
M19
N19
P19
R19
Y19
L20
M20
N20
P20
R20
Y20
L21
M21
N21
P21
T21
U21
V21
W21
L22
M22
N22
P22
R22
T22
U22
V22
W22
L23
M23
N23
P23
R23
T23
U23
V23
W23
L24
M24
N24
P24
R24
T24
U24
V24
W24
L25
M25
N25
P25
R25
T25
U25
V25
W25
L26
M26
N26
P26
R26
T26
U26
V26
W26
AB12
AC12
AD12
AB13
AC13
AD13
AC14
AD14
AC15
AD15
AC16
AD16
AC17
AD17
AC18
AD18
AC19
AD19
AC20
AD20
AC21
AD21
AC22
AD22
AC23
AD23
AC24
AD24
AC25
AD25
AC26
AD26
Y1 VSS271
D2 VSS270
G2 VSS269
J2 VSS268
L2 VSS260
P2 VSS259
T2 VSS258
V2 VSS257
AD2 VSS256
AE2 VSS255
AH2 VSS254
AL2 VSS253
AN2 VSS252
A3 VSS251
C3 VSS250
AA3 VSS249
AB3 VSS248
AC3 VSS247
AJ3 VSS246
C4 VSS245
H4 VSS244
L4 VSS243
P4 VSS242
U4 VSS241
Y4 VSS240
AF4 VSS239
AN4 VSS238
E5 VSS237
W5 VSS236
AL5 VSS235
AP5 VSS234
B6 VSS233
J6 VSS232
L6 VSS231
P6 VSS230
T6 VSS229
AA6 VSS228
AC6 VSS227
AE6 VSS226
AJ6 VSS225
G7 VSS224
V7 VSS223
AA7 VSS222
AG7 VSS221
AK7 VSS220
AN7 VSS219
C8 VSS218
E8 VSS217
L8 VSS216
P8 VSS215
Y8 VSS214
AL8 VSS213
A9 VSS212
H9 VSS211
K9 VSS210
T9 VSS209
V9 VSS208
AA9 VSS207
AC9 VSS206
AE9 VSS205
AH9 VSS204
AN9 VSS203
D10 VSS202
L10 VSS201
Y10 VSS200
AA10 VSS199
F11 VSS198
H11 VSS197
Y11 VSS196
AA11 VSS195
AF11 VSS194
AG11VSS193
AJ11 VSS192
AL11 VSS191
AN11VSS190
B12 VSS189
D12 VSS188
J12 VSS187
A14 VSS186
B14 VSS185
F14 VSS184
J14 VSS183
K14 VSS182
AG14VSS181
AJ14 VSS180
AL14 VSS179
AN14VSS178
C15 VSS177
K15 VSS176
A16 VSS175
D16 VSS174
H16 VSS173
K16 VSS172
AL16 VSS171
C17 VSS170
G17 VSS169
AF17 VSS168
AJ17 VSS167
AN17VSS166
A18 VSS165
B18 VSS164
U18 VSS163
AL18 VSS162
C19 VSS161
H19 VSS160
J19 VSS159
T19 VSS158
W19 VSS157
AG19VSS156
AN19VSS155
A20 VSS154
D20 VSS153
E20 VSS152
F20 VSS151
G20 VSS150
V20 VSS149
AK20 VSS148
C21 VSS147
F21 VSS146
AF21 VSS145
AN21VSS144
A22 VSS143
D22 VSS142
E22 VSS141
J22 VSS140
AH22VSS139
AL22 VSS138
H23 VSS137
AF23 VSS136
B24 VSS135
D24 VSS134
F24 VSS133
J24 VSS132
AG24VSS131
AJ24 VSS130
B36 VSSALVDS
VSS267
VSS266
VSS265
VSS264
VSS263
VSS262
VSS261
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68
VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
VSS0
AL24
AN24
A26
E26
G26
J26
B27
E27
G27
W27
AA27
AB27
AF27
AG27
AJ27
AL27
AN27
E28
W28
AA28
AB28
AC28
A29
D29
E29
F29
G29
H29
L29
P29
U29
V29
W29
AA29
AD29
AG29
AJ29
AM29
C30
Y30
AA30
AB30
AC30
AE30
AP30
D31
E31
F31
G31
H31
J31
K31
L31
M31
N31
P31
R31
T31
U31
V31
W31
AD31
AG31
AL31
A32
C32
Y32
AA32
AB32
AC32
AD32
AJ32
AN32
D33
E33
F33
G33
H33
J33
K33
L33
M33
N33
P33
R33
T33
U33
V33
W33
AD33
AF33
AL33
C34
AA34
AB34
AC34
AD34
AH34
AN34
B35
D35
E35
F35
G35
H35
J35
K35
L35
M35
N35
P35
R35
T35
U35
V35
W35
Y35
AE35
C36
AA36
AB36
AC36
AD36
AE36
AF36
AJ36
AL36
AN36
E37
H37
K37
M37
P37
T37
V37
Y37
AG37
4
CFG9: PCIE GRAPHIC LANE
LOW = REVERSE LANE
HIGH = NORMAL OPERATION (Default)
CFG18
63
8
CFG16
R69
2.2KOhm
/*
+2.5VS
LOW = 1.05V (Default)
HIGH = 1.5V
CFG[17..3] have internal pullup resistors.
CFG[19..18] have internal pulldown resistors.
SDVOCRTL_DATA has internal pulldown
resistors.
DESCRIPTION:
MCH: GND/NCTF/Strap
3
1
8
2
2
8
1
1
B
2
2
C
NCTF
5
3
2
SDVOCRTL_DATA :
LOW = No SDVO device
present (Default)
2
1
+1.8V
CFG16: FSB DYNAMIC ODT
LOW = Dynamic ODT Disabled
+2.5VS
HIGH = Dynamic ODT Enabled (Default)
R66
2.2KOhm
/*
8
CFG18: CPU VCC SELECT
8
RELEASE DATE :
<OrgName>
1
U48H
ALVISO_BGA1257
D
D
+VCC_GMCH_CORE
U48E
ALVISO_BGA1257
C
NCTF pin can share the via each other or even leave NC
CFG19: CPU VTT SELECT
LOW = 1.05V (Default)
B
R55
1KOhm
/*
HIGH = 1.2V
CFG19
CFG6: LOW = DDR2 SDRAM
CFG6
HIGH = DDR SDRAM (Default)
R72
2.2KOhm
A
bom
DESIGN ENGINEER :
M.Y.
VSS
5
4
+3VS
3
2
1
CLK_CPU_BCLK
+3VS_CLK
PLACE termination close to clock gen.
1
C288
1
L51
C306
0.1UF
+3.3VS_CLKVDD
CPU0
CPU0#
R269
R270
1
1
2 33Ohm
2 33Ohm
CLK_MCH_BCLK 7
CLK_MCH_BCLK# 7
CPUCLKT2_ITP/SRCCLKT5
CPUCLKC2_ITP/SRCCLKC5
35
34
CPU2
CPU2#
R273
R274
1
1
2 33Ohm/*
2 33Ohm/*
CLK_ITP_BCLK 6
CLK_ITP_BCLK# 6
SRCCLKT4
SRCCLKC4
32
31
PCIE4
PCIE#4
R275
R276
1
1
2 33Ohm
2 33Ohm
CLK_PCIE_PEG 16
CLK_PCIE_PEG# 16
SRCCLKT3_SATA
SRCCLKC3_SATA
27
28
PCIE3
PCIE#3
R323
R324
1
1
2 33Ohm
2 33Ohm
CLK_PCIE_SATA 22
CLK_PCIE_SATA# 22
SRCCLKT2
SRCCLKC2
25
26
PCIE2
PCIE#2
R321
R322
1
1
2 33Ohm
2 33Ohm
CLK_MCH_3GPLL 8
CLK_MCH_3GPLL# 8
SRCCLKT1
SRCCLKC1
23
24
PCIE1
PCIE#1
R319
R320
1
1
2 33Ohm
2 33Ohm
CLK_PCIE_ICH 23
CLK_PCIE_ICH# 23
SRCCLKT0
SRCCLKC0
20
21
PCIE0
PCIE#0
DOC_2
DOC_1
36
19
DOC_2
DOC_1
R256
R346
1
1
2 0Ohm /*
2 0Ohm /*
OVER_CLK2 30
OVER_CLK1 30
DOTT_96MHz
DOTC_96MHz
14
15
DOT96
DOT96#
R316
R317
1
1
2 33Ohm/*
2 33Ohm/*
DREFCLK 8
DREFCLK# 8
VTT_PWRGD#/PD
16
CLK_EN_ICS#
X2
17
27MHZ
48USB
11
48MHz
1
2 33Ohm
33PCI5_FSA
FSLA/PCICLK5
1
2 33Ohm
33PCI4
4
PCICLK4
R298
1
2 33Ohm
33PCI3
3
PCICLK3
R277
1
2 33Ohm
33PCI2
56
1
1
1
2 33Ohm
2 33Ohm/*
2 33Ohm
33PCI1
55
PCICLK1
33PCI0
54
PCICLK0
R315
1
2 33Ohm
33PCIF1
R314
1
2 33Ohm
2
2
R292
475Ohm
1%
9
PCICLK_F1
8
ITP_EN/PCICLK_F0
46
SCLK
47
SDATA
39
IREF
2
6
12
30
45
51
GND1
GND2
GND3
GND4
GND5
GND6
1
1
PCICLK2
1
1
R260
1
52
53
REF1/FSLB
REF0/FSLC
CLK_BSEL1
CLK_BSEL0
R291
R297
1
1
2 33Ohm
2 33Ohm
Ext VGA: N/A
Int VGA: stuff
1
1
CLK_PCIE_SATA# R336
1
CLK_MCH_3GPLL R349
1
CLK_MCH_3GPLL#R350
1
CLK_PCIE_ICH
R347
1
CLK_PCIE_ICH#
R348
1
DREFCLK
R344
1
DREFCLK#
R345
1
DREFSSCLK
R263
1
DREFSSCLK#
R264
1
R296
1
2 15Ohm 1%
/*
1
R363
2
10KOhm
R919
R930
100KOhm
100KOhm
330Ohm
14
13
10
15
IREF_R1
1
2
1
+3.3VS_CLKVDD
R285
0Ohm
/*
1
1
1
R249
R265
R250
R289
1KOhm
/*
1KOhm
/*
47KOhm
1KOhm
/*
SHEET
4
12
OF
63
DESCRIPTION:
CLOCK GEN (ICS954213)
3
1
R266
2
1KOhm
MCH_SEL1 8
A
CLK_BSEL1
CLK_BSEL0
R282
475Ohm
/*
1%
R251
R286
10KOhm
/*
47KOhm
1
5
DATE:
2.1
2 CLK_BSEL1
1KOhm
+VCCP
Ext VGA: N/A
Int VGA: stuff
REVISION
CPUSEL1 1
R933
DREFSSCLK 8
DREFSSCLK# 8
1
/*
/*
bom
PROJECT: W3V
2 CLK_BSEL0
1KOhm
2
/*
CPUSEL0 1
R920
Q168
PMBS3904
1
MK1493_05GT
2 33Ohm
2 33Ohm
2 S
1
2
C877 0.01UF
Q169
PMBS3904
<OrgName>
1
R267
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
2
2
1KOhm
2
1
10KOhm /*
IREF
VSSIREF
PWRDWN
VSS
REF/SEL
VSSA
C893
R1.1#12
2
R312
10KOhm
/*
2
R313
DREFSSCK_D R283 1
DREFSSCK#_D R284 1
CPU_BSEL1
2
SCLK
SDATA
5
6
12
11
4
2
+3VS_GM_SS
2
7
8
2 0Ohm /*
2 0Ohm /*
CLKOUT
CLKOUT#
10UF/10V
/*
4,48 CPU_BSEL0
2
R294 1
R300 1
R1.1#5 CLK_EN_ICS#
2
1
R311
10KOhm
/*
SCL_3S
SDA_3S
S3
S2
S1
0.1UF
/*
2
120Ohm/100MHz
/*
2
R310
10KOhm
/*
SSC_S1
SSC_S2
SSC_S3
2
3
4
16
9
1
2
1
96.00
96.00
96.00
96.00
96.00
96.00
96.00
96.00
1
48.00
48.00
48.00
48.00
48.00
48.00
48.00
48.00
1
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
SSC_S3
SSC_S2
SSC_S1
0.1UF
/*
VDDA
VDD
2
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
DOT
MHz
2
100
100
100
100
100
100
100
100
USB
MHz
R340
10KOhm
/*
CLKIN
1
266
133
200
166
333
100
400
200
REF
MHz
2
0
1
0
1
0
1
0
1
PCI
MHz
2
0
0
1
1
0
0
1
1
SRC
MHz
1
A
0
0
0
0
1
1
1
1
CPU
MHz
R339
10KOhm
/*
1
1
L54
C295
3
C
R338
10KOhm
/*
CLK_14
C292
E
2
V
FS_B FS_A
+3VS
U25
ICS 954213 FREQUENCY TABLE
FS_C
+3VS
C291
G
B
R917
1
+3VS
2
100
1
0
2
1
+3VS_GM_SS
Q50
2N7002
1
/*
2
2
/*
3
C
133
CLK_EN_ICS#
D
+VCCP
Install when use
Dothan B-Step CPU
1 B
0
Ext VGA: N/A
Int VGA: stuff
C
0.47U
1 B
0
2 49.9Ohm
/*
1%
2 49.9Ohm
/*
1%
R1.1#5
E
2
Ext VGA: N/A
Int VGA: N/A in default
2 49.9Ohm
/*
1%
2 49.9Ohm
/*
1%
3
Ext VGA: N/A
Int VGA: stuff
+3VS
HOST CLOCK
2 49.9Ohm
1%
2 49.9Ohm
1%
R374
10KOhm
1%
5PF
5PF
5PF
R2.0#8
C305
For EMI
R297: Ext VGA: 33 OHM
Int VGA: 15 OHM
6,13,14,19,21,36
6,13,14,19,21,36
B STEP
CPU_BSEL1
2 49.9Ohm
1%
2 49.9Ohm
1%
CLK_14
/*
CPU_BSEL0
2 49.9Ohm
1%
2 49.9Ohm
1%
+3VS_CLK
CLK_ICH14 22
CLK_SIO14 30
C304
SDA_3S
SCL_3S
Ext VGA: N/A
Int VGA: stuff
8,45,48,49,54 VRM_PWRGD
R1.1_No5
ICS954213
SDA_3S
SCL_3S
ITP: Stuff
No ITP: N/A
CLK_PCIE_PEG# R261
CLK_PCIE_SATA R337
D
2 49.9Ohm
1%
2 49.9Ohm
1%
T330
T332
C297
B
PU +3VS:
34/35 as
CLK
PD GND:
34/35 as
CLK
1
44
43
X1
49
/*
2
CPUCLKT0
CPUCLKC0
50
R362
10KOhm
1%
2
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
1
2 33Ohm
2 33Ohm
XOUT_CLKGEN
IREF
1
2
1
1
1
XIN_CLKGEN
5
2
1
R271
R272
2 33Ohm
10K
pin
ITP
10K
pin
SRC
CLK_PCIE_PEG
2 49.9Ohm
1% /*
2 49.9Ohm
1% /*
2
1
CPU1
CPU1#
1
2
2
41
40
1
1
2
1
1
2
2
2
1
1
1
2
2
2
1
1
1
2
2
1
1
CPUCLKT1
CPUCLKC1
VDDA
27VGA
5PF
5PF
/*
GNDA
38
2 33Ohm
C318
5PF
/*
C319
5PF
/*
C281
5PF
/*
C280
5PF
5PF
/*
C279
C278
5PF
5PF
5PF
5PF
/*
C300
C316
C317
C320
C321
/*
STP_PCI# 22
STP_CPU# 22,49
37
+3.3VS_CLKVDD
/*
2 0Ohm
2 0Ohm
+3VS_CLKA
R1.1#38
/*
1
1
23 CLK_ICHPCI
1
R259
1
31 CLK_FWHPCI
R258
CLK_ITP_BCLK#
2 49.9Ohm
1%
2 49.9Ohm
1%
2
30 CLK_SIOPCI
21 CLK_TPMPCI
43 CLK_DBPCI
1
1
R306
R278
R279
R280
CLK_ITP_BCLK
2 49.9Ohm
1%
2 49.9Ohm
1%
1
39 CLK_MINIPCI
R307
1
2
C
R343
1
CLK_MCH_BCLK# R255
1
1
32 CLK_KBCPCI
R335
R309
2
0.1UF
2
37 CLK_LANPCI
S_PCI#
S_CPU#
1
C286
2
40 CLK_CBPCI
18
10
VDDCPU
VDD_REF_CR
1
23 CLK_USB48
R252
1Ohm
PCI_SRC_STOP#
CPU_STOP#
42
ITP: Stuff
No ITP: N/A
0.1UF
48
2
1
16,17 CLK_VGA27
CLK_MCH_BCLK R254
0.1UF
VDD48
1
47pF/50V
2
47pF/50V
R318
1
C311
VDDREF
VDDSRC1
VDDSRC2
VDDSRC3
C310
C308
0.1UF
1
R360
10KOhm
1%
C309
2.2OHM
C312
13
22
29
33
2
R361
2
2
1
+3.3VS_CLKVDD
14.318Mhz
1
2
1
+3.3VS_CLK48
2
2
0.1UF
R303
2.2OHM
X3
7
C294
10UF/10V
2
VDDPCI
C296
U24
VDDPCI0
1
1
+3VS_CLK
D
1
+3.3VS_CLKVDD
2
120Ohm/100Mhz
0.1UF
1
0.1UF
R257
CLK_CPU_BCLK# R253
2
C293
0.1UF
1
C313
2
0.47U
1
1
C277
2
10UF/10V
2
C290
2
0.1UF
1
C287
2
1
0.1UF
1
2 120Ohm/100Mhz
C265
2
2
0.1UF
+3VS_CLK
L53 1
2
C264
1
1
+3VS
1
MCH_SEL0 8
5
4
3
2
1
M_B_DQ[0..63] 9
DCLK3
9,15 M_B_A[0..13]
D
U16A
107
106
110
115
30
32
164
166
79
80
113
108
109
198
200
197
195
BA0
BA1
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
114
119
ODT0
ODT1
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
10
26
52
67
130
147
170
185
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
1
DCLK3#
2
DCLK4
C745
PLACE NEAR SO-DIMM_0
1
10PF
DCLK4#
9,15 M_B_BS#2
9,15 M_B_BS#0
9,15 M_B_BS#1
8,15
SCS2#
8,15
SCS3#
8
DCLK3
8
DCLK3#
8
DCLK4
8
DCLK4#
8,15
SCKE2
8,15
SCKE3
9,15 M_B_CAS#
9,15 M_B_RAS#
9,15 M_B_WE#
C
+3VS
1
10KOhm
6,12,14,19,21,36 SCL_3S
6,12,14,19,21,36 SDA_3S
2
2
R204
R205
1
10KOhm
8,15
ODT2
8,15
ODT3
9 M_B_DM[0..7]
9 M_B_DQS[0..7]
B
9 M_B_DQS#[0..7]
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
+1.8V
U16B
+3VS
C254
0.1UF
VTT_REF
1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16_BA2
10PF
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
C258
2.2uF/6.3V
C253
0.1UF
2
102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85
1
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
2
1
C747
2
2
D
112
111
117
96
95
118
81
82
87
103
88
104
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
199
VDDSPD
83
120
50
69
163
NC1
NC2
NC3
NC4
NCTEST
1
VREF
201
202
GND0
GND1
203
204
NP_NC1
NP_NC2
47
133
183
77
12
48
184
78
71
72
121
122
196
193
8
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
C
DDR_DIMM_200P
B
+1.8V
R2.1
+5V
1
1
DDR_DIMM_200P
C261
R247
0.1UF
2
10KOhm
1%
VTT_REF
+1.8V
1
+
R248
0.01UF
10KOhm
1%
2
0Ohm
/*
3
-
4
V- U20
LMV321
C267
1UF/10V
2
1
R1011
2
C266
2
1
1UF/10V
2
1UF/10V
C731
2
C743
1
1
1UF/10V
2
1UF/10V
C259
2
1UF/10V
C752
1
1
C744
2
0.1UF
2
2
0.1UF
C255
2
C252
1
1
1
C777
0.1UF
2
0.1UF
2
0.1UF
C774
1
C710
2
0.1UF
1
1
C713
2
0.1UF
2
2
0.1UF
C709
1
1
1
C706
T108
V+
1
+1.8V
1
+1.8V
1
Layout Note: Place these Caps near SO DIMM 0
5
2
Layout Note: Place these High-Freq decoupling Caps near the GMCH
A
A
bom
PROJECT: W3V
5
REVISION
DATE:
2.1
SHEET
4
13
OF
63
DESCRIPTION:
DDR2 SO-DIMM (1)
3
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
2
1
5
4
3
2
1
D
D
9,15 M_A_A[0..13]
DCLK0
M_A_DQ[0..63] 9
C256
U53A
107
106
110
115
30
32
164
166
79
80
113
108
109
198
200
197
195
BA0
BA1
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
114
119
ODT0
ODT1
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
10
26
52
67
130
147
170
185
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
1
10PF
DCLK1#
9,15 M_A_BS#2
9,15 M_A_BS#0
9,15 M_A_BS#1
8,15
SCS0#
8,15
SCS1#
8
DCLK0
8
DCLK0#
8
DCLK1
8
DCLK1#
8,15
SCKE0
8,15
SCKE1
9,15 M_A_CAS#
9,15 M_A_RAS#
9,15 M_A_WE#
1
1
C
R243
6,12,13,19,21,36 SCL_3S
6,12,13,19,21,36 SDA_3S
R242
2
10KOhm
2
10KOhm
8,15
ODT0
8,15
ODT1
9 M_A_DM[0..7]
9 M_A_DQS[0..7]
B
9 M_A_DQS#[0..7]
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
+1.8V
U53B
+3VS
C764
0.1UF
VTT_REF
1
2
C260
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
C765
0.1UF
2
DCLK1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16_BA2
1
1
10PF
DCLK0#
102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85
2
2
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
112
111
117
96
95
118
81
82
87
103
88
104
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
199
VDDSPD
83
120
50
69
163
NC1
NC2
NC3
NC4
NCTEST
1
VREF
201
202
GND0
GND1
203
204
NP_NC1
NP_NC2
47
133
183
77
12
48
184
78
71
72
121
122
196
193
8
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
C
DDR_DIMM
B
DDR_DIMM
1UF/10V
1
C761
C257
1UF/10V
C779
1UF/10V
2
1UF/10V
1
1
C760
2
2
1UF/10V
2
C263
1
1
0.1UF
2
0.1UF
C283
2
C771
1
1
0.1UF
2
2
0.1UF
C762
2
C763
1
+1.8V
1
+1.8V
A
A
bom
PROJECT: W3V
5
REVISION
DATE:
2.1
SHEET
4
14
OF
63
DESCRIPTION:
DDR2 SO-DIMM (2)
3
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
2
1
5
4
3
2
1
+0.9VS
D
M_A_A[0..13] 9,14
+0.9VS
1
L52
R758
R803
R231
R751
1
1
1
1
2
2
2
2
56Ohm
56Ohm
56Ohm
56Ohm
SCKE0
SCKE1
SCKE2
SCKE3
R802
R759
R744
R238
1
1
1
1
2
2
2
2
56Ohm
56Ohm
56Ohm
56Ohm
ODT0
ODT1
ODT2
ODT3
R762 1
R804 1
R760 1
2 56Ohm
2 56Ohm
2 56Ohm
M_A_BS#0
M_A_BS#1
M_A_BS#2
R246 1
R245 1
R763 1
2 56Ohm
2 56Ohm
2 56Ohm
R234 1
R741 1
R232 1
2 56Ohm
2 56Ohm
2 56Ohm
R236 1
R742 1
R235 1
2 56Ohm
2 56Ohm
2 56Ohm
R805
R761
R743
R237
2
2
2
2
D
M_A_BS#[0..2] 9,14
2
120Ohm/100Mhz
/*
VTT_REF
M_B_A[0..13] 9,13
R2.1
M_B_BS#[0..2] 9,13
SCKE[0:3] 8,13,14
ODT[0:3]
M_A_CAS# 9,14
M_A_RAS# 9,14
M_A_WE# 9,14
8,13,14
M_B_BS#0
M_B_BS#1
M_B_BS#2
C
C
1
1
1
1
M_B_CAS# 9,13
M_B_RAS# 9,13
M_B_WE# 9,13
56Ohm
56Ohm
56Ohm
56Ohm
SCS0#
SCS1#
SCS2#
SCS3#
8,14
8,14
8,13
8,13
B
0.1UF
C272
1
C275
0.1UF
C262
0.1UF
2
0.1UF
1
C276
2
0.1UF
1
C268
2
0.1UF
1
C269
2
0.1UF
1
C780
2
0.1UF
1
C271
2
0.1UF
1
C741
2
0.1UF
1
1
C742
2
0.1UF
2
C757
2
0.1UF
1
1
C737
2
2
0.1UF
2
C736
1
1
+0.9VS
Layout note: Place one cap close to every 2 pullup resistors terminated to +0.9VS
1
0.1UF
2
0.1UF
C273
C270
0.1UF
2
C739
1
1
0.1UF
2
0.1UF
C740
2
C724
1
1
0.1UF
2
0.1UF
C274
2
C775
1
1
0.1UF
2
0.1UF
C725
2
C759
1
1
0.1UF
2
0.1UF
C758
2
C726
1
1
0.1UF
2
2
0.1UF
C738
2
C735
1
1
+0.9VS
1
2
3
4
5
6
7
8
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
16
15
14
13
12
11
10
9
RN12A
RN12B
RN12C
RN12D
RN12E
RN12F
RN12G
RN12H
M_A_A12
M_A_A11
M_A_A8
M_A_A7
M_A_A9
M_A_A6
M_A_A5
M_A_A1
1
2
3
4
5
6
7
8
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
16
15
14
13
12
11
10
9
RN13A
RN13B
RN13C
RN13D
RN13E
RN13F
RN13G
RN13H
M_A_A4
M_A_A0
M_A_A2
M_A_A3
M_A_A10
M_A_A13
1
2
3
4
5
6
7
8
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
16
15
14
13
12
11
10
9
RN27A
RN27B
RN27C
RN27D
RN27E
RN27F
RN27G
RN27H
M_B_A8
M_B_A12
M_B_A9
M_B_A5
M_B_A7
M_B_A6
M_B_A4
M_B_A1
1
2
3
4
5
6
7
8
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
56Ohm
16
15
14
13
12
11
10
9
RN28A
RN28B
RN28C
RN28D
RN28E
RN28F
RN28G
RN28H
M_B_A3
M_B_A0
M_B_A2
M_B_A10
M_B_A13
M_B_A11
B
A
A
bom
PROJECT: W3V
5
REVISION
DATE:
2.1
SHEET
4
15
OF
63
DESCRIPTION:
DDR2 Res
3
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
2
1
5
4
3
8 PEG_G_RXP[0..15]
8 PEG_G_RXN[0..15]
1
C644
PEG_RXP9
PEG_RXN9
1
C627
PEG_RXP10
PEG_RXN10
1
C602
PEG_RXP11
PEG_RXN11
1
C646
PEG_RXP12
PEG_RXN12
1
C629
PEG_RXP13
PEG_RXN13
1
C604
PEG_RXP14
PEG_RXN14
1
C648
PEG_RXP15
PEG_RXN15
1
C631
C
+3VS
2
+3VS
2
+3VS
R677 1
R692 1
R674 1
2
10KOhm /*
R660 2
/*
R661 1
R106
10KOhm
/*
2 150Ohm 1% AC23
2 100Ohm 1% AB24
2 10KOhm 1% AB23
Straping / Internal PD
1
1
R658
1 10KOhm
23
2 1KOhm
1
R1.1#9
PLT_RST#
PLT_RST#_MASK
place close to ASIC
1
2 M24_R2SET
R95
715 Ohm 1%
TV_Y_ATI
21
TV_Y_ATI
TV_C_ATI
21
TV_C_ATI
TV_CVBS_ATI
21 TV_CVBS_ATI
M26_EN#
T275
T74
M26: install when disable M26
19
19
27M_X1
27M_SSIN_X2
2 0Ohm /* 27M_X1
R127 1
2 0Ohm /* 27M_X2
R695 1
2 0Ohm
R697 1
2 0Ohm /* XTALOUT
2
A
17
27M_ATI
12PF/50V
/*
XTALIN
R105 1
27M_X2
R118 1
1
R112 1
CLK_VGA27 12,17
2
27Mhz
/*
1
2
R117
1MOhm
/*
C105
2
17
27M_SSIN_X1
2 0Ohm /*
1
17
1
R111 1
C126
1
1 M26_EN#
M24_SCL
M24_SDA
X2
Memory SS (Reserved)
R123 1
12PF/50V
R109 1
/*
R672 2
PCIE_TEST
AD25
AD24
PERSTb
PERSTb_MASK
AH21
R2SET
AK21
AJ22
AK22
Y_G
C_R_PR
COMP_B_PB
AJ24
AK24
H2SYNC
V2SYNC
AG22
AG23
DDC3CLK
DDC3DATA
2 1KOhm AJ23
1 AH24
T67
2 0Ohm /* XTALIN
AH28
2 0Ohm /* XTALOUT AJ29
TESTEN AH27
E8
B6
1 AF25
T274
1 10KOhm
AH25
2 1KOhm
SSIN
SSOUT
XTALIN
XTALOUT
TESTEN
TEST_YCLK
TEST_MCLK
PLLTEST
STEREOSYNC
M24_CSP64
bom
PROJECT: W3V
5
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN
TXCLK_LP
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P
TXCLK_UN
TXCLK_UP
AH15
AH16
AJ16
AJ17
AJ18
AK18
AJ20
AJ21
AK19
AJ19
AG16
AG17
AF16
AF17
AE18
AE19
AF19
AF20
AG19
AG20
DIGON
BLON
AE12
AG12
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TXCM
TXCP
AK13
AJ13
AJ14
AJ15
AK15
AK16
AJ12
AK12
DDC2CLK
DDC2DATA
AE13
AE14
HPD1
AF12
R
G
B
AK27
AJ27
AJ26
HSYNC
VSYNC
AJ25
AK25
RSET
AH26
DDC1DATA
DDC1CLK
AG25
AF24
GPIO__AUXWIN
AG24
DPLUS
DMINUS
AF11
AE11
PCIE_CALRP
PCIE_CALRN
PCIE_CALI
AE25
REVISION
DATE:
2.1
SHEET
4
16
OF
63
AG4
2
1
PCIE_REFCLKP
PCIE_REFCLKN
VREFG
+PCIE_VDDR
R659
10KOhm
/*
B
AF27
AE27
12 CLK_PCIE_PEG
12 CLK_PCIE_PEG#
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCNTL_3
AJ10
AK10
AJ11
AH11
T249
T51
T256
1
1
1
R623 1
2 10KOhm
2
0Ohm /*
S 2
DESCRIPTION:
D
ATI_PERF# (int. PD):
H(1.0V) / L(1.2V)
DVOMODE = VSS: 3.3V Mode (ZV or GPIO)
= 1.8V: 1.8V Mode (Ext. TMDS)
DVPDATA18/19: I2C Data/Clock
DVPDATA(1:7,20:23): can be GPIO (Int. PD)
DVPCNTL(0:3): PU to VDDR4 if not used
DVPDATA(0:23): can NC if not used
GPIO(0:13): can NC if not used
(Reserved)
R602 1
R614 1
R613 1
2 0Ohm /*
2 0Ohm /*
2 8.2KOhm
EDID_DAT_ATI 20
EDID_CLK_ATI 20
+3VS
1
3
5
7
2
4
6
8
10KOhm
10KOhm
10KOhm
10KOhm
RN18A
RN18B
RN18C
RN18D
LVDS_YA0M_ATI
LVDS_YA0P_ATI
LVDS_YA1M_ATI
LVDS_YA1P_ATI
LVDS_YA2M_ATI
LVDS_YA2P_ATI
20
20
20
20
20
20
LVDS_CLKAM_ATI 20
LVDS_CLKAP_ATI 20
LVDS_YB0M_ATI 20
LVDS_YB0P_ATI 20
LVDS_YB1M_ATI 20
LVDS_YB1P_ATI 20
LVDS_YB2M_ATI 20
LVDS_YB2P_ATI 20
C
+3VS
R1.1#33
For I/O power reference
1
R36
2
+3VS
499Ohm
C33
R32
0.1UF
499Ohm
place close to ASIC
8 DAC_VSYNC_GM
1
R684
R2.0#14
+3VS
Ext VGA: N/A
Int VGA:
stuff
U43
1 B
VCC 5
2 A
2
0Ohm
/*
3 GND
4
Y
74LVC1G32GV
/*
LVDS_CLKBM_ATI 20
LVDS_CLKBP_ATI 20
B
LCD_VDD_EN_ATI 20
LCD_BACKEN_ATI 20
DAC_VSYNC_ATI
R686 1
2 0Ohm
VSYNC_5 21
Ext VGA: 0 ohm
Int VGA: N/A
+3VS
Ext VGA: N/A
Int VGA:
stuff
PD
1
R625
2
100KOhm
8 DAC_HSYNC_GM
1
R688
U47
1 B
DAC_HSYNC_ATI
DAC_VSYNC_ATI
place close to ASIC
M24_RSET 1
2
R693
499Ohm 1%
3 GND
4
Y
74LVC1G32GV
/*
DAC_HSYNC_ATI
R689 1
2
R673
2 0Ohm
HSYNC_5 21
Ext VGA: 0 ohm
Int VGA: N/A
DDC2BD_ATI 21
DDC2BC_ATI 21
GPIO_AUX
VCC 5
2 A
2
0Ohm
/*
DAC_R_ATI 21
DAC_G_ATI 21
DAC_B_ATI 21
M24: MAIN
3
M24_THRM# 19
G
M22/24: High - no slave VIP host
M26: no stuff
DVPCNTL0
DVPCNTL1
DVPCNTL2
DVPCNTL3
PD
PD
Q5
2N7002
/*
1
A
1
10KOhm
TV_Y_ATI
TV_C_ATI
VGA_THERMDA 19
VGA_THERMDC 19
TV_CVBS_ATI
R103
150Ohm
1%
<OrgName>
2
PEG_RXP8
PEG_RXN8
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
T246
T24
T27
T251
T239
T244
T240
T238
T237
T29
T45
T49
T233
T245
T241
T243
T250
T248
LCDDATA18
LCDDATA19
2 10KOhm /*
1
R15
3
R96
150Ohm
1%
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
2
R100
150Ohm
1%
1
1
C600
AF26
AE26
AC25
AB25
AC27
AB27
AC26
AB26
Y25
W25
Y27
W27
Y26
W26
U25
T25
U27
T27
U26
T26
P25
N25
P27
N27
P26
N26
L25
K25
L27
K27
L26
K26
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
+1.8VS
R626 1
2
0Ohm
2
PEG_RXP7
PEG_RXN7
PEG_G_TXP0
PEG_G_TXN0
PEG_G_TXP1
PEG_G_TXN1
PEG_G_TXP2
PEG_G_TXN2
PEG_G_TXP3
PEG_G_TXN3
PEG_G_TXP4
PEG_G_TXN4
PEG_G_TXP5
PEG_G_TXN5
PEG_G_TXP6
PEG_G_TXN6
PEG_G_TXP7
PEG_G_TXN7
PEG_G_TXP8
PEG_G_TXN8
PEG_G_TXP9
PEG_G_TXN9
PEG_G_TXP10
PEG_G_TXN10
PEG_G_TXP11
PEG_G_TXN11
PEG_G_TXP12
PEG_G_TXN12
PEG_G_TXP13
PEG_G_TXN13
PEG_G_TXP14
PEG_G_TXN14
PEG_G_TXP15
PEG_G_TXN15
ATI_PERF# 52
MEM_SSIN 17
1
R17
1
1
C625
AH6
AJ6
AK6
AH7
AK7
AJ7
AH8
AJ8
AH9
AJ9
AK9
AH10
AE6
AG6
AF6
AE7
AF7
AE8
AG8
AF8
AE9
AF9
AG10
AF10
D
ATI_GPIO11 19
ATI_GPIO12 19
ATI_GPIO13 19
2
1
C642
PEG_RXP6
PEG_RXN6
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23
PWR_OK_VGA 52,54
GPIO_AUX
1
PEG_RXP5
PEG_RXN5
DVOMODE
R16
10KOhm
/*
ATI_GPIO8 19
ATI_GPIO9 19
T7
2
1
C598
AE10
1
2
0Ohm
19
19
19
19
19
19
19
1
PEG_RXP4
PEG_RXN4
DVOVMODE
ATI_GPIO8
ATI_GPIO9
ATI_GPIO10
ATI_GPIO11
ATI_GPIO12
ATI_GPIO13
1
R23
ATI_GPIO0
ATI_GPIO1
ATI_GPIO2
ATI_GPIO3
ATI_GPIO4
ATI_GPIO5
ATI_GPIO6
1
1
C623
1
+3VS
2
1
C640
PEG_RXP3
PEG_RXN3
DVO / EXT TMDS / GPIO
PEG_RXP2
PEG_RXN2
TMDS
1
C606
DAC1
PEG_RXP1
PEG_RXN1
PEG_G_TXP0
2 PEG_G_TXN0
0.1UF
PEG_G_TXP1
2 PEG_G_TXN1
0.1UF
PEG_G_TXP2
2 PEG_G_TXN2
0.1UF
PEG_G_TXP3
2 PEG_G_TXN3
0.1UF
PEG_G_TXP4
2 PEG_G_TXN4
0.1UF
PEG_G_TXP5
2 PEG_G_TXN5
0.1UF
PEG_G_TXP6
2 PEG_G_TXN6
0.1UF
PEG_G_TXP7
2 PEG_G_TXN7
0.1UF
PEG_G_TXP8
2 PEG_G_TXN8
0.1UF
PEG_G_TXP9
2 PEG_G_TXN9
0.1UF
PEG_G_TXP10
2 PEG_G_TXN10
0.1UF
PEG_G_TXP11
2 PEG_G_TXN11
0.1UF
PEG_G_TXP12
2 PEG_G_TXN12
0.1UF
PEG_G_TXP13
2 PEG_G_TXN13
0.1UF
PEG_G_TXP14
2 PEG_G_TXN14
0.1UF
PEG_G_TXP15
2 PEG_G_TXN15
0.1UF
2
0.1UF 1
C622
2
0.1UF 1
C607
2
0.1UF 1
C641
2
0.1UF 1
C624
2
0.1UF 1
C599
2
0.1UF 1
C643
2
0.1UF 1
C626
2
0.1UF 1
C601
2
0.1UF 1
C645
2
0.1UF 1
C628
2
0.1UF 1
C603
2
0.1UF 1
C647
2
0.1UF 1
C630
2
0.1UF 1
C605
2
0.1UF 1
C649
2
0.1UF 1
C632
THERM
1
C621
ATI_GPIO0
ATI_GPIO1
ATI_GPIO2
ATI_GPIO3
ATI_GPIO4
ATI_GPIO5
ATI_GPIO6
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_PWRCNTL
GPIO_MEMSSIN
DAC2
PEG_RXP0
PEG_RXN0
AJ5
AH5
AJ4
AK4
AH4
AF4
AJ3
AK3
AH3
AJ2
AH2
AH1
AG3
AG1
AG2
AF3
AF2
Part 1 of 6
PCI EXPRESS
8 PEG_RXN[0..15]
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
LVDS
8 PEG_RXP[0..15]
AH30
AG30
AG29
AF29
AE29
AE30
AD30
AD29
AC29
AB29
AB30
AA30
AA29
Y29
W29
W30
V30
V29
U29
T29
T30
R30
R29
P29
N29
N30
M30
M29
L29
K29
K30
J30
CLK SS
D
2
U6A
PEG_G_RXP0
PEG_G_RXN0
PEG_G_RXP1
PEG_G_RXN1
PEG_G_RXP2
PEG_G_RXN2
PEG_G_RXP3
PEG_G_RXN3
PEG_G_RXP4
PEG_G_RXN4
PEG_G_RXP5
PEG_G_RXN5
PEG_G_RXP6
PEG_G_RXN6
PEG_G_RXP7
PEG_G_RXN7
PEG_G_RXP8
PEG_G_RXN8
PEG_G_RXP9
PEG_G_RXN9
PEG_G_RXP10
PEG_G_RXN10
PEG_G_RXP11
PEG_G_RXN11
PEG_G_RXP12
PEG_G_RXN12
PEG_G_RXP13
PEG_G_RXN13
PEG_G_RXP14
PEG_G_RXN14
PEG_G_RXP15
PEG_G_RXN15
1
2
3
4
5
7
8
J25
F29
E25
A27
F15
C15
C11
E11
VSS179
VSS135
VSS129
VSS36
VSS96
VSS25
VSS20
VSS117
J27
F30
F24
B27
E16
B16
B11
F10
A19
E18
VSS99
E19
VSS100
E20
VSS125
F20
VSS28
B19
VSS30
VSS55
B21
C20
VSS53
VSS7
C18
A18
+ATI_MEM
2
VSS8
VSS98
R33
2
1
100Ohm
1%
C43
R37
0.1UF
100Ohm
1%
2
+ATI_MEM
R54
1
MVREFA
MVREFM
B8
MVREFM
100Ohm
1%
1
B7
1
2
MVREFA
VSS83
VSS22
D30
B13
C51
R53
0.1UF
100Ohm
1%
Part 3 of 6
VSS205
VSS195
VSS197
VSS191
VSS190
VSS196
VSS198
VSS212
VSS204
VSS183
VSS184
VSS171
VSS211
VSS209
VSS208
N5
M1
M3
L3
L2
M2
M5
P6
N3
K2
K3
J2
P5
P3
P2
VSS87
VSS14
VSS173
VSS138
VSS260
VSS256
VSS284
VSS290
E6
B2
J5
G3
W6
W2
AC6
AD2
VSS113
VSS15
VSS187
VSS136
VSS251
VSS255
VSS283
VSS289
F6
B3
K6
G1
V5
W1
AC5
AD1
VSS215
R2
VSS231
T5
VSS232
T6
VSS217
R5
VSS218
R6
VSS216
R3
VSS202
VSS203
N1
N2
VDDR1
VSS229
VSS230
T2
T3
1.8V
GND
VSS85
VSS270
E3
AA3
2.5V
+1.8VS
ROMCSb
AF5
A
B
MEMVMODE_0
MEMVMODE_1
C6
C7
MEMTEST
C8
V
R29
R42
MEMVMODE_0
1
1
M24_CSP64
R65
R44
R25
MEMORY CHANNEL B
47Ohm
1%
4.7KOhm
/*
4.7KOhm
1
MEMORY CHANNEL A
1
As close to
ASIC as
possible
M24_CSP64
VSS71
VSS114
VSS88
VSS141
VSS140
VSS112
VSS86
VSS42
VSS17
VSS43
VSS2
VSS16
VSS40
VSS68
VSS66
VSS67
VSS139
VSS157
VSS156
VSS174
VSS186
VSS185
VSS194
VSS193
VSS137
VSS111
VSS153
VSS84
VSS110
VSS172
VSS109
VSS154
VSS244
VSS243
VSS241
VSS252
VSS259
VSS258
VSS268
VSS267
VSS240
VSS249
VSS248
VSS250
VSS257
VSS264
VSS265
VSS269
VSS272
VSS271
VSS277
VSS276
VSS293
VSS292
VSS301
VSS300
VSS274
VSS275
VSS280
VSS281
VSS291
VSS297
VSS298
VSS299
MEMVMODE_1
+1.8VS
GND
2 4.7KOhm
2
4.7KOhm
/*
+1.8VS
2
VSS177
VSS134
VSS105
VSS12
VSS122
VSS50
VSS46
VSS91
D7
F7
E7
G6
G5
F5
E5
C4
B5
C5
A4
B4
C2
D3
D1
D2
G4
H6
H5
J6
K5
K4
L6
L5
G2
F3
H2
E2
F2
J3
F1
H3
U6
U5
U3
V6
W5
W4
Y6
Y5
U2
V2
V1
V3
W3
Y2
Y3
AA2
AA6
AA5
AB6
AB5
AD6
AD5
AE5
AE4
AB2
AB3
AC2
AC3
AD3
AE1
AE2
AE3
1
E22
B22
B23
B24
C23
C22
F22
F21
C21
A24
C24
A25
E21
B20
C19
2
VSS102
VSS31
VSS32
VSS33
VSS58
VSS57
VSS127
VSS126
VSS56
VSS10
VSS59
VSS11
VSS101
VSS29
VSS54
2
B
Part 2 of 6
1
A
VSS169
VSS170
VSS180
VSS181
VSS178
VSS166
VSS167
VSS149
VSS152
VSS82
VSS81
VSS107
VSS108
VSS151
VSS150
VSS133
VSS148
VSS131
VSS106
VSS130
VSS104
VSS128
VSS103
VSS78
VSS38
VSS64
VSS60
VSS62
VSS37
VSS34
VSS61
VSS35
VSS124
VSS97
VSS75
VSS123
VSS95
VSS121
VSS94
VSS120
VSS52
VSS27
VSS26
VSS24
VSS48
VSS23
VSS49
VSS51
VSS5
VSS4
VSS47
VSS21
VSS45
VSS44
VSS18
VSS19
VSS93
VSS92
VSS90
VSS119
VSS118
VSS89
VSS116
VSS115
2
H28
H29
J28
J29
J26
H25
H26
G26
G30
D29
D28
E28
E29
G29
G28
F28
G25
F26
E26
F25
E24
F23
E23
D22
B29
C29
C25
C27
B28
B25
C26
B26
F17
E17
D16
F16
E15
F14
E14
F13
C17
B18
B17
B15
C13
B14
C14
C16
A13
A12
C12
B12
C10
C9
B9
B10
E13
E12
E10
F12
F11
E9
F9
F8
6
U6C
1
U6B
2
1
C
C
M26: no staff
1
R678
2
0Ohm
CLK_VGA27 12,16
R1.1#35
Memory Clock SS
(Reserved)
1.2V
1
R667
27M_ATI
2
16
27M_SSOUT
2
71.5Ohm
1%
R679
71.5Ohm
1%
1
S0 (Spread Percentage Select):
GND: -1.8%
VDD: -2.5% (default PU)
NC : -0.6%
16
27M_SSIN_X2
16
27M_SSIN_X1
16
MEM_SSIN
1
R71
2
22.1Ohm
1% /*
Place close to
MK1726
Place close
to M24
U7
Place close to MK1726
+3VS
8
7
6
5
MK1726_08STR
1
L28
/*
C77
1
X1/ICLK
X2
GND
VDD
S0
PD#
SSCLK REFCLK
1
2
22.1Ohm 1% /*
2
2
120Ohm/100MHz /*
C111
D
R75
0.1UF
/*
22UF/6.3V
/*
1
2
10KOhm
/*
2
1
R70
D
1
2
3
4
bom
PROJECT: W3V
1
2
REVISION
2.1
Monday, January 17, 2005 DESCRIPTION:
DATE:
SHEET
3
17
OF
63
4
M24: MEMORY & SS
5
<OrgName>
6
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
7
8
3
2.4V
1
N24
N23
P23
+PCIE_PVDD_12
PCIE_PVDD_18_2
PCIE_PVDD_18_1
PCIE_PVDD_18_3
PCIE_PVDD_18_4
U23
T23
V23
W23
+PCIE_PVDD_18
VDDM1
VDDM2
VDDM3
VDDM4
VDDM5
VDDM6
VDDM7
D9
D13
D19
D25
E4
T4
AB4
VDDR1_VDDM
C520
2
7
5
1
7
5
3
10UF/16V
C165
1UF/10V
1
C638
+VDD_MEM_CLK
C587
C166
C175
1UF/10V
VSSRH0
VSSRH1
AF21
AE20
A2VDD2
A2VDD1
+AVDD
1UF/10V
10UF/16V
+VDDI
120Ohm/100Mhz
C664
A2VSSN2
A2VSSN1
AH20
AG21
A2VSSQ
AF22
AF23
A2VDDQ
AH23
AVDD
AVSSN
AH22
AE23
AE22
VDD1DI
VDD2DI
VSS1DI
VSS2DI
AE24
AE21
AK28
PVDD
PVSS
AJ28
C612
+PVDD
10UF/10V
1UF/10V
2
+PNL_PLL/15mA
+PNL_IO/60mA
+LVDDR_25/200mA
+VDDC_CT/40mA
PCIE_VDDR, PCIE_PVDD_12/1.52A
PCIE_PVDD_18/500mA
+ATI_VCORE/8A
VDDR1_VDDM/N/A
2
+MPVDD/10mA
+PVDD/30mA
+VDDI/10mA
+AVDD/70mA
+A2VDDQ/5mA
+A2VDD/120mA
VDDR4/1.3mA
A
1
2
1
+1.8VS
1
+MPVDD
A7
MPVDD
MPVSS
M24_CSP64
1UF/10V
7
5
F19
M6
MPVSS
L98
C583
7
VDDRH0
VDDRH1
C589
5
F18
N6
SHORT_PIN /*
2
0.01UF 2
CP9A
0.01UF 4
CP9B
0.01UF 6
CP9C
0.01UF 8
CP9D
TXVSSR3
TXVSSR1
TXVSSR2
JP23
LPVSS 1
3
TXVDDR1
TXVDDR2
2
2
10UF/10V
2
1UF/10V
AF13
AF14
2
2
1
1
1
10UF/10V
1UF/10V
+A2VDDQ
C534
LPVDD
TPVDD
C584
10UF/10V
+MPVDD
2
C611
1UF/10V
PVSS
C537
1
C635
2
2
10UF/10V
+A2VDD
1
C667
1
1
+PVDD
AH19
AH13
A6
1
2
A2
A10
A16
A22
A29
C1
C3
C28
C30
D27
D24
D21
D18
D15
D12
D10
D6
D4
0.01UF 2
CP1A
0.01UF 4
CP1B
0.01UF 6
CP1C
0.01UF 8
CP1D
1
C167
1
100PF
LPVSS
M16
N16
N15
P15
P16
R18
R17
R16
R15
R14
R13
R12
T13
T14
T15
W15
V16
V15
U15
U16
T19
T18
T17
T16
VDDCI4
VDDCI1
VDDCI2
VDDCI3
W16
M15
R19
T12
JP25
1
SHORT_PIN /*
2
JP22
MPVSS 1
SHORT_PIN /*
2
PVSS
Power Sequence:
VDDR3(+3VS)->VDDR4(+3VS)< 1ms
VDDR3(+3VS)->VDDR1(+1.8VS)< 1ms
VDDR4(+3VS)->VDDC(+ATI_VCORE)< 1ms
PCIE_PVDD_18(+1.8VS)->PCIE_PVDD_12(+1.2VSP)> 0
PCIE_PVDD_12(+1.2VSP)->VDDC(+ATI_VCORE)> 0
VDDC(+ATI_VCORE)->VDD_15(+1.5VS)< 1ms
Conclusion:
+3VS -> 1.8VS -> 1.2VSP -> VCORE -> 1.5VS
<1ms
>0ms
>0ms
<1ms
---------------------> VCORE
<1ms
VSS1
VSS3
VSS6
VSS9
VSS13
VSS39
VSS41
VSS63
VSS65
VSS80
VSS79
VSS77
VSS76
VSS74
VSS73
VSS72
VSS70
VSS69
F27
G9
G12
G16
G18
G21
G24
H27
H23
H21
H18
H16
H14
H12
H9
H8
H4
J23
J24
VSS132
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS168
VSS165
VSS164
VSS163
VSS162
VSS161
VSS160
VSS159
VSS158
VSS155
VSS175
VSS176
AD12
AG5
AG9
AG11
VSS294
VSS302
VSS303
VSS304
R7
P4
M7
M8
L4
K1
K7
K8
R8
T1
VSS219
VSS210
VSS199
VSS200
VSS192
VSS182
VSS188
VSS189
VSS220
VSS228
Part 5 of 6
VSS242
VSS245
VSS261
VSS262
VSS266
VSS279
VSS278
VSS273
VSS282
VSS285
VSS286
VSS295
VSS287
VSS288
VSS296
VSS306
VSS305
U4
U8
W7
W8
Y4
AB8
AB7
AB1
AC4
AC12
AC14
AD16
AC16
AC18
AD18
AK2
AJ1
PCIE_VSS1
PCIE_VSS2
PCIE_VSS6
PCIE_VSS5
PCIE_VSS3
PCIE_VSS4
PCIE_VSS7
PCIE_VSS9
PCIE_VSS8
PCIE_VSS12
PCIE_VSS10
PCIE_VSS11
PCIE_VSS13
PCIE_VSS14
PCIE_VSS15
PCIE_VSS17
PCIE_VSS16
PCIE_VSS18
PCIE_VSS19
PCIE_VSS21
PCIE_VSS22
PCIE_VSS20
PCIE_VSS23
PCIE_VSS26
PCIE_VSS24
PCIE_VSS25
PCIE_VSS30
PCIE_VSS31
PCIE_VSS27
PCIE_VSS28
PCIE_VSS29
PCIE_VSS32
PCIE_VSS33
PCIE_VSS34
PCIE_VSS37
PCIE_VSS35
PCIE_VSS36
PCIE_VSS38
PCIE_VSS39
PCIE_VSS40
K28
L28
M27
M26
M24
M25
M28
P28
N28
R25
R23
R24
R26
R27
R28
T28
T24
U28
V24
V26
V27
V25
V28
Y28
W24
W28
AA26
AA27
AA23
AA24
AA25
AA28
AB28
AC28
AD28
AD26
AD27
AE28
AF28
AH29
M24_CSP64
bom
PROJECT: W3V
5
REVISION
2.1
DATE:
SHEET
4
18
OF
D
VDDC
C
1
C573
2
2
2
1UF/10V
0.1UF
VSS201
VSS207
VSS206
VSS213
VSS214
VSS227
VSS226
VSS225
VSS224
VSS223
VSS222
VSS221
VSS233
VSS234
VSS235
VSS263
VSS254
VSS253
VSS246
VSS247
VSS239
VSS238
VSS237
VSS236
U6E
2
C574
10UF/10V
C562
+PCIE_VDDR
1
C567
LVDDR_25_1
LVDDR_25_2
LVDDR_18_1
LVDDR_18_2
I/O
POWER
120Ohm/100Mhz
AE16
AE17
AF15
AE15
0.1UF
Part 6 of 6
1UF/10V
2
+PNL_IO
2
1
1
1
1UF/10V
L88
+1.8VS
2
2
10UF/10V
C597
1
1
1
C617
C576
VDDC16
VDDC17
VDDC18
VDDC19
VDDC20
VDDC21
VDDC22
VDDC23
VDDC24
VDDC30
VDDC29
VDDC28
VDDC27
VDDC26
VDDC25
VDDC11
VDDC10
VDDC9
VDDC34
VDDC35
VDDC31
VDDC32
VDDC33
VDDC8
VDDC12
VDDC6
VDDC5
VDDC1
VDDC7
VDDC2
VDDC3
VDDC13
VDDC14
VDDC15
VDDC4
VDDC36
M24_CSP64
10UF/10V
+AVDD
B
1
2
1
1
2
0.1UF
7
AH14
AG13
AG14
C575
+VDDR4
10UF/16V
AH18
AH12
3
0.1UF
C539 120Ohm/100Mhz
100PF
LPVSS
TPVSS
C566
L79
PCIE_PVDD_12_2
PCIE_PVDD_12_1
PCIE_PVDD_12_3
AF18
AH17
AG15
AG18
VDDC
2
1UF/10V
1
+PCIE_VDDR
LVSSR1
LVSSR4
LVSSR2
LVSSR3
1
120Ohm/100Mhz
C579
2
1UF/10V
AG26
AK29
AJ30
AG28
AG27
AD22
1
2
2
2
C522
L87
2 +3.3V_BUS
120Ohm/100Mhz
1
PCIE_VDDR_12_1
PCIE_VDDR_12_5
PCIE_VDDR_12_4
PCIE_VDDR_12_3
PCIE_VDDR_12_2
AVSSQ
7
5
3
1
5
1
7
1
1
1
+ATI_VCORE
L81
2
1UF/10V
2
1UF/10V
C547
0.1UF
2
C580
1
C550
2
2
10UF/10V
1
1
1
+PNL_PLL
C593
C552
5
2
0.1UF
2
10UF/10V
+PCIE_PVDD_12
2
80Ohm/100Mhz
1
L38
0.1UF
3
C564
C565
1
C554
0.1UF
0.01UF 2
CP2A
0.01UF 4
CP2B
0.01UF 6
CP2C
0.01UF 8
CP2D
+PCIE_VDDR
2
0Ohm
C540
1
1
R160
+1.2VSP
2
0Ohm
10UF/10V
3
1
R645
LVDDR
+LVDDR_25
C531
2
+VDDC_CT
2
120Ohm/100Mhz
D40 MMSZ4681T1 /*
+VDDC_CT
1
1
L80
+3.3V_BUS
1
+A2VDDQ
2
120Ohm/100Mhz
+AVDD
2
120Ohm/100Mhz
+PCIE_PVDD_18
2
120Ohm/100Mhz
+MPVDD
2
120Ohm/100Mhz
+PVDD
2
120Ohm/100Mhz
+PNL_PLL
2
120Ohm/100Mhz
AG7
AD9
AC9
AC10
AD10
VDDC:
M22= 1.15/ 1.0V
M24= 1.2/ 1.0V
2
+1.5VS
1
L92
1
L94
1
L89
1
L82
1
L97
1
L86
VDDR4_5
VDDR4_3
VDDR4_1
VDDR4_2
VDDR4_4
1
2
C
2
120Ohm/100Mhz
1
+1.8VS
1
L90
1
+2.5VS
+A2VDD
2
1
+VDDR4
VDDR3_5
VDDR3_6
VDDR3_7
VDDR3_4
VDDR3_1
VDDR3_3
VDDR3_2
2.4V
1
1000PF
AD7
AD19
AD21
AC22
AC8
AC21
AC19
10UF/10V
/*
2
0.1UF
C527
C548
1
150U/4.0V
/*
C577
1
CE22
VDD15_4
VDD15_5
VDD15_7
VDD15_8
VDD15_2
VDD15_1
VDD15_3
VDD15_6
P8
Y8
AC11
AC20
H20
H11
M23
Y23
220UF/2V
P17
P18
P19
U12
U13
U14
U17
U18
U19
V19
V18
V17
V14
V13
V12
N18
N17
N14
W17
W18
W12
W13
W14
N13
N19
M19
M18
M12
N12
M13
M14
P12
P13
P14
M17
W19
2
2
2
10UF/10V
+
2
1
+3.3V_BUS
+3VS
C526
1
2
120Ohm/100Mhz
2
1
1
+ATI_MEM
+VDD_MEM_CLK
VDDC37
VDDC40
VDDC41
VDDC38
VDDC39
CE6
2
L84
VDDR1_45
VDDR1_44
VDDR1_43
VDDR1_42
VDDR1_41
VDDR1_39
VDDR1_37
VDDR1_35
VDDR1_36
VDDR1_40
VDDR1_34
VDDR1_33
VDDR1_32
VDDR1_31
VDDR1_25
VDDR1_26
VDDR1_27
VDDR1_28
VDDR1_46
VDDR1_47
VDDR1_48
VDDR1_49
VDDR1_50
VDDR1_51
VDDR1_52
VDDR1_53
VDDR1_1
VDDR1_2
VDDR1_3
VDDR1_4
VDDR1_5
VDDR1_6
VDDR1_7
VDDR1_15
VDDR1_14
VDDR1_13
VDDR1_12
VDDR1_11
VDDR1_10
VDDR1_9
VDDR1_8
VDDR1_16
VDDR1_17
VDDR1_18
VDDR1_19
VDDR1_20
VDDR1_21
VDDR1_22
VDDR1_23
VDDR1_24
VDDR1_30
VDDR1_29
VDDR1_54
VDDR1_38
+
1
150U/4.0V
2
2
2
1000PF 0.1UF
CE23
AC13
AD13
AD15
AC15
AC17
2
+
Part 4 of 6
1
C13
T7
R4
R1
N8
N7
M4
L8
K23
K24
N4
J8
J7
J4
J1
H10
H13
H15
H17
T8
V4
V7
V8
AA1
AA4
AA7
AA8
A3
A9
A15
A21
A28
B1
B30
D26
D23
D20
D17
D14
D11
D8
D5
E27
F4
G7
G10
G13
G15
G19
G22
G27
H22
H19
AD4
L23
2
C544
1
1
1
C523
1000PF 0.1UF
2
1000PF 0.1UF
C578
2
C14
1
1
C532
2
2
1000PF 0.1UF
2
2
0.1UF
C533
1
C591
1
C538
2
D
1
1
1
VDDR1_VDDM
0.1UF 2
CP5A
0.1UF 4
CP5B
0.1UF 6
CP5C
0.1UF 8
CP5D
0.1UF 2
CP4A
0.1UF 4
CP4B
0.1UF 6
CP4C
0.1UF 8
CP4D
0.1UF 2
CP7A
0.1UF 4
CP7B
0.1UF 6
CP7C
0.1UF 8
CP7D
0.1UF 2
CP8A
0.1UF 4
CP8B
0.1UF 6
CP8C
0.1UF 8
CP8D
U6D
1.8V
3
1
/*
2
+ATI_MEM
U6F
2
MMSZ4681T1
1
1
1
+ATI_VCORE
CORE GND
D50
+3.3V_BUS
2
DIODE SUPPLIES POWER
TO VDDC WHILE VDDC REGULATOR
STABALIZES DURING POWER ON
CENTER ARRAY
4
2
5
DESCRIPTION:
M24: POWER
63
3
<OrgName>
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
2
1
B
A
8
7
6
5
4
STRAPS
OPTION STRAPS
3
PIN
DESCRIPTION
B_PRX_IDLE_MODE
(for A21)
B_PTX_PDNB_MODE
PCIE_TEST
B_PTX_PWRS_ENB
GPIO0
16
16
C
ATI_GPIO0
ATI_GPIO1
16
ATI_GPIO2
16
ATI_GPIO3
16
ATI_GPIO4
16
ATI_GPIO6
16
ATI_GPIO11
16
16
ATI_GPIO8
ATI_GPIO1
1
R537
1
R538
2
10KOhm /*
2
10KOhm
ATI_GPIO2
1
R520
1
R519
2
10KOhm /*
2
10KOhm
ATI_GPIO3
1
R517
1
R518
2
10KOhm /*
2
10KOhm
1
R522
1
R521
1
R554
1
R555
1
R579
1
R580
1
R544
1
R543
1
R542
1
R541
1
R539
1
R540
1
R558
1
R557
2
10KOhm
2
10KOhm
2
10KOhm
2
10KOhm
2
10KOhm
2
10KOhm
2
10KOhm
2
10KOhm
2
10KOhm
2
10KOhm
2
10KOhm
2
10KOhm
2
10KOhm
2
10KOhm
1
R559
1
R560
2
10KOhm /*
2
10KOhm
ATI_GPIO6
ATI_GPIO11
ATI_GPIO12
ATI_GPIO13
ATI_GPIO13
ATI_GPIO9
2
10KOhm
2
10KOhm /*
ATI_GPIO5
ATI_GPIO12
16
1
R562
1
R561
ATI_GPIO4
ATI_GPIO5
16
16
ATI_GPIO0
ATI_GPIO9
ATI_GPIO8
B_PTX_DEEMPH_EN
GPIO1
PCIE_MODE(1:0)
GPIO(3:2)
Transmitter Power Savings Enable
0: 50% Tx output swing for mobile mode
1: full Tx output swing (recommended)
Must have an external 10K pullup to 3.3V
V
Transmitter De-emphasis Enable
0: Tx de-emphasis disable for mobile mode
1: Tx de_emphasis enable
0
00: PCI Express 1.0A mode
01: Kyrene-compatible mode
10: PCI Express 1.0 mode
11: PCI Express 1.0A mode and short-circuit internal loopback mode
(Rx connected directly to Tx of PHY)
00
0: normal mode
1: extra current in Tx output stage
0
0: non-reversed lanes layout
1: reversed lanes layout
0
Force chip to go to compliance state quickly for test purposes
0
0: Full PLL Bandwidth
1: Reduced PLL Bandwidth (ATI internal use only. Other logic must not attect this during RESET.)
0
0: normal common-mode range
1: extended commeon-mode range
0
Controls whether ROM bytes 77-76 are used as SUBSYS_VEN_ID strap or
DEBUG_PORT_MUX_SELECT strap.
0
If no ROM attached, controls chip IDis. If ROM attached identifies ROM type
0x0x - No ROM, CHG_ID=0
0x1x - No ROM, CHG_ID=1
1000 - Parallel ROM, chip IDis from ROM
1001 - 1M Serial AT25F1024 ROM (Atmel)
1010 - 1M Serial AT45DB011 ROM (Atmel)
1011 - 1M Serial M25P10 ROM (ST)
1100 - 512K Serial M25P05 ROM (ST)
1101 - 1M Serial SST45LF010 (SST), W45B512 (Winbond), 512K W45B012 (Winbond)
1110 - 1M SST25VF010 (SST), 512K SST25VF512 (SST)
1111 - 1M Serial NX25F011B (NextFlash)
0000 (internal PD)
0: Slave VIP host port device peesent
1: No slave VIP host port device
(internal PD)
V
/*
V
FORCE_COMPLIANCE
/*
GPIO5
V
B_PPLL_BW
(For M24 A21/M22 A11)
/*
CM_RANGE
(For M24A23/M22 A13)
/*
DEBUG_ACCESS
GPIO6
V
GPIO8
/*
V
/*
ROMIDCFG(3:0)
GPIO(9,13:11)
VIP_DEVICE
DVPDATA_20
/*
V
DVPDATA(15:11)
PKGTYPE(4:0)
GPIO[0:13] : Internal PD
B
0
D
GPIO4
REVERSE LANES
(For M24A23/M22 A13)
ATI_GPIO4:
0: no reversed lanes
1: reversed lanes
Check layout!
0
V
V
B_PTX_IEXT
(For M24 A21/M22 A11)
1
ASIC DEFAULT
(For A21) PHY Receiver Idle Detector
0: Normal idle detector / 1: Alternate idle detector
ATI internal use only. Other logic must not affect this signal during RESET
+3VS
D
2
C
ATI internal use only
Identifies package/memory combinations
B
M26: GPIO11 is memory aperture size (0=128M, 1=256M)
M24 THERMAL SENSOR
+3VS
+3VS
R59
200Ohm
1%
M24_SDA
16
A
1
2
M24_THRM#
1
8
SMBCLK
OVERT
4
SDATA_S
7
SMBDATA
DXP
2
ALERT#
DXN
3
R607 1
6,22,25 PM_THRM#
2 0Ohm
/*
OD 6
2 0Ohm
G781_1
/*
R40
10KOhm
/*
OD
1
2
SCLK_S
R617 1
C64
0.1UF
VCC
1
1
U5
M24_THRM#
2
+3VS_ATI_TS
1
M24_SCL
16
R608
6.8KOhm
GND
16
R644
6.8KOhm
1
R46
2
0Ohm /*
ATI_OVERTEMP# 22,25
VGA_THERMDA 16
VGA_THERMDC 16
C54
1
(10/10/10 mil)
A
2
2200PF/10V
5
R646
6.8KOhm
2 0Ohm /*
2 0Ohm /*
1
6,12,13,14,21,36 SCL_3S
6,12,13,14,21,36 SDA_3S
2
2
R640 1
R628 1
Ext VGA: stuff
Int VGA: N/A
Reserved:
SMBus, Alert (ICH6): turn on FAN
Overtemp (ICH6): Windows Shutdown
2
R2.1
Place close to ASIC
bom
PROJECT: W3V
8
7
REVISION
2.1
DATE:
SHEET
6
19
OF
DESCRIPTION:
M24: STRAPING/THERMAL
63
5
4
<OrgName>
3
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
2
1
A
B
C
D
E
LVDS Connector
Ext VGA: 0 ohm
Int VGA: N/A
14" WXGA (AU/SS/CMO/CPT)
LVDS_CLKAM
LVDS_CLKAP
+3VS
R4
100KOhm
100KOhm
R2.0#18
22
PID1
2
R5
1
1KOhm
23
PID0
2
R9
1
1KOhm
LVDS_CLKBM
LVDS_CLKBP
+LCD_VCC
2
L17
+3VS
R1.1#6
1
1KOhm/100MHz
For EMI
33
31
34
1
35
32
36
2
WTOB_CON_30P
Ext VGA: N/A
Int VGA: stuff
C514
1
C49
1
1
C508
C46
2
2
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
/*
/*
/*
/*
2
1
C50
Do Not Stuff
0.1UF
/*
For EMI
8 EDID_CLK_GM
8 EDID_DAT_GM
3
3
G
G
1
1
Q84
2N7002
/*
D
S 2
D
S 2
+2.5VS
3
C515
2
R556
2.2KOhm
/*
2
R571
2.2KOhm
/*
1
Ext VGA: N/A
Int VGA: stuff
1
+3VS
2
2
4
6
8
1
3
5
7
2
4
6
8
2
4
6
8
LVDS_YB2M
LVDS_YB2P
R8
2
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
LVDS_YB1M
LVDS_YB1P
1
GND1
2
3 NP_NC1
34
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
35
27
28 NP_NC2
GND2
29
30
1
1
3
5
7
2
4
6
8
1
3
5
7
1
3
5
7
8 LVDS_YA0M_GM
8 LVDS_YA0P_GM
8 LVDS_YA1M_GM
8 LVDS_YA1P_GM
8 LVDS_YA2M_GM
8 LVDS_YA2P_GM
8 LVDS_CLKAM_GM
8 LVDS_CLKAP_GM
8 LVDS_YB0M_GM
8 LVDS_YB0P_GM
8 LVDS_YB1M_GM
8 LVDS_YB1P_GM
8 LVDS_YB2M_GM
8 LVDS_YB2P_GM
8 LVDS_CLKBM_GM
8 LVDS_CLKBP_GM
LVDS_YB0M
LVDS_YB0P
Ext VGA: stuff
Int VGA: N/A
2
2
LVDS_YA0M
LVDS_YA0P
LVDS_YA1M
LVDS_YA1P
LVDS_YA2M
LVDS_YA2P
LVDS_CLKAM
LVDS_CLKAP
LVDS_YB0M
LVDS_YB0P
LVDS_YB1M
LVDS_YB1P
LVDS_YB2M
LVDS_YB2P
LVDS_CLKBM
LVDS_CLKBP
/*
/*
/*
/*
/*
/*
/*
/*
/*
/*
/*
/*
/*
/*
/*
/*
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
LVDS_YA2M
LVDS_YA2P
Ext VGA: N/A
Int VGA: 0 ohm
RN21A
RN21B
RN21C
RN21D
RN23A
RN23B
RN23C
RN23D
RN22A
RN22B
RN22C
RN22D
RN24A
RN24B
RN24C
RN24D
0
LVDS_YA1M
LVDS_YA1P
0
1
RN3A
RN3B
RN3C
RN3D
RN6A
RN6B
RN6C
RN6D
RN5A
RN5B
RN5C
RN5D
RN7A
RN7B
RN7C
RN7D
PID0
1
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
PID1
2
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
2
1
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
LVDS_YA0M_ATI
LVDS_YA0P_ATI
LVDS_YA1M_ATI
LVDS_YA1P_ATI
LVDS_YA2M_ATI
LVDS_YA2P_ATI
LVDS_CLKAM_ATI
LVDS_CLKAP_ATI
LVDS_YB0M_ATI
LVDS_YB0P_ATI
LVDS_YB1M_ATI
LVDS_YB1P_ATI
LVDS_YB2M_ATI
LVDS_YB2P_ATI
LVDS_CLKBM_ATI
LVDS_CLKBP_ATI
1
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
CN4
LCD CABLE ID
LVDS_YA0M
LVDS_YA0P
LVDS_YA1M
LVDS_YA1P
LVDS_YA2M
LVDS_YA2P
LVDS_CLKAM
LVDS_CLKAP
LVDS_YB0M
LVDS_YB0P
LVDS_YB1M
LVDS_YB1P
LVDS_YB2M
LVDS_YB2P
LVDS_CLKBM
LVDS_CLKBP
LVDS_YA0M
LVDS_YA0P
Q88
2N7002
/*
3
16 EDID_CLK_ATI
16 EDID_DAT_ATI
R1.1#20
D
S 2
2 100Ohm
3
1
2
2 100Ohm
R22
G
1
+12VS
R2.0#1
R48
+3VS
D11
RB717F
+3V
S
4
5
6
Ext VGA: N/A
Int VGA: 0 ohm
7
32
1
2
2
R2.1
L8
400Ohm/100Mhz
1
L12
ADJ_BL
6
5
4
3
2
1
2
1KOhm/100MHz
+LCD_VCC
2
AC_INV
1
1
100PF
C34
0.1UF/25V
6 SIDE2
5
4
3
2
1 SIDE1
8
7
WTOB_CON_6P_INVERTER
C35
0.1UF/25V
2
0.1UF
C30
2
1
1
10UF/10V
C29
2
1UF/10V
C70
2
0.1UF
C69
1
1
1
0.01UF
C505
2
2 S
C495
4
INVERTOR
Connector
400Ohm/100Mhz
2
Q82
2N7002
G
L11
1KOhm/100MHz
CN3
2
D
1
16 LCD_VDD_EN_ATI
U28D
LV08A
For EMI
1
3
2
0Ohm /*
GND
100KOhm
1%
L21
R1.1#20
2
470KOhm
R51
R2.0/2.1
3900PF/50V
2
8 LCD_VDD_EN_GM
1
R534
1
R532
2 S
1
0Ohm
/*
C509
Q81
2N7002
G
Ext VGA: N/A
Int VGA: 0 ohm
D
1
2
1SS355
2
1
3
D37
1
2
R41
AC_BAT_SYS
AC_BAT_SYS
GND
(NC)
PWM/DC
EN
GND
(NC)
GND
GND
2
1
1
D
1
G
8 LCD_BACKEN_GM
R2.0#12
11
13
16 LCD_BACKEN_ATI
Q80
SI3456DV
AC_BAT_SYS
2
100Ohm
1
R573
1MOhm
3 1
R988
1
VCC
3
2
1
R533
10KOhm
12
22,25 BACK_OFF#
1
2
2
14
2
4
10
9
8
7
6
5
4
3
2
1
100KOhm
44,45,47 LID_SW#
+3VSUS
Inverter side pin define
+LCD_VCC
R951 1
1
Q9
2N7002
5
5
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
20
OF
63
DESCRIPTION:
LVDS / INVERTER
C
<OrgName>
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
D
E
A
B
Ext VGA: 0 ohm
Int VGA: N/A
Zo= 75 ohm
16
16
16
1
3
5
7
DAC_R_ATI
DAC_G_ATI
DAC_B_ATI
2
4
6
8
0Ohm
0Ohm
0Ohm
0Ohm
E
CRT Connector
place close to CRT
connector
DAC_R
DAC_G
DAC_B
RN1A
RN1B
RN1C
RN1D
D
R2.0#20
Ext VGA: 3.3PF/68nH/5PF
Int VGA: 10PF/47ohm@100MHz/22PF/47ohm@100MHz/10PF
16
Place near
CRT connector
C
1
D
1
2 S
G
DDC_DATA
DDC_CLK
1
DAC_BLUE
BLUE
DDCDA
HSYNC
DDCDA
13
HSYNC
14
VSYNC
15
DDCCL
1
R47
75Ohm
1%
R85
R45
1
1
C23
C15
2
47P
2
2
2
R60
2
C541
47P
7PF/50V
1
C549
2
3.3pf
7PF/50V
2
2
5P
1
1
C41
5P
2
3.3pf
C65
5P
C38
2
C44
2
3.3pf
1
1
1
C66
2
1
1
2
3.3pf
/*
12
17
D_SUB_15P3R
DDCCL
2
R35
75Ohm
1%
3.3pf
/*
11
VSYNC
0Ohm 0Ohm 0Ohm
3
2
2 S
R2.0#15
D3
BAV99
Q83
2N7002
1
Ext VGA: 75 ohm_1%
Int VGA: 150 ohm_1%
3
2
D2
BAV99
R668 2
R574 2
1 0Ohm
1 0Ohm
/*
/*
1
3
2
3
Ext VGA: N/A
Int VGA: 0 ohm
2
7
CVBS1
CVBS2
Y_CON
C_CON
4
6
C729
Y
C
5
NC
4
2
82P
1
3
1
2
82P
C730
1
1
0.1UF
/*
RN19A
RN19B
RN19C
RN19D
TV_C
TV_Y
TV_CVBS
8
1
1
2
1.8UH
82P
3
C751
82P
2
2
4
6
8
C750
2
0Ohm
0Ohm
0Ohm
0Ohm
1
2
D17
BAV99
1
C811
3
2
0.1UF
/*
TVDAC_A_GM
TVDAC_B_GM
TVDAC_C_GM
bom
PROJECT: W3V
1
3
5
7
R752
150Ohm
1%
1
16
TV_C_ATI
16
TV_Y_ATI
16 TV_CVBS_ATI
1
L105
2
+3VS
D21
BAV99
REVISION
DATE:
2.1
SHEET
B
21
OF
63
Ext VGA: N/A
Int VGA: 0
ohm
RN20A /* TV_CVBS
1
0Ohm 2
3
5
7
0Ohm
0Ohm
0Ohm
4 RN20B /*
6 RN20C /*
8 RN20D /*
DESCRIPTION:
TV_Y
TV_C
D20
BAV99
1
1
C813
GND0
GND1
MINI_DIN_7P
1
2
5
C721
0.1UF
3
2
+5V
2
+3VALWAYS
2
+3VS
2
CVBS_CON
BtoB_CON_20P
/*
8
8
8
A
2
1.8UH
1
1
R739
150Ohm
1%
SDA_3S 6,12,13,14,19,36
INT_SERIRQ 22,25,30,32,40
PM_CLKRUN# 22,25,30,32,37,39,40
LPC_DRQ#0 22,25,30
Zo= 50 ohm
5
CN25
1
2
1
L103
TV_C
0.1UF
/*
82P
9
82P
TV_Y
LPC_AD2 22,30,31,32,43
LPC_AD1 22,30,31,32,43
Ext VGA: 0 ohm
Int VGA: N/A
C812
TV Connector
C734
2
2
4
6
8
10
12
14
16
18
20
2
4
6
8
10
12
14
16
18
20
2
10KOhm
/*
CN29
1
1
21
23
25
27
22,25,30 PM_SUS_STAT#
1
3
5
7
9
11
13
15
17
19
P_GND1
NP_NC1
P_GND4
P_GND6
1
3
5
7
9
11
13
15
17
19
12 CLK_TPMPCI
22,30,31,32,43 LPC_FRAME#
6,8,22,23,28,30,31,32 BUF_PLT_RST#
22,30,31,32,43 LPC_AD3
+3VS
22,30,31,32,43 LPC_AD0
6,12,13,14,19,36 SCL_3S
+3VALWAYS
P_GND2
NP_NC2
P_GND3
P_GND5
22
24
26
28
R836
2
1.8UH
C733
HC2
1
L104
R746
150Ohm
1%
HC1
TV_CVBS
2
+5V
2
+3VALWAYS
Ext VGA: 82PF / 1.8uH / 82PF
Int VGA: 5.6PF / 150ohm@100MHz / 5.6PF
1
Place close to
TV connector
TPM B2B Connector
4
GREEN
2
120Ohm/100Mhz
2
120Ohm/100Mhz
2
120Ohm/100Mhz
2
120Ohm/100Mhz
C25
6
1
7
2
8
3
9
4
10
5
RED
2
0.068UH
2
0.068UH
2
0.068UH
2
R24
75Ohm
1%
3.3pf
/*
C45
1
1
D4
BAV99
D
1
Q107
2N7002
1
L24
1
L18
1
L9
DAC_GREEN
1
4.7KOhm
1
1
3
DAC_RED
2
0Ohm
2
0Ohm
2
0Ohm
1
R627
4.7KOhm
C52
2
1
R563
2.2KOhm
G
DDC2BD_GM
DDC2BC_GM
R636
2
2
2
3
1
1
0Ohm
/*
0.1UF
2
2
R575
DAC_IO_P
2
F01J4L
1
+2.5VS
1
D48
+5VS
C18
CN21
68nH
C73
1
1
+3VS
1
0Ohm
R656
2.2KOhm
8
8
+DAC_IO_P
2
G
Ext VGA: 0 ohm
Int VGA: 39 ohm
Ext VGA: +3VS
Int VGA: +2.5VS
3
VSYNC_CRT
2
0Ohm
+DAC_IO_P
2
R564
16 DDC2BD_ATI
16 DDC2BC_ATI
HSYNC_CRT
2
0Ohm
2
0Ohm
1
3
3
1
Q92
2N7002
1
L85
1
L83
1
L6
1
L4
2
D
S 2
D
Q90
2N7002
G
2
1
R593
DAC_B
1
VSYNC_5
1
L19
1
L10
1
L7
DAC_G
1
R622
1
R582
HSYNC_5
S 2
+12VS
DAC_R
DAC_G
DAC_B
/*
/*
/*
/*
2
16
DAC_R
RN17A
RN17B
RN17C
RN17D
1
16
2
4
6
8
0Ohm
0Ohm
0Ohm
0Ohm
2
1
3
5
7
DAC_R_GM
DAC_G_GM
DAC_B_GM
2
Zo= 50 ohm
8
8
8
82nH
1
Ext VGA: N/A
Int VGA: 0 ohm
CRT, TV, TPM CONN
C
<OrgName>
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
D
E
5
4
SATA_ICH_RXN0
SATA_ICH_RXP0
U30C
D
AD13
AG15
AE15
AC13
AB13
AB12
AF13
AE13
AB11
AD11
AC11
AE14
AD12
AF14
AF15
AD14
28 IDE_PDDACK#
28 IDE_PDDREQ
28 IDE_PDIOR#
28 IDE_PDIOW#
28 IDE_PIORDY
C
DD_15
DD_14
DD_13
DD_12
DD_11
DD_10
DD_9
DD_8
DD_7
DD_6
DD_5
DD_4
DD_3
DD_2
DD_1
DD_0
AB15
AB14
AE16
AC14
AF16
DDACK#
DDREQ
DIOR#
DIOW#
IORDY
28
28
28
IDE_PDA0
IDE_PDA1
IDE_PDA2
AC16
AB17
AC17
DA0
DA1
DA2
28
28
IDE_PDCS1#
IDE_PDCS3#
AD16
AE17
DCS1#
DCS3#
R355 1
R356 1
SATA_0RXN
SATA_0RXP
SATA_0TXN
SATA_0TXP
SATA_1RXN
SATA_1RXP
SATA_1TXN
SATA_1TXP
SATA_2RXN
SATA_2RXP
SATA_2TXN
SATA_2TXP
SATA_3RXN
SATA_3RXP
SATA_3TXN
SATA_3TXP
AE3
AD3
AG2
AF2
AC5
AD5
AF4
AG4
AD7
AC7
AF6
AG6
AC9
AD9
AF8
AG8
SATA_CLKN
SATA_CLKP
AC2
AC1
SATARBIAS#
SATARBIAS
AG11
AF11
2 0Ohm
2 0Ohm
SATA_ICH_HDD_RXN0 27
SATA_ICH_HDD_RXP0 27
2 0Ohm
2 0Ohm
SATA_ICH_BRIDGE_RXN0 26
SATA_ICH_BRIDGE_RXP0 26
2 0Ohm
1
1
R330 1
21,30,31,32,43
21,30,31,32,43
21,30,31,32,43
21,30,31,32,43
SATA_ICH_RXN2 28
SATA_ICH_RXP2 28
2 0Ohm
1
1
R370 1
20
T171
T170
SATA_ICH_TXN2
SATA_ICH_TXP2
PID1
1
3
5
7
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
T342
T341
33
38
CLK_PCIE_SATA# 12
CLK_PCIE_SATA 12
33Ohm
33Ohm
33Ohm
33Ohm
R423 1
R421 1
21,25,30 LPC_DRQ#0
21,30,31,32,43 LPC_FRAME#
12
25
EEP_DOUT
RN16A
RN16B
RN16C
RN16D
LDRQ_1#/GPIO41
P2
N3
N5
N4
LAD_0/FWH0
LAD_1/FWH1
LAD_2/FWH2
LAD_3/FWH3
2 33Ohm N6
2 33Ohm P3
ACZ_BCLK
ACZ_RST#
ACZ_SDIN0
ACZ_SDIN1
T375
ACZ_SDOUT
ACZ_SYNC
ACZ_SDIN0
ACZ_SDIN1
25 ACZ_SDOUT
25 ACZ_SYNC
CLK_ICH14
2
4
6
8
P4
1
LDRQ_0#
LFRAME#/FWH4
C10
A10
F11
F10
B10
C9
B9
E10
ACZ_BIT_CLK
ACZ_RST#
ACZ_SDIN_0
ACZ_SDIN_1
ACZ_SDIN_2
ACZ_SDOUT
ACZ_SYNC
CLK14
D12
F13
D11
B12
EE_CS
EE_DIN
EE_DOUT
EE_SHCLK
F12
B11
E12
E11
C13
C12
C11
E13
LAN_CLK
LAN_RSTSYNC
LAN_RXD_0
LAN_RXD_1
LAN_RXD_2
LAN_TXD_0
LAN_TXD_1
LAN_TXD_2
BMBUSY#/GPI6
GPI7
GPI8
SMBALERT#/GPIO11
GPI12
GPI13
STP_PCI#/GPO18
GPIO19
STP_CPU#/GPO20
GPIO21
GPIO23
GPIO24
GPIO25
GPIO27
GPIO28
CLKRUN#/GPIO32
GPIO33
GPIO34
CPUPWRGD/GPIO49
AD19
AE19
R1
W6
M2
R6
AC21
AB21
AD22
AD20
AD21
V3
P5
R3
T3
AF19
AF20
AC18
AG25
2 8.2KOhm
+3VS
MCH_SYNC#
PWRBTN#
RI#
AG21
U1
T2
R351 1
2 0Ohm
PM_BMBUSY# 8
FIR_SEL 25,30,31
EXTSMI#_3A 32
LID_ICH#_3A 47
KBDSCI_3 25,32
ATI_OVERTEMP# 19,25
STP_PCI# 12
1
R2.0#3
T389
STP_CPU# 12,49
BACK_OFF# 20,25
FWH_WP# 25,31
CB_SD# 25,40
ICH6_1HZ 25,43
PCB_VID0 25
PCB_VID1 25
PM_CLKRUN# 21,25,30,32,37,39,40
XIDE_EN#_3 28
OP_SD# 25,34
H_PWRGD 4
D
SATARBIAS_PN
T373
R373
24.9Ohm
1%
SMBCLK
SMBDATA
1
U30D
PLACE CLOSELY TOGETHER
SATA_ICH_TXN0
SATA_ICH_TXP0
R331 1
2
2
IDE_PDD15
IDE_PDD14
IDE_PDD13
IDE_PDD12
IDE_PDD11
IDE_PDD10
IDE_PDD9
IDE_PDD8
IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0
/*
/*
Y4
W5
1
EE_DOUT: Internal weak PU
EE_CS: Internal weak PD
1
28 IDE_PDD[0..15]
3
R354 1
R357 1
SCL_3A
SDA_3A
Install R315 for future CPU deeper
sleep function.
25,36
25,36
SLP_S3#
SLP_S4#
SLP_S5#
H_CPUSLP# R365 : B-STEP no stuff
H_DPRSTP# R372 : A-STEP no stuff
T4
T5
T6
MCH_SYNC# 25
PM_PWRBTN# 47
PM_RI#
25
1
C
PM_SUSB# 33,34,40,43,47,54,57
PM_SUSC# 43,44,47,48,57
T349
PM_SUS_STAT# 21,25,30
AB16
25,28 INT_IRQ14
IDEIRQ
R1.1#17
RTC_X1
1
4
X2
Y1
32.768KHZ
R382
Y5
W4
U6
AC19
AF17
AE18
AF18
AG18
AA3
LINKALERT# 25
SM_LINK0 25,36
SM_LINK1 25,36
1
+VCCP
R367
SATALED# 28
SATA_DET_#0 25,27
4
H_FERR#
PCB_VID2 25
SATA_DET_#2 25,28
AGP_EXT 25
1
+VCC_RTC
1MOhm
2
R376
2
X1
GND1GND2
2
SATALED#
SATA_0GP/GPI26
SATA_1GP/GPI29
SATA_2GP/GPI30
SATA_3GP/GPI31
INTRUDER#
10MOhm
1
3
1
2
C353 12P
1
2
C356 12P
LINKALERT#
SMLINK_0
SMLINK_1
RTC_X2
B
RSMRST#
Y3
RTCX1
Y1
32
HA20GATE
4
H_A20M#
4,7 H_CPUSLP#
49 PM_DPRSLPVR
4
H_DPRSTP#
4
H_DPSLP#
4
H_IGNNE#
31 FWH_INIT#
2
4
H_INIT#
56Ohm
4
H_INTR
4
H_NMI
32 KBDCPURST
21,25,30,32,40 INT_SERIRQ
4
H_SMI#
4
H_STPCLK#
6 H_THRMTRIP#
R365 1
2
R372 1
R364 1
2
2
R371 1
2
R366 1
2
R368 1
2
AF22
AF23
0Ohm AE27
AE20
0Ohm AE24
0Ohm AD27
AG26
AE22
AF27
AG24
56Ohm AF24
AF25
AD23
AB20
0Ohm AG27
AE26
0Ohm AE23
A20GATE
A20M#
CPUSLP#
DPRSLPVR/TP_1 SUS_STAT#/LPCPD#
DPRSLP#/TP_2
SUSCLK
DPSTP#
IGNNE#
SYS_RESET#
INIT3_3V#
INIT#
LAN_RST#
INTR
FERR#
BATLOW#
NMI
RCIN#
TP_3
SERIRQ
SMI#
STPCLK#
THRMTRIP#
+3VALWAYS
RTC_X2
3
RTC_BAT
1
R378
2
1KOhm
1
1
R332
2
R333
F8
J3
1
2
C336
1
3900PF/50V 2
C334
A
1
3900PF/50V
/*
1
3900PF/50V
RTC CMOS
CLEAR
SATA_HDD_RXN0 27
SATA_HDD_RXP0 27
/*
C349
ACZ_SYNC
0.1U
X7R
ACZ_RST#
ACZ_SDOUT
ACZ_BCLK
SATA_BRIDGE_RXN0 26
SATA_BRIDGE_RXP0 26
2
PLACE CLOSELY TOGETHER
SATA_ICH_TXN2
SATA_ICH_TXP2
2
C333
1
3900PF/50V 2
C332
1
3900PF/50V
+3VSUS
2
0Ohm /*
2
0Ohm
H_DBRESET# 4,6
LAN_RST#
1
R397
1
R391
V5
ITP: Stuff
No ITP: N/A
BUF_PLT_RST# 6,8,21,23,28,30,31,32
V2
PM_BATLOW# 25
U3
TP3
1
R393
25
2
10KOhm
D25
RB715F
AF21
THRM#
AC20
WAKE#
U5
PWROK
AA1
PM_VGATE
R369 1
2 0Ohm
ICH6_PWROK
C345
1UF/10V
SATA_SWAP_RXN2 28
SATA_SWAP_RXP2 28
C430
10PF
/*
1
R450
1
R467
1
R470
1
R465
2
39Ohm
2
39Ohm
2
39Ohm
2
39Ohm
ACZ_SYNC_AUD
1
R451
1
R449
1
R452
1
R466
2
39Ohm
2
39Ohm
2
39Ohm
2
39Ohm
ACZ_SYNC_MDC
33
ACZ_RST#_AUD 33,34
ACZ_SDOUT_AUD 33
R419 2
1 1KOhm
+3VSUS
2
R388
ICH6_PWROK
1
0Ohm
ICH6_PWROK 45
1
R390
2
0Ohm /*
POWERGD 54
ICH6_M
ACZ_BCLK_AUD 33
38
A
ACZ_RST#_MDC 38
ACZ_SDOUT_MDC 38
ACZ_BCLK_MDC 38
bom
PROJECT: W3V
5
REVISION
DATE:
2.1
SHEET
4
B
PM_THRM# 6,19,25
T390
DELAY 18~25ms
1
1
3900PF/50V 2
/*
C335
2
10KOhm
U2
VRMPWRGD
ICH_SPKR 25,33
2
2
C337
1
R402
180KOhm
2
ICH6_M
SATA_ICH_TXN0
SATA_ICH_TXP0
SUSCLK
2
1
2
10KOhm
1
0Ohm /*
1
SPKR
V6
2
AA5
1
INTVRMEN
R379
+VCC_RTC
2
AA2
1MM_OPEN_5MIL
RTCRST#
RTC_RST#
1
46
1
+VCC_RTC
Unused SATA pin
- Connect RX, RBIAS, CLK
to GND
- Leave TX, LED# as NC
SYS_RESET# 45
W3
+VCC_RTC
2
1
Y2
T348
PM_RSMRST# 45
RTC_X1
T367
RTCX2
1
22
OF
63
DESCRIPTION:
ICH6: SATA/LPC/IDE/ACZ(1) RELEASE DATE :
3
2
<OrgName>
DESIGN ENGINEER :
Alice Shih
1
5
4
3
2
1
U30A
PCI_AD[0..31] 37,39,40
37,39,40 PCI_PAR
25,37,39,40 PCI_DEVSEL#
12 CLK_ICHPCI
R1.1#14
D
PLT_RST#_SB R949 1
2 33Ohm
25,37,39,40 PCI_IRDY#
25,37,39,40 PCI_PME#
25,37,39,40 PCI_SERR#
25,37,39,40 PCI_STOP#
25 PCI_LOCK#
25,37,39,40 PCI_TRDY#
25,37,39,40 PCI_PERR#
25,37,39,40 PCI_FRAME#
37 PCI_GNT#0
40 PCI_GNT#1
T185
39 PCI_GNT#3
T369
25 GPO17
25 GPO16
25,37
25,40
25
25,39
20
25,32
25,32
C
E1
C3
G6
PCI_RST#_ICH R2
PLT_RST#_SB1 R5
A3
P6
G5
J1
C5
J2
E3
J3
PAR
DEVSEL#
PCICLK
PCIRST#
PLTRST#
IRDY#
PME#
SERR#
STOP#
PLOCK#
TRDY#
PERR#
FRAME#
C1
B6
1 PCI_GNT#2 F1
C8
1
E7
F6
D8
GNT_0#
GNT_1#
GNT_2#
GNT_3#
GNT_4#/GPIO48
GNT_5#/GPIO17
GNT_6#/GPIO16
L5
B5
M5
B8
F7
E8
B7
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PID0
KBDDT1
KBDDT0
AD_0
AD_1
AD_2
AD_3
AD_4
AD_5
AD_6
AD_7
AD_8
AD_9
AD_10
AD_11
AD_12
AD_13
AD_14
AD_15
AD_16
AD_17
AD_18
AD_19
AD_20
AD_21
AD_22
AD_23
AD_24
AD_25
AD_26
AD_27
AD_28
AD_29
AD_30
AD_31
REQ_0#
REQ_1#
REQ_2#
REQ_3#
REQ_4#/GPIO40
REQ_5#/GPIO1
REQ_6#/GPIO0
E2
E5
C2
F5
F3
E9
F2
D6
E6
D3
A2
D2
D5
H3
B4
J5
K2
K5
D4
L6
G3
H4
H2
H5
B3
M6
B2
K6
K3
A5
L1
K4
U30B
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
8
8
T25
T24
R27
R26
V25
V24
U27
U26
Y25
Y24
W27
W26
AB24
AB23
AA27
AA26
DMI_RXN0
DMI_RXP0
8
8
8
8
DMI_TXN0
DMI_TXP0
8
8
DMI_TXN1
DMI_TXP1
8
8
DMI_TXN2
DMI_TXP2
8
8
DMI_TXN3
DMI_TXP3
DMI_RXN1
DMI_RXP1
8
8
DMI_RXN2
DMI_RXP2
8
8
DMI_RXN3
DMI_RXP3
T184
T182
T364
T365
T359
T356
N2
L2
M1
L3
D9
C7
C6
M3
25,40 PCI_INTA#
25,39,40 PCI_INTB#
25,37,39,40 PCI_INTC#
25,39 PCI_INTD#
25 PCI_INTE#
25 PCI_INTF#
25 PCI_INTG#
25 PCI_INTH#
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
T354
T351
1
1
1
1
1
1
1
1
USBP_0N
USBP_0P
USBP_1N
USBP_1P
USBP_2N
USBP_2P
USBP_3N
USBP_3P
USBP_4N
USBP_4P
USBP_5N
USBP_5P
USBP_6N
USBP_6P
USBP_7N
USBP_7P
C21
D21
A20
B20
D19
C19
A18
B18
E17
D17
B16
A16
C15
D15
A14
B14
OC_0#
OC_1#
OC_2#
OC_3#
OC_4#/GPIO9
OC_5#/GPIO10
OC_6#/GPIO14
OC_7#/GPIO15
C27
B27
B26
C26
C23
D23
C25
C24
DMI_0RXN
DMI_0RXP
DMI_0TXN
DMI_0TXP
DMI_1RXN
DMI_1RXP
DMI_1TXN
DMI_1TXP
DMI_2RXN
DMI_2RXP
DMI_2TXN
DMI_2TXP
DMI_3RXN
DMI_3RXP
DMI_3TXN
DMI_3TXP
H25
H24
G27
G26
K25
K24
J27
J26
M25
M24
L27
L26
P24
P23
N27
N26
HSIN_0
HSIP_0
HSON_0
HSOP_0
HSIN_1
HSIP_1
HSON_1
HSOP_1
HSIN_2
HSIP_2
HSON_2
HSOP_2
HSIN_3
HSIP_3
HSON_3
HSOP_3
F24
F23
DMI_ZCOMP
DMI_IRCOMP
USB_PN5
USB_PP5
USB_PN6
USB_PP6
USB_PN7
USB_PP7
USB_PN0
USB_PP0
USB_PN1
USB_PP1
USB_PN2
USB_PP2
USB_PN3
USB_PP3
USB_PN4
USB_PP4
T376
T190
T374
T370
T378
T377
1
1
1
1
1
1
D
R1.1#10
for Express Card
USB_OC#0 25,29
USB_OC#12 25,29
USB_OC#3 25
1
D29
USB_OC#45 25
GPI14
25
CHG_EN# 54,55
2
1SS355
CHG_EN#_OC 25
B22 USBRBIAS
A22
USBRBIAS
USBRBIAS#
29
29
29
29
29
29
38
38
40
40
1
R464
1
T391
2
22.6Ohm
1%
C
Place within 500
mils of ICH.
+1.5VS
C_BE_3#
C_BE_2#
C_BE_1#
C_BE_0#
G2
G4
H6
J6
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
1
R436
37,39,40
37,39,40
37,39,40
37,39,40
2
24.9Ohm
1%
A27
CLK48
CLK_USB48 12
Place within 500 mils of ICH.
AD25
AC25
12 CLK_PCIE_ICH#
12 CLK_PCIE_ICH
B
DMI_CLKN
DMI_CLKP
B
ICH6_M
ICH6_M
C324
VCC
28,37,39,40 PCI_RST#
1
R984
2
33Ohm
VCC
PCI_RST#_ICH
16
3
GND
+3V
U28A
LV08A
1
GND
2
R358 1
2 47KOhm
10
PLT_RST#_SB
SW_RST# 30
Ext VGA: stuff
Int VGA: N/A
C325
7
7
R2.0#7
PLT_RST#
U28C
LV08A
9
8
1
1
14
0.1UF
14
2
+3V
1
2
0.1UF/25V
C302
14
2
1
R983
2
100Ohm
VCC
PCI_RSTNS# 32,37
6,8,21,22,28,30,31,32 BUF_PLT_RST#
R2.0#6
0.01UF
U28B
LV08A
4
1
R295
6
GND
PLT_RST#_SB
2
0Ohm
2
2
Can be issue SCI or SMI List: GPIO0~GPIO15
Resume Power Well GPIO List: GPIO8,11,13,14,15,24,25,27,28
Only GPI Pin: GPI0~8,11~15,26,29,30,31,40(5V),41
Only GPO Pin: GPIO16~17,19,21,23,48
Can be GPIO: GPIO24,25,27,28,33,34
5
1
4
SN74LVC1G32
2
47KOhm
C314
A
VCC
B
GND
Y
5
C303
7
1
R328
A
2
10KOhm
1
1
R329
32 SET_PCIRSTNS#
1
2
3
R1.1#36
+3V
0.1UF
U26
PCI_RST#
0.01UF
/*
Resume Power Input Pin List: BATLOW#,AC_SDIN[0:1],LAN_RST#,
OC[7:0]#,PME#,PWRBTN#,RI#,SMBALERT#,SYS_RESET#,USBRBIAS#
bom
PROJECT: W3V
5
REVISION
DATE:
2.1
SHEET
4
23
OF
63
DESCRIPTION:
ICH6: PCI/DMI/USB/PCIE(2) RELEASE DATE :
3
2
<OrgName>
DESIGN ENGINEER :
Alice Shih
1
A
4
3
0.1UF
C427
0.1UF
Place near PIN A13
2
2
1UF/10V
2
0Ohm
A13
F14
G13
G14
A11
U4
V1
V7
W2
Y7
A17
B17
C16
C17
D16
E16
F15
F16
F18
G15
G16
G17
G18
A24
0.1UF
B
+VCCPSUS
2
1
1
R455
+3VSUS
C429
0Ohm
Place near PIN V7
0.1UF
2
Place near PIN A8
+3.3VA_ICH
0Ohm
1
D28
1
C348
C423
0.1UF
2
C347
1
1
+VCC_RTC
F01J4L
2
0.1UF
2
V5REF_SUS
0.1UF
A
Place near PIN F21
+1.5VS
1
R457
2
0Ohm
C376
0.1UF
2
2
0.1UF
1
C371
0.1UF
1
2
VCCSUS1_5_A
U7
VCCSUS1_5_B
+1.5VA_USB G19
VCCSUS1_5_C
+1.5VS_LAN
2
C419
G10
VCCSUS1_5_D
G11
VCCSUS1_5_E
1
0.1UF
bom
PROJECT: W3V
5
REVISION
DATE:
2.1
SHEET
4
24
OF
63
1
2
+1.5VS_SATAPLL
A25
+1.5VS_USBPLL
VCC1_5_1
VCC1_5_2
VCC1_5_3
VCC1_5_4
VCC1_5_5
VCC1_5_6
VCC1_5_7
VCC1_5_8
VCC1_5_9
VCC1_5_10
VCC1_5_11
VCC1_5_12
VCC1_5_13
VCC1_5_14
VCC1_5_15
VCC1_5_16
VCC1_5_17
VCC1_5_18
VCC1_5_19
VCC1_5_20
VCCRTC
R7
C391
2
0.1UF
2
0Ohm
/*
1
1
R846
2
2
1UF/10V
AB3
C409
1
1
1
+1.5VSUS
C412
VCCSUS3_3_1
VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4
VCCSUS3_3_5
VCCSUS3_3_6
VCCSUS3_3_7
VCCSUS3_3_8
VCCSUS3_3_9
VCCSUS3_3_10
VCCSUS3_3_11
VCCSUS3_3_12
VCCSUS3_3_13
VCCSUS3_3_14
VCCSUS3_3_15
VCCSUS3_3_16
VCCSUS3_3_17
VCCSUS3_3_18
VCCSUS3_3_19
VCCSUS3_3_20
VCCSUS3_3_21
VCCSUS3_3_22
VCCSUS3_3_23
VCCSUS3_3_24
2
2
0.1UF
+3.3VA_ICH
R442
10Ohm
C426
2
0.1UF
2
+3VSUS
1
+5VSUS
C425
1
2
1
1
R475
+3VSUS
Place BOTH
within 100mils of
ICH near pin A17
AE1
VCCUSBPLL
+
CE16
C327
150U/4.0V
0.1UF
C434
1
+1.5VS
C331
0.1UF
0.1UF
2
AA22
AA23
AA24
AA25
AB25
AB26
AB27
F25
F26
F27
G22
G23
G24
G25
H21
H22
J21
J22
K21
K22
L21
L22
M21
M22
N21
N22
N23
N24
N25
P21
P25
P26
P27
R21
R22
T21
T22
U21
U22
V21
V22
W21
W22
Y21
Y22
1
VCCDMIPWR1
VCCDMIPWR2
VCCDMIPWR3
VCCDMIPWR4
VCCDMIPWR5
VCCDMIPWR6
VCCDMIPWR7
VCCDMIPWR8
VCCDMIPWR9
VCCDMIPWR10
VCCDMIPWR11
VCCDMIPWR12
VCCDMIPWR13
VCCDMIPWR14
VCCDMIPWR15
VCCDMIPWR16
VCCDMIPWR17
VCCDMIPWR18
VCCDMIPWR19
VCCDMIPWR20
VCCDMIPWR21
VCCDMIPWR22
VCCDMIPWR23
VCCDMIPWR24
VCCDMIPWR25
VCCDMIPWR26
VCCDMIPWR27
VCCDMIPWR28
VCCDMIPWR29
VCCDMIPWR30
VCCDMIPWR31
VCCDMIPWR32
VCCDMIPWR33
VCCDMIPWR34
VCCDMIPWR35
VCCDMIPWR36
VCCDMIPWR37
VCCDMIPWR38
VCCDMIPWR39
VCCDMIPWR40
VCCDMIPWR41
VCCDMIPWR42
VCCDMIPWR43
VCCDMIPWR44
VCCDMIPWR45
VCC3_3_1
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6
VCC3_3_7
VCC3_3_8
VCC3_3_9
VCC3_3_10
VCC3_3_11
VCC3_3_12
VCC3_3_13
VCC3_3_14
VCC3_3_15
VCC3_3_16
VCC3_3_17
VCC3_3_18
VCC3_3_19
VCC3_3_20
VCC3_3_21
VCC3_3_22
AC27
2
VCCDMIPLL
C428
2
1
R476
C431
2
1
C443
1
+3.3VS_LAN
+3VS
1
V5REF
10UF/10V
Place 150uF, 3 X 0.1uF
within 100mils of ICH near
pin F27, P27, AB27
R375
+1.5VS_SATAPLL
1
1
F01J4L
+1.5VS
C322
0Ohm
C344
2
0.1UF
2
0.1UF
2
120Ohm/100Mhz
C342
0.1UF
/*
2
+1.5VS
2
+1.5VS
R463
+1.5VS_USBPLL
C422
1
1
C402
1
1
C329
2
0.1UF
2
2
100Ohm
1
1
C398
2
0.1UF
2
1
C413
1
0Ohm
0.01UF
2
2
0.1UF
0.1UF
VCCSATAPLL
2
1
1
C416
2
2
0.1UF
D31
R479
1
C330
+3VS
1
+5VS
0.1UF
2
Place 0.1uFx1 near AG10
Place 0.1uFx1 near E26, E27
Place 0.1uFx2 near AG13, AG16
Place 0.1uFx3 near A2~A6, D1~H1
C433
1
1
C323
T393
1
0.01UF
PCI_IDE_CORE
10UF/10V
V5REF_SUS
C328
L55
0.1UF
AA12
AA14
AA15
AA17
AC15
AD17
AG13
AG16
AG19
A6
B1
E4
H1
H7
J7
L4
L7
M7
P1
E26
AA10
AG10
F21
VCCDPLL
+3VS
C
+2.5VS
1
V_CPU_IO_1
V_CPU_IO_2
V_CPU_IO_3
V5REF_SUS
A1
A12
A15
A19
A21
A23
A26
A4
A7
A9
AA11
AA13
AA16
AA4
AB1
AB10
AB19
AB2
AB7
AB9
AC10
AC12
AC22
AC23
AC24
AC26
AC3
AC6
AD1
AD10
AD15
AD18
AD2
AD24
AD6
AE10
AE11
AE12
AE2
AE21
AE25
AE6
AE7
AF1
AF12
AF26
AF3
AF7
AG1
AG12
AG14
AG17
AG20
AG22
AG3
AG7
B13
B15
B19
B21
B23
B25
C14
C18
C20
C22
C4
D1
D10
D13
D14
D18
D20
D22
D7
E14
E15
E18
E19
E25
F17
F19
F22
F4
G1
G12
+2.5VS_PCI_IDE
2
AB22
AD26
AG23
AB18
P7
1
Place 0.1uF within 100mils
of ICH near pin AG23
C339
VCC2_5_1
VCC2_5_2
U30F
2
1
+VCCP
A8
AA18
1
2
2
0.1UF
V5REF1
V5REF2
2
C380
0.1UF
1
C420
1
USB_CORE
Place BOTH
within 100mils of
ICH near pin D27
VCC1_5_21
VCC1_5_22
VCC1_5_23
VCC1_5_24
VCC1_5_25
VCC1_5_26
VCC1_5_27
VCC1_5_28
VCC1_5_29
VCC1_5_30
VCC1_5_31
VCC1_5_32
VCC1_5_33
VCC1_5_34
VCC1_5_35
VCC1_5_36
VCC1_5_37
VCC1_5_38
VCC1_5_39
VCC1_5_40
VCC1_5_41
VCC1_5_42
VCC1_5_43
VCC1_5_44
VCC1_5_45
VCC1_5_46
VCC1_5_47
VCC1_5_48
VCC1_5_49
VCC1_5_50
VCC1_5_51
VCC1_5_52
+1.5VS_SATA
AA6
AB4
AB5
AB6
AC4
AD4
AE4
AE5
AG5
AF5
AA7
AA8
AA9
AB8
AC8
AD8
AE8
AE9
AF9
AG9
ICH6_M
G21
G7
G9
H23
H26
H27
J23
J24
J25
J4
K1
K23
K26
K27
K7
L13
L15
L23
L24
L25
M12
M13
M14
M15
M16
M23
M26
M27
M4
N1
N11
N12
N13
N14
N15
N16
N17
N7
P12
P13
P14
P15
P16
P22
R11
R12
R13
R14
R15
R16
R17
R23
R24
R25
R4
T1
T12
T13
T14
T15
T16
T23
T26
T27
T7
U13
U15
U23
U24
U25
V23
V26
V27
V4
W1
W23
W25
W7
Y23
Y26
Y27
Y6
W24
E27
B24
AF10
D
C
B
ICH6_M
0.1UF
C346
0.1UF
Place within
100mils of ICH
near pin AG5
Place within
100mils of ICH
near pin AG9
ICH6: PWR/GND/CAPS(3) RELEASE DATE :
3
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
C400
1.5VS: 2.355A
2.5VS: 15mA
3VS:
243mA
3VSUS: 23mA
1.5VSUS: 170mA
5VSUS: 10mA
VCCP: 14mA
RTC: 5uA
DESCRIPTION:
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
+1.5VS
1
Place 4X0.1uF
Distribute near
pin ICH6
Package edge
D
1
T392
2
1
0.1UF
AA19
AA20
AA21
L11
L12
L14
L16
L17
M11
M17
P11
P17
T11
T17
U11
U12
U14
U16
U17
G8
D24
D25
D26
D27
E20
E21
E22
E23
E24
F20
G20
F9
V5REF 1
1
0.1UF
C408
2
0.1UF
1
1
C432
2
0.1UF
2
0.01UF
C396
2
C374
1
C338
1
+1.5VS
2
Place 0.01uF
within 100mils of
ICH near pin AA19
2
U30E
ICH6_CORE
2
5
2
Power Seq.
+1.8V rise time < 2ms
+1.5VS --> +VCCP
+5VS --> +3VS --> +2.5VS
+5VSUS --> +3VSUS --> +1.5VSUS
VCCRTC --> RTCRST# > 5ms
+3VALWAYS --> RSMRST# > 5ms
+3VALWAYS --> LAN_RST# > 10ms
+3VS(LAN) --> LAN_RST# > 10ms
+3VS,+1.5VS --> PWROK,PM_VATE > 99ms
<OrgName>
DESIGN ENGINEER :
M.Y.
1
A
5
4
3
2
1
+3VS
+3VSUS
+3VS
2
23,37,39,40 PCI_TRDY#
3
23,37,39,40 PCI_STOP#
4
23,37,39,40 PCI_SERR#
6
23,37,39,40 PCI_DEVSEL#
7
23,37,39,40 PCI_PERR#
8
D
23
9
PCI_LOCK#
1
21,22,30,32,40 INT_SERIRQ
6,19,22 PM_THRM#
2
23,37 PCI_REQ#0
3
23,40 PCI_REQ#1
4
23
PCI_REQ#2
6
23,39 PCI_REQ#3
7
8
C
22,32 KBDSCI_3
9
23,39 PCI_INTD#
1
23,37,39,40 PCI_INTC#
2
23,40 PCI_INTA#
3
23,39,40 PCI_INTB#
6
22,27 SATA_DET_#0
8
22,28 SATA_DET_#2
1
3
22 MCH_SYNC#
6
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
RP3A
22
RP3B
R469 2
RP3C
RP3D
B
1
22
PM_RI#
2
23 CHG_EN#_OC
3
23,29 USB_OC#12
4
23
USB_OC#45
6
23
USB_OC#3
7
8
19,22 ATI_OVERTEMP#
23
9
GPI14
10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10
10KOhm5
10
C441
RP3F
RP3G
R468 2
1 10KOhm
/*
RP6B
R409 2
1 10KOhm
/*
TP3
0
0
0
MB R1.1
0
0
0
MB R2.0
0
0
1
MB R2.1
0
1
0
22,36
SDA_3A
R386 1
2 2.2KOhm
1
3
5
7
10KOhm
10KOhm
10KOhm
10KOhm
2
4
6
8
RN15A
RN15B
RN15C
RN15D
23,37,39,40 PCI_PME#
R412 2
1 10KOhm
22,43 ICH6_1HZ
R931 2
1 10KOhm
RP6F
+3VS
RP6G
RP6H
INTERNAL PULL-DOWN
PULL-UP : NO REBOOT
RP4A
RP4B
R473 1
+3VS
2 1KOhm
/*
ICH_SPKR 22,33
RP4C
RP4E
RP4G
R474 1
2 1KOhm
/*
KBDDT0
23,32
KBDDT1
23
PCI_INTE#
23
PCI_INTF#
23
PCI_INTG#
23
PCI_INTH#
EEP_DOUT 22
RP2A
INTERNAL PULL-UP
PULL-DOWN : RESERVED
RP2C
23,32
RP2E
21,22,30,32,37,39,40 PM_CLKRUN#
R448 1
22,28 INT_IRQ14
2 1KOhm
/*
GPO17
23
GPO16
23
RP4D
4
RP4F
7
RP4H
9
RP2B
2
RP2D
4
RP2F
7
RP2G
8
RP2H
9
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
8.2KOhm5
10
C
INTERNAL PULL-UP
PULL-DOWN : Boot BIOS destination select
RP5A
RP5B
RP5C
R480 1
2 1KOhm
/*
RP5D
+3VS
INTERNAL PULL-UP
PULL-DOWN :TOP-BLOCK SWAP
RP5E
20,22 BACK_OFF#
R359 2
1 10KOhm
/*
R415 1
2 4.7KOhm
/*
21,22,30 LPC_DRQ#0
R424 1
2 8.2KOhm
/*
RP5F
B
RP5G
RP5H
+3VS
1
AC_BITCLK, AC_RST# , AC_SDIN[2:0] ,
AC_SDOUT , AC_SYNC , DPSLPVR ,
LAN_CLK , PDD[7] , PDDREQ , SPKR ,
USB[7:0][P,N]
R341
100KOhm
100KOhm
/*
22,30,31 FIR_SEL
22,31 FWH_WP#
2
INTERNAL PULL-UP SIGNALS :
EE_DIN , EE_DOUT , EE_CS ,
GPIO[17:16] , LAD[3:0]# ,
LDRQ[0:1] , LAN_RXD[2:0] ,
PME# , PWRBTN# , TP3 ,
SATALED# ,
GNT[4:0]
1
1
2
R417
100KOhm
/*
R420
R418
R342
10KOhm
10KOhm
/*
10KOhm
22
AGP_EXT
22,34
OP_SD#
1
R308
2
R325
2
R302
2
R304
2
100KOhm
1
100KOhm
1
10KOhm
1
10KOhm
A
2
MB R1.0
2 2.2KOhm
22
RP6E
PCB_VID0
2
A
PCB_VID1
R401 1
22,36 SM_LINK0
22,36 SM_LINK1
22 PM_BATLOW#
22,40
CB_SD#
INTERNAL PULL-UP
PULL-DOWN : PCI Express Port chain test
RP6D
2
PCB_VID2
SCL_3A
RP6C
1
1
PCB_VID0
PCB_VID1
PCB_VID2
22,36
ACZ_SYNC 22
RP6A
R422
2
PCB_VID0
PCB_VID1
PCB_VID2
1 10KOhm
D
RP3H
+3VSUS
1
22
22
22
R385 2
0.1UF
INTERNAL PULL-DOWN SIGNALS :
R2.1
LINKALERT#
ACZ_SDOUT 22
INTERNAL PULL-DOWN
PULL-UP : PCI Express Port config bit 0
+3VSUS
23,29 USB_OC#0
1 10KOhm
/*
+3VS
RP3E
1
1
23,37,39,40 PCI_IRDY#
2
23,37,39,40 PCI_FRAME#
INTERNAL PULL-DOWN
PULL-UP : PCI Express Port config bit 1
bom
PROJECT: W3V
5
REVISION
DATE:
2.1
SHEET
4
25
OF
63
DESCRIPTION:
ICH6M:Res & Straps
3
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
2
1
A
B
IDE_BDD[0:15]
IDE_BDA[0:2]
IDE_BDCS0#
IDE_BDCS1#
D
+3VS
+3VS
1
0.1UF
C389
0.1UF
1
C358
C372
0.1UF
C357
0.1UF
2
0.1UF
1
C390
C382
0.1UF
0.1UF
1
2
0.1UF
2
120Ohm/100Mhz
FOR SIL3811
2
1
1
1
C375
2
0Ohm
1
C377
C378
2
2
1
2
R435
1
L112
2
+1.8VS
STP_PIN39
STP_PIN38
ODCS
STP_PIN36
STP_PIN35
STP_PIN34
STP_PIN33
2
IDE_BDCS0#
IDE_BDCS1#
R426
0Ohm
+1.8VS
1
+3VS
2
T358
2
10KOhm
/*
+3VS
L111
120Ohm/100MHz
/*
1
2
1
FOR
88SA8040
R431
2
10KOhm
/*
1
+3VS +1.8VS
1
R434
1
1
E
+3VS
1
27
27
27
27
C
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
2
0.1UF
27 IDE_BINTRQ
27 IDE_BDMACK#
27 IDE_BIORDY
IDE_BDD15
IDE_BDD0
IDE_BDD14
IDE_BDD1
1
2
TXP
TXN
GNDA2
VDDA2
RXN
RXP
REXT
GNDA1
VDDA1
XTALO
XTALI/CLKI
DD_DISABLE_b
IOINSEL1
IOINPIN
IOINSEL0
SYS_RESET_b
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
SATA_BRIDGE_TXP0
SATA_BRIDGE_TXN0
2
C386
1
3900PF/50V
2
C384
1
3900PF/50V
XO_STP
XI_STP
STP_DISABLE#
IOINSEL1
IOINPIN
IOINSEL0
IDERST#_5
2 1KOhm
1%
Sil3811 -1K;
88SA8040 -12.1K
2
R850
0Ohm
XO_STP
R416
1
+3VS
10MOhm
2
XI_STP
X4
1
2
2
25Mhz
C350
18P
SII3811CNU
C354
18P
1
3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
R844
0Ohm
2
SATA_BRIDGE_RXN0 22
SATA_BRIDGE_RXP0 22
R849 1
1
SATA_ICH_BRIDGE_RXP0 22
SATA_ICH_BRIDGE_RXN0 22
IDE_DD13
IDE_DD02
IDE_DD12
VDDO_2
IDE_DD03
IDE_DD11
IDE_DD04
VSS2
VDDI_2
IDE_DD10
IDE_DD05
IDE_DD09
IDE_DD06
IDE_DD08
IDE_DD07
IDE_RESET_b
27 IDE_BDIOR#
27 IDE_BDIOW#
27 IDE_BDMARQ
IDE_DA2
IDE_DA0
IDE_DA1
VDDO_1
IDE_INTRQ
IDE_DMACK_b
IDE_IORDY
VDDI_1
VSS1
IDE_DIOR_b
IDE_DIOW_b
IDE_DMARQ_b
IDE_DD15
IDE_DD00
IDE_DD14
IDE_DD01
GND
2
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
IDE_CS0_b
IDE_CS1_b
VSS4
Reserved1
VDDO_3
Reserved2
VSS3
VDDI_3
Reserved3
Reserved4
Reserved5
ODCS
Reserved6
Reserved7
Reserved8
Reserved9
IDE_BDA2
IDE_BDA0
IDE_BDA1
2
1
U29
+1.8VS
3
+1.8VS
+3VS
+3VS
R841
2
R396
IOINPIN
R847
IOINSEL1
IDERST#_5 28
10KOhm
/*
2
IDERST#_5
IOINSEL0
2
2
R400
10KOhm
/*
1
3
1
10KOhm
/*
2
10KOhm
/*
2
IDE_BRST#
2
0Ohm
10KOhm
/*
1
1
R413
1
1
R383
1
+3VS
STP_DISABLE#
2
27
+3VS
ENABLE ATA
Sil3811 -10K
88SA8040 -NP
R845
10KOhm
2
10KOhm
/*
1
IDE_BDD10
IDE_BDD5
IDE_BDD9
IDE_BDD6
IDE_BDD8
IDE_BDD7
IDE_BRESET#
R384
IDE_BDD3
IDE_BDD11
IDE_BDD4
1
IDE_BDD13
IDE_BDD2
IDE_BDD12
R1.1#17
D27
RB717F
/*
4
4
+3VS
STP_PIN34
+3VS
STP_PIN38
+3VS
1
1
R430
ALL FOR 88SA8040,
UNINSTALL ALL FOR
SIL3811
R433
R432
10KOhm
/*
10KOhm
/*
2
10KOhm
/*
2
10KOhm
/*
2
10KOhm
/*
2
10KOhm
/*
R429
2
R428
2
R427
1
1
1
1
+3VS
STP_PIN39
STP_PIN33
STP_PIN35
STP_PIN36
5
5
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
26
OF
63
DESCRIPTION:
SATA TO PATA BRIDGE
C
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
D
E
A
B
C
D
E
E
E
IDE_BDD[15:0]
26 IDE_BDD[15:0]
R1.1#18
HDD CNT
+5VS
SATA_HDD_TXN0
22 SATA_ICH_HDD_RXN0
2
C826
1
3900PF/50V
/*
22 SATA_ICH_HDD_RXP0
2
C827
1
3900PF/50V
/*
1
R883
54
53
2
1KOhm
/*
IDE_BCSEL
IDE_BCSEL
IDE_BDIAG
1
IDE_BDA2
IDE_BDCS1#
1
2
R885
10KOhm
T371
R884
IDE_BDA2 26
IDE_BDCS1# 26
+3VS
SATA_DET_#0 22,25
SATA_HDD_RXP0 22
SATA_HDD_RXN0 22
IDE_BDMARQ
R856 1
2 5.6KOhm
IDE_BDD7
R852 1
2 10KOhm
IDE_BINTRQ
R855 1
2 10KOhm
GND4
GND3
+3VS
B
D
+3VS
470Ohm
C
SATA_HDD_TXP0
R860 1
IDE_BDD8
IDE_BDD9
IDE_BDD10
IDE_BDD11
IDE_BDD12
IDE_BDD13
IDE_BDD14
IDE_BDD15
52
51
C
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
0.1UF
2
IDE_BDMARQ
IDE_BDIOW#
IDE_BDIOR#
IDE_BIORDY
IDE_BDMACK#
IDE_BINTRQ
IDE_BDA1
IDE_BDA0
IDE_BDCS0#
IDE_BDASP#
26 IDE_BDMARQ
26 IDE_BDIOW#
26 IDE_BDIOR#
26 IDE_BIORDY
26 IDE_BDMACK#
26 IDE_BINTRQ
26
IDE_BDA1
26
IDE_BDA0
26 IDE_BDCS0#
28 IDE_BDASP#
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
GND2
GND1
IDE_BRST#
IDE_BDD7
IDE_BDD6
IDE_BDD5
IDE_BDD4
IDE_BDD3
IDE_BDD2
IDE_BDD1
IDE_BDD0
IDE_BRST#
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
C824
2
10UF/10V
1
26
D
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
C832
1
CN32
BTOB_CON_50P
2
R857
4.7KOhm
1
1
2
+3VS
2 8.2KOhm
/*
B
A
A
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
27
OF
63
DESCRIPTION:
HDD CON.
C
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
D
E
A
B
C
D
E
+5VS
+5VS
+5VDOCK
IDE_PDD[15:0]
C785
10UF/10V
C791
U27
1 A
0.1UF
2
0.1UF
1
C787
2
10UF/10V
1
1
C781
2
0.1UF
2
2
10UF/10V
2
1
C717
2
C715
0.1UF
1
1
1
1
22 IDE_PDD[15:0]
C718
1
R327
6,8,21,22,23,30,31,32 BUF_PLT_RST#
VCC
5
IDERST#_5 26
2 B
2 /*
0Ohm
1
R326
23,37,39,40 PCI_RST#
1
IDERST#_5
3 GND
4
Y
NC7SZ08P5X
2
0Ohm
2
R288
IDERST#_5S
1
0Ohm
/*
+5VS
R2.0#16
3
2
2
10KOhm
+3VS
Q47
2N7002
G
+5VS
2 S
C914
1
IDERST#_5
U23
1 A
BAY_RST#
2 B
C783
3 GND
4
Y
NC7SZ08P5X
C301
100PF
BAYDOCK_IN#
4.7KOhm
/*
100KOhm
1
3
D
G
R2.1
C915
PIN22_+5V_PH
Q192
2N7002
1
C282
0.1UF
2
2
1SS355
1
1
D74
BAY_IN1
R812
2 S
2
0.47U
2
Q193
2N7002
G
R991
2
BAY_IN0
D
1
R2.1
2
+5VDOCK
3
2
1SS355
C315
IDERST#_5S
1
0.1UF
2
0.1UF
2
2 S
5
1
3
5
7
2
100KOhm
1
0.1UF
C719
VCC
1
1
D23
XIDE_EN#_3
G
2 S
100KOhm
1
1
22
R299
2
G
R353
2
C720
1
10KOhm
1
2
1
2
R293
1
1
2
1
10KOhm
+5VDOCK
Q144
3 2N7002
D
1
Q140
3 2N7002
D
C284
1
2
XIDE_EN_12VS
R334
0.1UF
2
10KOhm
10KOhm
10KOhm
10KOhm
1
G
Q124
SI3456DV
0.1UF
C289
0.1UF
2
D
D
1
BAY_RST
RN14A
RN14B
RN14C
RN14D
100KOhm
30
2
R377
+3VS
6
5
S 4
1
1
2
3
2
4
6
8
1
R287
+3VS
1
+12VS
2 S
0.47U
2
BAYDOCK_IN#
3
3
R1.1#32
2
1KOhm
/*
For EMI
1
XIDE_EN_12VS
IDE_PIORDY
IDE_PDD1
1
IDE_PCSEL
22 IDE_PDDREQ
IDE_PIORDY
R826
Q146
2N7002
470Ohm
D
S 2
3
2
1
22,25 INT_IRQ14
IDE_IRQ14
Q145
2N7002
4
43 HDD_LED_EN
2
R832
1
100KOhm
1
R828
2
1KOhm
IDE_PDD0
22 IDE_PDIOR#
22 IDE_PDIOW#
22 IDE_PDDACK#
G
5.6KOhm
/*
IDE_PIORDY_X
S 2
IDE_PIORDY
1
R814
22
3
R2.1
D
2
1
G
IDE_PDDREQ
T167
22
IDE_PDA2
22
22
IDE_PDCS3#
IDE_PDA1
22
IDE_PDA0
22
IDE_PDCS1#
30
BAY_IN0
1 IDE_PDIAG
Q147
2N7002
FLP_DR0#
+3VS
FLP_DRATE0
D
FLP_DSKCHG#
IDE_PDASP#
BAY_IN0
IDE_PCSEL
PIN22_+5V_PH
3
D57
1
S 2
FLP_MTR0#
IDE_PDASP#
2
FLP_3MODE#
FLP_INDEX#
FLP_DIR#
3
G
1
DAP202K
30
22
2
1SS355
/*
BAY_IN1
BAY_IN1
CN27
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
10 10
11 11
12 12
13 13
14 14
15 15
16 16
17 17
18 18
19 19
20 20
21 21
22 22
23 23
24 24
25 25
26 26
27 27
28 28
29 29
30 30
1
C803
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
2
0.1UF
FLP_STEP#
BAYDOCK_IN#
FLP_TRK0#
SATA_SWAP_TXN2
FLP_WDATA#
SATA_SWAP_TXP2
FLP_WP#
FLP_RDATA#
FLP_WGATE#
FLP_HDSEL#
IDE_PDD15
IDE_PDD2
IDE_PDD14
IDE_PDD3
IDE_PDD13
IDE_PDD4
IDE_PDD12
IDE_PDD5
IDE_PDD11
IDE_PDD6
IDE_PDD10
IDE_PDD7
IDE_PDD9
IDERST#_5S
IDE_PDD8
CD_GND_A
CD_GND_A
CD_L_A
CD_R_A
SATA_DET_#2 22,25
BAYDOCK_IN# 32
2
1
C801
2
1
3900PF/50V C800
3900PF/50V
SATA_ICH_RXN2 22
SATA_ICH_RXP2 22
SATA_SWAP_RXN2 22
SATA_SWAP_RXP2 22
4
CD_GND_A 33
CD_L_A
33
CD_R_A 33
BTOB_CON_60P
IDE_BDASP# 27
62
64
1
D58
5
+5VDOCK
61
63
4.7KOhm
ODD CNT
+5VDOCK
NP_NC1
GND1
R813
1
R835
CSEL (standard)
L : Master
H : Slave
CSEL (ASUS)
H : Master
L : Slave
NP_NC2
GND2
+3VS
2
+3VS
SATALED#
CD_L_A
2
R809
1
10KOhm
CD_R_A
1
R808
2
10KOhm
5
CD_GND_A
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
28
OF
63
DESCRIPTION:
SWAP BAY
C
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
D
E
A
B
C
D
E
1
1
+5VUSB_0
2
80Ohm/100Mhz
1
SIDE_G3
VCC
C203
+
1
G528P1U
C204
1UF/10V
(Iset = 1.4A)
150UF/6.3V
2
0.1UF
GND
528: EN#
4
3
2
1
C903
CE28
DATA0DATA0+
FLG EN#/EN
OUT_3 IN_2
OUT_2 IN_1
OUT_1 GND
10UF/10V
/*
2
2
USBP0-_3
USBP0+_3
7
SIDE_G1
1
5
1
2
3
4
6
+5V
U51
5
6
7
8
1
1
CN11
1
USB_PN0
USB_PP0
2
23
23
FLG#: OD
L50
L49
180Ohm/330mA
2
For EMI
+5V_USB0
0.01UF/16V
/*
2
USB *1 port
4
3
2
R193
USB_OC#0 23,25
C905
1
1
0Ohm
/*
1
0Ohm
/*
2
2
R191
R2.0#4
1
10KOhm
/*
2
2
R981
8
SIDE_G2
SIDE_G4
USB_CON_1X4P
1
10KOhm
/*
USB_OC#12 23,25
2
2
R982
1
Co-Layout
+5V
For EMI
U1
L1
+5V_USB12
1
+5VUSB_12
2
10
USB_PN2
USB_PP2
4
3
2
1
USBP2-_3
USBP2+_3
2
R529
1
1
+
G528P1U
C4
C904
CE21
0.1UF
150UF/6.3V
1UF/10V
(Iset = 1.4A)
3
10UF/10V
/*
USB_CON_2X4P
4
3
2
R528
4
C2
4
3
2
1
GND1
1P+
1PVCC1
GND3
9
L76
180Ohm/330mA
0.1UF
2
8
7
6
5
C3
CN17
GND4
GND2
0P+
0PVCC2
FLG EN#/EN
OUT_3 IN_2
OUT_2 IN_1
OUT_1 GND
2
4
USBP1-_3
USBP1+_3
1
23
23
USB_PN1
USB_PP1
2
23
23
3
L77
180Ohm/330mA
2
3
1
1
2
80Ohm/100Mhz
5
6
7
8
1
USB *2 ports
2
2
R531
0.01UF/16V
/*
1
1
0Ohm
/*
1
0Ohm
/*
2
2
R530
C906
1
0Ohm
/*
1
0Ohm
/*
4
5
5
bom
PROJECT: W3V
A
REVISION
2.1
DATE:
SHEET
B
29
OF
DESCRIPTION:
USB PORTS
63
C
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
D
E
A
B
C
D
E
1
1
+3VS
0.1UF
C773
1
C792
0.1UF
C782
0.1UF
2
0.1UF
1
C790
2
10UF/10V
1
C793
2
0x002e
0x004e
0x162e
0x164e
2
-->
-->
-->
-->
1
SYSOPT1=0
SYSOPT1=0
SYSOPT1=1
SYSOPT1=1
2
SYSOPT0=0,
SYSOPT0=1,
SYSOPT0=0,
SYSOPT0=1,
1
+3VS
+3VS
2
2
R793
2
R806
1
10KOhm /*
1
10KOhm /*
SYSOPT0
2
R792
SYSOPT1
2
R807
1
10KOhm
1
10KOhm
1
3
5
7
10KOhm
10KOhm
10KOhm
10KOhm
2
4
6
8
2
DSRA#
CTSA#
RIA#
DCDA#
RN30A
RN30B
RN30C
RN30D
Super I/O
DCDA#
RIA#
SYSOPT1
CTSA#
SYSOPT0
DSRA#
T162
+3VS
FIR_SEL
IR_RXD
IR_TXD
1
21,22,31,32,43 LPC_AD0
21,22,31,32,43 LPC_AD2
21,22,31,32,43 LPC_AD3
21,22,31,32,43 LPC_FRAME#
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
21,22,25,32,37,39,40 PM_CLKRUN#
DLAD1
LAD1
DLAD2
LAD2
VCC1
DLAD3
LAD3
VSS1
DLPC_CLK_33
LPC_CLK_33
DLDRQ1#
LDRQ1#
DLFRAME#
LFRAME#
nDCLKRUN
nCLKRUN
VCC2
DSER_IRQ
SER_IRQ
VSS2
PCI_CLK
PCI_RESET#
SIO_14M
LDRQ0#
LPCPD#
DSIO_14M
GP10
GP11
VSS3
GP12/IO_SMI#
VCC3
GP13/IRQIN1
21,22,31,32,43 LPC_AD1
LAD0
DLAD0
VSS6
GP37
VCC5
nDCD1
nRI1
nDTR1/SYSOPT1
nCTS1
nRTS1/SYSOPT0
nDSR1
TXD1
RXD1
IRMODE/IRRX3
IRRX2
IRTX2
U54
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
+3VS
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
+3VS
3
22,25,31
31
31
VTR
nIO_PME
GP36
VSS5
GP35
GP34
VCC4
GP33
GP32
GP31
GP30
VSS4
GP17
GP16
GP15
GP14/IRQIN2
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
1
T327
1
1
1
1
T158
T155
T160
T157
R794 1
2 0Ohm
R795 1
2 0Ohm /*
+3V
3
OVER_CLK2 12
OVER_CLK1 12
+3VS
802_EN#
1
802_EN# 39
DJKEY_EN 44
BAY_RST 28
BAY_RST
T328
LPC47N207
+3VS
4
1
4
1
CLK_SIOPCI
C788
21,22,25,32,40 INT_SERIRQ
12 CLK_SIOPCI
6,8,21,22,23,28,31,32 BUF_PLT_RST#
12
CLK_SIO14
21,22,25 LPC_DRQ#0
SW_RST#
SW_RST# 23
CLK_SIOPCI
T159
BAY_IN1
BAY_IN0
28
28
2
5PF
/*
2
R810
1
0Ohm /*
+3VS
2
R811
+3VS
1
10KOhm
2 RN29A
4 RN29B
6 RN29C
8 RN29D
110KOhm
3 10KOhm
510KOhm
7 10KOhm
802_EN#
SW_RST#
BAY_RST
5
5
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
30
OF
63
DESCRIPTION:
SUPER I/O (LPC47N207)
C
<OrgName>
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
D
E
A
B
C
D
E
2
R731 2
1
3
5
7
C692
10PF
/*
43
1
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
2 RN25A
4 RN25B
6 RN25C
8 RN25D
DIS_FWH
2
FWH_FGPI4
FWH_FGPI3
FWH_FGPI2
FWH_FGPI1
FWH_FGPI0
T104
T286
1
1
T103
1
31
CLK
30
3
4
5
6
FGPI4
FGPI3
FGPI2
FGPI1
FGPI0
8
7
FWH4
FWH3
FWH2
FWH1
FWH0
23
17
15
14
13
9
10
11
12
ID3
ID2
ID1
ID0
16
26
28
GND1
GND2
GNDA
FWH
IC
29
RSVD5
RSVD4
RSVD3
RSVD2
RSVD1
22
21
20
19
18
1
1
1
2
+3VS
+3VSUS
2
TBL#
WP#
10UF/10V
R707
10KOhm
R708
10KOhm
/*
FWH_WP# 22,25
LPC_FRAME# 21,22,30,32,43
LPC_AD3 21,22,30,32,43
LPC_AD2 21,22,30,32,43
LPC_AD1 21,22,30,32,43
LPC_AD0 21,22,30,32,43
2
R733
10KOhm
(PD: FWH mode)
1
boot device ID[3:0]=0000
Int. PD
1
25
32
27
C697
1
1
12 CLK_FWHPCI
VPP
VCC1
VCC2
VCCA
INIT#
RST#
C691
0.1UF
1
24
2 100Ohm 2
R722 1
0.1UF
/*
2
U49
22 FWH_INIT#
6,8,21,22,23,28,30,32 BUF_PLT_RST#
C701
2
2
1
2
1
+3VS
SST 49LF004A-33-4C-N
PLCC32 Socket Part Number :
12-043000321
3
3
W=40mil
C799
30
4
IR_TXD
IR_RXD
9
TXD
IR_RXD
8
RXD
3
FIR_SEL
6
NC
4
5
MD0
MD1
11
7
2
SHLD
GND
AGND
22,25,30 FIR_SEL
IR_TXD
4
VCC
30
HSDL-3600
1
U55
470P
2
0.1UF
10
C784
2
2
4.7U
LEDA
1
1
C789
IR_LEDA
2
2.7Ohm
1
1
R815
+3VS
+3VS
1
3.3VS: IR_LEAD = 750mA
Isupply = 5mA
C786
2
0.47U
5
5
bom
PROJECT: W3V
A
REVISION
2.1
DATE:
SHEET
B
31
OF
DESCRIPTION:
FIR & FWH
63
C
<OrgName>
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
D
E
A
B
C
D
+3V
E
KEYBOARD CON.
+3V
CN9
RN10A
RN10B
RN10C
RN10D
KBC_GA20
KBCPURST_3Q
INTCLK_5S
INTDATA_5S
KSI2
KSI3
KSI4
KSI5
2
KSI6
+3V
8 10KOhm
9 10KOhm
RP1H
RP1G
6 10KOhm
4 10KOhm
7 10KOhm
RP1F
RP1E
RP1D
1 10KOhm
RP1A
2 10KOhm
21,22,25,30,40 INT_SERIRQ
12 CLK_KBCPCI
6,8,21,22,23,28,30,31 BUF_PLT_RST#
21,22,30,31,43 LPC_FRAME#
21,22,30,31,43 LPC_AD3
21,22,30,31,43 LPC_AD2
21,22,30,31,43 LPC_AD1
21,22,30,31,43 LPC_AD0
47
KBCRSM
44
SWDJ_EN#
BAT_SEL
2
1MOhm
1
R152
WATCHDOG
KBCPURST_3Q
KBC_GA20
KBSCI_3Q
21,22,25,30,37,39,40 PM_CLKRUN#
BAT_LLOW#_KBC
43,44 DJ_LED_EN
R1.1#29
44
INTCLK_5S
44
INTDATA_5S
R2.0#5
2
4
6
8
P23
P22
P21
P20
P42/INT0
P43/INT1*
P44/RXD
P45/TXD
P46/SCLK1
P47/SRDY1#/CLKRUN#
17
16
15
14
13
12
11
10
P50/INT5*
P51/INT20
P52/INT30/1-WIRE1
P53/INT40/1-WIRE2
P54/CNTR0*
P55/CNTR1*
P56/DA1/PWM01
P57/DA2/PWM11
74
75
76
77
78
79
80
1
P67/AN7
P66/AN6
P65/AN5
P64/AN4
P63/AN3
P62/AN2
P61/AN1
P60/AN0
KBDCLK_5S
MOUSECLK_5S
INTCLK_5S
KBDDATA_5S
MOUSEDATA_5S
INTDATA_5S
4
5
6
7
8
9
P75/INT41
P74/INT31
P73/INT21
P72
P71
P70
SMC_BAT_KBC
SMD_BAT_KBC
2
3
P77/SCL
P76/SDA
VREF
72
P27
P26
P25
P24
31
32
33
34
P17/KSO15
P16/KOS14
P15/KSO13
P14/KSO12
P13/KSO11
P12/KSO10
P11/KSO9
P10/KSO8
P07/KSO7
P06/KSO6
P05/KSO5
P04/KSO4
P03/KSO3
P02/KSO2
P01/KSO1
P00/KSO0
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0
P37/KSI8
P36/KSI7
P35/KSI6
P34/KSI5
P33/KSI4
P32/KSI3
P31/PWM10/KSI2
P30/PWM00/KSI0
55
56
57
58
59
60
61
62
KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0
XIN
XOUT
28
29
X1_KBC
X2_KBC
P40/XCOUT
P41/XCIN
27
26
KBC_EXTSMI
RESET#
25
CNVSS
VSS
AVSS
24
30
73
P54,P55,P43,P50 are
wake-up event
inputs when KBC in
standby mode
23
22
21
20
19
18
+3VALWAYS
M38857
2
KBDDT0
1
0
1
Matrix
US
UK
JP
KSO3
44
KSI6
KSI5
KSI4
KSI3
44
44
44
44
3
KBDSCI_3 22,25
Q33
DTC114TKA
R1.1#17
X1_KBC
R97
R1.1#29
BT_LED# 38,43,45
2
5PF
1
C78
2
5PF
3
X1
8MHZ
1MOhm
/*
X2_KBC
1
C93
PCI_RSTNS# 23,37
4
+3VSUS
80mA
R161
10KOhm
+3VS
2
1
Q28A
UM6K1N
MOUSECLK_5S
MOUSEDATA_5S
KBDDATA_5S
KBDCLK_5S
5
6
1
2
KBC_GA20
KBCPURST_3Q
R142
R156
10KOhm
10KOhm
KBC_EXTSMI
HA20GATE 22
EXTSMI#_3A 22
D
Q35
2N7002
1
G
2 S
R162
5
0.1UF
3
1
2
2
4
6
8
C150
10KOhm
10KOhm
10KOhm
10KOhm
16
15
14
13
12
11
10
9
1
3
5
7
VCC
E#
ID0
ID1
YD
IC0
IC1
YC
1
S
IA0
IA1
YA
IB0
IB1
YB
GND
2
1
2
3
4
5
6
7
8
PI5C3257
10KOhm
3
4
KBDCPURST 22
5
Q28B
UM6K1N
bom
PROJECT: W3V
A
23,25
+3VS
RN9A
RN9B
RN9C
RN9D
+5V
54,58 SMDATA_BAT2
54,58 SMDATA_BAT1
KBDDT1
1
1
0
+5VS
U10
BAT_SEL
SMCLK_BAT2
SMCLK_BAT1
SMC_BAT_KBC
SMDATA_BAT2
SMDATA_BAT1
SMD_BAT_KBC
23,25
KBDDT1
ZIF_FPC_28P_KB
NUM_LED# 45
CAP_LED# 45
SET_PCIRSTNS# 23
KBSCI_3Q
+5VS
54,58 SMCLK_BAT2
54,58 SMCLK_BAT1
KBDDT0
1
SMDATA_BAT1
SMDATA_BAT2
SMCLK_BAT1
SMCLK_BAT2
T40
NUM_LED#
CAP_LED#
KBDDT0
KBDDT1
2
110KOhm
3 10KOhm
510KOhm
7 10KOhm
1
2
2 RN11A
4 RN11B
6 RN11C
8 RN11D
71
1
4
35
36
37
38
VCC
3
C
44 WIRELESS_#
46 CPUFAN_SPD_A
44 INTERNET_#
44
BT_#
2
0.1UF
R
ACIN_OC
P87/SERIRQ
P86/LCLK
P85/LRESET#
P84/LFRAME#
P83/LAD3
P82/LAD2
P81/LAD1
P80/LAD0
E
2
44
PANLOCK_#
44 MARATHON_#
56
63
64
65
66
67
68
69
70
B
56 BAT2_IN#_OC
2
0.1UF
1
C97
10K
43 WIRELESS_LED#
43 BAT_LOW#_KBC
28 BAYDOCK_IN#
56 BAT1_IN#_OC
46
FAN_DA
20
ADJ_BL
1
C88
1
1
54 BAT_LLOW#_OC
3
+3V
U8
44 MSK_INSTKEY#
55
BAT_LEARN
46
5PF
/*
5
10
5
10
5
10
5
10
5
10
5
10
5
10
5
10
RP1C
3 10KOhm
1
470KOhm
RP1B
2
R107
2
1
EC should set OP_SD
low in S3,
keep from leakage.
+3V
KSI7
C84
KSI1
KSO7
KSI7
KSO0
KSI6
KSO9
KSI5
KSO3
KSI4
KSO1
KSI2
KSI3
KSO5
KSO13
KSI0
KSO2
KSO4
KSO8
KSO6
KSO11
KSO10
KSO12
KSO14
KSO15
2
1
3
5
7
1
P50, P43, P54, P55 are wake-up event
inputs when KBC in standby mode
10KOhm
10KOhm
10KOhm
10KOhm
29
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
30
GND1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
GND2
2
2
4
6
8
10KOhm 5
10
10KOhm 5
10
10KOhm 5
10
10KOhm 5
10
10KOhm 5
10
10KOhm 5
10
10KOhm 5
10
10KOhm 5
10
1
KSI1
Input Event only at P54, P55, P60 - P67
1
1
RP7A
2
RP7B
3
RP7C
4
RP7D
6
RP7E
7
RP7F
8
RP7G
9
RP7H
1
3
5
7
P2.1 Low : Power Button Override disable
KSI0
KBSCI_3Q
RN2A
RN2B
RN2C
RN2D
+5VS
2
10KOhm /*
10KOhm
10KOhm
10KOhm
10KOhm
1
R148
REVISION
DATE:
2.1
SHEET
B
32
OF
DESCRIPTION:
KBC (M38857)
63
C
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
D
E
5
4
3
2
1
T394
G913C: Vo=Vref(=>1.25V)*[1+(R_H/R_L)]
+5VA
22,34,40,43,47,54,57 PM_SUSB#
1
U33
+5V
>30 mil or shape
4
C471
C469
G913C
2
20KOhm 1%
/*
EPAD
34
SPDIF
AGND_A
1 1UF/10V /*
C887 2
1 1UF/10V /*
C462
D
2
0.1UF
34K/1% for MAX8863
34.8K/1% for G913C
AGND_A
AGND_A
C486
10UF/10V
2
34
C886 2
LINEOUT_L
2
0Ohm
0.1UF
1
1
R511
C461
+5VA
1
1
R937
LINEOUT_R
R2.1
C457
10UF/10V
2
2
0.1UF
DIGITAL
Reference resistor for Jack detection:
ALC880: 20K_1%
ALC861: 5.1K_1%
1
2200P
1
100KOhm
0.1%
R477
34.8KOhm
1%
D
10UF/10V
2
C454
2
R487
2
5
1
SET
OUT
2
1
1
80Ohm/100Mhz
SHDN#
GND
IN
2
+5V_AUD
2
1
L68
1
1
1
2
3
1
R918
ACZ_SDIN0
2
33Ohm
Sense_A
LINE2_L
LINE2_R
MIC2_L
MIC2_R
CD_L
CD_GND
CD_R
MIC1_L
MIC1_R
LINE1_L
LINE1_R
1
10PF
/*
1 1UF/10V
OUTR_A
34
LINE_OUT_L
C860 2
1 1UF/10V
OUTL_A
34
VREFOUT 34,35
+5VA
C475
C854
C849
C888
10UF/10V
10UF/10V
0.1UF
/*
1UF/10V
ALC861-VS
13
14
15
16
17
18
19
20
21
22
23
24
2
C879
C865 2
1
22
22 ACZ_SYNC_AUD
22,34 ACZ_RST#_AUD
LINE_OUT_R
1
1
36
35
34
33
32
31
30
29
28
27
26
25
2
T388
FRONT_OUT_R
FRONT_OUT_L
Sense_B
DCVOL
MIC1_VREFO_R
LINE2_VREFO
MIC2_VREFO
LINE1_VREFO_L
MIC1_VREFO_L
VREF
AVSS1
AVDD1
2
AUD_GPIO0
22 ACZ_SDOUT_AUD
22 ACZ_BCLK_AUD
DVDD1
GPIO0
GPIO1
DVSS1
SDATA_OUT
BITCLK
DVSS2
SDATA_IN
DVDD2
SYNC
RESET#
PCBEEP
2
34
1
2
3
4
5
6
7
8
9
10
11
12
1
R2.1
C
Pin35/36: default OP ON
1
0.1UF
1
1
2
0.1UF
2
C874
C
10UF/10V
/*
AGND_A
SPDIFO
SPDIFI/EPAD
SURRBACK_OUT_R
SURRBACK_OUT_L
LFE_OUT
CEN_OUT
AVSS2
SURR_OUT_R
JDREF/NC
SURR_OUT_L
AVDD2
LINE1_VREFO_R
C863
2
2
1
U61
C883
48
47
46
45
44
43
42
41
40
39
38
37
+3VS
AGND_A
34
R1.1#22
2 1KOhm
1
2
C480 0.1UF
R503 1
2 1KOhm
2
C842
1
1UF/10V
2
C841
1
1UF/10V
MIC_A
35
2
47KOhm
CD_R_A
28
2
47KOhm
CD_GND_A 28
2
47KOhm
CD_L_A
2
3
2
C474
1
1
1UF/10V
D36
DAN202K
R502
10KOhm
1
R890
R891
47KOhm
R508
10KOhm
R500
10KOhm
2
R506 1
1
22,25 ICH_SPKR
1
2
C487 0.1UF
1
1UF/10V
1
SPKRCB
1
40
2
C838
B
PCBEEP
1
B
1
1UF/10V
1
R889
1
2
2
2
AGND_A
2
C840
2
R888
47KOhm
AGND_A
1
1UF/10V
1
R894
1
2
C839
A
28
A
2
R887
47KOhm
AGND_A
bom
PROJECT: W3V
5
REVISION
DATE:
2.1
SHEET
4
33
OF
63
DESCRIPTION:
Azalia AUDIO (ALC861-VS)
3
<OrgName>
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
2
1
A
B
C
D
E
+5VAMP
+5VS
2 B
3 GND
C880
R935
0.1UF
100KOhm
SPDIF_O
4
2
68KOhm
1
2
3
4
5
6
7
8
9
10
11
12
SPKL+
OUTL_A_AMP1
OUTL_A_AMP
2
1
C485 1UF/10V
2
C482
2
2
SPKL-
C483
2
2
1
R510
OUTL_A
R509
30KOhm
C484
GND1
GND4
GAIN0
RLINEIN
GAIN1 SHUTDOWN#
LOUT+
ROUT+
LLINEIN
RHPIN
LHPIN
VDD
PVDD2
PVDD1
RIN
HP/LINE#
LOUTROUTLIN
SE/BTL#
BYPASS
PC-BEEP
GND3
GND2
1
1
2
OP_SD#
SPKR+
OUTR_A_AMP1
1
2
C451 1UF/10V
SPKRSE/BTL#
1
R485
2
10KOhm
2
1
C455 1UF/10V
/*
0.47U
AGND_A
AGND_A
1
R471
2
68KOhm
OUTR_A
33
+5VAMP
R481
30KOhm
PCBEEP
33
R1.1#22
2
AGND_A
AGND_A
+5VAMP
+3V
2
1
1
G
S 2
D
3
1
2
+3VALWAYS
+12V
2
1
Q197G
S
2N7002 2
/*
EPAD
GND_AUDJACK
RB751V_40
OPTIC_VCC
1
AGND_A
SPDIF_O
1
L116
R446
100KOhm
2
120Ohm/100Mhz
R2.0#17
C476
R1.1#26
2 120Ohm/100Mhz
2
R2.1
D
3
3
1
AGND_A
1
R992
GND_AUDJACK
1
L113
1
R960
1
R881
1
R493
AGND_A
SPKR+
R445
4.7MOhm
2
AGND_A
2
0Ohm
3
2
120Ohm/100Mhz
2
0Ohm
2
0Ohm
2
0Ohm
3
D
1
G
D
1
Q58
2N7002
Q57
2N7002
G
JACK_IN#
G
S 2
33
0.1UF
GND_AUDJACK
D
Q59
2N7002
Q163
2N7002
1
1
100PF
L115 1
0Ohm
2
1KOhm
/*
1UF/10V
3
HP_IN
Q60
2N7002
1
C478
1
R965
SE/BTL#
C418
C830
EARR
1UF/10V
SPKL+
2
100PF
/*
1
C869
2
1KOhm
/*
2
1.5MOhm
2
100KOhm
MUTE
2
100PF
/*
1
1
C876
2
100PF
2
C468
2
100PF
1
1
C488
2
100PF
/*
2
1
9
6
10
C866
For EMI
1
R877
1
R879
R1.1#23
D35
2 1KOhm/100MHz OPTIC_VCC_D 2
2 1KOhm/100MHz
OPTIC_VCC_J L70 1
L73 1
2
C878
2
C858
DEPOP#
G
10mA
8
7
1
R966
3
C
AGND_A
EARR_C
22,33 ACZ_RST#_AUD
1 B
Q188
2SC5376F
/*
1 33Ohm
1 33Ohm
MUTE
1
2
2
1KOhm
E
2
1
Q187
2SC5376F
/*
R496
1KOhm
R507 2
R497 2
3
C
R505
11
12
2 33Ohm
2 33Ohm
E
2
3
R971 1
R967 1
2
OP_SD#
1
1SS355
1
1
2
EARL__R
EARR_R
OPTIC_HP
R868
100KOhm
/*
2
D59
3
2 S
2 S
For EMI
4
Q162
2N7002
1
2 1KOhm/100MHz
2 1KOhm/100MHz
2 1KOhm/100MHz
22,25
1 EARL
47UF/6.3V
1 EARR
47UF/6.3V
D60
DAP202K
1
D
EARL__J L75 1
EARR_J L67 1
L74 1
EARL_C
1
0Ohm
1
0Ohm /*
G
JACK_IN#
+
2 1KOhm/100MHz
AUD_GPIO0
S 2
2
33
L65 1
2
R1012
2
R1013
22,33,40,43,47,54,57 PM_SUSB#
1
10KOhm
3
10KOhm
D
R504
+
PHONE_JACK_8P_SPDIF
CN16
5
4
2
3
1
R2.1
R492
1 B
LINE_OUT : OPTIC VCC OFF
SPDIF_OUT : OPTIC VCC ON
NC
: OPTIC VCC OFF
1
2
2
OUTR_A_AMP
OPTIC_HP# JACK_IN# STATE
2
1
AGND_A
C464
1
1
AGND_A
0.47U
1
0.47U
1
2
1
0.1UF
R2.0#13
24
23
22
21
20
19
18
17
16
15
14
13
TPA0212
4
C453
2
1
GAIN0
AGND_A
R501
0.1UF
AGND_A
AGND_A
33
0
0
1
C481
1UF/10V
D
0.1UF
0
1
1
0.1UF
2
2
2
GAIN1
U34
HEADPHONE/SPDIF
C452
10UF/10V
R498
0Ohm
/*
DIGITAL
Q160
2N7002
C825
C448
2
Y
NC7SZ08M5
AV (V/V)
-2
-6
-12
-24
-1
S 2
3
2 S
OPTIC_VCC_EN#
R499
10KOhm
5
VCC
2
G
1
OPTIC_VCC
SE/BTL#
0
0
0
0
1
2
80Ohm/100Mhz
1
100KOhm
1
JACK_IN#
11
R865
1
G
1
OPTIC_HP
SPDIF
1
3 D
S
3
2
2
GAIN1
0
1
0
1
X
1
33
1
U62
1 A
2
Q159
SI2301DS
GAIN0
0
0
1
1
X
1
+5VS
1
L57
2
+5VAMP
+5VAMP
+5VAMP
1
1
AUDIO AMP
3
EARL
AGND_A
Ext MIC CON
Int Speaker CON
SPEAKER 0.5W
CN14
100PF
/*
INTMIC
SPKLSPKL+
SPKRSPKR+
MIC_JACK 35
C424
L61 1
L63 1
L64 1
L62 1
100PF
For EMI
R2.0#17
2
2
2
2
1
3
5
7
GND_AUDJACK
Int MIC CON
CN15
120Ohm
120Ohm
120Ohm
120Ohm
150PF
150PF
150PF
150PF
2
4
6
8
4
3
2
1
CP3A
CP3B
CP3C
CP3D
NC2
6
NC1
5
4
3
2
1
CN1
INTMIC
1
L3
2
1KOhm/100MHz
1
L2
2
1KOhm/100MHz
1
2
C6
2
2 1KOhm/100MHz
2 1KOhm/100MHz
For EMI
2
1
1
VREFOUT 33,35
1 SIDE1
3
2 SIDE2
4
fpc_con_2p_INT_MIC
C5
WtoB_CON_4P_SPEAKER
For EMI
100PF
/*
1
100PF
/*
C449
2 1KOhm/100MHz /*
For EMI
1
5
C463
1
1
L59
L58
2
INTMIC_J
MIC_J
1
AUDIO JACK
PHONE_5P_EXT_MIC
L60
2
L
5
4
3
6
2
1
1
R
2
7
8
9
10
100PF
/*
5
R1.1#24
/*
AGND_A
bom
AGND_A
PROJECT: W3V
A
REVISION
2.1
DATE:
SHEET
B
34
OF
63
DESCRIPTION:
AUDIO AMP / JACKS
C
<OrgName>
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
D
E
A
B
C
D
E
E
E
VREFOUT
+5VMIC
5
2
1
C465 220PF /*
2
75KOhm /*
4490_POS
1
+
4490_NEG
3
-
V+
R495
2.2KOhm
/*
D
1
2
MIC_JACK
V-U32
MAX4490AXK
/*
AGND_A
1
0.01UF
/*
2
2
1
C466
MIC_A
4
2
1
R494
D
C467
1UF/10V
/*
1
R488
2
C459
2
56KOhm /*
1
220PF /*
AGND_A
MIC AMP Option
2
R886
1
100KOhm
1
R491
2
100KOhm
AGND_A
4490_NEG
R486
1
1
R2.1
C857
C852
NJM2100M
12
2
1
1
+5VMIC
+5VA
C833
AGND_A
AGND_A
C844
1UF/10V
2
R958
B
L114
120Ohm/100Mhz
1
2
0.1UF
1UF/10V
2
10UF/10V
MIC_A
1
0Ohm
/*
BO 7
6 B- - GND 4
R896
10KOhm
2.2KOhm
+5VMIC
2
R478
5 B+ +
2
1
270KOhm
U59
3 A+ + VCC 8
1
2 A- - AO
2
2
R898
33,34 VREFOUT
4490_POS
2
39P
1
1
C843
C
1
C
B
1KOhm
/*
AGND_A
2
R892
AGND_A
1
270KOhm
2
AGND_A
1
C456
MIC_JACK
1
34
2
0.1uF/10V
2
R893
1
10KOhm
1
C835
2
39P
MIC_A
33
R959
2
1KOhm
/*
R2.1
AGND_A
A
A
bom
PROJECT: W3V
A
REVISION
2.1
DATE:
SHEET
B
35
OF
DESCRIPTION:
MIC AMP
63
C
<OrgName>
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
D
E
A
B
C
D
E
E
E
Connect SMLINK and SMBUS
for SMBus 2.0 compliance.
22,25 SM_LINK0
ICH6-M
+3VS
+3VS
1
1
Q51B
UM6K1N
/*
R381
R380
4.7KOhm
4.7KOhm
+5VS
2
2
1
5
2
Q51A
UM6K1N
/*
2
4
+5VS
3
6
22,25 SM_LINK1
22,25
6
SCL_3A
D
1
SCL_3S
System Thermal Sensor
ATI Thermal Sensor
Clock Generator
DDR2 SO-DIMM
TPM
6,12,13,14,19,21
Q52A
UM6K1N
5
ICH6-M
22,25
3
SDA_3A
4
SDA_3S
6,12,13,14,19,21
D
Q52B
UM6K1N
+3VALWAYS
+3VALWAYS 21,22,32,34,43,44,45,47,48,50,51,57
+3VSUS
+3VSUS
+5VALWAYS
20,22,24,25,31,32,37,45,47,53,57
+5VALWAYS 48,51,53
C
C
+5VSUS
+5VSUS
+1.5VSUS
+1.5VSUS 24,53
+3V
+3V
+5V
+5V
13,21,29,32,33,41,43,44,45,48,52,56,57
+12V
+12V
34,42,57
+3VS
+3VS
6,10,12,13,14,16,17,18,19,20,21,22,24,25,26,27,28,30,31,32,33,37,38,39,40,43,45,47,48,49,52,53,54,57
+5VS
+5VS
21,24,27,28,32,34,37,39,43,45,46,48,57
+12VS
20,21,28,44,57
+VCORE
5,6,49
+12VS
+VCORE
+VCCP
20,23,30,32,34,37,38,39,40,41,42,43,44,47,48,53,57
+VCCP
4,5,6,7,10,12,22,24,48,53
+1.2VSP
18,52
+2.5VS
+2.5VS
6,8,10,11,18,20,21,24,48,51,52
+1.8VS
+1.8VS
4,16,17,18,26,48,52,53,57
+0.9VS
+0.9VS
15,53
+1.5VS
+1.5VS
4,8,10,18,23,24,48,51
+1.2VSP
B
24,57
+VCC_RTC
B
+VCC_RTC 22,24
+1.8V
+VCC_GMCH_CORE
+1.8V
8,10,11,13,14,40,51,53
+VCC_GMCH_CORE 8,10,11,53
+VCCCB
+VCCCB
40,41
+VPPCB
+VPPCB
41
VTT_REF
A/D_DOCK_IN
VTT_REF 8,13,14,15
A/D_DOCK_IN 46,55,56
+ATI_VCORE
+ATI_VCORE 18,52
A
A
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
36
OF
DESCRIPTION:
SMBUS
63
C
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
D
E
A
B
C
D
E
2.5V_CTL
place PNP to chip ACAP 2.5V_CTL pin trace is 25MIL
R652 1
2 33Ohm
1
LAN_IDSEL
88E8001
+3V_LAN_DIGITAL
L_TRDM2
L_TRDP2
1
1
1
1
38
38
0.1UF
2
L_RDN
L_RDP
+2.5V_LAN
L_TDN
L_TDP
38
38
+3V_LAN_DIGITALR
2
200KOhm
2
25MHZ
C673
0.1UF
C660
0.1UF
1000P
2
C569
C663
1000P
1000P
1
2
C661
1
R62
2
0Ohm
PCI_RST# 23,28,39,40
1
R61
2
0Ohm /*
PCI_RSTNS# 23,32
L_TDP
L_TDN
L_RDP
L_RDN
R136
R135
R139
R131
1
1
1
1
2
2
2
2
49.9Ohm
49.9Ohm
49.9Ohm
49.9Ohm
L_TRDP2
L_TRDM2
L_TRDP3
L_TRDM3
R122
R113
R110
R108
1
1
1
1
2
2
2
2
49.9Ohm
49.9Ohm
49.9Ohm
49.9Ohm
C674
C131 1
2 1000P
C136 1
2 1000P
C117 1
2 1000P
C109 1
2 1000P
R2.1
2
12P
2
12P
32bit bus width, 33MHz bus clock
gigabit link speed:
VDD: +1.5V_LAN = 1.5V / 371.50mA
AVDDH: +3V_LAN = 3.3V / 102.52mA
AVDDL: +2.5V_LAN = 2.5V / 257.10mA
5
5
bom
PROJECT: W3V
1
1
C662
2
2
0.1UF
2
1
C586
PCI_RSTLAN#
C115
2
2.49KOhm
1
1
R153
AT24C08N
A
1
2
2
2
1
1
2
1
0.1UF
L_TRDM2 38
L_TRDP2 38
+3V_LAN_ANALOG
2.5V_CTL
L_RDN
L_RDP
1
1000P
L_TRDM3 38
L_TRDP3 38
X7
1
XOUT_LAN
1
1
C563
1
PCI_INTC# 23,25,39,40
L_TRDM3
L_TRDP3
R1.1#13
2
C571
10UF/10V
3
2
PCI_RSTLAN#
1
R141
U13
LAN_EECLK
LAN_EEDATA
C164
+1.5V_LAN
+3VS
XIN_LAN
0.1UF
10UF/10V
/*
4
LAN_RSET
C159
C76
2
2
2
0.1UF
+3VS
PCI_PME# 23,25,39,40
L_TDN
L_TDP
1
2
3
4
C168
+1.5V_LAN
PCI_AD30
PCI_AD31
1.5V_CTL
VCC A0
WP
A1
SCL A2
SDA GND
1
C173
PCI_AD28
PCI_AD29
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
+2.5V_LAN
+1.5V_LAN
8
7
6
5
1
+3V_LAN_DIGITAL
2
120Ohm/100Mhz
10UF/10V
AD28
AD29
VDDO_PCI2
VDD2
AD30
AD31
VDDO_PCI3
PMEn
RSTn
VIOB
INTAn
TSTPT
AVDDL0
MDIN[3]
MDIP[3]
AVDDL1
MDIN[2]
MDIP[2]
HSDACN
HSDACP
AVDDH
CTRL25
AVDDL2
MDIN[1]
MDIP[1]
AVDDL3
T396
Q34
HM772
2
1
L41
1
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
CBE[1]n
CBE_[2]n
AD16
AD17
AD18
VDDO_PCI4
VDD9
GNTn
REQn
SERRn
ZP_REF
ZN_REF
VDDO_PCI5
PERRn
CLK_RUNn
VDD10
CLK
IDSEL
DEVSELn
STOPn
IRDYn
TRDYn
VDDO_PCI6
FRAMEn
PAR
VDD11
AD19
AD20
AD21
AD22
VDDO_PCI7
AD23
CBE_[3]n
AD24
AD25
AD26
VDDO_PCI8
AD27
AD15
VDD0
AD14
AD13
VDDO_PCI0
AD12
AD11
AD10
M66EN
AD9
CBE_[0]n
AD8
AD7
VDDO_PCI1
AD6
AD5
AD4
AD3
AD2
AD1
AD0
VDD1
NC0
VPD_CLK
VPD_DATA
SPI_DI
GND
2
+1.5V_LAN
2
/*
1
4
+3V_LAN_DIGITAL
0.1UF
25mil
R163
4.7KOhm
2
120Ohm/100MHz
1
1
L40
2
+3VSUS
+3V
AVDDLF
VDD3
SPI_DO
SPI_CLK
CTRL15
SPI_CS
VDD4
VDDO_TTL0
VDDO_TTL1
LED_LINK1000n
VDD5
LED_TXn
LED_LINK10n
LED_LINK100n
VDDO_TTL2
LED_RXn
LED_DUPLEXn
LED_STATn
VDD6
TESTMODE
VDDO_TTL3
TDO
VDD7
VAUX_AVLBL
SWITCH[1]
SWITCH[0]
TDI
TRSTn
VDD8
TMS
TCK
XTALO
XTALI
VSSC
NC1
RSET
MDIP[0]
MDIN[0]
LAN_EECLK
LAN_EEDATA
C609
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
0.1UF
2
C
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
PCI_AD8
PCI_AD7
C659
1
PCI_C/BE#3 23,39,40
E
3
23,39,40 PCI_C/BE#0
0.1UF
place PNP to chip ACAP 2.5V_CTL pin trace is 25MIL
1 B
U44
23,39,40 PCI_AD[31:0]
PCI_AD9
C108
1.5V_CTL
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
23,39,40 PCI_C/BE#2
23,39,40 PCI_C/BE#1
3
0.1UF
+3VS
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD12
PCI_AD11
PCI_AD10
C651
10UF/10V
2
+1.5V_LAN
LAN_REQ#
PCI_AD14
PCI_AD13
C98
0.1UF
PCI_FRAME# 23,25,39,40
PCI_PAR 23,39,40
10P
/*
PCI_AD18
PCI_AD17
PCI_AD16
+3VS
C92
PCI_DEVSEL# 23,25,39,40
PCI_STOP# 23,25,39,40
PCI_IRDY# 23,25,39,40
PCI_TRDY# 23,25,39,40
C561
PCI_AD15
1
PM_CLKRUN# 21,22,25,30,32,39,40
PCI_GNT#0
+1.5V_LAN
C90
2
+3V_LAN_ANALOG
2
120Ohm/100Mhz
1
L30
2
2
1
1
2
1
+3V
+2.5V_LAN
T395
Q26
HM772
1
1
2
23
2
1
0Ohm /*
23,25,39,40 PCI_PERR#
23,25,39,40 PCI_SERR#
1000P
10UF/10V
2
R654
25mil
R116
4.7KOhm
2
120Ohm/100MHz
/*
2
ZP_REF
ZN_REF
Y8K_REQ64#
CLK_LANPCI
2
1000P
1
L31
C568
/*
1
PCI_AD16
12
0.1UF
C634
1
0Ohm
0.1UF
C572
2
R63
2
0.1UF
2
10UF/10V
1
1
ZN_REF
ZP_REF
C588
2
C
2 27Ohm
2 33Ohm
C570
E
3
R653 1
R655 1
+3VSUS
C658
2
D
Y8K_REQ64#
2
LAN_REQ#
3
2 S
23,25 PCI_REQ#0
2 2.7KOhm
1
G
1
R639 1
1 B
1
Q18
2N7002
+3VS
1
+3VS
+5VS
REVISION
DATE:
2.1
SHEET
B
37
OF
63
DESCRIPTION:
PCI GIGA LAN (88E8001)
C
<OrgName>
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
D
E
A
B
C
D
E
BT
[ACZ_SDOUT/SYNC/BITCLK/RST#]:
ICH6: 39 ohm to Audio / 39 ohm to MDC
[ACZ_SDIN]:
Audio 33 ohm to ICH6 / MDC 33 ohm to ICH6
R1.1#10
1
R945
1
Azalia MDC MODEM
+3VS
+3V
1
2
0Ohm
1
2
S
R943
2
Q179
SI2301DS
R2.0#3
2
0Ohm
/*
1
R944
0Ohm
/*
11
BT_LED# 32,43,45
2
33Ohm
2
1
R595
ACZ_BCLK_MDC 22
2
0Ohm
GP5
GP4
39
C513
BT_DATA
1
2
3
4
1
2
3
4
8
7
6
5
8
7
6
5
BT_VCC
GP0
GP0
GP1
39
C894
GP4
PIC12C508
/*
0.1UF
2
2
2
4
6
8
10
12
14
16
18
20
U70
14
16
18
20
1
R600
CN33
GP5
0.1UF
/*
1
22 ACZ_SYNC_MDC
22 ACZ_SDIN1
22 ACZ_RST#_MDC
2
4
6
8
10
12
R1.1#37
C895
0.1UF
2
22 ACZ_SDOUT_MDC
1
3
5
7
9
11
+3V
2
4
6
8
10
12
1
1
3
5
7
9
11
GND2
GND1
GND4
GND3
GND6
GND5
NP_NC2 NP_NC1
CN20
BTOB_CON_12P
13
15
17
19
1
3
2
D 3
G
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
1
3
5
7
9
11
13
15
17
19
GP1
USB_PN3 23
AXK5F20545Y
BT_CLK
2
USB_PP3 23
L_RXP
2
1000PF
1
C582
2
1000PF
1
C128
2
1000PF
L_RXN
3
L_TXP
L_TRDM3
1
2
4
L_RXP
L_TRLM2
LTRLM2
C139
1
1
1
1
C103
4
L_TRLP2
3
RDC
C116
L_TRLP2
75Ohm
75Ohm
75Ohm
75Ohm
8
6
4
2
RN8D
RN8C
RN8B
RN8A
L_TRLM2
FGND1S
L_TRLP3
1
5
7
5
3
1
L_TRLM3
C124
1
R699
1
R696
1
R694
1
R691
NC2
RING2
RING1
TIP2
TIP1
NC1
NP_NC1
P_GROUND1
GND1
20
16
18
17
15
19
4
CHASSIS_GND
L43 1
L42 1
Co-Layout
Reserved for EMI
CN23
2 1KOhm/100MHz
2 1KOhm/100MHz
TIP
RING
1
4
L_TRLP3
3
PLACE NEAR TRANSFORMER
L_CMT
L_RXC
L_CMT2
L_CMT3
L93
200Ohm
/*
LTRLP2
LTRLM3
2
0.1UF
2
0.1UF
2
2
2
0.1UF
14
13
12
11
10
9
GND2
P_GROUND2
TRLM3
NP_NC2
TRLP3
RXN
TRLM2
TRLP2
RXP
TXN
TXP
MODULAR_JACK_14P
C585
L_TRLM3
0.1UF
RING_J
TIP_J
1GB
+2.5V_LAN
L95
200Ohm
/*
LRXP
8
7
6
5
4
3
2
1
1
37
L_TXP
L_CMT
L_TXN
L_RXP
L_RXC
L_RXN
L_TRLP2
L_CMT2
L_TRLM2
L_TRLP3
L_CMT3
L_TRLM3
Co-Layout
Reserved for EMI
LTRLM3
LTRLP3
LRXN
LTRLM2
LTRLP2
LRXP
LTXN
LTXP
L91
200Ohm
/*
LTRLP3
2
L_RDN
L_TRDP2
L_TRDM2
L_TRDP3
13
15
14
16
18
17
19
21
20
22
24
23
3
CN22
1
37
37
37
37
4
MTRD0P
MCTRD0
MTRD0N
MTRD1P
MCTRD1
MTRD1N
MTRD2P
MCTRD2
MTRD2N
MTRD3P
MCTRD3
MTRD3N
3
L_TDN
L_RDP
TRD0P
CTRD0
TRD0N
TRD1P
CTRD1
TRD1N
TRD2P
CTRD2
TRD2N
TRD3P
CTRD3
TRD3N
2
37
37
12
10
11
9
7
8
6
4
5
3
1
2
LRXN
LRXN
U46
L_TDP
RJ11+RJ45
LRXP
L96
200Ohm
/*
LTXP
L_RXN
PLACE NEAR RJ45
37
LTXN
LTXN
L_TXN
2
1
C112
LTXP
2
0Ohm
2
0Ohm
2
0Ohm
2
0Ohm
1
CLose to RDC net
3
1
R703
1
R702
1
R701
1
R700
4
C99
L_TXN
2
1000PF
C176
1000P
/*
1
L_TXP
1
2
+2.5V_LAN
C171
2
2 SIDE2
4
1
1 SIDE1
3
fpc_con_2p_modem
1000P
/*
CHASSIS_GND
LTRLP2
2
0Ohm
2
0Ohm
2
0Ohm
2
0Ohm
LTRLM2
LTRLP3
5
LTRLM3
2
1000P
bom
PROJECT: W3V
A
REVISION
2.1
DATE:
SHEET
B
38
OF
DESCRIPTION:
RJ11+RJ45 / MDC
63
C
<OrgName>
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
D
E
A
B
C
D
E
PCI_AD[31:0]
23,37,40 PCI_AD[31:0]
1
1
Intel PRO/Wireless 2915ABG:
pin11: LED_WLAN_LINK
12: LED_WLAN_ACT
13: HW_RadioXMIT_OFF#
14: WLAN_Radio_State# (H:5G/L:2.4G)
+3VS
+3V
+3VS
PCI_AD21
PCI_AD19
PCI_AD17
3
23,37,40 PCI_C/BE#2
23,25,37,40 PCI_IRDY#
21,22,25,30,32,37,40 PM_CLKRUN#
23,25,37,40 PCI_SERR#
23,25,37,40 PCI_PERR#
23,37,40 PCI_C/BE#1
PCI_AD14
PCI_AD12
PCI_AD10
PCI_AD8
PCI_AD7
PCI_AD5
PCI_AD3
+5VS
PCI_AD1
4
CODEC_ID#1
MINI_PCI
125
126
CODEC_ID#0
R30
CODEC_ID#1
R11
1
2 1KOhm
/*
1
2 1KOhm
/*
2
R21
1
100Ohm
10UF/10V
0.1UF
C21
0.1UF
0.1UF
C7
0.1UF
C8
1
C19
1
C16
1
C20
1
38
R1.1#10
PCI_AD28
PCI_AD26
PCI_AD24
PCI_AD18
1
PCI_PME# 23,25,37,40
BT_CLK
PCI_AD30
0.1UF
C10
0.1UF
2
1 0Ohm
PCI_AD23
1 0Ohm
2
PCI_AD27
PCI_AD25
R948 2
+3VS
PCI_GNT#3 23
R947 2
2
38
BT_DATA
23,37,40 PCI_C/BE#3
5PF
/*
PCI_AD31
PCI_AD29
PCI_RST# 23,28,37,40
2
2
R1.1#10
C22
PCI_INTB# 23,25,40
+3V
2
1
23,25 PCI_REQ#3
R1.1#30
+3V
PCI_AD22
PCI_AD20
PCI_AD18
PCI_AD16
PCI_PAR
23,37,40
C26
10UF/10V
PCI_FRAME# 23,25,37,40
PCI_TRDY# 23,25,37,40
PCI_STOP# 23,25,37,40
C24
3
0.1UF
+5VS
PCI_DEVSEL# 23,25,37,40
PCI_AD15
PCI_AD13
PCI_AD11
C11
10UF/10V
PCI_AD9
C525
1
CLK_MINIPCI
PCI_INTC# 23,25,37,40
0.1UF
C9
0.1UF
2
12
+5VS
1
0Ohm /*
1
0Ohm
1
23,25 PCI_INTD#
2
2
R979
2
R980
2
802_LED
1
1 0Ohm /*
1 0Ohm /*
2
2
2
802_ON
1
R19
R13
4
Y
NC7SZ08P5X
/*
2
802_ON
802_ON
3 GND
1
43
2 B
1
0Ohm /*
2
2 S
Q7
2N7002
/*
2
R20
1
G
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
5
2
1
RING
TIP
LAN_RESERV1
LAN_RESERV2
LAN_RESERV5
LAN_RESERV3
LAN_RESERV7
LAN_RESERV4
LAN_RESERV6
LAN_RESERV10
LAN_RESERV8
LAN_RESERV12
LAN_RESERV13
LAN_RESERV9
LAN_RESERV11 LAN_RESERV14
INTB#
5V_1
3.3V_7
INTA#
RESERVED9
RESERVED3
GROUND15
3.3VAUX1
RST#
CLK
3.3V_3
GROUND4
REQ#
GNT#
3.3V_4
GROUND7
AD[31]
PME#
AD[29]
RESERVED6
GROUND8
AD[30]
AD[27]
3.3V_5
AD[25]
AD[28]
AD[26]
RESERVED8
AD[24]
C/BE[3]#
AD[23]
IDSEL
GROUND11
GROUND9
AD[22]
AD[21]
AD[19]
AD[20]
GROUND13
PAR
AD[17]
AD[18]
C/BE[2]#
AD[16]
IRDY#
GROUND10
3.3V_8
FRAME#
CLKRUN#
TRDY#
SERR#
STOP#
GROUND14
3.3V_6
PERR#
DEVSEL#
C/BE[1]#
GROUND12
AD[14]
AD[15]
GROUND16
AD[13]
AD[12]
AD[11]
AD[10]
GROUND1
GROUND2
AD[09]
AD[08]
C/BE[0]#
AD[07]
3.3V_1
3.3V_2
AD[06]
AD[05]
AD[04]
RESERVED4
AD[02]
AD[03]
AD[00]
5V_2
RESERVED1
AD[01]
RESERVED2
GROUND6
GROUND3
AC_SYNC
M66EN
AC_SDATA_IN
AC_SDATA_OUT
AC_BIT_CLK
AC_CODEC_ID0#
AC_CODEC_ID1#
AC_RESET#
MOD_AUDIO_MON
RESERVED5
AUDIO_GND2
GROUND5
S_AUDIO_IN
S_AUDIO_OUT
S_AUDIO_OGND S_AUDIO_I GND
AUDIO_GND
AUDIO_GND1
RESERVED7
MCPIACT#
VCC5A
3.3VAUX2
VCC
1
2
802_EN#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
127 POST1
128 POST2
30
D
SIDE1
SIDE2
CN19
3
U2
1 A
802_LED
1
802_EN
2
2
ASUS WL-222 a/b/g:
pin11: LED_WLAN_ACT
12: WLAN_Radio_State
13: HW_RadioXMIT_OFF#
R18
10KOhm
/*
PCI_C/BE#0 23,37,40
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
4
CODEC_ID#0
+3V
5
5
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
39
OF
63
DESCRIPTION:
MINIPCI
C
<OrgName>
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
D
E
A
B
C
D
E
+3VS
U31A
C435
+1.8V
D1
NC3
R6
E13
L1
E14
R7
VCC_RIN_1
VCC_RIN_2
VCC_ROUT_1
VCC_ROUT_2
REGEN#
VCC_3V_2
G5
VCC_MD3V
A4
23,37,39 PCI_PAR
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
CB_IDSEL_J
23,37,39 PCI_C/BE#[3:0]
23,25 PCI_REQ#1
23
PCI_GNT#1
23,25,37,39 PCI_FRAME#
23,25,37,39 PCI_IRDY#
23,25,37,39 PCI_TRDY#
23,25,37,39 PCI_DEVSEL#
23,25,37,39 PCI_STOP#
23,25,37,39 PCI_PERR#
23,25,37,39 PCI_SERR#
M4
M5
V3
V4
W4
T5
V5
W5
T6
REQ#
GNT#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
23,28,37,39 PCI_RST#
12
CLK_CBPCI
G2
L4
K1
GBRST#
PCIRST#
PCICLK
21,22,25,30,32,37,39 PM_CLKRUN#
23,25,37,39 PCI_PME#
L5
G4
1
R1.1#38
C395
1
CB_GBRST#
4
2
2
7PF/50V
1
1
1
1
MDIO02-->
MDIO05-->
MDIO06-->
MDIO14-->
MDIO15-->
MDIO16-->
MDIO17-->
MDIO18-->
MDIO19-->
E2
NC7
E4
NC8
+3V
F4
xD Enable#
SD Power1 Control / xD WP#
xD/MS/SD LED Control
xD Data 4
xD Data 5
xD Data 6
xD Data 7
xD CLE
xD ALE
R387
10KOhm
HWSPND#
SPKROUT
F2
CB_HWSUSP#
1
C365
F1
2
0.1UF
SPKRCB
2
R447
1
100KOhm
SPKRCB PD : Use SROM
1
T360
1 MDIO19
E8
MDIO19
T363
1 MDIO18
D8
MDIO18
T355
T350
T366
T357
1
1
1
1
MDIO17
MDIO16
MDIO15
MDIO14
B8
A8
E7
D7
B7
A7
E6
D6
MDIO17
MDIO16
MDIO15
MDIO14
MDIO13
MDIO12
MDIO11
MDIO10
B6
MDIO09
A6
MDIO08
1
0Ohm
1 MDIO6
D5
MDIO07
B5
MDIO06
1 MDIO5
A5
MDIO05
B4
MDIO04
B3
MDIO03
33
UDIO5
G1
UDIO4
H5
1394_SDA 42
UDIO3
H4
1394_SCL 42
UDIO2
H2
1
UDIO1
H1
1
UDIO0/SRIRQ#
J4
T361
SHIELD GND
42
42
42
42
SDD3_MSD3
SDD2_MSD2
SDD1_MSD1
SDD0_MSD0
2
R399
42 SDCLK_MSCLK
1
0Ohm
SHIELD GND 42 SDCMD_MSBS
T181
2
R411
T352
T183
INT_SERIRQ 21,22,25,30,32
T178
42 SDPWR_MSPWR
INTA#
J2
PCI_INTB# 23,25,39
INTB#
K4
PCI_INTA# 23,25
INTC#
K2
NC1
L2
42
2
R456
1
0Ohm
SDWP
T175
1 MDIO2
A3
MDIO02
MSCD#
A2
MDIO01
SDCD#
B1
MDIO00
42
MDIO00--> SD Card Detect#
MDIO01--> MS Card Detect#
MDIO03--> SD Write Protect /
xD R/B
MDIO04--> SD Card Power0 Control /
MS/xD Power Control
MDIO07--> SD/MS External Clock
MDIO08--> SD Command / MS Bus State
/ xD WE#
MDIO09--> SD/MS Clock / xD RE#
MDIO10--> SD/MS/xD Data 0
R5C841
PCI_AD17
2
R438
CB_GBRST#
2
R410
1
C366
CB_IDSEL_J
1
100Ohm
1
100KOhm
2
0.22UF/10V
+3V
+3V => CB_GBRST#
1ms <T< 100ms
R2.1
REVISION
2.1
CDATA15
CDATA14
CDATA13
CDATA12
CDATA11
CDATA10
CDATA9
CDATA8
CDATA7
CDATA6
CDATA5
CDATA4
CDATA3
CDATA2
CDATA1
CDATA0
U18
W18
V17
V16
V15
B19
C18
D18
W17
W16
W15
T15
R14
C19
D19
E19
AD8/D15
RFU/D14
AD6/D13
AD4/D12
AD2/D11
AD31/D10
AD30/D9
AD28/D8
AD7/D7
AD5/D6
AD3/D5
AD1/D4
AD0/D3
RFU/D2
AD29/D1
AD27/D0
OE#
WE#
CE2#
CE1#
REG#
RESET
WAIT#
WP/IOIS16#
RDY/IREQ#
BVD2
BVD1
VS2#
VS1#
CD2#
CD1#
INPACK#
T19
M15
T18
V19
F16
H19
G16
A18
M18
F19
E18
H16
R16
D15
T14
G19
AD11/OE# 41
CGNT#/WE# 41
AD10/CE2# 41
CBE0#/CE1# 41
CBE3#/REG# 41
IORD#
IOWR#
P18
P19
1
CCLK/A16 41
C406
DATE:
SHEET
B
40
OF
63
5PF
/*
41
41,43
41
41
41
41
41
41
41
41
41
41
41
41,43
41
41
2
1
2
C393 0.01UF
CSERR#/WAIT# 41,43
CCLKRUN#/IOIS16# 41,43
CINT#/IREQ# 41
CAUDIO/SPKR_IN#/BVD2 41,43
CSTSCHG/STSCHG#/BVD1 41,43
CVS2
41
CVS1
41
CCD2#
41
CCD1#
41,43
CREQ#/INPACK# 41
3
AD13/IORD# 41
AD15/IOWR# 41
USBDP
USBDM
V14
W14
USB_PN4 23
USB_PP4 23
Zdiff= 90ohm
1
R460
+3V
2
100KOhm
/*
VPPEN1
VPPEN0
VCC3EN#
VCC5EN#
W13
V13
T13
R13
AVPP1
AVPP0
AVCC3#
AVCC5#
41
41
41
41
+VCCCB
R414
100KOhm
/*
R461
100KOhm
CCLKRUN#/IOIS16#
R5C841
Global Reset POWER SEQ :
+3V => CB_GBRST# / CB_HWSUSP# => PCI_RST#
UDIO03 H : Enable SD
UDIO04 H : Enable MS
VPPEN0 H : Enable xD
H/W SUSPEND# POWER SEQ :
SUSPEND : CB_HWSUSP# LO => PCIRST# LO => +3VS OFF
RESUME : +3VS ON => PCIRST# HI => CB_HWSUSP# HI
5
CB_HWSUSP#
PCI CARDBUS (R5C841)
C
/*
CRST#/RESET 41
Zdiff= 90ohm
1
3
D26
2
DAP202K
DESCRIPTION:
SHIELD GND
4
PCI_INTC# 23,25,37,39
42
VCC_SLOT POWER : CARD_BUS, CAUDIO , CSTSCHG
PROJECT: W3V
NC6
CLKRUN#
RI_OUT#/PME#
5
bom
D2
1000PF
5PF
/*
VCCPCI POWER : PCI BUS
2
0Ohm
2
0Ohm /*
0.1UF
C403
C397
VCC_3V POWER :
PME#, SPKROUT, RI_OUT#, HWSUSP#, GBRST#, IRQn
CCD1#, CCD2#, VS1# , VS2#, TEST, VCC5EN#, VCC3EN#,
VPPEN0, VPPEN1, SD/MS I/F
1
R407
1
R398
+MC_VCC
2
10UF/10V
C367
+3V
AD19/A25 41
AD17/A24 41
CFRAME#/A23 41
CTRDY#/A22 41
CDEVSEL#/A21 41
CSTOP#/A20 41
CBLOCK#/A19 41,43
R437
RFU/A18 41,43
22Ohm
AD16/A17 41
1
2
CIRDY#/A15 41
CPERR#/A14 41,43
CPAR/A13 41
CBE2#/A12 41
AD12/A11 41
AD9/A10 41
AD14/A9 41
CBE1#/A8 41
AD18/A7 41
AD20/A6 41
AD21/A5 41
AD22/A4 41
AD23/A3 41
AD24/A2 41
AD25/A1 41
AD26/A0 41
1
3
TEST
C359
NC5
J18
J15
K16
L16
L18
M16
N19
N16
P16
L19
K15
N18
N15
K18
R18
U19
R19
P15
J16
H15
H18
G15
G18
F15
F18
E16
1
Open Drain:
CLKRUN#, PME#, SERR#, INTn#
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
PAR
C/BE3#
C/BE2#
C/BE1#
C/BE0#
IDSEL
J1
J5
K5
E9
R10
T10
V10
W10
L15
M19
A9
B9
D9
D14
A15
B15
NC4
CADR25
CADR24
CADR23
CADR22
CADR21
CADR20
CADR19
CADR18
CADR17
CADR16
CADR15
CADR14
CADR13
CADR12
CADR11
CADR10
CADR9
CADR8
CADR7
CADR6
CADR5
CADR4
CADR3
CADR2
CADR1
CADR0
2
2
M2
M1
N5
N4
N2
N1
P5
P4
R4
R2
R1
T2
T1
U2
U1
V1
T7
V7
W7
R8
T8
V8
W8
R9
V9
W9
T11
V11
W11
T12
V12
W12
V6
P2
W2
W6
T9
P1
+3V_CB
+3V
E1
C2
1000PF
2
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
AGND_1
AGND_2
AGND_3
AGND_4
AGND_5
AGND_6
1000PF
2
VCC_3V_1
VCC_3V_3
VCC_3V_4
0.1UF
1
/*
VCC_PCI3V_1
VCC_PCI3V_2
VCC_PCI3V_3
F5
J19
K19
23,37,39 PCI_AD[31:0]
A
C392
2
2
0.1UF
W3
R11
R12
1
C387
2
2
0.1UF
2
0Ohm
1
100KOhm
C368
2
10UF/10V
2
1
1
C401
C399
2
U31B
+1.8V_CB
2
0Ohm
C394
0.1UF
2
2
0.1UF
C437
1
1
1
1
2
C436
1
37mA
C444
10UF/10V
1
R458
2
R459
NC2
+3V
58mA
1
1
R425
C1
1
0.1UF
2
0.1UF
2
C439
2
2
10UF/10V
2
C438
1
1
1
2mA
PM_SUSB# 22,33,34,43,47,54,57
CB_SD#
22,25
<OrgName>
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
D
E
4
3
120Ohm/100Mhz
AVCC3#
2
R915
TPBIAS0
2
D62
42
1
10KOhm
1
1SS355
40
40
1
2
3
4
5
6
7
8
AVPP0
AVPP1
1
A16
B16
XO
B13
TPB0+_1
42
TPB0+_1
42
1
1
0.1UF
D
2
C891
0.1UF
TPA0-_1
B12
TPA0+_1
TPA0-_1
42
TPA0+_1
42
+VCCCB
REXT
2
R395
2
R394
1
0Ohm
1
0Ohm
B
A10
TPA1-_1
1
TPAP1
B10
TPA1+_1
1
T176
T177
CINT#/IREQ#
CSERR#/WAIT#
CREQ#/INPACK#
CAUDIO/SPKR_IN#/BVD2
1
1
1
1
T187
T383
T334
T331
CSTOP#/A20
CDEVSEL#/A21
CTRDY#/A22
CIRDY#/A15
1
1
1
1
T339
T186
T362
T368
CSTSCHG/STSCHG#/BVD1
CBLOCK#/A19
CPERR#/A14
CCLKRUN#/IOIS16#
1
1
1
1
T381
T380
T382
T161
73
71
69
75
P_GND3
NP_NC1
P_GND1
40,43
C772
270P
B
CTRDY#/A22 40
CFRAME#/A23 40
AD17/A24 40
AD19/A25 40
CVS2
40
CRST#/RESET 40
CSERR#/WAIT# 40,43
CREQ#/INPACK# 40
CBE3#/REG# 40
CSTSCHG/STSCHG#/BVD1 40,43
AD28/D8 40
AD30/D9 40
AD31/D10 40
CCD2#
40
C381
270P
PCMCIA Slot
X5
1
CCD1#
AD2/D11 40
AD4/D12 40
AD6/D13 40
RFU/D14 40,43
AD8/D15 40
AD10/CE2# 40
CVS1
40
AD13/IORD# 40
AD15/IOWR# 40
AD16/A17 40
RFU/A18 40,43
CBLOCK#/A19 40,43
CSTOP#/A20 40
CDEVSEL#/A21 40
BtoB_CON_68
CCD1# CCD2#
L
L
16bit
Other
32bit
R5C841
X2_1394
SIDE1
70
TPAN1
40 CCLK/A16
40 CIRDY#/A15
40 CBE2#/A12
40 AD18/A7
40 AD20/A6
40 AD21/A5
40 AD22/A4
40 AD23/A3
40 AD24/A2
40 AD25/A1
40 AD26/A0
40 AD27/D0
40 AD29/D1
40,43 RFU/D2
40,43 CCLKRUN#/IOIS16#
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
1
TPB1+_1
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
2
TPB1-_1
B11
P_GND4
A11
TPBP1
T353
76
TPBN1
1
NP_NC2
TPBIAS1
CN12
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
10 10
11 11
12 12
13 13
14 14
15 15
16 16
17 17
18 18
19 19
20 20
21 21
22 22
23 23
24 24
25 25
26 26
27 27
28 28
29 29
30 30
31 31
32 32
33 33
34 34
74
D10
AD0/D3
AD1/D4
AD3/D5
AD5/D6
AD7/D7
CBE0#/CE1#
AD9/A10
AD11/OE#
AD12/A11
AD14/A9
CBE1#/A8
CPAR/A13
CPERR#/A14
CGNT#/WE#
CINT#/IREQ#
P_GND2
TPBIAS1
2
2
1
place close to
ASIC
40
40
40
40
40
40
40
40
40
40
40
40
40,43
40
40
C
0.1UF
SIDE2
NC9
10UF/10V
C340
72
E12
10UF/10V
C352
2
VREF
C326
2
D13
C343
0.1UF
1
2
B14
10KOhm
1%
1
A12
TPAP0
1
2
C385 0.01UF
A
C884
2
TPAN0
1
FIL0
1
A14
1394_REF
C881
0.1UF
+VPPCB
1
R408
C
10UF/10V
/*
Layout: SHIELD GND
1
2
C364 0.01UF
1394_FIL
TPBP0
TPB0-_1
C867
+VCCCB
R5531V002
2
X1_1394
TPB0-_1
0.1UF
16
15
14
13
12
11
10
9
0.1UF
A13
1
1
VCC5_EN
GND
VCC3_EN VCC5IN2
EN0
VCCOUT3
EN1
VCC5IN1
FLG
VCCOUT2
NC1
VCC3IN
NC2
NC3
VPPOUT VCCOUT1
C890
XI
TPBN0
C875
U66
+VPPCB
X2_1394
10UF/10V
/*
2
40
C868
2
AVCC5#
Q166
2N7002
2
2
40
43 CBDEBUGEN#_Q
TPBIAS0
+3V
1
R914
10KOhm
1000PF
2
1
1
2
C370
1
D12
0.1UF
2
TPBIAS0
2
2
1
E10
E11
A17
B17
C369
D
AVCC_PHY_1
AVCC_PHY_2
AVCC_PHY_3
AVCC_PHY_4
1000PF
3
CPS
+5V
2
2 S
D11
C379
0.1UF
1
G
CPS
C383
AVCC_PHY_CB
1
10UF/10V
2
C373
1
1
1
2
R389
0Ohm
D
+3V
+3V
L56
37mA
U31C
1
1
+3V
2
2
5
2
X1_1394
A
C355
2
2
24.576MHZ
C360
R1.1#17
20P
1
1
20P
bom
PROJECT: W3V
5
REVISION
2.1
DATE:
SHEET
4
41
OF
DESCRIPTION:
CARDBUS SOCKET
63
3
<OrgName>
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
2
1
5
4
3
2
1
0.1UF
1394A CON
2
R403
1
C363
2
0.01UF
1
C361
2
0.33U
6
R2.1
LTPA0+
LTPA0LTPB0+
LTPB0-
R768
R771
R773
R776
2
2
2
2
1
1
1
1
SIDE_G2
TPXA1+
TPXA1TPXB1+
TPXB1-
0Ohm
0Ohm
0Ohm
0Ohm
SIDE_G1
TPA0+_1
TPBIAS0
41
TPA0+_1
41
TPA0-_1
41
TPB0+_1
41
TPB0-_1
41
+12V
To solve MS-Duo short with SD card
3
R817
100KOhm
Close to R5C841
The area is as compact as possible,length < 10 mm
TPA Pair and TPB pair mismatch < 2.5mm
No via recommend, maxmium is one.
Total length < 50 mm
Differential impedance is 110+/- 6 ohm
TPA Pair trace or TPB pair trace mismatch < 1.25mm
1
6
40 SDD1_MSD1
Q138A
UM6K1N
1
1
0Ohm /*
3
40 SDD2_MSD2
1
0Ohm /*
MSCD#
40
MSCD#
2
SDD2_MSD2
SDD0_MSD0
SDD1_MSD1
SDCMD_MSBS
SD_DAT2
C821
270P
1
SDCLK_MSCLK
SDD3_MSD3
B
Q138B
UM6K1N
4
2
R816
Layout: SHIELD GND
+3V
SD_DAT1
C
2
R818
5
2
3
CO-LAYOUT
Q143
2N7002
2
2
4
1
4
LTPB0+
1
C362
1
5.11KOhm
1%
2
270P
D
C
1.
2.
3.
4.
5.
6.
7.
L108
200Ohm
/*
TPB0+_1
2
R392
3
2
R406
TPB0-_1
1
56Ohm
1%
1
56Ohm
1%
2 S
LTPB0-
2
R405
G
1
SDCD#
L107
200Ohm
/*
TPA0-_1
1
LTPA0-
D
1394_SCL 40
1394_SDA 40
5
LTPA0+
R911
10KOhm
2
IEEE_1394_4P
8
7
6
5
AT24C02N
CN26
4
3
2
1
A0 VCC
A1
WP
A2 SCL
GND SDA
1
1
56Ohm
1%
1
56Ohm
1%
1
2
3
4
1
2
R404
R910
10KOhm
U65
2
D
2
C889
2
1
+3V
B
21
21
NP_NC2
22
25
22
SDCD#
2
24
NP_NC1
23
9
1
2
3
4
GND
9
1
2
3
4
SDCD#
40
SDWP
40
C805
270P
2 S
C798
1
1
D
Q141
2N7002
0.1UF
2
G
+MC_VCC
C820
0.1UF
2
40 SDPWR_MSPWR
CN30
Q142
SI2301DS
3 D
1
3
1
G
S
3
1
11
19
18
17
16
15
14
13
12
11
10
2
R820
10KOhm
19
18
17
16
15
14
13
12
11
10
2
2
+MC_VCC
SD_DAT2
40 SDD3_MSD3
40 SDCMD_MSBS
Place as close to
card reader socket
as possible
+MC_VCC
8
7
6
5
8
7
6
5
20
20
SD_DAT1
SDD0_MSD0 40
SDCLK_MSCLK 40
+MC_VCC
1
CARD_READER_19P
2
R819
10KOhm
/*
2
1
A
A
C802
270P
/*
bom
PROJECT: W3V
5
REVISION
2.1
DATE:
SHEET
4
42
OF
63
DESCRIPTION:
IEEE1394A / 3in1 CONN
3
<OrgName>
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
2
1
A
B
C
D
E
+3V
U69
1
2
3
2
40,41
CCD1#
40,41 CSTSCHG/STSCHG#/BVD1
INB
VCC
INA
GND OUTY
5
4
+3VALWAYS
+5VLCM
1MOhm
C870
R726
2
+3V
100KOhm
S
Q115
TP0610T
1
1
0.1UF
1
2
2
1
R927
1
+5VLCM
74LVC1G00GV
GND
11
CK
12
D
10
1
2
11
14
G
VCC
Q#
8
Q
9
3 D
23
7
CHG_LED#
R926
100KOhm
R711
2
CBDEBUGEN#
1
SN74LVC74APWR
R1.1#39
470Ohm
D63
1SS355
1
0.1UF
U67B
2
100KOhm
2
CLR
1
PR
1
13
C882
R938
2
+3V
CHG_LED 44
1
CBDEBUGEN#_Q 41
PCMCIA DEBUG CARD MUX
+5V
T398
+5V
1
CBDEBUGEN#
CCLKRUN#/IOIS16# 40,41
CPERR#/A14 40,41
RFU/D2
40,41
RFU/D14 40,41
4
8
14
18
22
B0
B1
B2
B3
B4
D0
D1
D2
D3
D4
5
9
15
19
23
RFU/A18 40,41
CSERR#/WAIT# 40,41
CBLOCK#/A19 40,41
1
13
BE#
BX
VCC
GND
24
12
2
R176
2
2
6
10
16
20
2
100KOhm
PWR_LED#
S
Q41
TP0610T
11
G
3 D
23
T385
C0
C1
C2
C3
C4
+5V
R180
475Ohm
1%
R1.1#39
1
21,22,30,31,32 LPC_AD3
31
DIS_FWH
A0
A1
A2
A3
A4
2
2
3
7
11
17
21
1
U64
12
CLK_DBPCI
21,22,30,31,32 LPC_FRAME#
21,22,30,31,32 LPC_AD0
21,22,30,31,32 LPC_AD1
21,22,30,31,32 LPC_AD2
74CBT3383
PWR_LED 44
1
+5VLCM
+3V
R2.1
+3V
+5VS
R572
S 2
3
D
1MOhm
1
0Ohm /*
3
+5VLCM
1
Q173
2N7002
1
PM_SUSC#
2
Q129
2N7002
1
ICH6_1HZ
G
22,25 ICH6_1HZ
G
PWR_LED# 45
D
2 S
D
+3VS
+5VS
Q133
2N7002
1
PM_SUSB
G
U63
5
47
PM_SUSB
4
SN74LVC1G08
Q131
2N7002
1
PM_SUSC#
G
22,44,47,48,57 PM_SUSC#
5
D
2 S
3
D
+5VS
3
S 2
Q128
2N7002
1
1
G
R749
2
100KOhm
R1.1#29
PM_SUSB# 22,33,34,40,47,54,57
R725
R730
R728
100KOhm
100KOhm
2
10KOhm
+5VLCM
A
VCC
B
GND
Y
4
PWR_LED#
2
3
3
1
2
3
2
T299
G
0Ohm
54,55,56,58 TS1#
54,55,56,58 TS2#
HDD_LED 44
BAT_LOW#_OC 54
R1.1#19
Q177
2N7002
1
S 2
1
G
3
Q170
2N7002
G
D
S
3
S 2
Q127
2N7002
1
G
R2.0#3
3
D67
DAP202K
DJ_LED_EN 32,44
32,38,45 BT_LED#
32 WIRELESS_LED#
1
R970
2
1
0Ohm /*
2
3
3
D
Q122
2N7002
1
G
2 S
11
D
Q121
2N7002
1
G
Q120
TP0610T
G
3 D
23
R932
S 2
S 2
3
D
100KOhm
1
G
1
D
Q171
2N7002
3
S 2
R1.1#39
R727
2 S
R1.1#39
470Ohm
1
2 S
R601
470Ohm
1
D
3 D
2 S
2
CHG_EN_OC
D
Q91
2N7002
G
R928
1
Q174
2N7002
1
G
+5VLCM
PM_SUSB
2
3
2
100KOhm
S 2
1
54
2 S
D
Q176
2N7002
1
ICH6_1HZ
2
1MOhm
1
1
R929
D
1
R924
G
D
1
28 HDD_LED_EN
2
+5VLCM
4
D
G
3
S
Q89
TP0610T
11
1
S 2
1
Q175
2N7002
1
G
54,55,56 AC_APR_UC
3
100KOhm
2
2
3
2
R993
2
1
3
Q172
2N7002
CHG_LED#
2
BAT_LOW#_KBC 32
R996
23
D
T97
1
100KOhm
/*
2
100KOhm
+5VS
3
Q194
2N7002
2
+5VLCM
1
R995
G
R913
2
100KOhm
1
1
R994
1
1
3
T397
2 S
WIRELESS_LED 44
39
802_ON
1
R724
2
10KOhm /*
bom
PROJECT: W3V
A
REVISION
2.1
DATE:
SHEET
B
43
OF
63
DESCRIPTION:
LEDs & DEBUG PORT
C
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
D
E
5
A
B
C
D
E
+3V
For EMI
0.01UF
/*
2
+3V
R630
R637
43
PWR_LED
43
CHG_LED
43
HDD_LED
43 WIRELESS_LED
100KOhm
1MOhm
8
Q
9
/*
C181
1
2 100PF
/*
2
2
TOUCHPAD/LED CON.
1
120Ohm/100MHz
8
6
4
2
14
13
12
11
10
9
8
7
6
5
4
3
2
1
1
+5VS_TPD
D45
1
SWDJ_EN# 32
32
32
1SS355
SN74LVC74APWR
10
D
14
Q#
/*
2 100PF
INTDATA_5S
INTCLK_5S
L45 1
2 120Ohm/100Mhz
L47 1
L46 1
2 1KOhm/100MHz
2 1KOhm/100MHz
SWDJ_SW# 47
1
CK
12
2 100PF
1
LN2
7
5
3
1
T406
PR
2
11
+3VALWAYS
VCC
1
C182
CN8
1
GND
CLR
U39B
7
13
R586
1MOhm
C183
+3VALWAYS
1
RB717F
1
22,43,47,48,57 PM_SUSC#
2
1UF/10V
2
3
1
C518
/*
C521
1
20,45,47 LID_SW#
+3VALWAYS
2 100PF
C180
C179
1
1
D
D41
R2.1
1
1
100KOhm
1
1
3
2 S
2
R587
1
G
32 MSK_INSTKEY#
C184
2
1
Q104
2N7002
C178
R683
3
2
D
+5V
Q38
2N7002
16
G
2 S
2
82PF/50V
/*
GND1
15
82PF/50V
/*
+5VS_TPD
2
2 S
Q105
2N7002
1
D
2
2
2
1MOhm
1
10KOhm
SWDJ_SW#_Q
1
G
3
2
R612
GND2
FPC_CON_14P
0.1UF
+3VALWAYS
14
13
12
11
10
9
8
7
6
5
4
3
2
1
D
Q110
2N7002
D
3
Q106
2N7002
1
1
2 S
S 2
G
+12VS
2
R657
1
10KOhm
2
R171
1
220KOhm
+3V
C188
0.1UF
1
G
2
3
+5V
1
+5V
2
R629
3
2
2
100KOhm
Q103
2N7002
1
G
1
G
D
AUDIO_DJ FPC
BWARD
2 S
+3V
Hotkey FPC
8
1
AUDIO DJ CONN
Play / Pulse
R43
475Ohm
1%
R634
1
Stop/Eject
R1.1#39
Bluetooth
8
INTERNET
HOTKEY CONN
FFWARD
WIRELESS
PANLOCK
+3V
1
0Ohm /*
AUDIO_DJ
CONN.
+3V
2
4 RN26A
6 RN26B
8 RN26C
RN26D
1
R183
2
R635
HOTKEY
CONN.
SWDJ_SW#_Q
2 120Ohm/100Mhz
L15 1
2 120Ohm/100Mhz
D
1
KSO3_DJ
C60
1
3
2 S
KSO3
L20 1
1
G
32
1MOhm
C63
1
CN5
100PF
1
2
3
4
5
6
7
8
2
2
100PF
LN1
C61
C62
C58
1
2
3
4
5
6
7 SIDE1
8 SIDE2
9
10
1
2
3
4
5
6
SIDE1 7
SIDE2 8
1
2
3
4
5
6
7
8
100PF
100PF
LN4
1
3
5
7
MARATHON#_J
1
L48
1KOhm/100MHz
2
4
6
8
FPC_CON_8P_HOTKEY
2
120Ohm/100Mhz
MARATHON_# 32
9
10
FPC_CON_8P_DJ
C59
5
100PF
For EMI
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
44
OF
63
DESCRIPTION:
AUDIO DJ/ HOTKEY/ TP+LEDs
C
R1.1#21,29
PANLOCK_# 32
WIRELESS_# 32
INTERNET_# 32
BT_#
32
1
1
100PF
R2.1
For EMI
PANLOCK#_J
WIRELESS#_J
INTERNET#_J
BT#_J
2
4
6
8
For EMI
5
2
2
120Ohm/100MHz
2
KSI5_DJ_BWARD
KSI6_DJ_STOP_EJECT
KSI4_DJ_PLAY_PAUSE
KSI3_DJ_FFWARD
8
6
4
2
1
7
5
3
1
2
KSI5
KSI6
KSI4
KSI3
1
32
32
32
32
R1.1#21,29
CN10
1MOhm
2
0.1UF
Q96
2N7002
4
1
3 CP10A
5 CP10B
7 CP10C
CP10D
1
C194
1
R633
100PF
100PF
100PF
100PF
2
R609
2
10KOhm
DJ_LED_EN
1
0Ohm
10KOhm
10KOhm
10KOhm
10KOhm
32,43 DJ_LED_EN
2
R611
R610
10KOhm
/*
1
3
5
7
DJKEY_EN
4
45
2
30
DJ_LED
1
2
2
1
100KOhm
3
MARATHON
3 D
2
DJ_LED_EN
11
Q102
TP0610T
3
3
DJ SW
S
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
D
E
B
C
D
3
3
4
1
1
R837 1
2 0Ohm
PM_RSMRST# 22
1
1
D
R834
C810
Q148
1
G
4
SYS_RESET# 22
2
2
RESET_BTN#
2
GND
2 S
330KOhm
2N7002
ADD FOR RC-RESET
1UF/10V
R1.1#7
C806
50mA/12V
PWR_SW#_Q 47
3
U56A
VCC 74HC14
RESET
2
7
2
470Ohm
2
1KOhm/100MHz
100Ohm
2
1
1
R134
1
L33
1
2 0Ohm
/*
4.7U
2
1
2
3
4
SW1
1
1
1
R839 1
2
R1.1#39
RST_BTN# 54
C130
100PF
/*
R1.1#2
For EMI
D
Q149
R838
2N7002
330KOhm
/*
1
G
2 S
2
+5VS
+3VS
1
KB COVER CON
+3VALWAYS
R527
2
2 S
44
1
L27
DJ_LED
2
120Ohm/100Mhz
R567
C503
0.1UF
/*
CP6A
CP6B
CP6C
CP6D
ICH6_PWROK 22
1
0.1UF
G
GND
1
100KOhm
Q69
2N7002
1
8,12,48,49,54 VRM_PWRGD
2
1
D
RESET#
VCC
1
2
3
4
5
6
7
8
9
10
SIDE1
11
SIDE2
3
1
9
FPC_CON_9P
1
3
5
7
3
3
20,44,47 LID_SW#
C86
220KOhm
/*
CN6
1
2
3
4
5
6
7
8
9
120Ohm/100MHz
2
4
6
8
2
0.47U
/*
2 S
1
2
R512
T112
Q189
2
10KOhm
C512
2 0Ohm
/*
1
1
G
R969 1
LN3
1
BT_LED
3
NUM_LED
5
CAP_LED
7
100PF
100PF
100PF
100PF
Q68
2N7002
2
1
1
R513
0.1U
3 D
2
4
6
8
D
1
+3VS
DJ_LED Bluetooth NUM CAP Magnet Switch
C545
3
3
Q75
TP0610T
G
2
11
3
Keyboard Cover FPC
KB Cover CON
220KOhm
2
2
10KOhm
S
1
2
2
R596
2
R1.1_No28
1
2
2
3
0.01UF
1
R1.1#3
330pF
2
T400
C129
C892
2
WTOB_CON_10P_2HOLD
1
1
NC2
1
1
2
3
4
T347
0.1UF
2
NC1
1
6
2
1
CN7
R833
C809
R827
T399
5
1UF/10V
14
2
R664
C807
47KOhm
100KOhm
2
1
0Ohm /*
R831
T336
1
2
R666
1
0Ohm
/*
1
0Ohm
1
2
R665
S
2
1
RESET BUTTON
2
3 D
POWER SWITCH CON
+3VSUS
2
Q108
TP0610T
3
+3VALWAYS
+5V
2
+5VS
G
1
1
1
PWR_LED#
E
1
+3VALWAYS
43
1
A
For EMI
4
4
2 S
32
3 D
R583
2 S
2
3
100KOhm
470Ohm
32
2
3 D
D
R535
Q71
2N7002
1
G
NUM_LED
NUM_LED#
Q70
TP0610T
G
2
R1.1#39
S
3
3
1
11
R514
2
D
Q76
2N7002
G
BT_LED
32,38,43 BT_LED#
G
2
470Ohm
2
100KOhm
+3VS
2 S
R1.1#39
470Ohm
1
G
3
100KOhm
2
1
R1.1#39
R712
Q117
2N7002
1
2
D
11
Q85
TP0610T
R553
2
3
R588
S
1
3 D
+5VS
1
+3VS
3
1
G
R714
100KOhm
+5VS
2
100KOhm
Q116
TP0610T
1
11
2
S
2
2
100KOhm
2
R568
2
R713
+3VS
+5VS
1
+5VS
1
+5VS
1
+5VS
CAP_LED
CAP_LED#
5
5
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
45
OF
63
DESCRIPTION:
PWR SW / RESET / KBC LEDs
C
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
D
E
A
B
C
D
E
1
1
T401
+5VS
+5VS_FAN
1
1KOhm
R182
C190
1
2
3
H1
H2
C195
For EMI
22P
D
10KOhm
2 S
+5VS
C192
2
100PF
1
G
C199
R181
1
1
1
/*
R1.1#40
1
2
100KOhm
Q44
2N7002
1
WATCHDOG
2
3
2
0.1UF
/*
0.01UF
/*
2
R1.1#40
C196
5.11KOhm
1
1
2
1KOhm
2
BO 7
GND 4
1
R186
32
1
R185
1
2
R187
FAN_ON#
LM358DR
100KOhm
/*
2
0.1UF
2
1
5 B+ +
6 B- -
R184
1
2
3
4
5
2
10UF/10V
C700
WTOB_CON_3P_FAN
FAN_ON_R#
1
FAN_DA
FAN_DA
2
32
U15
3 A+ + VCC 8
1
2 A- - AO
2
FAN_FB
1
1
2KOhm
C193
2
0.1UF
2
R188
CN24
R2.1
B 1
1
2
2
C
E
3
C197
FAN CON.
1
Q43
2SB1132
+5VS
1UF/10V
R178
1
G
2
2
10KOhm
/*
3
CPUFAN_SPD_A 32
D
2 S
FAN_TACH
Q42
2N7002
FAN CONTROL
3
3
A/D_VIN_P
DC-IN CONN.
RTC BAT CON.
SIDE1
1
1
1
1
WtoB_CON_9P_DC
RTC Battery
P/N=07-016322032
680 Ohm/ 100MHz
A/D_DOCK_IN 55,56
T195
TPC32t
T100
TPC32t
C12
1
1
1UF/50V
C17
0.1U
2
C42
0.1U
2
2
0.1U
2
C40
1
1
4532
1
2
10
9
8
7
6
5
4
3
2
1
L14
1
1
2
C388
0.1U
1
TPC32t
T22
9
8
7
6
5
4
3
2
1
1
SIDE2
RTC_BAT 22
4 CN13
WtoB_3P
TPC32t
T23
4
CN2
11
3
TPC32t
T17
1
4
TPC32t
T18
T102
TPC32t
T101
TPC32t
5
5
bom
PROJECT: W3V
A
REVISION
2.1
DATE:
SHEET
B
46
OF
63
DESCRIPTION:
FAN / RTC / DC_IN
C
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
D
E
A
B
R2.0#10
C
54
E
VSUS_OFF#
3
+3VALWAYS
D
VSUS_OFF#
2
100KOhm
+3VALWAYS
R2.1
C919
56
ACIN#
G
2
1
2
3
1
1
100PF
/*
A
VCC
B
GND
Y
3
5
4
2
R1008
1
10KOhm
/*
SN74LVC1G08
/*
1
1
R10
1
R985
1
2
D
100KOhm
3
14
100Ohm
1
+5VLCM
1
R825
R916
PM_SUSC#
Q167
2N7002
G
VCC
D
1
5
Q
GND
VSUS_ON 50,57
U67A
SN74LVC74APWR
Q# 6
150KOhm
/*
0.1UF
2 S
2
10KOhm
1
D61
R2.1
74HC74 TRUTH TABLE
C885
PRE# CLR#
2
1SS355
2.2uF/6.3V
1
R934
10KOhm
/*
1
2
6,53 OTP_RESET#
3
2
R2.1
D64
RB717F
1
56 SHUT_DOWN#
R939
+3VS
2
Q'
H
X
X
H
L
H
L
X
X
L
H
L
L
X
X
float
float
H
H
T
H
H
L
H
H
T
L
L
H
H
H
L
X
Qo
Qo'
2
14
3
PWR_ON
8
100Ohm
2
3
R940
1
1
+3VSUS
SWDJ_SW# 44
Q16
2N7002
G
1
PM_SUSB 43
14
7
1000PF
/*
1
CPU_VRON 49,51
GND
T36
2 S
5
GND
7
14
3
C808
7
1
Q
L
R1.1#3
U56D
74HC14
9
D
2
1
2
1
1SS355
D
R1.1#27
U56C
VCC 74HC14
6
VCC
2
D56
U56B
VCC 74HC14
4
GND
100KOhm
22,33,34,40,43,54,57 PM_SUSB#
CLK
470KOhm
(+3VALWAYS)
R829
3
C804
+3VALWAYS
R1009
2
1
2
CK
R2.1
Q6
2 S 2N7002
2
0Ohm
2
100KOhm
22,43,44,48,57 PM_SUSC#
R823
100KOhm
T403
G
C57
1UF/10V
3
7
D
1
2
D7
C918
+3VSUS
U4
2
1MOhm
/*
1
1SS355
/*
Q12
2 S 2N7002
PWR_ON
2
+3VSUS
1
R7
1
ACIN# 1
R2.1
1
1
10KOhm
R1.1#8
R824
T402
D
1
3
1
10KOhm
100PF
2
R987
2
1
PM_SUSC#
2
R1010
2
Q#
6
1
5
1
2
CK
Q
2
D
3
1
2
+3VALWAYS
CLR
1
RB751V_40
+3VALWAYS
2 S
PR
2
D73
G
1
ACIN#
Q191
2N7002
1
14
VCC
4
GND
D8
RB717F
D
1
7
2
100KOhm
2
4
R986
PR
1
CLR
1
3
U39A
SN74LVC74APWR
2
1
R638
2
2
1
C907 0.1UF
1
1
PWR_ON#
2 S
1
GND
C32
PWR_SW#_Q 45
G
12
T53
2.2uF/6.3V
+3VSUS
+3VALWAYS
2
7
7
1
GND
Q15
2N7002
D6
RB751V_40
2
D
10
T404
100KOhm
3
2
1SS355
U56F
74HC14
13
2
1
D24
VCC
1
22 PM_PWRBTN#
U56E
74HC14
11
14
14
R28
VCC
4
1
4
R1.1#16
3
100KOhm
2
1
R305
2
2
PM_SUSC#
KBCRSM
1MOhm
32
LID_SW# 20,44,45
C47
0.1UF
J1
1MM_OPEN_5MIL
/*
2
2
0.33U
2
C307
1
1
J2
1MM_OPEN_5MIL
/*
2
3
1KOhm
D5
1SS355
1
G
S 2
Q48
2N7002
1
1
1
1
R38
2
D22
DAP202K
1
1
T165
3
1
D
2
2
LID_ICH#_3A 22
1
2
10KOhm
2
1
1
R352
10KOhm
+3VALWAYS
R1.1#2
R301
1
R31
2
10KOhm
1
G
+3V
Q49
2N7002
+3VS
T169
1
R830
2
OS#_OC
D
S 2
6
5
5
At boot, KBCRSM need to be set low
for normal operation
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
47
OF
63
DESCRIPTION:
POWER ON SEQUENCE
C
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
D
E
D
E
T405
+1.5VS
R1.1#1
C896
1UF/10V
C897
0.1UF/25V
E
2 S
D
R962
Q136
SI2302DS
G
R780
3
+3VALWAYS
2
F01J4L
/*
1
1
1
D65
2
2
10Ohm
/*
1
G
1
R950
E
Q135
SI2302DS
1
+5VS
VCCA_+1.5VS_+1.8VS
1
3
D
+1.8VS
2
C
1
B
2 S
A
1
2
100KOhm
G
1
D
G
2 S
+1.8VS
Q186
2N7002
1
+1.8VS_VCCA
2 S
G
2
2 S
D
Q185
SI2302DS
1SS355
R2.0#11
2
Q156
2N7002
G
2
Q158
2N7002
1
1
C822
1
D
0.01U
2
1
1MOhm
G
1
G
1
3
2 S
D
3
G
R869
1
D72
100KOhm
S 2
D
Q157
2N7002
1
Q161
2N7002
D
S 2
3
C
E
2
Q152
PMBS3904
D
1
R862
R859
Q153
2N7002
3
2
1 B
4,12 CPU_BSEL0
SN74LVC1G08
2
0.01UF
/*
2
2
100KOhm
1
C823
SELECT_VCCA
4
3
D
2 S
330Ohm
R858
3
3
1
R873
5
A
VCC
B
GND
Y
D
1
2
3
3
1
R861
100KOhm
/*
+3VALWAYS
U58
2
1
100KOhm
1
+3VALWAYS
10KOhm
2
R871
2
10KOhm
1
+VCCP
1
1
VRM_PWRGD 8,12,45,49,54
+1.8VS
+2.5VS
1
R854
R866
330Ohm
/*
330Ohm
/*
330Ohm
/*
H17
C276D87
/*
2 S
Q4
2N7002
/*
Q151A
UM6K1N
/*
2
Q151B
UM6K1N
/*
5
3
D
Q150A
UM6K1N
/*
2
B
SUSC_DIS
+3V
1
1
R39
330Ohm
/*
330Ohm
/*
22,43,44,47,57 PM_SUSC#
G
2 S
Q2
2N7002
/*
Q14B
UM6K1N
/*
5
4
D
1
Q14A
UM6K1N
/*
2
1
3
For Daughter
Board hole *3
1
R2.0#19
2
1
1
H23
H24
H25
c158d158n c158d158n c158d158n
/*
/*
/*
1
H14
C276D142
/*
1
H11
C276D142
/*
1
1
1
CPU screw hole *4
A
SUSC_DIS
H13
C276D142
/*
3
6
2
R27
47KOhm
/*
2
R1
2
H15
C276D87
/*
+5V
1
+3VALWAYS
AGND_A
H10
C276D142
/*
Q150B
UM6K1N
/*
5
4
3
1
2
R864
330Ohm
/*
2
R863
330Ohm
/*
1
H19
C276D87
/*
1
1
1
H12
C276D87
/*
H1
C276D87
/*
R14
1
H2
C276D87
/*
H20
C276D87
/*
1
1
H16
C276D87
/*
1
1
1
+1.5VS
6
R2.1
H8
C276D98
/*
B
H18
C276D87
/*
+5VS
2
H6
C276D98
/*
1
H5
C276D87
/*
1
1
H4
C276D87
/*
G
H9
C276D87
/*
+3VS
1
Discharge
1
C
1
G
2
S 2
3
G
3
1
H7
C276D87
/*
1
1
1
H3
C276D87
/*
1
S 2
R2.0#2
H22
H21
CT197CB87D47 CT197CB87D47
(DIP BOM => SMT)
1
MDC NUT *2
D
Q184
2N7002
4
1
G
S 2
3
6
C
1.5v
1
D
Q154
2N7002
2
3
1.8v
Dothan FSB533
2
100KOhm
2
R961
100KOhm
1
D
VCCA Voltage
1
1
R878
100KOhm
2
R870
Q155
2N7002
CPU Type
Celeron (Dothan) FSB400
1
+5VALWAYS
+5VALWAYS
C1
A
1000P
/*
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
48
OF
63
DESCRIPTION:
DISCHARGE & EMI
C
<OrgName>
DESIGN ENGINEER :
M.Y.
RELEASE DATE :
D
E
A
B
C
D
E
+3VO
1
1000P
2
5
6
7
8
+5VO
1
C250
4.7u
2
GND
C220
GND
4.7u
+
Q126
IRF7413Z
PCPU_GND
2
TIME
LXS
40
DD0#
DLS
38
1
2
R198 2.7Ohm
1
1
1
39
1
1
1
T335
TPC32t
T329
TPC32t
T318
TPC32t
T316
TPC32t
T295
TPC32t
1
1
1
1
1
2
4
3
2
1
41
DHS
1
1
1
1000P
T143
TPC32t
L109
2
1
T148
TPC32t
R778
2
0.56UH
1
2
3mOhm
+VCORE
(25A)
1
CE31
220UF/2V
2
R244 1KOhm
1
2
PCPU_GND
GND
T291
4
1
2 1
T271
TPC32t
1
1
C251
R230
2
T301
TPC32t
1
1
R222
2
T317
TPC32t
R229
1
1
OCP : 34A
01/04
D55
EC31QS04
T260
TPC32t
2
GND
R241 1KOhm
1
2
1
2
R225 360Ohm
1
2
1
MAX1987ETM
C766
0.1UF/25V
c0603
TPC32t
IRF7831
+
2
31
Q137
2
1
1
5
6
7
8
0.1UF
4
3
2
1
100KOhm
TIME
BSTS
ILIM
T144
TPC32t
PCPU_GND
T139
TPC32t
1
47
1
CSN
Q139
IRF7413Z
1
REF
2
2
10
1
C247 470PF
T141
TPC32t
C794
48
+
1
CSP
+
1U
CCV
T138
TPC32t
3
11/26
2
TON
14
T136
TPC32t
1
AC_BAT_SYS
5
6
7
8
2
POS
15
EC31QS04
D18
4
3
2
1
1
2
R219
511Ohm
1
2
R228 511Ohm
C795
17
GND
CE32
5.6UF/25V
2
1
CCI
C727
220UF/2V
1
16
+
CMP
CSP
NEG
5
6
7
8
1
2
18
2
GND
1MOhm
SHDN#
FB
2
3mOhm
PCPU_GND
2
9
11
C246 100P
R196
SUS
DPSLP#
PSI#
37
13
49
46
45
20
19
1
S
2
43
44
21
35
PGND
GND1
GND2
CMN
CMP
OAIN+
OAIN-
G
4
B0
B1
B2
33
D
C238
0.01uF/25V
TPC32t
T142
1
3
4
5
LXM
DLM
IRF7831
C232
75KOhm
2
1
1
2
100KOhm
C249
47P
2
1
C240
0.47U
R207
1 2
1
1
2
S0
S1
S2
DHM
34
1
2
R206 2.7Ohm
2
3
1
RB717F
D19
Q125
S
R203
1
47,51 CPU_VRON
6
7
8
32
G
1
2
R227 1KOhm
/*
D0
D1
D2
D3
D4
D5
BSTM
0.1UF
R223
VRON
30
29
28
27
26
25
C236
D
+3VO
DPRSLPVR
STPCPU#
PSI#
1
1
2
R200
0Ohm
1
2
R199 1KOhm
R226 100KOhm
1
2
R201 100KOhm
/* 2
1
42
1
GND
3
PM_PSI#
V+
2
0.56UH
CE34
5.6UF/25V
2
1
1
R978
100KOhm
+3VO
VDD
2
1
1
1
1
1
1
1
1
1
2
10/11
4
SYSOK
CLKEN#
IMVPOK
T320
TPC32t
S
1
2
R224 0Ohm
VR_VID0
VR_VID1
VR_VID2
VR_VID3
VR_VID4
VR_VID5
12,22 STP_CPU#
VCC
22
24
23
36
G
MCH_OK
CLK_EN#
VR_PWRGD
VR_VID0
VR_VID1
VR_VID2
VR_VID3
VR_VID4
VR_VID5
22 PM_DPRSLPVR
12
T319
TPC32t
R755
1
U17
C248
0.1UF
D
R233 100KOhm
/* 2
1
+3VS
CLK_EN#
8,12,45,48,54 VRM_PWRGD
T147
TPC32t
T333
TPC32t
T149
TPC32t
R942 100KOhm
1
2
51,54 1.8_2.5_1.5_1_PWRGD
4
4
4
4
4
4
T127
TPC32t
T129
TPC32t
T130
TPC32t
T128
TPC32t
T133
TPC32t
T131
TPC32t
1
L106
+VCORE
1
GND
T313
TPC32t
T315
TPC32t
GND
GND
2
1
T314
TPC32t
T325
R197 10Ohm
2
1
2
1
STPCPU#
+5VO
1
PSI#
/*
1
TPC32t
1
/*
+
S
DPRSLPVR
/*
G
T324
TPC32t
1
TPC32t
1
/*
D
T137
/*
11/26
2
R202 0Ohm
2
R209 0Ohm
1
2
R218 0Ohm
1
2
R215 0Ohm
1
2
R217 0Ohm
1
2
R221 0Ohm
/*
C716
VR_VID5
1
VR_VID4
1U
0.956V 1 1 1 1 0 1
AC_BAT_SYS
AC_BAT_SYS
2
VR_VID3
C714
VR_VID2
1.468V 1 1 1 1 0 0
1
CE35
5.6UF/25V
2
1
VR_VID1
VID 0 1 2 3 4 5
2
47KOhm
/* 2
47KOhm
/* 2
47KOhm
/* 2
47KOhm
/* 2
47KOhm
/* 2
47KOhm
/*
CE33
5.6UF/25V
2
1
1
R208
1
R211
1
R213
1
R214
1
R216
1
R220
4
3
2
1
VR_VID0
GND
100KOhm
1.21KOhm
4.7KOhm
4700P
R774
DPRSLPVR
1
R777
2
1 NC
2 A
3 GND
2
0Ohm
1
TIME
2
15KOhm
VCC 5
U21
Y
4
2
Q130A
UM6K1N
NC7ST04M5
3
100KOhm
1
1 NC
2 A
3 GND
2
Y
4
5
Q130B
UM6K1N
R765
121KOhm
4
0Ohm
1
2
R764 36.5KOhm
VCC 5
1
R779
CLK_EN#
1
R770
1
+3VS
+5VO
6
U19
GND
5
NC7ST04M5
2
5
GND
GND
for C4 fast exit event
bom
PROJECT: W3V
A
REVISION
2.1
DATE:
SHEET
B
49
OF
63
DESCRIPTION:
VCORE
C
<OrgName>
DESIGN ENGINEER :
Amos Yu
RELEASE DATE :
D
E
A
B
C
D
E
01/03
R147
10KOhm
2
+5VAO
1
2
/*
2
2
R732 10Ohm
Q40
01/03
1
C177
1UF/10V
T146
TPC32t
T145
TPC32t
T166
TPC32t
1
1
2
2
RB717F
T285
TPC32t
1
2
2
1
2
1
C693 0.1UF/25V
1
2
AC_BAT_SYS
11/26
GND
1
+
C172
1U
5
6
7
8
+
2
2
CE37
5.6UF/25V
2
1
C696
4.7u
CE36
5.6UF/25V
2
1
1
GND
1
3
PSYS_GND
Q32
SI4800BDY
GND
(5A)
4
3
2
1
01/03
01/03
T119
TPC32t
T280
TPC32t
T379
TPC32t
2
1
1
1
1
4
3
2
1
1
+
CE7
S
G
D16
FS1J4TP
2
DCR =13 mOHM
SI4894DY-TI
Vref = 0.8 V
T281
TPC32t
10mOhm
1
Q36
2
1
1
1
2
3.8UH
2
D
64.9KOhm
T287
TPC32t
R159
120UF/4V
1
1
5
6
7
8
+3VO
2
T196
TPC32t
+3VO
L44
R721
1
20KOhm
2
T168
TPC32t
3
2
2
R716
+
1
+5VO
+5VAO
PSYS_GND
C683 180P
2
1
GND
100UF/6.3V
6/14
D54
C685
1000P
5600P
2
CE10
D15
FS1J4TP
1
1
C689
1
10mOhm
1
4
3
2
1
0.1UF/25V
RUN_3VO
0Ohm /*
R718
C676 220P
2
1
2
1
+5VAO
9
10
11
12
13
14
15
16
SIDE1
1000P
C670
1
2
C677 220P
1
1
1
1
2
DCR =13 mOHM
SI4894DY-TI
S
2
T297
TPC32t
PSYS_GND
24
23
22
21
20
19
18
17
D
R709 150KOhm
2
1
1000P
BOOST1
VIN
BG1
EXTVCC
INTVCC
PGND
BG2
BOOST2
Q37
1
VOSENSE1
PLLFLTR
PLLIN
FCB
ITH1
SGND
3.3VOUT
ITH2
VOSENSE2
NC_1
SENSE2SENSE2+
RUN/SS2
TG2
SW2
NC_2
20KOhm
R715
C671
T294
TPC32t
R174
1
5
6
7
8
32
31
30
29
28
27
26
25
NC_3
SENSE1SENSE1+
NC
RUN/SS1
PGOOD
TG1
SW1
1
1
2
3
4
5
6
7
8
C695
G
1
T293
TPC32t
+5VO
3.8UH
U50
LTC3728LX
33
R710 150KOhm
2
(5A)
T122
TPC32t
4
3
2
1
1
2
2
R717
100KOhm
180P
C682
1
R720 107KOhm
2
1
PSYS_GND
S
2
1
C187
0.1UF/25V
c0603
L39
G
1
+
SI4800BDY
D
2
01/03
PLLFLTR
1
+3VO
+5VO
OUT:
GND
+5VAO
2
AC_BAT_SYS
11/26
S
C690
4700P
G
RUN_5VO
3V_5V_PRWGD
D
+5VO
1
IN:
01/03
5
6
7
8
GND
2
POWER
1
R151
100KOhm
1
GND
3
SUSC#_PWR
VSUS_ON
1
1
C686 C698
1UF
1000P
AC_BAT_SYS
2
2
1
CE38
5.6UF/25V
2
1
PLLFLTR
2
IN:
AC_BAT_SYS
1
1
SIGNAL
C161
1UF/10V
T115
TPC32t
T117
TPC32t
T114
TPC32t
1
3
UM6K1N
3
+3VO
1
4
GND
RUN_5VO
T409
TPC32t
1
2
Q118A
2
6/14
1
1
6
R719
100KOhm
RB715F
RUN_3VO
2
1
T408
TPC32t
D53
1
+3VALWAYS
1
PSYS_GND
4
Q118B
5
UM6K1N
1
4
1
47,57 VSUS_ON
R723
100KOhm
/*
2
2
R729
100KOhm
5
3V_5V_PRWGD
54 3V_5V_PWRGD
GND
5
bom
PROJECT: W3V
A
REVISION
2.1
DATE:
SHEET
B
50
OF
63
DESCRIPTION:
SYSTEM
C
<OrgName>
DESIGN ENGINEER :
Amos Yu
RELEASE DATE :
D
E
A
B
C
D
E
VREF5
SIGNAL IN: SUSB#_PWR
SUSC#_PWR
ON_1.8
1
2
1
1
1
1
1
2
2
1
1
1
2
2
1
1
1
1
1
1
2
2
3MM_OPEN_5MIL
CE19
330UF/2V
1
1
+
T200
TPC32t
C910
0.1UF/25V
c0603
2
2
1
1
3
2
+3VO
8
7
6
5
4.7uF/25V
RSS090N03
C458
2
1
1
1
2
4
+2.5VO
2
1
19.6KOhm
AC_BAT_SYS
R872
10UF/6.3V
C447
Q64
SI4800BDY
2
+
CE42
5.6UF/25V
2
1
1
5
6
7
8
4
1
2
2
+2.5VS
1MM_OPEN_5MIL
4
C415
0.1UF/25V
c0603
2
01/03
11/26
2
1
6.81KOhm
TPC32t
T226
JP13
(0.5A)
1
10KOhm
+2.5VO
1
1
T192
TPC32t
S
G
1
4.7uF/25V
2
1
1
C446
R880
GND
1
0.1UF
/*
R882
GND
C909
0.1UF/25V
c0603
GND
01/03
T201
TPC32t
T199
TPC32t
+1.05VO
(5A)
2
4
3
2
1
8/16
2
+1.05VGND
1
1
1
+
CE17
1
JP21
5
1
2
SHORT_PIN
2
2
T37
TPC32t
330UF/2V
1
1
1
SI4894DY-TI
so8
2
5
6
7
8
2
2
1
GND
C414
6800P
+1.05VO
1
1
T38
TPC32t
Q67
GND
1
T205
TPC32t
2
1
+1.05VO
1.8UH
R867
49.9KOhm
R875
12.4KOhm
1
+3VALWAYS
JP18
4
3
2
1
2
2
2
0Ohm
S
2
1MM_OPEN_5MIL
GND
1MM_OPEN_5MIL
PROJECT: W3V
A
1
2
CE39
5.6UF/25V
2
1
1
+1.5VO 1
GND
D
1
bom
+1.5VS
JP15
4.7UH
1
T198
TPC32t
(4A)
2
2
TPC32tTPC32t
T384 T209 +1.5VO
L71
C834
1
C831 0.1UF/25V
c06032
1
2
0.1UF
1
2
1
4
3
2
1
5
6
7
8
C851 0.1UF/25V
1
R897 2.7Ohm
1
VREF5
2
1
C855
2.7KOhm
2
1
1
2
5
C908
0.1UF/25V
c0603
Q61
G
1
6
S1/D2_1
D
c0603
12/28
R444
680Ohm
TPC32t
1
S1/D2_2
S2
+
SI4814DY
S
+5VALWAYS
1
G2
4
GND
1
1
R876
T212
TPC32t
JP12
VREF3
3
1 C836 0.1UF
/*
G
TPC32t
5
D1_2 S1/D2_3
7
R472 20mOHM
1SS355
T189
TPC32t
GND
T203
8
D1_1
L72
T193
1
2
GND
D
1
2
+1.05VGND
GND
10UF/6.3V
C460 JP32
1 1 2
CE18
330UF/2V
2
+5VO
VREF3
VREF5
GND
01/030.1UF/25V
01/04
GND
SHORT_PIN
C872
0.47U
VREF5
G1
2
+1.5VGND
36
35
34
33
32
31
30
29
28
27
26
25
LL2
OUT2_u
LH2
VIN
VREF3.3
VREF5
REG5V_IN
LDO_IN
LDO_CUR
LDO_GATE
LDO_OUT
INV_LDO
C829
1
2
C828 0.01U
+3VO
1
2
C417
R454
2
2200P
+
2
2
3MM_OPEN_5MIL
3MM_OPEN_5MIL
Q65
2
D30
2
1
6
1
C873
CE20
JP20
2
R874
1
ON_1.05
100KOhm
100KOhm
1
Q178B
UM6K1N
5
1
1
RB520S_30
Q178A
UM6K1N
2
3
R923
11KOhm
2
R936
2
2
10/11 D71
TPS5130
ON_1.05
49,54 1.8_2.5_1.5_1_PWRGD
+
120UF/4V
/*
GND
13
14
15
16
17
18
19
20
21
22
23
24
ON_2.5
VREF5
D32
2
1
0.1U
2
1
C450
1
2
AC_BAT_SYS
GND
GND
47,49 CPU_VRON
2
2
2
1
2
1R483100KOhm
2
R484100KOhm
FB1
SS_STBY1
INV2
FB2
SS_STBY2
PWM_SEL
CT
GND
REF
STBY_VREF5
STBY_VREF3.3
STBY_LDO
2
C445
2
1
ON_1.5
1
2
3
4
5
6
7
8
9
10
11
12
09/23
4
C837
0.1U
48
47
46
45
44
43
42
41
40
39
38
37
INV1
FLT
LH1
OUT1_u
LL1
OUT1_d
OUTGND1
TRIP1
VIN_SENSE12
TRIP2
OUTGND2
OUT2_d
ON_1.8
FS1J4TP
01/03
AC_BAT_SYS
1SS355
SS_STBY3
FB3
INV3
PGOUT
PG_DELAY
TRIP3
VIN_SENSE3
LH3
OUT3_u
LL3
OUT3_d
OUTGND3
1
6
4
R489
0Ohm
0.1UF/25V
+1.8VGND
2
1
2
2
U60
T151
TPC32t
1
11/26
1
R902
2.7KOhm
1.8KOhm
0Ohm
/*
1
3
Q190B
UM6K1N
/*
5
1
C442
0.047U
R490
47pF/50V
1
R973
100KOhm
Q190A
UM6K1N
/*
2
1
2
ON_2.5
1
+1.5VGND
R895
2
R453
470KOhm
2
2
1
/*
1
R974
0Ohm
ON_2.5
R972
100KOhm
1
2
5600P
T154
TPC32t
1
AC_BAT_SYS
TPC32t T211
2
C850
D33
+1.8VGND
2
12.7KOhm
2
1
1
VREF5
D70
RB520S_30
1
1
R908
C853
C861
3300P
T98
TPC32t
0.1UF/25V
1
0.01uF/25V
4
0.47U
3
8/16
+1.8V
JP17
+1.8 VO
1.8UH
SI4894DY-TI
so8
2
2
GND
VREF5
1SS355
T118
TPC32t
(7A)
1
2
2
1
2
C856
10/11
T207
TPC32t
GND
R925
1
/*
D34
2
10.2KOhm
330Ohm
10.2KOhm
52,53,57 SUSB#_PWR
Q63
4
3
2
1
1
R903
2
12.4KOhm
GND
2
01/03
R907
1
R901
1
T208
TPC32t
L69
2
1
01/03
GND
1
2
R912
11.8KOhm
1
2
2
1
2
R904
10KOhm
1
1
2
6
09/23
C846
8200PF
C845
2
1
1
4
1
2
100KOhm
1
1
1
Q164B
UM6K1N
5
3
2
2
1
RB520S_30
12/28
SHORT_PIN
2
T204
TPC32t
+1.8VO
S
10/11
D69
330Ohm
Q164A
UM6K1N
2
JP19
1
SI4800BDY
G
2
R899
11KOhm
C862
3300P
R909
C911
0.1UF/25V
c0603
+1.8VGND
09/23
C864
6800P
12/28
+
Q66
D
ON_1.5
R905
0.1UF/25V
+
S
GND
VREF5
SUSB#_PWR
+1.8VO
G
0.01U
/*
1
D
+1.5VO
CE41
5.6UF/25V
2
1
5
6
7
8
2
C859
2
5
C847
CE40
5.6UF/25V
2
1
1
01/03
+1.5V
+2.5V
+VCC_GMCH_CORE
+5VALWAYS
+3VALWAYS
11/26
1
6
C848
2700P
Q165B
UM6K1N
1
1
3
0Ohm
OUT: +1.8V
AC_BAT_SYS
1
RB520S_30
/*
+3VO
T210
TPC32t
3
1
100KOhm
R900
IN: AC_BAT_SYS
POWER
Q165A
UM6K1N
2
2
2
10/11
D68
1
R906
2
SUSC#_PWR
52,57 SUSC#_PWR
1
TPC32t
T93
REVISION
2.1
DATE:
SHEET
B
51
OF
63
DESCRIPTION:
2.5V/1.5V/1.8V/1.05V
C
<OrgName>
DESIGN ENGINEER :
Amos Yu
RELEASE DATE :
D
E
5
4
3
2
1
+5VO
01/07
1
01/03
+3VS
1
R84
20Ohm
JP3
VGAGND
100KOhm
1
0Ohm
4
1844_OVP
UVP
9
1844_UVP
15
TON
OUT
6
FB
5
GND
2
1
1
2
2
soic_20p_25_344x237
D12
EC31QS04
+
GND
1
GND
3MM_OPEN_5MIL
C75
0.1UF/25V
c0603
JP33
1
1
2
2
C
GND
C917
0.1UF/25V
c0603
T111 T113 T110 T135
TPC32tTPC32tTPC32tTPC32t
1
C122
1UF/10V
c0603
Q17
01/04
2
+
01/03
CE4
1
8/16
R133
1KOhm
2
+3VS
1
1
2
01/07
GND
01/03
1
1
VGAGND
+5VO
GND
R114
1
+ATI_VCORE
2
0.56UH
01/03
GND
R144
150KOhm
JP4
1
OVP
REF
1
LATCH
8
1
2
1
DL
1
12
11
C121
1UF/10V
c0603
01/06
DL
1
1
2
13KOhm
ILIM
S
12/28
2
7
D
REF
R83
2
CS
G
1
R1014
1
1
220UF/2V
R143
D14
1SS355
SOD323
/*
CS
+ATI_VCORE
1
51,53,57 SUSB#_PWR
LX
SHDN
IRF7831
ILIM
R145 13KOhm
/*
PGOOD
3
T414
TPC32t
3MM_OPEN_5MIL
5
6
7
8
0Ohm
2
T273 T60
T52
T276
T413
TPC32t
8/30
L13
19
4
3
2
1
1
10
1
16,54 PWR_OK_VGA
2
2
1
1
0.1U
DH 0Ohm
1
20
2
DH
2
1
SKIP
2
2
17
R82
1
CE2
18
2
16
BST
IRF7413Z
V+
VCC
200Ohm
R998
MAX:15A
1.2V
+/30mV
GND
Q10
4
3
2
1
VDD
14
GND
01/03
12/28
C79
2
SHORT_PIN
2
13
R121
1
1844VCC
1
1
8/30
S
2
2
2
2
U9
4.7UF/6.3V
c0805
C95
D
R128
10KOhm
G
MAX1844EEP
SS0540
sod123
5
6
7
8
D13
GND
C
D
GND
1
1
0Ohm
51,57 SUSC#_PWR
+
2
R1000
0Ohm
/*
+
1
R999
CE44
5.6UF/25V
2
1
1
D
C39
0.1UF/25V
c0603
330UF/2V
1
1
C80
2200P
2
2
1844_OVP
CE43
5.6UF/25V
2
1
2
11/26
4.7UF/6.3V
c0805
GND
0Ohm
/*
1
0Ohm
AC_BAT_SYS
C72
R997
2
R1001
1844_UVP
C81
0.1UF/25V
C0603
2
2
1844VCC
1
T411
TPC32t
3
C
G
Q195
2 S 2N7002
/*
D
1
C135
0.1UF/25V
c0603
/*
Option 1 : remove R54 LVDDR=2.5V
Option 2 : remove R149 add R55 LVDDR=2.8V
1
G
2 S
2N7002
R102
+12VO
1
r0603
T46
2
0Ohm
/*
TPC32t
1
+2.5VS
B
T66
TPC32t
1
r0603
1
R89
GND
+1.8VS
R956
10Ohm
GND
1
2
1
C916
1UF/10V
c0603
/*
2N7002
2 S
Q113
16 ATI_PERF#
E
2 Q196
PMBS3904
/*
R1006
165KOhm
/*
Q112
D
1
2
B
D
1
G
3
1
1
3
1 B
3
1
PWR_OK_VGA
H:1.0V
L:1.2V
2
R1007
20KOhm
/*
T412
TPC32t
1
2
2
100KOhm
R1004
100KOhm
/*
2
0Ohm
LVDDR
1
2
5
NC
4
2
2
1
1
2
T132
TPC32t
C55
10UF/6.3V
1
1
1
R58
100KOhm
/*
+1.2VSP
JP7
GND
2
A
R957
4.75KOhm
2
VOUT
1
C53
0.1UF/25V
c0603
T89
TPC32t
1MM_OPEN_5MIL
1
VIN
VSS
ON/OFF
1
C898
0.1UF/25V
/*
A
1
2
3
C56
10UF/6.3V
2
1
1
R954
100KOhm
U3
/*
S_1111B28MC_NYN_TF
T91 10/11
TPC32t
+1.2VO
2
1
12/28
100KOhm
2
2
4
3
2
1
1
GND
1
Q183
SI4800DY
S
LM358ADR
SUSB#_PWR
GND
2
8
7
6
5
1
VCC
VOUT2
VIN2VIN2+
5
6
7
8
1
R52
VOUT1
VIN1VIN1+
GND
G
1
1
2
3
4
D
R955
107KOhm
/*
1
U71
2
2
12/28
11/26
+3VS
R73
127KOhm
GND
2
11/26
T30
TPC32t
C902
4.7U
2
T410
TPC32t
R952
64.9KOhm
1
C900
1UF/16V
+2.5VREF
REF
1
1
(100mA)
C901
22UF/6.3V
2
10/11
+1.2VO
GND
GND
bom
PROJECT: W3V
5
REVISION
2.1
DATE:
SHEET
4
52
OF
63
DESCRIPTION:
VGA VCORE
3
<OrgName>
DESIGN ENGINEER :
Amos Yu
RELEASE DATE :
2
1
A
B
TPC32t
T202
+3VSUS
SIGNAL IN: SUSB#_PWR
CPU_VRON
+1.5VAO
U57
+VCCP
1
2
3
6/14
OUT
5
ADJ
4
2
2
1
1
+3V
+1.8V
+VCC_GMCH_CORE
2
2
GND
1
C815
OUT: +0.9VS
+1.5VSUS
+VCCP
1
2.4KOhm
/*
IN: +3VALWAYS
POWER
1MM_OPEN_5MIL
N/A
R842
SI9183DT
/*
2
0.1UF/25V
IN
GND
EN
1
1
1
2
1
2
1
1
+1.5VSUS
JP31
C421
1
T346
TPC32t
2
1
1
E
T415
TPC32t
+1.5VAO
2MM_OPEN_5MIL
1
D
T344
TPC32t
Vref=1.215V
JP11
+1.05VO
C
TPC32t
T283
4.7u
/*
R843
TPC32t
T95
10KOhm
/*
1
TPC32t
T197
1
1
GND
2
2
+VCC_GMCH_CORE
2MM_OPEN_5MIL
1
+1.05VO
1
1
JP14
6/14
C470
2
0.1UF/25V
T150
TPC32t
1
GND
T164
TPC32t
+1.8V
1
1
1
1
D
2N7002
2
1
C298
S 2
Q46
G
D
3
2N7002
R290
1
S 2
2
2
1
G
10UF/6.3V
3
0Ohm
2
1
TPC32t
T387
C299
10UF/6.3V
2
100U/2V
T64
TPC32t
1
1
CE15
R281
100KOhm
Q45
3
1
RT9173ACL5
+0.9VO
3
6
5
4
VIN
VCNTL2
GND
VOUT
VCNTL1 REFEN
TPC32t
2
1
2
3
100KOhm
2
1
1
U22
R262
T163
TPC32t
T2
TPC32t
+
+3V
T156
+3V
100KOhm
1
1
2
1
2
2
3MM_OPEN_5MIL
R268
1
2
3MM_OPEN_5MIL
2
2
JP8
1
JP9
1
1
JP26
1
2
+1.8VS
3MM_OPEN_5MIL
2
+1.8V
+0.9VS
T26
TPC32t
+ATI_MEM
1
T6
TPC32t
SUSB#_PWR 51,52,57
1
GND
2
+5VALWAYS
R922
23.2KOhm
95 DEGREE C
1
R2
20KOhm
10KOhm
2
1
4
2
2
R921
5
OTP_RESET# 6,47
R3
100KOhm
1
TPC32t
T206
U68
NC
VCC
SUB
GND VOUT
R12
100KOhm
01/04
2
1
0.01U
1
2
3
4
+0.9VO
+5VALWAYS
1
1
C871
2
+3VS
GND
3
1
4
THERMAL PROTECTION
PLACE UNDER CPU
RT1 11/26
100KOhm
2 2 1 1
1
TPC32t
T140
3
C
PST9013
GND
G
2
D
1
1 B
E
2 Q1
PMBS3904
Q3
2 S 2N7002
1
R6
165KOhm
VTT_PWRGD 54
GND
5
5
bom
PROJECT: W3V
A
REVISION
2.1
DATE:
SHEET
B
53
OF
63
DESCRIPTION:
0.9VS/1.05VS/1.5VSUS
C
<OrgName>
DESIGN ENGINEER :
Amos Yu
RELEASE DATE :
D
E
A
B
C
D
E
+5VLCM
1
TPC32t TPC32t
C535
T247
GND
TPC32t
R621
47KOhm
1U
1
R620
100KOhm
1
2
3
VCC
NC
SUB
VOUT GND
4
TPC32t
T225
GND
PST9142
TPC32t
T220
1
TPC32t
T223
1
TPC32t
T272
1
T230
2
T228
SOT23_S5_NB
1
2
2
U40
5
100P
2
2
100P
TPC32t
SMC_BAT_PW
TPC32t
1
BAT_CTRL2
BAT_CTRL1
T242
GND
R581
1
T257TPC32t
T219
2
TPC32t
1MOhm
TPC32t
RST_BTN# 45
3
1
1
GND
3
C530
4MHZ
2
2
GND
T417
TPC32t
BAT_LLOW#_OC 32
1
1
2
1
D47
D44
BAT_CTRL2 56
CHG_CTRL 55
CHG_EN# 23,55
X6
1
1
T35
1
T39
SMD_BAT_PW
R536 0Ohm
1
2
1
2
PIC16C54C
TPC32t
T259
R551 0Ohm
1
2
1
C542
TPC32t
T43
1
C536
V0402MHS03
1
1
2
V0402MHS03
43,55,56 AC_APR_UC
43,55,56,58 TS1#
43,55,56,58 TS2#
55
BAT_1P
RA2
RA1
RA3
RA0
T0CKL
OSC1/CLKIN
MCLR#/Vpp OSC2/CLKOUT
Vss
Vdd
RB0
RB7
RB1
RB6
RB2
RB5
RB3
RB4
18
17
16
15
14
13
12
11
10
1
1
2
3
4
5
6
7
8
9
1
1
1
1
1
1
U38
BAT_LOW
BAT_LLOW
GND
D
Q101
2N7002
1U
BAT_LLOW
3
1
G
GND
CHG_EN_OC 43
T416
TPC32t
2 S
CHG_EN#
2
D
Q100
2N7002
1
G
2 S
T418
TPC32t
GND
GND
1
SMC_BAT_PW
PULL UP TO 3VA
BAT_LOW#_OC 43
SMD_BAT_PW
32,58 SMDATA_BAT2
3
32,58 SMDATA_BAT1
32,58 SMCLK_BAT2
BAT_LOW
1
1
53 VTT_PWRGD
U35A
2
3
C
14
T337
TPC32t
1
4
22,33,34,40,43,47,57 PM_SUSB#
T216
TPC32t
R525
1MOhm
T419
TPC32t
6
1
D1
1SS355
GND
1
GND
TS2#
G
5
2
1
2
1
R524
0Ohm
1
Q21
2N7002
1
C489
1UF/10V
5
1
POWERGD
4
D
Q72B
UM6K1N
Q72A
UM6K1N
2
E
2 PMBS3904
10KOhm
3
TPC32t
T3
1
2
3
Q20 3
C
1 B
R57
14
1MOhm
BAT2_OFF# 58
1
1
8,12,45,48,49 VRM_PWRGD
2 S
GND
BAT_CTRL2
7
GND
LV08A
2 S
Q25
2N7002
G
POWERGD 22
LV08A
PMBS3904
D
1
POWERGD
GND
GND
1
2
TS1#
T194
TPC32t
VCC
8
10
LV08A
VCC
U35C
R86
E
2
3
9
GND
U35D
11
13
49,51 1.8_2.5_1.5_1_PWRGD
Q23
2N7002
G
1 B
10KOhm
4
4
7
1
2
Q24
R87
2
U35B
VCC
5
12
D
1
GND
1
1
LV08A
50 3V_5V_PWRGD
C125
0.1uF/10V
BAT_CTRL1
T214
TPC32t
3
GND
7
BAT1_OFF# 58
3
8/5
1
6
16
15
14
13
12
11
10
9
+5VLCM
T215
TPC32t
7
QS3257
GND
3
2
16,52 PWR_OK_VGA
U12
VCC
E#
I0D
I1D
YD
I0C
I1C
YC
11/26
2 S
VCC
1
2
3
4
5
6
7
8
S
I0A
I1A
YA
I0B
I1B
YB
GND
3
14
GND
+3VS
14
T1
TPC32t
BAT_CTRL1
Q87
2N7002
G
32,58 SMCLK_BAT1
D
1
VSUS_OFF# 47
GND
2 S
6/14
GND
5
GND
bom
PROJECT: W3V
A
REVISION
2.1
DATE:
SHEET
B
54
OF
63
DESCRIPTION:
PIC16C54/BATCON/PWOK
C
<OrgName>
DESIGN ENGINEER :
Amos Yu
RELEASE DATE :
D
E
B
C
C492
0.1UF/25V
2
1
A/D_VIN
A/D_VIN_O
1
GND
D
E
A/D_DOCK_IN
C491
0.1UF/25V
2
1
A
1
T44
TPC32t
GND
2
CE45
5.6UF/25V
2
1
1
2
BAT
BAT
15mOhm
SI4800BDY
1
5750
7343
Q13
D9
EC31QS04
+ C31
15UF/25V
1
4
3
2
1
1
2
C516
0.047UF/16V
2
10KOhm
1
2
C524
3
GND
8/16
MAX1909_LDO
0.1UF/25V
1
CHG_GND
2
MAX1909_LDO
R576
100KOhm
MAX1909_LDO
1
For 1P/2P 6/14
R577
100KOhm
R552
100KOhm
T234
TPC32t
G
Charge Current Ichg = [0.075V/Rsense(CHG)]*[ICTL/3.6V]
Rsense(CHG)=0.015 ohm
VICTL= 1.8Vor 0.9
=> Ichg = 2.5A or 1.25A
D
Q94
54
2 S
43,54,56,58 TS1#
1
CHG_CTRL
G
2 S
IRLML2402
Q74
2N7002
1
G
T420
TPC32t
4
D
PKPRES#
1
3
Q78
2N7002
1
23,54 CHG_EN#
3
D
2 S
6
3
1
GND
1
Q93
2N7002
1
BAT_LEARN
11/26 G
43,54,56,58 TS2#
2 S
R989
100KOhm
VICTL< 0.8V or DCIN < 7V -->Charger Disable
Q79B
UM6K1N
5
C510
0.1UF/25V
D
1
2
32
1
3
3
Mode pin : Vmode > 2.8V (trie to LDO pin) ----> 4 Cells
2.0 > Vmode > 1.6V (floating) ----> 3 Cells
0.8 > Vmode (trie to GND)
----> Learning mode
Q79A
UM6K1N
2
MODE
T217
TPC32t
2
Vbatt = Cell * { Vref +[ (VCTL- 1.8V) / 9.52 ] }
VCTL= 1.576V
=> Vbatt = 4.2V
4
Adapter Iin(max) = [0.075V/Rsense(ADin)]*[VCLS/VREF]
Rsense(ADin)=0.02 ohm
VCLS=3.685V
=> Iin(max)=3.27A
=> Constant Power = 19 * 3.27 = 62.13W
1
1
1
1
2
GND
4
1
1
1
2
5
6
7
8
R26
1
10UH
1
R589
2
0.01U
C528
1
C529
0.1UF/25V
1
2
R598
20KOhm
2
6/14
GND
GND
Hi = 1P (1.25A),
Low = 2P (2.5A)
T15
TPC32t
2
IINP
CLS
ICTL
VCTL
CCI
CCV
CCS
L5
IINP
1
1
2
R604
T255
TPC32t
1
1
GND
BAT_1P
36.5KOhm
2
2 S
GND
54
R619
Q77
2N7002
G
14.7KOhm
2
R592
137KOhm
D
1
1
1
TPC32t
2
T232
TPC32t
01/04
CHG_CCV
3
T224
T33
TPC32t
U36
MAX1909
6/14
10.5KOhm
1
2
5
6
7
8
29
28
27
26
25
24
23
22
GND2
PDL
PDS
CSSP
CSSN
SRC
DHI
DHIV
T253
TPC32t
GND
1
1
JP2
1
2
2
C517
GND
T48
TPC32t
GND
C507 0.1UF/25V
1
2
21
20
19
18
17
16
15
DLOV
DLO
PGND
CSIP
CSIN
BATT
GND1
8
9
10
11
12
13
14
1
1U
1
1U
1
1U
2
C504
2
C497
2
R591
1
1
53.6KOhm
2
R605
1
2
20KOhm
R603
19.6KOhm
26.7KOhm
R569
2
R566
2
GND
T123
TPC32t
SHORT_PIN
S
T254
TPC32t
3
MODE
C912
0.1UF/25V
c0603
CHG_GND
D
6/18
DCIN
LDO
ACIN
REF
PKPRES#
ACOK
MODE
11/26
R526
33Ohm
G
1
6/18
T229
TPC32t
2
1
1
1
2
3
4
5
6
7
1909_REF
+
SI4835BDY
6/14
1
1
1
2
2
R570
D38
1SS400 MAX1909_LDO
T252
TPC32t
1
100KOhm
6/14
LDO : 5.4V
REF : 4.2235V
PKPRES#
AC_IN Threshold 2.089Vmax
A/D_DOCK_IN > 9.913V
active
+
D
6/16
C493 0.1UF/25V
R590
100KOhm
Q8
S
GND MAX1909_LDO
G
A/D_VIN_O
GND
T236
TPC32t
2
2
A/D_DOCK_IN
4
3
2
1
MAX1909_LDO
43,54,56 AC_APR_UC
CE46
5.6UF/25V
2
1
1
C490
1U
CHG_GND
2
AC_BAT_SYS
1
56 MAX1909_PDS
GND
6/18
5
1
Pre_CHG_V = 3.1mV
Pre_CHG_I = 300mA
GND
bom
PROJECT: W3V
A
REVISION
2.1
DATE:
SHEET
B
55
OF
63
DESCRIPTION:
CHARGER
C
<OrgName>
DESIGN ENGINEER :
Amos Yu
RELEASE DATE :
D
E
5
A
B
C
D
E
+5VO
A/D_VIN
1
1
T50
+2.5VREF
TPC32t
+2.5VREF
C608
1U
2
1UF/10V
2
R643
30KOhm
+5VCHG, +5VLCM, +2.5VREF
1
R663
10KOhm
2
6
2
GND
2
+5V
C546
1U
3
2
2
C560
1
1
C594
1U
TPC8107
1
R662
4.7KOhm
1
G
BAT
2
F02JK2E
T421
TPC32t
LM3480
/*
LM4040BIM3X
L78L05ACUTR
8
7
6
5
+5VCHG
1
2
OUT
1
IN
1
GND
2
GND
3
IN
U41
10KOhm
OUT
1
R523
MAX1909_PDS 55
Q86
D
1
3
2
2
S
+5VCHG
AC_BAT_SYS
+5VLCM
1
2
1SS355
1
U42
3
1
2
3
4
1
D39
1
EA60QC04_TE16F
1
R642
1U
A/D_VIN
2
2
T279
TPC32t
1
6/14
TPC8107
C494
2
3
2
D51
T9
TPC32t
1
2
20mOhm
1
U45
1
1
T10
TPC32t
2
G
R34
1
8
7
6
5
T11
TPC32t
22KOhm
1
2
3
4
12/28
D10
1
1
Q11
S
D
1
T5
TPC32t
1
2
A/D_DOCK_IN
T20
TPC32t
1
1
1
46,55 A/D_DOCK_IN
T21
TPC32t
1
T25
TPC32t
T16
TPC32t
+5VCHG
A/D_VIN_O
T31
TPC32t
GND
R641
1KOhm
1
AC_BAT_SYS
1
1
Q19
3 2N7002
2
D
1
ACIN#
T34
TPC32t
R594
1
1
2
1
E
2
+5VLCM
T59
TPC32t
Q180
PMBS3904
+5VLCM
T72
TPC32t
1
1
4
BAT2_IN#_OC 32
3
100KOhm
1
R687
2
R681
Q109A
UM6K1N
5
3
Q109B
UM6K1N
5
5
4
Q111B
UM6K1N
C590
1
43,54,55,58 TS2#
C595
1000PF/16V
2
1
2N7002
Q111A
UM6K1N
1000PF/16V
2
1
2
43,54,55,58 TS1#
AC_APR_UC 43,54,55
1
1
6
4
T41
TPC32t
1
2
GND
100KOhm
1
1
BAT1_IN#_OC 32
2
6
1
2
R669 100KOhm
1
2
T96
TPC32t
R676 100KOhm
2
1
47KOhm R597
1
2
1
4.7u
C551
2
1
0.1UF
ADAPTER IN CIRCUIT
SHUT_DOWN# 47
GND
C519
0.1UF
1
1
2
1
100KOhm
1
1
2
2
1SS355
D43
1
2
GND
(11.6V)
1 B
2
1
100KOhm
R615
TPC32t
T213
2
C553
0.1UF/25V
S
2 Q95
10KOhm
2
1
G
C511
2
1
2N7002
R1005
LMV331
Q22
DTC144EK
3
C
Q98
PMBS3906
C543
0.1UF/25V
2
D
R578
100KOhm
1
1SS355
R624
100KOhm
1
2
2 S Q97
3
2
15KOhm
2
3
GND
2
R599
205KOhm
1
-
2
1
3
G
4
+
D46
3
1
V+
1
D
1
5
U37
R565
2
1
4.7KOhm
3
2
1
470KOhm
R585
2
1
2
R584
243KOhm
R618
3
C
RB715F
01/03
0923
1 B
D42
+2.5VREF
2
R606
47KOhm
E
2
+5VCHG
4
R-2
47K
AC_BAT_SYS
BAT
+5VLCM
47K
E
+5VLCM
1
R49
MAIN BATTERY SHUNT
DOWN=11.53V
SECOND BATTERY SHUNT
DOWN=8.575V
R-1
0.1UF/25V
B
2
3
C
C48
47
10KOhm
AC_BAT_SYS, BATTERY LEARN CIRCUIT
TPC32t
T28
G
1
S 2
2
GND
3
R50 68KOhm
ACIN_OC
01/14
R74
4
32
1
1
3
T32
TPC32t
Q99B
UM6K1N
5
100KOhm
Q99A
UM6K1N
2
AC_APR_UC
A/D_DOCK_IN
5
GND
GND
54
BAT_CTRL2
GND
BATTERY SHUT_DOWN
BATTERY IN CIRCUIT
bom
PROJECT: W3V
A
REVISION
2.1
DATE:
SHEET
B
56
OF
63
DESCRIPTION:
BATLOW#/SD#
C
<OrgName>
DESIGN ENGINEER :
Amos Yu
RELEASE DATE :
D
E
C
D
01/03
+3VO
1
1
2
+3VSUS
JP6
1
2
+1.8VS
1
2
2
1MM_OPEN_5MIL
2MM_OPEN_5MIL
SI4800BDY
T188
TPC32t
+5VO
1
1
T19
TPC32t
JP16
1
2
3
4
G
E
T290
TPC32t
2
12/28
R462
24KOhm
C440
0.022U
1
1
2
1
+5VSUS
JP10
12/28
1
+1.8VO
S
1
Q62
D
8
7
6
5
T422
TPC32t
1
B
1
A
2
2
1MM_OPEN_5MIL
GND
01/03
1
TPC32tTPC32t
T277 T278
1
2
3
4
1
E
1
C712
01/03
R1003 0Ohm
1
R1002
1
47,50 VSUS_ON
1
2
2
2
GND
OUT
5
EN LEAA ADJ
MIC5233BM5
4
R168
845KOhm
2
C185
1U
/*
R173
95.3KOhm
0Ohm
1
1
SUSC#_PWR
TPC32t
T235
IN
2
3
GND
0.1UF/25V
1
1
+5VS
+12VO
2
1
2
2
1
2
1
U14
3MM_OPEN_5MIL
GND
GND
8/3
+12VS
2
B
R175
100KOhm
/*
R170
10K
B
2
47K
+3VALWAYS
1
6
1
100KOhm
C
0Ohm
1
51,52,53 SUSB#_PWR
1
4
R167
10KOhm
C191
0.1U
1
2
JP30
2
0.1UF/25V
/*
GND
1
R179
47K
2
E
T92
TPC32t
2
1
22,33,34,40,43,47,54 PM_SUSB#
T311
TPC32t
GND
47K
3
T218
TPC32t
C
1
2
T120
TPC32t
2
1
Q39
UMC4N
+12VO
TPC32t
T307
D75
RB520S_30
1/*
2
SUSB#_PWR_ON
TPC32t
T94
C913
TPC32t
0.1UF/25V T306
/*
12/28
1
C705
SI4800BDY
+3VS
AC_BAT_SYS
GND
2
2
2
0.1UF/25V
1
G
R990
0Ohm
r0603
1
3MM_OPEN_5MIL
1
1
2
3
4
11/26
1
Q123
D
S
8
7
6
5
1
C636
2
1
+5VO
TPC32t
T289
1
TPC32t
T121
1
1
SI4800BDY
2
2
G
T284
TPC32t
JP24
1
1
+3VO
Q114
D
S
8
7
6
5
1
TPC32t
T86
1
TPC32t
T84
1
GND
TPC32t
T82
2
1
TPC32tTPC32t
T81
T73
1
2
C162
2
+3V
3
C114 3MM_OPEN_5MIL
1
2
0.1UF/25V
1
10KOhm
1
+12V
4
10K
2
3
1
+3VALWAYS
5
100KOhm
/*
SUSC#_PWR
GND
GND
Q30B
UM6K1N
5
4
1
R976
1
2
C160
1UF/16V
6
C
1
E
1
51,52 SUSC#_PWR
Q30A
UM6K1N
R146
100KOhm
R154
100KOhm
01/04
1
2
B
B
2
47K
SUSC#_PWR_ON
R158
100KOhm
E
C
4
2
47K
T288
TPC32t
2
0Ohm
1
2
22,43,44,47,48 PM_SUSC#
1
R155
+3VALWAYS
0.1UF/25V
47K
3
T4
TPC32t
C679
TPC32t
T282
2
R149
1
+12VO
+5V
GND
8/16
Q29
UMC4N
GND
2
2
R177
2
SUSC#_PWR_ON
0Ohm
1/*
2
3MM_OPEN_5MIL
1
01/03
5
2
1
C680
1
1
1
1
01/14
GND
TPC32t
T107
SUSB#_PWR
4
GND
JP27
SI4800BDY
4
TPC32t
T56
2
TPC32tTPC32t
T296 T292
SI4800BDY
Q119
D
S
1
2
3
4
G
1
8
7
6
5
1
1
+5VO
TPC32t
T54
0.47U
Q31B
UM6K1N
0.1UF/25V
TPC32t
T134
Q31A
UM6K1N
2
1
1
1
1
2
3
4
1
JP5
1
1
1
+3VO
Q27
S
8 D
7
6
5
G
1
01/03
TPC32t
T88
6
100KOhm
TPC32t
T90
3
SUSB#_PWR_ON
R157
GND
1
GND
1
100KOhm
/*
6
R977
2
2
1
+3VALWAYS
3
GND
GND
5
bom
PROJECT: W3V
A
REVISION
2.1
DATE:
SHEET
B
57
OF
63
DESCRIPTION:
LOAD SWITCH
C
<OrgName>
DESIGN ENGINEER :
Amos Yu
RELEASE DATE :
D
E
A
B
C
D
E
T173
TPC32t
R840 0Ohm
1
2
1
TPC32t
R546 0Ohm
1
2
BAT1_OFF# 54
1
C816
Change to new
BAT
CN31
150Ohm/100Mhz
1
1
TPC32t
T8
BATT_CON_8P
2
SMCLK_BAT1 32,54
0Ohm
R547
1
T13
1
2
T174
6
5
4
3
2
R548
T179
T180
BATT_CON_6P
2
TS1#
SMDATA_BAT2 32,54
TPC32t
R853 0Ohm
1
2
1
1
2
SMCLK_BAT2 32,54
R851 0Ohm
1
2
R549
1
BAT
L110 150Ohm/100Mhz
R848 0Ohm
1
2
TPC32t
1
SMDATA_BAT1 32,54
0Ohm
TPC32t
1
TPC32t
1
TPC32t
2
1
1
1
1
100P
GND
1
T14
1
1
1
2
3
4
5
6
7
8
1
L78
CN18
1
2
3
4
5
6
7
8
100P
T340 T343
TPC32tTPC32t
1
GND
T338 T172
TPC32tTPC32t
1
T231
2
T227
2
8/16
C498
T222
1
1
T221
BAT2_OFF# 54
1
1
T12
43,54,55,56
TS2#
43,54,55,56
0Ohm
100P
1
100P
C814
2
100P
C819
2
0.1UF/25V
2
0.1UF/25V
C818
2
C817
1
1
1
C341
100P
1
1
1
1
GND
1
C351
2
T310
T309 TPC32t T308
TPC32t
TPC32t
2
100P
T321
TPC32t
1
1
C506
100P
2
100P
C501
2
2
100P
1
1
1
0.1UF/25V
2
0.1UF/25V
2
T322
TPC32t
C499
1
1
1
C502
C500
T386
TPC32t
1
C496
2
T116 T323
TPC32tTPC32t
1
2
1
2
GND
GND
GND
3
3
4
4
5
5
bom
PROJECT: W3V
A
REVISION
2.1
DATE:
SHEET
B
58
OF
63
DESCRIPTION:
PIC16C54/BATCON/PWOK
C
<OrgName>
DESIGN ENGINEER :
Amos Yu
RELEASE DATE :
D
E
A
B
A/D_DOCK_IN
L78L05
(Regulator)
C
+5VCHG (20mA)
D
+5VLCM
SWITCH
(F02JK2E)
LM4040BIM
(Regulator)
1
VSUSON
+3VO
AC_BAT_SYS
LTC3728LX
(Controllor)
(6A)
+3VSUS
E
SI9183DP
(Regulator)
+2.5VREF
1
+1.5VSUS
+12VO (100mA)
+5VO (4.2A)
+5VSUS
SUSC#_PWR
(UMC4N)
+12V
2
2
+5V
(SI4800DY)
+3V
SUSB#_PWR
SUSC#_PWR
+5VO
+1.8VO (7A)
+1.8V
+1.5VO (4A)
+1.5V
+2.5VO (3A)
+2.5V
RT9173ACL5 +0.9VS
(Regulator)
3
3
TPS5130
(Controllor)
VREF3
+3VA
VREF5
+5VA
CPU_VRON
+1.05VO (6A)
+VCCP
SWITCH
(PMN45EN)
+VCC_GMCH_CORE
SUSB#_PWR
(UMC4N)
+12VS
+5VS
4
4
+3VS
+1.5VS
(SI4800DY)
+2.5VS
CPU_VRON
+5VO
MAX1987
(Controllor)
+VCORE
(27A)
VRM_PWRGD, CLK_EN#
5
5
bom
VR_VID0 - VR_VID5, STP_CPU#, PM_DPRSLPVR, PM_PSI#
Title :
ASUSTeK COMPUTER INC
Size
Custom
Project Name
B
C
D
Rev
W3V
Date: Wednesday, January 26, 2005
A
POWER FLOWCHART
Engineer:
2.1
Sheet
E
59
of
63
A
B
C
D
E
Revision History
R1.1
1
1
SYSTEM
1. (p48) Modify CPU +VCCA
2. (p45,47) Fix auto power on when AC in in AC mode
3. (p45,57) Solve U56 easily damaged
4. (p8) Add R941 for BIOS internal VGA strapping
5. (p8) U48, D30 change from ICH6_PWROK to VRM_PWRGD (p12) R363 change to 10K, C893=0.47uF
6. (p20) Fix PID1 can't strapped low
7. (p45) Modify power sequence of +3VSUS -> PM_RSMRST#
8. (p47) Fix that +3VSUS/+5VSUS may be turned on for a while when the power comes in at the first time
9. (p16) Fix TV out can't work
10. Add Bluetooth support
11. (p24) DEL reserved V5REF_SUS circuit
12. (p12) ADD net "CPUSEL0/1" for layout
13. (p37) Change X7 part
14. (p23) Add R949 to reduce overshoot
15. (p34) Solve pop noise in Windows boot
16. (p47) Power button debounce
17. Tune X'tal freq. (p22) C353/C356 (p26) C350/C354 (p32) C78/C93 (p41) C355/C360
18. (p27) Change CN32 part
19. (p43) Change R924 to +5VLCM to solve +5V leakage in power off.
20. (p20) Tune LCD_VCC timing
21. (p44) Modify CN10 pin define for ID change
22. (p23,34) Add ALC861VS PC-Beep support
23. (p33) ADD T388, U61.3 ADD "AUD_GPIO0" (p34) DEL R482, ADD U72
24. (p34,35) DEL net "MIC_AGND_A"
25. (p39) ADD voltage divider for Mic VREF
26. (p34) for EMI request
27. (p47) VSUS_OFF#
28. (p45) Modify power on sequence
29. (p43,p32) Reserved for bluetooth LED
30. (p39) Reserved PCI_INTC# for MINI-PCI.
31. (p29) Solve USB power surge warning when USB HDD plug-in
32. (p28) Support CSEL+ ODD
33. (p6) GMCH_THRMTRIP# no function in high temperature
34. (p10) unstuff for W3V
35. (p17) Adjust ATI 27MHz Vhigh
36. (p23) Aviod logic output unstable
37. (p4) Fix BT_VCC unstable
38. (p40) Tune clock timing
39. (p43) Tune LED current for LED spec
40. (p46) Adjust for +5VS_FAN stable
41. (p47) Fix can't power on in batttery mode
2
3
2
3
POWER
1 (p49) Add R942, MCH_OK connect to 1.8_2.5_1.5_1_PWRGD, C248, R233 unstuff
R2.0
SYSTEM
1. (p20) Adjust BACK_EN Vhigh
2. (p48) Change MDC nut
3. (p22,38,43) DEL BT_ON#, control BT_VCC by BT_LED#
4. (p29) Adjust for USB-IF spec
5. (p32) Solve SMBus loss pull-high power in power-off.
6. (p23) Reduce PCI_RSTNS# overshoot
7. (p23) Reduce 2V step on PCI_RST#
8. (p12) Tune W3V clock
9. (p25) Update PCB_VID
10. (p47) Solve system can't power on in battery mode
11. (p48) Modify +1.8VS_VCCA gate ckt
12. (p20) Avoid U28 damage
13. (p34) Remove reserved Windows de-pop Ckt
14. (p16) Tune W3A HSYNC/VSYNC timing
15. (p21) Tune W3V HSYNC/VSYNC timing
16. (p28) Modify for swap bay detection.
17. (p34) For EMI
18. (p20) For EMI
19. (p48) For PD4
20. (p21) For ME
21. (p33) DEL net "AUD_GPIO0"
4
5
4
5
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
Wednesday, January 26, 2005
60
OF
63
DESCRIPTION:
History
C
<OrgName>
DESIGN ENGINEER :
Alice Shih
RELEASE DATE :
D
E
5
4
3
2
1
D
D
DC IN
C
C
CONDC1
1
2
3
P_GND1
NP_NC
P_GND
4
5
6
GND
DC_PWR_JACK_3P
9
8
7
6
5
4
3
2
1
GND2
11
GND1
10
HDC1
C197D87
1
9
8
7
6
5
4
3
2
1
JDC1
GND
GND
GND
WTOB_CON_9P
B
B
A
A
bom
PROJECT: W3V
5
REVISION
2.1
DATE:
SHEET
4
61
OF
DESCRIPTION:
DC_IN CONNECTOR
63
3
<OrgName>
DESIGN ENGINEER :
Renyu Wang
RELEASE DATE :
2
1
A
B
C
D
E
W3V ODD Board
1
1
Block Diagram
ODD Board Connector
ODD CONN.
2
2
ODD CONN.
ODD BOARD CONN.
+5VDOCK_ODD
+5VDOCK_ODD
CONODD1
BAYDOCK_IN#_ODD
IDE_PDD1_ODD
IDE_PDDREQ_ODD
IDE_PDD0_ODD
IDE_PDIOR#_ODD
IDE_PDIOW#_ODD
IDE_PDDACK#_ODD
IDE_PIORDY_ODD
IDE_PDIAG_ODD
INT_IRQ14_ODD
IDE_PDA2_ODD
SATA_SWAP_TXN2_ODD
SATA_SWAP_TXP2_ODD
IDE_PDCS3#_ODD
IDE_PDA1_ODD
SATA_SWAP_RXN2_ODD
SATA_SWAP_RXP2_ODD
IDE_PDA0_ODD
CONODD2
SIDE2
64
BAY_IN1_ODD
SATA_DET_#2_ODD
NP_NC4
NP_NC3
NP_NC2
NP_NC1
SIDE_L
SIDE_R
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
CD_R_A_ODD
CD_L_A_ODD
CD_GND_A_ODD
CD_GND_A_ODD
IDE_PDD8_ODD
IDERST#_5S_ODD
IDE_PDD9_ODD
IDE_PDD7_ODD
IDE_PDD10_ODD
IDE_PDD6_ODD
IDE_PDD11_ODD
IDE_PDD5_ODD
IDE_PDD12_ODD
IDE_PDD4_ODD
IDE_PDD13_ODD
IDE_PDD3_ODD
IDE_PDD14_ODD
IDE_PDD2_ODD
IDE_PDD15_ODD
3
SATA_SWAP_RXP2_ODD
SATA_SWAP_RXN2_ODD
SATA_SWAP_TXP2_ODD
SATA_SWAP_TXN2_ODD
BAYDOCK_IN#_ODD
4
BtoB_60P
1
NP_NC2
IDE_PDASP#_ODD
BAY_IN0_ODD
IDE_PCSEL_ODD
PIN22_+5V_PH_ODD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
CODD4 CODD5 CODD2 CODD3 CODD1
0.1U
/*
0.1U
/*
0.1U
/*
0.1U
/*
0.1U
/*
2
62
IDE_PDCS1#_ODD
IDE_PDD15_ODD
IDE_PDD2_ODD
IDE_PDD14_ODD
IDE_PDD3_ODD
IDE_PDD13_ODD
IDE_PDD4_ODD
IDE_PDD12_ODD
IDE_PDD5_ODD
IDE_PDD11_ODD
IDE_PDD6_ODD
IDE_PDD10_ODD
IDE_PDD7_ODD
IDE_PDD9_ODD
IDERST#_5S_ODD
IDE_PDD8_ODD
CD_GND_A_ODD
CD_GND_A_ODD
CD_L_A_ODD
CD_R_A_ODD
2
BAY_IN1_ODD
SATA_DET_#2_ODD
1
4
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
2
IDE_PDASP#_ODD
BAY_IN0_ODD
IDE_PCSEL_ODD
PIN22_+5V_PH_ODD
63
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
1
IDE_PDCS1#_ODD
SIDE1
2
IDE_PDA0_ODD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
1
IDE_PDCS3#_ODD
IDE_PDA1_ODD
NP_NC1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
2
3
61
1
IDE_PDD1_ODD
IDE_PDDREQ_ODD
IDE_PDD0_ODD
IDE_PDIOR#_ODD
IDE_PDIOW#_ODD
IDE_PDDACK#_ODD
IDE_PIORDY_ODD
IDE_PDIAG_ODD
INT_IRQ14_ODD
IDE_PDA2_ODD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
BtoB_CON_60P
5
5
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
62
OF
63
DESCRIPTION:
ODD BOARD
C
<OrgName>
DESIGN ENGINEER :
Joe Wu
RELEASE DATE :
D
E
A
B
C
D
W3V TP & LED
E
Board
1
1
TOUCHPAD & LED BOARD CONN.
Block Diagram
15
GND1
TP Board Connector
2
16
TP CONN.
TP CONN.
CONTP3
TP Button
GND2
CONTP2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
RIGHT_TP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
INTCLK_5S_TP
INTDATA_5S_TP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
LEFT_TP
+5VS_TPD_TP
INTCLK_5S_TP
INTDATA_5S_TP
WIRELESS_LED_TP
HDD_LED_TP
CHG_LED_TP
PWR_LED_TP
+5VS_TPD_TP
1
2
3
4
5
6
7
8
9
10
11
12
NC1
NC2
2
FPC_CON_12P
FPC_CON_14P_TP&LED
LED CONN.
3
3
TOUCHPAD BUTTON
LED CONN.
CONTP1
RIGHT
SWTP1
SWTP2
5
1
6
2
5
1
7
2
1mA/5V
4
1
3
0.1U
/*
RIGHT_TP
CTP2
1mA/5V
2
4
1
3
1
2
3
4
5
6
6
2
8
LEFT_TP
CTP1
SIDE1
4
1
2
3
4
5
6
R2.1
PWR_LED_TP
CHG_LED_TP
HDD_LED_TP
HTP1
C91D91N
/*
HTP2
C91D91N
/*
WIRELESS_LED_TP
SIDE2
1
LEFT
1
4
FPC_CON_6P
0.1U
/*
5
5
bom
PROJECT: W3V
A
REVISION
DATE:
2.1
SHEET
B
63
OF
63
DESCRIPTION:
TP&LED BOARD
C
<OrgName>
DESIGN ENGINEER :
Joe Wu
RELEASE DATE :
D
E

W3V/A SCHEMATIC V2.1

Transcription

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