LED LCD TV SERVICE MANUAL

Transcription

LED LCD TV SERVICE MANUAL
Internal Use Only
North/Latin America
Europe/Africa
Asia/Oceania
http://aic.lgservice.com
http://eic.lgservice.com
http://biz.lgservice.com
LED LCD TV
SERVICE MANUAL
CHASSIS : LD01A
MODEL : 26LE3300
MODEL : 26LE3308
MODEL : 26LE330N
26LE3300-ZA
26LE3308-ZA
26LE330N-ZA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
/I
P
P/NO : MFL62863040 (1003-REV00)
OK
MENU
INPUT
Printed in Korea
CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION ................................................................ 9
BLOCK DIAGRAM...................................................................................15
EXPLODED VIEW .................................................................................. 17
SVC. SHEET ...............................................................................................
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-2-
LGE Internal Use Only
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
AC Volt-meter
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-3-
To Instrument's
exposed
METALLIC PARTS
0.15 uF
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
1.5 Kohm/10W
When 25A is impressed between Earth and 2nd Ground
for 1 second, Resistance must be less than 0.1 Ω
*Base on Adjustment standard
LGE Internal Use Only
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions on
page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an
explosion hazard.
2. Test high voltage only by measuring it with an appropriate high
voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily
by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors and
semiconductor "chip" components. The following techniques
should be used to help reduce the incidence of component
damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
unit under test.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
2. After removing an electrical assembly equipped with ES
devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or
exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads
electrically shorted together by conductive foam, aluminum foil
or comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged
replacement ES devices. (Otherwise harmless motion such as
the brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity
sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500 °F to 600 °F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 °F to 600 °F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500 °F to 600 °F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the
component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.
-4-
LGE Internal Use Only
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the
circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently
prying up on the lead with the soldering iron tip as the solder
melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the
IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as
possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC
connections).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
copper pattern. Solder the overlapped area and clip off any
excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly
connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-5-
LGE Internal Use Only
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
3. Test method
1. Application range
This specification is applied to the LED LCD TV used LD01A
chassis.
2. Requirement for Test
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety: CE, IEC specification
- EMC:CE, IEC
Each part is tested as below without special appointment.
1) Temperature
: 25 ºC ± 5 ºC (77 ºF ± 9 ºF), CST : 40 ºC ± 5 ºC
2) Relative Humidity : 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~ 50 / 60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
4. Module General Specification
No.
Item
Specification
Remark
1
Display Screen Device
66 cm(26 inch) wide color display module
2
Aspect Ratio
16:9
3
LCD Module
66 cm(26 inch) TFT LCD Edge LED HD
4
Storage Environment
Temp. : -20 deg ~ 60 deg
LED LCD
Humidity : 10 % ~ 90 %
5
Input Voltage
AC 100-240 V~ 50 / 60 Hz
6
Power Consumption
Power on (Blue)
LCD (Module) + Backlight(LED)
LGD
Typ : 35.66 W
0.1405 mm x 0.4215 mm
8
Pixel Pitch
LGD
9
Back Light
Edge LED
10
Display Colors
1.06 Billion(FHD LGD),16.7 M (others)
11
Coating
3H, AG
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-6-
LGE Internal Use Only
5. Module optical specification
No.
Item
Specification
Min.
Typ.
1.
Viewing Angle [CR>10]
Right/Left(Up/Down)
178
2.
Luminance
Luminance (cd/m2)
320
400
3.
Contrast Ratio
CR
700
1000
4.
CIE Color Coordinates
RED
Rx
0.621
Ry
0.345
Gx
Blue
White
Remark
Degree
Variation
Green
Max.
1.3
MAX /MIN
0.335
Gy
Typ.
0.620
Typ.
Bx
-0.03
0.152
+0.03
By
0.048
Wx
0.279
Wy
0.292
1) Standard Test Condition (The unit has been ‘ON’)
2) Stable for approximately 30 minutes in a dark environment at 25 ºC ± 2 ºC.
3) The values specified are at approximate distance 50 cm from the LCD surface.
4) Ta= 25 ºC ± 2 ºC, VLCD= 5.0 V, fV= 60 Hz, Dclk= 74.25 MHz, EXTVBR-B= 100 %
6. Component Video Input (Y, CB/PB, CR/PR)
Specification
No.
Resolution
1.
720x480
Remark
H-freq(kHz)
15.73
V-freq(Hz)
60.00
SDTV,DVD 480i
2.
720x480
15.63
59.94
SDTV,DVD 480i
3.
720x480
31.47
59.94
480p
4.
720x480
31.50
60.00
480p
5.
720x576
15.625
50.00
SDTV,DVD 625 Line
6.
720x576
31.25
50.00
HDTV 576p
7.
1280x720
45.00
50.00
HDTV 720p
8.
1280x720
44.96
59.94
HDTV 720p
9.
1280x720
45.00
60.00
HDTV 720p
10.
1920x1080
31.25
50.00
HDTV 1080i
11.
1920x1080
33.75
60.00
HDTV 1080i
12.
1920x1080
33.72
59.94
HDTV 1080i
13.
1920x1080
56.250
50
HDTV 1080p
14.
1920x1080
67.5
60
HDTV 1080p
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-7-
LGE Internal Use Only
7. RGB (PC)
Specification
No.
Resolution
Proposed
H-freq(kHz)
V-freq(Hz)
Pixel Clock(MHz)
1.
720*400
31.468
70.08
28.321
2.
640*480
31.469
59.94
25.17
Remark
For only DOS mode
Input 848*480 60 Hz, 852*480 60 Hz
VESA
-> 640*480 60 Hz Display
3.
800*600
37.879
60.31
40.00
VESA
4.
1024*768
48.363
60.00
65.00
VESA(XGA)
5.
1280*768
47.78
59.87
79.5
WXGA
6.
1360*768
47.72
59.8
84.75
WXGA
7.
1366*768
47.56
59.6
84.75
WXGA
WXGA Model
8.
1280*1024
63.595
60.0
108.875
SXGA
FHD model
9.
1280*720
45
60
74.25
720p
DTV Standard
10.
1920*1080
66.587
59.93
138.625
WUXGA
FHD Model
FHD model
8. HDMI Input
(1) DTV Mode
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
59.94 /60
Pixel clock(MHz)
27.00/27.03
Proposed
1.
720*480
31.469 /31.5
2.
720*576
31.25
50
54
SDTV 576P
3.
1280*720
37.500
50
74.25
HDTV 720P
4.
1280*720
44.96 /45
59.94 /60
74.17/74.25
HDTV 720P
5.
1920*1080
33.72 /33.75
59.94 /60
74.17/74.25
HDTV 1080I
6.
1920*1080
28.125
50.00
74.25
HDTV 1080I
7.
1920*1080
26.97 /27
23.97 /24
74.17/74.25
HDTV 1080P
8.
1920*1080
33.716 /33.75
29.976 /30.00
74.25
HDTV 1080P
9.
1920*1080
56.250
50
148.5
HDTV 1080P
10.
1920*1080
67.43 /67.5
59.94 /60
148.35/148.50
HDTV 1080P
Remark
SDTV 480P
(2) PC Mode
No.
Resolution
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
Remark
1.
720*400
31.468
70.08
28.321
2.
640*480
31.469
59.94
25.17
VESA
HDCP
3.
800*600
37.879
60.31
40.00
VESA
HDCP
4.
1024*768
48.363
60.00
65.00
VESA(XGA)
HDCP
5.
1280*768
47.78
59.87
79.5
WXGA
HDCP
6.
1360*768
47.72
59.8
84.75
WXGA
HDCP
7.
1440*1050
55.5
59.90
88.750
WSXGA
Not used(Moniter Panel)
8.
1400*1050
64.744
59.948
101.00
WSXGA
Not used(Moniter Panel)
HDCP
9.
1680*1050
65.16
59.94
147.00
WSXGA
Not used(Moniter Panel)
10.
1280*1024
63.595
60.0
108.875
SXGA
HDCP/FHD model
11.
1920*1080
67.5
60.00
138.625
WUXGA
HDCP/FHD model
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-8-
LGE Internal Use Only
ADJUSTMENT INSTRUCTION
1. Application Range
(2)
(3)
This specification sheet is applied to all of the LED LCD TV
with LD01A chassis.
2. Designation
1) The adjustment is according to the order which is
designated and which must be followed, according to the
plan which can be changed only on agreeing.
2) Power Adjustment: Free Voltage
3) Magnetic Field Condition: Nil.
4) Input signal Unit: Product Specification Standard
5) Reserve after operation: Above 5 Minutes (Heat Run)
Temperature : at 25 ºC ± 5 ºC
Relative humidity : 65 % ± 10 %
Input voltage : 220 V, 60 Hz
6) Adjustment equipments: Color Analyzer(CA-210 or CA-110),
DDC Adjustment Jig equipment, SVC remote control.
7) Push The “IN STOP” KEY - For memory initialization.
Case1 : Software version up
1. After downloading S/W by USB, TV set will reboot
automatically
2. Push “In-stop” key
3. Push “Power on” key
4. Function inspection
5. After function inspection, Push “In-stop” key.
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push
“In-stop” key at first.
2. Push “Power on” key for turning it on.
-> If you push “Power on” key, TV set will recover
channel information by itself.
3. After function inspection, Push “In-stop” key.
Please Check the Speed :
To use speed between
from 200KHz to 400KHz
5) Click “Auto” tab and set as below
6) Click “Run”.
7) After downloading, check “OK” message.
(4)
filexxx.bin
(5)
(7) ……….OK
(6)
* USB DOWNLOAD
1) Put the USB Stick to the USB socket
2) Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is Low,
it didn’t work. But your downloaded version is High, USB
data is automatically detecting
3) Show the message “Copying files from memory”
3. Main PCB check process
* APC - After Manual-Insult, executing APC
* Boot file Download
1) Execute ISP program “Mstar ISP Utility” and then click
“Config” tab.
(1)
fi lexxx.bin
2) Set as below, and then click “Auto Detect” and check “OK”
message
If “Error” is displayed, Check connection between
computer, jig, and set.
3) Click “Read” tab, and then load download file (XXXX.bin)
by clicking “Read”
4) Click “Connect” tab. If “Can’t” is displayed, check
connection between computer, jig, and set.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
-9-
LGE Internal Use Only
4) Updating is staring.
3.1. ADC Process
(1) ADC
- Enter Service Mode by pushing “ADJ” key,
- Enter Internal ADC mode by pushing “G” key at “5. ADC
Calibration”
<Caution> Using ‘power on’ button of the Adjustment R/C,
power on TV.
* ADC Calibration Protocol (RS232)
Item
CMD1 CMD2 Data0
Adjust ‘Mode In’ A
A
0 0 When transfer the ‘Mode In’,
Carry the command.
ADC Adjust
A
D
1 0 Automatically adjustment
(The use of a internal pattern)
5) Uploading completed, The TV will restart automatically.
6) If your TV is turned on, check your updated version and
Tool option.(explain the Tool option, next stage)
* If downloading version is more high than your TV have,
TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.
Adjust Sequence
• aa 00 00 [Enter Adjust Mode]
• xb 00 40 [Component1 Input (480i)]
• ad 00 10 [Adjust 480i Comp1]
• xb 00 60 [RGB Input (1024*768)]
• ad 00 10 [Adjust 1024*768 RGB]
• aa 00 90 End Adjust mode
* Required equipment : Adjustment R/C.
3.2. Function Check
* After downloading, have to adjust Tool Option again.
1) Push "IN-START" key in service remote controller
2) Select “Tool Option 1” and Push “OK” button.
3) Punch in the number. (Each model hax their number)
Module
Tool option1 Tool option2 Tool option3 Tool option4 Tool optin5
LGD
12961
189188
53284
26893
0
AUO
12969
18988
53284
26893
0
* Check display and sound
- Check Input and Signal items. (cf. work instructions)
1) TV
2) AV (SCART1/SCART2/ CVBS)
3) COMPONENT (480i)
4) RGB (PC : 1024 x 768 @ 60 Hz)
5) HDMI
6) PC Audio In
* Display and Sound check is executed by Remote control.
4) Completed selecting Tool option.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 10 -
LGE Internal Use Only
** Caution **
Color Temperature : COOL, Medium, Warm.
One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
adjust other two lower than C0.
(when R/G/B Gain are all C0, it is the FULL Dynamic Range
of Module)
4. Total Assembly line process
4.1. Adjustment Preparation
· W/B Equipment condition
CA210 : CH 9, Test signal : Inner pattern (85IRE)
· Above 5 minutes H/run in the inner pattern. (“power on” key
of adjust remote control)
Cool
Medium
Warm
13,000
9,300
6,500
K
K
K
* Manual W/B process using adjusts Remote control.
X=0.269(±0.002)
• After enter Service Mode by pushing “ADJ” key,
• Enter White Balance by pushing “ G ” key at “6. White
Balance”.
Y=0.273(±0.002)
<Test Signal>
X=0.285(±0.002)
Inner pattern
Y=0.293(±0.002)
(216gray,85IRE)
X=0.313(±0.002)
Y=0.329(±0.002)
* Connecting picture of the measuring instrument
(On Automatic control)
Inside PATTERN is used when W/B is controlled. Connect to
auto controller or push Adjustment R/C POWER ON ->
Enter the mode of White-Balance, the pattern will come out.
Full White Pattern
* After done all adjustments, Press “In-start” button and
compare Tool option and Area option value with its BOM, if
it is correctly same then unplug the AC cable. If it is not
same, then correct it same with BOM and unplug AC cable.
For correct it to the model’s module from factory JIG model.
* Push the “IN STOP” key after completing the function
inspection. And Mechanical Power Switch must be set
“ON”.
CA-210
COLOR
ANALYZER
TYPE: CA-210
RS-232C Communication
* Auto-control interface and directions
1) Adjust in the place where the influx of light like floodlight
around is blocked. (illumination is less than 10 lux).
2) Adhere closely the Color Analyzer (CA210) to the module
less than 10 cm distance, keep it with the surface of the
Module and Color Analyzer’s prove vertically.(80° ~ 100°).
3) Aging time
- After aging start, keep the power on (no suspension of
power supply) and heat-run over 5 minutes.
- Using ‘no signal’ or ‘full white pattern’ or the others,
check the back light on.
4.2. DDC EDID Write (RGB 128Byte )
• Connect D-sub Signal Cable to D-sub Jack.
• Write EDID Data to EEPROM(24C02) by using DDC2B
protocol.
• Check whether written EDID data is correct or not.
* For SVC main Assembly, EDID have to be downloaded to
Insert Process in advance.
4.3. DDC EDID Write (HDMI 256Byte)
• Connect HDMI Signal Cable to HDMI Jack.
• Write EDID Data to EEPROM(24C02) by using DDC2B
protocol.
• Check whether written EDID data is correct or not.
* For SVC main Assembly, EDID have to be downloaded to
Insert Process in advance.
• Auto adjustment Map(RS-232C)
RS-232C COMMAND
[CMD ID DATA]
Wb 00
00
White Balance Start
Wb 00
ff
White Balance End
RS-232C COMMAND MIN
CENTER
[CMD ID DATA]
MAX
4.4. EDID DATA
1) All Data : HEXA Value
2) Changeable Data :
*: Serial No : Controlled / Data:01
**: Month : Controlled / Data:00
***:Year : Controlled
****:Check sum
(DEFAULT)
Cool
Mid
Warm
R Gain
jg
Ja
jd
G Gain
jh
Jb
je
00
172
192
192
192
B Gain
ji
Jc
jf
00
192
192
172
192
R Cut
64
64
64
128
G Cut
64
64
64
128
B Cut
64
64
64
128
00
Cool
Mid
Warm
172
192
192
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
192
- 11 -
LGE Internal Use Only
1) HD RGB EDID data
- Auto Download
• After enter Service Mode by pushing “ADJ” key,
• Enter EDID D/L mode.
• Enter “START” by pushing “OK” key.
00
0
1
2
3
4
5
6
7
8
9
00
FF
FF
FF
FF
FF
FF
00
1E
6D
01
03
68
73
41
78
0A
CF
74
A3
57
4C
B0
23
4C
A1
08
00
81
C0
61
40
45
40
31
40
01
01
70
ⓒ
10
20
09
48
A
B
C
D
ⓐ
E
F
ⓑ
30
01
01
01
01
01
01
66
21
50
B0
51
00
1B
30
40
40
36
00
7E
8A
42
00
00
1E
01
1D
00
72
51
D0
1E
20
50
6E
28
55
00
7E
8A
42
00
00
1E
00
00
00
FD
00
3A
60
3E
1F
46
10
00
0A
20
20
20
20
20
20
FF
FF
FF
FF
FF
80
ⓓ
ⓓ
70
FF
FF
FF
FF
FF
FF
FF
FF
FF
00
ⓔ
FF
FF
90
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
A0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
B0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
C0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
D0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
E0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
F0
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
A
B
C
D
E
F
2) HD HDMI EDID data
00
10
* Edid data and Model option download (RS232)
Item
CMD1 CMD2 Data0
Download
A
A
0
‘Mode In’
Download
0 When transfer the ‘Mode In’,
Carry the command.
A
E
00 10 Automatically Download
0
1
2
3
4
5
6
7
8
9
00
FF
FF
FF
FF
FF
FF
00
1E
6D
01
03
80
73
41
78
0A
CF
74
A3
57
4C
B0
23
4C
A1
08
00
81
C0
61
40
45
40
31
40
01
01
70
ⓒ
09
48
30
01
01
01
01
01
01
66
21
50
B0
51
00
1B
30
40
40
36
00
7E
8A
42
00
00
1E
01
1D
00
72
51
D0
1E
20
50
6E
28
55
00
7E
8A
42
00
00
1E
00
00
00
FD
00
3A
60
3E
1F
46
10
00
0A
20
20
20
20
20
20
05
14
03
02
80
02
90
22
B0
* Caution
1) Use the proper signal cable for EDID Download
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists
2) Never connect HDMI & D-sub Cable at the same time.
3) Use the proper cables below for EDID Writing
4) Download HDMI1, HDMI2, separately because HDMI1 is
different from HDMI2
For Analog EDID
For HDMI EDID
D-sub to D-sub
DVI-D to HDMI or HDMI to HDMI
ⓓ
ⓓ
03
20
F1
4E
15
01
26
80
18
01
ⓕ
A0
- Manual Download
ⓑ
20
70
(The use of a internal pattern)
ⓐ
00
9E
12
01
ⓔ
20
21
10
1F
84
13
15
07
50
09
57
07
71
1C
16
20
58
2C
25
00
7E
8A
42
00
1D
00
80
51
D0
0C
20
40
80
35
00
7E
8A
ⓕ
C0
42
00
00
1E
8C
0A
D0
8A
20
E0
2D
10
10
3E
96
00
D0
7E
8A
42
00
00
18
02
3A
80
18
71
38
2D
40
58
2C
E0
45
00
7E
8A
42
00
00
1E
01
1D
80
D0
72
1C
16
20
F0
10
2C
25
80
7E
8A
42
00
00
9E
00
00
00
00
00
D5
* Detail EDID Options are below
ⓐ Product ID
Model Name
HEX
EDID Table
DDC Function
HD Model
0000
00 00
Analog/Digital
ⓑ Serial No: Controlled on production line.
ⓒ Month, Year: Controlled on production line:
ex) Monthly : ‘02’ -> ‘02’
Year : ‘2009’ -> ‘13’
ⓓ Model Name(Hex):
Item
Condition
Data(Hex)
Manufacturer ID
GSM
1E6D
Version
Digital : 1
01
Revision
Digital : 3
03
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
MODEL
MODEL NAME(HEX)
all
00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
ⓔ Checksum: Changeable by total EDID data.
ⓕ Vendor Specific(HDMI)
- 12 -
INPUT
MODEL NAME(HEX)
HDMI1
65030C001000011D
HDMI2
65030C002000011D
HDMI3
65030C003000011D
LGE Internal Use Only
4.5. V-COM Adjust(Only LGD(M+S) Module)
5. Model name & Serial number D/L
- Why need Vcom adjustment?
A The Vcom (Common Voltage) is a Reference Voltage of
Liquid Crystal Driving.
-> Liquid Crystal need for Polarity Change with every frame.
• Press “Power on” key of service remocon.
(Baud rate : 115200 bps)
• Connect RS232 Signal Cable to RS-232 Jack.
• Write Serial number by use RS-232.
• Must check the serial number at the Diagnostics of SET UP
menu. (Refer to below).
Circuit Block
Ga mma
Re f e r e nce V o ltage
Data (R ,G,B ) &
Con t rol si gnal
Da t a I n p u t
Y
S
In t e r f a ce
S
Ti m i n g
Co nt r o ll e r
Data (R ,G,B ) & C ont ro l s ignal
So urce D r i v e I C
Power
Po w e rInput
I nput
M
Po w e r
Blo ck
V COM
Gat e Driv e IC
T
E
Gamm a Reference
Volta ge
Con t rol si gnal
Column Line
Pane l
V COM
CLC
CST
Liquid
Crys tal
Row Li ne TFT
V COM
5.1. Signal TABLE
CMD
- Adjust sequence
· Press the PIP key of th ADJ remote control.(This PIP key is
hot key to enter the VCOM adjuting mode)
(Or After enter Service Mode by pushing “ADJ” key, then
Enter V-Com Adjust mode by pushing “G” key at “10. VCom”
· As pushing the right or the left key on the remote control,
and find the V-COM value which is no or minimized the
Flicker. (If there is no flicker at default value, Press the exit
key and finish the VCOM adjustment.)
· Push the “OK” key to store value. Then the message “Saing
OK” is pop.
· Press the exit key to finish VCOM adjustment.
LENGTH
ADH
ADL
DATA_1
...
Data_n
CS
DELAY
CMD : A0h
LENGTH : 85~94h (1~16 bytes)
ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 +…+ Data_n
Delay : 20ms
5.2. Command Set
No.
Adjust mode
CMD(hex)
LENGTH(hex)
Description
1
EEPROM WRITE
A0h
84h+n
n-bytes Write (n = 1~16)
* Description
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0,
Phase
Data write : Model Name and Serial Number write in
EEPROM,.
5.3. Method & notice
(Visual Adjust and control the Voltage level)
4.6. Outgoing condition Configuration
- When pressing IN-STOP key by SVC remocon, Red LED are
blinked alternatively. And then Automatically turn off.
(Must not AC power OFF during blinking)
A. Serial number D/L is using of scan equipment.
B. Setting of scan equipment operated by Manufacturing
Technology Group.
C. Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0.
4.7. Internal pressure
Confirm whether is normal or not when between power
board’s ac block and GND is impacted on 1.5 kV(dc) or 2.2
kV(dc) for one second.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 13 -
LGE Internal Use Only
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or Service man, Sometimes
model name or serial number is initialized.(Not always)
There is impossible to download by bar code scan, so It need
Manual download.
1) Press the ‘instart’ key of ADJ remote controller.
2) Go to the menu ‘5.Model Number D/L’ like below photo.
3) Input the Factory model name(ex 42LD450-ZA) or Serial
number like photo.
4) Check the model name Instart menu -> Factory name
displayed (ex 42LD450-ZA)
5) Check the Diagnostics (DTV country only) -> Buyer model
displayed (ex 42LD450)
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 14 -
LGE Internal Use Only
BLOCK DIAGRAM
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 15 -
LGE Internal Use Only
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
IC301
H5TQ1G63BFR
DDR3 SDRAM
IC601
MAX9668ETP
P-GAMMA Block
- 16 IC603
MAX17113
IC600
TPS62110
Mini LVDS Data L(6 bit)
IC101
SATURN7M
VGH 27V
VGL -5V
C-MA[0:12], C-MDQL[0:7], C-MDQU[0:7]
AMP_SDA / SCL
12V
PANEL_VCC
VDD_LCM 16V
VCC_LCM 3.3V
GMA(1~8)
VCOM
VCOM_FB
POWER Block
PANEL_VCC
12V
VCC_LCM
3.3V
VDD_LCM
16V
VGL -5V
VCC_LCM
3.3V
VDD_LCM
16V
HVDD 8V
P701, P702 MINI LVDS
HI GH=VGH
Low = VGL
LEVEL Shift Block
IC602
TPS65192
GVDD_EVEN/ODD
GVST
GCLK[1:6]
VGL -5V
VGH 27V
VCC_LCM 3.3V
VDD_LCM 16V
VST
CLK[1:6]
VDD_EVEN/ODD
GIP Model
LGE Internal Use Only
SOE
POL
Mini LVDS Data R(6 bit)
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
A9
A5
500
A2
300
A21
511
510
120
A10
200
900
A6
800
LV1
540
A7
521
400
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
- 17 -
LGE Internal Use Only
IC102
HY27UF082G2B-TPCB
+3.3V_Normal
+3.3V_Normal
RE
/PF_OE
CE
/PF_CE0
OPT
R108 1K
NC_7
+3.3V_Normal
NC_8
C101
0.1uF
VCC_1
VSS_1
NC_9
R105
1K
NC_10
OPT
CLE
OPT
R104
10K
/PF_CE1
ALE
PF_ALE
WE
+3.5V_ST
/PF_WE
WP
3.3K
OPT
C
B
Q101
KRC103S
OPT
3.3K
NC_11
NC_12
NC_13
E
NC_14
NC_15
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
<T3 CHIP Config(AUD_LRCH)>
PCM_A[0-7]
NC_27
IC101
Boot from SPI flash : 1’b0
Boot from NOR flash : 1’b1
NC_26
PCM_D[0-7]
AR101
S7M_DIVX
I/O7
PCM_A[7]
I/O6
PCM_A[6]
<T3 CHIP Config>
(AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0)
PCM_A[5]
I/O5
PCM_A[4]
I/O4
MIPS_no_EJ_NOR8
MIPS_EJ1_NOR8
MIPS_EJ2_NOR8
B51_Secure_no scramble
B51_Sesure_scramble
22
NC_25
NC_24
C102
10uF
NC_23
:
:
:
:
:
4’h3
4’h4
4’h5
4’hb
4’hc
(MIPS
(MIPS
(MIPS
(8051
(8051
as
as
as
as
as
host.
host.
host.
host.
host.
No EJ PAD. Byte mode NAND flash.)
EJ use PAD1. Byte mode NAND flash.)
EJ use PAD2. Byte mode NAND flash.)
Internal SPI flash secure boot, no scramble)
Internal SPI flash secure boot with scarmble)
PCM_A[0-14]
U22
PCM_D[1]
T21
PCM_D[2]
T22
PCM_D[3]
AB18
PCM_D[4]
AC18
PCM_D[5]
AC19
PCM_D[6]
AC20
PCM_D[7]
AC21
PCM_A[0]
+3.3V_Normal
PCM_A[1]
VCC_2
VSS_2
PCM_D[0]
C103
0.1uF
NC_22
NC_21
NC_20
AR102
R22
R21
T23
T24
PCM_A[8]
AA23
PWM1
I/O1
PCM_A[1]
PWM0
PCM_A[0]
AA22
PCM_A[4]
PCM_A[7]
AUD_MASTER_CLK
22
Y22
PCM_A[3]
PCM_A[6]
PCM_A[2]
NC_19
PCM_A[2]
PCM_A[5]
PCM_A[3]
I/O0
PCM_A[9]
NC_18
AB17
PCM_A[11]
AA21
PCM_A[12]
U23
PCM_A[13]
Y23
PCM_A[14]
W23
V22
W21
Y21
V23
P23
/PCM_CD
R23
P22
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15
44
43
6
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
28
21
27
22
23
26
24
25
NC_3
NC_25
NC_5
I/O6
NC_6
I/O5
RB
I/O4
E
NC_23
NC_7
PRE
NC_8
VCC_2
VDD_1
VSS_2
VSS_1
NC_22
NC_9
NC_21
NC_10
NC_20
CL
I/O3
AL
I/O2
W
I/O1
WP
I/O0
NC_11
NC_19
NC_12
NC_18
NC_13
NC_17
NC_14
NC_16
NC_15
46
4
45
5
44
43
6
R
NC_24
47
3
NC_4
I/O7
48
1GBIT
2
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
NC_29
NC_27
AB21
PF_ALE
AB19
/PF_WP
AD17
/F_RB
AA19
S7_TXD
I/O6
GPIO39
PCM_A2
GPIO40
PCM_A3
GPIO41
PCM_A4
S7_RXD
WIRELESS_DL_RX
L23
WIRELESS_DL_TX
K20
ET_RXER
L20
SC1/COMP1_DET
G20
ERROR_OUT
G19
MODEL_OPT_0
GPIO42
PCM_A5
PCM_A6
GPIO50/UART1_RX
PCM_A7
GPIO51/UART1_TX
PCM_A8
F20
M_REMOTE
22
R148
F19
22
M_REMOTE_RX
R149
M_REMOTE_TX
M_REMOTE
E7
PCM_A9
GPIO6/PM0/INT0
PCM_A10
GPIO7/PM1/PM_UART_TX
PCM_A11
GPIO8/PM2
PCM_A12
GPIO9/PM3
PCM_A13
GPIO10/PM4
PCM_A14
GPIO11/PM5/PM_UART_RX/INT1
PM_SPI_CS1/GPIO12/PM6
PM_SPI_WP1/GPIO13/PM7
PM_SPI_WP2/GPIO14/PM8/INT2
PCM_OE_N
GPIO15/PM9
PCM_WE_N
PM_SPI_CS2/GPIO16/PM10
PCM_IORD_N
GPIO17/PM11/INT3
PCM_IOWR_N
GPIO18/PM12/INT4
PM_SPI_CK/GPIO1
PCM_IRQA_N
GPIO0/PM_SPI_CZ
PCM_CD_N
PM_SPI_DI/GPIO2
PCM_WAIT_N
PM_SPI_DO/GPIO3
USB1_OCD
D7
USB1_CTL
E11
0
G9
HP_DET
R150
0
F9
CONTROL_ATTEN
R110
MODEL_OPT_6
C5
E8
33
MODEL_OPT_1
R146
E9
/FLASH_WP
MODEL_OPT_2
F7
F6
TUNER_RESET
D8
DEMOD_RESET
AV_CVBS_DET
G12
F10
D9
PCM_CE_N
for SYSTEM/HDCP
EEPROM&URSA3
I/O4
I2C_SDA
I2C_SCL
TS0_CLK
PCM_PF_CE0Z
TS0_VLD
PCM_PF_CE1Z
TS0_SYNC
PCM_PF_OEZ
PCM_PF_WEZ
TS0_D0
PCM_PF_ALE
TS0_D1
PCM_PF_AD[15]
TS0_D2
PCM_PF_RBZ
TS0_D3
R134
22
M23
R135
22
N23
TS0_D5
UART_TX2/GPIO65
TS0_D6
UART_RX2/GPIO64
TS0_D7
R136
22
M22
33
R147
SPI_SCK
D11
/SPI_CS
SPI_SDI
E10
D10
33
R151
RGB_DDC_SDA
RGB_DDC_SCL
R137
22
N22
DDCR_DA/GPIO71
TS1_CLK
DDCR_CK/GPIO72
TS1_VLD
R138
22
A5
R139
22
B5
AA5
CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC
AA10
CI_TS_DATA[0-7]
AB5
CI_TS_DATA[0]
AC4
CI_TS_DATA[1]
Y6
CI_TS_DATA[2]
AA6
CI_TS_DATA[3]
W6
CI_TS_DATA[4]
AA7
CI_TS_DATA[5]
Y9
CI_TS_DATA[6]
AA8
CI_TS_DATA[7]
TS1_D0
NC_23
TS1_D1
VSS_2
PWM0
K23
PWM1
K22
PWM2
G23
NC_22
SC_RE2
TO SCART1
NC_21
SC_RE1
G22
G21
from CI SLOT
FE_TS_CLK
FE_TS_VAL_ERR
FE_TS_SYNC
AC6
Internal demod out
/External demod in
FE_TS_DATA[0-7]
AB6
TS1_SYNC
DDCA_DA/UART0_TX
DDCA_CK/UART0_RX
VDD_2
for SERIAL FLASH
SPI_SDO
AC5
NC_25
NC_24
for WIRELESS READY
for ETHERNET PHY
FRC_RESET
M20
I/O5
TS1_D2
PWM0/GPIO66
TS1_D3
PWM1/GPIO67
TS1_D4
PWM2/GPIO68
TS1_D5
PWM3/GPIO69
TS1_D6
PWM4/GPIO70
TS1_D7
AC10
FE_TS_DATA[0]
AB10
FE_TS_DATA[1]
AC9
FE_TS_DATA[2]
AB9
FE_TS_DATA[3]
AC8
FE_TS_DATA[4]
AB8
FE_TS_DATA[5]
AC7
FE_TS_DATA[6]
AB7
FE_TS_DATA[7]
NC_20
I/O3
DSUB_DET
MODEL_OPT_3
I/O2
PCM_5V_CTL
I/O1
/RST_PHY
/RST_HUB
I/O0
C6
B6
C8
C7
A6
D12
SAR0/GPIO31
MPIF_CLK
SAR1/GPIO32
MPIF_CS_N
SAR2/GPIO33
D14
E14
SAR3/GPIO34
/PIF_SPI_CS
R160
1K
MPIF_BUSY
SAR4/GPIO35
E12
MPIF_D0
NC_19
MPIF_D1
NC_18
MPIF_D2
F12
D13
E13
MPIF_D3
NC_17
NC_16
AF1
AE3
AD14
AD3
AF15
AF2
AE15
AD2
AD16
AD15
AE16
S7T_DIVX
IC101-*2
LGE105D(S7-Tcon Divx_ Non_RM)
W26
NC_48
NC_78
LVACLKP/LLV6P/BLUE[3]
LVACLKN/LLV6N/BLUE[2]
NC_64
LVA0P/LLV3P/BLUE[9]
NC_50
LVA0N/LLV3N/BLUE[8]
NC_45
LVA1P/LLV4P/BLUE[7]
NC_34
LVA1N/LLV4N/BLUE[6]
NC_77
LVA2P/LLV5P/BLUE[5]
NC_65
LVA2N/LLV5N/BLUE[4]
NC_62
LVA3P/LLV7P/BLUE[1]
NC_33
LVA3N/LLV7N/BLUE[0]
NC_47
LVA4P/LLV8P
NC_46
LVA4N/LLV8N
W25
U26
U25
U24
V26
V25
V24
W24
Y26
Y25
Y24
LVBCLKP/LLV0P/GREEN[5]
LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
AF3
AF14
AD1
NC_66
LVB0N/RLV6N/RED[0]
NC_76
LVB1P/RLV7P/GREEN[9]
NC_32
LVB1N/RLV7N/GREEN[8]
NC_44
LVB2N/RLV8N/GREEN[6]
LVB2P/RLV8P/GREEN[7]
AD13
AE14
AE13
NC_61
NC_60
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
AF1
AE3
AD14
AD3
AF15
AF2
AE15
AD2
AD16
AD15
AE16
AF4
AD4
NC_67
RLV0N/LHSYNC
RLV1N/LCK
RLV2P/RED[9]
NC_71
NC_40
RLV4N/RED[4]
RLV5P/RED[3]
AD6
AD12
AE5
AF12
AF5
AE12
NC_37
AD7
AD10
AE7
AF10
AD8
AC24
AD26
TCON19/CS8/GCLK6
NC_43
TCON11/CS5/HCON
TCON10/CS4/OPT_N
NC_75
TCON9/CS3/OPT_P
TCON16/WPWM
TCON12/DPM
TCON1/STV/GSP/VST
NC_57
TCON5/TP/SOE
NC_70
TCON14/SACN_BLK
NC_61
RLV5N
NC_71
RLV6P
NC_27
RLV6N
NC_39
RLV7N
NC_56
OPTN/FLK3
RLV7P
AD13
AE14
AE13
FLK
NC_55
AD25
AD24
AE23
AE26
GCLK6
AE25
AE24
AF24
AF23
AD22
AE22
AF22
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
TCON20/CS9/VGH_EVEN
TCON13/LEDON
TCON17/CS6/GCLK4
NC_19
AD4
LLV3P
NC_62
LLV3N
NC_30
LLV0P
LLV0N
NC_44
LLV1P
LLV1N
AF8
AD9
LLV2P
NC_66
LLV2N
NC_35
LLVCKP
AE9
AF9
NC_51
LLVCKN
LLV4P
NC_67
AE11
AD6
AD12
AE5
AF12
AF5
AE12
AB23
AC23
AC22
GSC/GCLK3
LLV5P
LLV5N
LLV6P
NC_38
NC_47
LLV6N
NC_70
LLV7P
LLV7N
NC_63
GSPR
NC_54
AF7
AD10
AE7
AF10
AD8
GSP/VST
NC_52
SOE
NC_65
POL
NC_33
VDD_ODD
NC_49
VDD_EVEN
NC_68
GCLK4
NC_34
GCLK2
DPM
HCON
AA16
NC_12
NC_21
GND_105
NC_20
NC_11
EEPROM
AA15
+3.3V_Normal
1
1
UART_FRC_RX
AF26
AF25
AE24
2
AF24
FRC_SCL
2
FRC_SDA
3
AF23
AD22
AE22
AF22
3
AE19
4
4
AD21
UART_FRC_TX
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
AB23
AC23
AC22
AA14
AC15
I2C
Y16
NC_15
NC_26
AE8
AC16
+3.3V_Normal
AA16
Y11
Y19
AC14
LEDON
NC_50
NC_12
NC_20
GND_105
NC_19
AA15
DIMMING
Y10
Y10
NC_11
AA11
NC_17
NC_17
NC_25
AE23
AE26
AE25
AB16
NC_23
NC_29
Y11
Y19
12505WS-03A00
12505WS-03A00
AD26
AD25
AD24
AB22
NC_36
AA14
AC16
URSA_DEBUG
P3904
URSA_DEBUG
P3903
AB25
AB24
AC24
NC_37
AC15
AC14
URSA degug port
AA25
AA24
AB26
AD19
GOE/GCLK1
NC_48
NC_69
NC_32
AE10
AD11
AC25
AA26
NC_53
AE6
AF11
Y16
NC_15
NC_31
NC_55
Y24
LLV4N
NC_30
AE8
W24
Y26
Y25
AD23
AB16
NC_26
V26
V25
V24
NC_46
NC_31
AE2
AD7
AB22
TCON21/CS10/VGH_ODD
NC_54
NC_73
NC_39
U25
U24
GCLK5
AE4
AF26
AF25
NC_42
NC_38
NC_41
W25
U26
AC26
AD1
NC_64
NC_52
NC_68
RLV4N
AF3
AF14
AF6
TCON15/SCAN_BLK1
TCON18/CS7/GCLK5
NC_59
AF7
AB25
AB24
AD19
TCON3/OE/GOE/GCLK2
NC_53
NC_74
AE10
AD11
AA25
AA24
AB26
NC_58
NC_69
AE6
AF11
NC_41
WPWM
RLV5N/RED[2]
AE11
AF6
RLV1P/LDE
RLV2N/RED[8]
RLV4P/RED[5]
NC_56
NC_72
RLV4P
RLV5P
AD23
RLV3P/RED[7]
RLV3N/RED[6]
RLV0P/LVSYNC
NC_49
RLVCKP
RLVCKN
OPTP/FLK2
AD5
NC_35
RLV1N
RLV2P
RLV2N
NC_57
NC_28
NC_42
AC26
AF4
AE9
AF9
RLV0P
RLV0N
RLV1P
NC_29
NC_72
NC_60
AC25
NC_51
AF8
AD9
RLV3N
NC_59
NC_45
NC_40
AA26
NC_36
AE2
RLV3P
NC_43
NC_73
NC_58
LVB4N/LLV0N/GREEN[0]
AE4
AD5
W26
AE1
AF16
NC_63
AA11
AB15
AB15
SCAN_BLK
AB14
SCAN_BLK1
NC_24
AB14
+3.3V_Normal
Addr:10101-S7_NON_DIVX
IC103
CAT24WC08W-T
8
IC104
M24M01-HRMN6TP
C107
0.1uF
VCC
A1 $0.199
2
7 WP
C105
0.1uF
6
SCL
AF1
AE3
AD14
AD3
AF15
AF2
AE15
AD2
AD16
NC
R127
1
8
2
7
S7T_NON_DIVX
IC101-*5
LGE101 (S7 NON_TON/DiX/RM)
AE1
AF16
AD15
VCC
AE16
NC_48
LVACLKP/LLV6P/BLUE[3]
NC_78
LVACLKN/LLV6N/BLUE[2]
NC_64
LVA0P/LLV3P/BLUE[9]
NC_50
LVA0N/LLV3N/BLUE[8]
NC_45
LVA1P/LLV4P/BLUE[7]
NC_34
LVA1N/LLV4N/BLUE[6]
NC_77
LVA2P/LLV5P/BLUE[5]
NC_65
LVA2N/LLV5N/BLUE[4]
NC_62
LVA3P/LLV7P/BLUE[1]
NC_33
LVA3N/LLV7N/BLUE[0]
NC_47
LVA4P/LLV8P
NC_46
LVA4N/LLV8N
22
I2C_SCL
E1
AD1
WP
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]
NC_44
LVB2N/RLV8N/GREEN[6]
NC_61
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
E2
R129
22
3
A0’h
6
AD5
SCL
R111
22
AF4
I2C_SCL
I2C_SDA
AD4
5
AD3
V25
AF15
V24
AF2
W24
AE15
Y26
AD2
Y25
AD16
Y24
AD15
AE16
NC_43
RLV3P
NC_73
RLV3N
NC_59
RLV0P
NC_45
RLV0N
NC_40
RLV1P
NC_29
RLV1N
NC_72
RLV2P
NC_60
RLV2N
NC_57
RLVCKP
NC_28
RLVCKN
NC_42
RLV4P
NC_41
RLV4N
AD9
SDA
R112
22
RLV3N/RED[6]
RLV0N/LHSYNC
RLV0P/LVSYNC
RLV2P/RED[9]
NC_71
AF9
RLV2N/RED[8]
RLV4N/RED[4]
RLV4P/RED[5]
NC_72
AF6
C106
8pF
OPT
RLV5P/RED[3]
AE5
AF12
AF5
AE12
TCON18/CS7/GCLK5
TCON19/CS8/GCLK6
TCON11/CS5/HCON
NC_52
NC_75
NC_68
NC_59
AF7
AD7
AD10
AE7
AF10
AD8
TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
TCON16/WPWM
TCON12/DPM
TCON1/STV/GSP/VST
AE10
AD11
TCON15/SCAN_BLK1
NC_74
NC_37
NC_43
NC_57
NC_70
TCON5/TP/SOE
AD23
AF4
AD4
AE26
AE25
NC_73
TCON13/LEDON
TCON17/CS6/GCLK4
LLV3N
LLV0N
LLV0P
AF24
AE22
LLV1P
LLV1N
AF8
AD9
AF23
AD22
NC_66
AF9
LLV2N
LLVCKN
LLVCKP
NC_67
AD21
AF2
AD2
AD16
AD15
AE16
AD6
AD12
AD20
AE5
AE20
AF12
AF19
AF5
AE12
AF18
NC_69
AF7
AD11
AD10
AE7
AF10
AC22
AD8
GSC/GCLK3
LLV5P
NC_32
LLV5N
NC_38
LLV6P
NC_47
NC_70
NC_63
LLV6N
LLV7P
LLV7N
GSPR
GSP/VST
AE10
AB23
AC23
NC_31
NC_12
NC_21
GND_105
NC_20
NC_52
NC_65
SOE
NC_68
GCLK4
GCLK2
FRC_DDR3_A9/DDR2_A9
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
A4M/RLV5N/GREEN[8]
B0P/RLV6P/GREEN[7]
FRC_DDR3_BA0/DDR2_BA2
AD25
B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
FRC_DDR3_MCLK/DDR2_MCLK
B2M/RLV8N/GREEN[2]
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
AD24
AD23
AF4
AE23
AD4
AF24
C0M/LLV0N/BLUE[4]
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
AE22
C2M/LLV2N/BLUE[0]
C1P/LLV1P/BLUE[3]
C1M/LLV1N/BLUE[2]
AF8
AD9
AF23
AD22
C3P/LLV4P
AE9
AF9
FRC_DDR3_DQSU/DDR2_DQS1
FRC_DDR3_DQSUB/DDR2_DQSB1
AF22
DPM
AC14
AE8
Y11
AA15
Y19
NC_26
NC_50
AMP_SDA
AMP_SCL
C111
2.2uF
AD21
AD6
AD12
AD20
AE5
AE20
AF12
AF20
AF19
AF5
AE12
AF18
C4P/LLV5P
FRC_DDR3_DQL1/DDR2_DQ0
AF7
AD11
AD10
AE7
AF10
AC22
AD8
DCKM/TCON4
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
D0M/LLV6N
FRC_DDR3_DQL3/DDR2_DQ2
D1P/LLV7P
FRC_DDR3_DQL4/DDR2_DQ4
FRC_DDR3_DQL5/DDR2_NC
FRC_DDR3_DQL6/DDR2_DQ3
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
D3M/TCON2
AE10
AB23
AC23
FRC_DDR3_DQU0/DDR2_DQ8
FRC_DDR3_DQU1/DDR2_DQ14
NC_12
NC_20
NC_19
D4P/TCON1
FRC_DDR3_DQU6/DDR2_DQ10
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
OPT
LD650 Scan
AD25
AD24
AE23
AE26
AE25
NEC_SDA
NEC_SCL
SCAN_BLK2
R158
100
OPT
100
AF26
AF25
AE24
AF24
R159
AF23
AD22
AE22
FRC_PWM1
FRC_PWM0
AF22
SCAN_BLK1/OPC_OUT
OPT
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
AB23
AC23
AC22
AB16
FRC_GPIO0/UART_RX
FRC_GPIO1
AA14
AC15
FRC_GPIO3
Y16
FRC_GPIO8
AC16
AC14
AE8
AA16
Y11
AA15
Y19
FRC_GPIO9/UART_TX
FRC_DDR3_NC/DDR2_DQM0
AA11
AC16
AC14
FRC_GPIO10
AA16
FRC_REXT
FRC_I2CM_DA
FRC_TESTPIN
FRC_I2CM_CK
AA15
Y10
FRC_I2CS_DA
AA11
FRC_I2CS_CK
AB15
SCAN_BLK
I2C_SDA
I2C_SCL
AB22
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
FRC_DDR3_DQU7/DDR2_DQM1
AA14
NC_17
SCAN_BLK1
AB24
AC24
AD26
D4M/TCON0
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9
Y10
NC_11
PWM2
R155
0
FRC_DDR3_DQU2/DDR2_DQ13
AC15
LEDON
GND_105
AA24
AB26
AB25
AD19
DCKP/TCON5
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL7/DDR2_DQ5
AD18
AE18
C3M/LLV4N
FRC_DDR3_DMU/DDR2_DQ11
AE6
AF11
AE21
AF21
AC25
AA26
AA25
FRC_DDR3_DML/DDR2_DQ7
Y16
NC_15
AA16
Y26
Y25
Y24
C4M/LLV5N
AE11
AE19
CCKM/LLV3N
FRC_DDR3_RESETB/DDR2_A3
AF25
AE24
PWM0
V25
V24
W24
AD23
CCKP/LLV3P
C0P/LLV0P/BLUE[5]
AE2
10K
100
PWM_DIM
U25
U24
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
AE26
AF26
R156
V26
B4M/TCON8/BLUE[6]
AE4
AE25
B0M/RLV6N/GREEN[6]
FRC_DDR3_BA1/DDR2_ODT
FRC_DDR3_BA2/DDR2_A12
HCON
AB14
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4
AB16
NC_23
AB15
NC_25
FRC_DDR3_A6/DDR2_A0
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
W25
U26
AC26
AD1
AD7
NC_34
AC16
AA11
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
AD13
AE14
AE13
AB22
VDD_ODD
VDD_EVEN
AA14
NC_17
NC_24
FRC_DDR3_A3/DDR2_A1
FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10
BCKP/TCON13/GREEN[1]
AF14
AB24
AC24
AD26
POL
NC_33
NC_36
NC_49
Y10
NC_11
A0P/RLV0P/RED[9]
BCKM/TCON12/GREEN[0]
AF3
AA24
AB26
AB25
NC_37
AC15
NC_29
Y11
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
AC25
AD19
GOE/GCLK1
NC_48
NC_54
AD18
AE18
W26
FRC_DDR3_A0/DDR2_NC
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
AA26
AA25
AF6
NC_64
AE6
AF11
AE21
AF21
AF20
LLV4P
Y16
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
AF15
AE15
Y26
Y25
Y24
NC_53
NC_30
NC_15
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
V25
V24
W24
LLV4N
AE11
AE19
LLV2P
NC_35
NC_51
AE9
AF22
AB16
NC_26
NC_19
Y19
AD3
AD5
LLV3P
NC_30
NC_44
AF25
AD7
NC_39
NC_55
AE3
AD14
NC_46
NC_31
NC_62
AE2
AF26
AE24
FLK
GCLK6
AE23
AB22
TCON21/CS10/VGH_ODD
TCON20/CS9/VGH_EVEN
AE8
U25
U24
V26
GCLK5
AE4
TCON14/SACN_BLK
NC_38
NC_41
RLV7P
RLV7N
OPTN/FLK3
NC_55
AD25
RLV5N
RLV6P
RLV6N
NC_39
NC_56
AD24
NC_42
NC_54
RLV5P
NC_61
NC_71
NC_27
AD19
TCON3/OE/GOE/GCLK2
NC_53
AD1
AD13
AE14
AE13
AF6
NC_69
AD6
AF14
AB24
AC24
AD26
NC_58
AE6
AF11
AD12
AF1
FRC_DDR3_A12/DDR2_A8
OPTP/FLK2
AF3
AA24
AB26
AB25
RLV5N/RED[2]
AE11
C104
8pF
OPT
RLV1P/LDE
NC_40
NC_56
AE9
I2C_SDA
AE1
AF16
R157
A_DIM
IC101-*1
LGE107 (S7M Non Divx/RM)
W26
W25
U26
AC26
WPWM
AC25
AA26
AA25
AD5
RLV3P/RED[7]
NC_35
NC_49
RLV1N/LCK
4
AE3
AD14
NC_51
NC_36
NC_67
AE2
AF8
VSS
U25
U24
V26
LVB4N/LLV0N/GREEN[0]
AE4
SDA
AF1
NC_58
LVB0P/RLV6P/RED[1]
NC_66
NC_76
NC_32
AD13
AE14
AE13
NC_60
5
AE1
AF16
AC26
LVBCLKP/LLV0P/GREEN[5]
LVBCLKN/LLV0N/GREEN[4]
AF3
R128
S7M_NON_DIVX
IC101-*3
LGE105 (S7-Tcon Non_Divx/RM)
W26
W25
U26
NC_63
4.7K
AF14
VSS 4
PCM_A1
I/O7
S7_DIVX
A2 3
GPIO38
TS0_D4
IC101-*4
LGE101D (S7 Non_Tcon/RM)
A0 1
/PF_OE
AA18
22
AE1
R113
4.7K
AB20
22
SIDEAV_DET
AA9
/PF_CE1
NC_26
AF16
HDCP EEPROM
C109
0.1uF
AC17
AR103
5V_DET_HDMI_3
P21
PCM_RESET
/PF_CE0
/PF_WE
NC_28
5V_DET_HDMI_4
L21
R145
2.2K
R/B
5
NC_26
1
GPIO37/UART3_TX
R144
2.2K
NC_6
45
NC_2
5V_DET_HDMI_2
L22
K21
GPIO36/UART3_RX
PCM_A0
R143
3.3K
NC_5
4
NC_1
NC_27
PCM_D6
R142
3.3K
NC_4
46
3
NC_28
GPIO151/TCON8
5V_DET_HDMI_1
M21
PCM_D5
R141
1K
NC_3
47
C108
0.1uF
OPT
AR104
IC102-*2
NAND01GW3B2CN6E
48
GPIO149/TCON6
PCM_D4
AA20
/PCM_CE
/PCM_IRQA
PCM_RST
512MBIT
PCM_D3
AA17
/PCM_WE
/PCM_IORD
/PCM_WAIT
2
GPIO147/TCON4
PCM_REG_N
/PCM_OE
NC_16
R133
10K
1
PCM_D2
W22
/PCM_IOWR
NC_2
GPIO145/TCON2
NC_17
R132
10K
NC_1
Y20
PCM_A[10]
/PCM_REG
+5V_Normal
IC102-*1
HY27US08121B-TPCB
V21
AUD_SCK
I/O2
GPIO143/TCON0
PCM_D1
PCM_D7
AUD_LRCH
I/O3
N21
PCM_D0
U21
R140
1K
R102
/PF_WP
R106
1K
R101
R103
0
3
LGE107D (S7M Divx_Non RM)
NC_28
R123
OPT1K
R125
OPT 1K
R/B
47
R126
1K
1K
3.9K
NC_5
NC_6
R109
R107
/F_RB
NC_4
2
R124
1K
NC_3
NC_29
48
R117
1K
NC_2
2GBIT
R120
OPT1K
/PF_CE0
H : Serial Flash
L : NAND Flash
/PF_CE1
H : 16 bit
L :
8 bit
1
R115
1K
NC_1
R116
1K OPT
R118
1K OPT
R121
1K
NAND FLASH MEMORY
AB14
AB15
FRC_PWM0
AB14
FRC_PWM1
GP2_Saturn7M
FLASH/EEPROM/GPIO
Ver. 1.3
1
LGE Internal Use Only
RSDS Power OPT
+3.3V_Normal
MODEL OPTION
MODEL_OPT_3
MODEL_OPT_4
NO_FRC
R227
1K
F4
DDC_SCL_1
E6
HPD1
IM
A_RX1N
A_RX2P
SSIF/SIFP
A_RX2N
SSIF/SIFM
DDCDA_DA/GPIO24
C1
CK-_HDMI2
D1
D0+_HDMI2
D2
D0-_HDMI2
D1+_HDMI2
E2
E3
D1-_HDMI2
F3
D2+_HDMI2
E1
D2-_HDMI2
D4
DDC_SDA_2
E4
DDC_SCL_2
D5
HPD2
0.1uF
0.1uF
0.1uF
C4013
C4019
C4024
0.1uF
0.1uF
C4031
0.1uF
C4020
0.1uF
0.1uF
L215
BLM18PG121SN1D
+3.3V_Normal
L227
BLM18PG121SN1D
Y2
DDCDA_CK/GPIO23
QP
HOTPLUGA/GPIO19
QM
C4015
0.1uF
Y1
C4064
0.1uF
U3
D3
CK+_HDMI2
V1
TP203
V3
Close to MSTAR
R4019
1K
TP204
R4020
10K
Y5
B_RXCP
IFAGC
B_RXCN
RF_TAGC
B_RX0P
IF_AGC_MAIN
Y4
R4032
TP205
TGPIO0/UPGAIN
B_RX1P
TGPIO1/DNGAIN
B_RX1N
TGPIO2/I2C_CLK
B_RX2P
TGPIO3/I2C_SDA
B_RX2N
AMP_SCL
AMP_SDA
22
R4033
0
CHINA_OPT R291
CHINA_OPT R292
U1
B_RX0N
0
U2
XTALIN
DDCDB_CK/GPIO25
XTALOUT
DEMOD_SCL
FRC_LPLL:13mA
FRC_LPLL
L206
BLM18PG121SN1D
DEMOD_SDA
R3
M18
M19
N18
N19
N20
P18
P19
FRC_VDD33_DDR:50mA
FRC_MPLL:4mA
FRC_AVDD
P20
FRC_VDD33_DDR
L222
BLM18PG121SN1D
TU_SDA
C261
T1
HOTPLUGB/GPIO20
27pF
FRCVDDC
C262
C4045
1uF
L7
AVDD_DMPLL
AA4
DDC_SCL_4
AC3
HPD4
DM_P0
C_RX1N
DP_P0
C_RX2P
DM_P1
DDCDC_DA/GPIO28
DP_P1
A3
CK-_HDMI3
B3
D0+_HDMI3
A1
B1
B2
D1-_HDMI3
C2
D2+_HDMI3
C3
D2-_HDMI3
B4
DDC_SDA_3
C4
DDC_SCL_3
E5
HPD3
D6
CEC_REMOTE_S7
DSUB_R+
DSUB_R-
33
C204
0.047uF
K1
R229
68
C205
0.047uF
L3
R230
DSUB_G+
DSUB_GDSUB_B+
10K
10K
D_RXCP
I2S_IN_SD/GPIO176
D_RXCN
I2S_IN_WS/GPIO174
D_RX0P
C206
0.047uF
K3
68
C207
0.047uF
K2
R232
33
C208
0.047uF
J3
R234
68
0
C209
C210
0.047uF
1000pF
J2
J1
0.1uF
C4017
0.1uF
C4008
0.1uF
C4002
NEC_SDA
F13
Y15
VDD33_DVI
I2S_OUT_BCK/GPIO181
D_RX1P
I2S_OUT_MCK/GPIO179
D_RX1N
I2S_OUT_SD/GPIO182
D_RX2P
I2S_OUT_SD1/GPIO183
D_RX2N
I2S_OUT_SD2/GPIO184
DDCDD_DA/GPIO30
I2S_OUT_SD3/GPIO185
DDCDD_CK/GPIO29
I2S_OUT_WS/GPIO180
Normal 2.5V
AUD_SCK
E20
AUD_MASTER_CLK
D19
AUD_LRCH
R4029
F18
0 OPT
AMP_SCL
E18
MODEL_OPT_4
D18
MODEL_OPT_5
E19
+2.5V_Normal
AUD_LRCK
HOTPLUGD/GPIO22
C236
N1
LINE_IN_0R
HSYNC0
LINE_IN_1L
VSYNC0
LINE_IN_1R
RIN0P
LINE_IN_2L
RIN0M
LINE_IN_2R
GIN0P
LINE_IN_3L
GIN0M
LINE_IN_3R
BIN0P
LINE_IN_4L
BIN0M
LINE_IN_4R
SOGIN0
LINE_IN_5L
2.2uF
C237
P3
P1
C238
P2
C239
2.2uF
2.2uF
P4
C4059
2.2uF
2.2uF
P5
C4060
2.2uF
R6
C242
2.2uF
T6
C243
2.2uF
U5
C244
2.2uF
V5
U6
C245
C246
V6
C247
SC1/COMP1_L_IN
SC1/COMP1_R_IN
AV_L_IN
AV_R_IN
SIDEAV_L_IN
SIDEAV_R_IN
COMP2_L_IN
COMP2_R_IN
R4022
0
AU33
1/10W
5%
P8
AU25:10mA
2.2uF OPT
2.2uF OPT
VDD33
AVDD25_PGA:13mA
W20
VDD_RSDS
M3
BIN2M
VRP
SOGIN2
HP_OUT_1L
TU_CVBS
33
C225
0.047uF
N4
R245
33
C226
0.047uF
N6
R246
AV_CVBS_IN
SIDEAV_CVBS_IN
CHB_CVBS_IN
AV_CVBS_IN2
C203
1000pF
OPT
33
C227
0.047uF
L4
R4016
33
C4057 0.047uF
L5
R248
33
C229
L6
0.047uF
R249
33
C230
0.047uF
M4
R250
33
C231
0.047uF
M5
R251
33
C232
0.047uF
K7
M7
DTV/MNT_VOUT
R252
68
C233
0.047uF
CM2012F5R6KT
5.6uH
R1 L203
R2 L205
H/P OUT
CVBS1P
5.6uH
HP_ROUT
E21
CVBS2P
ET_RXD0
CVBS3P
ET_TXD0
CVBS4P
ET_RXD1
CVBS6P
ET_TXD1
R278 ETHERNET 33
EPHY_TXD0
F21
EPHY_RXD1
R280 ETHERNET 33
EPHY_TXD1
E23
ET_REFCLK
CVBS_OUT1
ET_TX_EN
CVBS_OUT2
ET_MDC
ET_MDIO
VCOM0
EPHY_RXD0
D21
CVBS5P
N5
E22
D23
R282 ETHERNET 33
R283 ETHERNET 33
R284 ETHERNET 33
F23
R285 ETHERNET 33
D22
F22
ET_CRS
+1.5V_FRC_DDR
HP_LOUT
CM2012F5R6KT
CVBS0P
M6
EPHY_REFCLK
EPHY_EN
EPHY_MDC
EPHY_MDIO
EPHY_CRS_DV
GND_32
AVDD2P5_ADC_1
GND_33
AVDD2P5_ADC_2
GND_34
AVDD25_REF
GND_35
GND_37
GND_40
PVDD_1
GND_41
PVDD_2
GND_42
GND_43
GND_44
GND_46
GND_47
GND_49
AVDD_DVI_1
GND_50
AVDD_DVI_2
GND_51
AVDD3P3_CVBS
GND_52
AVDD_DMPLL
GND_53
GND_55
AVDD_AU33
GND_56
AVDD_EAR33
GND_57
GND_59
GND_60
GND_61
VDDP_1
GND_62
VDDP_2
GND_63
VDDP_3
GND_64
GND_66
FRC_VD33_2_1
GND_67
FRC_VD33_2_2
GND_68
GND_69
FRC_AVDD_RSDS_1
GND_70
FRC_AVDD_RSDS_2
GND_71
FRC_AVDD_RSDS_3
GND_72
GND_73
FRC_AVDD
GND_74
FRC_AVDD_LPLL
GND_75
FRC_AVDD_MPLL
GND_76
GND_77
GND_78
0.1uF
GND_81
R19
W14
AVDD_MEMPLL
GND_82
FRC_AVDD_MEMPLL
GND_83
C285
0.1uF
C4038
0.1uF
0.1uF
C4032
C4036
0.1uF
C4028
10uF
D16
MVREF
AVDD_DDR0_D_1
GND_86
AVDD_DDR0_D_2
GND_87
AVDD_DDR0_D_3
GND_88
AVDD_DDR0_D_4
GND_89
AVDD_DDR0_C
GND_90
GND_91
F16
G16
AVDD_DDR_FRC
GND_85
D15
G17
H17
AVDD_DDR_FRC
AVDD_DDR1_D_1
GND_92
AVDD_DDR1_D_2
GND_93
AVDD_DDR1_D_3
GND_94
AVDD_DDR1_D_4
GND_95
AVDD_DDR1_C
GND_96
GND_98
AB11
AB12
AC11
AC12
AA12
FRC_AVDD_DDR_D_1
GND_99
FRC_AVDD_DDR_D_2
GND_100
FRC_AVDD_DDR_D_3
GND_101
FRC_AVDD_DDR_D_4
GND_102
FRC_AVDD_DDR_C
GND_103
GND_104
TP206
RSDS Power OPT
GND_105
+1.26V_VDDC
GND_106
G8
L228
BLM18SG700TN1D
OPT
R298
100
IR
+1.26V_VDDC
FRCVDDC
MVREF
H18
H19
J10
J17
J18
J19
K9
K10
K11
K12
K13
K14
K15
K16
K17
K18
L9
L10
L11
L12
L13
L14
L15
L16
L17
M9
M10
M11
M12
M13
M14
M15
M16
M17
N10
N11
N12
N13
N14
N15
N16
N17
P10
P11
P12
P13
P14
P15
P16
P17
R10
R11
R12
R13
R14
R15
R16
R17
R18
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
U10
U11
U12
U13
U14
U15
U16
U17
V7
V8
V9
V10
V11
V12
V13
V14
V15
V16
V17
V18
W7
W8
W9
W10
W11
W12
W13
W16
W17
W18
Y13
Y18
AA13
AB13
AC13
GND_107
G15
L225
BLM18SG700TN1D
OPT
R205
U3_RESET
FRC
22
10K
R4017
R4018
FRC
10K
L226
BLM18SG700TN1D
+3.3V_Normal
FRC_RESET
C4063 10uF
Y17
0.1uF
MIU1VDDC
SOC_RESET
J9
GND_FU
Y7
Y8
NC_1
NC_2
L223
U9 BLM18SG121TN1D
PGA_VCOM
C4056
A4
C4066 10uF
K8
10K
RESET
GND_38
GND_97
R4006
IRINT
TESTPIN
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GND_30
H10
MVREF
F8
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
GND_29
DVDD_NODIE
Y14
F17
AVDD_DDR_FRC:55mA
MIU0VDDC
AVLINK
TP211
0
R4027
AVDD_DDR1
AVDD_DDR0
Close to MSTAR
AV_CVBS_IN2
T20
E17
HP_OUT_1R
CVBS7P
TP210
U18
E16
P6
RMII For Ethernet
SC1_CVBS_IN
R244
AVDD1P2
W19
E15
0.1uF
1000pF
GND_28
H9
C4058
C224
VAG
C4061 10uF
0
R7
BIN2P
C263
10uF
C241
R243
GIN2M
GND_26
GND_80
AVDD_DDR0
0.1uF
L1
L2
C256
0.1uF
C4022
0.047uF
C253
1uF
C4018
C223
C249
4.7uF
10uF
68
GND_25
VDD33
AVDD_DDR1
1/16W
1%
R242
P7
VRM
0.1uF
0.047uF
0.047uF
GIN2P
GND_24
GND_79
1/16W
1%
COMP2_Pb-
C221
C222
M1
R241
68
33
RIN2M
R4014
1K
M2
0.1uF
R4015
1K
0.047uF
0.1uF
C220
C4009
33
C4042
R239
C4010 FRC
N2
0.1uF
C240 FRC
0.047uF
L202
BLM18SG121TN1D
0.1uF
C219
GND_23
FRC_VDDC_8
T4
AUCOM
0.1uF
68
RIN2P
0.1uF
COMP2_Pb+
N3
R238
R240
COMP2_Y-
0.047uF
FRC_VDDC_7
GND_84
C4062
COMP2_Y+
C218
OPT
HSYNC2
C4003
COMP2_Pr-
33
GND_22
U19
U20
AVDD_DDR1:55mA
AVDD_DDR0
0.1uF
R237
GND_21
FRC_VDDC_6
V20
FRC_VDD33_DDR
AVDD_DDR0:55mA
5%
1/10W
MICIN
H5
T5 C234 OPT 2.2uF
R5 C235
2.2uF
0.1uF
MICCM
NON_EU
COMP2_Pr+
R4
MIC_DET_IN
C297
0
FRC_VDDC_5
AVDD_DDR0
+1.5V_DDR
BIN1M
SOGIN1
GND_20
FRC_VDD33_DDR
FRC
J5
TP209
0.1uF
1000pF
SCART1_Rout
W5
C4004 FRC
C217
FRC_VDDC_4
GND_65
DDR3 1.5V
C298
J6
LINE_OUT_3R
Y3
C4046
0.047uF
LINE_OUT_2R
BIN1P
TP208
0.1uF
C216
GIN1M
V4
FRC
H4
LINE_OUT_0R
0.1uF
R236
K6
GND_19
T9
R9
FRC_LPLL
C290
SC1_SOG_IN
68
C215
0.047uF
0.047uF
GIN1P
TP207
10uF
R258
SC1_B-/COMP1_Pb-
C214
J4
W4
BLM18PG121SN1D
R257
68
33
0.047uF
LINE_OUT_3L
10uF
SC1_G-/COMP1_YSC1_B+/COMP1_Pb+
C213
LINE_OUT_2L
RIN1M
SCART1_Lout
C291
R256
33
RIN1P
W3
BLM18PG121SN1D
R255
SC1_G+/COMP1_Y+
GND_18
FRC_VDDC_3
AVDD33_T
FRC_AVDD
C281
K4
BT_LOUT
C278
0.047uF
U4
LINE_OUT_0L
10uF
C212
HSYNC1
FRC
68
FRC_VDDC_2
GND_58
L219
BLM18PG121SN1D
PC_R_IN
FRC
R254
GND_17
T7
U7
AVDD25_PGA
+2.5V_Normal
L212
BLM18PG121SN1D
PC_L_IN
2.2uF
AVDD_DMPLL
ADC2P5
T8
10uF
K5
FRC_VDDC_1
GND_54
AU25
+2.5V_Normal
C282
0.047uF
GND_16
R8
C279
C211
GND_15
FRC_VDDC_0
N9
N8
AVDD2P5
AVDD2P5
L211
BLM18PG121SN1D
L209
SC1_R-/COMP1_Pr-
33
GND_14
M8
P9
AVDD2P5/ADC2P5:162mA
AUDIO OUT
SC1_R+/COMP1_Pr+
R253
GND_13
B_DVDD
GND_48
NEC_SCL
D20
D_RX0N
VSYNC1
A_DVDD
U8
V19
H6
GND_12
W15
G4
SC1_FB
GND_11
COMP2_DET
F15
LINE_IN_5R
SC1_ID
GND_10
VDDC_11
AVDD_NODIE
FRC
L210
R4026
R4023
33
R231
R233
DSUB_B-
SCART1_RGB/COMP1
R228
VDDC_10
GND_45
AUDIO IN
DSUB_VSYNC
G6
GND_9
AVDD25_PGA
AVDD_DMPLL
F14
I2S_IN_BCK/GPIO175
G5
VDDC_9
SIDE USB
LINE_IN_0L
R4024 22
R4025 22
SIDE_USB_DP
DDCDC_CK/GPIO27
CEC/GPIO5
DSUB_HSYNC
AVDD25_PGA
I2S_I/F
D0-_HDMI3
D1+_HDMI3
SIDE_USB_DM
AE17
GND_8
L8
AVDD_DMPLL/AVDD_NODIE:7.362mA
AF17
C_RX2N
A2
AVDD2P5
BT_DP
AVDD2P5
HOTPLUGC/GPIO21
CK+_HDMI3
BT_DM
A7
0.1uF
DDC_SDA_4
C_RX1P
GND_7
VDDC_8
GND_39
C4026
AB4
B7
VDDC_7
AVDD_AU25
0.1uF
AC1
D2-_HDMI4
B/T USB
C_RX0N
AU25
C288
0.1uF
C4027
AC2
D2+_HDMI4
C287
10uF
0.1uF
AB2
D1-_HDMI4
SPDIF_OUT
C_RX0P
GND_6
GND_36
C295
AB3
SPDIF_OUT/GPIO178
100
0.1uF
AA3
D0-_HDMI4
D1+_HDMI4
C_RXCN
R296
AMP_SDA
GND_5
VDDC_6
H7
J7
C296
AB1
D0+_HDMI4
G13
0 OPT
0.1uF
CK-_HDMI4
SPDIF_IN/GPIO177
C289 10uF
AA1
R4028
G14
C_RXCP
VDDC_5
GND_31
L217
BLM18PG121SN1D
C294
AA2
GND_4
J11
J8
CK+_HDMI4
VDDC_4
GND_27
27pF
L207
BLM18PG121SN1D
GND_3
U3_DVDD_DDR
ADC2P5
VDD33_DVI:163mA
+3.3V_Normal
VDD33_DVI
X201
24MHz
GND_2
VDDC_3
Y12
TU_SCL
T3
T2
DDCDB_DA/GPIO26
C4065
0.022uF
16V
TU/DEMOD_I2C
22
VDD33
GND_1
VDDC_2
L19
L221
BLM18PG121SN1D
0.1uF
IP
A_RX1P
C4040
F5
DDC_SDA_1
V2
A_RX0N
K19
MIU1VDDC
G18
VDDC_1
H16
MIU0VDDC
FRC_AVDD
VDD33
0.1uF
H2
D2-_HDMI1
AU33
C4041
D2+_HDMI1
J16
FRC_AVDD:60mA
0.1uF
H1
J15
AU33:31mA
VDD33
A_RX0P
J13
C4023
D1-_HDMI1
TP202
AVDD_MEMPLL:24mA
0.1uF
G1
W1
J14
J12
L18
C4016
H3
ANALOG SIF
Close to MSTAR
TP201
VIFM
47
H15
C4025
0.1uF R4003
TU_SIF
0.1uF
G3
D0-_HDMI1
D1+_HDMI1
A_RXCN
47
C286
G2
D0+_HDMI1
W2
VIFP
1M
CK-_HDMI1
S7M_DIVX
IF_N_MSTAR
C4014
0.1uF R4002
IF_P_MSTAR
0.1uF
0.1uF
C4012
C258
0.1uF
100
C4007
R289
C4001 10uF
0.1uF
C293 10uF
C257
C250
R287
F2
A_RXCP
DTV_IF
100
H13
H14
C284 10uF
Close to MSTAR
R288
S7M_DIVX
H11
VDD33_T/VDDP/U3_VD33_2:47mA
L204
BLM18PG121SN1D
0.1uF
1K
LVDS
R212
DDR_256MB
R209
1K
R207
HD
1K
50/60Hz LVDS
R297
1K
NON_GIP
R293
1K
1K
LCD
R215
VDD33
H12
F1
IC101
(S7M Divx_Non RM)
Normal Power 3.3V
+3.3V_Normal
CK+_HDMI1
HDMI
0.1uF
+1.26V_VDDCLGE107D
MODEL_OPT_6
C251
DSUB
C4011
MODEL_OPT_5
IC101
LGE107D (S7M Divx_Non RM)
COMP2
VDDC : 2026mA
MODEL_OPT_2
3D
CVBS In/OUT
C4006
LCD
0.1uF
OLED
0.1uF
F9
C299
NON_GIP
MODEL_OPT_6
C292
50/60Hz LVDS
GIP
0.1uF
100/120Hz LVDS
D18
0.1uF
E18
MODEL_OPT_5
C4005
0.1uF
C283
MODEL_OPT_4
S7M
0.1uF
HD
C280
FHD
C277
B6
MODEL_OPT_0
MODEL_OPT_1
10uF
MODEL_OPT_3
L214
BLM18PG121SN1D
VDD33
10uF
DDR_256MB
C276
LVDS
DDR_512MB
10uF
MINI LVDS
C275
C5
F7
C228
1K
FRC
R226
MINI_LVDS
R211
1K
1K
1K
DDR_512MB
R208
1K
FHD
R206
MODEL_OPT_1
MODEL_OPT_2
C4044
3D 100
VDD_RSDS
OPT
L213
BLM18PG121SN1D
+2.5V_Normal
0.1uF
R213
NO FRC
C4043
100
LOW
FRC
1000pF
100
R210
HIGH
G19
OPT
C264
/3D_FPGA_RESET
R204
PIN NO.
+1.26V_VDDC
VDDC 1.26V
C272
4.7uF
BT_ON/OFF
3D_POWER_EN
100
100
PIN NAME
MODEL_OPT_0
C268
4.7uF
RF_SWITCH_CTL
100
R202
R203
100/120Hz LVDS
R294
1K
1K
LNA2_CTL
GIP
R295
OLED
R214
R201
IF_AGC_SEL
+1.26V_VDDC
VDD_RSDS:88mA
MODEL OPTION
GP2_Saturn7M
MAIN_2
Ver. 1.4
2
LGE Internal Use Only
IC301-*1
H5TQ1G63BFR-H9C
VCC1.5V_U3_DDR
DDR3 1.5V By CAP - Place these Caps near Memory
VCC1.5V_U3_DDR
FRC_DDR_1333
+1.5V_FRC_DDR
N3
P7
0.1uF
0.1uF
C323
0.1uF
C322
0.1uF
C321
0.1uF
C320
0.1uF
C319
0.1uF
C318
0.1uF
C317
0.1uF
C315
0.1uF
C316
C313
0.1uF
0.1uF
C311
0.1uF
C310
0.1uF
C309
0.1uF
C308
0.1uF
C307
0.1uF
C306
0.1uF
C305
C303
10uF
C301
L301
P3
N2
C324
10uF
10V
C325
0.1uF
16V
P8
P2
R8
R2
Close to DDR Power Pin
T8
R3
L7
R7
N7
T3
VCC1.5V_U3_DDR
M8
A0
A2
A3
A5
A6
A8
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_6
1K 1%
C-MA2
C-TMA2
C-TMA1
C-MA0
C-TMA0
C-TMA2
C-MBA2
C-TMBA2
C-TMA3
10
AR302
C-TMA8
C-MA6
C-TMA6
C-MA4
C-TMA4
C-MBA1
C-TMBA1
10
A4
R303
A5
L8
ZQ
240
1%
A7
A8
B2
D9
G7
K2
K8
N1
N9
R1
VCC1.5V_U3_DDR
A6
R9
VDD_1
VDD_2
A9
A10/AP
VDD_3
A11
VDD_4
A12/BC
VDD_5
A13
VDD_6
VDD_7
C-TMA10
C9
D2
E9
F1
H2
H9
L1
L9
T7
T8
R3
L7
R7
N7
T3
VDDQ_2
N8
M3
J7
CK
CK
CKE
K7
J2
J8
M1
M9
P1
P9
T1
T9
VDDQ_7
ODT
VDDQ_8
RAS
VDDQ_9
CAS
K1
J3
K3
L3
WE
NC_1
T2
RESET
D1
D8
E2
E8
F9
G1
G9
AE16
F3
DQSL
G3
VSS_1
DQSU
VSS_2
DQSU
VSS_3
B7
E7
VSS_4
DML
VSS_5
DMU
VSS_6
D3
E3
VSS_7
DQL0
VSS_8
DQL1
VSS_9
DQL2
VSS_10
DQL3
VSS_11
DQL4
VSS_12
DQL5
F7
F2
F8
H3
H8
G2
H7
DQL7
A1P/RLV1P/RED[7]
FRC_DDR3_A5/DDR2_A10
A1M/RLV1N/RED[6]
FRC_DDR3_A6/DDR2_A0
A2P/RLV2P/RED[5]
FRC_DDR3_A7/DDR2_A5
A2M/RLV2N/RED[4]
FRC_DDR3_A8/DDR2_A2
A3P/RLV4P/RED[1]
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4
C-MA6
C-MA7
C-TMBA2
C-MA7
C-TMA7
C-MRESETB
C-TMRESETB
AF14
AD1
AE14
AE13
C-TMCKB
C-TMCKB
C-MCKB
10
B1P/RLV7P/GREEN[5]
FRC_DDR3_BA2/DDR2_A12
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
FRC_DDR3_MCLK/DDR2_MCLK
FRC_DDR3_CKE/DDR2_RASZ
B3P/TCON11/BLUE[9]
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3M/TCON10/BLUE[8]
C-TMRASB
C-MRASB
AD5
AF4
C-TMCASB
AD4
C-MCKB
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
FRC_DDR3_RESETB/DDR2_A3
C-TMCASB
C-TMDQSL
C-MCASB
C-MWEB
C-MODT
C-TMODT
C-TMDQSLB
C-MWEB
C-TMWEB
C-MBA0
C-TMBA0
10
AD9
FRC_DDR3_DQSL/DDR2_DQS0
C2P/LLV2P/BLUE[1]
FRC_DDR3_DQSLB/DDR2_DQSB0
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AE9
C-TMDQSU
AF9
C-TMDQSUB
C-TMDQSL
10
R312
FRC_DDR3_DQSU/DDR2_DQS1
C3M/LLV4N
FRC_DDR3_DQSUB/DDR2_DQSB1
C4P/LLV5P
C-MDQSL
C-MDQSLB
10
C-MDQSU
C-MDQL7
C-TMDQL7
C-MDQSUB
C-MDQL3
C-TMDQL3
C-MDQL1
C-TMDQL1
C-TMDML
C-MDML
AF5
C-TMDQL6
AE12
AF7
AD11
AD7
AD10
C-TMDQU4
C-MDQL0
C-MDQL0
C-TMDQL0
C-MDQL1
C-MDQL2
C-TMDQL2
C-MDQL2
C-MDQL6
C-MDQL3
C-MDQL4
C-TMDQL6
FRC_DDR3_DQL0/DDR2_DQ6
DCKM/TCON4
FRC_DDR3_DQL1/DDR2_DQ0
D0P/LLV6P
FRC_DDR3_DQL2/DDR2_DQ1
D0M/LLV6N
FRC_DDR3_DQL3/DDR2_DQ2
D1P/LLV7P
FRC_DDR3_DQL4/DDR2_DQ4
D1M/LLV7N
FRC_DDR3_DQL5/DDR2_NC
D2P/LLV8P
FRC_DDR3_DQL6/DDR2_DQ3
D2M/LLV8N
FRC_DDR3_DQL7/DDR2_DQ5
D3P/TCON3
D3M/TCON2
AE10
C-TMDQU0
C-TMDQU1
C-TMDQU2
C-TMDQU3
10
AR307
AE7
C-TMDQU5
AF10
C-TMDQU6
AD8
C-TMDQU7
FRC_DDR3_DQU0/DDR2_DQ8
D4P/TCON1
FRC_DDR3_DQU1/DDR2_DQ14
C-MDQL5
D7
VSSQ_2
DQU0
VSSQ_3
DQU1
VSSQ_4
DQU2
VSSQ_5
DQU3
VSSQ_6
DQU4
VSSQ_7
DQU5
VSSQ_8
DQU6
C3
C8
C2
A7
A2
B8
A3
DQU7
C-MDQU0
C-MDQU1
C-MDQU2
D4M/TCON0
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9
GPIO2/TCON7/LDE/GCLK4
FRC_DDR3_DQU7/DDR2_DQM1
GPIO3/TCON6/LCK/GCLK2
Y24
C-MDQU3
C-TMDQU2
C-TMDQU6
C-TMDQU0
10
C-MDQU4
C-MDQU5
C-MDQU6
C-MDQU7
C-TMDQU4
C-MDQU4
FRC_GPIO1
C-TMDQU1
C-TMDQU5
C-MDQU5
10
C9
D2
E9
F1
H2
H9
NC_2
NC_4
J9
L1
L9
T7
NC_6
DQSL
B7
FRC_GPIO8
FRC_GPIO9/UART_TX
AE8
FRC_DDR3_NC/DDR2_DQM0
R317
820
A9
DQSU
VSS_1
DQSU
VSS_2
AA25
D3
RXA0-
AA24
VSS_3
E7
RXA0+
DML
VSS_4
DMU
VSS_5
RXA1+
AB26
AB25
F7
RXA2+
AB24
F2
RXA2-
AC24
F8
RXA3+
AD26
H3
RXA3-
AD25
H8
RXA4+
AD24
VSS_6
E3
RXA1-
G2
RXA4-
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
C3
RXCCK-
AE26
C8
RXC0+
AE25
C2
RXC0-
AF26
A7
RXC1+
AF25
A2
RXC1-
AE24
B8
RXC2+
AF24
A3
RXC2-
AF23
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQL6
B1
VSSQ_1
D7
RXCCK+
AE23
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
RXC3+
AD22
RXC3-
AE22
RXC4+
AF22
RXC4-
RXDCK+
AE19
RXDCK-
AD21
RXD0+
AE21
RXD0-
AF21
<U3 CHIP Config>
RXD1+
AD20
(FRC_CONF0)
RXD1-
AE20
RXD2+
AF20
HIGH : I2C ADR = B8
LOW : I2C ADR = B4
RXD2-
AF19
RXD3+
AD18
(FRC_CONF1,FRC_PWM1, FRC_PWM0)
RXD3-
AE18
3’d5 : boot from internal SRAM
3’d6 : boot from EEPROM
3’d7 : boot form SPI flash
RXD4+
AF18
RXD4-
GVDD_EVEN
AC23
GCLK4
AC22
GCLK2
UART_FRC_RX
AA14
AC15
FRC_CONF0
R300
FRC_I2CM_DA
FRC_TESTPIN
FRC_I2CM_CK
FRC_CONF0
FRC_CONF1
FRC_PWM1
FRC_CONF1
UART_FRC_TX
AC16
FRC_PWM0
AC14
TP301
0 R327
AA15
Y10
FRC_I2CS_DA
DPM_A
OPT
AA16
FRC_REXT
R336
0
MINI_LVDS
0
FRC_GPIO10
Y11
+3.3V_Normal
GVDD_ODD
AB23
R328
0
TP302
AA11
FRC_I2CS_CK
AB15
OPT
R334
22
R335
FRC_SDA
22
FRC_SCL
OPT
R326 22
R331 22
FRC
FRC
I2C_SDA
FRC_PWM0
I2C_SCL
FRC_PWM0
AB14
FRC_PWM1
FRC_PWM1
R332
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
C1
J1
NC_1
DQSL
A8
C-TMDQU3
C-MDQU3
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
G3
RXACK+
AA26
C-TMDQU7
C-MDQU1
VDDQ_9
RXACK-
Y16
Y19
AR309
C-MDQU7
VDDQ_8
CAS
F3
RXB4-
AC25
FRC_GPIO3
C-MDQU0
RAS
NC_3
RXB4+
AB16
FRC_GPIO0/UART_RX
C-TMDQL5
10
C-MDQU6
VDDQ_7
RESET
AB22
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
FRC_DDR3_DQU6/DDR2_DQ10
R316
C-MDQU2
VDDQ_6
ODT
RXB3-
Y25
AR308
VSSQ_1
CS
T2
C-TMDQL4
C-MDQL5
C-MDQL7
VDDQ_5
RXB3+
Y26
R9
FRC_DDR3_DQU2/DDR2_DQ13
10
C-MDQL4
C-MDQL6
AE5
AF12
C-TMDQL7
AR306
C-MDML
AD12
C-TMDQL3
C-TMDQL5
C-TMDMU
C-MDMU
AD6
C-TMDQL4
R315
VDDQ_4
WE
RXB2-
W24
AD19
DCKP/TCON5
AE6
AF11
C-TMDQL1
C-TMDQL2
C-TMDQSUB
VDDQ_3
CKE
RXB2+
V24
R1
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
C-TMDQL0
C-TMDQSU
10
R314
C-MDMU
AF6
C-TMDMU
10
R313
C-MDQSU
C-MRESETB
V25
C4M/LLV5N
AE11
C-TMDML
C-TMDQSLB
C-MDQSLB
VCC1.5V_U3_DDR
R333
10K
C0M/LLV0N/BLUE[4]
C1M/LLV1N/BLUE[2]
AF8
R311
C-MRASB
L3
RXB1-
AD23
CCKP/LLV3P
FRC_DDR3_WEZ/DDR2_BA0
C1P/LLV1P/BLUE[3]
C-MDQSL
CK
DQL7
FRC_DDR3_CASZ/DDR2_CKE
AE2
C-TMRESETB
C-MCASB
C-MODT
V26
H7
FRC_DDR3_RASZ/DDR2_WEZ
AR305
C-MBA2
K3
RXB1+
FRC_DDR3_ODT/DDR2_BA1
10
C-MBA1
U24
B4M/TCON8/BLUE[6]
AE4
C-TMODT
C-TMWEB
10
B2M/RLV8N/GREEN[2]
B4P/TCON9/BLUE[7]
C-TMRASB
C-TMCKE
C-MCKE
C-MBA0
B0M/RLV6N/GREEN[6]
FRC_DDR3_BA1/DDR2_ODT
AD13
C-TMCK
10
R308
C-MA12
FRC_DDR3_BA0/DDR2_BA2
C-TMCK
C-MCK
C-MA11
J3
RXB0-
A4M/RLV5N/GREEN[8]
B0P/RLV6P/GREEN[7]
AF3
C-TMCKE
R307
VDDQ_2
C7
C-TMA5
C-MA10
U25
N9
FRC_DDR3_A12/DDR2_A8
C-TMBA0
10
C-MA9
K1
RXB0+
AC26
C-MA5
C-MA8
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
BCKM/TCON12/GREEN[0]
C-TMBA1
10
C7
VSSQ_9
AD15
A0M/RLV0N/RED[8]
FRC_DDR3_A4/DDR2_CASZ
BCKP/TCON13/GREEN[1]
C-TMA3
C-MDQSUB
NC_4
DQL6
B9
C-MA5
NC_3
B1
AD16
C-TMA12
C-MA3
L2
CS
A9
G8
C-MA3
C-MA4
K9
DQSL
E1
AR304
C-MCKE
VDDQ_5
NC_6
B3
C-MA2
C-MCK
VDDQ_4
NC_2
C-TMA9
R310
VDDQ_3
VDDQ_6
C-TMA1
C-TMA11
R309
M2
BA0
VDDQ_1
J1
J9
R2
BA2
A1
C1
R8
AD2
FRC_DDR3_A3/DDR2_A1
RXBCK-
U26
N1
A1
VDDQ_1
L2
C-TMA12
C-MA1
C-MA11
A15
BA1
A8
P2
AE15
C-TMA8
A0P/RLV0P/RED[9]
10
M7
VDD_8
VDD_9
P8
AF2
C-TMA7
ACKM/RLV3N/RED[2]
FRC_DDR3_A2/DDR2_A7
K8
R322
OPT1K
A3
N2
C-MA1
150
VREFDQ
P3
C-MA0
OPT
R306
C-MVREFDQ
A2
H1
P7
C-TMA6
FRC_DDR3_A1/DDR2_A6
K2
VDD_9
CK
RXBCK+
W25
G7
R318
1K
A1
AF15
ACKP/RLV3P/RED[3]
R321
OPT 1K
R323
1K
A0
AD3
C-TMA11
C-MA12
N3
VREFCA
AD14
C-TMA10
AR303
FRC_DDR_1600
M8
AE3
C-TMA5
C-MA10
C-MVREFCA
AF1
C-TMA4
C-MA8
IC301
H5TQ1G63BFR-12C
AF16
W26
FRC_DDR3_A0/DDR2_NC
R324
OPT 1K
CLose to Saturn7M IC
AE1
C-TMA0
R320
1K
1000pF
0.1uF
C314
1%
1K
C312
C-TMA9
C-MA9
R319
OPT1K
R325
1K
R304
R305
1000pF
0.1uF
C304
C302
R301
1K 1%
1%
R302
1K
CLose to DDR3
K9
D9
BA1
J7
K7
AR301
BA0
BA2
IC101
LGE107D (S7M Divx_Non RM)
C-MVREFCA
VDD_7
VDD_8
M2
C-MVREFDQ
B2
A9
A15
M3
L8
ZQ
A7
M7
N8
H1
VREFDQ
A4
VCC1.5V_U3_DDR
S7M_DIVX
VREFCA
A1
V_SYNC
0
GP2_Saturn7M
DDR3(FRC)
Ver. 1.4
3
LGE Internal Use Only
+24V
+12V/+15V
+3.5V_ST
17
18
INV ON
12V
19
20
A.DIM
21
22
P.DIM1
GND/P.DIM2
23
24
Err OUT
R440
5.6K
R421
10K
INV_CTL
Q405
2SC3052
0
E
POWER_18_A_DIM
0
R451
CIC21J501NE
L420
R427
10K
OPT
+1.5V_DDR
INV_ON
0
OPT
R449
11K
1/10W
5%
SCAN_BLK1/OPC_OUT
SCLK
1
AGND
1%
Close to IC
GND
2
IN
Placed on SMD-TOP
PWM_DIM
R437
0
POWER_24_ERROR_OUT
GND
R420
BS
OPT
24
Err_out INV_ON PWM_DIM
R486
4.7K
NC
PWM_DIM PWM_DIM
C IN
ERROR_OUT
C461
22uF
10V
R450
1K
R448
12K
PD_+12V
1%
PD_+3.5V
1%
R447-*1
27K
6
POWER_ON/OFF2_2
EN
FB
4
5
COMP
9.1K
R454
6
4
5
SW_1
C472
22uF
10V
VCC
C469
22uF
10V
R1
C473
0.1uF
16V
C485
0.1uF
16V
OPT
C423
100pF
50V
2200pF
C464
NR8040T3R6N
3
R2
C476
0.1uF
Vout=(1+R1/R2)*0.8
C467
0.1uF
50V
Placed on SMD-TOP
0
R455
23
3A
R456
10K
C459
10uF
25V
L423
3.6uH
SW_2
7
3A
3
LX_1
POWER_ON/OFF1
R2
OPC_OUT
C457
10uF
25V
10K
R464
EN/SYNC
8
POWER_20_ERROR_OUT
22
7
L424
CIC21J501NE
0
R452
MOSIN
10
1/10W
1%
C465
1uF
10V
+5V_Normal
+12V/+15V
IC402
L417
+2.5V/+1.8V
+3.3V_Normal
PGND
VIN
+2.5V_Normal
OLP
GND
C432
0.1uF
16V
300 mA
R473
2
L422
3.6uH
LX_2
2
7
2A
3
6
LX_1
POWER_ON/OFF2_2
EN
R459
10K
C460
10uF
25V
C458
10uF
25V
1
1 Vd=550mV3
AGND
VOUT
8
1
FB
4
5
COMP
12K
R458
C403
10uF
10V
+5V_Normal
NR8040T3R6N
AZ2940D-2.5TRE1
VIN
MAX 1A
IC406
AOZ1072AI
Vout=0.8*(1+R1/R2)
R1
C471
22uF
10V
C477
0.1uF
16V
OPT
C427
100pF
50V
2200pF
C466
C440
0.1uF
16V
+1.5V_DDR
5%
Err_out Err_out
0
R470
+3.3V_Normal
10K
IC407
MP2212DN
FB
R422
2
LX_2
NR8040T3R6N
VIN
R1
R457
PWM_DIM
OPT
C419
1uF
25V
8
A_DIM
R484
0
R471 0
POWER_22_PWM_DIM
C416
OPT
0.1uF
16V
L_DIM
1
Replaced Part
POWER_22_A_DIM
R485
0
POWER_24_PWM_DIM
R479
R472 0
0
PGND
1934 mA
L421
3.6uH
R465
51K
NC
IC405
AOZ1073AIL
Vout=0.8*(1+R1/R2)
R460
27K
B
OPT
+3.3V_Normal
+12V/+15V
R461
4.7K
R425
100
C
R418
POWER_24_INV_CTL
6.8K
+3.3V_Normal
1074 mA
OPT
1%
VBR-A
Power_DET
S7M DDR 1.5V
+3.5V_ST
R426
10K
C463
100pF
50V
SLIM_32~52
P401
SMAW200-H24S2
+3.5V_ST
R419
1K
POWER_18_INV_CTL
R415
100
OPT
20
PD_+12V
+3.3V_Normal
POWER_24_GND
R475
0
R478
0
POWER_23_SCAN_BLK2
SCAN_BLK2
INV_ON
E
POWER_20_A_DIM
0
POWER_20_PWM_DIM R453
SHARP
GND
POWER_+20V
PANEL_DISCHARGE_RES
PANEL_DISCHARGE_RES
1:AK10
R466
1.5K
A-DIM
AUO
R480
100
1
1%
INV_ON
CMO(09)
R435
22K
Q406
2SC3052
PD_+12V
RESET
R467
10K
LGD
PANEL_CTL
V_SYNC
2
1%
12V
POWER_16_V_SYNC
R477
0
POWER_+24V
3
1%
GND/V-sync
NCP803SN293
1%
GND
16
1%
3.5V
14
15
R482-*1
24K
12
13
POWER_+20V
VCC
5%
11
GND
GND
E
PD_+12V
100K
IC409
R403-*1
5.1K
3.5V
C
R429
47K
B
1%
3.5V
R407
2.2K
R405
2.2K
C455
0.1uF
16V
R482
24K
10
Q407
2SC3052
1%
9
POWER_+24V
C
B
POWER_DET
C474
0.1uF
GND
R404
+24V
C451
1uF
25V
OPT
OPT
R430
10K
C426
68uF
35V
R402
100
RESET
2
1
G
R403
4.3K
3.5V
C418
0.1uF
50V
3
R462
10K
PIN No
R439
33K
GND
25
<OS MODULE PIN MAP>
18
GND
8
C407
0.1uF
16V
R476
0
C404
0.1uF
16V
POWER_23_GND
C402
100uF
16V
6
7
12V
+12V/+15V
L402
MLB-201209-0120P-N2
24V
5
GND
R412
C408
0.1uF
16V
C406
0.1uF
16V
4
GND
C412
0.1uF
16V
OPT
C401
100uF
16V
24V
L407
MLB-201209-0120P-N2
POWER_16_GND
L404
MLB-201209-0120P-N2
2
C484
1uF
25V
OPT
+3.5V_ST
PWR ON 1
24V
3
PANEL_VCC
C443
4.7uF
16V
+24V
R431
22K
E
R447
5.1K
S
2
Q401
2SC3052
B
NORMAL_32
P404
FM20020-24
NORMAL_EXPEPT_32
P403
FW20020-24S
L416
C
R401
10K
RL_ON
3
1
IC408
NCP803SN293
VCC
Q409
AO3407A
RT1P141C-T112
Q402
R406
4.7K
R488
100K
New item
D
+3.5V_ST
C442
10uF
16V
OPT
C438
0.1uF
16V
OPT
1%
R446
30K
ST_3.5V-->3.5V -> 3.375V
C436
0.01uF
25V
+3.5V_ST -> 3.375V
+3.5V_ST
12V-->3.58V
OPT
R463
10K
L412
15V-->3.6V
20V-->3.5V
24V-->3.48V
1/16W
5%
PD_+12V
FROM LIPS & POWER B/D
PANEL_POWER
PD_+3.5V
1%
+12V/+15V
R2
+1.5V_FRC_DDR
4.7uF
OPT
S
FRC
R438
0
S7M core 1.26V volt
C435
4.7uF
10V
C445
OPT
R443
FRC 10K
G
D
Q408
AO3438
FRC
+3.5V_ST
POWER_ON/OFF2_1
L413
+1.5V_DDR_FRC
Replaced Part
+12V/+15V
Vout=0.8*(1+R1/R2)
+5V_USB
SW_2
C410
0.1uF
BST
3
7
3A
4
6
5
R487
22
R1
R410
10K
FB
EN/SYNC
1%
VCC
R416
33K
2
OPT
C482
100pF
50V
C414
1uF
50V
POWER_ON/OFF2_1
R411
10K
OPT
C429
100pF
50V
FB
C420
22uF
10V
C424
0.1uF
16V
1%
SW_1
C405
10uF
25V
8
1
C428
0.1uF
16V
R432
75K
1/8W
1%
Placed on SMD-TOP
R2
L406
3.6uH
+1.26V_VDDC
R442
C IN
+5V_USB
24K 1%
Close to IC
8
10K
R445
EN/SYNC
POWER_ON/OFF2_1
L415
3.6uH
R2
GND
IN
BS
C430
22uF
10V
1
R444
22K 1%
IC403
MP2212DN
GND
R417
6.2K
L401
IN
R1
MAX 2000mA
IC401
MP8706EN-C247-LF-Z
2
3A
3
7
5
R441
NR8040T3R6N
SW_2
NR8040T3R6N
6
4
OPT
+5V_USB
R434
120K
C439
100pF
50V
2026 mA
SW_1
C453
22uF
10V
VCC
C448
0.1uF
50V
C456
0.1uF
C486
0.1uF
Placed on SMD-TOP
0
R436
Vout=(1+R1/R2)*0.8
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
10
1/10W
1%
C444
1uF
10V
GP2_Saturn7M
POWER
Ver. 1.2
4
LGE Internal Use Only
FLMD0
R1005
10K
P62/EXSCL0
3
P63
4
P33/TI51/TO51/INTP4
5
NEC_EEPROM_SCL
NEC_ISP_Tx
NEC_ISP_Rx
OPT
R1084
NEC_EEPROM_SDA
10K
CEC_REMOTE_NEC
R1020
OCD1A
0
R1065
22
P75
6
R1067
22
P74
7
POWER_ON/OFF2_1
OCD1B
AMP_MUTE
+3.5V_ST
M24C16-WMN6T
RESET
P40
P41
P120/INTP0/EXLVI
40
39
38
37
P130
R1090
22
32
P20/ANI0
R1055
10K
31
ANI1/P21
R1056
22
30
ANI2/P22
R1057
22
R1039
R1051
22
22
R1052
10K
22
P71/KR1
10
27
ANI5/P25
R1063
22
P70/KR0
11
26
ANI6/P26
12
25
ANI7/P27
22
R1060
22
P32/INTP3/OCD1B
OPC_EN
SCART1_MUTE
MODEL1_OPT_3
MODEL1_OPT_2
POWER_ON/OFF1
R1064
R1059
RL_ON
WIRELESS_SW_CTRL
R1054
19~22_LAMP
OLP
SIDE_HP_MUTE
KEY2
KEY1
NON_M_REMOTE
TOUCH_KEY
31
PDP/3D
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
C1009 1uF
R1044
10K
OPT
R1045
10K
OPT
R1083
10K
OPT
NEC_TXD
NEC_RXD
NEC_ISP_Tx
POWER_ON/OFF2_2
NEC_ISP_Rx
TACT_KEY
LCD/OLED
AVSS
P10/SCK10/TXD0
22
R1041
AVREF
P11/SL10/RXD0
22
R1037
P12/SO10
P13/TXD6
P14/RXD6
P15/TOH0
22
30
R1036
MODEL_OPT_2
MODEL_OPT_3
LED_R/BUZZ
LCD/PDP
R1012
10K
PWM_LED
R1004
10K
TACT_KEY
R1011
10K
LCD/OLED
R1074
10K
MODEL1_OPT_3
+3.5V_ST
+3.5V_ST
PWM_LED
IR
0
PWM_BUZZ/GPIO_LED
22
11
LED_B/LG_LOGO
MODEL1_OPT_2
R1068
MODEL_OPT_1
MODEL1_OPT_1
22
LCD/PDP
R1069
OLED/3D
22 NON_M_REMOTE
LOW
8
22 M_REMOTE
HIGH
MODEL_OPT_0
R1062
PIN NO.
R1061
OLED/3D
R1071
10K
MODEL1_OPT_0
CEC_ON/OFF
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
MODEL OPTION
PIN NAME
RF_ENABLE
100
PWM_BUZZ/GPIO_LED
R1009
10K
PDP/3D
R1079
10K
100
R1070
TOUCH_KEY
R1075
10K
+3.5V_ST
P16/TOH1/INTP5
NEC_EEPROM_SDA
P17/TI50/TO50
R1008
POWER_DET
TP1003
5
P30/INTP1
R1080
NEC_EEPROM_SCL
R1007
R1003
33
ANI4/P24
P31/INTP2/OCD1A
TP1002
6
MICOM MODEL OPTION
PANEL_CTL
P01/TI010/TO00
ANI3/P23
22
AMP_RESET_N
34
28
OCD1A
5
22
OPT
R1050
10K
29
22
4
R1049
9
0.1uF
4
7
C1002
6
P00/TI000
8
R1014 4.7K
3
NEC_MICOM
35
8
RF_RESET
R1015 4.7K
R1001
47K
TP1001
3
UPD78F0513AGA-GAM-AX
22
P72/KR2
M_REMOTE
7
IC1002
36
R1048
P73/KR3
OCD1B
2
Q1001
2SC3052
E
P140/PCL/INTP6
22
MODEL1_OPT_1
IC1001
2
EDID_WP
C
B
22
INV_CTL
EEPROM for Micom
8
20K
1/16W
1%
R1023
SOC_RESET
1
R1047
R1066
MODEL1_OPT_0
1
3
24
10K
2
23
R1073
P61/SDA0
22
10K
22
21
R1072
1
R1019
20
+3.5V_ST
P60/SCL0
19
+3.5V_ST
22
15
NEC_SDA
R1018
13
NEC_SCL
10K
1
4
0.1uF
FLMD0
R1002 10K
R1006
2
C1010
1/16W
1%
P124/XT2/EXCLKS
41
22
12
14
R1013
11
13
SW1001
JTP-1127WEM
R1089
20K
P123/XT1
42
0.1uF
OCD1B
18
22
8
9
+3.5V_ST
FLMD0
43
R1081
NEC_ISP_Rx
OCD1A
10
47K
P122/X2/EXCLK/OCD0B
44
22
17
R1010
NEC_ISP_Tx
6
7
R1046
P121/X1/OCD0A
45
22
22
C1006
R1076
R1078
16
5
WIRELESS_DETECT
REGC
46
4
22
VSS
47
+3.5V_ST
3
MICOM_RESET
22
VDD
48
C1003
0.1uF
1
2
R1043
R1086
4.7M
GND
for Debugger
+3.5V_ST
P1001
WIRELESS_PWR_EN
OPT
R1034
R1091 10K
+3.5V_ST
12505WS-12A00
MICOM_RESET
C1008
27pF
22pF
C1007
+3.5V_ST
10K
R1030
47K
X1002
32.768KHz
GP2_Saturn7M
MICOM
Ver. 1.4
5
LGE Internal Use Only
CONTROL
IR & LED
+3.5V_ST
EYEQ/TOUCH_KEY
R2411
100
NEC_EEPROM_SCL
R2404
10K
1%
P2401
12507WR-12L
R2405
10K
1%
C2408
1000pF
50V
OPT
L2401
BLM18PG121SN1D
R2401
100
D2403
1
KEY1
EYEQ/TOUCH_KEY
100
L2402
BLM18PG121SN1D
R2402
100
5.6B
D2402
5.6V
AMOTECH
KEY2
C2401
0.1uF
2
NEC_EEPROM_SDA
R2412
C2402
0.1uF
D2401
5.6V
AMOTECH
C2409
1000pF
50V
OPT
5.6B
D2404
3
JP2407
4
JP2408
5
+3.5V_ST
+3.5V_ST
L2403
BLM18PG121SN1D
+3.5V_ST
R2425
47K
R2428
22
6
+3.5V_ST
R2429
47K
IR
C2404
1000pF
50V
R2413
LED_B/LG_LOGO
B
E
R2431
47K
C
R2426
3.3K
OPT
1.5K
7
OPT
C2410
0.1uF
16V
R2430
10K
C
Q2406
2SC3052
C2403
0.1uF
16V
R2410
100
JP2409
8
JP2410
9
B
Q2405
2SC3052
E
COMMERCIAL
C2407
100pF
50V
+3.3V_Normal
+3.5V_ST
D2405
5.6B
10
L2404
BLM18PG121SN1D
JP2411
R2427
0
+3.5V_ST
R2406
47K
R2403 Commercial_EU
22
OPT
R2414
R2408
47K
R2407 Commercial
10K
IR_OUT
Commercial
C
Q2401
2SC3052
Commercial_EU
C2405
0.1uF
16V
B
E
Commercial_EU
LED_R/BUZZ
C2406
1000pF
50V
1.5K
11
12
OPT
R2416
10K
13
R2409
47K
C
B
Q2402
2SC3052
Commercial
Commercial
E
R2422
0
Commercial_US
Zener Diode is
close to wafer
WIRELESS
R2417
22
+3.5V_ST
+3.5V_ST
R2420
47K
WIRELESS
IR_PASS
WIRELESS
Q2404
2SC3052
WIRELESS
R2418
10K
C
R2419
47K
WIRELESS
B
E
WIRELESS
R2421
47K
C
B
Q2403
2SC3052
WIRELESS
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
E
WIRELESS
GP2_Saturn7M
IR & LED
Ver. 1.2
6
LGE Internal Use Only
[LEVEL Shift Block]
[POWER Block]
D607
MMSD4148T1G
VDD_LCM
(+16V)
EN2
100V
VCC_LCM
(+3.3V)
CHECK Value!!
R635
R640
C628
910K
470K
OPT
1%
1%
OPT
42_FHD_60_LAMP42_FHD_60_LAMP
R625
100
GIP
R642-*1
DISCHG
AGND
CRST
PGOOD
COMP
FB1
SW0
SW1
LX1
LX1
PGND
37
36
35
34
33
32
31
EN2
28
VL
4
27
DEL2
26
EN1
25
FSEL
FBP
GPGND
6
MAX17113ETL+
MINI_LVDS
24
VIN
8
23
IN2
9
22
IN2
10
21
OUT
7
20
NON_GIP
IC603
LX2
0.047uF
VGH_FB
5
VGH_FB
R622
11K
5%
TCON_42_FHD_LAMP
CLK2
GCLK2_I
R629-*1
200
NON_GIP
R694-*1
R631-*1
200
NON_GIP
0
GIP
R695-*1
CLK1
GOE/GCLK1_I
R686
0
GIP
0
GIP
C611
1uF
50V
GIP
R626
10
GIP
R603
OPT
OPT
C618
1uF
50V
GIP
VGL
(-5V)
R630
10
GIP
C622
1uF
10V
R633
10
GIP
VCC_LCM
(+3.3V)
REF
R644
3.6K
VGH
(+25V)
C630
10uF
16V
R637
C627
1uF
50V
27K
42_FHD_60_LAMP
VGL_FB
VGL
(-5V)
560pF
50V
NON_GIP
PANEL_VCC
(+12V)
C643
0.1uF
50V
EN2
R656
360
PANEL_VCC
(+12V)
R634
0
C606
1uF
50V
C644
0.1uF
50V
C651
1uF
10V
R648
1K
C663
22uF
25V
C657
22uF
25V
R649
OPT
OPT
VCC_LCM
(+3.3V)
VGL_FB
R623 R624
300
300
GIP
GIP
C645-*1
C645
R687
0
NON_GIP
FLK
C612
VGH
0.22uF
(+25V)
50V
GIP
38
29
3
19
C677
39
2
GND2
LX2
R694
510 NON_GIP
C676
1uF
VDD_LCM
(+16V)
40
DRVP
SRC
0 GIP
GON
0 GIP
R695
DRN
510 NON_GIP MODE
NON_GIP
DLP
18
R690
R691
BST
14
R621
220K
5%
TCON_42_FHD_LAMP
0.47uF
25V
17
R629 R631
10
10
GIP
GIP
AC
FB2
CLK3
A
16
CLK4
C617
1uF
50V
DEL1
CLK5
C
0
PGND
R639
0
OPT
R638
0
C632
C
150K
42_FHD_60_LAMP
A
AC
C634
0.1uF
50V
GIP
2.8A
0.1uF
50V
D604
MBRA340T3G
40V
C641
150pF
50V
C646
0.1uF
50V
C648
22uF
10V
C655
OPT
OPT
R651
5.1K
C634-*1
2200pF
50V
NON_GIP
D603
KDS226
R643
L601
22UH
C637
REF
18K
Y2
Y1
GON2
GOFF
A1
A2
13
Y3
12
Y4
15
11
16
10
6
7
8
A4
A3
18K
C615
1uF
50V
30
15
Y5
R620
56K
C633
1%
50V TCON_42_FHD_LAMP
4.7uF
1
REF
17
R619
THR
14
GIP
R668
C654
22uF
25V
1000pF
50V
GIP
FBN
5
VST
CLK6
R692
0
NON_GIP
R693
0
NON_GIP
C621
R647 2.2
10K
GIP
13
Y6
D602
KDS226
R627
1000pF
50V
GIP
12
18
4.7uF/50V(3216)
VDD_EVEN
2.8A
11
Y7
IC602
MAX17119DS
R689
VGH
2.7K
NON_GIP (+25V)
VGH_M
(+25V)
D608 MBRA340T3G 40V
CTL
19
4
R689-*1
0
GIP
EN2
100V
L602
22UH
R642
C626
9.1K
1/8W
D605 MBRA340T3G 40V
AGND
GND
RE
FLK3
FLK2
FLK1
3
VGH
(+25V)
VDD_ODD
TH700
47k-ohm
Y8
OPT
D606
MMSD4148T1G
NCP18WB473F10RB
MINI_LVDS
20
27pF 50V
NON_GIP
R688
33K
NON_GIP
YDCHG
Y9
A6
9
GCLK4_I
GSC/GCLK3_I
21
A7
A5
GCLK5_I
THERMAL
29
GON1
GCLK6_I
22
2
23
A8
24
GVDD_EVEN_I
25
1
27
A9
26
EP[VGOFF]
VSENSE
28
GVDD_ODD_I
C625
470pF
50V
NON_GIP
R650
C640
1uF
50V
C626-*1
VDD_LCM
(+16V)
R632
10K
GIP
C638
47uF
25V
1uF 50V
DRVN
FLK
33K
NON_GIP
C629
R636
R641
OPT
510K
27K
1%
1%
OPT
42_FHD_60_LAMP42_FHD_60_LAMP
C653
22uF
25V
C642
1uF
50V
0.1uF
50V
C636
C600 R600
3K
OPT
GIP
OPT
GSP/GVST_I
C635
R612
DPM_A
EN2
10
1uF
50V
Change 100ohm -> 10ohm
R613
1K
GMA16
AMP_SCL
VDD_LCM
(+16V)
VCOMLFB
C639
2.2uF
16V
SW_1
SW_2
PG
13
14
15
PGND_2
MINI_LVDS
R616
10K
OPT
GND_2
11
GND_1
VIN_2
3
EN
4
IC600
TPS62110RSAR 10
MINI_LVDS
9
R665
0
C652
22pF
50V
C659
22uF
16V
C661
10uF
16V
R658
6.2K
OPT
P700
PANEL_VCC
VCOM_FB0
AMP_SCL
R606
20K
R652-*1
1K
NON_GIP
R652
3
0
GIP
R671
4.7K
R615
0
VCOMR
0
R655
VCOML
VCOM
0
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
RXA4-
GCLK5_I
GIP
C675
15pF
50V
NON_GIP
C674
15pF
50V
OPT
VGI_N
GIP
R662
0
R2
AGND
R610
33K
1%
42_FHD_60_LAMP
R666
0
RXA4+
GCLK6_I
C672
15pF
50V
NON_GIP
R617
R611
100K
1%
42_FHD_60_LAMP
Vo = 1.153*(1+R1/R2)
GSC/GCLK3_I
RXDCK-
VGL
(-5V)
0
GIP
C671
15pF
50V
OPT
R645
DISCHG
VGL_I
0
OPT
R653
0
GVDD_ODD
R608
10
GVDD_ODD_I
VCC_LCM
(+3.3V)
GIP
C649
1uF
50V
C669
15pF
50V
OPT
R660
POL
RXD4-
H_CONV
R646
0
C665
15pF
50V
AMP_SDA
R607
7.5K
4
R654
GOE/GCLK1_I
VGL
(-5V)
0
2
R664
0
RXDCK+
R657
6.2K
OPT
For P-Gamma Data Download
12505WS-03A00
VGI_P
FB
8
47K
OPT
12
2
VINA
R605
1
VIN_1
EN2
0
C673
15pF
50V
OPT
GIP
R609
150K
1%
42_FHD_60_LAMP
PGND_1
7
R672
0
LBI
C603
0.1uF
50V
C619
10uF
16
C610
10uF
R614
R1
6
R601
1K
NON_GIP
10uF/25V(3216)
VDD_LCM
(+16V)
GIP
R698
1M
NON_GIP
R696
0
GIP
1
GCLK4_I
GCLK4
PANEL_VCC
(+12V)
C602
0.1uF
50V
R663
0
GSP_R
VGH
(+25V)
GMA4
GMA3
R602
1K
NON_GIP
NON_GIP
GMA6
VCOM_FB0
VCOMRFB
RXD3+
OPT
GMA2
R685
0
C670
15pF
50V
OPT
R5266
3.3K
GMA3
11
6.8uH/1.8A
(6x6x2mm)
L600
6.8uH
MINI_LVDS
GMA7
5
AVDD_AMP
VCOM_FB
12
GMA13
GMA12
10
MINI_LVDS
GCLK2_I
GIP
C667
15pF
50V
NON_GIP
GVDD_EVEN
GVDD_EVEN_I
GIP
C668
15pF
50V
OPT
R661
RXD4+
R5267
0
GMA4
9
5
GCLK2
MINI_LVDS
GMA5
GMA1
4
VCOM
GSP/GVST_I
RXD3-
C605
15pF
50V
NON_GIP
HVDD
LBO
NC_2
AVDD_2
16
17
GMA7
18
GMA8
19
14
NC_1
AGND_AMP
FLK
10 NON_GIP
IC601
13
MAX9668ETP+
THERMAL
21
8
2
3
R667
0
R659
0
R604
RXA3-
GMA6
AVDD_1
A0
DVDD
R628
3.3K
GIP
C604
1uF
50V
15
1
6
VCOM
33
R670
C601
0.1uF
50V
SDA
7
33
SCL
EP[GND]
R669
AMP_SDA
VCC_LCM
(+3.3V)
10
1/8W
20
VCC_LCM
(+3.3V)
[HVDD Block]
1uF/50V(2012) R618
SYNC
Slave Address : 0xE8h
(AO Pin - GND)
GMA15
[P-GAMMA Block]
SOE
0
C666
15pF
50V
GP2_Saturn7M
T-CON
Ver. 2.0
7
LGE Internal Use Only
HDMI EEPROM
A1
A2
5V_HDMI_1 +5V_Normal
C
ENKMC2838-T112
D821
HDMI_3
5V_DET_HDMI_3
HPD1
19
R826
22
17
JP804
100
0
CK-_HDMI1
R846
0
CK+_HDMI1
8
7
6
5
4
3
2
HDMI_CEC
R845
0
R844
HDMI_3
EAG59023302
11
10
9
D0-_HDMI1
D1-
R843
0
7
D0+_HDMI1
0
6
D1-_HDMI1
D1_GND
22
R860
100
R876
22
R875
22
DDC_SCL_1
SDA
DDC_SDA_1
DDC_SCL_3
R852
0
R816
0
5V_HDMI_2 +5V_Normal
HDMI_CEC
CK-_HDMI3
R842
0
D1+_HDMI1
4
D2-
R850
0
D2-_HDMI1
3
R848
0
D2_GND
2
1
D2+_HDMI1
CK+
D0-
R821
0
R814
0
ENKMC2838-T112
D822
CK+_HDMI3
HDMI_2
IC802
D0-_HDMI3
D0_GND
EDID_WP
AT24C02BN-10SU-1.8
D0+
D1-
R819
D0+_HDMI3
0
A0
1
D1-_HDMI3
D1+
R818
0
R820
0
R812
0
D2-
VCC
8
$0.055
A1
D1+
JK802
5
D1_GND
5
D2+
4
12
8
D0+
R851
13
D0_GND
D802
1
D0-
GND
4.7K
2
A2
D2-_HDMI3
3
6
GND
4
5
D2+_HDMI3
R885
R889
4.7K
4.7K
JP810
SCL
DDC_SCL_2
D2_GND
D2+
C807
0.1uF
WP
7
D1+_HDMI3
R878
22
R877
22
SDA
DDC_SDA_2
D812
9
CK+
22
R888
4.7K
JP808
14
R824
R847
6
R884
15
12
11
10
R859
16
DDC_SCL_1
3
C806
0.1uF
JP809
SCL
JP807
DDC_SDA_3
DDC_SDA_1
15
13
A2
WP
7
A1
22
2
C
R825
3.3K
JP803
$0.055
A1
E
1.8K
VCC
8
HPD3
10K
C804
0.1uF
16V
R838
18
16
14
1K
$0.253
C802
0.1uF
16V
1
R864
B
A2
17
3.3K
R802
1.8K
Q804
2SC3052
R894
20
E
R804
18
R830
R836
19
B
10K
1K
$0.253
HDMI_1
A0
SHIELD
Q802
2SC3052
R896
20
EAG59023302
R874
C
C
SHIELD
EDID_WP
AT24C02BN-10SU-1.8
10K
5V_HDMI_3
10K
5V_DET_HDMI_1
HDMI_1
IC801
R873
HDMI_1
5V_HDMI_1
JK804
A1
A2
5V_HDMI_3 +5V_Normal
C
ENKMC2838-T112
D823
HDMI_3
IC803
AT24C02BN-10SU-1.8
1
8
$0.055
A1
2
A2
7
3
6
VCC
WP
10K
EDID_WP
R872
A0
C808
R886
R890
0.1uF
4.7K
4.7K
JP811
SCL
DDC_SCL_3
R879 22
GND
4
5
SDA
DDC_SDA_3
R880 22
HDMI_2
SIDE_HDMI
5V_HDMI_4 +5V_Normal
5V_DET_HDMI_2
5V_HDMI_2
5V_HDMI_4
17
3.3K
R801
1.8K
1.8K
17
22
R806
DDC_SCL_2
15
15
R831
0
12
11
10
R839
22
R840
22
9
8
7
6
5
4
3
2
R834
0
CK+_HDMI2
D0-
R822
0
D0-_HDMI2
D0_GND
8
D0+
R832
0
D0+_HDMI2
7
D1-
R827
0
D1-_HDMI2
6
D1_GND
5
D1+
R829
0
D1+_HDMI2
4
D2-
R823
0
D2-_HDMI2
3
D2_GND
2
D2+
R833
0
D2+_HDMI2
1
C
7
3
6
4
5
WP
DDC_SCL_4
R807
0
R817
0
D0+
R809
0
D1-
R813
0
R891
4.7K
4.7K
DDC_SCL_4
SDA
DDC_SDA_4
R882 22
CK-_HDMI4
D0-
R887
R881 22
GND
0
CK+
C809
0.1uF
JP812
SCL
100
12
9
8
2
CK+_HDMI4
D0-_HDMI4
D0_GND
D0+_HDMI4
+3.3V_Normal
D1-_HDMI4
68K
D1_GND
D1+
R811
0
D2-
R849
0
D1+_HDMI4
R854
For CEC
D2-_HDMI4
D2_GND
R855
0
R856
10K
OPT
D2+
R808
0
R857
68K
OPT
R858
0
D2+_HDMI4
G
JK803
D803
AVRL161A1R1NT
JK801
D811
D801
S
B
D
1
CK+
A1
A2
R810
1
EDID_WP
VCC
$0.055
DDC_SDA_4
HDMI_CEC
13
11
10
AT24C02BN-10SU-1.8
A0
R841
HDMI_CEC
CK-_HDMI2
10K
JP806
14
EAG42463001
HDMI_2
EAG59023302
13
100
HDMI_SIDE
JP801
R815
14
HDMI_SIDE
IC804
JP805
16
22
HPD4
C803
0.1uF
16V
R837
DDC_SDA_2
16
R862
E
1K
18
B
10K
$0.253
19
JP802
R805
Q803
2SC3052
R897
20
E
C801
0.1uF
16V
R803
18
JACK_GND
HPD2
R871
1K
19
ENKMC2838-T112
D824
C
R828
10K
D804
20
$0.253
B
3.3K
Q801
2SC3052
R895
R835
C
SHIELD
A1
A2
5V_DET_HDMI_4
CEC_REMOTE_S7
Q806
BSS83
OPT
C805
0.1uF
16V
GND
GND
CEC_ON/OFF
68K
+3.5V_ST
D825
R892
R883
0
R893
10K
OPT
R853
68K
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
G
D826
AVRL161A1R1NT
S
B
D
HDMI_CEC
CEC_REMOTE_NEC
Q805
BSS83
OPT
C810
0.1uF
16V
GND
GND
GP2_Saturn7M
HDMI
Ver. 1.2
8
LGE Internal Use Only
COMMON AREA
New Item Development
EARPHONE BLOCK
EXCEPT_CHINA_HOTEL_OPT
R1125
1K
C
Q1101
MMBT3904-(F)
E
B
MMBT3904-(F)
Q1104
B
E
JK3301
KJA-PH-0-0177
+3.3V_Normal
C
R1155
1K
2:X19
L
4
DETECT
3
R
1
HP_DET
EXCEPT_CHINA_HOTEL_OPT
C
C1119
10uF
16V
5
C1116
1000pF
50V
OPT
C
R1128
1K
Q1102
MMBT3904-(F)
E
B
B
MMBT3904-(F)
Q1103
E
+3.5V_ST
B
HP_ROUT
GND
Q1105
ISA1530AC1
C1115
1000pF
50V
OPT
E
C1118
10uF
16V
2:X19
R1130
10K
HP_LOUT
C
SPK_R+_HOTEL
R1129
3.3K
2:X19
C
B
E
SIDE_HP_MUTE
Q1106
2SC3052
SPK_R-_HOTEL
2:X19
RGB PC
+3.3V_Normal
PC AUDIO
+5V_Normal
D1115
ENKMC2838-T112
A1
SPDIF OPTIC JACK
JK1102
5.15 Mstar Circuit Application
A
4
5
7B
6B
SPDIF_OUT
PC_R_IN
R_SPRING
T_SPRING
D1101
AMOTECH
5.6V
OPT
C1107
100pF
50V
R1107
15K
R1102
470K
R1112
0
2:X18
R1110
10K
D1102
AMOTECH
5.6V
OPT
C1108
100pF
50V
OPT
5
VCC
2
3
GND
C1117
0.1uF
16V
OPT
4
Y
VCC
R1126
22
OPT
PC_L_IN
T_TERMINAL2
B
GND
R1108
15K
B_TERMINAL2
1
2:S16
0.1uF
16V
2:S16
R1113
0
R1103
470K
VINPUT
C1131
R1111
10K
JST1223-001
JK1103
B_TERMINAL1
1
7A
A2
2
T_TERMINAL1
Fiber Optic
6A
C
IC1104
NL17SZ00DFT2G
OPT
R1152
4.7K
3
E_SPRING
C1121
100pF
50V
A1
A2
GND
1
8
2
7
3
6
4
5
R1140
4.7K
R1139
4.7K
IC1105
AT24C02BN-10SU-1.8
A0
4
3
FIX_POLE
PEJ027-01
C1129
0.1uF
16V
R1142
10K
VCC
WP
EDID_WP
SCL
RGB_DDC_SCL
SDA
RGB_DDC_SDA
C1128
18pF
50V
C1127
18pF
50V
R1141
22
R1143
22
R1127
0
DSUB_VSYNC
R1150
0
DSUB_HSYNC
C1122
68pF
50V
OPT
R1148
0
C1126
68pF
50V
OPT
D1109
30V
D1113
D1116
D1114
5.6V
OPT
5.6V
OPT
30V
DSUB_B+
R1133
75
OPT
C1123
OPT
D1110
30V
0
R1134
DSUB_B-
DSUB_G+
R1135
75
OPT
C1124
OPT
D1111
30V
+3.3V_Normal
0
R1136
DSUB_G-
R1146
10K
DSUB_DET
R1147
1K
DSUB_R+
R1137
75
OPT
C1125
OPT
D1112
30V
D1117
5.6V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
COMMON AREA
16
SHILED
DDC_GND
DDC_CLOCK
GND_1
SYNC_GND
15
10
GP2_Saturn7M
5
V_SYNC
BLUE
NC
14
9
4
H_SYNC
GREEN
DDC_DATA
GREEN_GND
RED
BLUE_GND
13
3
8
12
7
2
GND_2
11
6
1
SPG09-DB-010
JK1104
RED_GND
0
R1138
DSUB_R-
Ver. 1.0
9
LGE Internal Use Only
RS232C
10
5
9
OPT
IR_OUT
4
R1122
0
R1123
100
JP1121
R1124
100
JP1122
8
3
+3.5V_ST
7
2
D1107
CDS3C30GTH
30V
6
D1108
CDS3C30GTH
30V
1
C1101 0.33uF
SPG09-DB-009
IC1101
C1+
C1102
0.1uF
V+
C1103
0.1uF
C1-
C2-
VC1105
0.1uF
16
2
15
3
14
4
13
5
12
6
11
VCC
GND
+3.5V_ST
C2+
C1104
0.1uF
1
JK1101
C1106
0.1uF
MAX3232CDR
DOUT2
7
10
8
9
DOUT1
RIN1
R1109
4.7K
OPT
R1114
4.7K
OPT
ROUT1
R1157 0
DIN1
R1156 0
S7_RXD1
NEC_RXD
DIN2
R1154 0
S7_TXD1
RIN2
ROUT2
R1153 0
NEC_TXD
EAN41348201
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2_Saturn7M
RS232C 9PIN
Ver. 1.0
10
LGE Internal Use Only
(New Item Developmen H:9.2mm)
SIDE_AV_OPT
L3303
SIDE_AV
BLM18PG121SN1D
SIDEAV_CVBS_IN
5A
[YL]E-LUG
4A
[YL]O-SPRING
3A
[YL]CONTACT
SIDE_AV_OPT
D3301
30V
SIDE_AV_OPT
R3301
75
+3.3V_Normal
SIDE_AV_OPT
10K
R3302
C3304
100pF
OPT
SIDE_AV_OPT
R3305
1K
SIDEAV_DET
4B
[WH]O-SPRING
3C
[RD]CONTACT
4C
[RD]O-SPRING
5C
[RD]E-LUG
C3301
100pF
SIDE_AV_OPT
SIDE_AV_OPT
D3302
5.6V
SIDE_AV_OPT
L3301
BLM18PG121SN1D
SIDE_AV_OPT
R3306
SIDEAV_L_IN
SIDE_AV_OPT
D3303
5.6V
SIDE_AV_OPT
R3303
470K
PPJ235-01
JK3302
SIDE_AV_OPT
L3302
BLM18PG121SN1D
SIDE_AV_OPT 10K
C3302
100pF
50V
SIDE_AV_OPT
R3307
SIDE_AV_OPT
R3308
12K
SIDEAV_R_IN
SIDE_AV_OPT
SIDE_AV_OPT
D3304
5.6V
SIDE_AV_OPT
R3304
470K
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SIDE_AV_OPT 10K
C3303
100pF
50V
SIDE_AV_OPT
R3309
12K
GP2_Saturn7M
SIDE AV
Ver. 1.0
11
LGE Internal Use Only
WIRELESS READY MODEL
JK2601
KJA-PH-3-0168
Wireless power
From wireless_I2C to micom I2C
RESET
G
R2605
27K
R2603
10K
WIRELESS_PWR_EN
Q2602
AO3407A
WIRELESS
WIRELESS
R2607
0
D
C
Q2601
WIRELESS
1K
GND_2
WIRELESS_DETECT
I2C_SCL
WIRELESS_SCL
I2C_SDA
1/4W
3216
B
WIRELESS
R2617
TP2602
WIRELESS_SDA
GND_3
C2603
0.01uF
50V
E
UART_RX
WIRELESS_RX
UART_TX
WIRELESS_TX
GND_4
IR
IR_PASS
GND_5
GND_6
7
8
9
10
11
AMP_SDA
13
14
15
OPT
16
AMP_SCL
17
WIRELESS_SCL
Q2605
FDV301N
18
19
WIRELESS
20
R2611
0
R2613 0
WIRELESS
SHIELD
+3.3V_Normal
+3.5V_ST
OPT
R2608
0
OPT
R2606
0
0
WIRELESS_SDA
Q2604
FDV301N
21
R2618
10K
R2614
OPT
12
G
GND_1
R2612
10K
S
6
S
TP2601
OPT
G
INTERRUPT
C2602
2.2uF
5
S
DETECT
OPT
4
D
VCC[24V/20V/17V]_6
+3.3V_Normal
R2604
22K
C2601
0.1uF
50V
+3.3V_Normal
R2602
10K
B
VCC[24V/20V/17V]_5
WIRELESS_PWR_EN
3
E
VCC[24V/20V/17V]_4
+24V
OPT
2
D
VCC[24V/20V/17V]_3
1
C
VCC[24V/20V/17V]_2
Q2603
ISA1530AC1
VCC[24V/20V/17V]_1
IC2601
MC14053BDR2G
WIRELESS
0
R2601
WIRELESS_DL_RX
16
S7_TXD
Z1
OPT
VDD
2
15
3
14
Y
X
S7_RXD1
R2615
Z
Z0
INH
R2620
0
VEE
4
5
13
12
6
11
7
10
8
9
X1
RS232C & Wireless
OPT
0.1uF
S7_TXD1
0
WIRELESS
WIRELESS_DL_TX
WIRELESS_SW_CTRL
SELECT PIN
STATUS
WIRELESS_RX
X0
R2619
0
+3.5V_ST
HIGH
X1/Y1/Z1
WIRELESS Dongle connect --> WIRELESS RS232
LOW
X0/Y0/Z0
WIRELESS Dongle Dis_con --> S7 RS232
S7_RXD
A
OPT
1
C2604
Y0
B
4.7K
R2609
Y1
WIRELESS_TX
C
OPT
VSS
47K
R2610
WIRELESS
WIRELESS_SW_CTRL
Ver. 1.2 --> 1.3: wireless opt change, 090818, hongsu
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2_Saturn7M
Wireless ready
Ver. 1.3
12
LGE Internal Use Only
R1227
1K 1%
1%
1K
R1228
0.1uF
C1250
1000pF
C1249
1K 1%
1%
R1225
1K
C1248
1000pF
C1246
10uF
0.1uF
C1245
0.1uF
C1244
0.1uF
C1243
0.1uF
C1242
0.1uF
C1241
0.1uF
C1239
C1238
0.1uF
0.1uF
C1237
C1235
0.1uF
C1236
0.1uF
C1234
0.1uF
0.1uF
C1233
0.1uF
C1232
0.1uF
C1231
0.1uF
C1230
0.1uF
C1229
0.1uF
C1228
0.1uF
C1227
0.1uF
0.1uF
C1224
0.1uF
C1223
0.1uF
C1222
0.1uF
C1221
0.1uF
C1220
0.1uF
C1219
0.1uF
C1218
0.1uF
C1216
0.1uF
C1217
0.1uF
C1215
0.1uF
C1214
0.1uF
C1213
0.1uF
C1212
0.1uF
C1211
0.1uF
C1210
0.1uF
C1208
0.1uF
C1207
C1206
10uF
0.1uF
B-MVREFDQ
B-MVREFCA
Close to DDR Power Pin
R1224
VCC_1.5V_DDR
DDR3 1.5V By CAP - Place these Caps near Memory
C1247
DDR3 1.5V By CAP - Place these Caps near Memory
A-MVREFCA
C1205
1000pF
0.1uF
C1204
1%
R1205
1K
C1203
0.1uF
1000pF
C1202
A-MVREFDQ
CLose to DDR3
VCC_1.5V_DDR
VCC_1.5V_DDR
VCC_1.5V_DDR
1K 1%
R1204
VCC_1.5V_DDR
1K 1%
1%
R1202
1K
C1201
R1201
VCC_1.5V_DDR
Close to DDR Power Pin
CLose to Saturn7M IC
CLose to Saturn7M IC
CLose to DDR3
VCC_1.5V_DDR
+1.5V_DDR
L1201
R1215
B-MA0
B-TMA0
C1225
10uF
10V
R1213
A-TMA0
10
R1216
B-MA2
B-TMA2
10
AR1211
10
R1214
10
AR1208
A1
A2
VREFDQ
A3
A4
R1203
A5
L8
ZQ
240
1%
A7
A8
B2
D9
G7
K2
K8
N1
N9
R1
VCC_1.5V_DDR
A6
R9
VDD_1
A9
VDD_2
A10/AP
VDD_3
A11
VDD_4
A12/BC
VDD_5
C1
C9
D2
E9
F1
H2
H9
L1
L9
T7
P2
R8
R2
T8
R3
L7
R7
N7
T3
M2
BA0
CK
VDDQ_3
CK
N8
M3
CS
VDDQ_7
ODT
VDDQ_8
RAS
VDDQ_9
CAS
K9
NC_1
J2
J8
M1
M9
P1
P9
T1
T9
D8
E2
E8
F9
G1
G9
K3
L3
A-MA10
DQSL
VSS_2
DQSU
VSS_3
G3
B7
E7
VSS_4
DML
VSS_5
DMU
10
A-MA12
A-MA13
A-MBA1
A-MBA2
A-MCK
A-TMRESETB
A-TMA8
A-TMBA2
A-TMA9
A-TMA13
A-TMA9
A-MA9
10
0.01uF
25V
A-TMA13
A-TMBA0
A-TMBA1
A-TMODT
A-TMWEB
A-MWEB
A-MCASB
A-MWEB
10
R1231
10K
D3
A-TMDQSLB
E3
VSS_7
DQL0
VSS_8
DQL1
VSS_9
DQL2
VSS_10
DQL3
VSS_11
DQL4
DQL5
F7
F2
F8
H3
H8
G2
H7
DQL7
VSSQ_1
D7
DQU0
VSSQ_3
DQU1
VSSQ_4
DQU2
VSSQ_5
DQU3
VSSQ_6
DQU4
VSSQ_7
DQU5
DQU6
C3
C8
C2
A7
A2
B8
A3
DQU7
A-MDQL0
A-TMDQSU
A-TMDQSUB
A-MDQSUB
A-MDQL5
A-TMDQL1
A-TMDQL3
A-MDQL3
A-MDQU2
A-MDQU3
A-TMDQU2
10
C23
B11
A9
C10
B23
A_DDR3_A5/DDR2_A10
A_DDR3_A6/DDR2_A4
A_DDR3_A7/DDR2_A3
A_DDR3_A8/DDR2_A6
A_DDR3_A9/DDR2_A12
A_DDR3_A10/DDR2_RASZ
A_DDR3_A11/DDR2_A11
B_DDR3_A4/DDR2_A2
B_DDR3_A5/DDR2_A10
B_DDR3_A6/DDR2_A4
B_DDR3_A7/DDR2_A3
B_DDR3_A8/DDR2_A6
B_DDR3_A9/DDR2_A12
B_DDR3_A10/DDR2_RASZ
B_DDR3_A11/DDR2_A11
A_DDR3_A12/DDR2_A0
B_DDR3_A12/DDR2_A0
A_DDR3_A13/DDR2_A7
B_DDR3_A13/DDR2_A7
A24
P25
C24
P26
B26
R24
B25
T26
D24
A26
C25
T25
B-TMBA1
B-TMA2
B-TMA10
B21
A11
A23
P24
A_DDR3_BA0/DDR2_BA2
A_DDR3_BA1/DDR2_CASZ
A_DDR3_BA2/DDR2_A5
B_DDR3_BA0/DDR2_BA2
B_DDR3_BA1/DDR2_CASZ
B12
C26
R26
B_DDR3_BA2/DDR2_A5
A12
C11
D26
A_DDR3_MCLK/DDR2_MCLK
A_DDR3_MCLKZ/DDR2_MCLKZ
A_DDR3_CKE/DDR2_DQ5
A-TMODT
A-TMWEB
A-TMRESETB
A-TMDQSL
A-TMDQSLB
A-TMDQSU
A-TMDML
A-MDQL7
A-TMDQL7
A-TMDMU
A-MDQL5
A-TMDQL5
A-TMDQL0
10
A-TMDQL1
A-TMDQL2
A-MDQL0
A-TMDQL0
A-TMDQL3
A-MDQL2
A-TMDQL2
A-TMDQL4
A-TMDQL6
A-MDQL6
A-TMDQL4
A-MDQL4
10
A-TMDQL5
A-TMDQL6
A-TMDQL7
A-TMDQU7
A-MDQU3
A-TMDQU3
A-TMDQU1
A-TMDQU5
A-TMDQU2
A-TMDMU
A-TMDQU3
A-MDMU
10
A-TMDQU0
A-TMDQU4
AR1207
A-TMDQU5
A-TMDQU6
A-TMDQU6
A-MDQU0
A-TMDQU0
A-TMDQU7
A-MDQU4
A-TMDQU4
A-MDQU6
B-MA5
B-TMA5
B-TMA6
B-TMA7
B-TMA8
B-TMRESETB
B_DDR3_MCLK/DDR2_MCLK
B_DDR3_MCLKZ/DDR2_MCLKZ
D25
E24
B_DDR3_CKE/DDR2_DQ5
B-MA10
B-MA11
B-MA12
B-MA13
B-TMBA2
B-MBA2
B-TMA13
B-MA13
B-TMA9
B-TMCK
B-MBA0
B-MCK
B-MCK
10
R1223
B-TMCKB
B-MCKB
C1240
0.01uF
25V
B-TMRASB
B-MCKB
B-MRASB
B-TMCASB
B-MCASB
B-TMBA2
B-TMWEB
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M8
A0
A2
A3
A6
B-MODT
B-MRASB
B-MCASB
R1232
10K
R1219
B-MWEB
B-MDQSL
10
R1220
B-TMCKE
K9
B-MRESETB
K1
J3
K3
L3
C20
A20
B20
A21
N25
A_DDR3_ODT/DDR2_ODT
A_DDR3_RASZ/DDR2_WEZ
A_DDR3_CASZ/DDR2_BA1
A_DDR3_WEZ/DDR2_BA0
B_DDR3_ODT/DDR2_ODT
B_DDR3_RASZ/DDR2_WEZ
B_DDR3_CASZ/DDR2_BA1
M26
N24
N26
B_DDR3_WEZ/DDR2_BA0
C22
R25
A_DDR3_RESETB
B_DDR3_RESETB
B-TMODT
C16
B16
J25
A_DDR3_DQSL/DDR2_DQS0
A_DDR3_DQSLB/DDR2_DQSB0
B_DDR3_DQSL/DDR2_DQS0
J24
B_DDR3_DQSLB/DDR2_DQSB0
B-TMDQSU
B-MDQSU
10
R1218
B-TMRASB
B-TMCASB
B-TMDQSUB
B-MDQSUB
B-TMWEB
10
B-TMRESETB
B-TMDQL1
B-MDQL1
B-TMDQL3
B-MDQL3
B-TMDML
B-TMDQSL
B-MDML
B-TMDQU2
B-MDQU2
B-TMDQSLB
A16
C15
H26
A_DDR3_DQSU/DDR2_DQSB1
B_DDR3_DQSU/DDR2_DQSB1
A_DDR3_DQSUB/DDR2_DQS1
B_DDR3_DQSUB/DDR2_DQS1
H25
10
B-TMDQSUB
A14
B18
F26
A_DDR3_DML//DDR2_DQ13
A_DDR3_DMU/DDR2_DQ6
B_DDR3_DML/DDR2_DQ13
C18
B13
A19
C13
C19
A13
B19
C12
L24
B_DDR3_DMU/DDR2_DQ6
L25
A_DDR3_DQL0/DDR2_DQ3
B_DDR3_DQL0/DDR2_DQ3
A_DDR3_DQL1/DDR2_DQ7
B_DDR3_DQL1/DDR2_DQ7
A_DDR3_DQL2/DDR2_DQ1
A_DDR3_DQL3/DDR2_DQ10
A_DDR3_DQL4/DDR2_DQ4
B_DDR3_DQL2/DDR2_DQ1
B_DDR3_DQL3/DDR2_DQ10
B_DDR3_DQL4/DDR2_DQ4
A_DDR3_DQL5/DDR2_DQ0
B_DDR3_DQL5/DDR2_DQ0
A_DDR3_DQL6/DDR2_CKE
B_DDR3_DQL6/DDR2_CKE
A_DDR3_DQL7/DDR2_DQ2
F24
L26
F25
M25
E26
M24
E25
B_DDR3_DQL7/DDR2_DQ2
A15
A17
B14
C17
B15
A18
C14
B17
G26
A_DDR3_DQU0/DDR2_DQ15
A_DDR3_DQU1/DDR2_DQ9
A_DDR3_DQU2/DDR2_DQ8
B_DDR3_DQU0/DDR2_DQ15
B_DDR3_DQU1/DDR2_DQ9
B_DDR3_DQU2/DDR2_DQ8
A_DDR3_DQU3/DDR2_DQ11
B_DDR3_DQU3/DDR2_DQ11
A_DDR3_DQU4/DDR2_DQM1
B_DDR3_DQU4/DDR2_DQM1
A_DDR3_DQU5/DDR2_DQ12
B_DDR3_DQU5/DDR2_DQ12
A_DDR3_DQU6/DDR2_DQM0
B_DDR3_DQU6/DDR2_DQM0
A_DDR3_DQU7/DDR2_DQ14
B_DDR3_DQU7/DDR2_DQ14
J26
G24
K25
H24
K26
G25
K24
B-TMCKE
B-MCKE
B-TMDQL7
B-MDQL7
B-TMDQL5
B-MDQL5
B-TMDML
B-TMDMU
AR1216
B-TMDQL0
B-TMDQL0
B-MDQL0
B-TMDQL2
B-MDQL2
B-TMDQL2
B-TMDQL6
B-MDQL6
B-TMDQL3
B-TMDQL4
B-MDQL4
B-TMDQL6
10
B-TMDQL7
B-TMDQU0
B-MDQU7
B-TMDQU3
B-MDQU3
B-TMDQU5
B-MDQU5
B-TMDMU
B-MDQL0
B-MDQL2
B-MDQL3
B-MDQL4
B-MDQL5
B-MDQU0
B-MDQU1
B-MDQU2
B-MDQU3
B-MDQU4
AR1217
B-TMDQU7
B-MDMU
B-MDQL7
B-TMDQL1
B-TMDQL5
B-MDML
B-MDQL6
10
B-TMDQL4
B-MDQSU
B-MDQL1
AR1213
B-TMDQSU
B-MDQSLB
B-MDQSUB
AR1212
240
1%
VDD_1
A10/AP
VDD_2
A11
VDD_3
A12/BC
VDD_4
A13
VDD_5
VDD_6
VDD_7
VDD_8
BA0
B-MDQU5
B-MDQU6
B-MDQU7
G7
K2
K8
N1
N9
R1
R9
VCC_1.5V_DDR
BA1
A1
VDDQ_1
CK
VDDQ_2
CK
VDDQ_3
CKE
VDDQ_4
VDDQ_5
CS
VDDQ_6
ODT
VDDQ_7
RAS
VDDQ_8
CAS
VDDQ_9
WE
RESET
NC_2
NC_4
F3
DQSL
A8
C1
C9
D2
E9
F1
H2
H9
J1
NC_1
T2
G3
D9
VDD_9
NC_3
B-MDQSL
B-MVREFDQ
R1226
B2
A9
B-MDQSLB
R1217
B-MVREFCA
ZQ
A8
BA2
K7
B-MCKE
L8
A7
L2
B-MWEB VCC_1.5V_DDR
10
B-TMDQSL
B-MBA2
M3
VREFDQ
A5
M2
N8
H1
A4
J7
B-MODT
B-TMCK
B-MBA1
VREFCA
A1
A15
R1222
B-TMODT
P3
M7
B-MA9
10
B-TMBA1
B-TMCKB
B-MA9
P7
B-MRESETB
B-TMA12
B-TMBA0
B-MA8
AR1219
B-TMA10
B-TMA13
B-MA7
B-MBA1
B-TMA9
B-TMA11
B-MA6
10
B-TMA4
AR1206
A-MDQU7
A-MDQU5
B-MA4
B-MA7
N3
10
A-TMCKE
AR1205
B-MA3
B-MA5
B-MA10
B-TMA3
B-TMDQSLB
A-TMDQSUB
A-MCKE
A-MDQU5
A-MDQU7
C9
B_DDR3_A3/DDR2_A1
AR1210
A-MDQU4
A-MDQU6
B22
B_DDR3_A2/DDR2_A9
A_DDR3_A3/DDR2_A1
A_DDR3_A4/DDR2_A2
B-MA3
B-MA12
A-TMDML
A-MDQU2
A-MDQL7
A-MDQU1
A10
B_DDR3_A1/DDR2_A8
A_DDR3_A2/DDR2_A9
AR1209
A-MDQL1
A-MDQL6
A-MDQU0
A22
A_DDR3_A1/DDR2_A8
10
A-MDQL2
A-MDQL4
A-TMCKB
A-TMCASB
10
R1212
A-MDQL1
A-MDQL3
A-TMCK
A-TMRASB
A-MDQSU
A-MDQSUB
A-MDMU
B10
B-MA2
B-MA4
B-TMA12
B-TMA1
A-TMDQSL
R1211
A-MDQSL
A-MDML
A-TMBA2
A-TMCKE
10
R1209
A-MRESETB
A-MDQSU
A8
C21
B24
B-TMA4
B-TMA0
R1208
A-MDQSL
A-MDQSLB
B9
A25
B_DDR3_A0/DDR2_A13
10
AR1220
A-TMCKB
A-MCKB
A-MODT
VCC_1.5V_DDR
A-TMA11
B8
A_DDR3_A0/DDR2_A13
B-MA1
10
AR1215
10
R1207
A-MCKE
A-MRASB
B-TMA5
B-TMA7
A-TMCK
A-MCK
10
AR1202
A-MODT
A-TMA10
A-TMA12
R1206
C1209
A-TMA5
A-TMA7
A-MBA2
A-MBA0
A-TMA4
A-TMA6
AR1201
A-MDML
VSS_6
VSSQ_9
A-TMA10
A-MA10
A-MA11
10
F3
DQSU
VSSQ_8
A-TMA3
A-TMBA1
A-MDQSLB
VSS_1
VSSQ_2
A-TMA2
A-TMA12
A-MBA1
A-TMCASB
RESET
DQL6
D1
A-TMA4
A-MA12
A-MA4
A-MA8
A-TMRASB
C7
VSS_12
B9
A-MA7
A-TMA1
A-MCASB
T2
NC_4
B1
A-TMA0
B-MA0
B-MBA0
S7M_DIVX
A-TMA7
K1
DQSL
G8
A-TMA5
10
AR1204
A-MA9
NC_3
NC_6
E1
A-MA7
IC101
LGE107D (S7M Divx_Non RM)
A-TMBA0
L2
J3
B-TMBA0
A-TMA3
A-MCKB A-MRASB
WE
A9
B3
A-MA5
A-MA6
K7
CKE
VDDQ_5
NC_2
A-MA4
A-MA5
J7
VDDQ_2
VDDQ_6
A-MA3
A-MA13
VDDQ_1
VDDQ_4
A-MBA0
A15
BA2
J1
J9
P8
A-MA1
A-MA2
A-MA3
B-MA6
10
AR1214
B-TMA3
A-MRESETB
BA1
A1
A8
N2
A-TMA6
B-TMA6
10
AR1203
M7
VDD_8
VDD_9
P3
A13
VDD_6
VDD_7
P7
A-MA6
1%
H1
A-TMA8
A-MA0
R1235
56
A-MVREFDQ
A-TMA1
A-MA8
B-MA8
1%
A0
1%
VREFCA
A-MA1
B-MA1
B-TMA8
56
R1237
N3
R1236
56
A-MVREFCA
A-TMA11
A-MA11
IC1202
H5TQ1G63BFR-H9C
B-MA11
B-TMA1
1%
IC1201
H5TQ1G63BFR-H9C
M8
B-TMA11
A-TMA2
A-MA2
56
R1238
A-MA0
C1226
0.1uF
16V
J9
L1
L9
T7
NC_6
DQSL
C7
B7
A9
DQSU
VSS_1
DQSU
VSS_2
VSS_3
E7
D3
DML
VSS_4
DMU
VSS_5
VSS_6
E3
F7
F2
F8
H3
H8
G2
H7
DQL0
VSS_7
DQL1
VSS_8
DQL2
VSS_9
DQL3
VSS_10
DQL4
VSS_11
DQL5
VSS_12
C2
A7
A2
B8
A3
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
VSSQ_1
D7
C8
E1
DQL6
DQL7
C3
B3
DQU0
VSSQ_2
DQU1
VSSQ_3
DQU2
VSSQ_4
DQU3
VSSQ_5
DQU4
VSSQ_6
DQU5
VSSQ_7
DQU6
VSSQ_8
DQU7
VSSQ_9
B9
D1
D8
E2
E8
F9
G1
G9
B-MDMU
B-TMDQU1
10
B-TMDQU2
AR1218
B-TMDQU3
B-TMDQU6
B-TMDQU4
B-TMDQU0
B-MDQU0
B-TMDQU5
B-TMDQU4
B-MDQU4
B-MDQU6
B-TMDQU6
B-TMDQU7
10
R1221
B-TMDQU1
B-MDQU1
10
10
R1210
A-TMDQU1
A-MDQU1
10K
10
A-MCKE
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
R1233
R1234
B-MCKE
10K
GP2_Saturn7M
Ver. 1.0
DDR3(256MB)
21
LGE Internal Use Only
+3.3V_Normal
S_FLASH
4.7K
+3.3V_Normal
R1404
+3.3V_Normal
IC1401
MX25L8005M2I-15G
R1403
10K
CS#
/SPI_CS
R1402
0
WP#
GND
C
R1401
8
2
7
3
6
4
5
C1401
VCC
0.1uF
SO
SPI_SDO
/FLASH_WP
1
B
HOLD#
SCLK
SPI_SCK
SI
R1405
33
SPI_SDI
Q1401
KRC103S
OPT 0
E
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2_Saturn7M
S-Flash(1MB)
Ver. 1.2
23
LGE Internal Use Only
LGIT CAN NIM_H/N TUNER for EU & CHINA
+5V_TU
BOOSTER : CHINA OPT
RF_SWITCH_CTL
Pull-up can’t be applied
because of MODEL_OPT_2
L3701 CHINA_OPT
BLM18PG121SN1D
CHINA_OPT
R3743
R3734
0
close to TUNER
10K
Q3701
OPT
R3762
0
E
CHINA_OPT
ISA1530AC1
R3737
2.2K
C
CHINA_OPT
CONTROL_ATTEN
B
C
TU3701
TDFR-C035D
TU3702
TDTJ-S001D
EU_TUNER
TDFR-C035D
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
ANT_PWR[OPT]
1
BST_CNTL
2
+B
3
NC[RF_AGC]
4
AS
5
SCL
6
SDA
7
NC[IF_TP]
8
SIF
9
NC
10
VIDEO
11
GND
12
1.2V
13
3.3V
14
RESET
15
IF_AGC_CNTL
16
DIF_1
17
DIF_2
18
19
19
20
SHIELD
21
22
23
TU3701-*1
TDFR-C155D
24
TDFR-C155D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
31
30
25
RF_S/W_CNTL
BST_CNTL
26
C3709
0.01uF
25V
CHINA_OPT
close to TUNER
RF_S/W_CNTL
R3705
C3701
0.1uF
16V
BST_CNTL
R3707
FE_BOOSTER_CTL
LNA2_CTL
The pull-up/down of LNA2_CTL
is depended on MODLE_OPT_1.
GPIO must be added for FE_BOOSTER_CTL
CHINA_OPT
+5V_TU
OPTION : RF AGC
0
CHINA_OPT
C3703
100pF
50V
+B1[+5V]
NC[RF_AGC]
E
CHINA_OPT
R3745
10K
C3704
0.1uF
16V
C3731
10uF
10V
OPT
C3728
0.1uF
16V
OPT
0
+5V_TU
GPIO must be added.
C
B
Q3704
2SC3052
OPT
R3754
10K
FE_AGC_SPEED_CTL
IF_AGC_SEL
OPT
R3755
470
+3.3V_TU
27
NC_1
R3740
1.2K
33
SCLT
B
R3741
1.2K
R3735
28
29
NC_2
SIF
31
30
ISA1530AC1
R3753
4.7K
+5V_TU
C
Q3705
TU_SCL
SDAT
33
R3736
TU_SDA
C3711
18pF
50V
NC_2
SIF
C3702
0.1uF
NC_3
R3751
220
C3713
18pF
50V
close to TUNER
TU_CVBS
E
16V
R3749
0
+3.3V_TU
+1.2V/+1.8V_TU
GND
+B2[1.2V]
C3737
100pF
50V
C3738
0.1uF
16V
CHINA_OPT
C3705
100uF
16V
B
R3750
1K
OPT
VIDEO
+B3[3.3V]
R3752
220
C
Q3703
ISA1530AC1
+3.3V_TU
C3707
100pF
50V
R3732
100
C3708
0.1uF
16V
IF_AGC_MAIN
R3733
100K
TUNER_RESET
should be guarded by ground
C3710
0.1uF
16V
+3.3V_TU
RESET
NC_4
R3704
SCL
SDA
R3702
0
0
R3742
4.7K
CHINA_OPT
EU_OPT
CHINA_OPT
R3738
R3744
4.7K
CHINA_OPT
100
DEMOD_SCL
CHINA_OPT
R3701
ERR
0
CHINA_OPT
R3739
close to IF line
C3712
22pF
50V
CHINA_OPT
SYNC
EU_OPT
R3760
0
MCL
C3715
22pF
50V
OPT
C3714
22pF
50V
CHINA_OPT
C3716
22pF
50V
OPT
IF_P_MSTAR
R3761 0
EU_OPT
1. should be guarded by ground
2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
Ground Width >= 24mils
D1
D2
DEMOD_SDA
IF_N_MSTAR
VALID
D0
100
CHINA_OPT
EU_OPT
IC3703
+3.3V_TU
AZ1117H-ADJTRE1(EH11A)
Close to the tuner
INPUT
D3
3
1
ADJ/GND
R2
EU_OPT
R3767
10
+1.2V/+1.8V_TU
2
D4
EU_OPT
R3768
1.2K
R1
OUTPUT
D5
SCLT
SDAT
TU_SIF
OPT
NC_1
+B1[+5V]
NC[RF_AGC]
R3758
82
E
E
R3703
150
OPT
D6
D7
IC3701
SC4215ISTRT
NC_3
EU_OPT
R3766
1
1/10W
VIDEO
SHIELD
NC_1
GND
1
EN
CHINA_OPT
R3724
0
FE_TS_SYNC
CHINA_OPT
R3730
0
SCL
CHINA_OPT
R3731
0
FE_TS_VAL_ERR
7
R3748
ADJ
C3717
0.1uF
16V
NC_2
FE_TS_CLK
3
6
4
5
VO
R3725
ERR
SYNC
CHINA_OPT
R3727
0
NC_3
FE_TS_DATA[0]
0
FE_TS_DATA[1]
R1
1608
SDA
CHINA_OPT
R3764
0
1/10W
CHINA_OPT
4.7K
VIN
NC_4
2
CHINA_OPT
FE_TS_DATA[0-7]
RESET
+1.2V/+1.8V_TU
380mA
GND
CHINA_OPT
+B2[1.2V]
+B3[3.3V]
8
CHINA_OPT
1
B
Q3702
2SC3052
C3729
0.1uF
16V
R3747
9.1K
1608
C3730
10uF
10V
DEMOD_RESET
This was being applied to the only china demod,
so this has to be deleted in both main and ISDB sheet.
R2
VALID
CHINA_OPT
R3728
0
FE_TS_DATA[2]
CHINA_OPT
R3729
0
FE_TS_DATA[3]
0
FE_TS_DATA[4]
MCL
D0
Vo=0.8*(1+R1/R2)
D1
CHINA_OPT
R3726
D2
D3
CHINA_OPT
R3721
0
FE_TS_DATA[5]
CHINA_OPT
R3722
0
FE_TS_DATA[6]
0
FE_TS_DATA[7]
+5V_Normal
D5
D6
+3.3V_TU
L3702
200mA
60mA
BLM18PG121SN1D
CHINA_OPT
R3723
+3.3V_Normal
+5V_TU
D4
D7
Close to the CI Slot
C3719
22uF
10V
OPT
C3722
22uF
10V
C3724
0.1uF
16V
C3726
0.1uF
16V
L3703
BLM18PG121SN1D
C3723
22uF
10V
C3725
0.1uF
16V
C3727
0.1uF
16V
SHIELD
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2_Saturn7M
EU/CHINA CAN TUNER
VER 1.0
27
LGE Internal Use Only
[51Pin LVDS Connector]
(For FHD 60/120Hz)
GMA3
4
GMA4
5
GMA6
6
GMA7
7
GMA9
8
GMA10
0 NON_GIP
0 NON_GIP
0 NON_GIP
0 NON_GIP
0 NON_GIP
0 NON_GIP
P703
TF05-51S
R753
GMA1
3
R752
2
R751
GND
GND
GMA1
2
Z_OUT
GMA3
3
CLK1
CLK1
GMA4
4
CLK2
CLK2
GMA6
5
CLK3
CLK3
R767
GMA7
6
CLK4
CLK4
R768
GMA9
7
CLK5
CLK5
GMA10
8
CLK6
CLK6
9
VGI_N
VGI_N
10
VGI_P
VGI_P
9
GMA12
GMA12
GMA13
GMA13
11
GMA15
GMA15
12
GMA16
GMA16
13
GMA18
GMA18
14
GND
15
OPT_N
16
H_CONV
17
VST_IN
18
POL
POL
19
SOE
SOE
20
GND
21
LV0+
22
LV0-
RXD1+
23
LV1+
RXD0-
24
LV1-
RXD0+
25
LV2+
RXC4-
26
LV2-
RXC4+
27
LVCLK+
RXC3-
VCC_LCM
C710
C709
C700
1000pF 0.1uF
10uF
16V
50V
16V
WAFER_FHD
OPT WAFER_FHD
1
1
10
[41Pin LVDS Connector]
(For FHD 120Hz)
L702
120-ohm
WAFER_FHD
WAFER_FHD
R750
MINI_LVDS
R749
P702
104060-6017
MINI_LVDS
R748
P701
104060-6017
1
PANEL_VCC
[Right FFC Connector]
(60Pin Mini-LVDS)
[LEFT FFC Connector]
(60Pin Mini-LVDS)
R754
0 MINI_LVDS
VGH_M
(+25V)
Z_OUT
R769
R770
0 NON_GIP
0 NON_GIP
0 NON_GIP
0 NON_GIP
P704
P705
TF05-41S
FF10001-30
WAFER_FHD_120HZ
WAFER_HD
2
3
3
RXD4-
3
GSC/GCLK3_I
4
4
RXD4+
4
GOE/GCLK1_I
5
5
RXD3-
5
6
6
RXD3+
6
RXA3-
7
7
7
RXA3+
8
8
RXDCK-
9
9
RXDCK+
9
RXACK-
10
10
10
RXACK+
VGL
(-5V)
2
R716
0
WAFER_HD
R717
0
OPT
R714
0
OPT
VGL_I
PWM_DIM
OPC_OUT
VGH_ODD
12
VGH_EVEN
13
VSS
14
VST
15
GND
H_CONV
16
VCOM_FB
VCOMRFB
11
RXA4-
11
RXD2-
11
GSP/GVST_I
17
VCOM_IN
VCOMR
18
GND
12
RXA4+
12
RXD2+
12
RXA2-
19
VDD
13
RXA3-
13
RXD1-
13
RXA2+
20
VDD
21
HALF_VDD
14
RXA3+
14
RXD1+
14
22
HALF_VDD
15
RXD0-
15
RXA1-
23
GND
24
VCC
RXACK-
16
RXD0+
16
RXA1+
25
VCC
RXACK+
17
26
GND
27
RV0+
RXA1-
28
RV0-
RXA1+
29
RV1+
RXA0-
30
RV1-
RXA0+
31
RV2+
RXB4-
32
RV2-
RXB4+
28
LVCLK-
29
LV3+
3.3K
MINI_LVDS
VCC_LCM
30
LV3-
RXC2+
31
LV4+
RXC1-
32
LV4-
C701
0.1uF
16V
MINI_LVDS
HVDD
RXC2-
C711
10uF
16V
MINI_LVDS
RXC1+
33
LV5+
RXC0-
34
LV5-
RXC0+
35
GND
36
C703
0.01uF
50V
MINI_LVDS
VDD_LCM
RXC3+
10uF/25V(3216)
C704
0.1uF
C702
10uF
50V
MINI_LVDS
VDD_ODD
VDD_EVEN
R765
R771
0 GIP
R772
0 NON_GIP
0 NON_GIP
VST
15
16
VDD_LCM
17
HVDD
10uF/25V(3216)
C707
0.1uF
C705
50V
10uF
MINI_LVDS
18
19
C712
MINI_LVDS
10uF
16V
MINI_LVDS
VCC_LCM
RXA0-
R712
19
RXA0+
3.3K
LVDS_SEL_HIGH
20
RXC4+
20
21
RXC3-
21
22
RXC3+
22
20
RXA2+
21
RXA1-
22
RXA1+
23
RXA0-
24
RXA0+
RVCLK+
RVCLK-
RXB3+
RV3+
RXB2-
VCC
36
RV3-
RXB2+
37
VCC
37
RV4+
RXB1-
38
GND
38
RV4-
RXB1+
39
HALF_VDD
39
RV5+
RXB0-
40
HALF_VDD
40
RV5-
RXB0+
41
VDD
41
GND
42
VDD
42
SOE
43
GND
43
POL
POL
44
VCOM_IN
VCOML
44
VST_IN
GSP/GVST_I
R703
45
VCOM_FB
VCOMLFB
45
H_CONV
H_CONV
46
GND
46
OPT_N
3.3K
MINI_LVDS
47
VST
47
GND
48
VSS
48
GMA18
32
GMA18
49
VGH_EVEN
VDD_EVEN
49
GMA16
GMA16
33
50
VGH_ODD
VDD_ODD
50
GMA15
GMA15
51
VGI_P
51
GMA13
34
VGI_P
GMA13
52
VGI_N
VGI_N
52
GMA12
GMA12
35
RXB2-
35
53
CLK6
CLK6
53
GMA10
GMA10
54
CLK5
54
GMA9
36
GMA9
RXB2+
36
CLK5
55
CLK4
CLK4
55
GMA7
GMA7
37
RXB1-
37
56
CLK3
CLK3
56
GMA6
GMA6
57
CLK2
57
GMA4
38
RXB1+
38
GMA4
58
CLK1
58
GMA3
GMA3
39
RXB0-
39
59
Z_OUT
59
GMA1
GMA1
60
GND
60
GND
40
VGL
(-5V)
VGL_I
VST
0 GIP
0 GIP
CLK2
CLK1
Z_OUT
R745
0 NON_GIP
VCC_LCM
R773
3.3K
NON_GIP
C708
0.01uF
50V
MINI_LVDS
0
OPT
R711
10K
LVDS_SEL_LOW
OPC_EN
PANEL_VCC
24
RXCCK-
24
25
RXCCK+
25
L701
120-ohm
26
27
28
29
SOE
30
26
26
R709
10K
BIT_SEL_LOW
RXC2-
27
RXB4+
28
RXC2+
28
RXB3-
29
RXC1-
29
RXB3+
30
RXC1+
31
RXC0-
RXBCK-
32
RXC0+
RXBCK+
33
RXB4-
VCC_LCM
27
31
42
.
43
44
45
46
47
48
49
WAFER_HD
30
31
34
PANEL_VCC
L703
120-ohm
40
RXB0+
LVDS_SEL
61
.
R724
23
23
BIT_SEL
25
41
61
17
18
19
35
C706
0.1uF
16V
MINI_LVDS
LVDS_SEL
+3.3V_Normal
RXC4-
RXA2-
34
RXB3-
8
18
33
MINI_LVDS
R701
1
1
2
11
R700
RXD1-
R729
[30Pin LVDS Connector]
(For HD 60Hz_Normal)
R720
0
R713
0
SCAN
NON_SCANR721
0
OPT
R728
0
SCAN
R723
0
OPT
R702
41
SCAN_BLK2
OPC_EN
+3.3V_Normal
42
C713
10uF
16V
OPT
C714
1000pF
50V
3D
C715
0.1uF
16V
3D
3D
SCAN_BLK1/OPC_OUT
R705
PWM_DIM
33
R706 3D
33
240Hz
R707
33
240Hz/3D
R708
33
240Hz/3D
R704
33
3D
3.3K
LVDS_SEL_HIGH
/3D_FPGA_RESET
FRC_RESET
I2C_SCL
R710
10K
LVDS_SEL_LOW
I2C_SDA
3D_POWER_EN
50
51
52
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2_Saturn7M
LVDS
Ver. 1.3
36
LGE Internal Use Only
+1.8V_AMP
+3.3V_Normal
IC404
3 Vd=1.4V 1
R474
1
AP1117E18G-13
IN
ADJ/GND
120 mA
2
C434
0.1uF
16V
OUT
C446
0.1uF
16V
C421
10uF
10V
+24V
SPK_L+
D501
1N4148W
100V
OPT
OPT
R535
3.3
C514
22000pF
50V
1
2
+1.8V_AMP
C509
0.1uF
CLK_I
7
VDD_IO
8
9
R508
AGND_PLL
10
LF
11
AUD_SCK
AMP_SDA
AMP_SCL
VDR2A
40
BST2A
39
PGND2A_2
38
PGND2A_1
37
OUT2A_2
36
OUT2A_1
35
PVDD2A_2
34
PVDD2A_1
33
PVDD2B_2
32
PVDD2B_1
C522
25V1uF
C537
0.1uF
50V
15uH
3.3
SPEAKER_L
R532 OPT
R524
12
R528
4.7K
3.3
C541 OPT
0.01uF
50V
PVDD1B_2
PVDD1B_1
OUT1B_2
OUT1B_1
PGND1B_2
PGND1B_1
BST1B
VDR1B
48
47
46
45
44
43
PVDD1A_1
49
PVDD1A_2
OUT1A_1
OUT1A_2
51
50
52
53
54
PGND1A_1
PGND1A_2
D503
1N4148W
100V
OPT
50V
R521
12
R525
12
C532
390pF
50V
D504
1N4148W
100V
OPT
R522
12
2F
1S
1F
15uH
R523
12
C542 OPT
L506
AD-9060
2S
C535
0.47uF
50V
C538
R529
0.1uF
50V
4.7K
0.01uF
50V
R533 OPT
SPEAKER_R
3.3
R534 OPT
C539
R530
0.1uF
50V
4.7K
3.3
C543 OPT
0.01uF
50V
SPK_R-
28
+24V
PGND2B_1
27
BST2B
26
VDR2B
25
/FAULT
24
MONITOR2
23
MONITOR1
22
MONITOR0
SCL
SDA
BCK
WCK
21
PGND2B_2
20
OUT2B_1
29
19
30
14
18
31
13
17
12
C517
1uF
25V
C513
0.1uF
16V
SPK_R+
C525
22000pF
C531
390pF
50V
GND
C526
C527
0.1uF
50V
0.1uF
50V
C528
10uF
35V
C524
22000pF
50V
100
R504
100
R505
100
R506
33
R507
33
R513
0
POWER_DET
C516
1000pF
50V
OPT
+3.5V_ST
C507
18pF
50V
C510
18pF
50V
C546
22pF
50V
C544
22pF
50V
C545
22pF
50V
OPT
OPT
OPT
AMP_MUTE_HOTEL
AUD_LRCK
NTP-7000
NC
41
DVDD_PLL
OPT
C511
10uF
10V
AUD_LRCH
EAN60969601
42
OUT2B_2
C505
0.1uF
16V
R520
12
4.7K
C520
1uF
25V
AVDD_PLL
+1.8V_AMP
R503
IC501
SDATA
OPT
C503
10uF
10V
6
DGND_PLL
3.3K
C502
0.1uF
16V
5
16
100pF
50V
4
GND_IO
15
OPT
C501
10uF
10V
C504
AD
DGND_1
C508
1000pF
50V
L502
THERMAL
57
3
DGND_2
L501
BLM18PG121SN1D
BLM18PG121SN1D
+1.8V_AMP
55
EP_PAD
BST1A
VDR1A
25V /RESET
C512
1uF
D502
1N4148W
100V
OPT
1F
R527
C534
0.47uF
50V
SPK_L-
56
TP502
C506
1000pF
50V
AUD_MASTER_CLK
1S
C530
390pF
50V
C536
0.1uF
50V
2F
C540 OPT
0.01uF
50V
R531 OPT
C518
22000pF
50V
L504
DVDD
BLM18PG121SN1D
+3.3V_Normal
AMP_RESET_N
C519
0.1uF
50V
C515
0.1uF
50V
L507
AD-9060
2S
C529
390pF
50V
OPT
C547
0.01uF
50V
C521
10uF
35V
R526
12
R519
12
R514
100
WAFER-ANGLE
R515
10K
R536
0
C
B
Q501
2SC3052
R517
SPK_L+
AMP_MUTE
4
4
3
3
2
2
R537
0
10K
E
SPK_LR538
0
SPK_R+
R539
0
SPK_R-
1
1
P501
SPK_SLIM
SMAW250-04
P502
SPK_NORMAL
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2_Saturn7M
Ver. 1.1
AUDIO[NTP]
38
LGE Internal Use Only
USB1 OPTION
USB_MICREL
+3.3V_Normal
+5V_USB
IC2301
L2301
MLB-201209-0120P-N2
MIC2009YM6-TR
VOUT
ILIMIT
6
1
5
$0.125 2
4
3
VIN
GND
R2306
FAULT/
1
R2307
10K
R2302
47
USB1_OCD
2
R2305
3
4
0
SIDE_USB_DM
R2304
5
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
C2304
0.1uF
USB1_CTL
0
SIDE_USB_DP
D2301
CDS3C05HDMI1
5.6V
OPT
D2302
CDS3C05HDMI1
5.6V
OPT
TP2301
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
C2303
10uF
10V
0
ENABLE
180
10uF
10V
USB DOWN STREAM
@optioKJA-UB-4-0004
JK2301
C2302
R2301
120-ohm
R2303
4.7K
OPT
/RST_HUB
GP2_Saturn7M
USB
Ver. 1.0
39
LGE Internal Use Only
Composite
For EU & CHINA
+3.3V_Normal
D1619
30V
SC1/COMP1_DET
R1614
1K
C1607
0.1uF
16V
IN CASE OF SMALL= 15V
EU_OPT
L1606
EU_OPT
R4210
0
SC1_SOG_IN
EU_OPT E
ISA1530AC1
EU_OPT
R1611
0
R4220
0
AV_DET
22
11
21
10
SYNC_IN
[GN]G
C
C1608
220pF
50V
OPT
EU_OPT
20
9
[GN]C_DET
19
SYNC_GND2
18
D1603
30V
OPT
SYNC_GND1
[BL]B
17
7
RGB_IO
[RD]R
EU_OPT
R1628
75
D1610
30V
OPT
[WH]L_IN
5
15
R_GND
13
D2B_OUT
[RD]MONO
13
12
R4221
0
EU_OPT
G_OUT
D2B_IN
10
G_GND
EU_OPT
R4224
0
5C
Rg
4C
[RD]O-SPRING
3C
[RD]CONTACT
4B
[WH]C-LUG
3A
[YL]CONTACT
D1624
5.6V
C1646
0.1uF
16V
R1685
10K
AV_R_IN
DTV/MNT_VOUT
EU_OPT
R1645
0
EU_OPT
R1642
15K
EU_OPT
R1639
180
AV_CVBS_DET
R1666
1K
[RD]E-LUG
4A
[YL]O-SPRING
5A
[YL]E-LUG
R1671
470K
D1625
5.6V
C1659
L1609
120-ohm
C1663
330pF
50V
OPT
OPT
L1610
120-ohm
R1684
10K
SC1_FB
AV_L_IN
R1672
D1626
5.6V
C1662
330pF
50V
C1658
OPT
OPT
470K
SC1_R-/COMP1_PrR1601
0
EU_OPT
30V
SC1_G+/COMP1_Y+
11
PPJ-230-01
JK1601
OPT
C1602
10pF
R1608
75
14
[RD]R_IN
4
EU_OPT
R1616
75
SC1_R+/COMP1_Pr+
D1604
30V
RGB_GND
Rf
R1660
10K
JK1604
PPJ233-01
EU_OPT
C1625
0.1uF
50V
EU_OPT
R1641
47K
EU_OPT
C1621
47uF
16V
E
Gain=1+Rf/Rg
EU_OPT
R1627
22
16
R_OUT
6
EU_OPT
C1620
100uF
16V
EU_OPT
Q1602
2SC3052
B
EU_OPT
R1635
390
SYNC_OUT
8
C
R4211
390
D1602
30V
OPT
COM_GND
[GN]GND
+12V/+15V
B
SC1_CVBS_IN
FIX-TER
EU_OPT
C1623
0.1uF
50V
EU_OPT
R1640
470
Q1601
EU_OPT
C1604
47pF
50V
EU_OPT
R1609
75
EU_OPT
C1648
220pF
50V
+3.3V_Normal
OPT
C1643
47pF
50V
R1654
75
R1689
12K
R4223
0
D1611
5.6V
OPT
AV_CVBS_IN
R1659
0
R1613
10K
R1688
12K
Full Scart/ Comp1
D1605
30V
R1602
0
OPT
C1603
10pF
R1604
75
REC_8
SC1_G-/COMP1_Y-
9
D1716
EU_OPT
R1669
0
ID
8
OPT
EU_OPT
D1618 R1623
30V
15K
B_OUT
SC1_B+/COMP1_Pb+
7
AUDIO_L_IN
6
D1606
30V
R1605
75
B_GND
OPT
C1601
10pF
SC1_ID
EU_OPT
R1629
3.9K
SC1_B-/COMP1_Pb-
5
AUDIO_GND
4
AUDIO_L_OUT
R1603
0
3
R1617
10K
AUDIO_R_IN
2
AUDIO_R_OUT
1
SC1/COMP1_L_IN
D1607
5.6V
OPT
R1606
470K
OPT
C1606
L1604
120-ohm
C1611
330pF
50V
PSC008-01
JK1602
R1630
12K
R1618
10K
SC1/COMP1_R_IN
L1603
120-ohm
D1609
5.6V
OPT
R1607
470K
C1612
330pF
50V
OPT
C1605
R1631
12K
IC1601
LM324D
EU_OPT
R1656
2.2K
CLOSE TO MSTAR
1
DTV/MNT_L_OUT
EU_OPT
C1644
10uF
16V
DTV/MNT_L_OUT
EU_OPT
L1601
BLM18PG121SN1D
D1608
5.6V
OPT
EU_OPT
C1609
1000pF
50V
EU_OPT
R1622
0
EU_OPT
C1618
4700pF
C1664
0.01uF
+12V/+15V
R4219
SCART1_Lout
R4218
22K
EU_OPT
R1664
33K
OPT
R1662
470K
2
EU_OPT
R1667
10K
EU_OPT
C1654
33pF
100
EU_OPT
R1657
5.6K
100
EU_OPT/CHINA_HOTEL_OPT
R1658
5.6K
3
4
DTV/MNT_R_OUT
EU_OPT
L1602
BLM18PG121SN1D
D1601
5.6V
OPT
EU_OPT
C1610
1000pF
50V
EU_OPT
R1624
0
EU_OPT
C1619
4700pF
R4212
C1642
0.1uF
SCART1_Rout
50V
0
R4216
EU_OPT/CHINA_HOTEL_OPT
R1665
33K
AUDIO_R
C1665
0.01uF
HOTEL_OPT
EU_OPT/CHINA_HOTEL_OPT
R4217
22K
C1645
10uF
16V
EU_OPT/CHINA_HOTEL_OPT
OPTION TABLE
STATUS
COMPONENT2
7
C1655
33pF
1
14
2
13
3
12
4
11
5
10
6
9
7
8
13
12
11
10
9
8
EU_OPT/CHINA_HOTEL_OPT
EU_OPT/CHINA_HOTEL_OPT
OPT
R1661
470K
+3.3V_Normal
R1612
10K
AV_OPT
6
R1668
10K
EU_OPT/CHINA_HOTEL_OPT
R1655
2.2K
DTV/MNT_R_OUT
NAME
5
EU_OPT/CHINA_HOTEL_OPT
14
R1615
1K
EU : Not Using
COMP2_DET
D1613
5.6V
China : Using
FOR ESD & EMI
CHINA_OPT
COMP2_Y-
R4215 0
[GN]E-LUG
EU : Not Using
R1619
75
6A
[GN]O-SPRING
China : Using
OPT
C1613
10pF
50V
COMP2_Y+
D1612
30V
5A
[GN]CONTACT
+12V/+15V
IN CASE OF SMALL= 15V
[SCART PIN 8]
[SCART AUDIO MUTE]
EU_OPT
[BL]E-LUG-S
EU :Using
D1614
30V
7B
R4214 0
[BL]O-SPRING
75
R1620
50V
10pF
C1614
OPT
EU_OPT
R1687
10K
COMP2_Pb+
[RD]E-LUG-S
7C
R4213 0
[RD]O-SPRING_1
5C
[WH]O-SPRING
75
R1621
50V
10pF
C1615
OPT
COMP2_Pr-
R1633
10K
[RD]O-SPRING_2
+3.5V_ST
DTV/MNT_L_OUT
R1637
0
EU_OPT
Q1607
2SC3052
COMP2_L_IN
[RD]CONTACT
4E
OPT
R1675
2K
COMP2_Pr+
D1615
30V
5D
D1616
5.6V
R1625
470K
C1616
1000pF
50V
R1636
12K
5E
OPT
R1652
10K
EU_OPT
RT1P141C-T112
Q1610
EU_OPT
R1648
2K
R1632
10K
6E
R1638
0
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
D1617
5.6V
R1626
470K
C1617
1000pF
50V
R1634
12K
3
DTV/MNT_R_OUT
COMP2_R_IN
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
EU_OPT
R1695
12K
EU_OPT
R1680
1K
SC_RE1
EU_OPT
Q1608
2SC3052
EU_OPT
R1650
2K
C
EU_OPT
C1636
0.1uF
C
EU_OPT
Q1615
2SC3052
B
E
R4207
51K
OPT
REC_8
B
EU_OPT
Q1613
E 2SC3052
OPT
R1676
560
1
2
EU_OPT
R4202
0
EU_OPT
R1690
0
EU_OPT
R1677
10K
C
SCART1_MUTE
[RD]E-LUG
PPJ234-01
JK1603
R1694
10K
19~22
COMP2_Pb-
FOR ESD & EMI
5B
China:NotUsing
19~22
R4205
2.2K
26~52
R4205-*1
0
FOR ESD & EMI
4A
EU_OPT
Q1611
2SC3052
B
SC_RE2
OPT
R1678
680
EU_OPT
R1681
1K
GP2_Saturn7M
SCART/RCA
E
Ver. 1.1
41
LGE Internal Use Only
NOT USING B/T
BT_ON/OFF
BT_DM
BT_DP
BT_LOUT
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2_Saturn7M
NON B/T
Ver. 1.0
44
LGE Internal Use Only
CI Region
CI SLOT
+5V_CI_ON
CI TS INPUT
CI_DATA[0-7]
CI_DATA[0-7]
10K
R1903
C1906
10uF
10V
EAG41860102
P1901
35
FE_TS_DATA[6]
FE_TS_DATA[5]
FE_TS_DATA[4]
33
38
4
CI_DATA[4]
CI_DATA[5]
CI_TS_DATA[5]
39
5
CI_DATA[6]
CI_TS_DATA[6]
CI_TS_DATA[7]
40
6
41
7
42
8
37
33
R1905
10K
3
CI_DATA[7]
R1919
47
43
9
44
10
CI_ADDR[11]
45
11
CI_ADDR[9]
46
12
CI_ADDR[8]
CI_MDI[0]
47
13
CI_ADDR[13]
CI_MDI[1]
48
14
CI_ADDR[14]
0.1uF
C1905
0
R1910
GND
OPT
CI_MDI[4]
49
15
50
16
51
17
52
18
53
100
/PCM_IRQA
C1909
0.1uF
OPT
GND
CI_MDI[5]
54
20
55
21
CI_ADDR[12]
CI_MDI[7]
56
22
CI_ADDR[7]
57
23
CI_ADDR[6]
R1902
PCM_RST
R1901
REG
10K
47
58
24
CI_ADDR[5]
47
59
25
CI_ADDR[4]
AR1902
60
26
61
27
CI_ADDR[2]
62
28
CI_ADDR[1]
63
29
64
30
CI_DATA[0]
65
31
CI_DATA[1]
66
32
CI_DATA[2]
67
33
33
CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC
CI_TS_DATA[0]
33
CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[3]
0
100
OPT
R1909
R1907
/CI_CD2
CI HOST I/F
CI_ADDR[3]
CI_ADDR[0]
CI_ADDR[0-14]
34
68
AR1903
FE_TS_CLK
CI_MCLKI
CI_OE
CI_WE
R1920
CI_MDI[6]
R1906
FE_TS_SYNC
FE_TS_VAL_ERR
CI_MIVAL_ERR
/PCM_CE
0
R1916
19
FE_TS_DATA[0-7]
33
CI_MISTRT
CI_ADDR[10]
CI_IOWR
CI_MDI[3]
FE_TS_DATA[1]
FE_TS_DATA[0]
AR1904
CI_IORD
CI_MDI[2]
FE_TS_DATA[2]
CI_MDI[1]
G2
2
69
G1
1
CI_DET
+5V_Normal
IC1902
GND
1OE
GND
R1904
10K
20
1
PCM_A[0]
GND
19
2
2OE
0ITO742440D
C1904
0.1uF
16V
2Y4
CI_ADDR[7]
1A2
PCM_A[1]
CI_MISTRT
CI_MIVAL_ERR
2Y3
CI_ADDR[6]
3
18
4
17
5
CI_MCLKI
1A3
PCM_A[2]
2Y2
CI_ADDR[5]
1A4
PCM_A[3]
2Y1
CI DETECT
CI_ADDR[4]
GND
+3.3V_Normal
+3.3V_CI
C1913
0.1uF
VCC
16V
TOSHIBA
1A1
TC74LCX244FT
AR1901
CI_TS_DATA[4]
FE_TS_DATA[3]
CI_MDI[0]
CI_DATA[3]
36
AR1906
CI_MDI[2]
R1921
10K
100
CI_DATA[0-7]
R1908
FE_TS_DATA[7]
CI_MDI[5]
CI_MDI[3]
10067972-000LF
C1903
0.1uF
16V
AR1905
CI_MDI[4]
/CI_CD1
/PCM_WAIT
33
CI_MDI[7]
CI_MDI[6]
@netLa
+5V_Normal
+3.3V_CI
+3.3V_CI
6
16
15
7
14
8
13
9
12
10
11
1Y1
CI_ADDR[0]
2A4
PCM_A[7]
1Y2
CI_ADDR[1]
2A3
PCM_A[6]
1Y3
CI_ADDR[2]
2A2
PCM_A[5]
1Y4
CI_ADDR[3]
2A1
PCM_A[4]
+3.3V_CI
IC1901
KIC7SZ32FU
5
VCC
4
OUT_Y
C1902
R1917
0.1uF
16V
CI_DATA[0]
GND
CI_DET
0.1uF
33
AR1907
CI_DATA[1]
R1915
47
R1918
/PCM_CD
47
PCM_D[0]
PCM_D[1]
CI_DATA[2]
PCM_D[2]
CI_DATA[3]
PCM_D[3]
CI_DATA[4]
33
AR1908
PCM_D[4]
CI_DATA[5]
PCM_D[5]
CI_DATA[6]
PCM_D[6]
CI_DATA[7]
PCM_D[7]
PCM_D[0-7]
3
CI_DATA[0-7]
0.1uF
1
2
GND
C1908
/CI_CD1
C1901
IN_B
IN_A
/CI_CD2
10K
L1901
BLM18PG121SN1D
CI POWER ENABLE CONTROL
PCM_D[0-7]
CI_DATA[0-7]
+5V_CI_ON
+5V_Normal
Q1902
RSR025P03
S
L1902
BLM18PG121SN1D
CI_ADDR[8]
D
33
AR1912
PCM_A[8]
R1914
22K
R1912
10K
C1911
4.7uF
16V
C1910
G
0.1uF
16V
0.1uF
C1907
CI_ADDR[9]
R1923
10K
OPT
C1912
0.1uF
16V
PCM_A[10]
CI_ADDR[11]
PCM_A[11]
16V
OPT
OPT
PCM_A[9]
CI_ADDR[10]
CI_ADDR[12]
33
AR1913
PCM_A[12]
PCM_A[13]
CI_ADDR[13]
CI_ADDR[14]
R1922
PCM_A[14]
/PCM_REG
REG
2.2K
R1911
PCM_5V_CTL
R1913
10K
C
B
Q1901
2SC3052
0
R1924
10K
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
E
CI_OE
CI_WE
AR1909
33
/PCM_OE
/PCM_WE
CI_IORD
/PCM_IORD
CI_IOWR
/PCM_IOWR
GP2_Saturn7M
PCMCI
Ver. 1.0
45
LGE Internal Use Only
NON ETHERNET
TP2101
EPHY_RXD0
TP2102
EPHY_RXD1
TP2103
EPHY_TXD1
TP2104
EPHY_TXD0
TP2105
EPHY_REFCLK
TP2106
EPHY_CRS_DV
TP2107
EPHY_MDIO
TP2108
ET_RXER
TP2109
/RST_PHY
TP2110
TP2111
EPHY_MDC
EPHY_EN
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2_Saturn7M
Ver. 1.0
NON ETHERNET
48
LGE Internal Use Only
NON Motion Remocon Region
TP2501
TP2502
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
M_REMOTE_RX
M_REMOTE_TX
TP2503
RF_RESET
TP2504
RF_ENABLE
GP2_Saturn7M
NON M REMOCON
Ver. 1.0
50
LGE Internal Use Only
China HOTEL Option
Chinese Hotel Option
+24V
P3401
12505WS-09A00
HOTEL_OPT
R3404 0
1
HOTEL_OPT
C3401
0.1uF
HOTEL_OPT
2
3
AUDIO_R
+3.3V_Normal
4
HOTEL_OPT
AMP_RESET_N
R3403 0
R3402
10K
HOTEL_OPT
AMP_MUTE_HOTEL
R3401 200
AMP_MUTE_HOTEL
B
5
6
C Q3401
RT1C3904-T112
HOTEL_OPT
HOTEL_OPT
7
HOTEL_OPT
E
R3406 0
SPK_R+_HOTEL
8
HOTEL_OPT
R3405 0
SPK_R-_HOTEL
CLOSE TO THE EARPHONE
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
9
10
GP2_Saturn7M
CHINA HOTEL
Ver. 1.0
51
LGE Internal Use Only
/PIF_SPI_CS
R6001
0
CHB_CVBS_IN
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
GP2_Saturn7M
NON CHB
Ver. 1.0
68
LGE Internal Use Only

Similar documents

SERVICE MANUAL

SERVICE MANUAL After reassembling the product, always perform an isolation check on the exposed metal parts of the product (antenna terminals, knobs, metal cabinet, screw heads, headphone jack, control shafts, et...

More information

compal confidential

compal confidential PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRE...

More information