Copyright 1998 Marc E. Herniter - Rose

Transcription

Copyright 1998 Marc E. Herniter
LM384 5W Audio Power Amplifier
General Description
Features
The LM384 is a power audio amplifier for consumer application. In order to hold system cost to a minimum, gain is
internally fixed at 34 dB. A unique input stage allows inputs
to be ground referenced. The output is automatically selfcentering to one half the supply voltage.
The output is short-circuit proof with internal thermal limiting. The package outline is standard dual-in-line. A copper
lead frame is used with the center three pins on either side
comprising a heat sink. This makes the device easy to use
in standard p-c layout.
Uses include simple phonograph amplifiers, intercoms, line
drivers, teaching machine outputs, alarms, ultrasonic drivers, TV sound systems, AM-FM radio, sound projector systems, etc. See AN-69 for circuit details.
Y
Y
Y
Y
Y
Y
Y
Y
Y
Wide supply voltage range
Low quiescent power drain
Voltage gain fixed at 50
High peak current capability
Input referenced to GND
High input impedance
Low distortion
Quiescent output voltage is at one half of the supply
voltage
Standard dual-in-line package
Schematic Diagram
TL/H/7843 – 3
C1995 National Semiconductor Corporation
TL/H/7843
RRD-B30M115/Printed in U. S. A.
February 1995
Absolute Maximum Ratings
Storage Temperature
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
Peak Current
Power Dissipation (See Notes 3 and 4)
Input Voltage
b 65§ C to a 150§ C
Operating Temperature
0§ C to a 70§ C
Lead Temperature (Soldering, 10 sec.)
Thermal Resistance
iJC
iJA
28V
1.3A
1.67W
260§ C
30§ C/W
79§ C/W
g 0.5V
Electrical Characteristics (Note 1)
Symbol
Parameter
Conditions
Min
Typ
Max
150
Units
ZIN
Input Resistance
IBIAS
Bias Current
AV
Gain
POUT
Output Power
IQ
Quiescent Supply Current
8.5
VOUT Q
Quiescent Output Voltage
11
V
BW
Bandwidth
450
kHz
Va
Supply Voltage
ISC
Short Circuit Current (Note 5)
1.3
A
PSRRRTO
Power Supply Rejection Ratio
(Note 2)
31
dB
THD
Total Harmonic Distortion
Inputs Floating
THD e 10%, RL e 8X
40
50
5
5.5
POUT e 2W, RL e 8X
12
POUT e 4W, RL e 8X
nA
60
0.25
Note 2: Rejection ratio referred to the output with CBYPASS e 5 mF, freq e 120 Hz.
Note 3: The maximum junction temperature of the LM384 is 150§ C.
Note 4: The package is to be derated at 15§ C/W junction to heat sink pins.
Note 5: Output is fully protected against a shorted speaker condition at all voltages up to 22V.
Heat Sink Dimensions
Staver ‘‘V7’’ Heat Sink
Staver Company
41 Saxon Ave.
P.O. Drawer H
Bay Shore, N.Y.
Tel: (516) 666-8000
TL/H/7843 – 4
V/V
W
25
26
Note 1: V a e 22V and TA e 25§ C operating with a Staver V7 heat sink for 30 seconds.
2
kX
100
1.0
mA
V
%
Typical Performance Characteristics
Device Dissipation vs
Ambient Temperature
Thermal Resistance vs
Square Inches
Supply Decoupling vs
Frequency
vs Output Power
Output Voltage Gain vs
Frequency
vs Frequency
Power Supply Current vs
Supply Voltage
Output PowerÐ16X Load
TL/H/7843 – 5
3
Block and Connection Diagrams
Dual-In-Line Package
TL/H/7843 – 1
*Heatsink Pins
TL/H/7843 – 2
Top View
Order Number LM384N
See NS Package Number N14A
Typical Applications
Typical 5W Amplifier
TL/H/7843 – 6
Bridge Amplifier
TL/H/7843 – 7
4
Typical Applications (Continued)
Intercom
*For stability with
high current loads
TL/H/7843 – 8
Phase Shift Oscillator
TL/H/7843 – 9
5
Physical Dimensions inches (millimeters)
Molded Dual-In-Line Package (N)
Order Number LM384N
NS Package Number N14A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
National Semiconductor
Corporation
1111 West Bardin Road
Arlington, TX 76017
Tel: 1(800) 272-9959
Fax: 1(800) 737-7018
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
Europe
Fax: (a49) 0-180-530 85 86
Email: cnjwge @ tevm2.nsc.com
Deutsch Tel: (a49) 0-180-530 85 85
English Tel: (a49) 0-180-532 78 32
Fran3ais Tel: (a49) 0-180-532 93 58
Italiano Tel: (a49) 0-180-534 16 80
Hong Kong Ltd.
13th Floor, Straight Block,
Ocean Centre, 5 Canton Rd.
Tsimshatsui, Kowloon
Hong Kong
Tel: (852) 2737-1600
Fax: (852) 2736-9960
Japan Ltd.
Tel: 81-043-299-2309
Fax: 81-043-299-2408
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
LM3876
Audio Power Amplifier Series
High-Performance 56W Audio Power Amplifier w/Mute
General Description
Features
The LM3876 is a high-performance audio power amplifier
capable of delivering 56W of continuous average power to
an 8X load with 0.1% (THD a N) from 20 Hz–20 kHz.
Y
Y
Y
Y
The performance of the LM3876, utilizing its Self Peak Instantaneous Temperature (§ Ke) (SPiKeTM ) Protection Circuitry, puts it in a class above discrete and hybrid amplifiers
by providing an inherently, dynamically protected Safe Operating Area (SOA). SPiKe Protection means that these
parts are completely safeguarded at the output against
overvoltage, undervoltage, overloads, including shorts to
the supplies, thermal runaway, and instantaneous temperature peaks.
The LM3876 maintains an excellent Signal-to-Noise Ratio of
greater than 95 dB(min) with a typical low noise floor of
2.0 mV. It exhibits extremely low (THD a N) values of
0.06% at the rated output into the rated load over the audio
spectrum, and provides excellent linearity with an IMD
(SMPTE) typical rating of 0.004%.
Y
Y
Y
Y
56W continuous average output power into 8X
100W instantaneous peak output power capability
Signal-to-Noise Ratio t 95 dB(min)
An input mute function
Output protection from a short to ground or to the supplies via internal current limiting circuitry
Output over-voltage protection against transients from
inductive loads
Supply under-voltage protection, not allowing internal
biasing to occur when lVEEl a lVCCl s 12V, thus eliminating turn-on and turn-off transients
11-lead TO-220 package
Applications
Y
Y
Y
Y
Y
Component stereo
Compact stereo
Self-powered speakers
Surround-sound amplifiers
High-end stereo TVs
Typical Application
Connection Diagram
Plastic Package (Note 8)
TL/H/11832 – 2
Top View
Order Number LM3876T
or LM3876TF
See NS Package Number TA11B for
Staggered Lead Non-Isolated
Package or TF11B for
Staggered Lead Isolated Package
² Connect Pin 5 to V a for Compatibility with
LM3886.
TL/H/11832 – 1
FIGURE 1. Typical Audio Amplifier Application Circuit
*Optional components dependent upon specific design requirements. Refer to the External Components Description section for a component functional description.
OvertureTM and SPiKeTM Protection are trademarks of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
TL/H/11832
RRD-B30M75/Printed in U. S. A.
LM3876 Overture Audio Power Amplifier Series
April 1995
Absolute Maximum Ratings (Notes 1, 2)
Soldering Information
T Package (10 seconds)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage lV a l a lVb l (No Signal)
260§ C
b 40§ C to a 150§ C
Storage Temperature
Thermal Resistance
iJC
iJA
94V
Supply Voltage lV a l a lVb l (Input Signal)
84V
Common Mode Input Voltage
(V a or Vb) and
lV a l a lVb l s80V
Differential Input Voltage
60V
Output Current
Internally Limited
Power Dissipation (Note 3)
125W
ESD Susceptibility (Note 4)
3000V
Junction Temperature (Note 5)
150§ C
1§ C/W
43§ C/W
Operating Ratings (Notes 1, 2)
Temperature Range
TMIN s TA s TMAX
Supply Voltage lV a l a lVb l
b 20§ C s TA s a 85§ C
24V to 84V
Note: Operation is guaranteed up to 84V, however, distortion may be introduced from SPiKe Protection Circuitry when operating above 70V if
proper thermal considerations are not taken into account. Refer to the
Thermal Considerations section for more information.
(See SPiKe Protection Response)
Electrical Characteristics
(Notes 1, 2) The following specifications apply for V a e a 35V, Vb e b35V,
IMUTE e b0.5 mA with RL e 8X unless otherwise specified. Limits apply for TA e 25§ C.
LM3876
Symbol
Parameter
Conditions
Typical
Limit
(Note 6) (Note 7)
Units
(Limits)
lV a l a lVb l
Power Supply Voltage (Note 10)
Vpin7 b Vb t 9V
18
24
84
V (min)
V (max)
AM
Mute Attenuation
Pin 8 Open or at 0V, Mute: On
Current out of Pin 8 l 0.5 mA,
Mute: Off
120
80
dB (min)
THD a N e 0.1% (max)
f e 1 kHz; f e 20 kHz
56
40
W (min)
**PO
Output Power (Continuous Average)
Peak PO
Instantaneous Peak Output Power
THD a N
Total Harmonic Distortion Plus Noise
40W, 20 Hz s f s 20 kHz
AV e 26 dB
**SR
Slew Rate (Note 9)
VIN e 1.2 Vrms, f e 10 kHz,
Square-Wave, RL e 2 kX
*I a
*VOS
100
W
0.06
%
11
5
V/ms (min)
Total Quiescent Power Supply Current VCM e 0V, Vo e 0V, Io e 0A, Imute e 0A
30
70
mA (max)
Input Offset Voltage
VCM e 0V, Io e 0 mA
1
15
mV (max)
IB
Input Bias Current
VCM e 0V, Io e 0 mA
0.2
1
mA (max)
IOS
Input Offset Current
VCM e 0V, Io e 0 mA
0.01
0.2
mA (max)
Io
Output Current Limit
6
4
A (min)
*Vod
Output Dropout Voltage (Note 11)
lV a l e lVb l e 12V, tON e 10 ms, VO e 0V
lV a – VOl, V a e 20V, Io e a 100 mA
lVO – Vb l, Vb e b20V, Io e b100 mA
1.6
2.7
5
5
V (max)
V (max)
*PSRR
Power Supply Rejection Ratio
120
85
dB (min)
120
85
dB (min)
V a e 40V to 20V, Vb e b40V,
VCM e 0V, Io e 0 mA
V a e 40V, Vb e b40V to b20V,
VCM e 0V, Io e 0 mA
*DC Electrical Test; refer to Test Circuit Ý1.
**AC Electrical Test; refer to Test Circuit Ý2.
2
Electrical Characteristics (Notes 1, 2)
The following specifications apply for V a e a 35V, Vb e b35V, IMUTE e b0.5 mA with RL e 8X unless otherwise specified.
Limits apply for TA e 25§ C. (Continued)
LM3876
Symbol
Parameter
Conditions
*CMRR
Common Mode Rejection Ratio
V a e 60V to 20V, Vb e b20V to b60V,
VCM e 20V to b20V, Io e 0 mA
*AVOL
Open Loop Voltage Gain
GBWP
Gain-Bandwidth Product
lV a l e lVb l e 40V, RL e 2 kX, DVO e 60V
lV a l e lVb l e 40V
fO e 100 kHz, VIN e 50 mVrms
Units
(Limits)
Typical
(Note 6)
Limit
(Note 7)
120
80
dB (min)
120
90
dB (min)
8
2
MHz (min)
8
mV (max)
**eIN
Input Noise
IHFÐA Weighting Filter
RIN e 600X (Input Referred)
2.0
SNR
Signal-to-Noise Ratio
PO e 1W, A-Weighted,
Measured at 1 kHz, RS e 25X
98
dB
PO e 40W, A-Weighted,
114
dB
Ppk e 100W, A-Weighted,
122
dB
0.004
0.006
%
IMD
Intermodulation Distortion Test
60 Hz, 7 kHz, 4:1 (SMPTE)
60 Hz, 7 kHz, 1:1 (SMPTE)
*DC Electrical Test; refer to Test Circuit Ý1.
**AC Electrical Test; refer to Test Circuit Ý2.
Note 1: All voltages are measured with respect to the GND pin (pin 7), unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions
which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where
no limit is given, however, the typical value is a good indication of device performance.
Note 3: For operating at case temperatures above 25§ C, the device must be derated based on a 150§ C maximum junction temperature and a thermal resistance of
iJC e 1.0 § C/W (junction to case). Refer to the Thermal Resistance figure in the Application Information section under Thermal Considerations.
Note 4: Human body model, 100 pF discharged through a 1.5 kX resistor.
Note 5: The operating junction temperature maximum is 150§ C, however, the instantaneous Safe Operating Area temperature is 250§ C.
Note 6: Typicals are measured at 25§ C and represent the parametric norm.
Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: The LM3876T package TA11B is a non-isolated package, setting the tab of the device and the heat sink at Vb potential when the LM3876 is directly
mounted to the heat sink using only thermal compound. If a mica washer is used in addition to thermal compound, iCS (case to sink) is increased, but the heat sink
will be isolated from Vb.
Note 9: The feedback compensation network limits the bandwidth of the closed-loop response and so the slew rate will be reduced due to the high frequency rolloff. Without feedback compensation, the slew rate is typically 16V/ms.
Note 10: Vb must have at least b 9V at its pin with reference to ground in order for the under-voltage protection circuitry to be disabled.
Note 11: The output dropout voltage is the supply voltage minus the clipping voltage. Refer to the Clipping Voltage vs Supply Voltage graph in the Typical
Performance Characteristics section.
3
Test Circuit Ý1 *(DC Electrical Test Circuit)
TL/H/11832 – 3
Test Circuit Ý2 **(AC Electrical Test Circuit)
TL/H/11832 – 4
4
Single Supply Application Circuit
TL/H/11832 – 5
FIGURE 2. Typical Single Supply Audio Amplifier Application Circuit
*Optional components dependent upon specific design requirements. Refer to the External
Components Description section for a component functional description.
Equivalent Schematic (excluding active protection circuitry)
TL/H/11832 – 6
5
External Components Description (Figures 1 and 2 )
Components
1.
2.
RIN
RA
3.
4.
5.
CA
C
RB
6.
*CC
7.
8.
Ri
*Ci
9.
10.
Rf1
*Rf2
11.
12.
*Cf
RM
13.
14.
CM
*RSN
15.
*CSN
16.
17.
*L
*R
18.
19.
CS
S1
Functional Description
Acts as a volume control by setting the voltage level allowed to the amplifier’s input terminals.
Provides DC voltage biasing for the single supply operation and bias current for the positive input
terminal.
Provides bias filtering.
Provides AC coupling at the input and output of the amplifier for single supply operation.
Prevents currents from entering the amplifier’s non-inverting input which may be passed through to
the load upon power-down of the system due to the low input impedance of the circuitry when the
under-voltage circuitry is off. This phenomenon occurs when the supply voltages are below 1.5V.
Reduces the gain (bandwidth of the amplifier) at high frequencies to avoid quasi-saturation
oscillations of the output transistor. The capacitor also suppresses external electromagnetic
switching noise created from fluorescent lamps.
Inverting input resistance to provide AC Gain in conjunction with Rf1.
Feedback capacitor. Ensures unity gain at DC. Also a low frequency pole (highpass roll-off) at:
fc e 1/(2qRi Ci)
Feedback resistance to provide AC Gain in conjunction with Ri.
At higher frequencies feedback resistance works with Cf to provide lower AC Gain in conjunction
with Rf1 and Ri. A high frequency pole (lowpass roll-off) exists at:
fc e [Rf1 Rf2 (s a 1/Rf2Cf)] / [(Rf1 a Rf2)(s a 1/Cf(Rf1 a Rf2))]
Compensation capacitor that works with Rf1 and Rf2 to reduce the AC Gain at higher frequencies.
Mute resistance set up to allow 0.5 mA to be drawn from pin 8 to turn the muting function off.
x RM is calculated using: RM s (lVEEl b 2.6V)/I8 where I8 t 0.5 mA. Refer to the Mute
Attenuation vs Mute Current curves in the Typical Performance Characteristics section.
Mute capacitance set up to create a large time constant for turn-on and turn-off muting.
Works with CSN to stabilize the output stage by creating a pole that eliminates high frequency
oscillations.
Works with RSN to stabilize the output stage by creating a pole that eliminates high frequency
oscillations.
fc e 1/(2qRSNCSN)
Provides high impedance at high frequecies so that R may decouple a highly capacitive load
and reduce the Q of the series resonant circuit due to capacitive load. Also provides a low
impedance at low frequencies to short out R and pass audio signals to the load.
Provides power supply filtering and bypassing.
Mute switch that mutes the music going into the amplifier when opened.
*Optional components dependent upon specific design requirements. Refer to the Application Information section for more information.
OPTIONAL EXTERNAL COMPONENT INTERACTION
Although the optional external components have specific desired functions that are designed to reduce the bandwidth and
eliminate unwanted high frequency oscillations they may cause certain undesirable effects when they interact. Interaction may
occur for components whose reactances are in close proximity to one another. One example would be the coupling capacitor,
CC, and the compensation capacitor, Cf. These two components act as low impedances to certain frequencies which will couple
signals from the input to the output. Please take careful note of basic amplifier component functionality when designing in these
components.
The optional external components shown in Figure 2 and described above are applicable in both single and split voltage supply
configurations.
6
Safe Area
SPiKe
Protection Response
Supply Current vs
Supply Voltage
Pulse Thermal
Resistance
Pulse Thermal
Resistance
Supply Current vs
Output Voltage
Pulse Power Limit
Pulse Power Limit
Supply Current vs
Case Temperature
Pulse Response
Input Bias Current vs
Case Temperature
Clipping Voltage vs
Supply Voltage
TL/H/11832 – 7
7
(Continued)
THD a N vs Frequency
THD a N vs Output Power
THD a N vs Output Power
THD a N Distribution
THD a N Distribution
Output Power vs
Load Resistance
TL/H/11832 – 8
Max Heatsink Thermal Resistance (§ C/W)
at the Specified Ambient Temperature (§ C)
PDmax vs Supply Voltage
Note: The maximum heat sink thermal resistance values, O SA, in the table above
were calculated using a O CS e 0.2§ C/W due to thermal compound.
Power Dissipation vs
Output Power
Power Dissipation vs
Output Power
TL/H/11832 – 9
Output Power vs
Supply Voltage
TL/H/11832 – 10
8
(Continued)
IMD 60 Hz, 4:1
IMD 60 Hz, 7 kHz, 4:1
IMD 60 Hz, 7 kHz, 4:1
IMD 60 Hz, 1:1
IMD 60 Hz, 7 kHz 1:1
IMD 60 Hz, 7 kHz, 1:1
Mute Attenuation vs
Mute Current
Mute Attenuation vs
Mute Current
Large Signal Response
Power Supply
Rejection Ratio
Common-Mode
Rejection Ratio
Open Loop
Frequency Response
TL/H/11832 – 11
9
Application Information
ing the best heat sink possible within the cost and space
constraints of the system will improve the long-term reliability of any power semiconductor device.
GENERAL FEATURES
Mute Function: The muting function of the LM3876 allows
the user to mute the music going into the amplifier by drawing less than 0.5 mA out of pin 8 of the device. This is
accomplished as shown in the Typical Application Circuit
where the resistor RM is chosen with reference to your negative supply voltage and is used in conjuction with a switch.
The switch (when opened) cuts off the current flow from
pin 8 to Vb, thus placing the LM3876 into mute mode. Refer
to the Mute Attenuation vs Mute Current curves in the Typical Performance Characteristics section for values of attenuation per current out of pin 8. The resistance RM is
calculated by the following equation:
RM (lVEEl b 2.6V)/I8 where I8 t 0.5 mA.
THERMAL CONSIDERATIONS
Heat Sinking
The choice of a heat sink for a high-power audio amplifier is
made entirely to keep the die temperature at a level such
that the thermal protection circuitry does not operate under
normal circumstances. The heat sink should be chosen to
dissipate the maximum IC power for a given supply voltage
and rated load.
With high-power pulses of longer duration than 100 ms, the
case temperature will heat up drastically without the use of
a heat sink. Therefore the case temperature, as measured
at the center of the package bottom, is entirely dependent
on heat sink design and the mounting of the IC to the heat
sink. For the design of a heat sink for your audio amplifier
application refer to the Determining The Correct Heat
Sink section.
Since a semiconductor manufacturer has no control over
which heat sink is used in a particular amplifier design, we
can only inform the system designer of the parameters and
the method needed in the determination of a heat sink. With
this in mind, the system designer must choose his supply
voltages, a rated load, a desired output power level, and
know the ambient temperature surrounding the device.
These parameters are in addition to knowing the maximum
junction temperature and the thermal resistance of the IC,
both of which are provided by National Semiconductor.
As a benefit to the system designer we have provided Maximum Power Dissipation vs Supply Voltages curves for various loads in the Typical Performance Characteristics
section, giving an accurate figure for the maximum thermal
resistance required for a particular amplifier design. This
data was based on iJC e 1§ C/W and iCS e 0.2§ C/W. We
also provide a section regarding heat sink determination for
any audio amplifier design where iCS may be a different
value. It should be noted that the idea behind dissipating the
maximum power within the IC is to provide the device with a
low resistance to convection heat transfer such as a heat
sink. Therefore, it is necessary for the system designer to be
conservative in his heat sink calculations. As a rule, the lower the thermal resistance of the heat sink the higher the
amount of power that may be dissipated. This is of course
guided by the cost and size requirements of the system.
Convection cooling heat sinks are available commercially,
and their manufacturers should be consulted for ratings.
Proper mounting of the IC is required to minimize the thermal drop between the package and the heat sink. The heat
sink must also have enough metal under the package to
conduct heat from the center of the package bottom to the
fins without excessive temperature drop.
Under-Voltage Protection: Upon system power-up the under-voltage protection circuitry allows the power supplies
and their corresponding caps to come up close to their full
values before turning on the LM3876 such that no DC output spikes occur. Upon turn-off, the output of the LM3876 is
brought to ground before the power supplies such that no
transients occur at power-down.
Over-Voltage Protection: The LM3876 contains overvoltage protection circuitry that limits the output current to approximately 6Apeak while also providing voltage clamping,
though not through internal clamping diodes. The clamping
effect is quite the same, however, the output transistors are
designed to work alternately by sinking large current spikes.
SPiKe Protection: The LM3876 is protected from instantaneous peak-temperature stressing by the power transistor
array. The Safe Operating Area graph in the Typical Performance Characteristics section shows the area of device operation where the SPiKe Protection Circuitry is not
enabled. The waveform to the right of the SOA graph exemplifies how the dynamic protection will cause waveform distortion when enabled.
Thermal Protection: The LM3876 has a sophisticated thermal protection scheme to prevent long-term thermal stress
to the device. When the temperature on the die reaches
165§ C, the LM3876 shuts down. It starts operating again
when the die temperature drops to about 155§ C, but if the
temperature again begins to rise, shutdown will occur again
at 165§ C. Therefore the device is allowed to heat up to a
relatively high temperature if the fault condition is temporary, but a sustained fault will cause the device to cycle in a
Schmitt Trigger fashion between the thermal shutdown temperature limits of 165§ C and 155§ C. This greatly reduces the
stress imposed on the IC by thermal cycling, which in turn
improves its reliability under sustained fault conditions.
Since the die temperature is directly dependent upon the
heat sink, the heat sink should be chosen as discussed in
the Thermal Considerations section, such that thermal
shutdown will not be reached during normal operation. Us-
10
Application Information (Continued)
sink can be calculated. This calculation is made using equation (4) and is based on the fact that thermal heat flow parameters are analogous to electrical current flow properties.
A thermal grease such as Wakefield type 120 or Thermalloy
Thermacote should be used when mounting the package to
the heat sink. Without this compound, thermal resistance
will be no better than 0.5§ C/W, and probably much worse.
With the compound, thermal resistance will be 0.2§ C/W or
less, assuming under 0.005 inch combined flatness runout
for the package and heat sink. Proper torquing of the
mounting bolts is important and can be determined from
heat sink manufacturer’s specification sheets.
Should it be necessary to isolate Vb from the heat sink, an
insulating washer is required. Hard washers like beryluum
oxide, anodized aluminum and mica require the use of thermal compound on both faces. Two-mil mica washers are
most common, giving about 0.4§ C/W interface resistance
with the compound.
Silicone-rubber washers are also available. A 0.5§ C/W thermal resistance is claimed without thermal compound. Experience has shown that these rubber washers deteriorate and
must be replaced should the IC be dismounted.
Determining Maximum Power Dissipation
Power dissipation within the integrated circuit package is a
very important parameter requiring a thorough understanding if optimum power output is to be obtained. An incorrect
maximum power dissipation (PD) calculation may result in
inadequate heat sinking, causing thermal shutdown circuitry
to operate and limit the output power.
The following equations can be used to acccurately calculate the maximum and average integrated circuit power dissipation for your amplifier design, given the supply voltage,
rated load, and output power. These equations can be directly applied to the Power Dissipation vs Output Power
curves in the Typical Performance Characteristics section.
Equation (1) exemplifies the maximum power dissipation of
the IC and equations (2) and (3) exemplify the average IC
power dissipation expressed in different forms.
PDMAX e VCC2/2q2RL
(1)
It is also known that typically the thermal resistance, iJC
(junction to case), of the LM3876 is 1§ C/W and that using
Thermalloy Thermacote thermal compound provides a thermal resistance, iCS (case to heat sink), of about 0.2§ C/W
as explained in the Heat Sinking section.
Referring to the figure below, it is seen that the thermal
resistance from the die (junction) to the outside air (ambient)
is a combination of three thermal resistances, two of which
are known, iJC and iCS. Since convection heat flow (power
dissipation) is analogous to current flow, thermal resistance
is analogous to electrical resistance, and temperature drops
are analogous to voltage drops, the power dissipation out of
the LM3876 is equal to the following:
PDMAX e (TJmax b TAmb)/iJA
where iJA e iJC a iCS a iSA
TL/H/11832 – 12
But since we know PDMAX, iJC, and iSC for the application
and we are looking for iSA, we have the following:
iSA e [(TJmax b TAmb) b PDMAX (iJC a iCS)]/PDMAX (4)
Again it must be noted that the value of iSA is dependent
upon the system designer’s amplifier application and its corresponding parameters as described previously. If the ambient temperature that the audio amplifier is to be working
under is higher than the normal 25§ C, then the thermal resistance for the heat sink, given all other things are equal,
will need to be smaller.
Equations (1) and (4) are the only equations needed in the
determination of the maximum heat sink thermal resistance.
This is of course given that the system designer knows the
required supply voltages to drive his rated load at a particular power output level and the parameters provided by the
semiconductor manufacturer. These parameters are the
junction to case thermal resistance, iJC, TJmax e 150§ C,
and the recommended Thermalloy Thermacote thermal
compound resistance, iCS.
where VCC is the total supply voltage
(2)
PDAVE e (VOpk/RL)[VCC/q b VOpk/2]
where VCC is the total supply voltage and VOpk e VCC/q
PDAVE e VCC VOpk/qRL b VOpk2/2RL
(3)
where VCC is the total supply voltage.
Determining the Correct Heat Sink
Once the maximum IC power dissipation is known for a given supply voltage, rated load, and the desired rated output
power the maximum thermal resistance (in § C/W) of a heat
11
Typical signal-to-noise figures are listed for an A-weighted
filter which is commonly used in the measurement of noise.
The shape of all weighting filters is similar, with the peak of
the curve usually occurring in the 3 kHz – 7 kHz region as
shown below.
SIGNAL-TO-NOISE RATIO
In the measurement of the signal-to-noise ratio, misinterpretations of the numbers actually measured are common. One
amplifier may sound much quieter than another, but due to
improper testing techniques, they appear equal in measurements. This is often the case when comparing integrated
circuit designs to discrete amplifier designs. Discrete transistor amps often ‘‘run out of gain’’ at high frequencies and
therefore have small bandwidths to noise as indicated below.
TL/H/11832 – 14
SUPPLY BYPASSING
The LM3876 has excellent power supply rejection and does
not require a regulated supply. However, to eliminate possible oscillations all op amps and power op amps should have
their supply leads bypassed with low-inductance capacitors
having short leads and located close to the package terminals. Inadequate power supply bypassing will manifest itself
by a low frequency oscillation known as ‘‘motorboating’’ or
by high frequency instabilities. These instabilities can be
eliminated through multiple bypassing utilizing a large tantalum or electrolytic capacitor (10 mF or larger) which is used
to absorb low frequency variations and a small ceramic capacitor (0.1 mF) to prevent any high frequency feedback
through the power supply lines.
If adequate bypassing is not provided the current in the supply leads which is a rectified component of the load current
may be fed back into internal circuitry. This signal causes
low distortion at high frequencies requiring that the supplies
be bypassed at the package terminals with an electrolytic
capacitor of 470 mF or more.
TL/H/11832–13
Integrated circuits have additional open loop gain allowing
additional feedback loop gain in order to lower harmonic
distortion and improve frequency response. It is this additional bandwidth that can lead to erroneous signal-to-noise
measurements if not considered during the measurement
process. In the typical example above, the difference in
bandwidth appears small on a log scale but the factor of 10
in bandwidth, (200 kHz to 2 MHz) can result in a 10 dB
theoretical difference in the signal-to-noise ratio (white
noise is proportional to the square root of the bandwidth in a
system).
In comparing audio amplifiers it is necessary to measure the
magnitude of noise in the audible bandwidth by using a
‘‘weighting’’ filter.1 A ‘‘weighting’’ filter alters the frequency
response in order to compensate for the average human
ear’s sensitivity to the frequency spectra. The weighting filters at the same time provide the bandwidth limiting as discussed in the previous paragraph.
In addition to noise filtering, differing meter types give different noise readings. Meter responses include:
1. RMS reading,
2. average responding,
3. peak reading, and
4. quasi peak reading.
Although theoretical noise analysis is derived using true
RMS based calculations, most actual measurements are
taken with ARM (Average Responding Meter) test equipment.
Reference 1: CCIR/ARM: A Practical Noise Measurement
Method; by Ray Dolby, David Robinson and Kenneth Gundry, AES Preprint No. 1353 (F-3).
LEAD INDUCTANCE
Power op amps are sensitive to inductance in the output
lead, particularly with heavy capacitive loading. Feedback to
the input should be taken directly from the output terminal,
minimizing common inductance with the load.
Lead inductance can also cause voltage surges on the supplies. With long leads to the power supply, energy is stored
in the lead inductance when the output is shorted. This energy can be dumped back into the supply bypass capacitors
when the short is removed. The magnitude of this transient
is reduced by increasing the size of the bypass capacitor
near the IC. With at least a 20 mF local bypass, these voltage surges are important only if the lead length exceeds a
couple feet ( l 1 mH lead inductance). Twisting together the
supply and ground leads minimizes the effect.
12
The load current IL will be much larger than input bias current II, thus V1 will follow the output voltage directly, i.e. in
phase. Therefore the voltage appearing at the non-inverting
input is effectively positive feedback and the circuit may oscillate. If there were only one device to worry about then the
values of R1 and R2 would probably be small enough to be
ignored; however, several devices normally comprise a total
system. Any ground return of a separate device, whose output is in phase, can feedback in a similar manner and cause
instabilities. Out of phase ground loops also are troublesome, causing unexpected gain and phase errors.
The solution to most ground loop problems is to always use
a single-point ground system, although this is sometimes
impractical. The third figure below is an example of a singlepoint ground system.
The single-point ground concept should be applied rigorously to all components and all circuits when possible. Violations of single-point grounding are most common among
printed circuit board designs, since the circuit is surrounded
by large ground areas which invite the temptation to run a
device to the closest ground spot. As a final rule, make all
ground returns low resistance and low inductance by using
large wire and wide traces.
Occasionally, current in the output leads (which function as
antennas) can be coupled through the air to the amplifier
input, resulting in high-frequency oscillation. This normally
happens when the source impedance is high or the input
leads are long. The problem can be eliminated by placing a
small capacitor, CC, (on the order of 50 pF to 500 pF)
across the LM3876 input terminals. Refer to the External
Components Description section relating to component
interaction with Cf.
LAYOUT, GROUND LOOPS AND STABILITY
The LM3876 is designed to be stable when operated at a
closed-loop gain of 10 or greater, but as with any other highcurrent amplifier, the LM3876 can be made to oscillate under certain conditions. These usually involve printed circuit
board layout or output/input coupling.
When designing a layout, it is important to return the load
ground, the output compensation ground, and the low level
(feedback and input) grounds to the circuit board common
ground point through separate paths. Otherwise, large currents flowing along a ground conductor will generate voltages on the conductor which can effectively act as signals
at the input, resulting in high frequency oscillation or excessive distortion. It is advisable to keep the output compensation components and the 0.1 mF supply decoupling capacitors as close as possible to the LM3876 to reduce the effects of PCB trace resistance and inductance. For the same
reason, the ground return paths should be as short as possible.
In general, with fast, high-current circuitry, all sorts of problems can arise from improper grounding which again can be
avoided by returning all grounds separately to a common
point. Without isolating the ground signals and returning the
grounds to a common point, ground loops may occur.
‘‘Ground Loop’’ is the term used to describe situations occurring in ground systems where a difference in potential
exists between two ground points. Ideally a ground is a
ground, but unfortunately, in order for this to be true, ground
conductors with zero resistance are necessary. Since real
world ground leads possess finite resistance, currents running through them will cause finite voltage drops to exist. If
two ground return lines tie into the same path at different
points there will be a voltage drop between them. The first
figure below shows a common ground example where the
positive input ground and the load ground are returned to
the supply ground point via the same wire. The addition of
the finite wire resistance, R2, results in a voltage difference
between the two points as shown below.
REACTIVE LOADING
It is hard for most power amplifiers to drive highly capacitive
loads very effectively and normally results in oscillations or
ringing on the square wave response. If the output of the
LM3876 is connected directly to a capacitor with no series
resistance, the square wave response will exhibit ringing if
the capacitance is greater than about 0.2 mF. If highly capacitive loads are expected due to long speaker cables, a
method commonly employed to protect amplifiers from low
impedances at high frequencies is to couple to the load
through a 10X resistor in parallel with a 0.7 mH inductor.
The inductor-resistor combination as shown in the Typical
Application Circuit isolates the feedback amplifier from the
load by providing high output impedance at high frequencies
thus allowing the 10X resistor to decouple the capacitive
load and reduce the Q of the series resonant circuit. The LR
combination also provides low output impedance at low frequencies thus shorting out the 10X resistor and allowing the
amplifier to drive the series RC load (large capacitive load
due to long speaker cables) directly.
TL/H/11832 – 15
13
GENERALIZED AUDIO POWER AMPLIFIER DESIGN
DESIGN A 40W/8X AUDIO AMPLIFIER
The system designer usually knows some of the following
parameters when starting an audio amplifier design:
Desired Power Output
Input Level
Input Impedance
Load Impedance
Maximum Supply Voltage
Bandwidth
The power output and load impedance determine the power
supply requirements, however, depending upon the application some system designers may be limited to certain maximum supply voltages. If the designer does have a power
supply limitation, he should choose a practical load impedance which would allow the amplifier to provide the desired
output power, keeping in mind the current limiting capabilities of the device. In any case, the output signal swing and
current are found from (where PO is the average output
power):
Vopeak e 02 RL PO
(1)
Given:
Power Output
Load Impedance
Input Level
Input Impedance
Bandwidth
40W
8X
1V(max)
100 kX
20 Hz – 20 kHz g 0.25 dB
Equations (1) and (2) give:
Iopeak e 3.16A
40W/8X
Vopeak e 25.3V
Therefore the supply required is: g 30.3V @ 3.16A
With 15% regulation and high line the final supply voltage is
g 38.3V using equation (3). At this point it is a good idea to
check the Power Output vs Supply Voltage to ensure that
the required output power is obtainable from the device
while maintaining low THD a N. It is also good to check the
Power Dissipation vs Supply Voltage to ensure that the device can handle the internal power dissipation. At the same
time designing in a relatively practical sized heat sink with a
low thermal resistance is also important. Refer to Typical
Performance Characteristics graphs and the Thermal
Considerations section for more information.
The minimum gain from equation (4) is:
AV t 18
(2)
Iopeak e 0(2 PO)/RL
To determine the maximum supply voltage the following parameters must be considered. Add the dropout voltage (5V
for LM3876) to the peak output swing, Vopeak, to get the
supply rail value (i.e. g (Vopeak a Vod) at a current of
Iopeak). The regulation of the supply determines the unloaded voltage, usually about 15% higher. Supply voltage will
also rise 10% during high line conditions. Therefore, the
maximum supply voltage is obtained from the following
equation:
Max. supplies & g (Vopeak a Vod)(1 a regulation)(1.1) (3)
We select a gain of 21 (Non-Inverting Amplifier); resulting in
a sensitivity of 894 mV.
Letting RIN equal 100 kX gives the required input impedance, however, this would eliminate the ‘‘volume control’’
unless an additional input impedance was placed in series
with the 10 kX potentiometer that is depicted in Figure 1 .
Adding the additional 100 kX resistor would ensure the minumum required input impedance.
For low DC offsets at the output we let Rf1 e 100 kX.
Solving for Ri (Non-Inverting Amplifier) gives the following:
Ri e Rf1/(AV b 1) e 100k/(21 b 1) e 5 kX; use 5.1 kX
The input sensitivity and the output power specs determine
the minimum required gain as depicted below:
AV t(0PO RL )/(VIN) e Vorms/Vinrms
(4)
Normally the gain is set between 20 and 200; for a 40W, 8X
audio amplifier this results in a sensitivity of 894 mV and
89 mV, respectively. Although higher gain amplifiers provide
greater output power and dynamic headroom capabilities,
there are certain shortcomings that go along with the so
called ‘‘gain.’’ The input referred noise floor is increased
and hence the SNR is worse. With the increase in gain,
there is also a reduction of the power bandwidth which results in a decrease in feedback thus not allowing the amplifier to respond quickly enough to nonlinearities. This decreased ability to respond to nonlinearities increases the
THD a N specification.
The desired input impedance is set by RIN. Very high values
can cause board layout problems and DC offsets at the output. The value for the feedback resistance, Rf1, should be
chosen to be a relatively large value (10 kX –100 kX), and
the other feedback resistance, Ri, is calculated using standard op amp configuration gain equations. Most audio amplifiers are designed from the non-inverting amplifier configuration.
The bandwidth requirement must be stated as a pole, i.e.,
the 3 dB frequency. Five times away from a pole gives
0.17 dB down, which is better than the required 0.25 dB.
Therefore:
fL e 20 Hz/5 e 4 Hz
fH e 20 kHz c 5 e 100 kHz
At this point, it is a good idea to ensure that the Gain-Bandwidth Product for the part will provide the designed gain out
to the upper 3 dB point of 100 kHz. This is why the minimum
GBWP of the LM3876 is important.
GBWP t AV c f3 dB e 21 c 100 kHz e 2.1 MHz
GBWP e 2.0 MHz (min) for the LM3876
Solving for the low frequency roll-off capacitor, Ci, we have:
Ci t 1/(2q Ri fL) e 7.8 mF; use 10 mF.
14
Definition of Terms
Headroom: The margin between an actual signal operating
level (usually the power rating of the amplifier with particular
supply voltages, a rated load value, and a rated THD a N
figure) and the level just before clipping distortion occurs,
expressed in decibels.
Large Signal Voltage Gain: The ratio of the output voltage
swing to the differential input voltage required to drive the
output from zero to either swing limit. The output swing limit
is the supply voltage less a specified quasi-saturation voltage. A pulse of short enough duration to minimize thermal
effects is used as a measurement signal.
Output-Current Limit: The output current with a fixed output voltage and a large input overdrive. The limiting current
drops with time once SPiKe protection circuitry is activated.
Output Saturation Threshold (Clipping Point): The output
swing limit for a specified input drive beyond that required
for zero output. It is measured with respect to the supply to
which the output is swinging.
Output Resistance: The ratio of the change in output voltage to the change in output current with the output around
zero.
Power Dissipation Rating: The power that can be dissipated for a specified time interval without activating the protection circuitry. For time intervals in excess of 100 ms, dissipation capability is determined by heat sinking of the IC package rather than by the IC itself.
Thermal Resistance: The peak, junction-temperature rise,
per unit of internal power dissipation (units in § C/W), above
the case temperature as measured at the center of the
package bottom.
The DC thermal resistance applies when one output transistor is operating continuously. The AC thermal resistance applies with the output transistors conducting alternately at a
high enough frequency that the peak capability of neither
transistor is exceeded.
Power Bandwidth: The power bandwidth of an audio amplifier is the frequency range over which the amplifier voltage gain does not fall below 0.707 of the flat band voltage
gain specified for a given load and output power.
Power bandwidth also can be measured by the frequencies
at which a specified level of distortion is obtained while the
amplifier delivers a power output 3 dB below the rated output. For example, an amplifier rated at 60W with s 0.25%
THD a N, would make its power bandwidth measured as
the difference between the upper and lower frequencies at
which 0.25% distortion was obtained while the amplifier was
delivering 30W.
Gain-Bandwidth Product: The Gain-Bandwidth Product is
a way of predicting the high-frequency usefulness of an op
amp. The Gain-Bandwidth Product is sometimes called the
unity-gain frequency or unity-gain cross frequency because
the open-loop gain characteristic passes through or crosses
unity gain at this frequency. Simply, we have the following
relationship: ACL1 c f1 e ACL2 c f2
Assuming that at unity-gain (ACL1 e 1 or (0 dB)) fu e fi e
GBWP, then we have the following: GBWP e ACL2 c f2
This says that once fu (GBWP) is known for an amplifier,
then the open-loop gain can be found at any frequency. This
is also an excellent equation to determine the 3 dB point of
a closed-loop gain, assuming that you know the GBWP of
the device. Refer to the diagram on the following page.
Input Offset Voltage: The absolute value of the voltage
which must be applied between the input terminals through
two equal resistances to obtain zero output voltage and current.
Input Bias Current: The absolute value of the average of
the two input currents with the output voltage and current at
zero.
Input Offset Current: The absolute value of the difference
in the two input currents with the output voltage and current
at zero.
Input Common-Mode Voltage Range (or Input Voltage
Range): The range of voltages on the input terminals for
which the amplifier is operational. Note that the specifications are not guaranteed over the full common-mode voltage range unless specifically stated.
Common-Mode Rejection: The ratio of the input commonmode voltage range to the peak-to-peak change in input
offset voltage over this range.
Power Supply Rejection: The ratio of the change in input
offset voltage to the change in power supply voltages producing it.
Quiescent Supply Current: The current required from the
power supply to operate the amplifier with no load and the
output voltage and current at zero.
Slew Rate: The internally limited rate of change in output
voltage with a large amplitude step function applied to the
input.
Class B Amplifier: The most common type of audio power
amplifier that consists of two output devices each of which
conducts for 180§ of the input cycle. The LM3876 is a
Quasi-AB type amplifier.
Crossover Distortion: Distortion caused in the output
stage of a class B amplifier. It can result from inadequate
bias current providing a dead zone where the output does
not respond to the input as the input cycle goes through its
zero crossing point. Also for ICs an inadequate frequency
response of the output PNP device can cause a turn-on
delay giving crossover distortion on the negative going transition through zero crossing at the higher audio frequencies.
THD a N: Total Harmonic Distortion plus Noise refers to
the measurement technique in which the fundamental component is removed by a bandreject (notch) filter and all remaining energy is measured including harmonics and noise.
Signal-to-Noise Ratio: The ratio of a system’s output signal
level to the system’s output noise level obtained in the absence of a signal. The output reference signal is either
specified or measured at a specified distortion level.
Continuous Average Output Power: The minimum sine
wave continuous average power output in watts (or dBW)
that can be delivered into the rated load, over the rated
bandwidth, at the rated maximum total harmonic distortion.
Music Power: A measurement of the peak output power
capability of an amplifier with either a signal duration sufficiently short that the amplifier power supply does not sag
during the measurement, or when high quality external power supplies are used. This measurement (an IHF standard)
assumes that with normal music program material the amplifier power supplies will sag insignificantly.
Peak Power: Most commonly referred to as the power output capability of an amplifier that can be delivered to the
load; specified by the part’s maximum voltage swing.
15
Definition of Terms (Continued)
This refers to a weighted noise measurement for a Dolby B
type noise reduction system. A filter characteristic is used
that gives a closer correlation of the measurement with the
subjective annoyance of noise to the ear. Measurements
made with this filter cannot necessarily be related to unweighted noise measurements by some fixed conversion
factor since the answers obtained will depend on the spectrum of the noise source.
S.P.L.: Sound Pressure LevelÐusually measured with a microphone/meter combination calibrated to a pressure level
of 0.0002 mBars (approximately the threshold hearing level).
S.P.L. e 20 Log 10P/0.0002 dB
Biamplification: The technique of splitting the audio frequency spectrum into two sections and using individual
power amplifiers to drive a separate woofer and tweeter.
Crossover frequencies for the amplifiers usually vary between 500 Hz and 1600 Hz. ‘‘Biamping’’ has the advantages of allowing smaller power amps to produce a given
sound pressure level and reducing distortion effects prodused by overdrive in one part of the frequency spectrum
affecting the other part.
C.C.I.R./A.R.M.:
Literally: International Radio Consultative Committee
Average Responding Meter
where P is the R.M.S. sound pressure in microbars.
(1 Bar e 1 atmosphere e 14.5 lb/in2 e 194 dB S.P.L.).
TL/H/11832 – 16
16
Physical Dimensions inches (millimeters)
Order Number LM3876T
NS Package Number TA11B
17
LM3876 Overture Audio Power Amplifier Series
Physical Dimensions inches (millimeters) (Continued)
Order Number LM3876TF
NS Package Number TF11B
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Page 610
a
FEATURES
Low Noise: 0.2 mV p-p 0.1 Hz to 10 Hz
Low Gain TC: 5 ppm max (G = 1)
Low Nonlinearity: 0.001% max (G = 1 to 200)
High CMRR: 130 dB min (G = 500 to 1000)
Low Input Offset Voltage: 25 mV, max
Low Input Offset Voltage Drift: 0.25 mV/8C max
Gain Bandwidth Product: 25 MHz
Pin Programmable Gains of 1, 100, 200, 500, 1000
No External Components Required
Internally Compensated
Precision
Instrumentation Amplifier
AD624
CONNECTION DIAGRAM
–INPUT
1
16 RG1
+INPUT
2
15 OUTPUT NULL
RG2
3
INPUT NULL
4
INPUT NULL
5
14 OUTPUT NULL
AD624
13 G = 100
REF
6
TOP VIEW
12 G = 200
(Not to Scale)
11 G = 500
–VS
7
10 SENSE
+VS
8
9
SHORT TO
RG2 FOR
DESIRED
GAIN
OUTPUT
FOR GAINS OF 1000 SHORT RG1 TO PIN 12
AND PINS 11 AND 13 TO RG2
PRODUCT DESCRIPTION
PRODUCT HIGHLIGHTS
The AD624 is a high precision, low noise, instrumentation
amplifier designed primarily for use with low level transducers,
including load cells, strain gauges and pressure transducers. An
outstanding combination of low noise, high gain accuracy, low
gain temperature coefficient and high linearity make the AD624
ideal for use in high resolution data acquisition systems.
1. The AD624 offers outstanding noise performance. Input
noise is typically less than 4 nV/√Hz at 1 kHz.
The AD624C has an input offset voltage drift of less than
0.25 µV/°C, output offset voltage drift of less than 10 µV/°C,
CMRR above 80 dB at unity gain (130 dB at G = 500) and a
maximum nonlinearity of 0.001% at G = 1. In addition to these
outstanding dc specifications, the AD624 exhibits superior ac
performance as well. A 25 MHz gain bandwidth product, 5 V/µs
slew rate and 15 µs settling time permit the use of the AD624 in
high speed data acquisition applications.
3. The offset voltage, offset voltage drift, gain accuracy and gain
temperature coefficients are guaranteed for all pretrimmed
gains.
The AD624 does not need any external components for pretrimmed gains of 1, 100, 200, 500 and 1000. Additional gains
such as 250 and 333 can be programmed within one percent
accuracy with external jumpers. A single external resistor can
also be used to set the 624’s gain to any value in the range of 1
to 10,000.
5. A sense terminal is provided to enable the user to minimize
the errors induced through long leads. A reference terminal is
also provided to permit level shifting at the output.
2. The AD624 is a functionally complete instrumentation amplifier. Pin programmable gains of 1, 100, 200, 500 and 1000
are provided on the chip. Other gains are achieved through
the use of a single external resistor.
4. The AD624 provides totally independent input and output
offset nulling terminals for high precision applications.
This minimizes the effect of offset voltage in gain ranging
applications.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1996
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
AD624–SPECIFICATIONS (@ V = 615 V, R = 2 kV and T = +258C, unless otherwise noted)
S
Model
Min
AD624A
Typ
Max
L
Min
A
AD624B
Typ
Max
Min
AD624C
Typ
Max
Min
AD624S
Typ
Max
Units
GAIN
Gain Equation
(External Resistor Gain
 40, 000
 R
 G
Programming)
Gain Range (Pin Programmable)
Gain Error
G=1
G = 100
G = 200, 500
Nonlinearity
G=1
G = 100, 200
G = 500
Gain vs. Temperature
G=1
G = 100, 200
G = 500
INPUT
Input Impedance
Differential Resistance
Differential Capacitance
Common-Mode Resistance
Common-Mode Capacitance
Input Voltage Range1
Max Differ. Input Linear (VDL)
109
10
109
10
± 20
± 10
12 V −
8
± 10

 40, 000
 R
 G
+ 1 ± 20%

1 to 1000

+ 1 ± 20%

1 to 1000
± 0.05
± 0.25
± 0.5
± 0.03
± 0.15
± 0.35
± 0.02
± 0.1
± 0.25
± 0.05
± 0.25
± 0.5
%
%
%
± 0.005
± 0.005
± 0.005
± 0.003
± 0.003
± 0.005
± 0.001
± 0.001
± 0.005
± 0.005
± 0.005
± 0.005
%
%
%
5
10
25
5
10
15
5
10
15
5
10
15
ppm/°C
ppm/°C
ppm/°C
200
2
5
50
75
0.5
3
25
25
0.25
2
10
75
2.0
3
50
µV
µV/°C
mV
µV/°C
± 50
80
110
115
± 50
± 35
± 20
± 25
× VD



± 10
12 V −
G
2

75
105
110
± 50
± 15
± 20
109
10
109
10
70
100
110
NOISE
Voltage Noise, 1 kHz
R.T.I.
R.T.O.
R.T.I., 0.1 Hz to 10 Hz
G=1
G = 100
G = 200, 500, 1000
Current Noise
0.1 Hz to 10 Hz
SENSE INPUT
RIN
IIN
Voltage Range
Gain to Output
G
2

 40, 000
 R
 G

75
105
110
± 50
DYNAMIC RESPONSE
Small Signal –3 dB
G=1
G = 100
G = 200
G = 500
G = 1000
Slew Rate
Settling Time to 0.01%, 20 V Step
G = 1 to 200
G = 500
G = 1000

+ 1 ± 20%
1 to 1000
INPUT CURRENT
Input Bias Current
vs. Temperature
Input Offset Current
vs. Temperature
OUTPUT RATING
VOUT, RL = 2 kΩ
 40, 000
 R
 G

1 to 1000
VOLTAGE OFFSET (May be Nulled)
vs. Temperature
Output Offset Voltage
vs. Temperature
Offset Referred to the Input vs. Supply
G=1
70
G = 100, 200
95
G = 500
100
Max Common-Mode Linear (VCM)
Common-Mode Rejection dc
to 60 Hz with 1 kΩ Source Imbalance
G=1
G = 100, 200
G = 500

+ 1 ± 20%
± 15
± 50
± 10
± 20
109
10
109
10
× VD
75
105
120



± 10
12 V −
G
2

dB
dB
dB
± 50
± 35
Ω
pF
Ω
pF
109
10
109
10
× VD
80
110
130



± 10
12 V −
G
2

nA
pA/°C
nA
pA/°C
× VD
70
100
110



V
V
dB
dB
dB
± 10
± 10
± 10
± 10
V
1
150
100
50
25
5.0
1
150
100
50
25
5.0
1
150
100
50
25
5.0
1
150
100
50
25
5.0
MHz
kHz
kHz
kHz
kHz
V/µs
15
35
75
15
35
75
15
35
75
15
35
75
µs
µs
µs
4
75
4
75
4
75
4
75
nV/√Hz
nV/√Hz
10
0.3
0.2
10
0.3
0.2
10
0.3
0.2
10
0.3
0.2
µV p-p
µV p-p
µV p-p
60
60
60
60
pA p-p
10
30
1
12
8
± 10
10
30
1
–2–
12
8
± 10
10
30
1
12
8
± 10
10
30
1
12
kΩ
µA
V
%
REV. B
AD624
Model
Min
REFERENCE INPUT
RIN
IIN
Voltage Range
Gain to Output
AD624A
Typ
16
20
30
± 10
Max
Min
24
16
AD624B
Typ
± 10
1
TEMPERATURE RANGE
Specified Performance
Storage
POWER SUPPLY
Power Supply range
Quiescent Current
–25
–65
66
615
3.5
20
30
Max
Min
24
16
AD624C
Typ
20
30
± 10
1
+85
+150
–25
–65
618
66
5
Max
Min
24
16
± 10
1
615
3.5
+85
+150
–25
–65
618
66
615
3.5
5
AD624S
Typ
20
30
Max
Units
24
kΩ
µA
V
%
+125
+150
°C
°C
± 18
5
V
mA
1
+85
+150
–55
–65
618
±6
5
± 15
3.5
NOTES
VDL is the maximum differential input voltage at G = 1 for specified nonlinearity, V DL at other gains = 10 V/G. V D = actual differential input voltage.
1
Example: G = 10, V D = 0.50. VCM = 12 V – (10/2 × 0.50 V) = 9.5 V.
Specifications subject to change without notice.
Specifications shown in boldface are tested on all production unit at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min
and max specifications are guaranteed, although only those shown in boldface are tested on all production units.
1
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . . 420 mW
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . ± VS
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
AD624A/B/C . . . . . . . . . . . . . . . . . . . . . . . –25°C to +85°C
AD624S . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Lead Temperature (Soldering, 60 secs) . . . . . . . . . . . . +300°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
FUNCTIONAL BLOCK DIAGRAM
ORDERING GUIDE
Model
Temperature
Range
Package
Description
Package
Option
AD624AD
AD624BD
AD624CD
AD624SD
AD624SD/883B*
AD624SChips
–25°C to +85°C
–25°C to +85°C
–25°C to +85°C
–55°C to +125°C
–55°C to +125°C
–25°C to +85°C
16-Pin Ceramic DIP
16-Pin Ceramic DIP
16-Pin Ceramic DIP
16-Pin Ceramic DIP
16-Pin Ceramic DIP
Die
D-16
D-16
D-16
D-16
D-16
50Ω
–INPUT 1
AD624
G = 100 13
225.3Ω
G = 200 12
4445.7Ω
VB
124Ω
10kΩ
10 SENSE
G = 500 11
80.2Ω
20kΩ
10kΩ
20kΩ
10kΩ
RG1 16
*See Analog Devices’ military data sheet for 883B specifications.
9 OUTPUT
RG2 3
50Ω
METALIZATION PHOTOGRAPH
+INPUT
2
6 REF
Contact factory for latest dimensions
Dimensions shown in inches and (mm).
10kΩ
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
REV. B
–3–
AD624–Typical Characteristics
25 °C
10
5
15
10
5
0
10
5
15
SUPPLY VOLTAGE – ±V
Figure 1. Input Voltage Range vs.
Supply Voltage, G = 1
BASIC CURRENT – ±nA
4.0
2.0
10
40
14
30
12
20
8
6
4
10
0
–10
–20
–40
0
5
10
15
20
0
5
10
15
–75
20
POWER SUPPLY VOLTAGE – ±V
40
14
0
30
1
20
10
8
6
4
3
4
5
5
10
15
INPUT VOLTAGE – ±V
20
G = 100
–100
G=1
–80
–60
–40
–20
1
10
2.0 3.0 4.0 5.0 6.0 7.0
WARM-UP TIME – MINUTES
100
1k
10k 100k
FREQUENCY – Hz
1M
10M
Figure 10. CMRR vs. Frequency RTI,
Zero to 1k Source Imbalance
0
–10
–20
8.0
–75
125
160
20
G = 1, 100
G = 500
10
G = 100
G = 1000
BANDWIDTH LIMITED
0
–25
25
75
TEMPERATURE – °C
Figure 9. Gain vs. Frequency
30
FULL-POWER RESSONSE – V p-p
–120
1.0
Figure 8. Offset Voltage, RTI, Turn
On Drift
G = 500
10
–40
0
–140
125
–30
7
0
Figure 7. Input Bias Current vs. CMV
0
2
6
2
0
INPUT CURRENT – nA
–1
∆Vos FROM FINAL VALUE – µV
16
12
–25
25
75
TEMPERATURE – °C
Figure 6. Input Bias Current vs.
Temperature
Figure 5. Input Bias Current vs.
Supply Voltage
Figure 4. Quiescent Current vs.
Supply Voltage
10k
–30
2
0
100
1k
LOAD RESISTANCE – Ω
Figure 3. Output Voltage Swing vs.
Load Resistance
16
10
0
10
20
POWER SUPPLY REJECTION – dB
AMPLIFIER QUIESCENT CURRENT – mA
6.0
10
5
15
Figure 2. Output Voltage Swing vs.
Supply Voltage
8.0
20
0
0
20
INPUT CURRENT – nA
0
INPUT BIAS CURRENT – ±nA
OUTPUT VOLTAGE SWING – V p-p
15
0
CMRR – dB
30
20
INPUT VOLTAGE RANGE – ±V
INPUT VOLTAGE RANGE – ±V
20
0
0
0
FREQUENCY – Hz
0
Figure 11. Large Signal Frequency
Response
–4–
140
–V S = –15V dc+
1V P/P SINEWAVE
G = 500
120
100
80
G = 100
60
G=1
40
20
0
10
100
1k
FREQUENCY – Hz
10k
100k
Figure 12. Positive PSRR vs.
Frequency
REV. B
–V S = –15V dc+
1V P/P SINEWAVE
120
Hz
G = 500
100
VOLT NSD – nV/
POWER SUPPLY REJECTION – dB
CURRENT NOISE SPECTRAL DENSITY – fA/
1000
160
140
Hz
AD624
80
G = 100
60
G=1
40
100
G=1
G = 10
10
G = 100, 1000
G = 1000
1
20
0.1
0
10
100
1k
FREQUENCY – Hz
10k
100k
Figure 13. Negative PSRR vs.
Frequency
5mV
1
10
100
1k
10k
FREQUENCY – Hz
100k
100k
10k
1000
100
10
0.1
Figure 14. RTI Noise Spectral
Density vs. Gain
1S
10mV
100
100
90
90
1
10
100
10k
FREQUENCY – Hz
100k
Figure 15. Input Current Noise
1S
–12 TO 12
1%
0.1%
0.01%
1%
0.1%
0.01%
–8 TO 8
–4 TO 4
OUTPUT
STEP –V
4 TO –4
10
10
0%
8 TO –8
0%
20mV
Figure 16. Low Frequency Voltage
Noise, G = 1 (System Gain = 1000)
1mV
20mV
20mV
10V
10µS
100
20mV
12 TO –12
Figure 17. Low Frequency Voltage
Noise, G = 1000 (System Gain =
100,000)
0
1%
0.1%
0.01%
10V
10µS
100
–8 TO 8
90
10
15
SETTLING TIME – µs
Figure 18. Settling Time, Gain = 1
1mV
–12 TO 12
5
90
–4 TO 4
OUTPUT
STEP –V
4 TO –4
10
10
0%
8 TO –8
0%
1%
12 TO –12
0
Figure 19. Large Signal Pulse
Response and Settling Time, G = 1
1mV
10V
20µS
100
0.01%
0.1%
5
10
15
Response and Settling Time,
G = 100
20
Figure 20. Settling Time Gain = 100
–12 TO 12
1%
5mV
0.1%
0.01%
10V
20µS
100
–8 TO 8
90
90
–4 TO 4
OUTPUT
STEP –V
4 TO –4
10
10
0%
8 TO –8
0%
1%
12 TO –12
0
Figure 22. Range Signal Pulse
G = 500
REV. B
0.1%
0.01%
5
10
15
20
Figure 23. Settling Time Gain = 1000
–5–
G = 1000
20
AD624
10kΩ
1%
INPUT
20V p-p
10kΩ
1%
VOUT
+VS
100kΩ
1%
RG1
G = 100
G = 200
1kΩ
0.1%
1kΩ
10T
500Ω
0.1%
G = 500
200Ω
0.1%
RG2
1
8
16
10
13
AD624
12
9
11
6
3
7
2
–VS
Figure 25. Settling Time Test Circuit
THEORY OF OPERATION
The AD624 is a monolithic instrumentation amplifier based on
a modification of the classic three-op-amp instrumentation amplifier. Monolithic construction and laser-wafer-trimming allow
the tight matching and tracking of circuit components and the
high level of performance that this circuit architecture is capable of.
A preamp section (Q1–Q4) develops the programmed gain by
the use of feedback concepts. Feedback from the outputs of A1
and A2 forces the collector currents of Q1–Q4 to be constant
thereby impressing the input voltage across RG.
The gain is set by choosing the value of RG from the equation,
40 k
+ 1. The value of RG also sets the transconGain =
RG
ductance of the input preamp stage increasing it asymptotically
to the transconductance of the input transistors as RG is reduced
for larger gains. This has three important advantages. First, this
approach allows the circuit to achieve a very high open loop gain
of 3 × 108 at a programmed gain of 1000 thus reducing gain
related errors to a negligible 3 ppm. Second, the gain bandwidth
product which is determined by C3 or C4 and the input
transconductance, reaches 25 MHz. Third, the input voltage
noise reduces to a value determined by the collector current of
the input transistors for an RTI noise of 4 nV/√Hz at G ≥ 500.
external protection resistors can be put in series with the inputs
of the AD624 to augment the internal (50 Ω) protection resistors. This will most seriously degrade the noise performance.
For this reason the value of these resistors should be chosen to
be as low as possible and still provide 10 mA of current limiting
under maximum continuous overload conditions. In selecting
the value of these resistors, the internal gain setting resistor and
the 1.2 volt drop need to be considered. For example, to protect the device from a continuous differential overload of 20 V
at a gain of 100, 1.9 kΩ of resistance is required. The internal
gain resistor is 404 Ω; the internal protect resistor is 100 Ω.
There is a 1.2 V drop across D1 or D2 and the base-emitter
junction of either Q1 and Q3 or Q2 and Q4 as shown in Figure
27, 1400 Ω of external resistance would be required (700 Ω in
series with each input). The RTI noise in this case would be
4 KTRext +(4 nV / Hz )2 = 6.2 nV / Hz
+V S
I1
50µA
I2
50µA
VB
R52
10k
SENSE
A1
A2
C4
C3
R53
10k
A3
+V S
R57
20k
50
Q1, Q3
1
–IN
8
100
200
500
11
RG 2
3
2
16.2k
AD624
9
3
6
1µF
2
7
–V S
RG2
G500
8
1/2
AD712
1
5
9.09k
G1, 100, 200
100Ω
13
50µA
1µF
6
1/2
AD712
R55
10k
+IN
100
–V S
1.62M
50
200
225.3
16.2k
1µF
1k
REF
I4
50µA
500
124
4445
7
4
VO
R54
10k
80.2
10
13
12
RG1
+V S
16
R56 Q2, Q4
20k
–V S
1.82k
Figure 27. Simplified Circuit of Amplifier; Gain Is Defined
as (R56 + R57)/(RG) + 1. For a Gain of 1, RG Is an Open
Circuit.
Figure 26. Noise Test Circuit
INPUT OFFSET AND OUTPUT OFFSET
INPUT CONSIDERATIONS
Under input overload conditions the user will see RG + 100 Ω
and two diode drops (~1.2 V) between the plus and minus
inputs, in either direction. If safe overload current under all conditions is assumed to be 10 mA, the maximum overload voltage
is ~ ± 2.5 V. While the AD624 can withstand this continuously,
momentary overloads of ± 10 V will not harm the device. On the
other hand the inputs should never exceed the supply voltage.
Voltage offset specifications are often considered a figure of
merit for instrumentation amplifiers. While initial offset may be
adjusted to zero, shifts in offset voltage due to temperature
variations will cause errors. Intelligent systems can often correct
for this factor with an auto-zero cycle, but there are many
small-signal high-gain applications that don’t have this
capability.
Voltage offset and offset drift each have two components; input
and output. Input offset is that component of offset that is
The AD524 should be considered in applications that require
protection from severe input overload. If this is not possible,
–6–
REV. B
AD624
directly proportional to gain i.e., input offset as measured at
the output at G = 100 is 100 times greater than at G = 1. Output offset is independent of gain. At low gains, output offset
drift is dominant, while at high gains input offset drift dominates. Therefore, the output offset voltage drift is normally
specified as drift at G = 1 (where input effects are insignificant),
while input offset voltage drift is given by drift specification at a
high gain (where output offset effects are negligible). All
input-related numbers are referred to the input (RTI) which is
to say that the effect on the output is “G” times larger. Voltage
offset vs. power supply is also specified at one or more gain settings and is also RTI.
By separating these errors, one can evaluate the total error independent of the gain setting used. In a given gain configuration both errors can be combined to give a total error referred to
the input (R.T.I.) or output (R.T.O.) by the following formula:
Total Error R.T.I. = input error + (output error/gain)
Total Error R.T.O. = (Gain × input error) + output error
As an illustration, a typical AD624 might have a +250 µV output offset and a –50 µV input offset. In a unity gain configuration, the total output offset would be 200 µV or the sum of the
two. At a gain of 100, the output offset would be –4.75 mV
or: +250 µV + 100 (–50 µV) = –4.75 mV.
The AD624 provides for both input and output offset adjustment. This optimizes nulling in very high precision applications
and minimizes offset voltage effects in switched gain applications. In such applications the input offset is adjusted first at the
highest programmed gain, then the output offset is adjusted at
G = 1.
Table I.
Gain
(Nominal)
Temperature
Coefficient
(Nominal)
Pin 3
to Pin
Connect Pins
1
100
125
137
186.5
200
250
333
375
500
624
688
831
1000
–0 ppm/C
–1.5 ppm/°C
–5 ppm/°C
–5.5 ppm/°C
–6.5 ppm/°C
–3.5 ppm/°C
–5.5 ppm/°C
–15 ppm/°C
–0.5 ppm/°C
–10 ppm/°C
–5 ppm/°C
–1.5 ppm/°C
+4 ppm/°C
0 ppm/°C
–
13
13
13
13
12
12
12
12
11
11
11
11
11
–
–
11 to 16
11 to 12
11 to 12 to 16
–
11 to 13
11 to 16
13 to 16
–
13 to 16
11 to 12; 13 to 16
16 to 12
16 to 12; 13 to 11
Pins 3 and 16 programs the gain according to the formula
40k
RG =
(see Figure 29). For best results RG should be a
G −1
precision resistor with a low temperature coefficient. An external
RG affects both gain accuracy and gain drift due to the mismatch between it and the internal thin-film resistors R56 and
R57. Gain accuracy is determined by the tolerance of the external RG and the absolute accuracy of the internal resistors
(± 20%). Gain drift is determined by the mismatch of the temperature coefficient of RG and the temperature coefficient of the
internal resistors (–15 ppm/°C typ), and the temperature coefficient of the internal interconnections .
GAIN
The AD624 includes high accuracy pretrimmed internal
gain resistors. These allow for single connection programming
of gains of 1, 100, 200 and 500. Additionally, a variety of
gains including a pretrimmed gain of 1000 can be achieved
through series and parallel combinations of the internal
resistors. Table I shows the available gains and the appropriate
pin connections and gain temperature coefficients.
The gain values achieved via the combination of internal
resistors are extremely useful. The temperature coefficient of the
gain is dependent primarily on the mismatch of the temperature
coefficients of the various internal resistors. Tracking of these
resistors is extremely tight resulting in the low gain TCs shown
in Table I.
If the desired value of gain is not attainable using the internal resistors, a single external resistor can be used to achieve
any gain between 1 and 10,000. This resistor connected between
Figure 29. Operating Connections for G = 20
The AD624 may also be configured to provide gain in the output stage. Figure 30 shows an H pad attenuator connected to
the reference and sense lines of the AD624. The values of R1,
R2 and R3 should be selected to be as low as possible to minimize the gain variation and reduction of CMRR. Varying R2
will precisely set the gain without affecting CMRR. CMRR is
determined by the match of R1 and R3.
Figure 28. Operating Connections for G = 200
REV. B
Figure 30. Gain of 2500
–7–
AD624
NOISE
The AD624 is designed to provide noise performance near the
theoretical noise floor. This is an extremely important design
criteria as the front end noise of an instrumentation amplifier is
the ultimate limitation on the resolution of the data acquisition
system it is being used in. There are two sources of noise in an
instrument amplifier, the input noise, predominantly generated
by the differential input stage, and the output noise, generated
by the output amplifier. Both of these components are present
at the input (and output) of the instrumentation amplifier. At
the input, the input noise will appear unaltered; the output
noise will be attenuated by the closed loop gain (at the output,
the output noise will be unaltered; the input noise will be amplified by the closed loop gain). Those two noise sources must be
root sum squared to determine the total noise level expected at
the input (or output).
c. AC Coupled
Figure 31. Indirect Ground Returns for Bias Currents
when amplifying “floating” input sources such as transformers
and thermocouples, as well as ac-coupled sources, there must
still be a dc path from each input to ground, (see Figure 31).
COMMON-MODE REJECTION
Common-mode rejection is a measure of the change in output
voltage when both inputs are changed by equal amounts. These
specifications are usually given for a full-range input voltage
change and a specified source imbalance. “Common-Mode
Rejection Ratio” (CMRR) is a ratio expression while “CommonMode Rejection” (CMR) is the logarithm of that ratio. For
example, a CMRR of 10,000 corresponds to a CMR of 80 dB.
The low frequency (0.1 Hz to 10 Hz) voltage noise due to the
output stage is 10 µV p-p, the contribution of the input stage is
0.2 µV p-p. At a gain of 10, the RTI voltage noise would be
2
1 µV p-p,
2
 10 
  + (0.2) . The RTO voltage noise would be
G
10.2 µV p-p,
(
102 + 0.2(G )
)
2
. These calculations hold for
In an instrumentation amplifier, ac common-mode rejection is
only as good as the differential phase shift. Degradation of ac
common-mode rejection is caused by unequal drops across
differing track resistances and a differential phase shift due to
varied stray capacitances or cable capacitances. In many applications shielded cables are used to minimize noise. This technique can create common-mode rejection errors unless the
shield is properly driven. Figures 32 and 33 shows active data
guards which are configured to improve ac common-mode
rejection by “bootstrapping” the capacitances of the input
cabling, thus minimizing differential phase shift.
applications using either internal or external gain resistors.
INPUT BIAS CURRENTS
Input bias currents are those currents necessary to bias the input
transistors of a dc amplifier. Bias currents are an additional
source of input error and must be considered in a total error
budget. The bias currents when multiplied by the source resistance imbalance appear as an additional offset voltage. (What is
of concern in calculating bias current errors is the change in bias
current with respect to signal voltage and temperature.) Input
offset current is the difference between the two input bias currents. The effect of offset current is an input offset voltage whose
magnitude is the offset current times the source resistance.
Although instrumentation amplifiers have differential inputs,
there must be a return path for the bias currents. If this is not
provided, those currents will charge stray capacitances, causing
the output to drift uncontrollably or to saturate. Therefore,
Figure 32. Shield Driver, G ≥ 100
a. Transformer Coupled
Figure 33. Differential Shield Driver
GROUNDING
Many data-acquisition components have two or more ground
pins which are not connected together within the device. These
grounds must be tied together at one point, usually at the system power supply ground. Ideally, a single solid ground would
be desirable. However, since current flows through the ground
wires and etch stripes of the circuit cards, and since these paths
b. Thermocouple
–8–
REV. B
AD624
have resistance and inductance, hundreds of millivolts can be
generated between the system ground point and the data acquisition components. Separate ground returns should be provided
to minimize the current flow in the path from the most sensitive
points to the system ground point. In this way supply currents
and logic-gate return currents are not summed into the same
return path as analog signals where they would cause measurement errors (see Figure 34).
direct means of injecting a precise offset. It must be remembered that the total output swing is ± 10 volts, from ground, to
be shared between signal and reference offset.
Figure 36. Use of Reference Terminal to Provide Output
Offset
Figure 34. Basic Grounding Practice
Since the output voltage is developed with respect to the potential on the reference terminal an instrumentation amplifier can
solve many grounding problems.
SENSE TERMINAL
The sense terminal is the feedback point for the instrument
amplifier’s output amplifier. Normally it is connected to the
instrument amplifier output. If heavy load currents are to be
drawn through long leads, voltage drops due to current flowing
through lead resistance can cause errors. The sense terminal can
be wired to the instrument amplifier at the load thus putting the
IxR drops “inside the loop” and virtually eliminating this error
source.
When the IA is of the three-amplifier configuration it is necessary that nearly zero impedance be presented to the reference
terminal. Any significant resistance, including those caused by
PC layouts or other connection techniques, which appears
between the reference pin and ground will increase the gain of
the noninverting signal path, thereby upsetting the commonmode rejection of the IA. Inadvertent thermocouple connections
created in the sense and reference lines should also be avoided
as they will directly affect the output offset voltage and output
offset voltage drift.
In the AD624 a reference source resistance will unbalance the
CMR trim by the ratio of 10 kΩ/RREF. For example, if the reference source impedance is 1 Ω, CMR will be reduced to 80 dB
(10 kΩ/1 Ω = 80 dB). An operational amplifier may be used to
provide that low impedance reference point as shown in Figure
36. The input offset voltage characteristics of that amplifier will
add directly to the output offset voltage performance of the
instrumentation amplifier.
An instrumentation amplifier can be turned into a voltage-tocurrent converter by taking advantage of the sense and reference
terminals as shown in Figure 37.
Figure 35. AD624 Instrumentation Amplifier with Output
Current Booster
Typically, IC instrumentation amplifiers are rated for a full
± 10 volt output swing into 2 kΩ. In some applications, however, the need exists to drive more current into heavier loads.
Figure 35 shows how a current booster may be connected
“inside the loop” of an instrumentation amplifier to provide the
required current without significantly degrading overall performance. The effects of nonlinearities, offset and gain inaccuracies
of the buffer are reduced by the loop gain of the IA output
amplifier. Offset drift of the buffer is similarly reduced.
REFERENCE TERMINAL
The reference terminal may be used to offset the output by up
to ± 10 V. This is useful when the load is “floating” or does not
share a ground with the rest of the system. It also provides a
REV. B
Figure 37. Voltage-to-Current Converter
By establishing a reference at the “low” side of a current setting
resistor, an output current may be defined as a function of input
voltage, gain and the value of that resistor. Since only a small
current is demanded at the input of the buffer amplifier A2, the
forced current IL will largely flow through the load. Offset and
drift specifications of A2 must be added to the output offset and
drift specifications of the IA.
PROGRAMMABLE GAIN
Figure 38 shows the AD624 being used as a software programmable gain amplifier. Gain switching can be accomplished with
mechanical switches such as DIP switches or reed relays. It
should be noted that the “on” resistance of the switch in series
–9–
AD624
with the internal gain resistor becomes part of the gain equation
and will have an effect on gain accuracy.
Figure 40. Programmable Output Gain Using a DAC
Figure 38. Gain Programmable Amplifier
A significant advantage in using the internal gain resistors in a
programmable gain configuration is the minimization of thermocouple signals which are often present in multiplexed data
acquisition systems.
If the full performance of the AD624 is to be achieved, the user
must be extremely careful in designing and laying out his circuit
to minimize the remaining thermocouple signals.
AUTO-ZERO CIRCUITS
In many applications it is necessary to provide very accurate
data in high gain configurations. At room temperature the offset
effects can be nulled by the use of offset trimpots. Over the
operating temperature range, however, offset nulling becomes a
problem. The circuit of Figure 41 shows a CMOS DAC operating in the bipolar mode and connected to the reference terminal
to provide software controllable offset adjustments.
The AD624 can also be connected for gain in the output stage.
Figure 39 shows an AD547 used as an active attenuator in the
output amplifier’s feedback loop. The active attenuation presents a very low impedance to the feedback resistors therefore
minimizing the common-mode rejection ratio degradation.
Figure 41. Software Controllable Offset
In many applications complex software algorithms for auto-zero
applications are not available. For these applications Figure 42
provides a hardware solution.
Figure 39. Programmable Output Gain
Another method for developing the switching scheme is to use a
DAC. The AD7528 dual DAC which acts essentially as a pair of
switched resistive attenuators having high analog linearity and
symmetrical bipolar transmission is ideal in this application. The
multiplying DAC’s advantage is that it can handle inputs of
either polarity or zero without affecting the programmed gain.
The circuit shown uses an AD7528 to set the gain (DAC A) and
to perform a fine adjustment (DAC B).
Figure 42. Auto-Zero Circuit
–10–
REV. B
AD624
The microprocessor controlled data acquisition system shown in
Figure 43 includes includes both auto-zero and auto-gain capability. By dedicating two of the differential inputs, one to ground
and one to the A/D reference, the proper program calibration
cycles can eliminate both initial accuracy errors and accuracy
errors over temperature. The auto-zero cycle, in this application,
converts a number that appears to be ground and then writes
that same number (8 bit) to the AD7524 which eliminates the
zero error since its output has an inverted scale. The auto-gain
cycle converts the A/D reference and compares it with full scale.
A multiplicative correction factor is then computed and applied
to subsequent readings.
AC BRIDGE
Bridge circuits which use dc excitation are often plagued by
errors caused by thermocouple effects, l/f noise, dc drifts in the
electronics, and line noise pickup. One way to get around these
problems is to excite the bridge with an ac waveform, amplify
the bridge output with an ac amplifier, and synchronously
demodulate the resulting signal. The ac phase and amplitude
information from the bridge is recovered as a dc signal at the
output of the synchronous demodulator. The low frequency system noise, dc drifts, and demodulator noise all get mixed to the
carrier frequency and can be removed by means of a low-pass
filter. Dynamic response of the bridge must be traded off against
the amount of attenuation required to adequately suppress these
residual carrier components in the selection of the filter.
Figure 45 is an example of an ac bridge system with the AD630
used as a synchronous demodulator. The oscilloscope photograph shows the results of a 0.05% bridge imbalance caused by
the 1 Meg resistor in parallel with one leg of the bridge. The top
trace represents the bridge excitation, the upper middle trace is
the amplified bridge output, the lower-middle trace is the output of the synchronous demodulator and the bottom trace is the
filtered dc system output.
This system can easily resolve a 0.5 ppm change in bridge
impedance. Such a change will produce a 6.3 mV change in the
low-pass filtered dc output, well above the RTO drifts and
noise.
The AC-CMRR of the AD624 decreases with the frequency of
the input signal. This is due mainly to the package-pin capacitance associated with the AD624’s internal gain resistors. If
AC-CMRR is not sufficient for a given application, it can be
trimmed by using a variable capacitor connected to the
amplifier’s RG2 pin as shown in Figure 45.
Figure 43. Microprocessor Controlled Data Acquisition
System
WEIGH SCALE
Figure 44 shows an example of how an AD624 can be used to
condition the differential output voltage from a load cell. The
10% reference voltage adjustment range is required to accommodate the 10% transducer sensitivity tolerance. The high linearity and low noise of the AD624 make it ideal for use in
applications of this type particularly where it is desirable to measure small changes in weight as opposed to the absolute value.
The addition of an auto gain/auto tare cycle will enable the system to remove offsets, gain errors, and drifts making possible
true 14-bit performance.
Figure 45. AC Bridge
20V
0V
5V
90
AMPLIFIED BRIDGE
OUTPUT (5V/div) (B)
0V
DEMODULATED BRIDGE
OUTPUT (5V/div) (C)
0V
10
0%
Figure 44. AD624 Weigh Scale Application
0V
200µS
BRIDGE EXCITATION
(20V/div) (A)
100
5V
2V
FILTER OUTPUT
2V/div) (D)
Figure 46. AC Bridge Waveforms
REV. B
–11–
C805c–4–2/96
AD624
Figure 47. Typical Bridge Application
ERROR BUDGET ANALYSIS
To illustrate how instrumentation amplifier specifications are
applied, we will now examine a typical case where an AD624 is
required to amplify the output of an unbalanced transducer.
Figure 47 shows a differential transducer, unbalanced by ≈5 Ω,
supplying a 0 to 20 mV signal to an AD624C. The output of the
IA feeds a 14-bit A to D converter with a 0 to 2 volt input voltage range. The operating temperature range is –25°C to +85°C.
Therefore, the largest change in temperature ∆T within the
operating range is from ambient to + 85°C (85°C – 25°C =
60°C.)
In many applications, differential linearity and resolution are of
prime importance. This would be so in cases where the absolute
value of a variable is less important than changes in value. In
these applications, only the irreducible errors (20 ppm =
0.002%) are significant. Furthermore, if a system has an intelligent processor monitoring the A to D output, the addition of an
auto-gain/auto-zero cycle will remove all reducible errors and
may eliminate the requirement for initial calibration. This will
also reduce errors to 0.002%.
Table II. Error Budget Analysis of AD624CD in Bridge Application
Gain Error
Gain Instability
Gain Nonlinearity
Input Offset Voltage Drift
± 0.1%
10 ppm
± 0.001%
± 25 µV, RTI
± 0.25 µV/°C
Output Offset Voltagel
Output Offset Voltage Drift1
± 2.0 mV
± 10 µV/°C
Bias Current–Source
Imbalance Error
Offset Current–Source
Imbalance Error
Resistance Error
Resistance–Drift
Common-Mode Rejection
5 V dc
Noise, RTI
(0.1 Hz–10 Hz)
± 15 nA
± 10 nA
± 10 nA
± 100 pA/°C
115 dB
0.22 µV p-p
Calculation
± 0.1% = 1000 ppm
(10 ppm/°C) (60°C) = 600 ppm
± 0.001% = 10 ppm
± 25 µV/20 mV = ± 1250 ppm
(± 0.25 µV/°C) (60°C)= 15 µV
15 µV/20 mV = 750 ppm
± 2.0 mV/20 mV = 1000 ppm
(± 10 µV/°C) (60°C) = 600 µV
600 µV/20 mV = 300 ppm
(± 15 nA)(5 Ω ) = 0.075 µV
0.075 µV/20mV = 3.75 ppm
(± 10 nA)(5 Ω) = 0.050 µV
0.050 µV/20 mV = 2.5 ppm
(10 nA) (175 Ω) = 1.75 µV
1.75 µV/20 mV = 87.5 ppm
(100 pA/°C) (175 Ω) (60°C) = 1 µV
1 µV/20 mV = 50 ppm
115 dB = 1.8 ppm × 5 V = 9 µV
9 µV/20 mV = 444 ppm
0.22 µV p-p/20 mV = 10 ppm
Total Error
1
Effect on
Absolute
Accuracy
at TA = 85°C
Effect
on
Resolution
1000 ppm
_
–
1250 ppm
1000 ppm
600 ppm
–
1250 ppm
–
–
10 ppm
–
–
1000 ppm
750 ppm
1000 ppm
–
–
–
300 ppm
–
3.75 ppm
3.75 ppm
–
2.5 ppm
2.5 ppm
–
87.5 ppm
87.5 ppm
–
–
50 ppm
–
450 ppm
450 ppm
–
_
–
10 ppm
3793.75 ppm
5493.75 ppm
20 ppm
PRINTED IN U.S.A.
Error Source
AD624C
Specifications
Effect on
Absolute
Accuracy
at TA = 25°C
Output offset voltage and output offset voltage drift are given as RTI figures.
For a comprehensive study of instrumentation amplifier design
and applications, refer to the Instrumentation Amplifier Application
Guide, available free from Analog Devices.
–12–
REV. B

Copyright 1998 Marc E. Herniter - Rose

Transcription

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