ADC12Dxx00RFRB - Dual 12 bit, Giga-Sample RF-sampling Signal Acquisition Reference Board National

Transcription

ADC12Dxx00RFRB - Dual 12 bit, Giga-Sample RF-sampling Signal Acquisition Reference Board National
Reference Board Design Package
National Semiconductor
High Speed Signal Path Applications
July 13, 2011
ADC12Dxx00RFRB - Dual 12 bit, Giga-Sample
RF-sampling Signal Acquisition Reference Board
1.0 Introduction
The term in this document “ADC12Dxx00RFRB” specifically applies to the following
reference boards: ADC12D800RFRB, ADC12D1600RFRB, ADC12D1800RFRB.
The ADC12Dxx00RFRB is an ultra high-speed signal acquisition system designed
around National's ADC12Dxx00RF analog-to-digital converter. This 12-bit ADC
operates at sample rates in excess of 500 Ms/s. National provides this Design
Package to select customers who own one of these reference boards and wish to use
its design as a starting point for a portion of their own product design.
The design package is provided under the licensing agreement in this document
(which the customer agrees to by accepting this package) with certain
stipulations:
* that the design package is provided as-is without any warranties concerning its
operation as it is designed to be a design tool and not a product;
* that the customer will not directly productize this design and will only use it
as an assistance towards the design of a different product of his own;
* that while National provides full application support to our customers for the
purposes of designing-in our IC products, this design package is provided free of
charge as a courtesy and system level design aspects of this package are not
supported.
2.0 Contents of the package
1. Bill-of-Materials (BOM)
2. Board schematics
3. Board layout design
4. FPGA design source files (necessary source files).
The WaveVision-5 Signal Path Evaluation software, which is required to interact
with the board, is provided separately.
Customer will need to provide the tools required to work with each of these items.
These are:
1.
2.
3.
4.
PC with Windows XP 32-bit environment.
Allegro or OrCAD design package for schematic entry.
Allegro board design package.
Xilinx ISE
2010 National Semiconductor Corporation
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HSSP-DP-082510-JB
3.0 EVALUATION PRODUCT LICENSE AGREEMENT
UNTIL YOU HAVE CAREFULLY READ ALL THE TERMS OF THIS AGREEMENT, DO NOT use the
associated Evaluation Product. By using the Evaluation Product you represent that you are authorized
to bind your organization to, and that your organization will be bound by, the terms of this Agreement.
IF THESE REPRESENTATIONS ARE NOT TRUE, DO NOT USE THE EVALUATION PRODUCT.
LICENSE. National Semiconductor Corporation ("National") grants your organization the right to use
the enclosed evaluation board, including any incorporated and/or accompanying software,
components and/or documentation (collectively, the "Evaluation Product") solely for evaluation,
design and testing purposes. Any software included with the Evaluation Product may be used only in
connection with the Evaluation Product, and may be covered under a separate accompanying software
license agreement, in which case the terms of such license agreement shall also apply to that software.
OWNERSHIP AND COPYRIGHT. Title to any software or related documentation included with the
Evaluation Product remains with National and/or its licensors, and unauthorized copying or use is
prohibited. Any copyright or other proprietary notices shall not be removed from any portion of the
Evaluation Product.
RESTRICTIONS. The Evaluation Product may not be sold or otherwise distributed for commercial
purposes, in whole or in part. The Evaluation Product is not designed or licensed for use in the
design, development, manufacture or distribution of products used in or in connection with
critical components in life support devices or systems without the express written approval of the
chief executive officer and general counsel of National. Except as provided in this Agreement or in
any accompanying documentation, any software or related documentation may not be reproduced for
any purpose inconsistent with this Agreement, and no software not provided in source code form may
be reverse engineered, de-compiled or disassembled. No part of the Evaluation Product including any
associated technical data, nor any product derived from the Evaluation Product or such technical data,
may be exported outside the United States except as authorized and as permitted by the laws and
regulations of the United States (additional information is available at www.bxa.doc.gov).
NO WARRANTY. The Evaluation Product is provided "AS IS" without warranty of any kind.
National and its licensors expressly disclaim all warranties, express or implied, including without
limitation, the implied warranties of merchantability, fitness for a particular purpose or noninfringement of intellectual property. National and its licensors do not warrant that the
Evaluation Product will meet your organization’s requirements or that the operation of the
Evaluation Product will be uninterrupted or error free.
LIMITATION OF LIABILITY. In no event will National or its licensors be liable for any direct,
indirect, incidental, punitive, special, or consequential damages, arising out of the use or inability
to use the Evaluation Product, whether due to breach of contract, breach of warranty, or
negligence even if advised of the possibility of such damages. The maximum liability of National
and its licensors shall be limited to refunding the purchase price paid for the Evaluation Product,
if any.
TERMINATION. National may terminate this license at any time for breach of any of its terms and
conditions. Upon termination, the evaluation board and all copies of any software and/or
documentation shall be returned to National.
GOVERNING LAW. This Agreement is governed by the laws of the State of California and the
United States. Any claim arising out of this Agreement will be brought in Santa Clara County, CA.
National Semiconductor
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