i.MX Audio Interfaces

July 14, 2009
i.MX Audio Interfaces
Mithra Weerakoon and John Scott
Applications Engineers with the Multimedia Applications Division
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What audio interfaces are in i.MX processors?
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What is covered in today’s presentation?
►Today,
we are going to talk about the audio interfaces available in
the i.MX processor family.
►They are as follows:
•
•
•
•
•
•
ESAI – Enhanced Serial Audio Interface (John)
SSI – Synchronous Serial Interface (Mithra)
AUDMUX – Digital Audio Multiplex (Mithra)
SPDIF – Sony/Philips Digital Interface (John)
ASRC – Asynchronous Sample Rate Converter (John)
MLB – Media Local Bus (Mithra)
►We
will also touch on Audio Clock Routing and give our
recommendations on how to get the best audio performance in your
system.
►We will end with a block diagram of a typical system using i.MX.
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The Enhanced Audio Serial Interface (ESAI)
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What is the ESAI used for?
►Primarily
used to provide an interface between an audio source and
the i.MX processor
►Source could be via an external codec (e.g. ADC) or external SPDIF
receiver
►Also provides the data on the back-end, e.g. can supply the DAC
which drives the loudspeaker or Digital Amplifier directly
►Optimized for multichannel support in supplying the i.MX processor
(large FIFOs)
►Can handle high sample rates, e.g. up to 192kHz
►Uses either an optical (Toslink) or co-ax (RCA) cable from device to
i.MX processor
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ESAI Features
►Independent
(asynchronous mode) or shared (synchronous mode)
Tx and Rx sections with shared or separate int/ext clocks and frame
synchs, operating in master or slave modes
►Supports many digital audio industry standards including I2S and
AC97 modes
►Two dedicated TX pins and four selectable TX/RX pins
►TDM network mode compatible
►Up to 32 words per period in network mode
►Input clock source can be system clock (not recommended) or
external oscillator, or use slave mode
►Programmable internal clock divider and frame sync generation
►128 word transmit FIFO shared by transmitters
►128 word receive FIFO shared by receivers
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ESAI Peripheral
TX0
RSMA
RSMB
Shift Register
TX1
TSMA
TSMB
Shift Register
RCCR
RCR
SDO2/SDI3 [PC9]
Shift Register
RX3
TX3
SAICR
[PC1] FSR
[PC5] HCKT
[PC4] FST
DDB
GDB
TSR
[PC3] SCKT
SDO3/SDI2 [PC8]
Shift Register
SAISR
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SDO1 [PC10]
TX2
TCCR
TCR
Clock/Frame Sync
Generators
and
Control Logic
SDO0 [PC11]
RX2
TX4
SDO4/SDI1 [PC7]
Shift Register
RX1
TX5
Shift Register
SDO5/SDI0 [PC6]
RX0
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The Synchronous Serial Interface (SSI)
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SSI Overview
►SSI
is a full duplex serial interface that enables the chip to
communicate with a variety of serial audio devices.
►These
devices can be standard AD/DA converters or digital signal
processors used for audio post processing (for example).
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SSI Features
►Independent
transmit and receive sections
►Data
clocks for the port can be internally as master or externally
generated as slave*1 device
►Programmable
data interface modes such as I2S, LSB, MSB
aligned, and AC97 support
►Programmable
►Program
►SSI
word length (8, 10, 12, 16, 18, 20, 22 or 24 bits)
options for frame sync and clock generation
power-down feature
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SSI Block Diagram
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Digital Audio Multiplexer (AUDMUX)
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Digital Audio Multiplexer Features
►The
Digital Audio Multiplexer (AUDMUX) enables interconnection of
the two SSI interface ports to external audio devices. The data and
clock signals from the SSI interface ports are always routed to the
external devices via the AUDMUX.
►Total
of 7 Muxers are provided
►Three
internal ports and four external ports
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Digital Audio Multiplexer Features
►Three
internal ports
►Four external ports
►Full 6-wire SSI interfaces for asynchronous receive and transmit
►Configurable 4-wire (synchronous) or 6-wire (asynchronous)
peripheral interfaces
►Independent Tx/Rx frame sync and clock direction selection for host
or peripheral
►Each host interface’s capability to connect to any other host or
peripheral interface in a point-to-point or point-to-multipoint (network
mode)
►Transmit and receive data switching to support external network
mode
►CE Bus network mode to provide synchronous switching on RxD
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Digital Audio Multiplexer Block
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The Sony/Philips Digital Interface (SPDIF)
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What is the SPDIF used for?
►Common
interface used in digital audio e.g. digital output for CD
players and DVD/Blu-ray players
►Can
transmit uncompressed (e.g. PCM) or compressed (e.g. Dolby
Digital, DTS) data
►Easy
way to get stereo or multichannel audio into the i.MX
processor
►Avoids
the need for an external SPDIF Rx chip if integrated into the
i.MX processor (around $1 BOM cost)
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SPDIF Features
►Full
SPDIF receiver and transmitter available in i.MX35
►SPDIF transmitter only available in i.MX37 and i.MX51
►1 input (i.MX35 only) pin and 1 output pin
►16 channel FIFO data buffer
►Can handle both Channel Status (CS) and User (U) data
►Includes frequency measurement block for accurate measurement
of incoming sampling frequency
►Supports bypass mode of SPDIF in > SPDIF out (i.MX35 only)
►Supports IEC958 biphase mark format (data, CS and U bits)
►Both Tx and Rx clocks are sent to the ASRC
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SPDIF Rx/Tx Block Diagram
SPDIFIN only on i.MX35x
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The Asynchronous Sample Rate Converter
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What is the ASRC used for?
►Allows
audio sample rate conversion between sources with
independent clock domains, e.g. 44.1kHz audio from CD and 8kHz
audio from Bluetooth®
►Can
provide a fixed sample rate output, e.g. 48kHz audio output for
additional processing or playback
►Can
be used for up-conversion of audio, e.g. 48kHz input upconverted to 96kHz output
►Can
be used for down-conversion of audio, e.g. 96kHz input downconverted to 48kHz output
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Asynchronous Sample Rate Convertor (ASRC) Features
►Hardware
co-processor requiring minimal CPU intervention (i.e. low
MIPS)
►Support ratio range of between 1/24 to 8 (Fs in to out)
►Up to 10 channel simultaneous conversion
►Supports simultaneous conversion in up to 3 sample rates
►Typical performance of -120dB THD+N
►Dynamic range of 144dB
►Designed for conversion between: 32kHz, 44.1kHz, 48kHz and
96kHz
►Can support 8kHz to 32kHz as well with less performance (values?)
►Clock inputs may by sourced from SSI Rx, ESAI Rx, S/PDIF Rx or
PLL
►Clock outputs may drive the SSI Tx, ESAI Tx or S/PDIF Tx
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Media Local Bus Device Interface Macro
(MLB)
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What is the MLB used for?
►Implements
the required functionality of a media local bus (MLB)
device. This logic serves as an interface between the MLB and a
customer IC, implementing the Physical- and Link-Layer
requirements outlined in the MediaLB Specification.
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MLB Features
►Transmission
of commands and data when functioning as the
transmitting device associated with a Channel Address
►Reception
of data and transmission of RxStatus responses when
functioning as the receiving device associated with a Channel
Address
►MediaLB
►System
lock detection
channel command handling
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Audio Clock Routing
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Audio Clock Routing Options
►i.MX
processor configured as clock slave where audio data
clocks are sent from another device
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Audio Clock Routing Options
►i.MX processor configured as clock Master and,
• Audio clock derived from the internal PLL of the i.MX
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Audio Clock Routing Options
►i.MX configured as clock Master and,
• Audio clock derived from the dedicated external crystal/oscillator
Audio clocks
i.mx processor
Audio data
AD/DA converter
Dedicated audio
clock
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Effects of Audio Clocking Methods
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Audio Performance
►The
internal DPLL on the i.MX processor is not best suited for
clocking audio peripherals. Use of the i.MX processor master mode
using the internal PLL may yield degraded audio performance for
some applications.
►Measured
jitter on the audio master clock when the internal PLL is
sourced as clock is approximately 800 ps.
►Measured
jitter on the audio master clock with the dedicated
external audio crystal is approximately 55 ps.
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Audio Performance
►Audio
clock jitter vs. frequency when internal PLL is used as clock
source
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Audio Performance
►Audio
clock jitter vs. frequency when internal dedicated audio crystal
used as clock source
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Audio Performance
►FFT
plot for the case when internal PLL is used for clock mastering.
Elevated noise due
to clock jitter
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Audio Performance
►FFT
plot for the case when an external dedicated crystal is used for
clock mastering
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Audio Performance
►Noise
at the fundamental and the 2nd harmonic frequency is greater
when the internal PLL is used for audio clocks.
►Jitter
performance is better when dedicated audio crystal is used.
►Depending
on the application, either approach can be used. It is
recommended to avoid use of the internal PLL as an audio clock
source on applications that call for best audio sound quality
performance.
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Typical Audio System Block
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Audio System Block
►ESAI
for main audio
out channels and a
stereo auxiliary input.
►Two
SSI ports can be
used for GPS and the
Bluetooth® module.
►Audio
Clocks can be
slave or master,
depending on the
application.
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i.MX Part’s Audio Features
Feature/Part
i.MX23x
i.MX25x
i.MX27x
i.MX31x
i.MX35x
i.MX37x
i.MX51x
ESAI
NO
YES
NO
NO
YES
NO
NO
SSI
YES
YES
YES
YES
YES
YES
YES
ASRC
NO
NO
NO
NO
YES
NO
NO
SDPIF
YES (TX only)
NO
NO
NO
YES
YES (TX only)
YES (TX only)
Audio MUX
YES
YES
YES
YES
YES
YES
YES
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Wrap up
►Today,
we talked about the audio interfaces available in the i.MX
processor family.
►We
also spoke about Audio Clock Routing and explained how to get
the best audio performance in an i.MX processor-based system.
►We
showed a typical block diagram of the audio based portions of a
possible i.MX system.
►And
we explained which i.MX processors have which audio
peripherals.
►For
more details, please contact your local Freescale sales
representative or go to www.Freescale.com
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Q&A
►Thank
you for attending this presentation. We’ll now take a few
moments to review the audience questions, and then we’ll begin the
question and answer session.
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