TFT-LCD Tentative Specification

Transcription

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LCD-140-TRN
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Product Specif ication
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Product Transparent Panel Kit
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Model No. LCD-215-TRN
LCD-140-TRN
1. GENERAL DESCRIPTION
1.1 CHARACTERISTICS
CHARACTERISTICS ITEMS
Screen Diagonal [in]
SPECIFICATIONS
21.5”
Pixels
1920×1080
[lines]
Active Area
Pixel Pitch
[mm]
476.64 (H) x 268.11 (V)
[mm]
0.24825 (H) x 0.24825 (V)
RGB vertical stripe
585
487.54(W) x 335.81(H) x 3(D) Typ.
TFT glass Size [mm]
Display Mode
Surface treatment
（Without the protection film）
487.54(W) x 282.91(H) x 1.83(D) Typ
Normally White
Symbol
TST
TOP
A OP
A ST
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Storage Condition: With shipping package.
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Storage Temperature
Operating Ambient Temperature
Altitude Operating
Altitude Storage
Shelf life: one year
Value
Min.
-20
0
0
0
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2.1 ABSOLUTE RATINGS OF ENVIRONMENT
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Anti-glare,3H
2. ABSOLUTE MAXIMUM RATINGS
Item
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Pixel Arrangement
Weight [g] (Without the protection film)
Physical Size(COF/PWB included) [mm]
Max.
+60
50
5000
12000
[Note 1] Temperature and relative humidity range is shown in the figure below.
*1) 90 %RH Max. (Ta ≦ 40 ºC).
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*2) Wet-bulb temperature should be 40 ºC Max. (Ta > 40 ºC).
*3) No condensation.
Unit
Note
ºC
ºC
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(1), (3)
(1), (2), (3)
(3)
(3)
LCD-140-TRN
[Note 2] The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 50ºC with LCD module alone in a temperature controlled
chamber. Thermal management should be considered in your product design to prevent the surface
temperature of display area from being over 60ºC. The range of operating temperature may degrade
in case of improper thermal management in your product design.
[Note 3] The rating of environment is base on LCD module. Leave LCD cell alone, this environment condition
can’t be guaranteed. Except LCD cell, the customer has to consider the ability of other parts of LCD
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module and LCD module process.
3. ELECTRICAL CHARACTERISTICS
Condition
Ratings
+5V supply voltage
VCC
Ta=25℃
0～+6
Storage temperature
Tstg
-
-20～+60
℃
Operation temperature
Topa
-
0～+50
℃
Remark
Min
Typ
Max
Unit
Remark
4.5
5.0
5.5
V
【Note 1】
—
820
900
mA
VCC=5.0V,60Hz
Black Pattern
IRush
—
—
3
A
【Note 2】
VRP
—
—
300
mVp-p
VCC=5.0V
High
VTH
—
—
100
mV
VCM=1.2V
Low
VTL
-100
—
—
mV
【Note 3】
Input Differential Voltage
∣VID∣
100
—
600
mV
Differential Input Common Mode
Voltage
VCM
1.0
1.2
1.5
V
Power consumption
P
—
4.1
4.5
W
Supply voltage
+5V supply
voltage
Current
dissipation
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Permissible input ripple voltage
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Differential Input
Threshold Voltage
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Symbol
VCC
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3.2 Control circuit driving
Parameter
Unit
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Symbol
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Parameter
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3.1 Absolute Maximum Rating
ICC
[VCM]: Common mode voltage of LVDS driver
[Note1]
*1) Power, data sequence
0.50ms≦t1≦10ms
t4≧1 sec
0.01ms＜t2≦50ms
t5≧200ms
0.01ms＜t3≦50ms
t6≧200ms
LCD-140-TRN
Vin=5.0V
4.5V
4.5V
data
LCD Power Supply
Logic Signal
0.5V
0.5V
t1
t2
t3
0.5V
t4
VL
t5
t6
※ Data: CLKIN±,RIN0±,RIN1±, RIN2±, RIN3±
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Data: RGB DATA, DCLK, DENA
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Backlight Power Supply
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※ About the relation between data input and back light lighting, please base on the above-mentioned input
sequence.
※ When back light is switched on before panel operation or after a panel operation stop, it may not display
normally. But this phenomenon is not based on change of an incoming signal, and does not give damage
to a liquid crystal display.
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※ VCC-dip conditions:
(1) When 3.6V≦VCC(min)<4.5V, td≦10 ms
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(2) When VCC <3.6 V, VCC-dip conditions should also follow the VCC-turn-on conditions.
[Note2]
IRush Measurement Condition:
The duration of rising time of power input is 470us.
LCD-140-TRN
5.0V
90%
0V
10%
470us
VCC rising time
[Note3]
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VIN -: Negative differential DATA & CLK Input
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VIN+: Positive differential DATA & CLK Input
VTH
｜VID｜
VTL
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VID｜
4. INTERFACE PIN CONNECTION
4.1 TFT LCD OPEN CELL
CN1 (Interface signals and +5V DC power supply) Shown on the next table. Using connector:
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FI-XB30SSRLA-HF-16(JAE) or compatible
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Matching connector: FI-X30HL(JAE) or compatible
Pin No.
Symbol
1
RxOIN0-
Function
Remark
LVDS
RxOIN0+
Positive LVDS DATA input(ODD)
LVDS
3
RxOIN1-
Negative LVDS DATA input(ODD)
LVDS
4
RxOIN1+
LVDS
5
RxOIN2-
LVDS
6
RxOIN2+
LVDS
7
GND
Ground
8
RxOCLK-
Negative LVDS Clock input(ODD)
LVDS
9
RxOCLK+
Positive LVDS Clock input(ODD)
LVDS
10
RxOIN3-
LVDS
11
RxOIN3+
LVDS
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LCD-140-TRN
12
RxEIN0-
Negative LVDS DATA input(EVEN)
LVDS
13
RxEIN0+
Positive LVDS DATA input(EVEN)
LVDS
14
GND
Ground
15
RxEIN1-
LVDS
16
RxEIN1+
LVDS
17
GND
Ground
18
RxEIN2-
19
RxEIN2+
20
RxCLK-
Negative LVDS Clock input(EVEN)
21
RxCLK+
Positive LVDS Clock input(EVEN)
22
RxEIN3-
LVDS
23
RxEIN3+
LVDS
24
GND
Ground
25
NC
No connection(Do not connect)
26
NC
27
NC
28
VDD
29
VDD
30
VDD
POWER +5V
POWER +5V
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POWER +5V
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LVDS
LVDS
LVDS
LVDS
LCD-140-TRN
4.2 Block Diagram (Open-cell)
30
1
CN1
Source PWB
Signal
Power
Source Driver
Gate Driver
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1 cycle
RxOCLK+
OR1
OR0
OG0
OG2
OG1
OB1
OB3
OB2
DE
OR7
OR6
RxOIN0RxOIN1+
RxOIN2+
OR3
OR2
OR1
OR0
OG0
OB0
OG5
OG4
OG3
OG2
OG1
OB1
NA
NA
OB5
OB4
OB3
OB2
DE
NA
OB7
OB6
OG7
OG6
OR7
OR6
NA
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RxECLK+
OR4
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RxOIN2-
RxOIN3-
OR5
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RxOIN1-
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RxOCLK-
RxOIN0+
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LCD PANEL
1920 x 3(rgb) x 1080
4.3 LVDS INTERFACE
RxOIN3+
INPUT SIGNAL:
RxOIN0- , RxOIN0+
RxOIN1- , RxOIN1+
RxOIN2- , RxOIN2+
RxOCLK- , RxOCLK+
RxOIN3- , RxOIN3+
RxEIN0- , RxEIN0+
RxEIN1- , RxEIN1+
RxEIN2- , RxEIN2+
RxECLK- , RxECLK+
RxEIN3- , RxEIN3+
POWER:
+5V DC
1 cycle
RxECLK-
RxEIN0+
ER1
ER0
EG0
ER5
ER4
ER3
ER2
ER1
ER0
EG0
EG2
EG1
EB1
EB0
EG5
EG4
EG3
EG2
EG1
EB1
EB3
EB2
DE
NA
NA
EB5
EB4
EB3
EB2
DE
ER7
ER6
NA
EB7
EB6
EG7
EG6
ER7
ER6
NA
RxEIN0-
RxEIN1+
RxEIN1RxEIN2+
RxEIN2RxEIN3+
RxEIN3-
DE: Display Enable
NA: Not Available (Fixed Low)
R/G/B Data 7:MSB , R/G/B Data 0:LSB , O : “First Pixel Data”
E : “Second Pixel Data”
LCD-140-TRN
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4.4 COLOR DATA INPUT ASSIGNMENT
0: Low level voltage,
1: High level voltage.
Each basic color can be displayed in 256 gray scales from 8 bit data signals. According to the combination of
total 24 bit data signals, the 16,7M colors display can be achieved on the screen.
LCD-140-TRN
5. INTERFACE TIMING
5.1 INPUT SIGNAL TIMING SPECIFICATIONS
(a) The input signal timing specifications are shown as the following table and timing diagram.
DCLK
LCD
Timing
Horizontal
DENA
Vertical
Symbol
Min
Typ.
Max.
Unit
Freq.
fCLK
55
72
90
MHz
Cycle
tCLK
18.18
13.89
11.11
ns
Horizontal effective time
tHA
960
960
960
tCLK
Horizontal blank time
tHB
32
100
115
tCLK
Horizontal total time
tH
992
1060
1075
tCLK
Vertical frame Rate
Fr
50
60
75
Hz
Vertical total time
tV
1084
1130
1170
tH
Vertical effective time
tVA
1080
1080
1080
tH
Vertical blank time
tVB
4
50
90
tH
*1) DENA (data enable) usually is positive
*2) DCLK still inputs during blanking
*3) DE mode only
*4) It maybe cause flicker at 50Hz.
(b) Timing Chart
DCLK
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a.Horizontal Signal
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[Note]
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First Data
Last Data
Invalid Data
1
3
5
1917 1919
Invalid Data
EVEN DATA
(R,G,B)
Invalid Data
2
4
6
1918 1920
Invalid Data
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ODD DATA
(R,G,B)
tHB
tHA
DENA
b.Vertical Signal
Line Data
Invalid Data
tVB
DENA
1
2
3
1079 1080
tVA
Invalid Data
LCD-140-TRN
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6. PANEL Mechanical Drawing
LCD-140-TRN
7. A/ D BOARD
7.1 A/ D BOARD SPECIFICATIONS
(1) OSD button
(4) VGA
7.2 RESOLUTION SUPPORT
720-50Hz
800x600
800x600
720-60Hz
1024x768
1024x768
1024x768
720-24Hz
1280x1024
1280x1024
720-25Hz
1440x900
1440x900
720-30Hz
1600x1200
1600x1200
1080i 50
1600x1050
1600x1050
1080i 60
1920x1080
1920x1080
1080p 24
1920x1200
1920x1200
1080p 25
1280x800
1280x800
1080p 30
1280x960
1280x960
1080p 50
1280x720
480i
1080p 60
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HDMI
(6) POWER
640x480
640x480
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VGA
(5) VGA 2.0
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(3) HDMI
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(2) LVDS
480p
576i
NC
576p
NC
(7) Audio Output
LCD-140-TRN
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LVDS Cable
LVDS Cable connects the Panel AND A/ D Board
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7.3 A/ D BOARD Mechanical Drawing
LVDS Cable length : 25cm

TFT-LCD Tentative Specification

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