Xilinx ISE 8.1i for Design Simulation and Synthesis Tutorial

Boise State University
Digital Systems Laboratory
by
S. M. Loo, Arlen Planting
Department of Electrical and Computer Engineering
Boise State University
First Released: Spring 2005 with ISE 6.3i
Updated: Fall 2006 with ISE 8.1i
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Introduction
• This tutorial will introduce the Xilinx ISE Computer-Aided
Design (CAD) Software
• It will acquaint you with the BSU Xilinx TTL symbols
(created from ISE native symbols) used when
constructing digital circuits on a proto board
• The goal of this tutorial is to provide you with the skills to
use ISE to facilitate learning digital designs
• This software tool is capable of simulating any digital
design that you will attempt in this class and, more
importantly, in a real-world environment
• You will enter a logic circuit that implements the equal
function!
•
This tutorial has been prepared by your friendly neighborhood lab assistant and
course instructor
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Start Project Navigator
• Find the Xilinx ISE 8.1i icon on
desktop to start Xilinx Project
Navigator and double-click the
icon
• This is the Xilinx ISE window
• ISE always opens the most
recent project! If this subwindow contains data, then
use FILE→Close Project.
• Note Project Navigator in
Windows task bar.
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Create New Project
• To create a new project, File→New Project
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Name Schematic
When all the fields have been filled, click Next.
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• Give a name to the
project
• Make sure that the
project location is
where you want it. It is
okay to place your
folder on the M drive
(however, D drive is
preferable!). This
tutorial has been
written on a computer
without a D drive. The
lab computer has a D
drive, and has been
set up to clear all
user’s data when
rebooted!
• Top-Level Module
Type is Schematic
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Target Device Specification
• This is important, and
will be used later for
FPGA designs.
• Make sure other
values match what is
shown
• This device
specification is
required for targeting
the FPGA prototyping
we have in the lab.
This will be important
when we download to
the FPGA.
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Skip these Dialogs
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Lab1-Equals Project
• Note the
project name
and target
FPGA ID
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Add Schematic Source to Project
• Now we need to
add a
schematic
source to the
project
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Name Schematic
• Select Schematic
• Name Schematic
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New Schematic Window
• A blank schematic
sheet has been
created and added
to the project.
• Double click on
• You will get this
schematic capture
window. Re-size
the window to
optimize the
working area. Try
to close the middle
window (the
“Select Options”
window)
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Change Page Size
• Since this is a
small design, we
will change the
page size to fit
an 11”x8.5”
sheet of paper.
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Set Page Size to 11”x8.5”
• You can always increase the
page size by revisiting these
steps.
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Add Symbols
• Now we want to add
the component
symbols to the
schematic
• Select the Add
Symbol
button
from the toolbar.
• Hitting the Esc key
will cancel the Add
Symbol mode.
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Add Title to Schematic Diagram
• Symbol
categories
• Symbols within
each category
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Add Inv Symbols
• Select “Logic”
Category and find
“Inv” (abbreviation
for inverter)
• Place two “Inv” on
the sheet, by
clicking at the
desired locations
on the sheet
• Symbols can be
moved by clicking
once at the
symbol. This turns
the symbol to red,
then it can be
moved
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Add 2-input AND Symbols
• Select the
AND2 symbol
and click on
drawing where
you wish to
add symbol
• Add two
AND2
symbols
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Add 2-input OR Symbol
• Select the
OR2 symbol
and click on
drawing where
you wish to
add symbol
• Add one OR2
symbol
• Organize the
symbols as
you see in this
figure
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Label Symbols
• Right Click on symbol and select Object Properties
– This step is to label the symbols to something that could be more
meaningful to you by changing to the Value of InstName
• This step is optional
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Set Symbol’s Properties
• Change InstName Value as
you desire
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Add Wires
•
•
•
•
•
•
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Now add wires to connect the
symbols
Close the Source window by (pulldown menu) View → Source
Open the Processes window by
(pull-down menu) View →
Processes
Select the Add Wire button from
the toolbar
On the options tab, select the Use
the Manual method …
Hitting the Esc key will cancel the
Add Wire mode and lead to this
window that is very useful for
selecting a wire
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Add Wire Step 1
• Connect these two segments as indicated by the green
arrows
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Add Wire Step 2
• Hover over as indicated by the red arrow until the cursor
image changes to connection point indicator
• Connection point indicator
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Add Wire Step 3
• Left click (hold the left button) and drag wire as shown in
figure
• Once connection indicator appears, release mouse button
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Schematic with Wires
• Repeat until you have connected all of the pins
• For pins that are connected to external devices such as
switches and LED’s, just add wire and leave unconnected on
that end
• Does your schematic look like the one above?
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Add I/O Markers (or I/O Pads)
• Select the Add
I/O Marker
button from the
toolbar
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•
•
Add Input/Output Markers
Select “Add an input marker”
Add input markers
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•
•
Select “Add an output marker”
Add output marker
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Label I/O Markers
• Right Click I/O Markers
and select Rename
Port
• Input names should be
SW1 and SW2
• Output name should
be LED1
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•
•
•
Save and Check Schematic
Save the schematic diagram
Activate the schematic check routine (pull-down menu), Tools→Check
Schematic
Fix any error you might have and run the check routine
– Observe the bottom window for these messages
• “Start DRC …”
• “No error or warning is detected”
•
•
You can print your schematic diagram (portrait or landscape) or even
preview the printout before you print
Save the diagram before you exit the schematic capture tool (by clicking
on the × on the top right hand corner of the schematic capture window)
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Back to Project Design
Summary
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Add Test Bench Source
• The circuit entry is completed, but how do we know whether the
design works?
• We will test our design using a test bench!
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Name Test Bench
• Select Test Bench
Waveform
• Name Test Bench
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Associate Test Bench With Schematic
• Select the schematic
that is to be used by this
Test Bench
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Test Bench Creation
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Accept Default Timing
Values
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New Test Bench Window
• The waveform window is part of ISE
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Define Input Values
• Note the vertical blue line in column 1000 - this is the end of
test marker. It was set in the initial slide. You can reset this
number by positioning the pointer on top of the blue line
close to the time ruler and right clicking.
• Why are the values for SW1 and SW2 defined this way?
You need to understand.
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Save Test Bench Definition
• The Test Bench is not added to the project until you have
saved this file
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Test Bench & Project
• Note that the Test Bench
TB_Equals has been added
to the project
• Select the “Behavioral
Simulation” from the pulldown menu as shown and
close the test bench
waveform window
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Activate Simulation
• Make sure that
TB_Equals.tbw is selected
• Note the entries in figure
• We want to use Simulate
Behavioral Model
• This will create a new set
of windows that are
separate from ISE
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Wave Default
• Multiple windows will appear on ModelSim SE 6.1b
• Values are not visible!
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Zoom to View Wave
• You can select a different window for printing. You can also
output the “wave” window as a .bmp file for your report.
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Close Windows
• Close ModelSim and ISE 8.1i windows
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Now wasn’t that simple ?
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And don’t you forget it !
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