9600 Mobile Digital C-Arm

Transcription

SERIES9600
™
RIGHT DISPLAY
LEFT DISPLAY
LEFT
CONTROL PANEL
IMAGE FUNCTIONS
INTERFACE PCB
SCH. #874750
DIGITAL TO ANALOG CONVERSION
ANALOG TO DIGITAL CONVERSION
PIO CONTROL AND STATUS
INTERFACE TP TO SYSTEM
SERIAL COMMUNICATIONS TO
MONITOR CART AND
CONTROL PANEL PROCESSOR
CONTROL PANEL
PROCESSOR PCB
SCH. #875601
COLLIMATOR
MOTOR DRIVERS
I.I. FIELD SELECTION
CAMERA AND
COLLIMATOR CONTROLS
SOLID STATE DISK DRIVE &
CONTROLLER FOR FLOPPY DRIVE
CONTROL PANEL
ASSEMBLY
877000
X-RAY TUBE
ANALOG INTERFACE PCB
SCH. # 876738
LOADS & RUNS DOS &
APPLICATION SOFTWARE
RIGHT
CONTROL PANEL
X-RAY ON
SWITCH
IMAGE SYSTEM INTERCONNECT
REFER TO 875410* OR 877971**
CARD RACK
ASSEMBLY
875538
TECHNIQUE PROCESSOR PCB
SCH. #876735* or 877742**
IMAGE
INTENSIFIER
&
POWER SUPPLY
A/D DATA
COMPUTER BUS
INTERFACES CONTROL SWITCHES
DRIVES LEDS AND DISPLAY
SERIAL COMMUNICATIONS TO TP
MOTHERBOARD
SCH. #875539
FAST STOP
SWITCH
FAST STOP
SWITCH
CAMERA ROTATION
CAMERA GAIN
VIDEO LEVEL INDICATOR
SERIAL COMMUNICATIONS
CCD
CAMERA
POWER & SIGNAL
INTERCONNECT & DISTRIBUTION
MRESET*
XRAY SWITCH
XRAY LAMP
SERIAL COMM.
EMERGENCY OFF
HANDSWITCH
INTERCONNECT
CABLE TO / FROM
WORKSTATION
AC TO
+24V TO
CAMERA & II STATOR
AC
X-RAY DISABLE
VIDEO STABLE
FLUORO
STORE
SERIAL COMM.
CAMERA VIDEO
POWER
AC
BATTERIES
POWER/SIGNAL
INTERFACE PCB
SCH. # 876001*
OR 877998**
PRE-CHARGE
CIRCUITRY
K1, K2, C2, C3, R1
DARLINGTON
DRIVERS
Q1, Q2
INTERFACES AC & DC POWER,
CONTROL SIGNALS, AND
B+ VOLTAGE
PS 1
+15-15 +5
AC & +24V
AC
STATOR
TRANSFORMER
PROVIDES 40VAC
STATOR RELAYS
STATOR SENSE
LIFT RELAYS
II POWER RELAY
EMERGENCY OFF INTERFACE
+24 VOLT INTERLOCK RELAY
AUTO START RELAY
PS 2
+24
DRIVE SIGNALS
FILTER
CIRCUIT
POWER/SIGNAL
DISTRIBUTION PCB
SCH. #875968
ELEVATION
MOTOR
& LIMIT SWITCHES
ROTATION RELAYS
SWITCH INTERFACING
ROTATION
MOTOR
& LIMIT SWITCHES
L-ARM MOTOR
POWER PCB
SCH. #876378
C-ARM
ELEVATION
&
ROTATION
SWITCHES
AC
L1, C1
GENERATOR
DRIVER PCB
SCH. # 877461
HIGH VOLTAGE
TANK
AC
AC
POWER/MOTOR
RELAY PCB
SCH. # 875997
FOOTSWITCH
FILAMENT REGULATOR (MA)
DARLINGTON DRIVERS (KV)
SATURATION FAULT DETECTOR
X-RAY
REGULATOR PCB
SCH. #877458
KV CONTROL & SENSE
MA CONTROL & SENSE
FAULT PAL & CIRCUITRY
HV STEP-UP XFMR
HV RECTIFIER
FILAMENT STEP-DOWN XFMR
KV & MA SENSING
BATTERY
CHARGER PCB
SCH. # 876643*
or 877995**
CHARGES BATTERIES
PRECHARGE OUTPUT
REFER TO
MAINFRAME INTERCONNECT DIAGRAM
875500*
OR
877972**
9600 C-Arm
For Reference Only
CARM_BLK.DS4
HIGH VOLTAGE CABLES
TO X-RAY TUBE
GENERATOR
CONTROLLER
ASSEMBLY
875392
*=Use for system serial numbers 69-0001 to 69-1000
**=Use for system serial numbers 69-1001 and up
Page 1 of 2
12/3/96
9600 C-Arm Block Diagram
SCH. 877742
SCH. # 876738
LOADS & RUNS DOS &
APPLICATION SOFTWARE
IMAGE FUNCTION
PCB
SCH. #878398
DIGITAL TO ANALOG CONVERSION
ANALOG TO DIGITAL CONVERSION
PIO CONTROL AND STATUS
INTERFACE TP TO SYSTEM
SERIAL COMMUNICATIONS TO
MONITOR CART AND
IMAGE SYSTEM
INTERCONNECT
REFER TO 878377
CARD RACK
ASSEMBLY
878381
X-RAY TUBE
COLLIMATOR
MOTOR DRIVERS
I.I. FIELD SELECTION
CAMERA AND
COLLIMATOR CONTROLS
SOLID STATE DISK DRIVE
WITH APPLICATIONS
SOFTWARE ON SRAM CARD
CONTROL PANEL
ASSEMBLY
877000
CONTROL PANEL
PROCESSOR PCB
SCH. #878486
IMAGE
INTENSIFIER
&
POWER SUPPLY
INTERPRETS CP SWITCHES
DRIVES LEDS
DRIVES DISPLAYS
TO TECHNIQUE PROC.
A/D DATA
COMPUTER BUS
CCD
CAMERA
LEFT & RIGHT
DISPLAYS
MOTHERBOARD
SCH. #878396
POWER & SIGNAL
INTERCONNECT & DISTRIBUTION
CAMERA
VIDEO
CONTROL PANEL
PROCESSOR I/O PCB
SCH. #878489
STATOR
TRANSFORMER
PROVIDES 40VAC
INTERCONNECT CABLE
TO / FROM WORKSTATION
BATTERIES
X-RAY DISABLE
VIDEO STABLE
FLUORO
STORE
SERIAL COMM.
CAMERA VIDEO
FOOTSWITCH
SIGNALS
POWER/SIGNAL
INTERFACE PCB
SCH. # 877998
PRE-CHARGE
CIRCUITRY
K1, K2, C2, C3, R1
AC
DARLINGTON
DRIVERS
Q1, Q2
BATTERY
CHARGER PCB
SCH. # 877995
B+ VOLTAGE
DRIVE SIGNALS
INTERFACES AC & DC POWER,
CONTROL SIGNALS, AND
AC
POWER/MOTOR
RELAY PCB
SCH. # 875997
AC,+24V
AC POWER
& SWITCH
INTERFACE
STATOR RELAYS
STATOR SENSE
LIFT RELAYS
II POWER RELAY
EMERGENCY OFF INTERFACE
+24 VOLT INTERLOCK RELAY
AUTO START RELAY
X-RAY ON
SWITCH
COLUMN I/O PCB
SCH. #878492
CABLING
CONNECTIONS
FOR CPP PCB
AND SWITCHES
FAST STOP
SWITCHES
SIGNALS
CHARGES BATTERIES
PRECHARGE OUTPUT
POWER
AC
AC
FILTER
CIRCUIT
L1, C1
GENERATOR
DRIVER PCB
SCH. # 877461
HIGH VOLTAGE
TANK
CABLING
CONNECTIONS
FOR CPP PCB
AC TO
+24V TO
CAMERA & II STATOR
AC
HANDSWITCH
LEFT & RIGHT
CONTROL PANELS
FILAMENT REGULATOR (MA)
DARLINGTON DRIVERS (KV)
SATURATION FAULT DETECTOR
X-RAY
REGULATOR PCB
SCH. #877458
PS 1
+15-15 +5
PS 2
+24
ELEVATION
MOTOR
& LIMIT SWITCHES
L-ARM MOTOR
POWER PCB
SCH. #876378
KV CONTROL & SENSE
MA CONTROL & SENSE
FAULT PAL & CIRCUITRY
HV STEP-UP XFMR
HV RECTIFIER
FILAMENT STEP-DOWN XFMR
KV & MA SENSING
9600 C-Arm
REFER TO MAINFRAME
INTERCONNECT DIAGRAM #878376
HIGH VOLTAGE CABLES
TO X-RAY TUBE
GENERATOR
CONTROLLER
ASSEMBLY
875392
C-ARM
ELEVATION
&
ROTATION
SWITCHES
Use for system serial numbers
69-2001 and up
and 62-001 and up
ROTATION
MOTOR
& LIMIT SWITCHES
For Reference Only
CARM_BLK.DS4
Page 2 of 2
12/3/96
9600 C-Arm Block Diagram
PART OF GENERATOR
CONTROLLER ASY.
DRAWING #875392
P2
3
2
GENERATOR DRIVER PCB
SCH. #877461
CURRENT LOOP
Q1
L1
(1B7)
Q2
(1B8)
PRI.I
1.6 VOLT TRIP POINT AT TP1
TP1(1A8)
(1A7)
2
7
U1
+5 CR3 3
4
P1
VOLTAGE DROP B+
FROM Q1
R25
R14
10K
10K
CR27
VR1
4
C1
P2
(1A7)
Q9
(1A6)
VOLTAGE DROP
FROM Q2
R19
CR23
R18
100K
U2 PINS
17 14 13
FAULT
SATURATION
L H
L H H
OVERLOAD
H L H
MOTHERBOARD
SCH. #875539 OR #878396
L
OVERVOLTAGE
R12
SCH. # 876738
R11
R36
R37
TP7 P3
12
2
+12
12 SATDET
(1A6)
A2J3
10K
8V REFERENCE
34
7
2 +U14 FAULT_1 U36
TP3
(2A2)
U7
HV
(2A3)
DRIVE 14 DRVON
U11 8
PAL
9
2
TP17
17 OVERLOAD
U2
11
FAULT
SATURATIONTP16
PAL
16 7
14
FAULT
13
(1A6)
(1A6)
13
U36 18 5
FAULT
15
9
U36
P3
P2
12
31
17
U46
7
14
4
33
U46 16 15
5
9
13
6 U46 14 17
32
(2A7)
CR20
TAP1
TAP2
P4
5
4
(2D8)
TP1 TP2 TP21 TP22
Disables HV DRA & HV DRB
when Fault is detected
+5V
TP24
+5V
37 OVER VOLTAGE FAULT
2 +U32
AC
IN
(2D6)
3 U33
+
SECTAP
26
45
11
TP23
+15V
+15V
VR1
(1B4)
TP23
+12V
TP24
-15V
VR2
(1B4)
-12V
TP22
+5V
U7
ADC
U3
MUX
(1D6)
HIGH VOLTAGE TANK
TP25
+12V
(2D7)
R100
HIGH VOLTAGE
TRANSFORMER
T1
(2B7)
(2A7)
(1A5)
U36
U27
PIO
(2A7)
(1A5)
U36
3 14
(1B7)
B A
J1
C
D
FAULT PAL OUTPUT TRUTH TABLE
(1D5)
28 14
TP5
GND
X-RAY REGULATOR PCB
SCH. # 877458
9600 C-ARM
For Reference Only
Page 1 of 1
96FAULTS.DS4
12/4/96
GENERATOR KV CIRCUIT FAULTS
FUNCTIONAL DIAGRAM
9600 Digital Mobile C-Arm - Generator Block Diagrams, Test Points, and Signal Waveforms
Test Conditions
OVERLOAD FAULT
TRIP POINT = 1.6 VOLTS
In the manual fluoro mode, use
a technique of 50 kV and 1 mA
for the majority of this lab.
Other kV settings will be useful for
observing a change in DC voltages.
Note these unique kV settings on
this worksheet for future reference.
PRI.I
100 mV dc
100 us
The waveforms represent
normal X-ray on conditions
at 50 KV @ 1 ma.
3
2
P2
OVER VOLTAGE FAULT
TRIP POINT = 30 VPP (140 KVP)
TP1
U1
PRI I
R11
R12
2
3
7
U2
TAP1
A2J3
12
2
17
THESE COMPONENTS ARE COVERED
BY THE BATTERY CHARGER PCB
5
P3
7 14
13
U14
TP5
GND
R35
R36
U11
200 mV dc
100 us
9
8
U7
TP3
U32
SATDET
U33
7
27
3
TP17
OVLD
TP16SATF
CR20
14
9
54
P4
OEC-DIASONICS,INC.
X-RAY REGULATOR
00-873616- ( )
SATURATION FAULT
TRIP POINT = 8 VOLTS
FAULT PAL OUTPUT TRUTH TABLE
FAULT PAL U2
OUTPUTS
TP17
TP16
U7
PIN 9
2 V dc
50 us
H
OVERVOLTAGE
H
SATURATION
OVERLOAD
SATDET
H
9600 GENERATOR
H
DRVON
H
2 V dc
50 us
Page 1 of 1
96FLT_SS.DS4
8-21-96
9600 GENERATOR FAULTS
WORKSHEET
9600 Mobile Digital C-Arm - Generator Block Diagrams, Test Points, and Waveforms
SEE SERVICE MANUAL
FOR SWITCH & LED
DIAGNOSTIC UTILITIES
U30
(1C5)
75 75
MRESET* 12
U43
13
14
(1B8)
P1 CONNECTS TO THE LEFT CONTROL PANEL
P2 CONNECTS TO THE RIGHT CONTROL PANEL
U13
(2D5)
KEYPAD
COLUMN
INPUT
LATCH
U6
(1C7)
VFD
BUFFER
U12
U11&16
(23D)
(2C5)
KEYPAD
ROW
OUTPUT
LATCH
A8-14
TP2
+5V
LED
LATCHES
(1-16)
D
A8-14
A0-7
U9
RESET*
(1B3)
CONTROLS &
DISPLAY
INTERFACE
TP11
LS1
TP5
(1B3)
28
TP4
Q1
24 EMEROFF_HI
4
25 EMEROFF_LO
3
27 X-RAY_LAMP
9
U7
P1
(1B2)
PAL
MICROPROCESSOR
PWR/MTR
SEE 24V INTERLOCK
RELAY PCB
BLOCK DIAGRAM
SCH. #875997
X-RAY_ON
U1
15
SEE X-RAY ON BLOCK DIAGRAM
FOR DETAIL OF X-RAY ON SIGNAL
CHIP
SELECTS
U3
+12V
(1D5)
DS1 BLINKS
ON AND OFF
TO INDICATE
VCC
THAT THE
MICROPROCESSOR
DS1
IS EXECUTING CODE
(1A3)
80C188
CR1
(1B5)
CONTROL
PANEL
PROCESSOR
PCB
SCH. #875601
U5
(1C4)
16
6
5 4
23
MRESET*
U14
36
U15
67 80C196
10MHZ
TP 1, 3,
12, 13
1
WATCHDOG
TIMER
150MS
(1D4)
X-RAY_LAMP SIGNAL TO WORKSTATION
8
(1B2)
MEMORY AND ADDRESSING
+5V
TP8
Y1
TP 3
A0-7
AD O-15
Q2
D
SRAM
A0-7
(1B3)
(1C1)
A0-7
A0-7 EPROM
AD 0-7
57
U4
U2
(1C3)
6
(1B7)
LATCH
TECHNIQUE
PROCESSOR
PCB
SCH.# 876735
P1 & P2
U36
3 +5V
7
18
17
P9
P1
1
1
TO OPTO ISOLATORS U50 & 51
ON ANALOG INTERFACE PCB
SEE WORKSTATION
CONTROL AND
COMMUNICATIONS
BLOCK DIAGRAM FOR A
CONTINUATION OF THE
INTERCONNECT CABLE SIGNALS
(SEE X-RAY ON BLOCK DIAGRAM
FOR DETAILS OF TH ESE CIRCUITS)
1
EMEROFF_HI
10
9
14
14
12
11
15
15
X-RAY_SWITCH 14
13
16
16
2
2
1
18
18
10
16
15
17
17
17
18
5
5
19
19
19
X-RAY_LAMP
SECURITY
X-RAY_SWITCH
INTERCONNECT CABLE
J6
EMEROFF_LO
SECURITY
SWITCHES
P10
POWER
PANEL
P2
16
84
P4
J1-5
X-RAY_SWITCH
9 SECURITY
FROM HANDSWITCH
X-RAY_SWITCH
SECURITY
FROM FOOTSWITCH
P7
TP2
+5V
19
(1A3)
+12
CHASSIS GND 19
SEE PAGE 2 FOR
COMMUNICATION
CIRCUITRY
+12
VR2 +15
-12
-15
VR1
(1B7)
MICROPROCESSOR
P6
1 3
1 3
P7
1 5 2 4 3
P5
POWER/SIGNAL
INTERFACE PCB
SCH. #876001
4
5
SEE SYSTEM POWER BLOCK DIAGRAM
FOR DETAILS OF POWER DISTRIBUTION
P8
MAINFRAME
MOTHERBOARD
SCH. #875539
FAST STOP
SWITCHES
REFERENCE TO
9600 C-ARM INTERCONNECT DIAGRAM
875500
9600 C-ARM
For Reference Only
CPP_TP_1.DS4
XRAY SWITCH
USE THIS DIAGRAM
ON SYSTEM SERIAL NUMBERS
69-0001 TO 69-1000
Page 1 of 3
6/4/96
CONTROL PANEL PROCESSOR/
TECHNIQUE PROCESSOR
BLOCK DIAGRAM
U5
TP10
80C196
P4
E3
2 1
(1C4)
RXD 17
CTS
2 1
(1B7) 14 TECH_RTS_HI
13
U10 15 TECH_RTS_LO
44
E2
RTS
14
15
TP7
39
MICROPROCESSOR
TP 1, 3,
12, 13
9
10
TECH_TXD_HI
11
12
TECH_TXD_LO
13
14
TECH_RTS_HI
15
16
TECH_RTS_LO
6
U2
5
14
7
U8
TECH_RXD_HI
TECH_RXD_LO
13 (1B7)
6
TECH_CTS_HI
7
U8
TECH_CTS_LO
5
+5V
TP8
CONTROL
PANEL
PROCESSOR
PCB
SCH. #875601
3
4
2
TECH_RXD_LO 9 U1
7
8
TECH_CTS_HI 14
5
6
TECH_CTS_LO 15 U1
12
12
J5 P2
TECH_TXD_HI
BUFFER
TXD_A
103 103
3
TP12
20
17
TP2
+5V
TXD
TP 3
TP14
RTS_TECH
U2 15
13
13
TECH_RTS_HI
RTS_A
104 104
25
15
5
RTS
U37
TP1
TECH_RXD_HI 10
1
TXD_TECH
P1
TP4
13
TP6
TXD 18
P9
TP3
10 TECH_TXD_HI
11
U10 9 TECH_TXD_LO
TP9
P10
10
TECH_RXD_HI
101 101
RXD_A
2
CTS_A
4
2
18
TP2
13
U38
3
11
TECH_CTS_HI
102 102
4
16
U38
19
MICROPROCESSOR
RXD
U30
(1C5)
TP11
(4A5)
CTS_TECH 11
A
TP10
(4A4)
RXD_TECH 10
11
5
27
MAINFRAME
MOTHERBOARD
SCH. #875539
CTS
BUFFERED
ADDRESS BUS
U39
(4A7)
TP16
POWER/SIGNAL
INTERFACE PCB
SCH. #876001
IFBTX
70 70
RXD_D
19
TP13
RS422
SERIAL
COMMUNICATION
IFBRX 72 72
P3
21
TXD_D
44
20
U5
(4B3)
18
S1
80C188
RXD
D
43 TXD
1
RS-232
DRIVER/
RECEIVER
22
BUFFERED
DATA BUS
SWITCHES 1 & 2 OF SW1
MUST BE ON TO ENABLE
SERIAL
COMMUNICATIONS
CONTROLLER
(3B8)
1
2
8
7
2 U35 18
4 (3B6) 16
TECHNIQUE
PROCESSOR
PCB
SCH.# 876735
BUFFER
TXD = TRANSMIT DATA
RTS = REQUEST TO SEND
RXD = RECEIVE DATA
CTS = CLEAR TO SEND
U17
P2
(1D8)
1
9
2
19 TX
RX
U16
IMAGE
FUNCTIONS
PCB
SCH.#874750
MICROCONTROLLER
9600 C-ARM
For Reference Only
CPP_TP_1.DS4
USE THIS DIAGRAM
69-0001 TO 69-1000
Page 2 of 3
6/4/96
C-ARM COMMUNICATIONS
BLOCK DIAGRAM
TXD = TRANSMIT DATA
RXD = RECEIVE DATA
CTS = CLEAR TO SEND
TP2
+5V
TP 3
U52
U39
(1B3)
(4A7)
P2
RXD
CTS
8
23
B
TXD
RTS
7
21
SERIAL
COMMUNICATIONS
CONTROLLER
20
3
1
2
P1
U27
(1B5)
19
4
18
5
RXD_B
CTS_B
TXD_B
RTS_B
RS-232
DRIVER/RECEIVER
TP17
J5
105 105
MFRXD
8
20
106 106
MFCTS
21
107 107
MFTXD
22
108 108
MFRTS
23
TP19
3
MFRXD
12
(1C7)
MFCTS
9
15
MFTXD
2
14
MFRTS
28
28
SD0-7
MFRXD
8
9
U16 10
30
386
MOTHERBOARD
TXDA
(1C7)
5
U16 4
26
26
MFCTS
21
21
MFTXD
13 U15
18
18
MFRTS
1 U15
6
29
11
3
OP0
31
RXDA
7
IP0
(1B4)
MAINFRAME
MOTHERBOARD
SCH. #875539
J1 ON
POWER
PANEL
1
1 LEMO CONNECTOR PINS SHOWN
REFERENCE TO
MAINRAME INTERCONNECT DIAGRAM
#875500
P3
TP12
TP9
C-ARM
13
P14
TP11
P10
(1B4)
TP18
TECHNIQUE
PROCESSOR
PCB
SCH.# 876735
P2
INTERCONNECT
CABLE
TP 2&16
+5V
TP 1&6
+12V
TP 7
DUAL UART
TP 1-4
TP 9
-12V
AT COMM PCB
SCH. #872125
AUX INTERFACE PCB
SCH. #876502
WORKSTATI0N
9600 C-ARM
REFERENCE TO
9600 WORKSTATION INTERCONNECT DIAGRAM
#876158
USE THIS DIAGRAM
69-0001 TO 69-1000
For Reference Only
Page 3 of 3
CPP_TP_1.DS4
6/4/96
WORKSTATION / C-ARM
COMMUNICATIONS BLOCK DIAGRAM
SEE SERVICE MANUAL
FOR SWITCH & LED
U30
(1C5)
75 75
MRESET* 12
U43
13
(1B8)
U36
14 (1B7)6
LATCH
+5V
TP6
TECHNIQUE
PROCESSOR
PCB
SCH.# 877742
P1 & P2
U13
(2D5)
KEYPAD
COLUMN
INPUT
LATCH
U6
(1C7)
VFD
BUFFER
U12
(2C5)
U11&16
(23D)
KEYPAD
ROW
OUTPUT
LATCH
LED
LATCHES
(1-16)
A8-14
D
A8-14
(1C1)
A0-7
A0-7 EPROM
D
SRAM
A0-7
A0-7
AD 0-7
U9
RESET*
(1B3)
CONTROLS &
DISPLAY
INTERFACE
+12V
TP11
TP5
(1B3)
28
TP4
Q1
3
27 X-RAY_LAMP
9
P1
(1B2)
PAL
PWR/MTR
SEE 24V INTERLOCK
RELAY PCB
BLOCK DIAGRAM
SCH. #875997
X-RAY_ON
U1
15
SEE X-RAY ON BLOCK DIAGRAM
FOR DETAIL OF X-RAY ON SIGNAL
CHIP
SELECTS
U3
LS1
(1D5)
DS1 BLINKS
ON AND OFF
TO INDICATE
VCC
THAT THE
MICROPROCESSOR
DS1
IS EXECUTING CODE
(1A3)
4
U5
(1C4)
16
6
5 4
CONTROL
PANEL
PROCESSOR
PCB
SCH. #875601
U15
67 80C196
10MHZ
23
WATCHDOG
TIMER
150MS
(1D4)
POWER
PANEL
3 +5V
7
P9
P1
17
1
1
9
14
14
18
EMEROFF_HI
10
EMEROFF_LO
12
11
15
15
X-RAY_SWITCH 14
13
16
2
1
18
16
15
17
17
17
18
5
5
+12
19
19
19
-12
X-RAY_LAMP
SECURITY
X-RAY_SWITCH
INTERCONNECT CABLE
SEE WORKSTATION
CONTROL AND
COMMUNICATIONS
BLOCK DIAGRAM FOR A
CONTINUATION OF THE
J6
P10
SECURITY
SWITCHES
P2
16
84
P4
MRESET*
U14
36
J1-5
CR1
TP 1, 3,
12, 13
1
X-RAY_LAMP SIGNAL TO WORKSTATION
8
(1B2)
+5V
TP8
Y1
24 EMEROFF_HI
25 EMEROFF_LO
U7
(1B5)
Q2
MICROPROCESSOR
A0-7
AD O-15
(1B3)
80C188
TP 3, 7,
8, 9
U4
U2
(1C3)
57
1
X-RAY_SWITCH
9
SECURITY
16
2
X-RAY_SWITCH
18
10
SECURITY
FROM HANDSWITCH
FROM FOOTSWITCH
P7
TP2
+5V
19
(1A3)
+12
CHASSIS GND 19
SEE PAGE 2 FOR
COMMUNICATION
CIRCUITRY
VR2 +15
-15
VR1
(1B7)
MICROPROCESSOR
P6
1 3
1 3
P7
1 5 2 4 3
P5
POWER/SIGNAL
INTERFACE PCB
SCH. #877998
4
5
P8
MAINFRAME
MOTHERBOARD
SCH. #875539
FAST STOP
SWITCHES
REFERENCE TO
877972
9600 C-ARM
For Reference Only
CPP_TP_2.DS4
XRAY SWITCH
USE THIS DIAGRAM
69-1001 TO 69-2000
Page 1 of 3
6/4/96
TECHNIQUE PROCESSOR
BLOCK DIAGRAM
RXD
TP10
10 TECH_TXD_HI
11
U10 9 TECH_TXD_LO
17
TP9
80C196
(CTS)
P4
E3
2 1
U5
(1C4)
2 1
(1B7) 14 TECH_RTS_HI
13
U10 15 TECH_RTS_LO
44
E2
TXD
14
15
(RTS)
TECH_RXD_HI
U8
TECH_RXD_LO
13 (1B7)
6
TECH_CTS_HI
7
U8
TECH_CTS_LO
5
TP7
39
MICROPROCESSOR
+5V
TP8
TP 1, 3,
12, 13
10
11
12
TECH_TXD_LO
13
14
TECH_RTS_HI
P9
TP3
TECH_TXD_HI
6
U2
5
14
16
TECH_RTS_LO
3
4
TECH_RXD_HI 10
J5 P2
BUFFER
15
TXD_TECH 12
12
TECH_TXD_HI
103 103
RTS_TECH 13
13
TECH_RTS_HI
104 104
RTS_A
5
15
3
17
1
2
7
8
TECH_CTS_HI 14
5
6
TECH_CTS_LO 15 U1
+5V
TP6
TXD
TP33
25
TP 3, 7,
8, 9
RTS
U37
11
TP10
RXD_TECH 10
10
TECH_RXD_HI
101 101
18
14
1
19
MICROPROCESSOR
RXD
U30
TP2
13
2
RXD_A
A
TP30
(4A4)
TP31
TP11
CTS_TECH 11
11
TECH_CTS_HI
4
CTS_A
102 102
16
MAINFRAME
MOTHERBOARD
SCH. #875539
CONTROL
PANEL
PROCESSOR
PCB
SCH. #875601
20
TP13
TP1
TECH_RXD_LO 9 U1
TP32
TP12
TXD_A
TP4
U2
15
7
P1
13
TP6
18
9
P10
1
TP18
POWER/SIGNAL
INTERFACE PCB
SCH. #877998
IFBTX
70 70
RXD_C
20
IFBRX 72 72
P3
21
COM 15
SEL
27
CTS
BUFFERED
ADDRESS BUS
21
U38
U39
20
(4B5)
(4A7)
5
BUFFERED
DATA BUS
18
19
TXD_C
80C188
U5
TP20
RS422
SERIAL
COMMUNICATION
2
(1C5)
(4B3)
19
2
1
18
U53
23
(4C5)
RS-232
DRIVER/
RECEIVER
22
7
8
PORT
SEL
2 S1
10
TP38
TP40
36
37
RXD
C
TXD
SERIAL
COMMUNICATIONS
CONTROLLER
(3B8)
8
7
1
2
2 U35
4 (3B6)
18
16
TECHNIQUE
PROCESSOR
PCB
SCH.# 877742
BUFFER
TXD = TRANSMIT DATA
RXD = RECEIVE DATA
CTS = CLEAR TO SEND
1
THESE 2 SIGNALS, COM_MODE_0 & COM_MODE_1
GO TO U53 & U38 TO SELECT SERIAL COMMUNICATIONS
FOR C-ARM OR UROVIEW
2
SWITCHES 1 & 2 OF SW1 MUST BE ON TO
ENABLE SERIAL COMMUNICATIONS
U17
P2
(1D8)
1
9
2
19
U16
IMAGE
FUNCTIONS
PCB
SCH.#874750
RX
TX
MICROCONTROLLER
9600 C-ARM
For Reference Only
CPP_TP_2.DS4
USE THIS DIAGRAM
69-1001 TO 69-2000
Page 2 of 3
6/4/96
BLOCK DIAGRAM
TXD = TRANSMIT DATA
RXD = RECEIVE DATA
CTS = CLEAR TO SEND
+5V
TP6
COM
SELECT
U39
(4A7)
RXD
8
16
23
B
TXD
RTS
TP 3, 7,
8, 9
TP34
TP35
CTS
U52
(1B3)
7
21
P2
U38
20
4
3
19
RXD_B
4
CTS_B
J5
105 105
MFRXD
P2
20
106 106
MFCTS
21
TP14
SD0-7
P14
P3
28
28
MFRXD
8
26
26
MFCTS
6
TP11
P10
8
13
MFRXD
3
12
MFCTS
(1C7)
(4B5)
17
TP36
TP37
SERIAL
COMMUNICATIONS
CONTROLLER
3
1
2
18
5
TXD_B
RTS_B
RS-232
DRIVER/RECEIVER
P1
U27
(1B5)
30
386
MOTHERBOARD
TXDA
(1B4)
TP15
TP12
TP16
107 107
MFTXD
108 108
MFRTS
TP17
TECHNIQUE
PROCESSOR
PCB
SCH.# 877742
9
U16 10
22
23
9
15
MFTXD
2
14
MFRTS
(1C7)
5
U16 4
29
21
21
MFTXD
13 U15
18
18
MFRTS
1 U15
11
3
OP0
31
RXDA
7
IP0
(1B4)
MAINFRAME
MOTHERBOARD
SCH. #875539
J1 ON
POWER
PANEL
1
INTERCONNECT
CABLE
TP 2&16
+5V
TP 1&6
+12V
TP 7
DUAL UART
TP 1-4
TP 9
-12V
AT COMM PCB
SCH. #872125
AUX INTERFACE PCB
SCH. #876502
C-ARM
REFERENCE TO
#877972
WORKSTATI0N
REFERENCE TO
#877970
9600 C-ARM
For Reference Only
CPP_TP_2.DS4
USE THIS DIAGRAM
69-1001 AND UP
Page 3 of 3
6/4/96
WORKSTATION / C-ARM
J5 P2
U30
(1C5)
J1
SEE SERVICE MANUAL
FOR SWITCH & LED
TO
IMAGE FUNCTION PCB
P2-90
90
75 75
MRESET* 12
U43
13 14
(1B8)
U36
LATCH
TP2
+5V
P1 & P2
J2 P5
U13
(1C7)
CONTROL
PANEL
PROCESSOR
PCB
SCH. #878486
P4
P10
18
17
POWER/SIGNAL
INTERFACE PCB
SCH. #877998
P9
10
9
EMEROFF_HI
14
18
24 EMEROFF_HI
12
11
EMEROFF_LO
15
15
25 EMEROFF_LO 3
16
U9
(1C3)
D
U10
A8-14
(1C1)
A0-7
A0-7 EPROM
LED
LATCHES
(1-16)
D
U7
SRAM
CONTROLS &
DISPLAY
INTERFACE
X-RAY_LAMP*
17
16
X-RAY_SWITCH
16
14
18
17
15
14
13
2
1
SECURITY
A0-7
A0-7
U12
P1
(1B5)
RESET*
(1B3)
U8
PAL
CHIP
SELECTS
J6
U14
(2D5)
KEYPAD
COLUMN
INPUT
LATCH
U1
(1B2)
AD O-15
+5V
R1
1
4
+5V
TP3
TP6
U11
TP8
Y1
(1D5)
DS1 BLINKS
ON AND OFF
TO INDICATE
VCC
THAT THE
MICROPROCESSOR
DS1
IS EXECUTING CODE
(1A3)
Q1
(1C4)
16
6
1
5 4
36
U2
67 80C196
10MHZ
23
WATCHDOG
TIMER
150MS
U3
P3
TP 1, 9,
7, 4
J3
CR2
+5V
MRESET*
9
31 31
SECURITY
7
P8
X-RAY_LAMP
+12
(1D4)
+12V
20 20
19
EMEROFF_LO
LS1
-12
S2
3
1
FAST STOP
SWITCHES
3
MICROPROCESSOR
EMEROFF_HI
CONTROL PANEL
PROCESSOR I/O PCB
SCH. #878489
COLUMN I/O PCB
SCH. #878492
1
P9
VR2 +15
-15
VR1
(1B7)
(1B3)
Q2
SEE PAGE 2 FOR
COMMUNICATION
CIRCUITRY
10
P7
3
FROM HANDSWITCH
X-RAY_SWITCH
2
XRAY SWITCH
9
(1B3)
(1A3)
X-RAY_SWITCH
9 SECURITY
2 X-RAY_SWITCH
1
3 +5V
28
INTERCONNECT
CABLE
5
CR1
TP5
SECURITY
X-RAY_SWITCH
16
84
P10
POWER
PANEL
SEE WORKSTATION CONTROL AND
COMMUNICATIONS BLOCK DIAGRAM FOR A
CONTINUATION OF THE
J1 P4
A0-7
SEE 24V INTERLOCK
BLOCK DIAGRAM
X-RAY_ON
U1
15
SEE X-RAY ON
BLOCK DIAGRAMFOR DETAILS
OF X-RAY ON SIGNAL
X-RAY_LAMP*
SIGNAL TO
WORKSTATION J1-5
8
KEYPAD
ROW
OUTPUT
LATCH
(1B2)
9
CR1
(2C5)
AD 0-7
4
27 X-RAY_LAMP*
U5&6
(2D3)
A8-14
PWR/MTR
RELAY PCB
SCH. #875997
1
P2
VFD
BUFFER
MICROPROCESSOR
P5
1
MRESET*
TP 3
80C188
TECHNIQUE
PROCESSOR
PCB
SCH.# 877742
6 57
(1B7)
SECURITY
FROM FOOTSWITCH
3
6
P5
MAINFRAME
MOTHERBOARD
SCH. #878396
9600 C-ARM
S1
For Reference Only
REFERENCE TO
878376
USE THIS DIAGRAM
69-2001 AND HIGHER &
62-0001 AND HIGHER
CPP_TP_3.DS4
Page 1 of 3
6/4/96
TECHNIQUE PROCESSOR
BLOCK DIAGRAM
U11
(1C4)
RXD
TP12
P3
J3
P4
5
5
9
P10
10 TECH_TXD_HI 3
11
U4 9 TECH_TXD_LO 4
TP11 2 1
(1B7)
13
44
14 TECH_RTS_HI 1
3
10
TECH_TXD_HI
6
4
6
6
11
12
TECH_TXD_LO
1
7
7
13
14
TECH_RTS_HI
8
8
15
16
TECH_RTS_LO
U4 15 TECH_RTS_LO 21 21
E2
U2 7
TP13
TXD
TP10
(RTS)
14
15
39
MICROPROCESSOR
U15
TECH_RXD_LO 30 30
13
(1B7)
TECH_CTS_HI 14 14
6
7 U15
TECH_CTS_LO 13 13
5
+5V
TP3
TP 1, 4,
7, 9
TECH_RXD_HI 11 11
CONTROL
PANEL
PROCESSOR
PCB
SCH. #878486
2
2
3
4
TECH_RXD_HI
U2 15
1
1
2
TECH_RXD_LO
4
4
7
8
TECH_CTS_HI
14
3
3
5
6
TECH_CTS_LO
15
CONTROL
PANEL
PROCESSOR
I/O PCB
SCH. #878489
9
U1
TXD_TECH 12
12
RTS_TECH 13
13
TXD_TECH
103 103
TXD_A
104 104
RTS_A
5
RTS_TECH
TP1
3
25
17
TP10
RXD_TECH 10
11
10
RXD_TECH
TP 3, 7,
8, 9
RTS
101 101
11
CTS_TECH 11
13
CTS_TECH
102 102
18
14
1
19
4
CTS_A
16
1
70 70
RXD_C
J1
P2
71
71
20
2
COM 15
SEL
TXD_C
21
U38
20
(4B5)
5
CTS
BUFFERED
ADDRESS BUS
U39
(4A7)
BUFFERED
DATA BUS
18
80C188
U5
(4B3)
19
2
1
18
23
U53
(4C5)
73
73
10
TP38
8
36
RXD
TP40
7
RS-232
DRIVER/
RECEIVER
PORT
SEL
37
C
TXD
SERIAL
COMMUNICATIONS
CONTROLLER
(3B8)
U17
(1D8)
TX
U30
(1C5)
27
2 S1
U16
RXD
19
TP20
72 72
MICROPROCESSOR
TP31
TP18
IFBTX
A
TP30
(4A4)
2
RXD_A
TP11
POWER/SIGNAL
INTERFACE PCB
SCH. #877998
IMAGE
FUNCTIONS
PCB
SCH.#878398
+5V
TP6
TXD
TP33
MAINFRAME
MOTHERBOARD
SCH. #878396
COLUMN I/O
PCB
SCH. #878492
20
15
TP13
TP2
U1
TP32
TP12
IFBRX
TXD = TRANSMIT DATA
RXD = RECEIVE DATA
CTS = CLEAR TO SEND
BUFFER
J5 P2
U37
10
1
P5
TP4
5
14
13
18
P9
TP3
17
80C196
(CTS)
J1 P4
E3
2 1
TP6
1
8
2
7
2 U35 18
4 (3B6) 16
TECHNIQUE
PROCESSOR
PCB
SCH.# 877742
19
9
BUFFER
TP5
RX
MICROCONTROLLER
1
THESE 2 SIGNALS, COM_MODE_0 & COM_MODE_1
GO TO U53 & U38 TO SELECT SERIAL COMMUNICATIONS
FOR C-ARM OR UROVIEW
2 SWITCHES 1 & 2 OF SW1 MUST BE ON TO
ENABLE SERIAL COMMUNICATIONS
9600 C-ARM
For Reference Only
USE THIS DIAGRAM
62-0001 AND HIGHER
CPP_TP_3.DS4
Page 2 of 3
6/4/96
BLOCK DIAGRAM
TXD = TRANSMIT DATA
RXD = RECEIVE DATA
CTS = CLEAR TO SEND
+5V
TP6
COM
SELECT
U39
(4A7)
RXD
8
16
23
B
TXD
RTS
TP 3, 7,
8, 9
TP34
TP35
CTS
U52
(1B3)
7
21
P2
U38
20
4
3
19
RXD_B
4
CTS_B
J5
105 105
MFRXD
P2
20
8
13
MFRXD
106 106
MFCTS
21
3
12
MFCTS
TP14
SD0-7
P14
P3
28
28
MFRXD
8
26
26
MFCTS
6
21
21
MFTXD
TP11
P10
(1C7)
(4B5)
17
TP36
TP37
SERIAL
COMMUNICATIONS
CONTROLLER
3
1
2
18
5
TXD_B
RTS_B
RS-232
DRIVER/RECEIVER
P1
U27
(1B5)
30
386
MOTHERBOARD
TXDA
(1B4)
TP15
TP12
TP16
107 107
MFTXD
TP17
TECHNIQUE
PROCESSOR
PCB
SCH.# 877742
9
U16 10
108 108
MFRTS
22
9
23
15
2
14
MFTXD
(1C7)
MFRTS
18
18
MFRTS
5
U16 4
29
13 U15
1 U15
11
3
OP0
31
RXDA
7
IP0
(1B4)
MAINFRAME
MOTHERBOARD
SCH. #878396
J1 ON
POWER
PANEL
1
INTERCONNECT
CABLE
TP 2&16
+5V
TP 1&6
+12V
TP 7
DUAL UART
TP 1-4
TP 9
-12V
AT COMM PCB
SCH. #872125
AUX INTERFACE PCB
SCH. #876502
C-ARM
REFERENCE TO
#878376
WORKSTATI0N
REFERENCE TO
#877970
9600 C-ARM
For Reference Only
USE THIS DIAGRAM
62-0001 AND HIGHER
CPP_TP_3.DS4
Page 3 of 3
6/4/96
WORKSTATION / C-ARM
TEST POINTS IN PARENTHESES
INDICATE NEWER PCB
SCH. # 878486
TP1
TP1
RXD_TECH
2VDC
.5ms
RXD
TP 10
(TP 12)
TP3
.2ms
2VDC
10MHZ.
CLOCK
POWER/SIGNAL INTERFACE PCB
SCH. # 877998
ASM. # 878000
TP3
TXD_TECH
TP5
RESET*
TP4
TP4
TP3
2VDC
.5ms
TP6
TXD
TP 6
(TP 13)
TP2
TP7
.2ms
2VDC
CONTROL PANEL PROCESSOR PCB
SCH. # 875601
ASM. # 875603
TP1
TP10
MRESET*
TP 11
TP9
RTS
2VDC
1S
CTS_TECH
TP11
CTS_TECH at TP2
and
RTS_TECH at TP4
RTS_TECH
2VDC
1S
CTS
MRESET*
RESET*
TP 5
2VDC
1S
TP12
DS1
TP13
RTS at TP 7 (TP 10)
and
CTS at TP 9 (TP 11)
10 MHZ.
CLOCK
TP 4
2VDC
20MS
2VDC
5S
9600 C-ARM
COMMUNICATION SIGNALS
POWER SIGNAL INTERFACE PCB
AND
For Reference Only
CP_TP_SS.DS4
Page 1 of 3
4/23/96
TECHNIQUE PROCESSOR
SIGNAL SHEET
TEST POINTS IN
PARENTHESES
INDICATE OLDER PCB
SCH. #876735
TECHNIQUE PROCESSOR TO CONTROL PANEL PROCESSOR
AND
TECHNIQUE PROCESSOR TO IMAGE FUNCTIONS PCP
TXD_A
TP 32
(TP 12)
P1
TXD_A
TP 12
1VDC
.1ms
P2
TP9
1VDC
.100ms
TP3
RTS_A / TP13
TP31
7.3728MHZ. CLOCK
12
TP11
TP12
TP13
TP30
TP33
RTS_A at TP 13
and
CTS_A at TP 11
TP32
TP10
RTS_A
TP 33
(TP 14)
CTS_A / TP11
500ms
1VDC
U36
500ms
1VDC
SCH. # 877742
ASM.# 877744
RXD_A
TP 10
1VDC
500ms
RXD_A
TP 30
(TP 10)
500ms
1VDC
TP20
TP8
TP6 MSD
+5V
U2
LSD
TP18
TP7
U1
S2
RESET
U36 PIN 12
7.3728MHZ.
CLOCK
CTS_A
TP 31
(TP 11)
500ms
1VDC
9600 C-ARM
TP20 - TXD_C
.2ms 5VDC
TP18 - RXD_C
.2ms 5VDC
For Reference Only
Page 2 of 3
CP_TP_SS.DS4
4/23/96
TECHNIQUE PROCESSOR
SIGNAL SHEET
TEST POINTS IN
PARENTHESES
INDICATE OLDER PCB
SCH. #876735
TECHNIQUE PROCESSOR TO WORKSTATION
RXD_B
TP 34
.2ms
2VDC
P1
TP14
RXD_B
TP 14
(TP 17)
.2ms
5VDC
P2
TP16
TP3
TP9
TP17
TP15
7.3728MHZ. CLOCK
12
U36
TXD_B
TP 36
.2ms
2VDC
TXD_B
TP 16
(TP 9)
.2ms
5VDC
SCH. # 877742
ASM.# 877744
TP34
TP35
TP36
TP37
TP8
RTS_B
TP6 MSD
+5V
U2
RTS_B at TP 37
and
CTS_B at TP 35
CTS_B
10 S
2VDC
LSD
TP7
U1
CTS _B
S2
RESET
CTS_B at TP 15 (TP 18)
and
RTS_B at TP 17 (TP 19)
10VDC
10S
RTS_B
9600 C-ARM
For Reference Only
Page 3 of 3
CP_TP_SS.DS4
4/23/96
TECHNIQUE PROCESSOR
SIGNAL SHEET
14.7456 MH
Y3
(1D5)
U23-28
ADDRESS
LATCHES
RESET
WATCHDOG
TIMER
1.2 SEC
U34 (1D4)
S2
(1D3)
24
30
A
16
2
RESET
2
4
1
57
ADDRESS
DECODING GALS
MEMORY
(SHEET 2 OF SCH.)
U44-CPU (1A6)
U14-BOOTPROM
BOOT CODE FOR
MICROPROCESSOR
U45-I/O D(1D7)
(1B2-1D2)
U46-BUS (1B6)
U50
BIDIRECTIONAL
TRANSCEIVER
U47-MEMORY (1A7)
U36
13 14
3
REAL
TIME
CLOCK
U29
BUFFER
U35
(3B7)
U20-EEPROM
CAL DATA
EVENT DATA
SERIAL NUMBER
80C188
MICRO
PROCESSOR
U30
(1C5)
18
(3B8)
U15-OPTION PROM
CODE FOR SOLID
STATE DRIVE
(1B3)
MRESET*
DIAGNOSTIC
LEDS
U1 & U2
U16-19-SRAM
MICROPROCESSOR
MEMORY
6
12
(3B5)
0 0
1
S1
1. COM SEL
2. COM SEL
3. FDD OSC
4. FDD OSC
9600
ALL ON
1
REFER TO THE SERVICE MANUAL FOR A LISTING
OF THE CODES DISPLAYED ON THE BOOT/DIAGNOSTIC LEDS
2
RESET TO PIOS ON ANALOG INTERFACE PCB
3
MRESET* TO IMAGE FUNCTION PCB AND
CONTROL PANEL PROCESSOR PCB
E1
JUMPERS
9600
NOT USED
(3B7)
SOLID STATE
DISK DRIVE
U13 (3B5)
(1B4)
REAL TIME CLOCK
SERIAL
COMMUNICATIONS
CONTROLLER
U39
(4B7)
INTERRUPT
CONTROLLER
SOLID STATE DRIVE
U51
(1C6)
BI-DIRECTION
TRANSCEIVER
U49 (3B4)
SEE CONTOL PANEL PROCESSOR/
TECHNIQUE PROCESSOR
BLOCK DIAGRAM
FOR COMMUNICATION DETAILS
COMMUNICATIONS
FLOPPY DISK CONTROLLER
U48 (NOT USED)
BUFFER
U40 (5C3)
L
SCH. #876735 OR #877742
ASSY. # 877744 ASSY. #876737
+5V
+5V
TP6
TP 3, 7,
8, 9
R
DUAL PORT
RAM
U31
A
(5D7)
D
SEQUENCER
RAM
U41 (5D2)
BUFFER
U11(5D3)
ADDRESSING
COUNTERS
U42, 22, 3,
12,21,32
( 5B6-5C4)
A
RESET*
AMUXSEL 0-3
SAMPLE
PAL
U4
TP3 TP2
A/D_D0-7
P1
P2
J2
J5
P1 (Serial Numbers 69-0001 to 69-2000)
P5 (Serial Numbers 69-2001 and higher &
62-0001 and higher)
TO CONTROL PANEL
-15
+15
2
2
VR1
VR2
-12
+12
MAINFRAME MOTHERBOARD
(CARD RACK BACKPLANE)
SCH. #875539 OR #878396
P2
TO POWER PANEL/
INTERCONNECT CABLE
P3
TO IMAGE SYSTEM
HIGH VOLTAGE/SIGNAL CABLE
P4
2
2
2
2
TO P3 ON
X-RAY REGULATOR PCB
9600 C-ARM
For Reference Only
Page 1 of 2
TP_AIBK2.DS4
TECHNIQUE PROCESSOR/
ANALOG INTERFACE
BLOCK DIAGRAM
6/4/96
1
MAINFRAME MOTHERBOARD
(CARD RACK BACKPLANE)
SCH. #875539 OR #878396
1
-10V
TP33
25 KVPCONT 6
J6
P1
P2
U33
7
(P4)
23 MACONT
2
1
(P4)
U33
5
SPARE
6 FILCNTRL
(1A5-8)
U28
1
2
A
PIO
(2D7)
RESET
B
(P4)
TP13
7
U29
CAM_BLK (not used)
8
U40
X-RAY ON / DISABLE
IMAGE PATH (SHEET 2)
ABS LOOP
(1A5)
(P4)
6 HVDRVA
U42
(1A5)
2
J1
U38 A
U26
U36
PIO
(2D7)
B
TO IMAGE
FUNCTION PCB
C
KVPMEAS
MAMEAS
(P4)
CH1
(P4)
CH2
(P2)
(P3)
CH3
(P3)
CH4
(P3)
CH6
(P4)
CH8
SECTAP
(P4)
CH9
LINE_SNS
(P4)
CH10
CHGR_I
(P4)
CH11
200V_SNS
(P3)
Q3-8 & 10
(2B2)
BUFFER
FILSNS
VLI
HOUSTEMP
CAMROT
(P2&P4)
A3
S1
A/D SECTION
6
S2
U50, 51, & 52
OPTOCOUPLERS
(2C8)
(2C5)
16
CHANNEL
ANALOG
S4
MUX
U3
S5
(1D6)
S7
S3
S9
S10
SAMPLE &
HOLD
U8
Q7 - "Stator Start" - K2 on Power/Motor Relay PCB
Q6 - "II On" - K7 on Power/Motor Relay PCB
Q8 - not used
Q10 - not used
5
THE OUTPUTS OF U31 AND U18 ARE CURRENT SOURCES.
U33, 28, 29 ARE CURRENT TO VOLTAGE CONVERTERS.
6
THERE ARE 16 A/D CHANNELS, BUT ONLY 10 ARE BEING USED.
THE RANGE OF THE VOLTAGE INPUTS IS 0-10 VOLTS.
(1D5)
MASNS (MA MEASURED)
MA BLOCK
A/D
A/D_D0-7
CONV.
U7
VLI (VIDEO LEVEL INDICATOR)
ABS LOOP
(1D5)
HOUSETEMP ( X-RAY TUBE HOUSING TEMPERATURE)
STATOR RELAY / STATOR SENSE
CAMROT (CAMERA ROTATION)
CCD CAMERA MOTOR DRIVE IRIS/ROTATION MOTORS
SAMPLE*
S11
SECTAPV (SECONDARY TAP VOLTAGE)
LINE_SNS (LINE VOLTAGE SENSE)
BATTERY CHARGER
S12
CHGR_I (BATTERY CHARGER CURRENT)
BATTERY CHARGER
8
8
THE FOLLOWING SIGNALS TO THE OPTOCOUPLERS ORIGINATE FROM THE
CONTROL PANEL X-RAY SWITCH, FOOTSWITCH, AND HANDSWITCH:
XRAY SWITCH, SECURITY, FLUORO ONLY, BOOST, & L/R (SAVE).
LINE DRIVERS
200V_SNS (BATTERY B+ AND BATTERY CHARGER VOLTAGE SENSE)
BATTERY CHARGER
PRE-CHARGE
9600 C-ARM
(P4)
C
U27
Q5 - "Contact" - K2 on Generator Controller Asy.
(P4)
U27 A
PIO
(2B7)
B
Q4 - "Pre-charge" - K1 on Generator Controller Asy.
FILSNS (FILAMENT B+ VOLTAGE SENSE)
MA BLOCK
9
U43
U45
4
CH0
(P2)
J2
C
A0
(P4)
TP28
ON SOLDER SIDE OF PCB
USED ONLY DURING CALIBRATION
Q3 - "Stator Run" - K1 on Power/Motor Relay PCB
X-RAY ON / DISABLE
PRE-CHARGE
IMAGE INTENSIFIER CONTROLS
KVPMEAS (KVP MEASURED)
KVP BLOCK
(P4)
TP27
U38
REFER TO THE FOLLOWING FUNCTIONAL SCHEMATICS
FOR DETAILS OF THE SIGNAL CIRCUITRY:
7
(P4)
11 FILDRVB
40 STORE
AMUXSEL 0-3
(P4)
40KHZ
9
These transistors switch the following relays:
X-RAY ON / DISABLE
GENERATOR INTERLOCK
BATTERY CHARGER
(P4)
11 FILDRVA
3
THE "S" NUMBERS ARE CHIP INPUT
REFERENCE NUMBERS. SOFTWARE
MONITORS THESE INPUTS AS CHANNELS 0-15.
THESE CAN BE SEEN IN THE STATUS MODE,
EVENT HISTORY, AND MAY BE SEEN AS A:D
CHANNEL ERRORS DURING BOOT-UP. REFER
TO THE C-ARM SOFTWARE SECTION OF THE
SERVICE MANUAL FOR DETAILS.
(P3)
HVDRVB
3 VIDEOSTABLE
U22
TP10
25 CAM_GAIN 6
U12-CTC
U15-FF
U16
U17-PAL
7
REFER TO THE FOLLOWING
FUNCTIONAL SCHEMATICS FOR
DETAILS OF THE CIRCUITRY USING THE PIOS.
U22
TP19
TP18
(1B6)
PIO SECTION
4
J3
(1B6)
D/A
CONV.
U18
REFER TO NOTE
ON PAGE 1
1
MA CAL (not used)
D/A
CONV.
U31
CTC SECTION
1
TARGET (not used)
D/A SECTION
-10 VOLT
REFERENCE FOR
D/A CONVERTERS
VR1,U30, Q14
(2D1)
1
1
INTERLOCK KEEP-ALIVE
Q1, Q2, K1,CR1, CR2 (2B4)
BUFFER
U46 (2B7)
CPUINTLK
DS1
U19, U24
(2A8-7)
STATOR SENSE
(P2)
(P4)
(P2)
+5V
TP24
+12V
TP25
+15V TP 1, 2,
TP23 21, 22
SCH. #876738
For Reference Only
TP_AIBK2.DS4
Page 2 of 2
6/4/96
TECHNIQUE PROCESSOR/
ANALOG INTERFACE
BLOCK DIAGRAM
DURING BOOT, THE TECHNIQUE PROCESSOR INITIATES THE 10mS KEEP ALIVE PULSES.
RELAY K1 ENERGIZES, ILLUMINATING DS1. THIS IS THE START OF THE INTERLOCK CIRCUIT.
THE CONTROL PANEL DISPLAYS 18 ARROWS AT THIS TIME (SEE NOTE 3)
SCH. #876738
SCH. #877461
DATA BUS
TO/FROM
TECHNIQUE
PROCESSOR
+15V
+24V TO K1
FIL SELECT RELAY
+24 V TO K2
SEE KV BLOCK
DIAGRAM
7
DS1
N.C.
25
PULSE DETECTOR
Q1 & Q2
A2J4-3
(2B7)
(2B1)
PIO
6
(2A5)
P7-1
P4 -3
U27
LOW
2
U45
13
(2A4)
7
/244
INTLK
P2-1
X-RAY REGULATOR PCB
SCH. #877458
11
R5
4
(1A8)
R16
(2B8)
TP24
+5V
4
P2-107
P2-35
J6-107
J6-35
TP25
+12V
(1C8)
TP23
+15V
N.C.
J3-3
A1J3-3
1
4
S1
BATTERY CHARGER PCB
SCH. #876643
OR #877995
Q1
TP1 TP2 TP21 TP22
(1D8)
P6-3
P6-1 EMEROF_HI
(2C5)
+5V
S2
P7-3 EMEROF_LO
2
2
CONTROL PANEL
PROCESSOR PCB
SCH. #875601
+24V TO K1 & K2
PRECHARGE RELAYS
SEE PRE CHARGE BLOCK
DIAGRAM
SEE MA BLOCK
DIAGRAM
K1
1
CPU INTERLOCK
2
+24V
REFERENCE TO MAINFRAME
INTERCONNECT DIAGRAM,
SCH. #875500 OR #877972
TP5
GND
P3-16
P2-1
P4-10
P1-1
P4-12
P10-11
P4-10
P10-9
INTLK
MOTHER BOARD
SCH. #875539
EMERGENCY_OFF_B
P2-19
P2-25
P1-15
P9-15
P1-14
P9-14
P2-24
5
P1-3
P1-4
P5
(1C6)
TP1
EMERGENCY_OFF_A
(1C5)
CB7
3 AMP
3
+24V TO CCD CAMERA
P1-2
CB1
2 AMP
120V_PH1_SWITCHED
LF2
+24VDC
+24V_IN
P7-7
P6-20
P7-1
P6-19
P7-12
P6-10
P2-6
TP4
(1B7)
+24V_INTERLOCK
TP3
K4
(1C6)
11
10
6
C7
CR11
4
+
8
1
CR10
12V
16
1
K8
(1C7)
R17
MOMENTARY
CLOSURE
TO LATCH K9
POWER MOTOR RELAY PCB
SCH. 875997
TP2
GND
5
4
CR9
12
12V
13
(1D7)
+15V
CB5
5 AMP
7
6
P7-6
P6-24
8
12V
CR4
4
TO
K3
1
R13
R9
1
(1A5)
2
3
12V
8
2
P12-4
1
K10
(1A5)
POWER SIGNAL
INTERFACE PCB
SCH. #876001
OR #877998
USE THIS DIAGRAM ON
SYSTEM SERIAL NUMBERS
69-0001 TO 69-2000
(1B7)
120VAC
P1-14
SEE THE FOLLOWING DIAGRAMS:
SYSTEM POWER
C-ARM POWER
SYSTEM POWER
KEYPOWER
(1C6)
WITH E5 INSTALLED, AC IS PROVIDED TO THE ROTATION AND ELEVATION M OTORS VIA K3. (SEE LIFT & ROTATION MOTOR BLOCK)
THE 24V INTERLOCK CIRCUIT WILL NOT COMPLETE AND THE CONTROL PANEL WILL DISPLAY 18 ARROWS (SEE NOTE 3)
ALL RELAYS SHOWN IN THE DE-ENERGIZED CONDITION
KEY_PWR (+12VDC)
CONTROL PANEL DISPLAY
1
+15V
CR7
E5
1
PS1
P2-4
120VAC_PH1
5
4
K9
CB5
5 AMP
11
9
6
PS2
P5-4
1
(1D7)
(1C8)
P5-1
3
9600 C-ARM
For Reference Only
INTRLK.DS4
Page 1 of 2
6/4/96
GENERATOR INTERLOCK
BLOCK DIAGRAM
DURING BOOT, THE TECHNIQUE PROCESSOR INITIATES THE 10mS KEEP ALIVE PULSES.
RELAY K1 ENERGIZES, ILLUMINATING DS1. THIS IS THE START OF THE INTERLOCK CIRCUIT.
THE CONTROL PANEL DISPLAYS 18 ARROWS AT THIS TIME (SEE NOTE 3)
SCH. #876738
SCH. #877461
DATA BUS
TO/FROM
TECHNIQUE
PROCESSOR
+15V
+24V TO K1
FIL SELECT RELAY
+24 V TO K2
SEE KV BLOCK
DIAGRAM
1
DS1
N.C.
25
PULSE DETECTOR
Q1 & Q2
A2J4-3
(2B7)
(2B1)
PIO
6
(2A5)
P8-1
P4 -3
U27
LOW
2
U45
13
(2A4)
7
/244
INTLK
P2-1
X-RAY REGULATOR PCB
SCH. #877458
11
BATTERY CHARGER PCB
SCH. #877995
Q1
TP1 TP2 TP21 TP22
R5
4
(1A8)
R16
(1C8)
TP24
+5V
4
P2-107
P2-35
J6-107
J6-35
TP25
+12V
4
S1
N.C.
J3-3
A1J3-3
1
(2B8)
(1D8)
P9-3
P9-1 EMEROF_HI
(2C5)
+5V
S2
P8-3 EMEROF_LO
2
7
2
COLUMN I/O PCB
SCH. #878492
+24V TO K1 & K2
PRECHARGE RELAYS
SEE PRE CHARGE BLOCK
DIAGRAM
SEE MA BLOCK
DIAGRAM
K1
CPU INTERLOCK
2
+24V
REFERENCE TO MAINFRAME
INTERCONNECT DIAGRAM,
#878376
TP5
GND
TP23
+15V
P3-16
P2-1
P4-30
P1-1
P4-12
P10-11
P4-10
P10-9
INTLK
MOTHER BOARD
SCH. #878396
EMERGENCY_OFF_B
P2-19
P2-25
P5-15
P9-15
P5-18
P9-14
P2-24
5
P1-3
P1-4
P5
(1C6)
TP1
EMERGENCY_OFF_A
(1C5)
CB7
3 AMP
3
+24V TO CCD CAMERA
P1-2
CB1
2 AMP
120V_PH1_SWITCHED
LF2
+24VDC
P7-7
+24V_IN
P6-20
P2-6
TP4
(1B7)
+24V_INTERLOCK
TP3
K4
(1C6)
11
10
13
6
CR11
C7
4
+
8
1
CR10
12V
16
1
K8
(1C7)
R17
MOMENTARY
CLOSURE
TO LATCH K9
POWER MOTOR RELAY PCB
SCH. 875997
TP2
GND
5
4
CR9
12
K9
P7-12
P6-10
CB5
5 AMP
+15V
P7-6
P6-24
12V
CR4
4
TO
K3
1
R13
R9
1
12V
8
P12-4
2
1
K10
(1B7)
120VAC
P1-14
SEE THE FOLLOWING DIAGRAMS:
SYSTEM POWER
C-ARM POWER
SYSTEM POWER
KEYPOWER
(1C6)
WITH E5 INSTALLED, AC IS PROVIDED TO THE ROTATION AND ELEVATION M OTORS VIA K3. (SEE LIFT & ROTATION MOTOR BLOCK)
THE 24V INTERLOCK CIRCUIT WILL NOT COMPLETE AND THE CONTROL PANEL WILL DISPLAY 18 ARROWS (SEE NOTE 3)
ALL RELAYS SHOWN IN THE DE-ENERGIZED CONDITION
KEY_PWR (+12VDC)
1
USE THIS DIAGRAM ON
69-2001 AND HIGHER AND
62-0001 AND HIGHER
CR7
E5
1
+15V
(1A5)
POWER SIGNAL
INTERFACE PCB
SCH. #877998
(1A5)
2
3
PS1
P2-4
120VAC_PH1
5
4
(1D7)
P6-19
CB5
5 AMP
7
6
8
12V
P7-1
11
9
6
PS2
P5-4
1
(1D7)
(1C8)
P5-1
3
9600 C-ARM
For Reference Only
INTRLK.DS4
Page 2 of 2
6/4/96
GENERATOR INTERLOCK
BLOCK DIAGRAM
9600 Mobile Digital C-Arm - Workstation Block Diagrams, Test Points, and Waveforms
1N
1 V dc
10 us
1Q
1P
1K
1H
1 V dc
10 us
1 V dc
10 us
1 V dc
100 ns
1 V dc
10 ns
1F
Phase shift without Camera
TTL Low without Camera
1O
1S
1R
1M
TTL Low = 60 Hz
TTL High = 50 Hz
10
7
15
2
(See Note 2 on Sheet 1)
U39
1T
Stays
Low
1 V dc
2 ms
1 V dc
10 us
13
U28
2
U29
U36
19
7
1J
9
C89
4
TP33
Camera Sync Present
TTL Low
Camera Sync Not Present
60Hz = 25.8MHz; 50Hz = 25.6MHz
14 13
3
U44
+5VA
TP26
5
TP23
AGND
TP19
-12V
1 V dc
20 ns
DGND
TP25
TP24
-5V
TP30
+5VR
+5V
TP27
TP38
TP28
+12V
U32
9
5
U38
DS1
U45
DS2
TTL High without Camera
1B
1 V dc
20 us
1G
With Camera
2.5 VDC (Approximately)
Without Camera
0 VDC (Approximately)
VIDEO SWITCHING PCB
1A
1E
U43
VCO
1I
With Camera Sync Present
TTL High = Genlock Enabled
Without Camera Sync Present
TTL Low = Genlock Disabled
U6
U41
6
1 V dc
20 us
1 V dc
5 us
1L
U40
2
TTL High = Camera Sync Present
TTL Low = No Camera Sync Present
1C
1D
Waveforms aquired
with and without Camera
sync as noted.
9600 C-ARM
Stays
Low
1 V dc
10 us
1 V dc
5 us
1 V dc
10 us
1 V dc
20 us
For Reference Only
Page 2 of 2
GEN_LOK1.DS4
6/19/96
9600 WORKSTATION "GEN-LOCK"
BLOCK DIAGRAM / WORKSHEET
BEGINNING OF INTERLOCK
TP1
GND
U27-25
DS1
K7
U27-11
Q2
2 V dc
10 ms
TP3
CR11
P2
K8
R17
E5
K9
K10
K4
CR7
R9
GND
TP21
CR9
R13
C7
+24V INTERLOCK TO BATTERY CHARGER PCB
2 1
K1
Q1
CR8
CR10
TP4
CR4
7 6
7
1
TP4 TP1 TP8
P7
TP9
TP2
20
2
6
19
1
P1
12
2 V dc
10 ms
U27-11
U27-25
2 V dc
10 ms
1R16
U27
11
25
TP3
U27-25
10 V dc
10 ms
INTERLOCK HOLDIN SIGNAL
MOMENTARY CLOSURE OF K8 LATCHES K9
K8-6
( RISING EDGE = 15V VIA FAST STOP SWITCHES
FALLING EDGE = K9 LATCHED )
CPU INTERLOCK FROM ANALOG SUPPORT PCB
TP3
15V = INTERLOCK OK
4
INTERLOCK COMPLETE SIGNAL
7
13
U45
TP3
K8-6
10 V dc
10 ms
GND
TP22
P1
POWER/MOTOR RELAY PCB
ASSY 00-875999- ( )
10 V dc
10 ms
TP2
GND
TP4
10 V dc
100 ms
9600 C-ARM
For Reference Only
K8-6
GINTLKSS.DS4
10 V dc
100 ms
MOMENTARY
CLOSURE OF K8
Page 1 of 1
6/4/96
9600 GENERATOR INTERLOCK
SIGNAL SHEET
(2B6)
1vpp = 10kv
KV SENSE
3
U3
MUX 19 KVPMEAS
KVPCONT
TP19
7
U33
(1B6)
TP33
47
(1D2)
HV DRV B 28
13
(1A6)
KVP CONTROL
28
U42
6
6
FIXED
DUTY
CYCLE
10
9
7
- U20
2
DRV ST*
8
PWM _COMP
13
U8, U28, Q4 HV DRV B
(2D5)
12
3
U8, U29, Q5 HV DRV A
(1B7)
(2C5)
7
A2J3
+15V
P3
7
VR1
TP23
+12V
Q8
Q7
-15V
+15V
K2 3
MOTHERBOARD
SCH. #875539 OR #878396
F1
P1
3
(1B8)
F2
(1C7)
TP5
(1B8)
-15V
C2 &C3
B2
R1
BATTERY
CHARGER
876643
C2E1
2A
P4
+
CB1
30A
K1
F1
BATTERY
PACKS
KV SENSE
1:10000
Tank
3A
2
E2
L1
TP6
C1
HV
TRANSFORMER
(1B7)
Q2
T3
(1C7)
F5
P2
3
B1
B+
C1
2A
(1B6)
9
2A
(1B6)
8
1
See Precharge
Block Diagram
2
See Battery Charger
Block Diagram
E1
2
F4
SCH. #877461
X-RAY REGULATOR PCB
SCH. #877458
K2
1
B+
E1
9
TP5
GND
7
B1
2
HV DRV A
Q5
-12V
TP22
+5V
C1
8
Q6
(2C5)
VR2
-15V
(1C6)
(1C8)
SCH. #876738
PWM COMP
TP24
(1C6)
HV DRV B
TP23
+15V
TP2
2A
(1C8)
TP25
+12V
5
(1B4)
8
TP1 TP2 TP21 TP22
To mA Block Diagram
(Enable mA Error Amp)
5kHZ.
(2C6)
Q1
T1
U19
(2D6)
(1B4)
(1C7)
-
(1C8)
(2C4)
PWM
Darlington Drivers
+15V
3
mA SERVO
7
RAMP
8
(1C8)
TP24
+5V
TP15
Q6
VARIABLE
DUTY
CYCLE
(2B4)
2+
COMPENSATION
NETWORKS U17
E2
See Battery Charger
2 Block Diagram
CR6
(2B4)
U12
3 U34
-
U17
KVP MEASURED
1
R49
2 +
8
U40
3 U20
(2B5)
2 - (2C7)
1
3 + U23
R25
High Charge Mode
TP9
R46
NEGATIVE PEAK
TP13
DETECTOR
U25, U26, U18 1v = 10kvp
(KVEREN)
U7 19
PAL 15
29
1v = 20kvp
(2B6)
(2C7)
-10V REF GEN
VR1, U30, Q14
12
6 - U16
7
(1B4)
HV DRV A
U17
PAL
(2B7)
P3
27
(.075V/KVP)
U31
D:A 25
6
TP10
(2B7)
P2
46
(1D6)
1
U16
POSITIVE PEAK
DETECTOR
U22, U26, U18
TP12 1v = 10kvp
B2
C2E1
E2
3
See Generator Interlock
Block Diagram
9600 C-ARM
For Reference Only
Page 1 of 1
KV_BLK.DS4
12/4/96
KV BLOCK DIAGRAM
U19-7 MA SERVO
U20 -7 KVP CONTROL
-3.75 VOLTS AT 50 KVP
.075V / KV
Test Conditions
In the manual fluoro
mode, use a technique
of 50 kV and 1 mA for
the majority of this lab.
Other kV settings will
be useful for observing
a change in DC voltages.
PPD
TP12
HV DRV A
2 V dc
100 us
10 V dc
100 us
HI = 8.5V MA SERVO ON
( X-RAYS ON )
LO = 0V MA SERVO OFF
( X-RAYS OFF )
KVPSNS
1 V dc
100 us
Note these unique
kV settings on this
worksheet for future
reference.
NPD
TP13
HV DRV B
TP9 KVP MEASURE
2.5 VOLTS AT 50KVP
1 VOLT = 20 KVP
( X-RAYS ON )
2 V dc
100 us
10 V dc
100 us
U17
U12
R25
5
A1J3
A2J3
78
CR6
KVPSNS
TP10
2
P3
U16
17
36
U20
U18
17
36
R46
U22
HV DRV B
R54
U26
TP12
PPD
U25
U28
Q4
PWM
TP2
R49
NPD
TP13
TP15
RAMP
Q5
KVPM
TP9
TP15 RAMP
U23
1
2
3
U34
27
3
Q6
X-RAY REGULATOR
00-873616- ( )
HV DRV B
HV DRV A
E2 KV SERVO DISABLE
INSTALLING E2
OVERRIDES KVEREN
FROM PAL U7
HV DRV B
2 V dc
100 us
2 V dc
100 us
1 V dc
50 us
U34-2 KV CORR.
E2
U29
3
27
3
R48
R52
U7-19 KVEREN (KV SERVO ENABLE)
HI =X-RAY ON U17 PINS 6-7 OPEN
LO = X-RAY OFF U17 PINS 6-7 SHORTED
U7
U8
HV DRV A 2 19
U19
U34-7 COMP. OUT
GOES LOW WHEN
RAMP EXCEEDS
KV CORR. VOLTAGE.
U23-1 KV CORRECTION
X-RAYS OFF = 0 VOLTS
X-RAYS ON = -2.2V TYP.
2 V dc
50 us
TP2 PWM_COMP
FLIP FLOP OUTPUT
U12-5 GOES LOW
WHEN U34-7 COMP.
OUT GOES LOW
9600 C-ARM
HV DRV A
2 V dc
100 us
2 V dc
100 us
For Reference Only
Page 1 of 2
KV_LABSS.DS4
5/17/96
KV GENERATION
SIGNAL SHEET
Test Conditions
100 V dc
100 us
In the manual fluoro mode, use a
technique of 50 kV and 1 mA for
the majority of this lab. Other kV
settings will be useful for observing
a change in DC voltages. Note these
unique kV settings on this worksheet
for future reference.
5 V dc
100 us
Q5
Q6
Q7
Q8
P1
T1
F1
F2
3
2
5 V dc
100 us
8
9
00-873613- ( )
GENERATOR DRIVER
100 V dc
100 us
F4
R20
P2
3
2
T3
F5
K2
8
9
R29
78
P3
TP6 TP5
TP 5
HVDR B
2 V dc
100 us
9600 C-ARM
TP 6
HVDR A
2 V dc
100 us
For Reference Only
KV_LABSS.DS4
KV GENERATION
SIGNAL SHEET
Page 2 of 2
5/17/96
9600 Mobile Digital C-Arm - Generator Block Diagrams, Test Points, and Signal Waveforms
ANALOG
INTERFACE PCB
SCH. #876738
U3
MUX
21
20
MA SENSE
P4 15
CURRENT TO VOLTAGE CONVERTER
FILSNS
1
2
P2
P3
50
31
6
U6
(1D8)
(1D6)
48
30
TP7
7
U31
(1D7)
U33
1
2
23
(1B6) 3
U18
D:A 3
6
(1B6)
U17
PAL
14
15
TP33
53
TP8
34 mA CONTROL 2 - U15
U28
(1B5)
51
23
22
FILDRVA 4
FILDRVB 3
(1A5)
U40
+ U30 7
See KV Block
Diagram
10
U5
3
7
TP18
E1
(1C7)
2 +
3 - U19
mA SERVO
(2B4)
3 U31
(1D6)
1
(1D4)
U21
MA MEASURED
MA ERROR - = Less heat
TP4
R82
7
8mA/Volt Fluoro
40mA/Volt Film
TP11
FROM 100 TURN WINDING
AROUND ANODE SOCKET
XRAY REGULATOR PCB
SCH. #877458
6
(1D7)
-
5
TANK
FILREG
7
U27
+ (1C6)
FILAMENT TRANSFORMER
11
9 16 U7
KV
U13
PAL
(1D7)
3
XL
1 FIL B+ SENSE
U27
(1C6)
P3
FILFDBK
6
Opens when
X-rays on
U42
5
3
(1A5)
U11
4
VR1
+15V
U11
(1B6)
11 5
TP25
+12V
65 +U15
TP21
11
TP1 TP2 TP21 TP22
TP24
+5V
kVP Measured
From kV Sense
Circuits TP9
U10
PAL
5 12
6 13
14
5
(1D6)
+ = More heat
8
11
(1A6)
7
4
(1A7)
4.1V
1
(1D7)
(1C7)
R27
(1D7)
TP10
2
1
32 FIL B CONTROL
(1D2)
1
U13 Closes above 30kV
6
-10V REF
GEN VR1
+ U30
SCALING AMP
TP6
SCALING (not used)
350mV/mA - fluoro
70mV/mA - film
(1B4) TP18
U31
D:A
3
K1
MA MEASURED
LOW PASS FILTER
P3
(1B4)
3
3
6
-12V
TP22
+5V
TP5
GND
NOTE: THE XL AND XS
CONNECTIONS PASS
THRU THE X-RAY
REGULATOR PCB
BEFORE CONNECTING
TO THE TANK
6
4
P1
6
VR2
-15V
(1B4)
TP23
+15V
MOTHERBOARD
SCH. #875539 OR #878396
TP24
TP23
+12V
XS
SCH. #877461
B+
VOLTAGE
F3
(1C5)
P3
If E1 jumper is installed, no mA correction
voltage will be applied to TP4
P3
161V = Fluoro
176V = .3mm Film 161V prep
184V = .6mm Film 141V prep
FILAMENT
REGULATED
REGULATOR
Q10, Q1, Q2 FILAMENT VOLTAGE
(1D7)
6
R8
(1D8)
Q4
(1D4)
C2 &C3
TP4
P2
(1D5)
(1D6)
TP3
-
BATTERY
PACKS
4
K2
+
5
11
CB1
K1
FIL DR A
TP2
R1
High above 100 mAs
9
P3
Q3
9600 C-ARM
For Reference Only
Page 1 of 1
MA_BLK.DS4
Q11
(1D4)
P3
10
C13
(1D6)
FIL DR B
.6mm MODE
L3
T2
K1
(1D4)
MA BLOCK DIAGRAM
6/6/96
TP21 MA CONTROL / MEASURE ENABLE
U27-1 FILAMENT B+ SENSE
FLUORO X-RAYS OFF = 3.9 VDC
FLUORO X-RAYS ON = 3.6 - 4.2 VDC
(X-RAY ON VOLTAGE VARIES DEPENDING
ON THE AMOUNT OF ERROR AMP VOLTAGE
AT TP4).
LO = X-RAYS ON U13 PINS 6-7 CLOSED
WHICH ALLOWS MA CONTROL VOLTAGE
TO BE FED TO ERROR AMP U15.
HI = X-RAYS OFF U13 PINS 6-7 OPEN
WHICH REMOVES MA CONTROL VOLTAGE
FROM ERROR AMP U15.
TP8 MA CONTROL
FLUORO @ 5MA = -1.7VDC
.3MM 70 KVP @ 20 MAS = -1.13 VDC ARMED = -4.17 VDC
.6MM 70 KVP @ 300 MAS = -6.84 VDC ARMED = -6.84 VDC
THIS VOLTAGE IS DETERMINED BY THE GENERATOR SOFTWARE.
200 mV dc
100 us
.3MM FILM = 4.3 VDC, ARMED = 3.9 VDC
THIS SIGNAL SWITCHES FROM LO TO HI
WHEN TP9 KVPM IS 1.5 VDC OR HIGHER.
( THE KVP IS 30 OR ABOVE )
MA SENSE
U27-6 FILAMENT B+ CONTROL
FLUORO = 3.9 VDC X-RAYS OFF
3.75 VDC X-RAYS ON TYP.
TP11 MA MEASURE
SCALE FACTOR:
FLUORO 8 MA / VOLT ( .125 VOLTS / MA )
FILM 40 MA / VOLT ( .025 VOLTS / MA )
100 mV dc
100 us
U7-16 MA ERROR ENABLE
THESE COMPONENTS
ARE COVERED BY THE
X-RAY REGULATOR PCB
MA SENSE
HI = X-RAYS ON U13 PINS 10-11 OPEN
WHICH TURNS ON ERROR AMP U15.
U27-7 FILAMENT REGULATOR
LO = X-RAYS OFF U13 PINS 10-11 SHORTED
WHICH TURNS OFF ERROR AMP U15.
FLUORO = 3.18 VDC X-RAYS OFF
4.5 VDC X-RAYS ON TYP.
THIS SIGNAL IS CONTROLLED BY THE
X-RAY ON CIRCUITRY VIA PAL U7.
50 mV dc
100 us
U13
2 V dc
100 us
U5
U10-14 .3MM / .6MM SELECT
A2J3
6
TTL LO IN ALL FLUORO MODES
AND FILM MODE BELOW 110 MAS
(.3MM SPOT).
TP8
MA CNT
U5 IS COVERED BY
THE BATTERY
CHARGER PCB
P3
TTL HI IN FILM MODE 110 MAS AND
ABOVE (.6MM SPOT)
R50
GND
TP5 MA SNS
TP6
7
1
6
2
5
U15
U19
TP4
MA ERR E1
KVPM
TP9
MA MS
R27
U21
TP11
K1
MA PLS
E1 JUMPER MA SERVO DISABLE
TP7
U27
1
U7
U10
TP21
U30
FILAMENT DRIVE A
WHEN A JUMPER IS INSTALLED AT E1
MA ERROR ENABLE FROM U7 KV PAL
IS OVERRIDDEN, PREVENTING ANY
MA ERROR CORRECTION DURING
ANY X-RAY FLUORO OR FILM.
U31
1 7
7
3 6
3 5
FILAMENT DRIVE B
TP9 KVP MEASURE
MA SERVO ENABLE U19 TURNS ON
MA SERVO WHEN THE VOLTAGE AT
TP9 IS 1.5 VDC OR HIGHER.
R82
.3MM FILM = 2.37 VDC, ARMED = 3.14
.6MM FILM = 2.03 VDC, ARMED = 4.23
U10-14 GOES HI WHEN FILM MODE
IS ARMED FOR THE FIRST EXPOSURE
AT OR ABOVE 110 MAS AND REMAINS
HI UNTIL THE MAS IS SET BELOW 110
AND THE SYSTEM IS ARMED FOR ANOTHER
EXPOSURE OR FLUORO MODE IS SELECTED.
MA PULSES
1
7
3 6
CR15
16
5 14
6 13
R91
12
15
OEC-DIASONICS,INC.
X-RAY REGULATOR
00-873616- ( )
P4
FLUORO AUTO MODE 67 KVP @ 2.3 MA
(BOOT UP DEFAULT CONDITION)
X-RAYS OFF.
2
FLUORO MANUAL MODE 67 KVP @ 2.3 MA
X-RAYS ON
FIL DR B
2 V dc
100 us
2 V dc
100 us
2
MA ERROR
2 V dc
100 us
FIL DR A
2 V dc
100 us
2 V dc
100 us
MAXIMUM
MA ERROR
CORRECTION
RANGE
9600 C-ARM
For Reference Only
MA_LABSS.DS4
MA GENERATION
SIGNAL SHEET
Page 1 of 2
6/6/96
R8 REGULATED FILAMENT VOLTAGE
Q2
Q3
F3 B+ VOLTAGE
Q4
FLUORO = 160 VDC WITH X-RAYS OFF
.3MM FILM = 175 VDC, ARMED 160 VDC
.6MM FILM = 185 VDC, ARMED 140 VDC
WHEN AN EXPOSURE IS BEING MADE THE
VOLTAGE FROM THE FILAMENT REGULATOR
IS CHANGED BY THE ERROR AMP U15 ON
THE X-RAY REGULATOR BOARD TO
REGULATE THE MA.
R8
P1
Q1
F3 HAS FULL BATTERY VOLTAGE
PRESENT WHEN EVER THE +24
VOLT INTERLOCK IS ON.
SEE PRECHARGE CONTROL BLOCK
Q10
6
F3
Q11 COLLECTOR .3MM / .6MM SPOT SELECT
00-873613- ( )
GENERATOR DRIVER
Q11
TP2
TP4
TP3
3456
9 10 11
.7 VOLTS IN FILM MODE 110 MAS AND
ABOVE (.6 MM SPOT).
Q11 TURNS ON WHEN FILM MODE
IS ARMED FOR THE FIRST EXPOSURE
AT OR ABOVE 110 MAS AND REMAINS
ON UNTIL THE MAS IS SET BELOW 110
AND THE SYSTEM IS ARMED FOR
ANOTHER EXPOSURE OR FLUORO MODE
IS SELECTED.
K1
P2
+24 VOLTS IN ALL FLUORO MODES
AND FILM MODE BELOW 110 MAS
(.3MM SPOT).
T2
6
P3
FIL DR A
TEST CONDITIONS
FLUORO AUTO MODE 67 KVP @ 2.3 MA
(BOOT UP DEFAULT CONDITION)
X-RAYS OFF.
5 V dc
100 us
FIL DRIVE
50 V dc
100 us
FIL DR B
5 V dc
100 us
9600 C-ARM
For Reference Only
Page 2 of 2
MA_LABSS.DS4
6/6/96
MA GENERATION
SIGNAL SHEET
REFERENCE TO
C-ARM (MAINFRAME)
INTERCONNECT DIAGRAM
SCH. #875500 OR #877972
POWER/MOTOR
RELAY PCB
SCH. #875997
POWER/SIGNAL
INTERFACE PCB
SCH. #876001
OR #877998
5
LIFT_115VAC_A
5
LIFT_MOT0R_AC_RTN
LS2 - BOTTOM
RED
C6
BLACK
M1
LIFT
MOTOR
1
WARNING! SYSTEMS FROM
SERIAL #69-1001 AND UP
CARRY VOLTAGE POTENTIALS
ON AC RETURN LINES
BLUE
1
USE THIS PAGE FOR
69-0001 TO 69-2000
P3
3
*(115VAC PH 2)
P7
115VAC_PH_MTR
1
10
20
- 1
5
1
LIFT_UP_SW
7
4
8
4
1
+
+ E5
-
3
*(NEUTRAL)
K4
-
3
- 1
P5
3
2
LIFT_DN_SW
S5
P7
ROTATE CCW
3
6
5
LIFT DOWN
1
2
K13
TP2
S4
7
DC_RTN_SW
8
D
+
7
+
11
10
SERIAL NUMBERS
69-0001 TO 69-1000
LIFT UP
1
2
D K3
P4
3
1
6
5
*SIGNAL NAME FOR
P2
K12
6
4
8
+
TP1
REFER TO SYSTEM
POWER DISTRIBUTION
BLOCK DIAGRAM
FOR DETAILS OF
THESE CIRCUITS
3
P6
P6
115VAC_RTN_MTR
LIFT_115VAC_B
6
2
+24V
LS1 - TOP
1
S7
1
-
3
2
D K9
P6
3
8
+
- 1
24V INTERLOCK RELAY
SEE GENERATOR INTERLOCK
BLOCK DIAGRAM FOR DETAILS
*SIGNAL NAME FOR
ROTATE_CCW_SW
4
S6
1
K5
6
5
SERIAL NUMBERS
69-0001 TO 69-1000
4
ROTATE CW
L-ARM
MOTOR POWER
PCB
SCH. #876378
3
2
8
+
- 1
RELAYS
SHOWN
DE-ENERGIZED
K6
3
ROTATE_CW_SW
10
5
ROTATE_115VAC_B
ROTATE_115VAC_A
P4
CHASSIS
7
MTR_BLK
8
2
8
CAP_A
9
LS3_B
5
3
5
10 LS3_A
1
4
3
LS4_A
4
LS4_B
5
6
MTR_RED
2
MTR_WHITE
1
1
9
1
10
2
2
10
TB2
6
6
1
3
M2
ROTATION
MOTOR
ROTATE_AC_RTN
6
9
10
P3
P1
3
C7
CAP_B
TB1
9600 C-ARM
POWER/SIGNAL
DISTRIBUTION PCB
SCH. #875968
For Reference Only
Page 1 of 2
LIFT&ROT.DS4
LIFT & ROTATION MOTOR
BLOCK DIAGRAM
12/9/96
REFERENCE TO
C-ARM (MAINFRAME)
SCH. #878376
POWER/MOTOR
RELAY PCB
SCH. #875997
POWER/SIGNAL
INTERFACE PCB
SCH. #877998
LS1 - TOP
1
LIFT_115VAC_B
3
LIFT_115VAC_A
5
LIFT_MOT0R_AC_RTN
LS2 - BOTTOM
RED
C6
BLACK
M1
LIFT
MOTOR
1
ON AC RETURN LINES
BLUE
1
P6
6
5
USE THIS PAGE FOR
62-0001 AND HIGHER
P3
3
2
115VAC_PH_MTR
P6
P7
1
10
- 1
5
20
7
4
8
4
6
1
115VAC_RTN_MTR
4
+
+ E5
-
3
K4
REFER TO SYSTEM
POWER DISTRIBUTION
BLOCK DIAGRAM
FOR DETAILS OF
THESE CIRCUITS
1
LIFT_UP_SW
P2
K12
TP1
+24V
8
+
-
D K3
3
7
P5
3
8
- 1
2
LIFT_DN_SW
S5
P7
ROTATE CCW
S7
3
6
5
LIFT DOWN
1
2
K13
TP2
S4
7
DC_RTN_SW
+
D
+
LIFT UP
1
2
11
10
6
5
P11
3
1
1
-
3
2
D K9
P12
3
8
+
- 1
24V INTERLOCK RELAY
4
ROTATE_CCW_SW
4
ROTATE CW
S6
1
K5
6
5
L-ARM
MOTOR POWER
PCB
SCH. #876378
3
2
8
+
- 1
RELAYS
SHOWN
DE-ENERGIZED
K6
3
ROTATE_CW_SW
10
5
ROTATE_115VAC_B
ROTATE_115VAC_A
P4
CHASSIS
7
MTR_BLK
8
2
8
CAP_A
9
LS3_B
5
3
5
10 LS3_A
1
4
3
LS4_A
4
LS4_B
5
6
MTR_RED
2
MTR_WHITE
1
1
9
1
10
2
2
10
TB2
6
6
1
3
M2
ROTATION
MOTOR
ROTATE_AC_RTN
6
9
10
P3
P1
3
C7
CAP_B
TB1
9600 C-ARM
COLUMN I/O PCB
SCH. #878492
For Reference Only
Page 2 of 2
LIFT&ROT.DS4
LIFT & ROTATION MOTOR
BLOCK DIAGRAM
12/9/96
LIFT MOTOR UP
P6-1
100 V ac
5 ms
P6_3
100 V ac
TP2
5 ms
LIFT MOTOR DOWN
K3
P6-1
100 V ac
K4
5 ms
P6-3
E5
100 V ac
5 ms
K5
ROTATE CW
P4-5
K12
100 V ac
5 ms
10
5 ms
3
6
4
P6
1
P4-1
100 V ac
1
ROTATE CCW
P4
ASSY 00-875999- ( )
K13
K6
P4-5
100 V ac
5 ms
9600 C-ARM
P4-1
For Reference Only
Page 1 of 1
6/6/96
100 V ac
LFT&RTSS.DS4
5 ms
LIFT / ROTATATION MOTORS
SIGNAL SHEET
SURGE SUPPRESSOR PCB
SCH. #876784
100-127 VAC CORD ASSEMBLY
CB1
RESET ONLY
P1
1
3
2
4
5
6
E1
RT1
RT2
2
RT4
9
1
C3 RV4
RV1
6
8
DS1
GREEN LAMP
TB1
-
2
3
4
5
6
E1
1
7812
1
3 +12V
POWER CONTROL PCB
00-876547
E2
E3
K4
(1D2)
CB2 (10A)
P5
19
4
13
1
22
2
3B
13
3C
22
NEUTRAL
E1
16
CHASSIS GND
LOOP1
18
LOOP1
18
1
2
2F
5
LOOP1
3D
1
KEY_PWR
1
KEY_PWR
2
3E
12
CNCT_ON
12
CNCT_ON
4
10
LOOP2
10
LOOP2
1
J1
INTERCONNECT
CABLE
P1
DS1 is a green light that turns on when the Power Cord
is plugged into a wall outlet.
Strap T1 to match Hospital AC as follows:
220 -250 VAC Cord Assembly
Transformer TAP
98
104
Input VAC Range 186 - 200 201 - 214
100 - 127 VAC Cord Assembly
Transformer TAP
98
104
Input VAC Range
94 -100
101 - 107
110
215 - 225
110
108 - 115
3
TP1
120
116-124
DELAY CIRCUIT
4
R1
(1E5)
TP2
5
1
TP3
6
3
8
2
1
N.O.
8
CR4
(1D4)
C5
U2
(1D5)
C3
(1D6)
R2 (1D5)
13
12
P2
3
LOOP2
240 VAC between TP1 & TP2
when Workstation is plugged in to outlet
and interconnect cable is connected to C-Arm
Br 110 & Br/Wt 120
226-234
2H
R5
3
N.O.
16
2G
(1E5)
1
E9
LOOP2
NEUTRAL
2 TO PS4
(1C2)
E6
K3
(1D4)
6
4
120V PH1
E5
3
RESET ONLY
120V PH2
E4
120VAC
P6 TO PS4
1 (+24V)
F1 (2A S.B.)
E1 - E6 ARE MOUNTING HOLES (GROUND)
200-250VAC CORD ASSEMBLY
TO POWER/MOTOR
RELAY PCB
2E
E4
E19
(Mounting)
See Sheet 3
for C-Arm
Power
Distribution
NEUT.
2D
D2
AC2
E1
3A
240VAC
TO TB2
AC2
2
N.O.
1
E3
TO POWER/SIGNAL
INTERFACE PCB
AC1
4
8
RV1
SHLD
C-ARM
P6
4
2
COM
19
2C
3
3
98
DS1
GREEN LAMP
+24V TO
R_MON
1
5
240 VAC
104
6
8
9
P4
1
D1
110
9
2B
6
128
P1
+24V TO
L_MON
N.O.
CT
7
8
2A
K1
(1C4)
2
RV2
P1
E2
1
3
5
1
+
CB2 (3A)
(1B3)
8
98
10A
1
U1
(1F5)
104
120
CB1
RESET ONLY
CR1
(1F6)
T1
(1E7)
9
RV2
+24V
FROM
PS4
12VDC Supply
CB1 (0.2A)
RESET ONLY
(1E7)
AC1
COM
E1
3
110
6
RT3
1
7
CB3 (3A)
K2
(1C3)
2
120
1
C1
5
3
128
C2 RV3
1
P3
KEY SWITCH
4
P2
10A
TB1
T1
2
ISOLATION
TRANSFORMER
120
235-248
128
125-134
WORKSTATION
876158
9600 C-Arm
For Reference Only
128
249-269
PWERBLK1.DS4
Use this drawing with system
serial numbers 69-0001 to 69-1000
Page 1 of 3
12/3/96
9600 System Power Distribution
Functional Schematic
Workstation Distribution
1A
5
P3 14-16
1C
Left Mon.
+24VDC
at P6.2
P6.3 (GND)
1B
Right Mon.
+24VDC
at P6.2
P6.3 (GND)
1
3
DC POWER DISTRIBUTION PCB
00-876839
8-11
+5V
+12V
DO NOT
ADJUST
-12V
CB7
U1
-5V
R43
MAX694 CPA
(1C5)
GND
CB3 (5A)
RESET ONLY
OUT 2
V ADJ
AC1
1
AC1
1D
120
VAC
AC2
1E
R53
R21
PS1
+/-5 VDC
+/- 12VDC
1 2
RT1
2
P16
J16
1 2
3
VCC
OUT 1
V ADJ
E18
1
OUT
BAT
RST
PFI
PFO
WDI
GND
CB3
7
R1
CB4
CB5
F1 (4A)
FAST BLOW
AC1
NEUTRAL
1F
4
120
VAC
1G
AC2 VIA F1
C1
NEUTRAL
R2
5
P1 2
6
1H
1
CB1
120/240VAC
OUTLET STRIP
7
NEUTRAL
AC1 1
NEUTRAL 2
RT2
8
CB2
AC2 3
4
AC2
TB2
E8
YELLOW
CB6
BLACK
WHITE/RED
WHITE
Ground to
Power Control PCB
P6 pins 4,5,6
See Sheet 1
R6
DO NOT
ADJUST
R11
V ADJ
TB2.6 AC2 (BRN)
P9
TB2.5 NEUT (WHT)
1
INTERNAL LENZAR
HARD COPY CAMERA
(Optional)
TB2.7
TB2.1
SONY 890 OR 910
THERMAL IMAGER
(Optional)
SONY VCR
(Optional)
TP2
+5V
TP3
+12V
CB9
2
3
4
5
AC2
CB8
6
AC1
7
PS4
+24VDC
8
CR1
CR2
TP1
GND
TP5
-5V
TP4
-12V
2
2
9
10
TB2.5
NEUTRAL
FAN B1
FAN B2
GROUND, -5VDC & -12VDC
connections from P9, to the connectors
at the right side of the diagram
are not shown to simplify this diagram.
P5
1
2
+12V
GND
N/C
P8
1
2
+12V
GND
ETI (Elapsed Time Indicator)
P7
1
2
3
4
+12V
+5V
GND
GND
P6
1
2
3
4
+12V
+5V
GND
GND
P4
1
2
7
8
3
4
9
10
5
6
11
12
+5V
+5V
GND
GND
+12V
+5V
GND
GND
+12V
+5V
GND
GND
P2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SYSRST*
+5V
+12V
-12V
GND
GND
GND
GND
-5V
+5V
+5V
+5V
+5V
+12V
P3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SYSRST*
+5V
+12V
-12V
GND
GND
GND
GND
-5V
+5V
+5V
+5V
+5V
+12V
P1
1
2
9
10
3
4
5
11
12
13
6
7
8
14
15
16
+5V
+5V
GND
GND
+5V
+12V
-12V
-5V
GND
GND
+5V
+12V
-12V
-5V
GND
GND
Spare Disk Drive
Floppy Disk Drive
Hard Disk Drive
386 Motherboard
Control Panel Interface PCB
& Contrast / Brightness PCB
Auxiliary Interface PCB &
Video Switching PCB &
Image Processor PCB
FAN B3
9600 C-Arm
WORKSTATION
876158
1
2
U1 monitors +5VDC. If it falls below 4.65VDC,
U1.7 (SYSRST*) goes low resetting the 386 Motherboard.
It goes high 200 mS after 4.7VCD is reached.
-5 and -12 VDC are NOT CIRCUIT BREAKER PROTECTED
For Reference Only
PWERBLK1.DS4
Page 2 of 3
12/3/96
TP2
P1
6
5
KEY_PWR
TP2
(1D6)
120V PH1
SWITCHED
K10
(1B7)
NEUTRAL
120V PH2
TP1
POWER/MOTOR
RELAY PCB
SCH. #875997
12
6
3
CNCT_ON
FOR
ROTATION,
LIFT,
& STATOR
+24V
7
10
1
1
12
14
15
12
KEY_PWR 1D
CNCT_ON
1E
SEE STATOR RELAY/STATORSENSE
AND LIFT/ROTATION
FUNCTIONAL SCHEMATICS
FOR DETAILS OF THESE CIRCUITS
SEE GENERATOR INTERLOCK,
PRE-CHARGE,
STATOR RELAY/STATOR SENSE,
AND LIFT/ROTATION
FOR DETAILS OF +24V AND
+24V INTERLOCK CIRUITRY
P7
WORKSTATION
DRAWING #876158
DS2
10 13 17
MOTHERBOARD
SCH. #875539
+15V 1
VR2
2
VR1
3 -12V
1
P1
1
TO
CONTROL PANEL
PROCESSOR PCB
+5
+15
-15
DC COMMON
7
4
2
3
3 +12V
2
-15V
PS1
P2
6
12
P8
+12V
TO
X-RAY
REGULATOR
PCB - P1
P2
SEE BATTERY CHARGER
BLOCK DIAGRAM FOR
DETAILS OF THE
BATTERY CHARGER PCB
+
1
2 LF2
3
5
CB8
20
1
P6
CB9 (1B4)
(1B4)
2
5
CB6
CB5
CB4
120V PH1
(1C5) SWITCHED
CB1
P8
14 -15
1
+15
8
+5
P1
NEUTRAL
120 PH2
3
5
3
120V PH1
9
E1
16
16
E9
NEUTRAL
22
22
1
120V PH2
13
13
120V PH2 1A
4
120V PH1
19
19
120V PH1 1B
SEE PAGE 1 TO
CONTINUE THESE
SIGNALS
1
6
P9
5
J1
+24V
INTERCONNECT
CABLE
P1
NEUTRAL
1C
PS2
24V
+12V
1
FROM
MOTHERBOARD
18
+12V
TP2
P4
17
TP1, 3,
12, 13
P10
CONTROL PANEL
PROCESSOR PCB
SCH. #875601
(1C7)
2
1 LF3
5
3
(1B5)
CB3
C-ARM
(1C6)
- NC
P12
2
(1B5)
P5
CB7
+24V 4
8
(1B5)
P11
TO
2 +5
CONTROL PANEL
PROCESSOR PCB - P3
T1 (1A7)
CR1
(1B7)
4
(1C6)
P7
2 -15
1 +15
+5
6
5
BATTERY CHARGER PCB
SCH. #876643
24
2
5
1 LF1
3
(1B5)
CB2
POWER/SIGNAL
INTERFACE PCB
SCH. #876001
DRAWING #875500
9600 C-Arm
For Reference Only
PWERBLK1.DS4
Page 3 of 3
12/3/96
C-Arm Distribution
SURGE SUPPRESSOR PCB
SCH. #876784
100-127 VAC CORD ASSEMBLY
CB1
RESET ONLY
P1
1
3
2
5
3
4
5
6
E1
RT1
3
AC1
RT2
RT4
C3 RV4
RV1
6
8
DS1
GREEN LAMP
9
-
COM
CB3 (4A)
RESET ONLY
E4
E1
U1
(1F5)
CT
RV2
+
1
7812
CB2 (3A)
(1B3)
8
1
3 +12V
4
AC2
CB1
RESET ONLY
TB1
1
3
5
6
E4
E1
SHLD
E3
E2
E3
E4
E5
6
8
DS1
GREEN LAMP
E19
(Mounting)
P5
19
3A
TO POWER/SIGNAL
INTERFACE PCB
115VAC_RTN
19
4
120VAC
P6 TO PS4
(+24V)
1
F1 (2A S.B.)
3B
13
115VAC_PH
13
1
3C
22
GROUND
22
2
CHASSIS GND
E1
16
LOOP1
18
LOOP1
3D
1
3E
12
LOOP2
1
2
(1C2)
2
2G
GND
2H
5
LOOP1
KEY_PWR
1
KEY_PWR
2
CNCT_ON
12
CNCT_ON
4
10
LOOP2
10
LOOP2
1
J1
INTERCONNECT
CABLE
P1
Strap T1 to match Hospital AC as follows:
220 -250 VAC Cord Assembly
Transformer TAP
105
115
Input VAC Range 196 - 214 215 - 234
100 - 127 VAC Cord Assembly
Transformer TAP
105
115
Input VAC Range
98 -107
108 - 117
125
235 - 254
125
118 - 127
3
TP1
DELAY CIRCUIT
4
3
R1
(1E5)
TP2
5
1
TP3
6
3
2
1
1
8
8
N.O.
CR4
(1D4)
C5
U2
(1D5)
C3
(1D6)
R2 (1D5)
13
12
P2
3
18
DS1 is a green light that turns on when the Power Cord
is plugged into a wall outlet.
R5
(1E5)
6
N.O.
16
K3
(1D4)
3
4
E9
TO POWER/MOTOR
RELAY PCB
2F
CB2 (12.5A)
RESET ONLY
K4
(1D2)
See Sheet 3
for C-Arm
Power
Distribution
GND
3
200-250VAC CORD ASSEMBLY
C-ARM
2E
E6
E1 - E6 ARE MOUNTING HOLES (GROUND)
120 VAC
WARNING!
AC RETURN LINES
IN THIS SYSTEM
CARRY VOLTAGE
POTENTIALS
240VAC
TO TB2
AC2
2
1
1
4
N.O.
1
9
4
E1
RTN
8
POWER CONTROL
00-878001
2
COM
2D
1
AC2
4
AC2
RV1
1
3
5
2
6
P1
10A
3
240 VAC
AC
AC1
P6
AC1
5
AC1
115
105
2C
P4
6
125
+24V TO
R_MON
N.O.
E2
7
2B
K1
(1C4)
2
RV2
P1
+24V TO
8 L_MON
9
CR1
(1F6)
T1
(1E7)
2
2A
12VDC Supply
CB1 (0.2A)
RESET ONLY
(1E7)
105
6
9
1
1
115
RT3
CB3 (3A)
K2
(1C3)
2
1
C1
+24V
FROM
PS4
7
P2
C2 RV3
1
P3
KEY SWITCH
4
125
10A
TB1
T1
2
ISOLATION
TRANSFORMER
120 VAC between TP1 & TP2
when Workstation is plugged into outlet
and interconnect cable is connected to C-Arm.
LOOP2
WORKSTATION
00-877970
9600 C-Arm
For Reference Only
USE THIS DRAWING
WITH SYSTEM SERIAL NUMBERS
62-0001 AND HIGHER
Page 1 of 3
PWERBLK2.DS4
System Power Distribution
9/19/96
1A
5
P3 14-16
1C
Left Mon.
+24VDC
at P6.2
P6.3 (GND)
1B
Right Mon.
+24VDC
at P6.2
P6.3 (GND)
1
3
DC POWER DISTRIBUTION PCB
00-876839
8-11
+5V
+12V
DO NOT
ADJUST
-12V
CB7
U1
-5V
R43
MAX694 CPA
(1C5)
GND
R53
OUT 2
V ADJ
R21
1
AC1
1D
1
P16
J16
AC2
1E
120
VAC
PS1
+/-5 VDC
+/- 12VDC
2
2
1
RT1
3
VCC
OUT 1
V ADJ
2
E18
1
OUT
BAT
RST
PFI
PFO
WDI
GND
CB3
R1
CB4
CB5
F1 (4A)
FAST BLOW
GND
1F
C1
4
R2
120
VAC
1G AC2 VIA F1
P1
6
2
1
CB1
120/240VAC
OUTLET STRIP
7
GND
AC1 1
GND 2
AC2 3
4
RT2
8
CB2
TB2
E8
YELLOW
CB6
BLACK
WHITE/RED
Ground to
Power Control PCB
P6 pins 4,5,6
See Sheet 1
WHITE
1H
5
TB2.6
LINE (BRN)
P9
TB2.5
GND (WHT)
1
INTERNAL LENZAR
HARD COPY CAMERA
(Optional)
SONY 890 OR 910
THERMAL IMAGER
(Optional)
SONY VCR
(Optional)
TP2
+5V
TP3
+12V
CB9
2
3
4
5
R6
DO NOT
ADJUST
R11
V ADJ
TB2.7
6
TB2.2
WARNING!
AC RETURN LINES
IN THIS SYSTEM
CARRY VOLTAGE
POTENTIALS
PS4
+24VDC
TB2.5
CB8
GND
FAN B1
FAN B2
7
8
CR1
TP1
GND
CR2
TP5
-5V
TP4
-12V
2
2
9
10
GROUND, -5VDC & -12VDC
connections from P9, to the connectors
at the right side of the diagram
are not shown to simplify this diagram.
P5
1
2
+12V
GND
N/C
P8
1
2
+12V
GND
ETI (Elapsed Time Indicator)
P7
1
2
3
4
+12V
+5V
GND
GND
P6
1
2
3
4
+12V
+5V
GND
GND
P4
1
2
7
8
3
4
9
10
5
6
11
12
+5V
+5V
GND
GND
+12V
+5V
GND
GND
+12V
+5V
GND
GND
P2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SYSRST*
+5V
+12V
-12V
GND
GND
GND
GND
-5V
+5V
+5V
+5V
+5V
+12V
P3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SYSRST*
+5V
+12V
-12V
GND
GND
GND
GND
-5V
+5V
+5V
+5V
+5V
+12V
P1
1
2
9
10
3
4
5
11
12
13
6
7
8
14
15
16
+5V
+5V
GND
GND
+5V
+12V
-12V
-5V
GND
GND
+5V
+12V
-12V
-5V
GND
GND
Spare Disk Drive
Floppy Disk Drive
Hard Disk Drive
386 Motherboard
& Contrast / Brightness PCB
Auxiliary Interface PCB &
Video Switching PCB &
Image Processor PCB
FAN B3
9600 C-Arm
WORKSTATION
00-877970
1
2
For Reference Only
U1 monitors +5VDC. If it falls below 4.65VDC,
U1.7 (SYSRST*) goes low resetting the 386 Motherboard.
It goes high 200 mS after 4.7VCD is reached.
-5 and -12 VDC are NOT CIRCUIT BREAKER PROTECTED
USE THIS DRAWING
62-0001 AND HIGHER
PWERBLK2.DS4
Page 2 of 3
9/19/96
6
KEY_PWR
+
TP2
(1D6)
K10
(1B7)
WARNING!
AC RETURN LINES
IN THIS SYSTEM
CARRY VOLTAGE
POTENTIALS
P1
5 115VAC_PH_IN
115VAC_ PH_SW
14
15
CNCT_ON
TP1
12
6
3
10
KEY_PWR 1D
CNCT_ON
1E
SEE PAGE 1 TO
CONTINUE THESE
SIGNALS
3B
3C
SEE GENERATOR INTERLOCK,
PRE-CHARGE,
STATOR RELAY/STATOR SENSE,
AND LIFT/ROTATION
FOR DETAILS OF +24V AND
+24V INTERLOCK CIRUITRY
+24V
7
1
12
SEE STATOR RELAY/STATORSENSE
AND LIFT/ROTATION
FOR DETAILS OF THESE CIRCUITS
FOR
115VAC_RTN_MTR ROTATION,
LIFT,
115VAC_PH_MTR
& STATOR
POWER/MOTOR
RELAY PCB
SCH. #875997
USE -04 (SHEET 2)
1
12
P7
WORKSTATION
DS2
10
17 13
DRAWING #877970
24 4
1
20
P6
P2
MOTHERBOARD
SCH. #875539
OR #878396
6
(1C6)
1
VR2
CB9
12
3 +12V
TO
CONTROL PANEL
PROCESSOR PCB
VR1
+5
+15
-15
DC COMMON
3 -12V
1
P1 OR P5
1
2
P8 OR P5
+12V
TO
X-RAY
REGULATOR
PCB
T1 (1A7)
TO
CONTROL PANEL
PROCESSOR PCB
P2
CR1
(1B7)
4
2
+
5
CB8
7
4
2
3
(1B5)
CB7
(1B5)
CB6
CB5
CB4
(1C5)
115V_ PH_PS2
CB1
115V_RTN_PS2
P7
2 -15
1 +15
6
+5
5
BATTERY CHARGER PCB
SCH. #877995
SEE BATTERY CHARGER
BLOCK DIAGRAM FOR
DETAILS OF THE
BATTERY CHARGER PCB
LF1
2
E1
16
3B
E9
16
22
22
GROUND
1C
1
115VAC_PH
13
13
115VAC_PH
1B
4
115VAC_RTN
19
19
115VAC_RTN 1A
GROUND
(1B5)
2
-15V
3
P12
2
CB11
(1B4)
PS1
+15V 1
CB10
P8
14 -15
1 +15
+5
8
P11
2 +5
CHASSIS GND
4
4
8
+24V_PS2
INTERCONNECT
CABLE
+12V
P4
6
PS2
24V
+12V
17
TP2
TP1, 3,
12, 13
115VAC_RTN_CH
SERIAL NUMBERS
69-1001 TO 69-2000
CONTROL PANEL
PROCESSOR PCB
SCH. #875601
1
FROM
MOTHERBOARD
18
+12V
P10
TP3
CB12
2
4
3
2
LF2
3
C-ARM
(1B5)
CB2
J3 P3
17
15 15
COLUMN I/O PCB
SCH. #878492
(1C6)
1
P4
DRAWING #877972 OR #878376
3
SEE PAGE 1 TO
CONTINUE THESE
SIGNALS
P1
DC COMMON
1
P9
5
P1
115VAC_PH_CH
J1
P5
3C
5
(1B6)
CB3
TP4
CONTROL PANEL
PROCESSOR I/O PCB
SCH. #878489
SERIAL NUMBERS
69-2001 AND HIGHER
&
62-0001 AND HIGHER
9600 C-Arm
For Reference Only
POWER/SIGNAL
INTERFACE PCB
SCH. #877998
USE THIS DRAWING
62-0001 AND HIGHER
PWERBLK2.DS4
C-Arm Distribution
Page 3 of 3
9/19/96
1
THE CONTROL PANEL DISPLAYS 19 ARROWS AT THIS TIME
+
BATTERIES
SCH. #876738
P2 J6
.2V
1
U38 19
PIO
U44
RESISTOR
PACK
5V
4
U45
16
6
Q4 (2B2)
PRECHRG
18
11
(Numbers in parentheses
on connector P4
represent pin numbers
seen on Sch. 878396.)
P4
P3
(1C8)
(1B6)
P2
35
B
4
CR2
(1A8)
A
3
-
18 17
3
(2C6)
5V
CONTACT
R1
(1B7)
19 19
INTERLOCK
+24V
10
7
F1
3 AMP 250VDC
SLO-BLOW
(1B7)
+
(1B7)
BX1
B1
E1
C2E1
(1B6)
1
CR17
BUS
DRIVER
6
5
CR18
36
(23)
1
E2
B2
BX2
(1C5)
F3
-
SEE GENERATOR
INTERLOCK
BLOCK DIAGRAM
FOR DETAILS
THIS OCCURS AFTER THE TECHNIQUE PROCESSOR
DETECTS APPROXIMATELY 185VDC ON THE
PRE-CHARGE CAPACITORS C2 & C3
225V
6
C1
+
5
36
P1
E2
2
CR1
(1A8)
(2A1)
SCH. #877461
Q1
1K
25W
K2
(2C5)
BATTERY
CHARGER PCB
SCH. # 876643
OR #877995
P5
6
9
35
(1)
225V
K1
.7V
Q5 (2B2)
2
CB1
30 AMP
X-RAY
REGULATOR PCB
SCH. #877458
CR15
(2D7)
2
18
MOTHER BOARD
SCH.#875539
OR #878396
BATTERIES
(1D4)
Q2
(1B7)
C2E1
BX1
B1
E1
P2
225V
(1C7)
TP25
+12V
TP23
+15V
C2
+200V
Sense
E2
B2
BX2
C1
TP1 TP2 TP21 TP22
R10
(1D4)
6
E2
TP24
+5V
5.3
R11
P3
+
1
C3
Primary A
High
Voltage
Tank
Primary B
GENERATOR CONTROLLER ASSEMBLY
5.3V
SEE TECHNIQUE PROCESSOR/
ANALOG INTERFACE
BLOCK DIAGRAM
FOR DETAILS OF
THIS CIRCUITYRY
SAMPLE
MUX
U3
(1D6)
L1
(1A8)
C1
(1B8)
A2J3
8
200VSNS
41 41
22
(34)
22
1
RELAYS SHOWN IN THE DE-ENERGIZED POSITION
9600 C-ARM
REFERENCE TO
C-ARM (MAINFRAME)
SCH. # 875500, #877972, or 878376
For Reference Only
PRECHG.DS4
PRE-CHARGE
BLOCK DIAGRAM
Page 1 of 1
12/4/96
TP1
GND
P1
C44
5
GND
TP21
+200V
SENSE
U2
12
8
U3
CR17
R10
Q5
R11
CR15
F3
Q4 C
CR18
P2
Q4
P2
U38-19
F3
GENERATOR DRIVER
U38-18
19 18
U7
C7
U38
14
U8
TP1
CR33
C9
C8
U45
43
U38-19
RISING EDGE =
B+ CHARGE STARTED
U9
RISING EDGE =
B+ CHARGE STARTED
U38-19
2 V dc
1s
2 V dc
50 ms
F3
P1
TP2
GND
TP22
GND
RISING EDGE =
+24V INTERLOCK ON
C2, C3 CHARGE VOLTAGE VIA
R1 & K1 IN GENERATOR TRAY
Q4 C
10 V dc
FALLING EDGE =
50 ms
B+ CHARGE STARTED
K1 (PRECHARGE) RELAY ON
100 V dc
1s
F3
100 V dc
1s
C2, C3 CHARGE VOLTAGE IS
MEASURED BY U7 ADC VIA
+200V SENSE FROM GENERATOR
DRIVER PCB.
AS +200V SENSE REACHES APPROX.
4.6 VOLTS K2 (B+ CONTACTOR)
IS TURNED ON BY U38-18 VIA Q5.
WITH K2 ON, THE VOLTAGE ON
C2, C3 IS EQUAL TO THE BATTERY
CHARGER VOLTAGE OF 225 VOLTS,
WHICH RAISES THE VOLTAGE OF
+200V SENSE TO 5.3 VOLTS.
THIS TELLS THE SYSTEM THAT
PRECHARGE HAS BEEN SUCESSFULLY
COMPLETED.
U38-18
2 V dc
5s
+200V
SENSE
2 V dc
5s
+200V
SENSE
2 V dc
1s
9600 C-ARM
For Reference Only
Page 1 of 1
PRECHGSS.DS4
PRE-CHARGE CONTROL
SIGNAL SHEET
6/5/96
2
SCH. #876738
SEE SYSTEM POWER
BLOCK DIAGRAM
FOR DETAILS OF
POWER DISTRIBUTION
THE CONTROL PANEL DISPLAYS 19 ARROWS AT THIS TIME
1
TTL LOGIC HIGH-STATOR STARTING
TTL LOGIC HIGH-STATOR RUNNING
115VAC_RTN_MTR
115 VAC_PH_MTR
2
3.6V DC-STATOR STARTING
3.6V DC-STATOR RUNNING
P2 J6
P7
P2
P1
U44
RESISTOR
PACK
8
5
U38 20 15
U45
PIO
(2D7)
Q3 (2B2)
STAT_RUN 106 106
18
POWER/MOTOR
RELAY PCB
SCH. #875997
5
STATOR_RUN
(1&2B6)
Q7 (2A2)
STATSTRT 105 105
STATOR RUN
RELAY
On for stator operation
14
3
(2C5)
+
CR20
TP4
5
115 VAC
3.6V DC-STATOR STARTING
TTL LOGIC LOW-STATOR RUNNING
17
STATOR_START
6
+
(1&2A6)
6
8
R16
(2B8)
U24
(2A7)
STATOR CAP 2
4
C5
PHASE
CAP
(1A1)
4
10
STATOR 2
3
STATOR_RTN
P5
3
3 10
5
1
1
7
7
3
3
C
P
M
A4J5
2
1
2
P2
7
8
High Voltage
Cable Assembly
900602 or 900927
P1
40 VAC
(2A7)
CR6
C17
R15
OFF
T1
1
CR7
OFF
XFMR_115VAC
+5V
5
SLEEP
MODE
(1B5)
TTL LOGIC LOW
STATOR DRAWING CURRENT
4
1
DS2
1
ON
40 VAC
8
-
OFF
(1B7)
6
7
40 VAC
STATOR
START
RELAY
On for 2sec
then turns off
TTL LOGIC HIGH-STATOR STARTING
TTL LOGIC LOW-STATOR RUNNING
1
DURING
RUN
CONDITION
+24V From
Interlock Circuit
RUN
MODE
STATOR CAP 1
5
(1&2B6)
8
ON
P2
40 VAC
DS1
DS1
ON
STATOR 1
5
1
K2 (1&2A6)
(2A1)
3
-
DS2
START
MODE
P5
5
6
CR18
(2B7) 10
CB2
2A
K1
(2C6)
U27
PIO
(1&2B5)
1
CR16
23 13 U43 7
+5V
3
9
BUS
DRIVERS
2
10
ON AC RETURN LINES
T3
STATOR
TRANSFORMER
MOTHER BOARD
SCH.# 875539
OR #878376
CR5
10
10
XFMR_AC_RTN
5
5
J15
P15
(1B1)
TEMP
SENSOR
R13
R14
C22
1
U19
(2A8)
2
R12
CR4
CR3
+ 3
103 103
15
STATOR SENSE
104 104
16
STATOR SENSE RETURN
TP1 TP2 TP21 TP22
TP24
+5V
TP25
+12V
TP23
+15V
XRAY TUBE
(2A8)
+12V
SAMPLE
MUX
23
U3
(1D6)
P3 A1J3
6
HOUSTEMP
ANALOG INTERFACE BLOCK
DIAGRAM FOR DETAILS OF
THIS CIRCUITYRY
55 55
3
+12V
THERMAL
SWITCH
REFERENCE TO
IMAGE SYSTEM
SCH.#875410, #877971, OR #878377
RELAYS SHOWN IN DE-ENERGIZED POSITION
9600 C-ARM
HOUSING_TEMP
For Reference Only
STATOR.DS4
REFERENCE TO
C-ARM (MAINFRAME)
SCH. # 875500, #877972, OR #878376
Page 1 of 1
6/5/96
BLOCK DIAGRAM
Q3 C
DS2
DS1
7
1
P7
INTERLOCKED +24 V
DS2
U19-1
CR3
START
MODE
ON
RUN
MODE
OFF
SLEEP
MODE
OFF
R14
U19
R13
C22
R14
2 V dc
500 ms
DS1
GND
TP21
CR4
321
U38-20
CR5
CR6
C17
ON
CR16
R15
CR7
U24-5
Q3
54
ON
STATOR
START
OFF
U24
P2
U38-20
Q7 C
CB2
T1
CR3 C
STATOR
RUN
K1
K2
TP1
GND
U38-23
TP4
GROUND
STATOR
START
2 V dc
500 ms
TP2
6
12
R16
10 V dc
500 ms
1
31
STATOR
RUN
20
10
U27-10
U38
U27
23
8
3
9
14
U43
7
Q3 C
U38-23
10 V dc
500 ms
5
U44
13
U45
15
Q7
ASSY 00-875999- ( )
CR20
U27-10
Q7 C
P1
P5
5
10
6
STATOR
SENSE
TP22
GND
TP2
GND
1
2 V dc
500 ms
STATOR 1
P5-5
200 V dc
500 ms
U19-1
U24-5
5V ac
5 ms
2 V dc
20 ms
9600 C-ARM
STATOR 2
P5-10
For Reference Only
Page 1 of 1
CR3-C
200 V dc
500 ms
STATORSS.DS4
10 mV ac
50 ms
5/17/96
SIGNAL SHEET
Battery Packs
Blue
Connector
Red
Connector
Black
Connector
(1B8)
Battery Charger PCB
876643
5-20 mA DC Trickle Charger
C26, CR9, CR10
T1
(1A7)
CB1
(1B6)
VR1
+12SEP
L1
T2
C10
(1D1)
19
PH 2
1
LF 3
P2
22
NEUT.
Ideal Diode
U4, CR8, Q9
(1B3)
Low Voltage Cutoff
Q10 shuts off Q2 when battery
voltage falls below 160 VDC
R48, R16, CR11, Q10
RT2
3
2
CR1
13
4
LF 1
(1B5)
16
CB2
5 AMP
GND
+
R19
Current
Sensor
(1C7)
7
(1B5)
9
3
6
(1C4)
P1
2
R28
(1C5)
2
U5 + 3
K1 (1B6)
Q1
(1B5)
1.1 VDC
R39
3 n.c.
R2
Reference Drawing
Mainframe Interconnect Diagram
875500
(1B7)
J2
2
R1 Current
Sensor
1
R7
7.5 VDC
U2
CR7
R8
Overvoltage
Protection
Q6, Q8,
U1, U3,
(1D5) CR6
C9
J3
2
C3
(1B7)
R26
1
(1B4)
DS1
DS2
MILLIAMPS (1D6)
F3
(1C6)
R11(1D4)
+200
volt
See Precharge R10
sense
Block Diagram
5.1 VDC
Charger Current
4
6
TP2
Volt
Sense
X-RAYS OFF = LO
(Normal charge)
See KV Block Diagram
X-Ray Regulator PCB
(1D4)
Generator
Driver
PCB
877461
X-RAYS ON = HI
CR6
(Hi charge)
(2C1)
R25
Q7
(1C6)
VOLTS (1D7)
(1B6)
1. CONNECT A DVM FROM J1-1 TO CHASSIS GROUND.
2. ADJUST R10 FOR 220 VOLTS ON THE DVM.
3. ADJUST R32 UNTIL THE 220 VOLT SEGMENT ON DS1 GOES OFF AND
THE 210 VOLT SEGMENT LIGHTS.
4. ADJUST R32 UNTIL THE 210 VOLT SEGMENT GOES OUT AND THE
220 VOLT SEGMENT JUST LIGHTS.
(1C8)
TP1
Volt
Feedback
U3 (1D5)
15
16
130 to 160 VDC
BATTERY CHARGER ADJUSTMENT PROCEDURE:
4
9
X-Ray Regulator PCB
877458
(1D5)
(1D4)
14
R1
6 n.o.
14
(1A4)
R32
Volts
Display
Adjust
-12SEP
(1A5)
6
C2
(1C7)
See Precharge Control Block Diagram
R10
Charger
Output
Adjust
(2A7)
3
5
R11
R6
L2
E1
+
K2 (1B6)
(1B7)
R37
CR2
(1B6)
F1
Sense
+12SEP
Q2
RT1
C4
(1D8) Current
1
10 Amp
Current
Limiter
R2
TP3
Low Pass
Filter
U4, C17
R18
(1B4)
(1B7)
(1C6)
PH 1
-12SEP
5
(1B5)
C11
25
40
50
75
100
105
220
320
450
625
P12
VR2
J1
1
(1B4)
160
170
180
190
200
210
220
230
240
250
Lemo
Connector
J1
Power / Signal Interface PCB
P1
876001
10 Amp
Current
5
Limiter
CB3
(1C7)
5 AMP
(1C6)
(1C8)
CR3
+
(1A6)
+
VR3
Line Sense
Charger Disable
HI = Charger Disabled
P4
18
Mother PCB 875539
P6
37
P2
37
Analog Interface PCB
876738
(2B7) 18
U27 PIO
24
23
22
43
43
42
42
41
41
10
9
8
U3 Sample Mux
(1D6)
9600 C-Arm
For Reference Only
Page 1 of 3
CHGBLK.DS4
12/3/96
9600 Battery Charger Block Diagram
Serial # 69-0001 to 69-1000
BATTERY CHARGER ERROR MESSAGES
P5 CHARGER OUTPUT
NORMAL = 225 VDC
HI CHARGE = 230 VDC
RECHARGE NEEDED -ALLOW 24 HOURS
PRESS ANY KEY TO CONTINUE
REMEMBER, CHARGER OUTPUT VOLTAGE
IS MEASURED THRU +200 SENSE
(R11/R10 JUNCTION ON GENERATOR DRIVER PCB
TO U3-8 ON ANALOG INTERFACE PCB)
THIS MESSAGE IS DISPLAYED DURING BOOT UP IF THE SYSTEM
HAS NOT BEEN TURNED ON FOR 6 MONTHS.
IF 6 MONTHS HAVE PAST SINCE THE SYSTEM HAS BEEN
PLUGGED IN AND TURNED ON, LET THE SYSTEM RUN
WITHOUT MAKING X-RAYS FOR 24 HOURS TO ALLOW THE
BATTERIES TO RECHARGE AND THE IMAGE TUBE TO DEGAS.
THIS ERROR MAY ALSO BE DISPLAYED AFTER INSTALLING
A COPY OF THE BACKUP GENERATOR SOFTWARE,
IN THIS CASE PRESS ANY KEY ON THE CONTROL PANEL AND
CONTINUE USE AS NORMAL.
C-4 FILTER CAP VOTAGE
MIN. LOAD = 160 VDC
MAX. LOAD = 130 VDC
TP1 VOLTAGE FEEDBACK
NORMAL = 5.15 VDC (MIN. CURRENT)
HI CHARGE = 4.55 VDC (MAX. CURRENT)
P5
WARM-UP NEEDED - ALLOW 4 HOURS
PRESS ANY KEY TO CONTINUE
R10 CHARGER OUTPUT
VOLTAGE ADJSUTMENT
THIS MESSAGE IS DISPLAYED DURING BOOT UP IF THE SYSTEM
HAS NOT BEEN TURNED ON FOR 2 MONTHS.
IF 2 MONTHS HAVE PAST SINCE THE SYSTEM HAS BEEN
PLUGGED IN AND TURNED ON, LET THE SYSTEM RUN
WITHOUT MAKING X-RAYS FOR 4 HOURS TO ALLOW THE
BATTERIES TO RECHARGE AND THE IMAGE TUBE TO DEGAS.
R8 LINE SENSE
7.5 VDC = NORMAL
LINE VOLTAGE
TP2 VOLT SENSE
NORMAL = 3.3 VDC
(CHARGER OUTPUT @ 225 VDC)
THIS ERROR MAY ALSO BE DISPLAYED AFTER INSTALLING
A COPY OF THE BACKUP GENERATOR SOFTWARE,
IN THIS CASE PRESS ANY KEY ON THE CONTROL PANEL AND
CONTINUE USE AS NORMAL.
HI CHARGE = 4.2 VDC
(CHARGER OUTPUT @ 230 VDC)
R10
R6
P4
TP1
BATTERY DISCONNECTED
THIS MESSAGE IS DISPLAYED DURING BOOT UP (-1 ARROWS)
IF THE SOFTWARE THINKS THE BATTERIES ARE DISCONNECTED.
R8
U2-14
TP2
THIS IS CHECKED BY DISABLING THE BATTERY CHARGER AND
WAITING FOR 2 SECONDS, THE +200 VOLT SENSE LINE IS THEN
READ. IF 180 VOLTS OR LESS IS READ, THE SOFTWARE ISSUES
A SHUTDOWN COMMAND AND DISPLAYS THE
" BATTERIES DISCONNECTED" MESSAGE.
TP3
2 V dc
20 us
TP3 CURRENT SENSE
MIN. CURRENT = .08 VDC
(CHARGER OUTPUT = 25 MA)
CR7
U3
R25
IF THE BATTERIES ARE DISCONNECTED OR CB1 IS OPEN
THE ERROR "PRECHARGE FAIL" MAY BE DISPLAYED INSTEAD OF
BATTERIES DISCONNECTED.
U2
PWM OUTPUT DRIVE PULSES TO Q1
MAX. CURRENT = 5.2 VDC
(CHARGER OUTPUT = 2.5 AMPS)
CHARGER FAILED
THIS MESSAGE IS DISPLAYED IF THE SOFTWARE SENSES THAT
THE BATTERY VOLTAGE IS LESS THAN 225 VOLTS AND THAT
THE CHARGER OUTPUT CURRENT IS LESS THAN 1.0 AMPS.
U2-4
THE SOFTWARE CHECK FOR CHARGER FAILURE RUNS IN THE
BACKGROUND ALL THE TIME EXCEPT DURING X-RAYS.
R6
CHARGER OUTPUT
R32
50% CHARGE
THIS MESSAGE IS DISPLAYED IF THE SOFTWARE THINKS THAT
THE CHARGE CAPACITY OF THE BATTERIES HAS BEEN
DEPLETED TO 50% OR LESS.
THE 50% CHARGE MESSAGE IS DISPLAYED INTERMITTANTLY ON
THE CONTROL PANEL, SYSTEM OPERATION IN FLUORO MODE IS
ALLOWED BUT FILM EXPOSURES ARE SUSPENDED UNTIL THE
CALCULATED CHARGE OF THE BATTERIES RISES ABOVE 50%.
500 mV dc
20 us
DS2
DS1
70% CHARGE
THIS MESSAGE IS DISPLAYED IF THE SOFTWARE THINKS THAT
THE CHARGE CAPACITY OF THE BATTERIES HAS BEEN
DEPLETED TO 70% OR LESS.
THE 70% CHARGE MESSAGE IS DISPLAYED INTERMITTANTLY ON
THE CONTROL PANEL AND DOES NOT AFFECT
SYSTEM OPERATION.
CURRENT SENSOR INPUT TO PWM
R25
HIGH CHARGE MODE
CR7 CATHODE "CHARGER DISABLE"
CHARGER ON = 0 VDC (THE CHARGER IS ON ALL THE TIME EXCEPT DURING
CHARGER OFF = 3 VDC DURING FILM EXPOSURES AND FOR A SHORT TIME
TIME AT THE END OF THE STSTEM BOOT PROCESS.)
9600 C-Arm
R32 VOLTAGE DISPLAY ADJUSTMENT
THIS PAGE GIVES THE LAYOUT
FOR THE 877997 PCB. REFER TO THE
POWER DISTRIBUTION SECTION
IN THE SERVICE MANUAL
FOR THE OLDER PCB LAYOUT.
For Reference Only
Page 2 of 3
CHGBLK.DS4
12/3/96
9600 Battery Charger
Signal Sheet
Battery Packs
Blue
Connector
Red
Connector
Black
Connector
(1B8)
C26, CR9, CR10
T1
(1A7)
CB3
10 AMP
P12
19 115_VAC_RET 1
(1C7)
LF2
(1B5)
(1C6)
13 115_VAC_PH 4
22 GROUND
C10
P1
P2
3
3
VR2 -12SEP
(1B3)
RT1
+
CR1
(1C8)
C11
TP3
(1D8) Current
Ideal Diode
U4, CR8, Q9
RT2
P5
1
CR3
(1B4)
Low Voltage Cutoff
R48, R16, CR11, Q10
CB2
10 AMP
2
L1
T2
(1B4)
R19
Current
Sensor
F1
Sense
Low Pass
Filter
U4, C17
R18
K2 (1B6)
(1B7)
6
(1C4)
K1 (1B6)
(1C5)
(1B5)
2
4
2
U5 + 3
7
1.1 VDC
R39
3 n.c.
2
R10
Charger
Output
Adjust
(2A7)
(1A4)
CR2
6
Q1
(1B5)
(1B7)
J4
2
(1B6)
+
1
R7
1. CONNECT A DVM FROM P5-1 TO CHASSIS GROUND.
3. ADJUST R32 UNTIL THE 220 VOLT SEGMENT ON DS1 GOES
OFF AND THE 210 VOLT SEGMENT LIGHTS.
U2
7.5 VDC
TP2
Volt
Sense
DS1
C9
Generator
Driver
PCB
877461
X-RAYS ON = HI
CR6
(Hi charge)
X-RAYS OFF = LO
(Normal charge)
4
1
(1D4)
6
DS2
MILLIAMPS (1D6)
F3
(1C6)
R11(1D4)
5.1 VDC
+200
volt
See PrechargeR10
sense
Block Diagram
X-Ray Regulator PCB
(1B4)
VOLTS (1D7)
(1B6)
R8
Overvoltage
Protection
Q6, Q8,
U1, U3,
(1D5) CR6
J3
2
(1D5)
R26
Q7
(1C6)
CR7
X-Ray Regulator PCB
877458
(2C1)
16
130 to 160 VDC
C4
(1C8)
160
170
180
190
200
210
220
230
240
250
R2
R1 Current
Sensor
4
TP1
Volt
Feedback
U3 (1D5)
15
R25
(1D4)
14
R2
Reference Drawing
#877972 or #878376
C3
(1B7)
14
R32
Volts
Display
Adjust
-12SEP
(1A5)
E1
9
R6
L2
3
P1
R1
6 n.o.
R37
Q2
1
4
C2
(1C7)
+12SEP
(1B7)
16 CHASSIS
5
Line Sense
Charger Current
Charger Disable
P4
12
Mother PCB 875539 or 878396
P6
37
P2
37
876738
(2B7) 18
U27 PIO
35
31
34
43
43
42
42
41
41
8
10
9
U3 Sample Mux
(1D6)
25
40
50
75
100
105
220
320
450
625
(1D1)
+12SEP
+
VR1
+
(1A6)
Lemo
Connector
J1
CB1
(1B6)
VR3
877998
10 Amp
Current
Limiters
Battery Charger PCB
Sch. #877995
9600 C-Arm
For Reference Only
Page 3 of 3
CHGBLK.DS4
12/3/96
Serial # 69-1001 and Higher
Battery Packs
Blue
Connector
Red
Connector
Black
Connector
(1B8)
Battery Charger PCB
877458
C26, CR9, CR10
T1
(1A7)
CB1
(1B6)
+12SEP
L1
T2
C10
877998
10 Amp
Current
Limiters
Lemo
Connector
J1
CB3
10 AMP
(1D1)
P12
19 115_VAC_RET1
P1
3
(1B5)
Ideal Diode
U4, CR8, Q9
(1B3)
(1C6)
Low Voltage Cutoff
R48, R16, CR11, Q10
RT2
RT1
+
CR1
CB2
10 AMP
2
TP3
Current
Sense
(1D8)
3
13 115_VAC_PH 4
Low Pass
Filter
U4, C17
R18
(1B4)
R19
Current
Sensor
F1
K2 (1B6)
(1B7)
6
K1 (1B6)
R37
6 n.o.
1.1 VDC
R39
3 n.c.
2
U5 + 3
7
1
4
2
L2
(2A7)
3
P1
2
6
Q1
(1B5)
R32
Volts
Display
Adjust
-12SEP
4
U2
(1B7)
J4
2
R1 Current
Sensor
130 to 160 VDC
1
7.5 VDC
R7
1. CONNECT A DVM FROM J1-1 TO CHASSIS GROUND.
3. ADJUST R32 UNTIL THE 220 VOLT SEGMENT ON DS1 GOES
OFF AND THE 210 VOLT SEGMENT LIGHTS.
(1C6)
CR7
X-RAYS OFF = LO
(Normal charge)
4
1
(1D4)
6
F3 (1C6)
R11(1D4)
+200
volt
See PrechargeR10
sense
Block Diagram
5.1 VDC
Charger Current
Line Sense
Charger Disable
TP2
Volt
Sense
(1B4)
DS1
160
170
180
190
200
210
220
230
240
250
C9
Generator
Driver
PCB
877461
X-RAYS ON = HI
CR6
(Hi charge)
X-Ray Regulator PCB
Q7
VOLTS (1D7)
(1B6)
R8
Overvoltage
Protection
Q6, Q8,
U1, U3,
(1D5) CR6
J3
2
(2C1)
16
(1B6)
(1C8)
X-Ray Regulator PCB
877458
(1D5)
R26
TP1
Volt
Feedback
U3 (1D5)
15
R25
(1D4)
14
R2
Reference Drawing
#877972 or #878376
14
(1A4)
CR2
+
C3
(1B7)
R10
Charger
Output
Adjust
E1
C4
9
R6
4
(1A5)
R2
R1
(1C5)
(1B5)
(1B7)
16 CHASSIS
C2
(1C7)
+12SEP
Q2
5
(1C4)
DS2
MILLIAMPS (1D6)
P4
12
Mother PCB 875539 or 878396
P6
37
P2
37
876738
(2B7) 18
U27 PIO
35
31
34
43
43
42
42
41
41
8
10
9
U3 Sample Mux
(1D6)
25
40
50
75
100
105
220
320
450
625
22 GROUND
VR2 -12SEP
(1C7)
LF2
C11
(1B4)
P2
(1C8)
P5
1
CR3
+
VR1
VR3
+
(1A6)
9600 C-Arm
For Reference Only
Page 3 of 3
CHGBLK.DS4
6/4/96
Serial # 69-1001 and Higher
CONTROL PANEL ASSEMBLY
X-RAY
SWITCH
P5
CONTROL PANEL
PROCESSOR PCB
SCH. # 875601
P4
14
2
MOTHERBOARD
SCH. #875539
POWER/SIGNAL
INTERFACE PCB
SCH. #876001
OR #877998
X-RAY SWITCH
16
13
2
SECURITY
1
18
R33 & C36
300MS.
DELAY
CIRCUIT
16
J6 P2
4
5
18
16 16
(2C8)
(2C7)
(2B7)
CR12
XRAY REGULATOR PCB
SCH. #877458
3 U24 2
1 U25 2
(2B7)
1 U51 7
L
TP20
+5V
P10
P9
84 84
P1
P2 J6
(2C7)
4 U50 6
9
2
BOOST SW2
SCOUT
FLUORO SW3
SW1
PROCESS
FLUORO SW4
2
BOOST
86 86
4
3
3
FLUORO ONLY
8
85 85
1
1
SAVE(L/R)
6
81 81
6
6
X-RAY SWITCH
1 U50 7
FOOTSWITCH
7
SECURITY
10
4
I SOURCE
16
P2
J2
3 U25 4
100 100
PROCESS
BOOST
SW1
7
J3
2
7
13
U27
PIO
SECURITY
XRAY ON
(2B7)
(2D7)
12 XRYDISBL
9
U25
6
8
8
13
U6
3
U35
GAL
11
U6
2
5
88 88
XRAYINH
+5V +12V
TP22 TP23
9
L=XRAY ALLOWED
(1B7)
12
L
U7
KV PAL
4
3
TP 5 -12V
TP24
11
3
5
3
26
24
(2C6)
BOOST
L
1
L
U38
PIO
10
7
P2
D 0-7
(2C7)
9 U25 8
P3
2
27 27
11 XRAYON
L
1 U52 7
15
4
7
(2B5)
(2C8)
2
7
U41
(2B5)
L
P3
(1B8)
12
1
3
2 U21
4 U52 6
P4
(2B5)
10
L
XRAY EN
26 26
XRAYEN
8
U41
L
1
P7
SAVE
MOTHERBOARD
SCH. # 875539
SCH. #876738
(1B7)
U10
FIL PAL
2
(2D4)
(1A7)
TP27
12
U22
PIO
(2C7)
40
STORE
101 101
13
13
SCOUT
FLUORO
3
3
FLUORO ONLY
(2D7)
7
P1
SW2
L
DATA BUS TO/FROM
TECHNIQUE PROCESSOR
REFER TO TECHNIQUE PROCESSOR/
ANALOG INTERFACE
+5V
SAVE
1
SW3
4
1
4
SAVE (L/R)
I SOURCE
5
1
15
FL2
3
R40
(2C8)
10
P1
17
CR1
27
15 U1
(1C6)
9
(1B5)
8
POWER/MOTOR
RELAY PCB
SCH. #875997
P2
POWER PANEL
HANDSWITCH
+5V
TP 1, 2,21, 22 TP24
1
CONTROL PANEL
PROCESSOR PCB
SCH. # 875601
U50, 51, &52
OPTOCOUPLERS
C-ARM
INPUT
+5V
16 X-RAY_LAMP
+12V +15V
TP25 TP23
P4
P10
16
15
POWER/SIGNAL
INTERFACE PCB
SCH. #876001
OR #877998
P9
17
OUTPUT
A LOGIC HIGH INPUT
GIVES A LOGIC LOW OUTPUT
REFERENCE TO
9600 C-ARM
SCH. #875500
OR #877972
P5
1
CAMERA
3
9600 C-ARM
For Reference Only
XRAY_ON.DS4
LAMP IN X-RAY
SWITCH ON
CONTROL PANEL
XRAY-ON / DISABLE
3 3 3 3
Page 1 of 3
6/20/96
X-RAY
SWITCH
P10
P4
CR2
2
MOTHERBOARD
SCH. #878396
POWER/SIGNAL
INTERFACE PCB
SCH. #877998
COLUMN I/O PCB
SCH. #878492
14
X-RAY SWITCH
13
16
14
2
SECURITY
1
18
17
J6 P2
CR1
4
5
R33 & C36
300MS.
DELAY
CIRCUIT
(2C8)
16 16
1 U51 7
84 84
4 U50 6
(2C7)
(2B7)
CR12
XRAY REGULATOR PCB
SCH. #877458
3 U24 2
1 U25 2
(2B7)
L
TP20
+5V
P10
P9
P5
P2 J6
(2C7)
9
P7
BOOST SW2
SCOUT
FLUORO SW3
SW1
PROCESS
FLUORO SW4
2
3
3
FLUORO ONLY
8
85 85
1
1
SAVE(L/R)
6
81 81
6
6
X-RAY SWITCH
4
1 U50 7
15
FOOTSWITCH
7
SECURITY
10
4
4
I SOURCE
15
P2
J2
3 U25 4
100 100
P3
2
7
J3
2
7
10
(2C7)
9 U25 8
PROCESS
BOOST
SW1
11 XRAYON
SECURITY
9
U25
6
L
1
3
U6
3
U35
GAL
XRAY ON
D 0-7
U27
PIO
(2B7)
U38
PIO
28
8
13
11
U6
2
(1B7)
12
L
(2D7)
5
26
24
12 XRYDISBL
88 88
XRAYINH
+5V +12V
TP22 TP23
9
L=XRAY ALLOWED
L
U7
KV PAL
4
3
TP 5 -12V
TP24
11
3
5
7
P2
(2C6)
BOOST
27 27
L
1 U52 7
3
(2B5)
13
(2C8)
2
7
U41
(2B5)
L
P3
(1B8)
12
1
3
2 U21
4 U52 6
XRAY EN
P4
(2B5)
10
L
86 86
2
BOOST
L
1
26 26
XRAYEN
8
U41
SAVE
MOTHERBOARD
SCH. # 878396
SCH. #876738
(1B7)
U10
FIL PAL
2
(2D4)
(1A7)
TP27
12
U22
PIO
(2C7)
40
101 101
STORE
13
13
SCOUT
FLUORO
3
3
FLUORO ONLY
P1
(2D7)
7
SW2
L
+5V
SAVE
SW3
1
1
SAVE (L/R)
5
4
4
I SOURCE
14
1
FL2
3
R40
(2C8)
DATA BUS TO/FROM
TECHNIQUE PROCESSOR
REFER TO TECHNIQUE PROCESSOR/
ANALOG INTERFACE
10
P5
16
CR1
27
15 U1
(1C6)
9
(1B5)
8
POWER/MOTOR
RELAY PCB
SCH. #875997
P2
POWER PANEL
HANDSWITCH
+5V
TP 1, 2,21, 22 TP24
U50, 51, &52
OPTOCOUPLERS
INPUT
OUTPUT
A LOGIC HIGH INPUT
GIVES A LOGIC LOW OUTPUT
REFERENCE TO
9600 C-ARM
SCH. #878376
+12V +15V
TP25 TP23
COLUMN I/O PCB
SCH. # 878492
C-ARM
1
+5V
P10
1
16 X-RAY_LAMP
P4
P10
16
15
POWER/SIGNAL
INTERFACE PCB
SCH. #877998
P9
17
3
CAMERA
9600 C-ARM
USE THIS PAGE FOR SERIAL NUMBERS
62-0001 AND HIGHER
For Reference Only
XRAY_ON.DS4
LAMP IN X-RAY
SWITCH ON
CONTROL PANEL
XRAY-ON / DISABLE
3 3 3 3
Page 2 of 3
6/20/96
2 2 2 2
1 1 1 1
POWER PANEL
ON C-ARM
INTERCONNECT CABLE
AUXILIARY INTERFACE
SCH. #876502
L=XRAY ALLOWED
L=XRAY ALLOWED
VIDEO SWITCHING
SCH. #872237
(1D8)
XRAYDIS*
13
P9-1
12
U1
13
12
(1B8)
TP35
14
P6-11
4
1
VMDAT
IMAGE PROCESSOR
SCH. #875952
(1B7)
J8-1
6
5 U42
(1D7)
R9
J8-2
10
U42
8
7
XRAY_ON
R17
(2D2)
2
14
5 2
U38
U28
13
5
5
P6
P6
(2A7)
(2B8)
9
SYNCDET
U13
MUX
TP10
5 (1D6)
1
20
2
U6
SYNC
STRIP
5
U15
(1D4)
(4C4)
TP16
TP3
A/D
VIDEO
(1D5)
J11-5
P4-5
U1
-5V
TP24
+12V
-12V
TP28, 31 TP19
3
U1
J9 P9
13 13
25 25
1
2
DRINTLK
INPUT FROM
ROOM
INTERFACE
(4C3)
1
9 U1
J11 P11
2
2
3
3
4
P8
AT COMM PCB
SCH. #872125
D
U17
A:D
VIDEO IN
3
1
E3 2
LED ARRAY ON TOP
OF WORKSTATION
X-RAY _LAMP*
+12V +5V
6
(1D8)
8
(1B5)
P3
P14
R4
+5
20
XRAYINH
20
U14
LATCH
4
(1A5)
WORKSTATION
TP7
AGND
XRAYON
+5V
TP27
(1D6)
R13
H=SYNC PRESENT
(1D3)
VIDEO
18
D
5
P6-1
8
1
2
3
(1D8) E1
18
SEPINCSY
(1D6)
P6-11
VMDAT
(1A8)
STORE*
1
TP13
CR4
U3
PIO #2
19
7
10
+5
H
9
XRAYINH
2
U1
R155
8
(1D8)
1
(1B7)
+5
J6
U5
P10
TP14
11
+5
L=VIDEO PRESENT
U33
SER-PAR
REG.
(1D8)
P9-2
TP25,23,
39,40
VIDEO
STORE*
22
STORE* 22
REFERENCE TO
9600 WORKSTATION
SCH. # 876158
OR #877970
6
P1
U26
DUART
7
+5V
-5V +12V -12V
TP 3-5,7-8
TP2 & 16 TP15 TP1&6 TP9
E1 NORMALLY JUMPERED 1-2
WOULD ONLY BE JUMPERED 2-3 IF
DOOR INTERLOCK SIGNAL AT P6-1
NEEDED TO BE INVERTED
2
DRINTLK
7
2
(1C5)
TP1-4
9600 C-ARM
For Reference Only
Page 3 of 3
XRAY_ON.DS4
6/20/96
XRAY-ON / XRAY DISABLE
2A
TP20 XRAYSW
Normally high, goes low when Process
Fluoro footswitch or control panel
X-ray switch is pressed.
2A
U41-8 XRAYEN
Normally low, goes high when
Boost, Scout, Process, Fluoro
or control panel X-RAY Switch
is pressed.
TP1
GND
TP23
+15
GND
TP21
2A
U38-10 (X-RAY
SW)
9 10 11 12 14 15
U35
DS1
2A
U41-11 XRAYON
TP20
XRAY SW
8 9 10 11 12 13
U41
2 1
3 2
U27-24 CPU Verified X-ray goes low
after Boost, Scout, Process, Fluoro
or control panel X-ray Switch is pressed.
U24
U25
2J
2A
U38-11 (BOOST)
U22
12
2A
TP28 VIDSTBL
40
U38
U27
3
Normally low, goes high2F when X-rays
are turned on until video level stabilizes
then goes low.
Normally low, goes high when Process
Fluoro footswitch or control panel
X-ray switch is pressed.
13 12 11 10
24
2F
Normally low, goes high
when
Boost is pressed.
TP28
VID STBL
6 5
TP24
+5
TP27
STORE
U23
2A
U38-12 (SCOUT FLUORO)
TP27 STORE
Scout is pressed.
Normally High,
goes Low when X-rays are on,
goes High when X-rays are off.
Last Image Hold = High
2A
U27-12 (X-RAY
DISABLE)
2A
GND
TP22
2A
+12
TP25
U27-24 (CPU Verified X-ray On)
Normally high, goes low when CPU receives
X-ray on command from U38-10 (XRAYSW)
Normally low, goes high to disable X-rays.
Selecting PULSE MODE causes this line
to toggle high and low at an
4 pulse per second rate.
GND
TP2
9600 C-ARM
For Reference Only
XRAYONSS.DS4
X-RAY ON / DISABLE
SIGNAL SHEET
Page 1 of 1
12/4/96
9600 Mobile Digital C-Arm - Image System Block Diagrams, Test Points, and Waveforms
POWER &
FIELD SIZE
SELECT
IMAGE
INTENSIFIER
&
POWER SUPPLY
P4
IMAGE
FUNCTION
PCB
CAMERA
P3
MOTORS
& CONTROL
P1
CCD CAMERA
P2
IRIS
COLLIMATOR
P5
P3
P2
VIDEO
CONTROL
J1
P1
PIXEL FILTER PCB
OR
PIXEL/COLUMN
FILTER PCB
HARDCOPY
CAMERA
AND
VCRS
TECHNIQUE
PROCESSOR
PCB
ANALOG
INTERFACE
PCB
TP1 & TP6 VIDEO IS
ALWAYS INTERLACE
FORMAT
VIDEO LEVEL
J2
SERIAL
COMMUNICATIONS
P3
CAMERA GAIN
VIDEO
HIGH VOLTAGE
CABLE ASSY.
VIDEO
MAINFRAME
MOTHERBOARD
TP10
P2
INTERCONNECT
CABLE
P1
AUX.
INTERFACE
BOARD
P.10-1
TP18
J11
VIDEO
SWITCHING
BOARD
J6
MAINFRAME INTERCONNECT
WORKSTATION INTERCONNECT
TO FAST SCAN BNC
ON REAR PANEL
L
IMAGE
P4 PROCESSOR
BOARD
P4
TP2
TP20
VIDEO
SWITCHING
BOARD
R
P9
DIGITAL RIGHT VIDEO
TP1 P4
TP3
TP6
TP17
TP4
TO LEFT VIDEO BNC
ON REAR PANEL
TO RIGHT VIDEO BNC
ON OLDER REAR
PANEL
DIGITAL LEFT VIDEO
LEFT
FASTSCAN
MONITOR
J2 TP2
J4
FAST SCAN
CONVERTER
TP2
TP2
J5
J8
RIGHT
FASTSCAN
MONITOR
VIDEO TO THE LEFT & RIGHT
MONITORS IS ALWAYS
HIGH SCAN NON-INTERLACED
VIDEO
REFER TO
STATOR RELAY / STATOR SENSE BLOCK DIAGRAM
FOR DETAILS OF X-RAY TUBE WIRING
9600 C-ARM
USE THIS PAGE FOR
SERIAL NUMBERS
69-0001 TO 69-2000
For Reference Only
Page 1 of 2
96VIDOVR.DS4
4/9/96
9600 IMAGE SYSTEM OVERVIEW
BLOCK DIAGRAM
9600 Mobile Digital C-Arm - Image System Block Diagrams, Test Points, and Signal Waveforms
IMAGE
INTENSIFIER
&
POWER SUPPLY
CAMERA
MOTORS
& CONTROL
CCD CAMERA
P2
POWER &
FIELD SIZE
SELECT
P3
VIDEO
J1
E1
IRIS
COLLIMATOR
IMAGE
FUNCTION
PCB
PIXEL FILTER PCB
J2
P6
CAMERA
ASSEMBLY
HARDCOPY
CAMERA
AND
VCRS
TECHNIQUE
PROCESSOR
PCB
ANALOG
INTERFACE
PCB
TP1 & TP6 VIDEO IS
ALWAYS INTERLACE
FORMAT
VIDEO LEVEL
SERIAL
COMMUNICATIONS
TP10
CAMERA GAIN
J1
P1
HIGH VOLTAGE
CABLE ASSY.
P3
MAINFRAME
MOTHERBOARD
P2 J2
VIDEO
INTERCONNECT
CABLE
P1
AUX.
INTERFACE
BOARD
P.10-1
TP18
J11
VIDEO
SWITCHING
BOARD
J6
TP1 P4
TP3
L
IMAGE
P4 PROCESSOR
BOARD
P4
TP2
TP20
VIDEO
SWITCHING
BOARD
TO LEFT VIDEO BNC
ON REAR PANEL
R
P9
TP6
TP17
TP4
VIDEO
DIGITAL RIGHT VIDEO
MAINFRAME INTERCONNECT
WORKSTATION INTERCONNECT
TO FAST SCAN BNC
ON REAR PANEL
DIGITAL LEFT VIDEO
LEFT
FASTSCAN
MONITOR
J2 TP2
J4
FAST SCAN
CONVERTER
TP2
TP2
J5
J8
RIGHT
FASTSCAN
MONITOR
VIDEO TO THE LEFT & RIGHT
MONITORS IS ALWAYS
HIGH SCAN NON-INTERLACED
VIDEO
REFER TO
STATOR RELAY / STATOR SENSE BLOCK DIAGRAM
FOR DETAILS OF X-RAY TUBE WIRING
9600 C-ARM
USE THIS PAGE FOR
SERIAL NUMBERS
62-0001 AND HIGHER
For Reference Only
96VIDOVR.DS4
Page 2 of 2
4/9/96
9600 IMAGE SYSTEM OVERVIEW
BLOCK DIAGRAM
SCH. #876738
SCH. #876735 OR 877742
MOTHER BOARD
SCH.# 875539
MICROPROCESSOR
A/D_0-7
U31
P2 J6
J6 P2
P2 J5
80C188
VLI
22
IMAGE FUNCTIONS PCB
SCH. #874750
P3
VIDEO_LEVEL
P2
1
7
56 56
2
6
KVPCONT
47 47
28
MACONT
53 53
34
54 54
VIDEO_LEVEL
P3
P1
CCD CAMERA
23
10
VIDEO LEVEL
20
9
(1D6)
U30
DATA BUS
U3
U7
U8
A/D_0-7
(5D7)
(1C5)
MOTHER BOARD
SCH.# 875539
0 - 10V
SAMPLE MUX
& A/D CONVERTER
DUAL
PORT
RAM
(1B6) 25
J3 P1
TP24
+5V
TP13
U18
P1 J2
0 - 10V
6
CAM_GAIN
+
CAMERA_GAIN
CAMERA_GAIN
U29
(1A4)
D/A CONVERTER
U31 25
ABS SOFTWARE RESIDING IN RAM
WILL ATTEMPT TO KEEP THE CAMERA VIDEO
CONSTANT BY CONTROLLING
KV,MA, & CAMERA GAIN IN THE AUTO MODE
OR CAMERA GAIN ONLY IN THE MANUAL MODE
(1B6)
6
TP23
+15V
TP19
+
23
P4
U33 (1A4)
2
+
TP25
+12V
TP18
P5 3
U33 (1A4)
D/A CONVERTER
P2
TP28 (2D3)
U22
3
5
(2D7)
6
U23
VIDSTBL
89
89
VIDSTAB*
P1 8
10
SEE CAMERA VIDEO &
PIXEL/COLUMN FILTER PCB
BLOCK DIAGRAM
FOR DETAILS OF
THIS CIRCUITRY
TP1 TP2 TP21 TP22
PIO
PIXEL/COLUMN
FILTER PCB
SCH. # 878045
NOTE: THE PIXEL/COLUMN FILTER PCB
WAS NOT INSTALLED ON ALL SYSTEMS
VIDSTAB*
386 AT
MOTHERBOARD
AT COMMUNICATIONS PCB
SCH. #872125
AUXILIARY
INTERFACE PCB
SCH. #876502
1
(1D7)
U27
DATA BUS
J14
TP10
(1B5)
U14
39
15 (1A5) 5
P3
19
OBJECT
J0 (876158)
P1 (877970)
P14
P10
P14
19
VIDSTAB*
9
4
4
INTERCONNECT
CABLE
TP7
LATCH
LEMO
CONNECTOR
DUART
TP 1, 2, 3, 4
7
X-RAY REGULATION CIRCUITRY
SEE KV AND MA BLOCK DIAGRAMS
FOR DETAILS
REFERENCE TO
IMAGE SYSTEM INTERCONNECT DIAGRAM
SCH. # 875410 OR #877971
ELECTRONICS BOX PANEL
(LOWER REAR RIGHT)
1
REFERENCE TO
WORKSTATION INTERCONNECT DIAGRAM
SCH. # 876158 OR #877970
9600 C-ARM
REFERENCE TO
C-ARM (MAINFRAME)
SCH. # 875500 OR #877972
For Reference Only
USE THIS PAGE FOR
SERIAL NUMBERS
69-0001 TO 69-2000
ABSLOOP.DS4
ABS LOOP
Page 1 of 2
4/12/96
SCH. #876738
SCH. #877742
MOTHER BOARD
SCH.# 878396
MICROPROCESSOR
A/D_0-7
U31
P2 J6
J6 P2
P2 J5
80C188
VLI
22
54 54
VIDEO_LEVEL
27
J2 P2
19 19
56 56
CAMERA_GAIN
26
18 18
P3
P1
CCD CAMERA
10
VIDEO LEVEL
(1D6)
U30
DATA BUS
U3
U7
U8
A/D_0-7
(5D7)
(1C5)
MOTHER BOARD
SCH.# 878396
0 - 10V
SAMPLE MUX
& A/D CONVERTER
DUAL
PORT
RAM
TP24
+5V
TP13
U18
(1B6) 25
J3 P1
P1 J2
0 - 10V
6
CAM_GAIN
+
9
CAMERA_GAIN
U29
(1A4)
D/A CONVERTER
U31 25
ABS SOFTWARE RESIDING IN RAM
WILL ATTEMPT TO KEEP THE CAMERA VIDEO
CONSTANT BY CONTROLLING
KV,MA, & CAMERA GAIN IN THE AUTO MODE
OR CAMERA GAIN ONLY IN THE MANUAL MODE
(1B6)
6
TP23
+15V
TP19
+
23
P4
U33 (1A4)
2
+
TP25
+12V
KVPCONT
47 47
37
MACONT
53 53
14
TP18
U33 (1A4)
D/A CONVERTER
P2
TP28 (2D3)
U22
(2D7)
3
5
VIDSTBL
6
U23
89
89
VIDSTAB*
10
TP1 TP2 TP21 TP22
PIO
OBJECT
VIDSTAB*
386 AT
MOTHERBOARD
SCH. #872125
AUXILIARY
INTERFACE PCB
SCH. #876502
P1
(1D7)
U27
(1B5)
DATA BUS
J14
TP10
39
U14
15 (1A5) 5
LATCH
DUART
TP 1, 2, 3, 4
P3
19
P14
19
P14
P10
VIDSTAB*
9
4
4
INTERCONNECT
CABLE
7
X-RAY REGULATION CIRCUITRY
SEE KV AND MA BLOCK DIAGRAMS
FOR DETAILS
TP7
LEMO
CONNECTOR
REFERENCE TO
IMAGE SYSTEM INTERCONNECT DIAGRAM
SCH. # 878377
ELECTRONICS BOX PANEL
(LOWER REAR RIGHT)
REFERENCE TO
WORKSTATION INTERCONNECT DIAGRAM
SCH. #877970
9600 C-ARM
REFERENCE TO
C-ARM (MAINFRAME)
SCH. # 878376
USE THIS PAGE FOR
SERIAL NUMBERS
62-0001 AND HIGHER
For Reference Only
ABSLOOP.DS4
ABS LOOP
Page 2 of 2
4/12/96
TP1
GND
A
GND
TP21
U3
THE VIDEO LEVEL SIGNAL VARIES
FROM 1 VOLT WITH X-RAYS OFF
TO 6 VOLTS WITH X-RAYS ON.
TYPICAL VIDEO LEVEL VOLTAGE IS
5.75 - 6.0 VOLTS DC DURING X-RAYS.
AUXILIARY INTERFACE PCB
B
C
U7
U22
3
THE CAMERA GAIN SIGNAL
VARIES FROM 0 TO 6 VOLTS DC
AS REQUIRED BY THE ABS
SOFTWARE TO GET A VIDEO LEVEL
SIGNAL OF APPROX. 6 VOLTS FROM
THE CAMERA VIDEO PCB.
THE MA CONTROL SIGNAL WILL
ADJUST UP OR DOWN AS THE ABS
SOFTWARE ON THE TECHNIQUE
PROCESSOR MAKES ADJUSTMENTS
TO ACHIEVE THE PROPER VIDEO
LEVEL SIGNAL
P14
TP28
VID STBL
U8
E
GND
TP7
DS1
22
A
U23
D
E
VIDSTB*
TP10
D
P10
KVP CNT
TP19
U33
TP13
CAM GAIN
TP18
MA CNT
U29
B
C
THE KV CONTROL SIGNAL WILL
ADJUST UP OR DOWN AS THE ABS
SOFTWARE ON THE TECHNIQUE
PROCESSOR MAKES ADJUSTMENTS
TO ACHIEVE THE PROPER VIDEO
LEVEL SIGNAL
E
HIGH TO LOW TRANSITION
U31
U18
VIDEO STABLE GOES FROM HIGH TO
LOW AFTER THE ABS LOOP HAS
BEEN SATISFIED AND THE VIDEO
SIGNAL IS STABLE.
TP22
GND
TP2
GND
GENERATOR
WORKSTATION
9600 C-ARM
For Reference Only
Page 1 of 1
ABSLOPSS.DS4
5/17/96
9600 ABS LOOP
SIGNAL SHEET
POWER/MOTOR
RELAY PCB
SCH. #875997
(1D7)
TP1
OF +24V DISTRIBUTION
7
+24V _IN
+24V
P7
P2
P5
IMAGE FUNCTIONS PCB
SCH. #874750
P3
P1
1
3
22
2
+24V_CAMERA
2
4
19
1
DC_COM_CAM
CCD CAMERA
SCH. #876738
MOTHER BOARD
SCH.# 875539
P3
P2 J6
U38
40
12
13 U26
11
(S3)
64
64
(S3)
10
18
INTEGRATE
12
U19
11
(1D8)
RS232
RECEIVER/
DRIVER
(2D7)
ANALOG INTERFACE
BLOCK DIAGRAM
FOR DETAILS OF
THIS CIRCUITRY
11
10
13
5
INTEGRATE
1
3
4
15
8
UNITY GAMMA
2
13
12
14
7
ANTI_VIGNETTE
5
6
16
4
TEST PATTERN
3
PIO
4
U5
+15V
(1C3)
+5V
20
24
+15V 1
U9
3
+5V
(1A5)
E9 (1B8)
R21
5
ASM TEC POWER
R22
SCH. #876735 OR 877742
RXD
U39
TXD
70 70
72 72
21
22
2
1
IFBTX 19
IFBRX 9
U17
(1D8)
24 18 U16
(1C6)
10 17
8
/
RS232
RECEIVER/
DRIVER
OUTPUT
LATCH
1
COOLER RTN
1
TP3
(1B7)
19
SEE IMAGE FUNCTIONS PCB
& COLLIMATOR MOTORS
OF MICRO CONTROLLER CIRCUITRY
5
REFERENCE TO
IMAGE SYSTEM
SCH. # 875410 OR #877971
7
A13P1
(1B8)
INTEGRATE USED IN PULSED MODE TO HALT
SCANNING OF CCD SENSOR. LOW=SCANNING IS HALTED
NORMAL IMAGING - GAMMA=.07 - SIGNAL IS HIGH
D
2 SUBTRACTION OR ROADMAPPING - GAMMA=1.0(LINEAR)
G
Q3
REFERENCE TO
C-ARM (MAINFRAME)
SCH. # 875500 OR #877972
COOLER +
U6 13
(1C3) 16
19
SEE APPROPRIATE C-ARM
FOR DETAILS
3
R4
MICRO
CONTROLLER
P2 J5
8
SIGNAL IS LOW
S
(1A5)
TP1 TP2
3
ANTI-VIGNETTING USED TO CORRECT SHADING IN
PERIPHERY OF IMAGE FOR OVERALL EVEN SHADING
ACTIVE LOW SIGNAL. USED IN LARGE FIELD ONLY.
4
TEST PATTERN NOT USED
E9 JUMPERS ARE FOR CURRENT LIMITING
THE COOLER +5V. THEY ARE NOT USED AT
THIS TIME
9600 C-ARM
For Reference Only
USE THIS PAGE FOR
SERIAL NUMBERS
69-0001 TO 69-2000
CAMCNTRS.DS4
Page 1 of 2
6/6/96
CCD CAMERA CONTROLS
REFERENCE TO
C-ARM (MAINFRAME)
SCH. # 878376
POWER/MOTOR
RELAY PCB
SCH. #875997
(1D7)
TP1
OF +24V DISTRIBUTION
7
+24V _IN
+24V
P7
P3
P5
J1
CCD CAMERA
6
13 13
2
+24V_CAMERA
2
3
5
12 12
1
DC_COM_CAM
IMAGE FUNCTIONS PCB
SCH. #878398
12
13 U26
11
(S3)
64
64
P2 J1
J1 P2
P2 J6
64 64
(S3)
(S3)
INTEGRATE
12
U19
(1D8)
(2D7)
ANALOG INTERFACE
BLOCK DIAGRAM
FOR DETAILS OF
THIS CIRCUITRY
J2 P2
4
MOTHER BOARD
SCH.# 878396
40
P3
1
SCH. #876738
U38
MOTHER BOARD
SCH.# 878396
REFERENCE TO
IMAGE SYSTEM
SCH. # 878377
10
17 17
8
15 15
5
3
4
25
17 17
8
13
12
13 13
11 11
7
ANTI_VIGNETTE
6
15
24
7
16 16
5
14 14
4
TEST PATTERN
11
11
RS232
RECEIVER/
DRIVER
15
INTEGRATE
UNITY GAMMA*
PIO
1
2
3
4
U5
(1C3)
+5V
E9 (1B8)
R21
5
ASM TEC POWER
R22
SCH. #877742
RXD
U39
TXD
71 71
70 70
73 73
72 72
IFBTX19 U17
IFBRX 9
(1D8)
24 18 U16
(1C6)
10 17
28
20 20
3
COOLER +
119 119
29
21 21
1
COOLER RTN
R4
MICRO
CONTROLLER
P2 J5
117 117
8
/
A13P1
U6 13
(1C3) 16
19
FOR DETAILS
+5V
J4 P1
RS232
RECEIVER/
TP7
+5V DRIVER
TP8
34 34
19
1
TP3
+15V
SEE IMAGE FUNCTIONS PCB
& COLLIMATOR MOTORS
2 SUBTRACTION OR ROADMAPPING - GAMMA=1.0(LINEAR)
G
SIGNAL IS LOW
S
(1B8)
5
INTEGRATE USED IN PULSED MODE TO HALT
SCANNING OF CCD SENSOR. LOW=SCANNING IS HALTED
NORMAL IMAGING - GAMMA=.07 - SIGNAL IS HIGH
D
(1B7)
Q3
55 55
+15V
OUTPUT
LATCH
(1A5)
TP1 TP2
3
ANTI-VIGNETTING USED TO CORRECT SHADING IN
PERIPHERY OF IMAGE FOR OVERALL EVEN SHADING
ACTIVE LOW SIGNAL. USED IN LARGE FIELD ONLY.
4
TEST PATTERN NOT USED
E9 JUMPERS ARE FOR CURRENT LIMITING
THE COOLER +5V. THEY ARE NOT USED AT
THIS TIME
USE THIS PAGE FOR
SERIAL NUMBERS
62-0001 AND HIGHER
9600 C-ARM
For Reference Only
CAMCNTRS.DS4
Page 2 of 2
6/6/96
CCD CAMERA CONTROLS
MOTHER BOARD
SCH.# 875539
SCH. #876738
IMAGE FUNCTIONS PCB
SCH. #874750
+15
1
U1
(1B8)
2 +10V
CCD CAMERA
P3
P3
10
+CAM_ROT
1
+
9
-CAM_ROT
2
-
5
CAM_ROT_HI
5
7
11
+CAM_IRIS
3
+
12
-CAM_IRIS
4
-
6
24
CAM_IRIS_HI
6
0 - 6.8V
25
ANALOG INTERFACE
BLOCK DIAGRAM
FOR DETAILS OF
THIS CIRCUITRY
P2 J6
P3
P2
59 59
7
8
CAM_ROT_WIPER
21
SAMPLE
MUX
U3
(1D6)
26
60 60
30
CAM_IRIS_WIPER (NOT USED)
5
3
+15V
24
+15V 1
U9
3
8
THE CAMERA IRIS IS CLOSED
TO MINIMUM ONLY DURING A SHOT IN
THE PULSED BOOST
FLUOROGRAPHY MODE
(1A5)
(1A5)
IRIS
MOTOR
CAM_POTS_LO 9
+5V
20
ROTATION
MOTOR
TP1 TP2
SCH. #876735 OR 877742
1
U3
MICRO
CONTROLLER
P2 J5
(1D2)
U11 21
(1D3)
RXD
U39
TXD
70 70
21
2
IFBTX 19
72 72
22
1
IFBRX 9
FOR DETAILS
U17
(1D8)
24 18 U16
(1C6)
10 17
RS232
RECEIVER/
DRIVER
3
2
EN1 1
7
1
6
SEE COLLIMATOR MOTOR DRIVE
8
/
23
20
22
MOTOR
LATCH
PLD
EN2
11
10
9
15
14
MOTOR
DRIVER
9600 C-ARM
For Reference Only
REFERENCE TO
C-ARM (MAINFRAME)
SCH. # 875500 OR #877972
REFERENCE TO
IMAGE SYSTEM
SCH. # 875410 OR #877971
USE THIS PAGE FOR
SERIAL NUMBERS
69-0001 TO 69-2000
CAMMTRS.DS4
Page 1 of 2
6/6/96
CCD CAMERA MOTOR DRIVE
IRIS / ROTATION MOTORS
IMAGE FUNCTIONS PCB
SCH. #878398
SCH. #877742
SCH. #876738
0 - 6.8V
MICRO
CONTROLLER
25
U11 21
(1D3)
ANALOG INTERFACE
BLOCK DIAGRAM
FOR DETAILS OF
THIS CIRCUITRY
SAMPLE
MUX
U3
IFBTX 19
IFBRX 9
U17
(1D8)
24 18 U16
(1C6)
10 17
23
20
22
RXD
TXD
FOR DETAILS
EN2
6
11
10
9
15
MOTOR
LATCH
PLD
RS232
RECEIVER/
DRIVER
26
3
8
/
(1D6)
U39
U3
(1D2)
2
EN1 1
7
14
MOTOR
DRIVER
(1A5)
+15
1
U1
2 +10V
TP1 TP2
(1B8)
60
60
59
59
P2
J6
72 70
P2
P2 71 73
35
29 27
25 23 21 19
72 70
J5
J1
35
29 27
25 23 21 19
71 73
CAM_POTS_LO
CAM_IRIS_HI
CAM_ROT_HI
-CAM_IRIS
+CAM_IRIS
REFERENCE TO
C-ARM (MAINFRAME)
SCH. # 878376
REFERENCE TO
IMAGE SYSTEM
SCH. # 878377
-CAM_ROT
+CAM_ROT
MOTHER BOARD
SCH.# 878396
P3
16
15
J2
8
7
9 6 4 3 5 2 1
P2
8
7
9 6 4 3 5 2 1
17 14 12 11 13 10 9
CAM_ROT_WIPER
P3
1
+
2
-
5
7
3
4
6
CAM_IRIS_WIPER (NOT USED)
8
9
CCD CAMERA ASSEMBLY
ROTATION
MOTOR
+
-
IRIS
MOTOR
THE CAMERA IRIS IS CLOSED
TO MINIMUM ONLY DURING A SHOT IN
THE PULSED BOOST
FLUOROGRAPHY MODE
USE THIS PAGE FOR
SERIAL NUMBERS
62-0001 AND HIGHER
9600 C-ARM
For Reference Only
Page 2 of 2
CAMMTRS.DS4
6/6/96
CCD CAMERA MOTOR DRIVE
IRIS / ROTATION MOTORS
DS2, WHEN ILLUMINATED, INDICATES THAT THE
COLLIMATOR IRIS DID NOT GO TO THE EXPECTED
SIZE FOR THE MAG MODE SELECTED
1
3
DS1 BLINKS ON AND OFF AS A VISUAL INDICATION
THAT THE MICROCONTROLLER IS RUNNING
2
E5 JUMPER INSTALLED ONLY DURING COLLIMATOR
IRIS SIZE CALIBRATION. WITH E5 INSTALLED THE IRIS
POTENIOMETER VALUES ARE WRITTEN TO THE
EEPROM U7 FOR EACH MAG MODE.
IMAGE FUNCTIONS PCB
SCH. #874750
+5
R19
1
(1C3)
1
U6
R3
DS1
9
(1C3)
(1C2)
U5
2
2
1 38
P3
P2 P5
P2
SEE CONTROL PANEL PROCESSOR/
TECHNIQUE PROCESSOR
OF THE MASTER RESET CIRCUIT
TP4
6
U8
75 75
18
MRESET*
21
1
(1D6)
(1D4)
(1D3)
(1C6)
(1C4)
U39
TXD
22
72 72
1
IFBTX
IFBRX
19
9
U17
(1D8)
20
+
9
4
-
IRIS
MOTOR
6
+SHUT_IN/OUT 8
+
7
-SHUT_IN/OUT 1
-
LEAF IN/OUT
MOTOR
4
+SHUT_ROT
9
+
5
-SHUT_ROT
2
-
LEAF ROTATION
MOTOR
U4
BOOT
PROM
10 17
22
18
23
STATIC
RAM
24
A 8-15
U13
6
7
EN1 1
2
19
A 0-7
24 18
+15V
FOR DETAILS
5
-COL_IRIS
(1D2)
(1D6)
2
+COL_IRIS
14
MOTOR
DRIVER
U15
U10
21
10
(1C5)
WATCHDOG TIMER
(150MS) AND
POWER MONITOR (5%)
70 70
10
EN2 9
15
ADDRESS
DECODING
U12
RXD
3
+5V
16
16
23
IRIS
POT
6
7
EN1 1
2
EEPROM
U11
E8
7
U18
14
17
15
U16
(1D7)
IRIS_POT_HI 3
IRISSIG
10
COL_IRIS_RTN 6
(1C8)
OUTPUT
LATCH
COLLIMATOR
(1C2)
AD 0-7
67
3
Y1
1
U7
8MHZ.
MOTHER BOARD
SCH.# 875539
3
E5 (1C8)
3
SCH. #876735 OR 877742
U2
18
(1C3)
3
2
(1C8)
IRIS CLOSED = .7V
IRIS OPENED = 4.3V
TERMINAL
BLOCK
P1
DS2
1
+5
3
FL4
EN2
3
14
15
9
10
11
(1B4)
RS232
RECEIVER/
DRIVER
CS_EPROM
CS_SRAM
CS_EEPROM
CS_INPUT
CS_OUTPUT
CS_MOTORS
39
MICRO
CONTROLLER
CHIP
SELECT
PAL
PWM0
MOTOR
DRIVER
6
4
MOTOR
LATCH
PLD
+
K3
+5V
+15V 1
4
11
11
U9
3
13
1
16
4
RELAY SHOWN IN THE
DEENERGIZED POSITION
(1A5)
TP1 TP2
(1A5)
9600 C-ARM
For Reference Only
REFERENCE TO
C-ARM (MAINFRAME)
SCH. # 875500 OR #877972
REFERENCE TO
IMAGE SYSTEM
SCH. # 875410 OR #877971
USE THIS PAGE FOR
SERIAL NUMBERS
69-0001 TO 69-2000
COLLMTRS.DS4
Page 1 of 2
6/6/96
COLLIMATOR MOTOR DRIVE
IRIS / LEAF MOTORS
DS2, WHEN ILLUMINATED, INDICATES THAT THE
COLLIMATOR IRIS DID NOT GO TO THE EXPECTED
SIZE FOR THE MAG MODE SELECTED
1
3
DS1 BLINKS ON AND OFF AS A VISUAL INDICATION
THAT THE MICROCONTROLLER IS RUNNING
2
E5 JUMPER INSTALLED ONLY DURING COLLIMATOR
IRIS SIZE CALIBRATION. WITH E5 INSTALLED THE IRIS
POTENIOMETER VALUES ARE WRITTEN TO THE
EEPROM U7 FOR EACH MAG MODE.
IMAGE FUNCTIONS PCB
SCH. #878398
+5
R19
1
DS2
1
(1C3)
+5
1
U6
R3
DS1
9
(1C3)
(1C2)
U5
2
2
1 38
J1 P2
P2 P5
SEE CONTROL PANEL PROCESSOR/
TECHNIQUE PROCESSOR
OF THE MASTER RESET CIRCUIT
TP4
6
U8
75 75
MRESET*
90 90
1
(1D6)
(1D4)
U11
(1D3)
(1C6)
7
(1C4)
U39
TXD
73
72 72
73
IFBTX
19
9
IFBRX
U17
(1D8)
BOOT
PROM
+15V
+5V
J4 P1
10 17
A 8-15
TP1 TP2
(1A5)
+COL_IRIS
7
5
+
78 78
-COL_IRIS
6
4
-
96 96
+SHUT_IN/OUT
9
8
+
94 94
-SHUT_IN/OUT
3
1
-
100 100
+SHUT_ROT
10
9
+
98 98
-SHUT_ROT
4
2
-
IRIS
MOTOR
LEAF IN/OUT
MOTOR
LEAF ROTATION
MOTOR
U13
6
7
EN1 1
2
EN2
3
14
15
9
10
11
(1B4)
TP7
+5V
22
18
23
STATIC
RAM
CS_EPROM
CS_SRAM
CS_EEPROM
CS_INPUT
CS_OUTPUT
CS_MOTORS
TP8
+15V
19
A 0-7
24 18
RS232
RECEIVER/
DRIVER
FOR DETAILS
80 80
IRIS
POT
U4
U10
71
6
(1D2)
(1D6)
71
8
(1C5)
WATCHDOG TIMER
(150MS) AND
POWER MONITOR (5%)
70 70
COL_IRIS_RTN
14
MOTOR
DRIVER
U15
U12
RXD
3
10
EN2 9
15
ADDRESS
DECODING
23
3
10
6
7
EN1 1
2
+5V
16
16
E8
87 87
5
11
IRISSIG
EEPROM
U16
(1D7)
106 106
85 85
IRIS_POT_HI
(1C2)
AD 0-7
67
3
Y1
U18
14
17
15
U7
8MHZ.
MOTHER BOARD
SCH.# 878396
(1C8)
OUTPUT
LATCH
COLLIMATOR
P6
P2 J1
3
E5 (1C8)
3
SCH. #877742
U2
18
(1C3)
3
FL4
(1C8)
IRIS CLOSED = .7V
IRIS OPENED = 4.3V
TERMINAL
BLOCK
MOTHER BOARD
SCH.# 878396
39
MICRO
CONTROLLER
CHIP
SELECT
PAL
PWM0
MOTOR
DRIVER
6
4
11
11
4
MOTOR
LATCH
PLD
+
K3
4
RELAY SHOWN IN THE
DEENERGIZED POSITION
13
1
16
REFERENCE TO
C-ARM (MAINFRAME)
SCH. # 878376
REFERENCE TO
IMAGE SYSTEM
SCH. # 878377
9600 C-ARM
USE THIS PAGE FOR
SERIAL NUMBERS
62-0001 AND HIGHER
For Reference Only
Page 2 of 2
COLLMTRS.DS4
6/6/96
COLLIMATOR MOTOR DRIVE
IRIS / LEAF MOTORS
CAMERA ROTATION MOTOR CW
COLLIMATOR IRIS MOTOR - OPEN
U3-3
DS1
10VDC
10S
U18-6
U2
U3
10 VDC
500MS
U3-6
U4
DS2
U8
U18-3
GND
TP1
K3
TP4
U17
CAMERA ROTATION MOTOR CCW
U3-3
COLLIMATOR IRIS MOTOR - CLOSE
OEC MEDICAL SYSTEMS, INC.
IMAGE FUNCTION PCB
ASSY 00-874752- ( )
10VDC
10S
U18-6
10 VDC
500MS
U18-3
U3-6
CAMERA IRIS MOTOR
U18
GND
TP2
1
23
2
24
P2
U3-11
LEAF MOTOR - OUT
COLLIMATOR IRIS POTENIOMETER WIPER
U2-1 OR U16-9
OPENED
CLOSED
U4-6
LEAF ROTATION MOTOR-DYNAMIC BRAKING CONTROL
10VDC
10S
3.45VDC
.83 VDC
10VDC
10S
U4-3
LEAF ROTATION MOTOR - CW
U4-14
U18-14
10VDC
10S
10VDC
500ms
U4-11
U3-14
CAMERA ROTATION POTENIOMETER WIPER
P3-21, P2-8, OR ANALOG INTERFACE PCB U3-25
Signal seen during rotation
LEAF MOTOR - IN
IFBRX
U17-9
U4-6
10VDC
10S
U4-3
FULLY CW 0 VDC
FULLY CCW 6.56 VDC
LEAF ROTATION MOTOR - CCW
SERIAL
COMMUNICATIONS
FROM
TECHNIQUE PROCESSOR
10VDC
2ms
IFBTX
U17-19
U4-14
USE THIS PAGE FOR
SERIAL NUMBERS
69-0001 TO 69-2000
9600 C-ARM
10VDC
10S
For Reference Only
COLCAMSS.DS4
U4-11
Page 1 of 4
7/9/96
COLLIMATOR & CAMERA SIGNAL SHEETS
COLLIMATOR & CAMERA MOTORS
CAMERA ROTATION MOTOR CCW
CAMERA ROTATION MOTOR CW
U3-3
U3-3
10VDC
10S
10VDC
10S
U3-6
U3-6
IMAGE FUNCTION PCB
ASSY 00-878400- ( )
LEAF ROTATION MOTOR - CCW
LEAF ROTATION MOTOR - CW
U4-14
U4-14
10VDC
10S
10VDC
10S
U4-11
U4-11
U18
GND
TP2
K3
U8
LEAF ROTATION MOTOR-DYNAMIC BRAKING CONTROL
CAMERA IRIS MOTOR
U4
U2
U3
TP4
U3-11
U18-14
10VDC
10S
10VDC
500ms
U3-14
GND
TP1
Signal seen during rotation
I.F. FAULT
mP GOOD
IFBTX IFBRX
TP6 TP5
DS2
DS1
IFBRX
TP5
COLLIMATOR IRIS MOTOR - CLOSE
COLLIMATOR IRIS MOTOR - OPEN
LEAF MOTOR - OUT
LEAF MOTOR - IN
U4-6
U18-6
U18-3
U18-3
IFBTX
TP6
U4-6
U18-6
10VDC
2ms
SERIAL
COMMUNICATIONS
FROM
TECHNIQUE PROCESSOR
U4-3
U4-3
10 VDC
500MS
10 VDC
500MS
10VDC
10S
10VDC
10S
USE THIS PAGE FOR
SERIAL NUMBERS
62-0001 AND HIGHER
COLLIMATOR IRIS
POTENIOMETER WIPER
U2-1
OPENED 3.45 VDC
CLOSED .83VDC
CAMERA ROTATION
POTENIOMETER WIPER
ANALOG INTERFACE PCB U3-25
FULLY CW 0VDC
FULLY CCW 6.56VDC
9600 C-ARM
For Reference Only
COLCAMSS.DS4
Page 2 of 4
7/9/96
COLLIMATOR & CAMERA MOTORS
INTEGRATE
IFB P3-13, U5-10 OR CAMERA J1-5
PULSE MODE OR PULSE BOOST MODE
ALL OTHER MODES, +5V
UNITY GAMMA
HI (+5V WHEN NOT IN SUBTRACTION OR ROAD MAP)
LO (0V WHEN IN SUBTRACTION OF ROAD MAP)
TEST PATTERN (NOT USED) IFB P3-16, U5-6 OR CAMERA J1-4
HI WHEN NOT ENABLED
LO CAUSES TEST PATTERN 5 1/2" X 5 1/2"
REFER TO FSB #94-025
24
2
23
+5V
0V
ANTI VIGNETTE
NORMAL MODE - LOW
MAG 1 - HI
MAG 2 - HI
CAMERA VIDEO SIGNAL - NO X-RAYS
P3
1
DS1
CAMERA GAIN
IFB P3-20 OR CAMERA J1-9
MIN. 0V
MAX. +9V
U5
DS2
TP1
GND
IFB P3-23 OR CAMERA J1-10
MIN. 0V
MAX. 9.5V
AUTO MODE +4.5V - FLAT FIELD
AUTOMODE +4.5V - MESH TOOL
CAMERA VIDEO SIGNAL
CENTER PIN OF CAMERA J2
J1
1
IMAGE FUNCTION PCB
ASSY 00-874752- ( )
J2
TP2
GND
1
23
2
24
P2
+24V
IFB P2-3, OR CAMERA J1-2
IF FAULT
IFB P2-11, U5-8
DS2 OFF - 0V WHEN NOT FAULT
DS2 ON - +5V WHEN FAULT IS INDICATED
9600 C-ARM
USE THIS PAGE FOR
SERIAL NUMBERS
69-0001 TO 69-2000
For Reference Only
COLCAMSS.DS4
Page 3 of 4
7/9/96
CAMERA CONTROLS
CAMERA VIDEO SIGNAL - NO X-RAYS
IMAGE FUNCTION PCB
ASSY 00-878400- ( )
GND
TP2
+24V
CAMERA J1-2
CAMERA VIDEO SIGNAL
CENTER PIN OF CAMERA J2
U5
J1
1
GND
J2
TP1
I.F. FAULT
DS2
mP GOOD
DS1
UNITY GAMMA
IFB U5-4 OR CAMERA J1-8
HI (+5V WHEN NOT IN SUBTRACTION OR ROAD MAP)
LO (0V WHEN IN SUBTRACTION OF ROAD MAP)
IF FAULT
IFB U5-8
DS2 OFF - 0V WHEN NOT FAULT
DS2 ON - +5V WHEN FAULT IS INDICATED
TEST PATTERN (NOT USED) IFB U5-6 OR CAMERA J1-4
HI WHEN NOT ENABLED
LO CAUSES TEST PATTERN 5 1/2" X 5 1/2"
REFER TO FSB #94-025
INTEGRATE
PULSE MODE OR PULSE BOOST MODE
ALL OTHER MODES, +5V
ANTI VIGNETTE
NORMAL MODE - LOW
MAG 1 - HI
MAG 2 - HI
CAMERA GAIN
CAMERA J1-9
MIN. 0V
MAX. +9V
CAMERA J1-10
MIN. 0V
MAX. 9.5V
AUTO MODE +4.5V - FLAT FIELD
AUTOMODE +4.5V - MESH TOOL
9600 C-ARM
+5V
0V
USE THIS PAGE FOR
SERIAL NUMBERS
62-0001 AND HIGHER
For Reference Only
Page 4 of 4
COLCAMSS.DS4
7/9/96
CAMERA CONTROLS
POWER/MOTOR
RELAY PCB
SCH. #875997
TP2
IMAGE FUNCTIONS PCB
SCH. #874750
IMAGE INTENSIFIER
(1D7)
+24V _IN
(900753)
TP1
P7
P5
7
4
5
II_24V
P2
6
9
8
12
+24/II
TP4
24V_INTERLOCK 1 +
OF +24V DISTRIBUTION AND
24V INTERLOCK DETAILS
DC COM II
TP8
(1D7)
II_ON 12
K7
P1
1
G1
(2D7)
II_ON
P2 J6
P2
2
0V 4
70 70
31
7
Ue 1
6
M1 3
MEDFIELD
8 U43 12
(2C6)
Q6
(2B2)
TP1, 2, 21, 22
+15V
PIO
P3
20
6
+5V
24
+15V
1
U9
(1A8)
SMALL
FIELD
SCH. #876735 OR 877742
E
PC
A
TXD
70 70
72 72
FOR DETAILS
Q1
(1B3)
8
II HIGH VOLTAGE
POWER SUPPLY
2
5
M2 7
SMALLFLD
(900752)
E1
+
-
K1
MICRO
CONTROLLER
P2 J5
RXD
7
5
3
3
4
1
U39
G4 GND
J7
P4
24
G3
MOTHER BOARD
SCH.# 875539
SCH. #876738
ANALOG INTERFACE
BLOCK DIAGRAM
FOR DETAILS OF
THIS CIRCUITRY
U38
G2
21
22
2
1
IFBTX 19
IFBRX 9
U17
(1D8)
24 18 U16
(1C6)
10 17
RS232
RECEIVER/
DRIVER
CR4
8
/
U6 14
(1C3) 15
OUTPUT
LATCH
CR5
3
4
1
Q2
2
+
CR3
(1B3)
8
MED
FIELD
K2
(1A5)
TP1 TP2
9600 C-ARM
For Reference Only
REFERENCE TO
C-ARM (MAINFRAME)
SCH. # 875500 OR #877972
REFERENCE TO
IMAGE SYSTEM
SCH. # 875410 OR #877971
USE THIS PAGE FOR
SERIAL NUMBERS
69-0001 TO 69-2000
IICNTRLS.DS4
Page 1 of 2
9/19/96
FUNCTIONAL SCHEMATIC
POWER/MOTOR
RELAY PCB
SCH. #875997
TP2
IMAGE INTENSIFIER
(900753)
(1D7)
TP1
P7
+24V _IN
P3
6
II_+24V
2
P3
20
8
DC COM II
1
22
P5
7
4
5
II_+24V
TP4
24V_INTERLOCK 1 +
OF +24V DISTRIBUTION AND
24V INTERLOCK DETAILS
TP8
(1D7)
II_ON 12
K7
P1
1
31
G1 G2 G3 G4 GND
P2
E PC
A
SCH. #876738
ANALOG INTERFACE
BLOCK DIAGRAM
FOR DETAILS OF
THIS CIRCUITRY
U38
(2D7)
J7
P2 J6
II_ON
24
IMAGE FUNCTIONS PCB
SCH. #878398
70 70
P2 J1
8 U43 12
(2C6)
Q6
(2B2)
TP1, 2, 21, 22
6
4
1
SMALL
FIELD
U39
TXD
FOR DETAILS
(1B3)
8
(900752)
0V 4
3
3
5
5
21
M1 3
MEDFIELD
2
9
9
23
M2 7
SMALLFLD
E1
+
-
K1
MICRO
CONTROLLER
P2 J5
RXD
Q1
II HIGH VOLTAGE
POWER SUPPLY
7
5
3
PIO
SCH. #877742
Ue 1
J1 P2
71 71
70 70
73 73
72 72
IFBTX19
IFBRX 9
U17
(1D8)
24 18 U16
(1C6)
10 17
MOTHER BOARD
SCH.# 878396
+5V
J4 P1
RS232
RECEIVER/
TP7
+5V DRIVER
U6 14
(1C3) 15
OUTPUT
LATCH
TP8
34 34
CR5
3
4
1
Q2
2
+
CR3
(1B3)
8
MED
FIELD
K2
(1A5)
55 55
+15V
MOTHER BOARD
SCH.# 878396
CR4
8
/
TP1 TP2
+15V
REFERENCE TO
C-ARM (MAINFRAME)
SCH. # 878376
REFERENCE TO
IMAGE SYSTEM
SCH. # 878377
9600 C-ARM
For Reference Only
USE THIS PAGE FOR
SERIAL NUMBERS
62-0001 AND HIGHER
IICNTRLS.DS4
Page 2 of 2
9/19/96
FUNCTIONAL SCHEMATIC
POWER/MOTOR
RELAY PCB
TP4 - "+24V INTLK"
CR8
7
1
P4
U6
R5
K2
R6
Q2
Q1
POWER/MOTOR
RELAY PCB
P5-6 - "+24VII"
CR3
CR4
E1
POWER/MOTOR
RELAY PCB
TP8 - "II_ON"
K1
K7
TP4 TP1 TP8
TP2
10VDC
10S
U17
TP1
10VDC
10S
IMAGE
FUNCTION PCB
U6-15
ASSY 00-875999- ( )
10VDC
10S
IMAGE FUNCTION PCB
ASSY 00-874752- ( )
POWER/MOTOR
RELAY PCB
TP8 - "II_ON"
TP2
1
23
2
24
P2
P5
5
10
6
1
IMAGE
FUNCTION PCB
P4-6
(MEDFIELD)
IMAGE
FUNCTION PCB
U6-14
10VDC
10S
IMAGE
FUNCTION PCB
P4-5
(SMALLFLD)
USE THIS PAGE FOR
SERIAL NUMBERS
69-0001 TO 69-2000
9600 C-ARM
For Reference Only
Page 1 of 2
II_CNTSS.DS4
10/8/96
SIGNAL SHEET
IMAGE FUNCTION PCB
ASSY 00-878400- ( )
POWER/MOTOR
RELAY PCB
TP4 - "+24V INTLK"
CR8
K7
TP4 TP1 TP8
TP2
10VDC
10S
POWER/MOTOR
RELAY PCB
TP8 - "II_ON"
P2
POWER/MOTOR
RELAY PCB
P5-6 - "+24VII"
10VDC
10S
U6
POWER/MOTOR
RELAY PCB
TP8 - "II_ON"
15
14
E1
Q1
TP2
GND
K1
K2
P5
5
10
1
6
P1
ASSY 00-875999- ( )
TP1
GND
CR5
24
19
U17
9
10
10VDC
10S
IMAGE
FUNCTION PCB
P2-5
(MEDFIELD)
CR3
CR4
Q2
U16
IMAGE
FUNCTION PCB
U6-15
IMAGE
FUNCTION PCB
U6-14
10VDC
10S
IMAGE
FUNCTION PCB
P2-9
(SMALLFLD)
9600 C-ARM
USE THIS PAGE FOR
SERIAL NUMBERS
62-0001 AND HIGHTER
For Reference Only
Page 2 of 2
II_CNTSS.DS4
10/8/96
SIGNAL SHEET
SCH.# 878045
+5P
NOTE: THE +5P IS SOURCED
FROM THE CCD CAMERA AND
IS USED ONLY FOR PIXEL FILTER
CIRCUITRY
CCD CAMERA
R11
PIXEL FILTER CIRCUITRY
R10
C10
MOTHERBOARD
SCH. #875539
C11
J2
P2
J1
1
VIDEO
COAX SHIELD
R12
3
2
1
1
2
J1
1
14
COAX SHIELD
28
2
15
5
U4
6
INTERCONNECT
CABLE TO
WORKSTATION
PIXEL FILTER PCB - SCH.#877789
IS MADE UP OF COMPONENTS
WITHIN DOTTED LINES
1
7
Q1
60nS
DELAY CIRCUIT
TP1 (1C2)
(1D3)
R1
+5P
P3
P2
29
2
(1D4) 5
+5V
P3
1
TP2
J3
8
6
7
5
R2
COLUMN FILTER CIRCUITRY
R4
R3
U3
8
5
4
PIXCLK
25
3
3
HDRV
44
+5V
DA 0-3
7
DACLK 12
U2
2
1
OFF 0-3
(1B2)
20
D/A
CONVERTER
(1F5)
SW1
REFERENCE TO
IMAGE SYSTEM
SCH. # 875410 OR #877971
VREF 16
CAMERA_GAIN
D 0-7
U1
(1F7)
P3 20
P5
P2
6
SEE ABS LOOP
BLOCK DIAGRAM
OF CAMERA GAIN
CIRCUIT
3
CAMERA_GAIN
+15V 1
U20
3
+5V
(1A7)
TP1 & 2
1
2
SW2
IPOS 0-3
A 0-9
16 POSITION
ROTARY SWITCHES
ADDRESS
CONTROLLER
EPLD
EPROM
PROGRAMMED WITH
COLUMN CORRECTION
DATA FOR THE PARTICULAR
CCD CHIP ON THE CAMERA
IMAGE FUNCTION PCB
SCH.# 874750
1
REFERENCE TO
C-ARM (MAINFRAME)
SCH. # 875500 OR #877972
9600 C-ARM
NOTE: SOME SYSTEMS MAY HAVE THE
PIXEL FILTER PCB IN PLACE OF THE
For Reference Only
PIX_COL.DS4
USE THIS PAGE FOR
SERIAL NUMBERS
69-0001 TO 69-2000
Page 1 of 2
4/19/96
CAMERA VIDEO &
+5
CCD CAMERA
R1
C1
P2
1
COAX SHIELD
C2
P2
J1 P1
R3
3
J1
VIDEO
R2
J2
J2
2
2
1
1
2
5
U4
COAX SHIELD
15
HIGH VOLTAGE
CABLE ASSEMBLY
6
(1D4) 5
7
60nS
DELAY CIRCUIT
+5
+5V
J1
14
1
POWER
PANEL
INTERCONNECT
CABLE TO
WORKSTATION
Q1
(1D3)
PIXEL FILTER PCB
SCH. # 877789
A13P3
1
E1
CAMERA ASSEMBLY
REFERENCE TO
C-ARM (MAINFRAME)
SCH. # 878377
REFERENCE TO
IMAGE SYSTEM
SCH. # 878376
9600 C-ARM
USE THIS PAGE FOR
SERIAL NUMBERS
62-0001 AND HIGHER
For Reference Only
PIX_COL.DS4
Page 2 of 2
4/19/96
CAMERA VIDEO &
LMON VIDEO
RMON VIDEO
GENERATOR SERIAL LINK
IR XMIT PCB
00-873936
REMOTE
CONTROL
Auxiliary Interface PCB
00-876502
IR
Thermal Imager
VCR 1
Hardcopy Camera
- Signal Distribution
- Status LEDs
Photocell
VCR
CONTROL
IR RCVR PCB
00-874220
- Convert IR
to TTL
- Ambient Light
Sensor
Left
Monitor
Technique
Processor
PCB
VCR 1 VIDEO
HARD COPY VIDEO
Camera
Video
VCR 2
Right
Monitor
Auxiliary
Interface PCB
Video Switching PCB
00-872237
Normal Interlaced Video
Rear Panel (BNC)
Contrast/ Brightness PCB
00-876351
Brightness
and
Contrast
Control
- Brite/Cont. Control
- Ambient Light Adj.
- 8:1 Video Switches (6)
- Log Amp (Subtraction Mode)
- Anti-Aliasing Filter
- GenLock Control
Brightness
and
Contrast
Control
TP10
00-876502
Video Switching
Matirx
Video Matrix Serial Data
TP4
00-876611
EO
AT Communications PCB
00-872125
Image Processor PCB
00-875952
- GSP (Graphics System Processor)
performs image processing.
- A:D Video (8 bit - 256 levels)
- D:A Video (8 bit - left and right)
- Circular Blanking
- Region of Interest
- Text Generator
- Gray Scale LUT (Look Up Tables)
TP5
High Rate Scan Converter PCB
00-876397
R
D:A
L
D:A
Digital Video Memory
-Normal Interlace to High Scan
Non Interlace Conversion
-D:A Video (8 bit Left and Right)
A:D
Right & Left
Digital Video
386 Motherboard PCB
00-900658
NOTE: 386 Motherboard has
built-in disk controller.
Printer
NOTE: Control Panel Processor Serial Link to AT Motherboard via
AT Communications PCB must be working for this cart to boot up.
TP7
GSP/Control & PIOs
- Interface "AT" to Two Serial Links:
(1) Control Panel Serial Link
(2) Generator Serial Link
- Option PROM (CMOS Setup)
- VCR Control
- Printer Control
- Status LED Control
- Disk Drive Selection Jumpers
(E1, E2, E3)
- IR Interface
- LED Driver
- Serial Link to AT
- Tone Generator
Front Panel
Control
Querty Key Bd
Control
Track Panel
Control
- Switch Decode for:
Front Panel
Trackball Panel
Key Board Panel
- Solid State Track Ball Control
High Scan
Non-interlaced Video
Rear Panel (BNC)
40 MB Hard Drive
C:\ 10 MB; DOS & Application S/W
D:\ 30 MB; 100 Image Storage
3.5" Floppy Drive
A:\ 1.2 meg; Image Backup
& Level 2 Diagnostic Access
9600 C-ARM
For Reference Only
Page 1 of 1
4TH_BLK1.DS4
12/4/96
9600 WORKSTATION
BLOCK DIAGRAM
DISK DRIVE SELECTION JUMPERS E1-E3
SYSTEM TYPE
MOTHERBOARD & DISK
386 (AMI BIOS) WITH
IDE DISK
386 (AMI BIOS) WITH
SCSI DISK
E1
E2
E3
+
+
G
G
+
G
BIOS ROM\BOOT CODES
E0 - Normal Boot Code
98 - Hard Disk Error
90 - Boot Disk Not Available
82 - GSP Load Failure
BE - Boot-up with Diagnostic Diskette.
FO - Workstation Program Exited to DOS
(Internal Workstation Communications Error
"System Error #253")
386 (WITH 4 OR 30 FPS)
MINIMUM CONFIGURATION
(Verify the Motherboard)
386 (NO 4 OR 30FPS)
MINIMUM CONFIGURATION
(Verify the Motherboard)
Jumpers located on AT Communications PCB
386 Mother PCB Boot Sequence Screen
(Viewed on external monitor using an external video card
with jumper E4 Removed from AT Comm. PCB)
1. To boot the Motherboard, the AT Communications PCB can first be removed.
The floppy drive should still be accessed (with the service boot disk).
1. To boot the Motherboard, the IP-SCSI board(s) can first be removed.
The floppy drive should still be accessed (with the service boot disk).
2. Next, the Image Processor can be removed. The floppy drive should still be accessed
(with the service boot disk) but no monitor images will be displayed when the Image
Processor is removed.
2. The AT Communications PCB can be removed. The floppy drive should still be accessed (with the service boot disk).
NOTE: An external video card and monitor can be used to observe the
motherboard boot process and to examine A: & C: drives.
Remember to remove jumper E4 on the AT Comm. PCB to monitor
mother board boot process.
AMIBIOS (C)1991 American Megatrends Inc.,
386NSX - P/Ns 06018-07 - 9/17/92
001664 KB OK
3. Next, remove the DOS SCSI Disk Controller PCB.
The floppy should be accessed. (with the service boot disk)
WAIT......
4. Then, the Image Processor can be removed. The floppy drive should still be accessed (with the service boot disk)
but no monitor images will be displayed when the Image Processor is removed.
3. If the system still fails to boot, verify power. See Workstation Power Block Diagram.
Finally , the Motherboard may need to be replaced..
NOTE: An external video card and monitor can be used to observe the Motherboard boot process and to examine
the A: drive. Remember to remove jumper E4 on the AT Comm. PCB to monitor mother board boot process.
5. If the system still fails to boot, verify power. See Workstation . Power Block Diagram. Finally, try replacing the Motherboard.
Aux. Interface PCB
Video Switching PCB
Backup
Battery
Base Memory Size
Ext. Memory Size
Hard Disk C Type
Hard Disk D Type
Serial Port(s)
Paralell Port(s)
J10 Ext. Batt.
Connection
Installed A20 Handler Number 1.
64K High Memory Area is available.
MICROSOFT Expanded Memory
U25
Option
Prom
MICROSOFT Expanded Memory Manager 386 Version 4.33.06X
(C) Copyright Microsoft Corporation 1986, 1990
E4
P5
EMM386 successfully installed.
Available expanded memory ......256 KB
Status LED
Driver
U25 Option Prom
- Programs UARTs U20, 22, 26, & 27
and then loads CGA Driver for IP PCB.
- Verifies/rewrites AT CMOS RAM.
E4 Jumper
- Remove this jumper to disable internal
CGA (Image Processor) video driver when
using an external CGA/EGA video card
(for diagnostic purposes only)
E2
+ G
E3
P4
LIM/EMS version.......4.0
Total expanded memory pages.......40
Available expanded memory pages....16
Total handles.......64
Active handles.....1
Page frame segment....CC00 H
G
+
E1
+G
J17 Floppy Disk
J16 Hard Disk
2 Megabytes Ram
Mother Board Power
Serial link to
AT Comm. PCB
Total upper memory available...15 KB
Larges upper memory block available....15 KB
Upper memory starting address....C800 H
DC Dist PCB
PS1 +5VDC
P3
U27
DUART
EMM386 Active.
MS-DOS Version 5.00
NBKSHELL Loaded
FASTOPEN installed
TSRSER Loaded Sucessfully
9600 WORKSTATION
Control Panel Processor PCB
For Reference Only
O C
FLUORO
ENHANCED
ONE-SHOT ONE-SHOT
: 640 KB
: 1024 KB
: 35
:None
: 3F8, 2F8
: 378
HiMEM: DOS XMS Driver, Version 2.78 - 09/19/91
XMS Specification Version 2.0
Copyright 1988-1991 Microsoft Corp.
Status LEDs
See Control Panel Processor
Block Diagram
AMIBIOS System Configuration
(C) 1985-1991, American Megatrends Inc.
Main Processor
: 80386SX
Numeric Processor : None
Floppy Drive A: : 1.44 MB, 3.5"
Floppy Drive B: : None
Display Type
: Color 80X25
AMIBIOS Date
: 12/12/91
1.44 Meg Floppy Drive
For a complete listing of BIOS ROM codes, see
Service Manual Workstation Software Section.
Adaptec AHA-1520 BIOS
Version 1.4
Copyright 1990 Adaptec, Inc.
All Rights Reserved
AVERAGING
SERIES 9600
NOTE: Control Panel Interface Serial Link to
Motherboard via AT Communications PCB
must work for normal cart boot-up process.
L
Page 1 of 1
R
AT
Communications
PCB
4TH_AT2.DS4
AT Comm. PCB
Image Processor PCB
High Rate Scan Converter PCB
386 Mother Board
IDE Hard Drive (non-cine systems)
C:\ 10 MB; DOS & Application S/W
D:\ Up to 200 image storage
See 9600 Workstation Configuration Block Diagrams
12/5/96
9600 WORKSTATION MOTHERBOARD
BLOCK DIAGRAM
SET CONFIGURATION
SYSTEM CONFIGURATION
Line Frequency (Hz):
60
System Model:
SP
0
Archive:
ENGLISH
Language:
1. Press "SETUP OPTIONS" on the annotation keyboard
P8
2. Install the service disk in the floppy drive at the rear of the Workstation
3. Select "Access Level 2" from the menu
4. Select "System Configuration" from the menu
5. Select "Set System Configurations" from the menu
6. Set the configuration by making selections from the following menu:
Serial Number:
69-1107
Hospital Name:
OEC TRAINING
Image Processor PCB
Sch. #875952
(See Image Path Block Page 2)
J2
DOMESTIC
Mars Table:
386 Motherboard
P/N 900658
(See 9600 Workstation &
9600 Workstation AT Motherboard
Block Diagrams)
MM/DD/YYYY
Date Format:
Use the cursor arrow keys to select
Press [ENTER] to accept
Press [ESC] to exit
SOFTWARE
FORMATTED
DISK
AT COMM. PCB
DRIVE
VERSION
HARD DISK
CONTROLLER
OPTION PROM
PARTIONING
PART #
PART #
(U25)
10
00-877024-02
NONE
-02
11
00-877024-03
NONE
-03
C: DRIVE 10M
D: DRIVE 30M
C: DRIVE 10M
D: DRIVE 60M
NOTES
Drives used: Fujitsu M2684TAU
Seagate ST3660A
Western Digital AC1365
See page 2 for hard drive jumper settings.
1.44 Meg
Floppy Drive
P/N 900669
J17
J16
P1 Data
Data
IDE DRIVE
P1 Power
J6
TRACKPAD PANEL
WINDOW
AT COMMUNICATIONS BOARD
FOR IDE DISKS
NEGATE
SYSTEM TYPE
MOTHERBOARD & DISK
386 (AMI BIOS) WITH
IDE DISK
AUTO HISTO
ON/OFF
E1
E2
E3
+
+
G
DC Power
Distribution PCB
876839
(See Workstation Power
Block Diagram #1)
J2
J4
J11
Power
See also 9600 Workstation Motherboard
Block Diagram
LEVEL
9600 C-ARM
FRONT PANEL
FLUORO
ONE-SHOT
ENHANCED
AVERAGING
For Reference Only
L
R
NON_CINE.DS4
Page 1 of 4
11/13/96
9600 WORKSTATION
SP, GSP, ESP - (NON CINE) CONFIGURATIONS
SP SOFTWARE & HARDWARE CONFIGURATION
SET CONFIGURATION
60
System Model:
SP
4
Archive:
ENGLISH
Language:
P8
Serial Number:
69-1107
Hospital Name:
OEC TRAINING
Image Processor PCB
Sch. #875952
J2
DOMESTIC
Mars Table:
386 Motherboard
P/N 900658
Block Diagrams)
MM/DD/YYYY
Date Format:
Press [ESC] to exit
SOFTWARE
FORMATTED
DISK
AT COMM. PCB
DRIVE
VERSION
HARD DISK
CONTROLLER
OPTION PROM
PARTIONING
PART #
PART #
(U25)
NOTES
C: DRIVE 10M
Seagate ST3660A
10
00-877024-02
11
00-877024-03
NONE
-02
NONE
-03
D: DRIVE 30M
C: DRIVE 10M
D: DRIVE 60M
1.44 Meg
Floppy Drive
P/N 900669
J17
J16
P1 Data
Data
IDE DRIVE
P1 Power
J6
TRACKPAD PANEL
WINDOW
FOR IDE DISKS
NEGATE
SYSTEM TYPE
MOTHERBOARD & DISK
AUTO HISTO
386 (AMI BIOS) WITH
IDE DISK
ON/OFF
E1
E2
E3
+
+
G
DC Power
Distribution PCB
876839
Block Diagram #1)
J2
J4
J11
Power
Block Diagram
LEVEL
9600 C-ARM
For Reference Only
FRONT PANEL
NON_CINE.DS4
FLUORO
ONE-SHOT
ENHANCED
AVERAGING
L
R
Page 2 of 4
11/13/96
9600 WORKSTATION
GSP SOFTWARE & HARDWARE CONFIGURATION
SET CONFIGURATION
60
ESP
System Model:
Yes/No)
(Digital Spot Option:
Cine Disk:
None
Language:
ENGLISH
VCR1:
Sony
VCR2:
Sony
Image Processor PCB
Sch. #875952
No
Digital Print:
P8
Serial Number:
69-1107
Hospital Name:
OEC TRAINING
J2
DOMESTIC
Mars Table:
386 Motherboard
P/N 900658
Block Diagrams)
NO
Measurements:
MM/DD/YYYY
Date Format:
Press [ESC] to exit
SOFTWARE
FORMATTED
DISK
AT COMM. PCB
DRIVE
VERSION
HARD DISK
CONTROLLER
OPTION PROM
PARTIONING
PART #
PART #
(U25)
10
00-877024-02
NONE
-02
11
00-877024-03
NONE
-03
C: DRIVE 10M
D: DRIVE 30M
C: DRIVE 10M
D: DRIVE 60M
NOTES
Seagate ST3660A
1.44 Meg
Floppy Drive
P/N 900669
J17
J16
P1 Data
Data
IDE DRIVE
P1 Power
J6
TRACKPAD PANEL
WINDOW
ZOOM
FOR IDE DISKS
NEGATE
SYSTEM TYPE
MOTHERBOARD & DISK
386 (AMI BIOS) WITH
IDE DISK
VCR RECORD
SHARPEN
AUTO HISTO
ON/OFF
E1
E2
E3
+
+
G
DC Power
Distribution PCB
876839
Block Diagram #1)
J2
J4
J11
Power
Block Diagram
VCR PLAY
LEVEL
9600 C-ARM
TRACKPAD
FRONT PANEL
FLUORO
ONE-SHOT
DIG. SPOT
AVERAGING
For Reference Only
NON_CINE.DS4
RECALL
SAVE
L
R
Page 3 of 4
11/13/96
9600 WORKSTATION
ESP SOFTWARE & HARDWARE CONFIGURATION
CN 5
CNH 1
13
14
5 3 1
1
2
J8
6 4 2
WESTERN DIGITAL AC 1365
FUJITSU M2684TA
JUMPER AS ILLUSTRATED
SEAGATE ST3660A
9600 C-ARM
For Reference Only
7 5 3 1
NON_CINE.DS4
FRONT
8 6 4 2
Page 4 of 4
11/13/96
9600 WORKSTATION
JUMPER SETTINGS FOR IDE DRIVES
8 Bit Digital Left Video
SET CONFIGURATION
60
System Model:
ESP
Digital Spot Option:
Yes
Cine Disk:
ALTA4
Language:
ENGLISH
VCR1:
Sony
VCR2:
Sony
P8
No
Digital Print:
Serial Number:
69-1107
Hospital Name:
OEC TRAINING
Image Processor PCB
875952
DOMESTIC
Mars Table:
NO
Measurements:
MM/DD/YYYY
Date Format:
J2
Use the cursor arrows to select
386 AT Motherboard
900658
Block Diagrams)
Press [ESC] to exit
SOFTWARE
VERSION
10
11
FORMATTED DOS SCSI DISK
IP-SCSI DISK
AT COMM. PCB
DRIVE
PARTIONING
HARD DISK
CONTROLLER
CONTROLLER
OPTION PROM
PART #
PART #
PART #
(U25)
00-900661-01
-02
00-900661-01
-03
00-877025-01
00-877025-02
00-900659-02
ADAPTEC
00-900659-02
J5
C: DRIVE 10M
1.44 Meg
Floppy Drive
900669
D: DRIVE 30M
C: DRIVE 10M
D: DRIVE 60M
ADAPTEC
Drive 1
Data
P1 Data
TRACKPAD PANEL
Drives used: Fujitsu M2684SAU, M2623FA, or M2624FA
Seagate ST3550N or ST5660N
Hitachi DK325C-57
ACQUIRE IMAGES
WINDOW
PLAY/PROCESS
ZOOM
SHARPEN
NEGATE
AUTO HISTO
ON/OFF
SYSTEM TYPE
MOTHERBOARD & DISK
386 (AMI BIOS) WITH
SCSI DISK
VCR PLAY
LEVEL
J6
J6
DOS
SCSI
J2
Disk
Controller
00-900659-02
Drive 1
Power
See pages 5 & 6 for hard drive jumper settings.
FOR SCSI DISKS
VCR RECORD
SCSI DRIVE
J17
P1 Power
NOTES
P9
IP SCSI
Disk
Controller J9
00-900661-01
Master
P5
E1
E2
E3
G
+
G
DC Power
Distribution PCB
876839
Block Diagram #1)
J11
J2
J4
Block Diagram
9600 C-ARM
TRACKPAD
FRONT PANEL
For Reference Only
4&8_CINE.DS4
FLUORO
ONE-SHOT
DIG. SPOT
AVERAGING
RECALL
SAVE
L
R
Page 1 of 6
11/13/96
9600 WORKSTATION CONFIGURATIONS
ESP/4, ESP/BVAS, VASC/4 - (4 & 8 FPS) OPTIONS
ESP/4 HARDWARE & SOFTWARE CONFIGURATION
SET CONFIGURATION
60
BVAS
System Model:
Yes
Cine Disk:
ALTA8
Language:
ENGLISH
VCR1:
Sony
VCR2:
Sony
P8
No
Digital Print:
Serial Number:
69-1107
Hospital Name:
OEC TRAINING
Image Processor PCB
875952
DOMESTIC
Mars Table:
NO
Measurements:
MM/DD/YYYY
Date Format:
J2
386 AT Motherboard
900658
Block Diagrams)
Press [ESC] to exit
SOFTWARE
VERSION
10
11
IP-SCSI DISK
AT COMM. PCB
DRIVE
PARTIONING
HARD DISK
CONTROLLER
CONTROLLER
OPTION PROM
PART #
PART #
PART #
(U25)
00-900661-01
-02
00-900661-01
-03
00-877025-01
00-877025-02
00-900659-02
ADAPTEC
00-900659-02
J5
C: DRIVE 10M
1.44 Meg
Floppy Drive
900669
D: DRIVE 30M
C: DRIVE 10M
D: DRIVE 60M
ADAPTEC
Drive 1
Data
P1 Data
TRACKPAD PANEL
Hitachi DK325C-57
ACQUIRE IMAGES
WINDOW
PLAY/PROCESS
ZOOM
SHARPEN
NEGATE
AUTO HISTO
ON/OFF
SYSTEM TYPE
MOTHERBOARD & DISK
386 (AMI BIOS) WITH
SCSI DISK
VCR PLAY
LEVEL
J6
J6
DOS
SCSI
Disk
J2
Controller
00-900659-02
Drive 1
Power
FOR SCSI DISKS
VCR RECORD
SCSI DRIVE
J17
P1 Power
NOTES
P9
IP SCSI
Disk
Controller J9
00-900661-01
Master
P5
E1
E2
E3
G
+
G
DC Power
Distribution PCB
876839
Block Diagram #1)
J11
J2
J4
Block Diagram
9600 C-ARM
TRACKPAD
For Reference Only
FRONT PANEL
4&8_CINE.DS4
FLUORO
ONE-SHOT
DIG. SPOT
ROADMAP
SUBTRACT
AVERAGING
RECALL
SAVE
L
R
Page 2 of 6
11/13/96
ESP/BVAS HARDWARE & SOFTWARE CONFIG.
SET CONFIGURATION
60
System Model:
VAS
Yes
Cine Disk:
ALTA4
Language:
ENGLISH
VCR1:
Sony
VCR2:
Sony
P8
No
Digital Print:
Serial Number:
69-1107
Hospital Name:
OEC TRAINING
Image Processor PCB
875952
DOMESTIC
Mars Table:
NO
Measurements:
MM/DD/YYYY
Date Format:
J2
386 AT Motherboard
900658
Block Diagrams)
Press [ESC] to exit
SOFTWARE
VERSION
10
11
IP-SCSI DISK
AT COMM. PCB
DRIVE
HARD DISK
CONTROLLER
CONTROLLER
OPTION PROM
PARTIONING
PART #
PART #
PART #
(U25)
00-900661-01
-02
00-900661-01
-03
00-877025-01
00-877025-02
00-900659-02
ADAPTEC
00-900659-02
J5
C: DRIVE 10M
1.44 Meg
Floppy Drive
900669
D: DRIVE 30M
C: DRIVE 10M
D: DRIVE 60M
ADAPTEC
TRACKPAD PANEL
ACQUIRE IMAGES
LANDMARK
ZOOM
WINDOW
PLAY/PROCESS
VCR RECORD
REGISTRATION
PEAK OPACIFY
ON/OFF
FOR SCSI DISKS
SYSTEM TYPE
MOTHERBOARD & DISK
386 (AMI BIOS) WITH
SCSI DISK
VCR PLAY
MASK
NEGATE
LEVEL
J6
J6
DOS
SCSI
Disk
J2
Controller
00-900659-02
Drive 1
Power
SHARPEN
AUTO HISTO
SCSI DRIVE
J17
P1 Power
Hitachi DK325C-57
IP SCSI
Disk
J9
Controller
00-900661-01
Master
P5
Drive 1
Data
P1 Data
NOTES
P9
E1
E2
E3
G
+
G
DC Power
Distribution PCB
876839
Block Diagram #1)
J11
J2
J4
Block Diagram
9600 C-ARM
TRACKPAD
For Reference Only
FRONT PANEL
4&8_CINE.DS4
FLUORO
ONE-SHOT
DIG. SPOT
ROADMAP
SUBTRACT
AVERAGING
RECALL
SAVE
L
R
Page 3 of 6
11/13/96
VASC/4 HARDWARE & SOFTWARE CONFIGURATION
SCSI Troubleshooting Notes
Terminator Values:
U57, U58, U59:
220/330 Ohms
U57
RN4
Terminator
Resistors
Must be
Removed
U58
P5
RN2
RN3
U59
RP1
P9
J6
RP1, RP2:
100pf/100 Ohms
Pin 1
U15: 22 Ohms
Pin 1
U15
RP2
J5
J9
Boot-up Problems
1. If the system Application software boots up,
the DOS SCSI Disk Controller PCB is probably OK.
Otherwise, remove the IP SCSI Disk Controller PCBs and reboot.
If this caused the system to not boot, replace this board.
2. Try booting with the diagnostic disk in the A:\ drive.
If this is successful, you need to replace the
DOS SCSI Disk Controller PCB or the Hard Disk Drive.
CINE LOOP Problems
1. Examine the green, yellow and red LEDs on the
IP-SCSI Disk Controller PCB. After boot-up,
use the table below to determine the probable cause of failure.
2. If only the cine loop is not working, try deleting the Header.Dat
file on the C:\ drive BUT YOU WILL LOOSE ALL PREVIOUS
CINE RUNS AND ALL 200 PATIENT IMAGES.
Reboot the system and verify operation.
See also Formatting the Cine Partition.
3. Try replacing the IP-SCSI Disk Controller PCBs.
Formatting the Cine Partition.
1. With the cart powered on, insert the diag. disk & press
SETUP OPTIONS, Select Access Level 2.
2. Select "Prepare CINE Disk"
3. Reboot the system and verify operation.
J8
P3
SCSI 900659-02
IP SCSI Disk Controller Status LEDs
G
Y
R
off
on
off
= Normal Condition
on
on
off
= IP-SCSI Failure
on
off
on
= IP-SCSI Failure
JUMPER SETTING
O=OPEN S=SHORT
J5-1
O
J6-1
S
J8-1
O
J9-1
O
G
Y
R
LEDs
J5-2
O
J6-2
S
J8-2
O
J9-2
O
J5-3
O
J6-3
S
J8-3
O
J9-3
O
on
on
on
= IP-SCSI Failure
J5-4
O
J6-4
O
J8-4
O
J9-4
S
on
off
on
= IP-SCSI Failure
J5-5
S
J6-5
O
J8-5
O
J9-5
O
off
on
on
= SCSI HDD Failure
J5-6
S
J6-6
O
J8-6
O
J9-6
S
J5-7
O
J6-7
O
J8-7
O
J9-7
S
J5-8
O
J6-8
O
J8-8
O
J9-8
S
ADAPTEC
4 & 8 FPS CINE OPTIONS
J9
9600 C-ARM
IP SCSI CONTROLLER - MASTER (4/8/15/30 FPS)
For Reference Only
4&8_CINE.DS4
Page 4 of 6
11/13/96
DOS SCSI & IP-SCSI DISK CONTROLLER CONFIG.
1
2
CNH7
CN 6
2 10
1
JUMPERED
AS SHOWN
2
CN 5
FIFTY PIN RIBBON
CONNECTOR
CNH5
23
CNH 2
5
6
TERMINATING
RESISTOR
INSTALLED
24
CNH1
CNH4
PIN 1
CNH 1
15
TERMINATOR
INSTALLED
1
16
2
PIN 1
FOUR PIN POWER
CONNECTOR
FUJITSU M2684SAU
FUJITSU M2623FA AND M2624FA
9600 C-ARM
For Reference Only
4&8_CINE.DS4
Page 5 of 6
11/13/96
FUJITSU SCSI DISK JUMPER SETTINGS
15
7
6
JP3
2
1
1
246
PCB
J1
J5
J3
JP2
16
13 5
2
J3
Pin 1
BOTTOM VIEW
J4
Pin 1
J6 8
1
J12
7
5
3
1
PCB
J8
7
8
6
4
2
2
33 31
34 32
23
24
J8
NO JUMPERS
J3
20
18
16
14
12
10
8
6
4
2
J8
19
17
15
13
11
9
7
5
3
1
531
31
J9
PCB
J6
PCB
642
4 2
PCB
SEAGATE ST5660N
7
1
8
2
SEAGATE ST3550N
J7
TOP VIEW
9600 C-ARM
For Reference Only
4&8_CINE.DS4
HITACHI DK325C-57
Page 6 of 6
11/13/96
HITACHI & SEAGATE SCSI DISK JUMPER SETTINGS
SET CONFIGURATION
60
System Model:
ESP
Yes
Cine Disk:
ALTA15
Language:
ENGLISH
VCR1:
Sony
VCR2:
Sony
P8
No
Digital Print:
Serial Number:
69-1107
Hospital Name:
OEC TRAINING
Image Processor PCB
875952
DOMESTIC
Mars Table:
NO
Measurements:
MM/DD/YYYY
Date Format:
386 AT Motherboard
900658
Block Diagrams)
Press [ESC] to exit
SOFTWARE
VERSION
10
11
IP-SCSI DISK
AT COMM. PCB
DRIVE
PARTIONING
HARD DISK
CONTROLLER
CONTROLLER
OPTION PROM
PART #
PART #
PART #
(U25)
00-900661-01
-02
00-900661-01
-03
00-878230-01
00-878230-02
00-900659-04
Q Logic
00-900659-04
J5
C: DRIVE 10M
1.44 Meg
Floppy Drive
900669
D: DRIVE 30M
C: DRIVE 10M
D: DRIVE 60M
Q Logic
Drives used: Fujitsu M2932SAU
Seagate ST11950N, ST12550N, or ST32550N
Micropolis 4221
ACQUIRE IMAGES
WINDOW
PLAY/PROCESS
VCR RECORD
ZOOM
SHARPEN
ON/OFF
FOR SCSI DISKS
SYSTEM TYPE
MOTHERBOARD & DISK
386 (AMI BIOS) WITH
SCSI DISK
VCR PLAY
LEVEL
J6
J6
DOS
SCSI
J2
Disk
Controller
00-900659-02
Drive 1
Power
NEGATE
AUTO HISTO
SCSI DRIVE
J17
P1 Power
NOTES
P9
IP SCSI
Disk
Controller J9
00-900661-01
Master
P5
Drive 1
Data
P1 Data
TRACKPAD PANEL
J2
E1
E2
E3
G
+
G
DC Power
Distribution PCB
876839
Block Diagram #1)
J11
J2
J4
Block Diagram
TRACKPAD
9600 C-ARM
FRONT PANEL
FLUORO
ONE-SHOT
DIG. SPOT
AVERAGING
RECALL
SAVE
L
R
For Reference Only
Page 1 of 4
15_CINE.DS4
11/13/96
ESP/15, VASC/15 - (15 FPS) OPTIONS
ESP/15 HARDWARE & SOFTWARE CONFIGURATION
SET CONFIGURATION
60
System Model:
VAS
Yes
Cine Disk:
ALTA15
Language:
ENGLISH
VCR1:
Sony
VCR2:
Sony
P8
No
Digital Print:
Serial Number:
69-1107
Hospital Name:
OEC TRAINING
Mars Table:
Measurements:
Image Processor PCB
875952
DOMESTIC
NO
MM/DD/YYYY
Date Format:
386 AT Motherboard
900658
Block Diagrams)
Press [ESC] to exit
SOFTWARE
VERSION
10
11
IP-SCSI DISK
AT COMM. PCB
DRIVE
PARTIONING
HARD DISK
CONTROLLER
CONTROLLER
OPTION PROM
PART #
PART #
PART #
(U25)
00-900661-01
-02
00-878230-01
00-878230-02
00-900659-04
Q Logic
00-900659-04
00-900661-01
J5
C: DRIVE 10M
D: DRIVE 30M
C: DRIVE 10M
-03
1.44 Meg
Floppy Drive
900669
D: DRIVE 60M
Q Logic
NOTES
ACQUIRE IMAGES
LANDMARK
ZOOM
WINDOW
PLAY/PROCESS
REGISTRATION
FOR SCSI DISKS
VCR RECORD
PEAK OPACIFY
AUTO HISTO
ON/OFF
SYSTEM TYPE
MOTHERBOARD & DISK
386 (AMI BIOS) WITH
SCSI DISK
VCR PLAY
MASK
NEGATE
LEVEL
J6
J6
E1
E2
E3
G
+
G
DC Power
Distribution PCB
876839
Block Diagram #1)
DOS
SCSI
Disk
J2
Controller
00-900659-02
Drive 1
Power
SHARPEN
SCSI DRIVE
J17
P1 Power
Micropolis 4221
P9
IP SCSI
Disk
J9
Controller
00-900661-01
Master
P5
Drive 1
Data
P1 Data
TRACKPAD PANEL
J2
J11
J2
J4
Block Diagram
9600 C-ARM
TRACKPAD
For Reference Only
FRONT PANEL
15_CINE.DS4
FLUORO
ONE-SHOT
DIG. SPOT
ROADMAP
SUBTRACT
AVERAGING
RECALL
SAVE
L
R
Page 2 of 4
11/13/96
VASC/15 HARDWARE & SOFTWARE CONFIG.
J2
JP5
Terminator Values:
U57, U58, U59:
220/330 Ohms
J1
3 4
U57
JP7
1
2
JP2
JP6
U58
P5
3 4
JP3 1
9 10
3
Pin 1
U15: 22 Ohms
BIOS ROM
JP4
7
8
U59
RP1, RP2:
100pf/100 Ohms
1
2
RP1
P1
P2
P9
Pin 1
Boot-up Problems
CINE LOOP Problems
U15
RP2
J1
1
P3
50
J9
J2
2
1
G
Y
R
off
on
off
= Normal Condition
on
on
off
= IP-SCSI Failure
on
off
on
= IP-SCSI Failure
on
on
on
= IP-SCSI Failure
on
off
on
= IP-SCSI Failure
off
on
on
= SCSI HDD Failure
3
330
I/O
1
J10
QLOGIC
SCSI
3
J3
PROCESSOR
J8
230
OUT
IN
1 2
BIOS
SYNC
ASYNC
OUT
SCSI ID 6
NO PARITY
SEE TABLE 1
SCSI ID 7
PARITY
SEE TABLE 1
2
1
J6
ROM
1 2
DISABLE
IN
ENABLE
B
A
3
TERM DIS
G
Y
R
LEDs
4
SEE TABLE 1
SEE TABLE 1
9 10
J4
J5
IRO
BIOSROM
7
1
8
2
15 12 11 10
J9
9600 C-ARM
Q LOGIC (2 MODELS)
For Reference Only
Page 3 of 4
15_CINE.DS4
11/13/96
DOS SCSI & IP-SCSI DISK CONTROLLER CONFIG.
FUJITSU M2932SAU
OEC JUMPERS
ID1
ID0
CN6: D (INTERNAL DIAGNOSTIC)
OFF
P (PARITY SETTING)
ON
A (AUTOMATIC MOTOR START)
ON
CN4: ID0 OFF
ID1 OFF
RN1
ID2 OFF
ID2
RN2
CN7: SY (SPINDLE SYNC SIGNAL)
NOT USED
OPTION
W1
W3
JUMPER
BLOCK
R
(DISK DRIVE RESET)
OFF
OFF
WP (WRITE PROTECT)
OFF
TM (TERMINATION)
ON
SEAGATE ST32550N
OEC JUMPERS
OEC JUMPERS
MICROPOLIS 4221
NO JUMPERS ON OPTI0N JUMPER BLOCK
PIN 5
PIN 1
NO JUMPERS ON ID0, ID1OR ID2
PIN 6
PIN 2
J1
JUMPER PINS 1 & 2 (TERMINATE POWER FROM DRIVE)
JUMPER W1 & W3
W1
W3
RN1 AND RN2 INSTALLED
JUMPER PINS 5 & 6 (ENABLE SCSI TERMINATION)
NO JUMPERS ON J2 & J4
SEAGATE ST11950N AND ST12550N
PIN 1
OEC JUMPERS
J01
J4
J4 - NO JUMPERS INSTALLED
PIN 2
PIN 1
B POSITION
PIN 3
A POSITION
J01
TERM. POWER FROM DRIVE:
SCSI
CONNECTOR
PIN 1
POWER
CONNECTOR
9600 C-ARM
For Reference Only
Page 4 of 4
15_CINE.DS4
11/13/96
SCSI DISK JUMPER SETTINGS
SET CONFIGURATION
60
System Model:
VAS
Yes
Cine Disk:
ALTA30
Language:
ENGLISH
VCR1:
Sony
VCR2:
Sony
P8
No
Digital Print:
Serial Number:
69-1107
Hospital Name:
OEC TRAINING
Image Processor PCB
875952
DOMESTIC
Mars Table:
NO
Measurements:
MM/DD/YYYY
Date Format:
J4
J2
IP SCSI P9
Disk
Controller J9
900661
Slave
P5
386 AT Motherboard
900658
Block Diagrams)
Press [ESC] to exit
SOFTWARE
VERSION
AT COMM. PCB
IP-SCSI DISK
HARD DISK
CONTROLLER
CONTROLLER
PART #
PART #
PART #
2 REQUIRED
DRIVE
OPTION PROM PARTIONING
(U25)
J5
2 REQUIRED
1 MASTER&1SLAVE
10
11
00-900659-04
00-878230-01
Q Logic
00-900659-04
00-878230-02
Q Logic
00-900661-01
00-900661-01
1.44 Meg
Floppy Drive
900669
C: DRIVE 10M
-02
D: DRIVE 30M
C: DRIVE 10M
-03
ACQUIRE IMAGES
LANDMARK
WINDOW
PLAY/PROCESS
VCR RECORD
REGISTRATION
PEAK OPACIFY
SHARPEN
AUTO HISTO
MASK
NEGATE
LEVEL
J17
Drive 1
Power
DRIVE 1 (Left)
J6
SCSI
Disk
Controller
900659
J2
J6
SYSTEM TYPE
MOTHERBOARD & DISK
E1
E2
E3
G
+
G
386 (AMI BIOS) WITH
SCSI DISK
VCR PLAY
P9
IP SCSI
Disk
Controller J9
900661
Master
Drive 1
Data
P1 Power
FOR SCSI DISKS
ON/OFF
P3
P5
D: DRIVE 60M
Micropolis 4221
ZOOM
Drive 2
Power
Drive 2
Data
P1 Data
NOTES
TRACKPAD PANEL
P3
DRIVE 2 (Right)
DC Power
Distribution PCB
876839
Block Diagram #1)
J11
J2
J4
Block Diagram
9600 C-ARM
TRACKPAD
FRONT PANEL
For Reference Only
30_CINE.DS4
FLUORO
ONE-SHOT
DIG. SPOT
ROADMAP
SUBTRACT
AVERAGING
RECALL
SAVE
L
R
Page 1 of 4
11/13/96
VASCULAR WITH 30FPS CINE LOOP OPTION
HARDWARE & SOFTWARE CONFIGURATION
J1
J2
1
50
J9
JP5
J2
J1
2
1
3 4
3
330
I/O
1
SCSI
J3
JP2
JP6
JP7
1
2
3
7
8
9 10
JP4
P2
PROCESSOR
J8
230
ASYNC
2
1
J6
1 2
OUT
3 4
JP3 1
J10
QLOGIC
3
IN
BIOS
SYNC
OUT
SCSI ID 7
PARITY
SEE TABLE 1
SCSI ID 6
NO PARITY
SEE TABLE 1
SEE TABLE 1
SEE TABLE 1
ROM
1 2
DISABLE
IN
TERM DIS
ENABLE
B
A
3
4
9 10
J4
BIOS ROM
J5
IRO
7
8
1
2
BIOSROM
1
2
15 12 11 10
P1
DOS SCSI CONTROLLERS
Q LOGIC (2 MODELS)
9600 C-ARM
For Reference Only
30_CINE.DS4
Page 2 of 4
11/13/96
DOS SCSI CONTROLLER CONFIGURATIONS
Terminator Values:
U57, U58, U59:
220/330 Ohms
U57
U58
P5
U59
RP1, RP2:
100pf/100 Ohms
Pin 1
Pin 1
Boot-up Problems
Not Installed
CINE LOOP Problems
U57
U58
P5
U15: 22 Ohms
U59
RP1
P9
RP1
Pin 1
U15
P9
U15
RP2
RP2
P3
P3
G
Y
R
LEDs
J9
G
Y
R
LEDs
G
Y
R
off
on
off
= Normal Condition
on
on
off
= IP-SCSI Failure
on
off
on
= IP-SCSI Failure
on
on
on
= IP-SCSI Failure
on
off
on
= IP-SCSI Failure
off
on
on
= SCSI HDD Failure
J9
9600 C-ARM
For Reference Only
IP SCSI CONTROLLER - SLAVE (30FPS)
30_CINE.DS4
Page 3 of 4
11/13/96
IP-SCSI CONTROLLER CONFIGURATIONS
FUJITSU M2932SAU
OEC JUMPERS
ID1
ID0
CN6: D (INTERNAL DIAGNOSTIC)
OFF
P (PARITY SETTING)
ON
A (AUTOMATIC MOTOR START)
ON
CN4: ID0 OFF
ID1 OFF
RN1
ID2 OFF
ID2
RN2
CN7: SY (SPINDLE SYNC SIGNAL)
NOT USED
OPTION
W1
W3
JUMPER
BLOCK
R
(DISK DRIVE RESET)
OFF
OFF
WP (WRITE PROTECT)
OFF
TM (TERMINATION)
ON
SEAGATE ST32550N
OEC JUMPERS
OEC JUMPERS
MICROPOLIS 4221
NO JUMPERS ON OPTI0N JUMPER BLOCK
PIN 5
PIN 1
NO JUMPERS ON ID0, ID1OR ID2
PIN 6
PIN 2
J1
JUMPER PINS 1 & 2 (TERMINATE POWER FROM DRIVE)
JUMPER W1 & W3
W1
W3
RN1 AND RN2 INSTALLED
JUMPER PINS 5 & 6 (ENABLE SCSI TERMINATION)
NO JUMPERS ON J2 & J4
SEAGATE ST11950N AND ST12550N
PIN 1
OEC JUMPERS
J01
J4
J4 - NO JUMPERS INSTALLED
PIN 2
PIN 1
B POSITION
PIN 3
A POSITION
J01
TERM. POWER FROM DRIVE:
SCSI
CONNECTOR
PIN 1
POWER
CONNECTOR
9600 C-ARM
For Reference Only
Page 4 of 4
30_CINE.DS4
11/13/96
SCSI DISK JUMPER SETTINGS
10
VCC
P4
10
DIAG_DISPLAY_WR
1
U20, U21
DIAGNOSTIC
LED
11
LATCH
U13
13
DS1 DIAGNOSTIC LED
P7
2
1
7
6
2
3
(1D2)
12
U11
VCC
VCC
(1D4)
U24
1
7
MAX694
2
(Power
Monitor &
Watchdog
Timer)
FORCE SENSITIVE RESISTOR CONTROL
37
13 VREF
Cart Control Panel
Processor PCB
00-876611
4
HSO.0 28
(1D5)
TP11
P0.3
7
P0.2
5
P0.1
6
P0.0
5
6
1
U11
2
U11
6
14
Y1
12 MHZ
OSC 5
00-872125
Auxiliary
Interface
PCB
00-876502
Externally
Mounted
(2D5)
(2C4)
Electronic Rack Assembly
(1D3)
TP12
P1.1 20
ACQUIRE IMAGES
WINDOW
PLAY/PROCESS
VCR RECORD
ZOOM
SHARPEN
VCR PLAY
(1B5)
12 AGND
NEGATE
AUTO HISTO
U27
DUART
RESET15
ON/OFF
P9
(1D7)
P12
LED_16-31_WR
4
8
8
8
19
10
10
10
RESET
(1C8)
P14
P3
CPICTS
23
23
CPIRXD
24
P1
1
CTS 44
11
LEVEL
J2
(1C6)
TP2
U16, U17
TRACK PANEL
LED
LATCH
2
3
E5
13
2
20
24
E3
P6
Track Panel
U5
80C196KC
LED_00-15_WR
11
(2C3)
(1B6)
11 - TXDB
U16
3
2
(1D7)
U7
MAX233
(1C6)
TP6
AD0 - AD15
U33
DATA
BUFFER
12 - OP1
(1B3)
1
RXD 17
TRACKPAD
12
U16
TP7
(2D3)
U12, U19
FRONT PANEL
LED
LATCH
11
1
TXD 18
18
1
2
6
6
6
CPITXD
25
25
4
U15
E2
TP3
To & From
Motherboard
See Motherboard
Block Diagram
6
10 - RXDB
U30,U31
ADDR
BUFFER
(1B4)
5
2
RTS 39
1
2
4
4
4
CPIRTS
5
E4
5
10
U15
8
4 - IP1
(1B6)
(1C8)
U15, U23
KEY BOARD
INPUT LATCH
(COLUMN READ)
P2.2 15
35-CEN
URTBSEL*
COL_READ
11
VCC
(2D5)
FLUORO
ONE-SHOT
DIG. SPOT ROADMAP
SUBTRACT
AVERAGING
RECALL
SAVE
1
L<--->R
TP14
R11
U18, U22
KEY BOARD
OUTPUT LATCH
(ROW DRIVE)
Front Panel
+5VIN
+12VIN
TP1, TP10
TP8, TP13
ROW_DRV
11
P5
TP4
5
3
P1
23
2
4
1
3
5
U24
22V10
ADDR
DECODE
(2B5)
U14,U2
ADDRESS
DECODE
74ABT573
U3
74LS08
(1D7)
1
2
(2D7)
D
(1B2)
LATCHED ADDR. 0 - 15
1
P3
U9
Opto_I
IR LCL
TP5
1
7
U10
EPROM
(BOOT)
U4 PAL
ADDRESS
DECODE
(1B1)
(1C2)
U1
STATIC
RAM
(1D7)
(1C1)
IR RMT
TP9
Key Board
RESET
1
2
3
4
See IR Remote
Control Block
Diagram for
more Details
9600 C-ARM
For Reference Only
5
(1D7)
4
+12VIN
IR_LCL
+12VRET
+12VRET
SEGMENT 10 BLINKS ON & OFF
TO INDICATE THAT THE MICRO
CONTROLLER (U5) IS RUNNING
U8
(not used)
RS422
INPUT
CPI_BLK1.DS4
Page 1 of 2
6/17/96
9600 CONTROL PANEL PROCESSOR
BLOCK DIAGRAM
U33
Screen
Waveforms
Image
GND
TP1
GND
DURING BOOT UP
TP4
9600 Mobile Digital C-Arm - Workstation Block Diagrams, Test Points, and Signal Waveforms
C
B
A
U15-1
COL_READ
100 mVdc
200 ns
TP2
CTS
5 Vdc
5S
P1
TP5
IR LCL
500 mVdc
50 ms
D
U30
U31
TP3
RTS
5 Vdc
5S
E
F
TP2
TP1
C
CTS
GND
P1 1 2 3 4 5 6
P2
U2
TP3
TP7
RXD
2 Vdc
5 ms
P3
E2
R11
TP4
E3
1
1
1
E4
1
E5
U3
D
U4
E
Y1
U12
U11
U13
A
11
DS1
TP10
TP11
TP12
GND
OSC
RST*
TP5
B
RXD
TXD
U10
TP9
TP8
IR
RMT
GND
IR
LCL
11
12
13
3
2
U15
SEGMENT 10
U17
8
G
U18
U19
18
U20
U21
K
U22
10
I
P7-1
SPKR
10 Vdc
100 us
6
U24
U23
C
F
OP1 12
TXDB 11
RXDB 10
J
TP14
GND
H
P7
G
H
OEC-DIASONICS INC
COMMUNICATIONS PCB
00-872126-01
TP13
D
IP1 4
P5
P4
E
6
4
U27
L
U15
U16
U9
F
U5
U14
U8
U7
RTS +12V
TP7
TP6
U16
U1
U24
TP6
TXD
2 Vdc
5 ms
ASSY 00-876613
9600 MONITOR CART
P6
P7-2
SPKR
10 Vdc
100 us
P3
+5V
GND
TP3
GND
TP2
Screen
Waveforms
Image
K
L
U20-18
SEG. 10
2 Vdc
200 ms
J
TP11
OSC
1 Vac
50 ns
U24-6
WDI
2 Vdc
1 ms
I
TP12
RESET
2 Vdc
500 ms
9600 C-ARM
Measurements
For Reference Only
CPI_BLK1.DS4
Page 2 of 2
6/17/96
9600 CONTROL PANEL PROCESSOR
BLOCK DIAGRAM
2
A/D Clamp
See Image Path Block
Diagram (U7; SW201)
50 Hz
See Video Matrix
Block Diagram
Video Switching PCB
00-872237
A/D Clamp Circuit
Image
Processor
PCB
00-875952
+ 5V
B
2A
U6
R156
C26
R25
2
Clamp Output
1
SepIncsy
DS1/DS2 Display Driver
(1D5)
+ 5V
Vertical Sync Separator
-3.3V
+2.5V
-0.8V
5
R93=1k
Q8
1-A
1-A
2
1
3
U38
5-Q
2D
1 Y1
60Hz
VCO Adjustment
14 - "A"
12-Q
(2B8)
3 - "B"
+ 5V
12
2-B
U38
13-Q
2E
1
C89
Cart
CSYNC*
1-A
TP33
VCO 2H
1
3
Y2 1
50Hz
25.6 Mhz
3
2I
U36
(High=50Hz; Low=60Hz)
(2A8)
(2B7)
4
2
5
6
2
This video control bit is changed through software for 50 or 60 Hz systems.
To do this: 1) Power on Cart, 2) Insert Diag. Disk, 3) Press F10, 4) Access Level 2,
5) Select Config & Hard Disk, 6) Set System Config. Then follow screen instructions.
19
17
17
To GSP (U140)
& Memory
Addressors
2R
EVENFLD
27
27
2S
CLAMP
21
21
PIXEL CLK
29
29
3
3
U29
PAL16V8
18
17
5
2K
8
10
19
E4
18
3
19
CBLANK*
HI = 50Hz Stand-Alone
Lo = Camera Sync Present
(2A5)
2 3
7 - Genlock
(2B4)
16
2J
Adjust C89 so DS1 & DS2 are equally illuminated
and both monitors have stable images when camera sync present.
TP33 will equal approximately 25.8 MHz.
TP38 will equal approximately 2.5 VDC.
CSYNC*
2Q
2
L12
(2A4)
4-Q
25
2P
1
U43
Voltage Controlled
Oscillator
13
23
25
3 Syncdet
9
Camera
9-A
23
VDRV*
HI = 60Hz Stand-Alone
Lo = Camera Sync Present
25.8 Mhz
3
2F
HDRV*
2O
1
DS2
(2B6)
U44
Edge
Comparator
(2B3)
2N
9-CLK (2A3)
On with
Camera
9
(2B6)
2T
A
B
7
U45
3
To U42.13
See "LOG" on
Image Path Block Diagram
Page 1 of 5
(2B3)
U41
Buffer
R95
10
U37
Syncdet - To P6.3
+ 5V
1
31
CLAMP
-2.5V
+1.7V
-0.8V
(2A7)
10-B
15
14
+ 5V
(2.5V)
3
4-Q
10
9-CLK
3
(2B3)
TP38
Correction Voltage
Horizontal Edge Comparator/Camera Sync Detection
Sync Detect
7
15 - VRST
1
(2B6)
13-Q
2
5
13
16
2M
(2B6)
8 - OSC
2G
U28
On with
Cart
2 - MODE
4
4
12-Q
2
12
5
1
5-Q
(1C7)
2-B
DS1
U32
2-B
R105
4
R94=1k
R107
U40
Sync Generator
R87
12
U45
(1.7V)
2B
U42
U39
Buffer
(3.3V)
+ 5V
1
Sync Generator
+ 5V
R96=1k
A
31
See Image Path
Block Diagram
Enable
See Image Path
Block Diagram
2C
50Hz
(High=50Hz; Low=60Hz)
5
P6
Sync Separator
Enable
Camera Video
Out of U13
P6
SYNC WITH CAMERA
When camera sync is present, Sync Detect = TTL High. This signal is monitored by the
Image Processor and forces GENLOCK bit TTL High. This forces U29 to use pin 8 as
the input frequency for the sync generation circuitry.
STAND-ALONE MODE
When camera sync is not present, Sync Detect = TTL Low. This signal is monitored by
the Image Processor and forces GENLOCK bit TTL Low. This forces U29 to use pin 9 as
the input frequency for the sync generation circuitry, using the 50Hz or 60Hz crystal.
High = Enabled (Camera Sync Present)
U29 Pin 8 is frequency input pin.
Low = Disabled (Camera Sync Not Present)
U29 Pin 9 is frequency input pin.
3
GenLock
See Video Matrix
Block Diagram
3
4
U36
(2A4)
2L
9600 C-ARM
For Reference Only
Page 1 of 2
GEN_LOK1.DS4
6/19/96
9600 WORKSTATION "GEN-LOCK"
TP27
+5V
TP23
AGND
TP28
+12V
TP25
DGND
VIDEO SWITCHING PCB
872237
TP26
+5VA
TP24
-5V
TP30
+5VR
TP19
-12V
(1D6)
TO GEN-LOCK
& SYNC BLOCK
DIAGRAM
U6
SYNC
SEPARATOR
1
2
20
VOUT
4A
TP10
7
5
U13 Mux
1
L L L
A2 A1 A0
1 2
3
AUXILLARY INTERFACE PCB
876502
P10
J1
J6
1
2
J2
J7
3
4
R129
U4
(1D7) + 5
8
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
P1
14
15
23
24
J13
J12
(1D5)
TP3
8
TP16
A/D VIDEO
4B
8
U4
(1D4)
7
-
+5
LMON 3
2
1
Clamp
3 Output
U7
SW201
9
(1D4)
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
CBLANK*
(2B3)
11
+5V R50
TP22
5
7
5
(2D7)
U46
+
7
8
4
+
U26
-
IN0
IN1
5
8
U42
12 See
TP21
8
4
(2C5)
VOUT
U24
10
TP29
4E
4
5
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
4D
8
VOUT
(2D5)
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
1
A0
1
H
U18 Mux
(ANTI-ALIAS)
IN0
IN1
8
A/D VIDEO
TP18
4C
(1A6)
HCO 9
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
VOUT
(2D4)
1
TP17
RDAC
4F
Default patterns after boot-up shown.
See 9600 Workstation "VMDAT"
Video Matrix Data Block Diagram
20 bits from VMDAT.
18 (6 MUXs; 3 address bits each)
1 (LOG amp enable)
1 (Anti-Alias filter enable)
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
AUXOUT 3
20
2B
4
4 N. C.
1
TP4
L L L
A0 A1 A2
3
2 1
RVIDEO 7
4
N. C.
U9 Mux
10
1
2C
2
20
3
VOUT
J5
U2
RMON 1
1
L L H
A0 A1 A2
3
2 1
4
TP6
U10 Mux
(1B6)
VOUT
TP7
U11 Mux
TOVCR2 1
20
VOUT
L L L
A0 A1 A2
3
2 1
Q3
TP12
VCR2
TP13
VCR1
(1C7)
Q2
(1C8)
P6
2D
3 A/D CLAMP - See Gen-Lock Block Diagram
SW201 closes pins 2 & 3 when a TTL low is placed on pin 1.
Pin 1 goes low during vertical and horizontal retraces.
This ensures the A/D video signal is grounded (or clamped)
to eliminate video noise during retrace.
4
2E
2
1
2
3
4
P1
NOTE:
Shorting the J9 (Bypass) connector on
the Video Switching PCB will direct live
camera video to the "Video" BNC
connector on the rear panel of the
Workstation. This can be used for
troubleshooting purposes as required.
See page 4 of this drawing for
location of the J9 connector.
Connected to rear panel BNC connector on system serial
numbers 69-0001 to 69-1000
J2
TOVCR1
(INTERNAL VCR)
4
L L L
A0 A1 A2
3
2 1
1
This pot adjusts the DC offset for U26 so
the 3
DC level of TP16 matches that of TP22.
J4
1
(1B6)
N. C.
2 R80 typically does not need to be adjusted.
TOVCR1 3
20
IN4
IN3
9
J6
HARD COPY VIDEO
(FRONT OF ELECTRONICS BOX)
TP8
VOUT
(1C6)
OUTSIDE WORKSTATION
ELECTRONICS BOX
TP5
U12 Mux
5
(2C4)
4F
2A
U1
LEFT
MON
VIDEO
(NOT
USED)
J4
LEFT VIDEO
(REAR PANEL)
8
TP20
LDAC
6
8
L H L
A0 A1 A2
3
2 1
5
J11 5
20 3
J3
LVID 5
6
1
5
7
U25
(1C6)
10
Log Amp
3
TP2
U8 Mux
(2D6)
Anti-Alias Filter
(Always Used)
N. C.
13 (H)
VMDATA
LOG Block
Diagram
1
A0
1
L
U19 Mux
(LOG)
R80 R51 -5V
INSIDE WORKSTATION
ELECTRONICS BOX
(SEE 9600 WORKSTATION
AT MOTHERBOARD
BLOCK DIAGRAM)
2
3
2
J5
See Gen-Lock
Diagram
CAMERA
VIDEO
FROM
C-ARM
AUXILLARY INTERFACE PCB
876502
P19
9
P21 N.C.
TOVCR2
10
1
P20 N.C.
2
FROM VCR2
9600 C-ARM
For Reference Only
J1 FROM VCR1
(INTERNAL VCR)
J17 LEFT
FAST SCAN VIDEO
(REAR PANEL)
IP_BLK1.DS4
IMAGE PATH
BLOCK DIAGRAM
Page 1 of 5
12/5/96
1A
A/D
VIDEO
1B
LEFT
VIDEO
OUT
1C
RIGHT
VIDEO
OUT
1D
FROM VIDEO SWITCH PCB
(See Sheet 1)
1E
FAST
SCAN
VIDEO
TO
REAR
PANEL
RIGHT MONITOR
LEFT MONITOR
J1
J1
VIDEO IN
RIGHT VIDEO OUT
LEFT VIDEO OUT
RS170 SYNC SIGNALS
TO / FROM VIDEO
SWITCHING PCB
SEE GEN-LOCK &
SYNC BLOCK
DIAGRAM
AND
VIDEO MATRIX
DATA BLOCK
DIAGRAM
LEFT & RIGHT
FAST SCAN
VIDEO
1
2
OUTSIDE WORKSTATION
ELECTRONICS BOX
9
10
SEE 9600 WORKSTATION CONFIGURATION
BLOCK DIAGRAMS
5H
5G
P9
TP1 TP6 TP3
P8
U16
RDAC
U4
PIO
J8
J7
INSIDE WORKSTATION ELECTRONICS BOX
DIGITAL IMAGE DATA
TO / FROM IP-SCSI PCB(S)
ON CINE SYSTEMS
P6
U3
PIO
P4
5
6
U2
LDAC
P4
LEFT & RIGHT DIGITAL VIDEO
2 X 8 BIT VIDEO DATA & TIMING
FROM IMAGE PROCESSOR PCB
U17
ADC
J2
SCAN CONVERTER PCB
ASY. 876399 / SCH. 876397
OR
F/F (FULL FRAME) SCAN CONVERTER PCB
ASY.878891 / SCH. 878889
TP4
5J
J8
J6
J5
TP7
AGND
TP3
TP2
J9
TP6
J3
TP7
5J
J4
TP1
5J
P3
TP4
GND
TP8
+5V
+5 VOLTS & GROUND
FROM MOTHERBOARD
9600 C-ARM
U140
GSP
For Reference Only
IP_BLK1.DS4
P1
P2
GSP SOFTWARE DOWNLOADED
FROM AT MOTHERBOARD
IMAGE PATH
BLOCK DIAGRAM
Page 2 of 5
12/5/96
Data Bus To/From Technique Processor
See Technique Processor/ Analog Interface
Block Diagram
TP27
Store
U22
PIO_3
40
U23
13
AUXILIARY INTERFACE
00-876502
P2 P106
P2
101 101
13
Lemo
conn.
P1
4
STORE (X-ray On)
+5
L with X-rays
R155
P10
P9
P8
10
2
2
12
10
U42
9
(2D4)
IMAGE PROCESSOR
00-875952
VIDEO SWITCHING
00-872237
XRAYON
P6
7
P6
7
U3
PIO
X_RAY_ON
8
19 1
(1A8)
(2D2)
L with X-rays
(2D7)
MOTHERBOARD
00-875539
ANALOG INTERFACE
00-876736
AT COMMUNICATIONS
00-872125
TP7
P3
P14
22
22
XRAYON
GENERATOR
U14
LATCH
6
8 Bit
Data Bus to
AT Mother PCBr
(1A5)
WORKSTATION
1 Image Processor Enable (This signal has nothing to do with X-ray logic.
A TTL Low indicates the system is taking X-rays and the IP is enabled.
9600 C-ARM
For Reference Only
IP_BLK1.DS4
IMAGE PATH
BLOCK DIAGRAM
Page 3 of 5
12/5/96
To view Left and Right DAC and Monitor
outputs, use this computer generated image.
(Press TEST PATTERN; Swap L>R; TEST PATTERN)
AUTO FLUORO MODE - NOTHING IN FIELD
Amplitude may vary slightly.
This is one horizontal line from the image
shown on the left. Note the gray scale levels.
Your waveform may vary slightly depending
on which horizontal line being viewed.
1E
1F
To IP
A:D
From
IP RDAC
This computer generated image should appear
on both left and right monitors.
From
IP LDAC
200 mV dc
10 us
TP2
LVID
To Aux. Interface PCB
& Interconnect Cable
(Not Used)
TP3
TP17
RDAC
U8-Mux
LMON
P6
TP29
J11
200 mV dc
10 us
1 2 3
J5
TP18
A/DV
J7
TP20
LDAC
J9
BYPASS
(NOT INSTALLED)
TP21
U9-Mux
TP4
RVID
TP5
HCO
TP39
AGND
TP13
VCR1
U10-Mux
1 2 3
TP10
From C-Arm
Camera
TP6
TOVCR1
1 2 3
DGND
TP40
J6
U11-Mux
TP16
A/DVIDEO
1 2 3
TP26
+5VA
TP8
AUXVOUT
U12-Mux
TP23
AGND
1 2 3
1A
U13-Mux
TP19
-12V
TP27
+5V
TP25
DGND
VIDEO
SWITCHING
PCB
TP30
+5VR
TP28
+12V
TP24
-5V
1 2 3
200 mV dc
10 us
1D
9600 C-ARM
1C
1B
For Reference Only
IP_BLK1.DS4
500 mV dc
10 us
500 mV dc
10 us
200 mV dc
10 us
IMAGE PATH
BLOCK DIAGRAM
Page 4 of 5
12/5/96
To view Left and Right DAC and Monitor
outputs, use this computer generated image.
(Press TEST PATTERN; Swap L>R; TEST PATTERN)
shown on the left. Note the gray scale levels.
2H
2G
200 mV dc
10 us
This computer generated image should appear
on both left and right monitors.
P8
P9
2J
200 mV dc
5 us
200 mV dc
10 us
TP1 TP6 TP3
P6
This is one horizontal line from the image shown on the left.
Note the horizontal timing and the gray scale levels.
U16
RDAC
U2
LDAC
TP7
AGND
J5
J6
J8
J9
J3
J4
J2
P4
U17
ADC
TP4
SCAN CONVERTER PCB
ASY. 876399 / SCH. 876397
OR
F/F (FULL FRAME) SCAN CONVERTER PCB
ASY.878891 / SCH. 878889
J5
TP2
J6
TP1
J8
J9
J3
J4 TP5
AGND
TP10
TP9
The illustration in the dotted box shows
the locations of test points on the
F/F Scan Converter PCB. Asy. #878891
9600 C-ARM
For Reference Only
IP_BLK1.DS4
P1
P2
IMAGE PATH
BLOCK DIAGRAM
Page 5 of 5
12/5/96
Image Processor PCB
00-875952
U33 - 74LS595
(1B7)
15-QA
14-IN
1-QB
2-QC
10-MR
3-QD
4-QE
12-RCK
5-QF
11-SRCK
6-QG
7-QH
+5V
TP35
VMDAT
TP36
VMLCLK
B
U3
PIO
+ 5V
15
13
From GSP
See Image
Path Block
Diagram
14
11
P6
9
VMEN*
P6
9
13
VM-DTCLK
13
11
VMDATA
11
15
VM-LTCLK
U34 - 74LS595
(1A7)
15-QA
14-IN
1-QB
2-QC
10-MR
3-QD
4-QE
12-RCK
5-QF
11-SRCK
6-QG
7-QH
R154
+5V
U35 - 74LS595
C
(1A7)
15-QA
1-QB
2-QC
3-QD
4-QE
5-QF
6-QG
7-QH
14-IN
10-MR
TP37
VMDCLK
12-RCK
11-SRCK
X-RAY DISABLE - See X-Ray Disable Block Diagram
GENLOCK - See Gen Lock Block Diagram
50 Hz - See Gen Lock Block Diagram
LOG - See Image Path Block Diagram & Gen Lock Block
ANTI ALIAS - See Image Path Block Diagram
To U13
See Image Path
Block Diagram
1
J9
To U10
See Image Path
Block Diagram
E
1
2
4
5
6
7
8
9
11
18
17
16
15
14
13
A2
A1
A0
A2
A1
A0
To U8 - See Image Path
Block Diagram
Block Diagram
(1A7)
R146
Block Diagram
Block Diagram
C
TP35 VMDAT
TP37 VMDCLK
U33
U27
E
A2
P6
VIDEO SWITCHING PCB
R144
U27
PAL16V8
A0
A1
A0
A2
A1
A0
A2
A1
A0
Bit 1
+ 5V
9-OUT
13
D
A2
A1
9-OUT
13
+5V
Bit 24
9-OUT
13
15
(2D2)
Video Switching PCB
00-872237
24 Bits into Three 8 Bit
Serial to Parallel Shift Registers
A
2
A
U34
TTL Low = Normal State
TP36 VMLCLK
U35
WAVEFORMS & DATA
TAKEN AFTER SYSTEM
HAS SUCCESSFULLY
BOOTED UP.
TP35 VMDAT
TP37 VMDCLK
13
B
TP36 VMLCLK
D
TTL Low = Shift Register
Enable
5 V dc
20 us
TP23
AGND
TP19
-12V
+5VA
TP26
DGND
TP25
TP24
-5V
TP30
+5VR
+5V
TP27 TP28
+12V
9600 C-ARM
1
Bit 24 (U27.2)
This bit is always set low. This allows PAL U27 to initialize muxes U8 & U9 using the data
from U34. If this bit is high (i.e., due to a transmission error) U27 will set mux U8 to the
BYPASS mode (see note 1 above).
For Reference Only
Page 1 of 1
VM_DAT1.DS4
6/19/96
9600 WORKSTATION "VMDAT"
VIDEO MATRIX DATA
IR Receiver PCB
00-874220
RP1
PhotoCell
E1
E3
P6 3
E2
TP1 typical voltage range:
Dark room = -1.2 VDC
Lighted room = +1.2 VDC
2
1
TP1
+12V
See
Workstation
Power
Block
Diagram
P1
1
2
4
3
+12V
+5V
-12V
R10
R13
TP2
R8
R11
1
P4
U2
3
+
2 LM324
-
C6
R3
P3
4
1
1
R36
R5
5 + U2
CR4
7
8
n.o.
LEFT MONITOR
CONTRAST
2
CR2
R6
3
R14
R16
R18
16
2
LEFT
CONTRAST
R2
R9
C5
4
5
R25
6
5
LEFT MONITOR
BRIGHTNESS
-
R7
R4
6
R23
R27
P2
2
LEFT
BRIGHTNESS
R1
3
9
n.o.
13
P5
5
R24
11
R22
RIGHT
CONTRAST
R4
+
K1
8
R33
RIGHT MONITOR
CONTRAST
2
R26
R35
R34
-12V
3
R37
9
C8
R12
P3
2
U2
10
R23
CR5
5
R17
R19
12
P2
2
RIGHT
BRIGHTNESS
R3
14
CR3
R29
13
C7
R31
R30
5
TP2
R21
+5
RIGHT MONITOR
BRIGHTNESS
5
-
R15
3
U2
+
High Scan Brightness / Contrast Control
00-876351
9600 C-ARM
For Reference Only
Page 1 of 2
CON_BRT1.DS4
6/17/96
MONITOR CONTRAST & BRIGHTNESS
BLOCK DIAGRAM
Monitor PCB
Brightness
Adjustment
Monitor PCB
Contrast
Adjustment
J1
Video
Input
R3
R4
J1
Video
Input
J3
J6
Brightness
Adjustment
J3
J6
R1
V
CENT
Contrast
Adjustment
R2
VLIN
*
VFRQ
V
SIZE
H
CENT
HFRQ
There should be no bleeding
of the white part of the image.
Look here to check for excessive
contrast pot adjustment..
*
SUB
CONT
*
Monitor Adjustment
Access Holes
DO NOT ADJUST
A33P12
Q1
R1
*
H
SIZE
To Ambient Room light sensor
(Part of IR Receiver PCB)
All steps in the gray
scale should be visable.
R2
C1
A33P6
U1
A33P7
Monitor Side View
CR1
To Left Monitor Contrast Pot
C2
To Left Monitor Brightness Pot
A35P2
A33P1
*
To Right Monitor Contrast Pot
A33P3
*
TP2
G2 Sub Brightness
C3
C5
R4
DO NOT ADJUST
A35P3
R3
Monitor Adjustment
Access Holes
K1
OEC-DIASONICS,INC
REMOTE CONTRAST/BRIGHTNESS/
ASSY 00-876353- ( )
A35P9
For Monitor Adjustment refer to
IMAGE SYSTEM CALIBRATION
C4
R7
R6
R5
C6
To J3 on Left Monitor Circuit PCB
A33P2
R8
R10
CR2
R36
R14
R16
A35P4 R18
R11
R13
R9
R12
R15
R17
R19
U2
C7
1. Turn off AUTO HISTO & WINDOW / LEVEL
2. Call up TEST PATTERN on both monitors by pressing
the TEST PATTERN button and the L-R button.
3. Adjust brightness and contrast pots R1 - R4 to minimum.
4. Adjust the brightness pots R1 & R3 until the raster lines on both monitors
are just visable.
5. Adjust the contrast pots R2 & R4 until all steps in the gray scale test pattern
on both monitors can be seen without causing the white areas of the image to bleed.
R20
C10
To Right Monitor Brightness Pot
Focus
C9
Monitor PCB
MONITOR BRIGHTNESS & CONTRAST SETUP
Setup the monitor brightness and contrast in normal room lighting conditions.
9600 C-ARM
C8
R21
R22
R25
To J3 on Right Monitor Circuit PCB
A33P5
Monitor Bottom View
R28
R27 CR4
R37
Adjustment access holes are
located in the monitor mounting plate
R23
CR3
R29
R30
R33
R34
R24
For Reference Only
Page 2 of 2
CON_BRT1.DS4
6/17/96
R26
R31
R32
CR5
R35
TP1
TP1 typical voltage range:
Dark room = -1.2 VDC
Lighted room = +1.2 VDC
MONITOR CONTRAST & BRIGHTNESS
BLOCK DIAGRAM
00-872125
Auxiliary
Interface
PCB
00-876502
+5V
See 9600Workstaion
Block Diagram
To & From
AT Motherboard
R4 (2D5)
1
(2D5)
U18
Buffer
PORTD-W
Data
A
1
16 B
1
18
15
C
14
D
13
E
12
F
1
11
CLK
(2D6)
2
U17
4
5
6
7
8
U17
VCRSTP1*
U17
4
10
5
U17
6
9 U17 8
46
46
3
RECORD1*
27
27
4
PAUSE1*
29
29
6
PLAY1*
32
32
7
FFORWD1*
31
31
8
REWIND1*
34
34
9
VIDEO CABLE P/N
00-876803-03
For Sony 9500
P10
Internal
VCR
Control
9 10
2
3
11
3
2
U8
Top of
Electronics
Box
P15
P14
P3
See Image Path
Block Diagram
VCR 1
CONTROL CABLE P/N
00-876802-01
For Sony 9500
(2D5)
See 9600 Service Manual
Peripherals Section
U6
Buffer
PORTE-R
U26
DUART-PIO
Addr
G
4
H
6
I
8
J
PLAYIN1
35
STOP
U38
6 (2D5)
Test Point
5
RECIN1*
44
44
2
K
PAUSEIN1
37
37
11
(2D6)
PAUSE
RECORD
Control Cable On/Off
PLAY
A
HIGH
Pulses LOW when VCR Record
Lite turned OFF on Trackpad.
HIGH
N/C from
PAUSE
B
HIGH
Pulses LOW when VCR Record
Lite turned ON on Trackpad.
HIGH
N/C from
PAUSE
50
U24
PAL22V10
C
2
(1C5)
PORTER*
10
1
+5V
PORTDW*
35
4
1
15
VCREN*
2
50
19
20
HIGH
2
With VCR Record Lite ON, this
pulses LOW when a) X-ray
switch pressed or released, or
b) VCR record lite turned OFF.
Pulses LOW when VCR
Record Lite turned OFF.
Pulses LOW when VCR Play
Lite turned ON or OFF.
Pulses LOW without
control cable connected.
Pulses LOW without
D
HIGH
E
HIGH
HIGH
HIGH
N/C from
PAUSE
F
HIGH
HIGH
HIGH
N/C from
PAUSE
G
LOW
HIGH
R17
CONTROL CABLE P/N
00-876452-01
19
L
21
M
CONTROL CABLE P/N
00-876534-01
Pulses HIGH when VCR
Record Lite turned OFF.
TRI-STATE without
LOW
H
HIGH
HIGH
HIGH
N/C from
PAUSE
I
HIGH
LOW = VCR Record Lite ON
HIGH = VCR Record Lite OFF
HIGH
N/C from
PAUSE
LOW
HIGH = VCR Record Lite ON &
X-ray switch pressed.
PULSES HIGH = VCR Record
Lite turned OFF.
HIGH = VCR Play Lite ON
HIGH without control
cable connected.
K
LOW
LOW
LOW
N/C from
PAUSE
L
HIGH
PULSES LOW = VCR Record
Lite turned ON & X-ray switch
pressed, or when VCR Record
Lite turned OFF.
M
PULSES LOW
every 6mS
(APPROX.).
(2D7)
J
TP2
GND
U6
TP1
GND
P5
P4
P3
1
Test point data taken with VCR connected and
configured in software (F10 with disk, Access
Level 2, Configuration/Hard Disk, Set System
Configuration.
U38
2
Pin-for-pin connection
PULSES LOW every 6mS
(APPROXIMATELY).
PULSES LOW when VCR
Play Lite turned ON or OFF.
PULSES LOW without
PULSES LOW every 6mS
(APPROXIMATELY).
N/C from
PAUSE
VCR Control
U18
9600 C-ARM
U24
TP3
GND
TP4
GND
AT Extender Board
For Reference Only
Page 1 of 3
PERPHRL1.DS4
6/19/96
9600 WORKSTATION PERIPHERALS
Video Switching PCB
00-872237
TP5
HCO
(1C3)
J3
9
10
USR 5
HARDCOPY CAMERA
See Image Path
Block Diagram
Page 1
EXPOSE
RESET PROGRAM
Located on the
J6 front of electronics box
1
J28
Coax cable with
BNC connectors
on each end
J6
J7
20 conductor
ribbon cable
shown on the right. This amplitude will be
twice as large if measuring an unterminated output.
As viewed from the Solder Side
2 4 6 8 10 12 14 16 18 20
J3
TP5
HCO
J28
1 3 5 7 9 11 13 15 17 19
Remote
Panel
Video
In
TP39
AGND
2 4 6 8 10 12
J01
18 Seg. X 4
Display
74LS05
1 3 5 7 9 11
1
This image can be used to adjust the hard
copy camera’s image. To adjust the hard
copy camera adjust the BRIGHTNESS &
CONTRAST controls located on the hard
copy camera control panel. When adjusting
the BRIGHTNESS & CONTRAST make
sure that "AUTO HISTO" is TURNED OFF.
SEE 9600 SYSTEM SERVICE MANUAL
PERIPHERALS SECTION
200 mV dc
10 us
Trouble Shooting Hints
After the camera has been adjusted properly
to the Test Pattern, use the WINDOW & LEVEL
CONTROLS or AUTO HISTO to adjust
diagnostic images on the hard copy camera.
Do not use the brightness & contrast knobs
found on the back of the monitors.
VIDEO
SWITCHING
PCB
This portion of the signal will appear
HI as long as a button is pressed.
LED test: To test the LED display, turn on the Workstation Key
and observe that all segments of the display light up momentarily
as the multi format camera powers up. If the LEDs do not light
properly, verify that J28 is plugged in correctly.
1
To view this computer generated image
for the left monitor:
(Press TEST PATTERN)
Button Tests: All tests listed are done with the camera turned on.
If the buttons do not respond when pressed, check the following signals:
Reset:
Press reset and verify that J01-11 and J28-3 goes HI (+5V).
Program: Press program & check for pulse at J28-4, J01-9 and J28-11.
Up:
Press up & check for pulse at J28-4, J01-7 and J28-12.
Down:
Press down & check for pulse at J28-4, J01-5 and J28-15.
Advance: Press advance and check for pulse at J28-4, J01-3 and J28-14.
Expose: Press expose and check for pulse at J28-4, J01-1 and J28-13.
If there are no pulses at J28-4, the problem is in the camera itself.
If there are pulses at J28-4, but no pulses on the other pins listed above
the problem is in the panel assembly.
Other pins
listed on
J28 & J01
J28-4
2 V dc
50 us
Hard Copy Camera
9600 C-ARM
For Reference Only
Page 2 of 3
PERPHRL1.DS4
6/19/96
00-872125
U34
Buffer
PORTA-W
Data
PORTAW*
CLK
11
(2C5)
U19
Buffer
PORTC-W
See 9600 Workstation
Block Diagram
To & From
AT Motherboard
PORTCW*
CLK
19 A
18 B
R15
17 C
16 D
15 E
R13
U28
Buffer
PORTC-R
PD0
2
2
PD1
3
3
PD2
4
R12
PD3
5
PD4
6
6
PD5
7
7
PD6
8
PD7
9
R10
R9
R8
1
1
18
3
U11 4
J
(2B2)
AUTOLF*
14
14
17
9
16
(2B2)
9
2
3
4
U29
PAL22V10
INIT*
16
16
U11
8
L
SLCT_IN*
17
17
15
15
13
13
1
12
12
Test Point
Idle or Printing
A
LOW
PULSES
U23
Buffer
PORTB-R
16 S
Addr
6
U10
(2B2)
23 U
PORTBR*
(2B3)
1&19
5
10
10
11
11
(2B2)
5 M
ERROR*
6 N
7
22 T
P
9
Q
(2A2)
SLCT
O
8
PE
ACK*
8
U10
9
BUSY
(2A2)
18
25
18
25
P4
P3
TP1
GND
P5
1
TP2
GND
U19
2
U23
TP3
GND
U28
Parallel
Printer Cable
1
3
U10
(2B2)
(2B2)
15 R
Parallel
Printer
8
K
U10
5
1&19
25 Pin
D-SUB
U7
(2B2)
2
9
STROBE*
SEE 9600 SYSTEM SERVICE MANUAL
PERIPHERALS SECTION
Rear
Panel
P18
Printer
5
8
Auxiliary
Interface
PCB
00-876502
4
2 R1
1
U11
(2B2)
I
4
PORTCR*
Printer Cable
00-876450
19
(2B2)
11
P3
R14
R11
14 F
13 G
12 H
P4
U29
TP4
GND
U34
AT Extender Board
Test point data taken by printing patient summary.
Press F5, then print. Some lines toggle as shown
in the "Start of Print" column. Then, they return to
the same state as when the printer is setting idle.
High = Printer On-Line
Low = Printer Off-Line
Start of Print (Momentary)
B
HIGH
PULSES
C
LOW
PULSES
D
HIGH
PULSES
E
LOW
PULSES
F
LOW
PULSES
G
LOW
PULSES
H
LOW
PULSES
I
HIGH
HIGH
J
HIGH
HIGH
K
HIGH
HIGH
L
LOW
LOW
M
Tri-State
Tri-State
N
Tri-State
Tri-State
O
LOW
LOW
P
Tri-State
Tri-State
2
HIGH
HIGH
R
HIGH
HIGH
S
HIGH
HIGH
T
HIGH
HIGH
U
HIGH
PULSES
Q
Printer
9600 C-ARM
For Reference Only
Page 3 of 3
PERPHRL1.DS4
6/19/96
Side View
Keypads/Switches
IR XMIT PCB
Top View
9VDC Battery
AVERAGING
SELECT
DISK
VIEW
IMAGE DIR
4 Assy. Screws
ACQUIRE
IMAGES
PLAY/PROCESS
IR Transmitter PCB
00-873936
ENTER
U1
Keypad Decode
RECALL
REGISTRATION
E1 Jumper = 13-14
Q4-Q6
IR LED Driver
1
IR Receiver PCB
00-874220
CR14
L2, C8
Local Oscillator
+ 5V
ZOOM
U1
IR Pre-Amp
SHARPEN
(1E4)
7
SNS
0-6
WINDOW/LEVEL
ON/OFF
DRV
0-6
20
COMPONENTS Q1-Q3, CR16. &CR17 NOT
INSTALLED IN EARLIER REVISIONS
NEGATE
CR3 1
Infra-Red
Pulse Train
(1E6)
Vcc
AUTO-HISTO
CR16
Q1-Q3
IR LED Driver
7
LEVEL
WINDOW
L2
CR15
COIL1
(1E6)
1
TP1
7
COIL2
IN1
+ 5V
10
CR17
9
Q1
R5
E7
(1E3)
LOW
BATTERY
Q7-Q10, CR4
Low Battery
Detection Circuit
(1C5)
12
11
REMOTE CONTROL ASSEMBLY
See 9600 Control Panel Block Diagram
VCC
R3
From 9V
Battery
E4
+ 12V
Low Battery
Indicator
Cart Control Panel
Processor PCB
00-876611
1
U5
80C196KC
(1B6)
E6
CR1
E5
P1
P2
R1
(1E4)
(1D5)
Y1 - 455 kHz
8
+ 5V
P3
U9
Opto_I
IR LCL
TP5
R11
5
1
7
P2.2 15
3
U3
74LS08
(1D7)
2
1
IR RMT
TP9
(1D7)
Waveform taken when pressing the
ENTER button on the Remote Control.
1
2
3
4
(1D7)
5
TP5
IR LCL
500 mVdc
50 ms
4
+12VIN
IR_LCL
+12VRET
+12VRET
U8
(not used)
RS422
INPUT
1 - CR3 is physically located behind the dark lens. This
eliminates the visible light spectrum allowing only
IR (Infra-Red) light to pass and be detected by CR3.
If this lens is mispositioned, ambient light can strike
CR3 creating unwanted random pulses.
- The clear lens is used to detect ambient light and
change the brightness of both monitors to match room
light intensity. See Contrast/Brightness & Monitors
Block Diagram for this detector and circuitry.
9600 C-ARM
For Reference Only
REM_BLK1.DS4
Page 1 of 1
5/21/96
9600 IR REMOTE CONTROL
BLOCK DIAGRAM

9600 Mobile Digital C-Arm

Transcription

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