66 2 DDR4 Comp. Memory 64-bit: 4x16

4
3
2
1
12VDC
Page 25
FMC LPC CONNECTOR
VCCINT Regulator @ 30A
Page 52
D
Page 41
GPIO LEDs
D
Page 39
QSPI1 256Mb
VCCAUX Regulator @ 3A
Page 43-45
SYSMON Header and MUX
Page 48
PMOD Connectors
Banks 44/45/46
35-37
Clock
Clock
Clock
VCCBRAM Regulator @ 5A
Page 54
GTH
NOT
AVAIL.
Page 49-50
IIC Bus
GTH
NOT
AVAIL.
HP
HP
48
VCC1V8 Regulator @ 2A
Page 55
46
Page 40
USB UART
HP
67
VADJ_1V8 Regulator @ 10A
HP
47
HR
65
Page 38
Ethernet SGMII
40ohm
Page
Recovered
SMA
SI570
Page 53
HP
44
C
C
Page 57
Page 58
Page 41
GPIO DIP switches
HR
64
MGTAVTT Regulator @ 2A
Page 59
Page 46-47
HDMI CODEC/CONNECTOR
0
Pages 43-45
SYSMON A/D Channels
MGTAVCC Regulator @ 4A
45
0
HP
66
Page 34
125MHZ Clock
VCC1V2 Regulator @ 2A
Page 34
Input SYSCLK 300MHz
U1
0
FMC HPC CONNECTOR
64-bit: 4x16-bit
DDR4 Comp. Memory
HP
HP
68
Page 21-24
Page 56
Pages 17-20
UTIL_3V3 Regulator @ 10A
Page 61
Page 41
GPIO PUSHBUTTONS
Page 39
QSPI0 256Mb
SYS_1V0 Regulator @ 2A
GTH228
GTH227
GTH226
GTH225
Page 63
GTH224
Page 33
SDIO SD CARD
SYS_1V8 Regulator @ 1A
B
B
Page 63
SYS_2V5 Regulator @ 1A
Page 63
Page 21
FMC HPC MGTs
Page 27-28
SFP+ 0:1
Page 25
FMC LPC MGTs
Page 36
SMA MGT
Page 28
PCIe x8 Edge
MGTVCCAUX Regulator @ 1A
Page 60
BANK#
SMT, 14-pin JTAG
Buffers
BANK
BANK
BANK
BANK
BANK
BANK
BANK
BANK
Page 16
System Controller
IIC, JTAG, SD
A
Page 29-33
PAGE#
0
44
45
46
47
48
64
65
3
4
4
5
6
6
7
7
BANK#
SYS_5V0 Regulator @ 1A
PAGE#
BANK 66
BANK 67
BANK 68
MGT225-228
8
8
9
10
PWR/GND BANKS
PWR CONNECTORS
11-13
50-51
Page 62
MECHANICALS
TITLE: Block Diagram
SCHEM, ROHS COMPLIANT
HW-U1-KCU105_REV1_0
3
0431811
1280723
0381556
TSS0165
A
Page 66
DATE: 11/13/2014:11:27
SHEET SIZE: B
SHEET
4
ASSY P/N:
PCB P/N:
SCH P/N:
TEST P/N:
2
2
OF
VER:
1.0
REV:
01
DRAWN BY:
66
BF
1
4
C461
C460
C462
C911
3
C915
C916
C917
C918
C906 C914
C907
C908
C909
VCCINT_FPGA
2
C657C948
C658C949
C659C950
C947
VCCINT_FPGA
1
C660 C661 C662 C663 C664 C665
VCCINT_FPGA
VCCINT_FPGA
D
D
1
470UF
2V
SP
2
8 PLACES
1
1
2
1
2
1
2
1
2
2
1
2
1
1
100UF
4V
2
X6S
5 PLACES
2
1
1
1
1
2
2
2
2
4.7UF
6.3V
X5R
1
1
1
1
1
1
1
2
2
2
2
2
2
2
0.47UF
10V
X5R
1
1
1
1
1
1
2
2
2
2
2
2
VCCINT
6 PLACES
7 PLACES
GND
GND
GND
GND
C330 C334 C338
C331 C335 VCCBRAM_FPGA
C336 C337
VCCBRAM_FPGA
C899
C900
C901
1
100UF
4V
X6S
1
2
1
2
4.7UF
6.3V
X5R
2
3 PLACES
1
1
1
1
1
1
2
2
2
2
2
2
2
VCCBRAM
7 PLACES
GND
C
1
GND
C919 C921
C920 C922
C923
VCCAUX_FPGA
C
VCCAUX_FPGA
C235
100UF
6.3V
X6S
1
4.7UF
6.3V
X5R
2
1 PLACE
1
1
1
1
1
2
2
2
2
2
VCCAUX / VCCAUX_IO
5 PLACES
GND
GND
VCCO_47 / VCCO_48 / VCCO_66 / VCCO_67 / VCCO_68
VADJ_1V8_FPGA
VADJ_1V8_FPGA
C159
100UF
6.3V
X6S
VADJ_1V8_FPGA
C160
1
100UF
6.3V
X6S
2
C161
1
100UF
6.3V
X6S
2
VADJ_1V8_FPGA
1
100UF
6.3V
X6S
2
GND
VADJ_1V8_FPGA
C156
1
2
4.7UF
6.3V
X5R
B
GND
C951C961 C965
C953C963 C966
C952C962
C954C964
GND
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
B
GND
GND
VCCO_0 / VCCO_64 / VCCO_65
VCC1V8_FPGA
VCC1V8_FPGA
C2401
47UF
6.3V
2
X6S
4.7UF
6.3V
X5R
C955
C967 C969
C956
C968 C970
1
1
1
1
1
1
2
2
2
2
2
2
FPGA Decoupling 1
GND
GND
VCCO_44 / VCCO_45 / VCCO_46
C957C971 C973
VCC1V2_FPGA
VCC1V2_FPGA
A
C153 1
100UF
4V
X6S
2
4.7UF
6.3V
X5R
TITLE: FPGA Decoupling 1
SCHEM, ROHS COMPLIANT
HW-U1-KCU105_REV1_0
C958C972 C974
1
1
1
1
1
1
2
2
2
2
2
2
4
0431811
1280723
0381556
TSS0165
A
DATE: 11/13/2014:10:59
SHEET SIZE: B
SHEET
GND
ASSY P/N:
PCB P/N:
SCH P/N:
TEST P/N:
GND
3
2
14
OF
VER:
1.0
REV:
01
DRAWN BY:
66
BF
1
4
3
2
1
MGTAVCC_FPGA
D
D
C902
1
C903
1
100UF
4V
X6S
2
100UF
4V
X6S
2
GND
MGTAVCC_FPGA
MGTAVCC_FPGA
C602
BANK 224
C10261
100UF
4V
X6S
2
C10271
100UF
4V
X6S
2
C10281
100UF
4V
X6S
2
C10291
100UF
4V
X6S
2
DNP
DNP
DNP
C10301
100UF
4V
X6S
1 C622
0.22UF
2
6.3V
X6S
MGTAVTT_FPGA
1
C632
0.47UF
2
10V
X5R
1
C601
2
4.7UF
6.3V
X5R
1 C623
0.22UF
2
6.3V
X6S
MGTVCCAUX
1
C711
1
2
4.7UF
6.3V
X5R
2
2
GND
GND
MGTAVCC_FPGA
GND
GND
MGTAVTT_FPGA
MGTVCCAUX
MGTAVCC_FPGA
C
C599
C10211
100UF
4V
X6S
2
C10221
100UF
4V
X6S
2
C10231
100UF
4V
X6S
2
C10241
100UF
4V
X6S
2
C10251
100UF
4V
X6S
BANK 225
2
4.7UF
6.3V
X5R
1 C620
0.22UF
2
6.3V
X6S
1
C631
2
DNP
DNP
DNP
1 C598
0.22UF
2
6.3V
X6S
GND
1 C621
DNP
2
DNP
DNP
1
C712
1
2
DNP
DNP
DNP
2
GND
C
GND
GND
MGTAVCC_FPGA
MGTAVTT_FPGA
MGTVCCAUX
MGTAVTT_FPGA
C596
C904
1
C959
1
100UF
4V
X6S
2
100UF
4V
X6S
2
BANK 226
4.7UF
6.3V
X5R
1 C618
DNP
2
DNP
DNP
1
C630
0.47UF
2
10V
X5R
1
C595
2
4.7UF
6.3V
X5R
GND
GND
1 C619
DNP
2
DNP
DNP
1
C713
1
2
4.7UF
6.3V
X5R
2
GND
MGTAVCC_FPGA
GND
MGTAVTT_FPGA
MGTVCCAUX
MGTAVTT_FPGA
C10111
B
100UF
4V
X6S
2
C10121
100UF
4V
X6S
2
C10131
100UF
4V
X6S
2
C10141
100UF
4V
X6S
2
C10151
100UF
4V
X6S
C593
BANK 227
DNP
DNP
DNP
2
GND
100UF
4V
X6S
2
1
C629
2
DNP
DNP
DNP
1 C592
DNP
2
DNP
DNP
GND
C10171
100UF
4V
X6S
2
C10181
100UF
4V
X6S
2
C10191
100UF
4V
X6S
2
C10201
100UF
4V
X6S
2
C590
BANK 228
4.7UF
6.3V
X5R
GND
1 C614
0.22UF
2
6.3V
X6S
GND
1 C617
DNP
2
DNP
DNP
1
C714
1
2
DNP
DNP
DNP
2
GND
MGTAVCC_FPGA
MGTAVTT_FPGA
C10161
1 C616
DNP
2
DNP
DNP
GND
MGTAVTT_FPGA
1
C628
0.47UF
2
10V
X5R
1
C589
2
4.7UF
6.3V
X5R
1 C615
0.22UF
2
6.3V
X6S
GND
B
MGTVCCAUX
1
C924
1
2
4.7UF
6.3V
X5R
2
GND
FPGA Decoupling 2
TITLE: FPGA Decoupling 2
SCHEM, ROHS COMPLIANT
HW-U1-KCU105_REV1_0
A
ASSY P/N:
PCB P/N:
SCH P/N:
TEST P/N:
0431811
1280723
0381556
TSS0165
A
DATE: 11/13/2014:10:59
SHEET SIZE: B
SHEET
4
3
2
15
OF
VER:
1.0
REV:
01
DRAWN BY:
66
BF
1
4
3
XC7Z010CLG225
2
1
XC7Z010CLG225
BANK VCCPINT
XC7Z010CLG225
U111
BANK VCCINT
XC7Z010CLG225
SYS_1V0
VCCPINT_K5
VCCPINT_H5
VCCPINT_G6
D
XC7Z010CLG225
K5
H5
G6
VCCINT_L10
VCCINT_J10
VCCINT_G10
VCCINT_F9
VCCINT_E10
BANK GND
XC7Z010CLG225
SYS_1V0
L10
J10
G10
F9
E10
CL225
U111
CL225
XC7Z010CLG225
XC7Z010CLG225
BANK VCCPAUX
XC7Z010CLG225
SYS_1V8
VCCPAUX_L6
VCCPAUX_J6
BANK VCCAUX
XC7Z010CLG225
L6
J6
VCCAUX_K9
VCCAUX_J8
VCCAUX_H9
SYS_1V8
K9
J8
H9
C
U111
CL225
U111
U111
FERRITE-120
B
L62
C794
2
0.47UF
10V
2
X5R
10UF
4V
X5R
CL225
SYS_1V8
2
1
U111
C835 1
GND
VCCO_MIO0
SYS_1V0
F5
1
C
CL225
VCCPINT
SYS_1V8
VCCPLL
VCCPLL_F5
D
CL225
XC7Z010CLG225
BANK VCCPLL
XC7Z010CLG225
R9
P2
P12
N5
N15
M8
L5
L11
L1
K7
K4
K14
K10
J9
J5
H6
H10
G5
G3
G13
F10
E9
E7
E5
D2
D12
C5
C15
B8
A11
A1
GND_R9
GND_P2
GND_P12
GND_N5
GND_N15
GND_M8
GND_L5
GND_L11
GND_L1
GND_K7
GND_K4
GND_K14
GND_K10
GND_J9
GND_J5
GND_H6
GND_H10
GND_G5
GND_G3
GND_G13
GND_F10
GND_E9
GND_E7
GND_E5
GND_D2
GND_D12
GND_C5
GND_C15
GND_B8
GND_A11
GND_A1
3A
1 C788 1
100UF
2 4V
2
X6S
C798
4.7UF
6.3V
X5R
1
C8211
C822 1
C820
2
0.47UF
10V
2
X5R
0.47UF
10V
2
X5R
0.47UF
10V
X5R
1 C790 1
100UF
2 4V
2
X6S
C803
1
C828
4.7UF
6.3V
X5R
2
0.47UF
10V
X5R
GND
VCCINT/VCCBRAM
GND
GND
VCCPAUX
SYS_1V0
B
VCCO_MIO1
SYS_1V8
C816
1
1
C806
1
C8331
C834
100UF
4V
X6S
2
2
4.7UF
6.3V
X5R
2
0.47UF
10V
2
X5R
0.47UF
10V
X5R
SYS_1V8
1 C789 1
100UF
2 4V
2
X6S
Bank 0 GND
C801
1
C825
4.7UF
6.3V
X5R
2
0.47UF
10V
X5R
1 C791 1
100UF
2 4V
2
X6S
C805
1
C830
4.7UF
6.3V
X5R
2
0.47UF
10V
X5R
GND
GND
SYS_1V8
C7951
System Controller 3
47UF
6.3V
2
X6S
VCCAUX
A
Bank 34
GND
SYS_1V8
1 C796 1
47UF
2 6.3V 2
X6S
TITLE: System Controller 3
SCHEM, ROHS COMPLIANT
HW-U1-KCU105_REV1_0
SYS_1V8
C8081
C837
4.7UF
6.3V 2
X5R
0.47UF
10V
X5R
C7921
47UF
6.3V
2
X6S
1
C8101
C811 1
C8431
C8441
C8411
C842
2
4.7UF
6.3V 2
X5R
4.7UF
6.3V
X5R
0.47UF
10V
2
X5R
0.47UF
10V
2
X5R
0.47UF
10V
2
X5R
0.47UF
10V
X5R
2
4
SHEET SIZE: B
GND
3
0431811
1280723
0381556
TSS0165
A
DATE: 11/13/2014:10:59
SHEET
GND
ASSY P/N:
PCB P/N:
SCH P/N:
TEST P/N:
2
31
OF
VER:
1.0
REV:
01
DRAWN BY:
66
BF
1
4
3
2
1
Q1
N/C
D
COM
COM
2
5
NC
NC
C2421
2
10UF
25V
X5R 2
2
S
R316
10.0K
1/10W
INPUT_GND
1
1
R273
2
1.00K
1/16W
1%
6
1UF
25V
X5R
1
CG17
CG26
CG35
2
3PSG
C910
1UF
25V
X5R
J54
CB8
C2981
2
3
J15
1B
DNP
2
1
D
5 6 7 8
1
R421
2.00K
1/16W
VCC12_SW
2.5W
DS26
N/C
4
4 G
12V
1
3 2 1
12V
FDS6681Z
50MOHM
U16
1
VCC12_P
MASTER
POWER
C499
1
330UF
16V
ELEC
2
D
1
INPUT_GND
GND
2
R460
2.00K
1/16W
GND
3
1101M2S3AQE2
1
GND
2
MASTER_SW_12V
Q4
1
BSS138
2
VCC12_P
INPUT_GND
1
2
4
REG_EN
3
1
C358
2
DNP
DNP
DNP
U15
J73
VCC1V8
INPUT_GND
R422
2
1.00K
1/16W
1%
R229
2
3.48K
1/10W
1%
Q18
J38
1
MAX16050
UTIL_3V3
SM_FAN_PWM
16 DISC1
BLACK
J23
1
SI2300DS
VCC 1
13 DISC2
10
DISC3
NC 7 DISC4
GND
1
2
SYS_1V0
VCC12_P
1
1
C
1
C859
2
0.1UF
25V
X5R
1.7W
BLACK
J24
GND
1
BLACK
J25
1
GND
R819
10.0K
1/10W
B
1R816
10.0K
1/10W
2
1R817
10.0K
1/10W
2
1
R818
1
BLACK
10.0K
1/10W
2
J26
2
18
11
8
3.32K
1/10W
1%
1
R808
5.9K
2 1/10W
1
R827
20K
2 1/10W
1
2
R809
4.32K
1/10W
5
1
BLACK
J27
1
EN
SET1
SET2
SET3
SET4
NC 27 SEQ3
NC 26 SEQ2
NC 25 SEQ1
2
22
14
3
2
1
29 EPAD
2
2 GND
Maxim Regulator Inhibit Jumper
DELAY TIME AND RESET TIMEOUT PERIOD SET TO 11mS
SYS_1V8_POR_B
BLACK
SYS_2V5_POR_B
GND
GND Test points
Pwr Connector - Switch - Pwr Supervisors
FAULT_B 21 NC
RESET_B 20
ABP
1
OUT2 12
9
OUT3
6 NC
OUT4
OV_OUT_B 19 NC
EN_HOLD_B
1UF
16V
SYS_1V0_POR_B
REM 15 NC
SHDN_B
C873
OUT1 17
CP_OUT 28 NC
GND
A
SYSCTLR_POR_B
TITLE: Pwr Connector - Switch - Pwr Supervisors
SCHEM, ROHS COMPLIANT
HW-U1-KCU105_REV1_0
TIMEOUT 24
DELAY 23
TQFN_28_EP
U128
1
1
2
2
C869
C870
0.022UF
10V
2 PLACES
1
SHEET SIZE: B
SHEET
GND
3
ASSY P/N:
PCB P/N:
SCH P/N:
TEST P/N:
0431811
1280723
0381556
TSS0165
A
DATE: 11/13/2014:11:59
51
OF
2
VER:
1.0
REV:
01
DRAWN BY:
66
BF
GND
4
B
1
4
R815
500MW
2
INPUT_GND
SYS_1V8
SM_FAN_TACH
6
2
SYS_2V5
2
INPUT_GND
1
2
1.00K
1/16W
1%
4.99K
1/10W
1%
DDZ9678
R640
2
1.8V
2
1
CDELAY
GND
HDR_1X2
2
1
J12
2
1.50K
1/10W
1%
1
0.01UF
25V
X7R
R637
IN
5
D3
OUT
C
1
VCC
2
3
C871
EN
2
1
10.0K
1/10W
1%
2
10.0K
1/10W
1%
22_11_2032
2
1
R318
1
3.32K
1/10W
1%
R499
1
100V
500MW
R638
VCC12_P 1
DL4148
INPUT_GND
MAX16052
C549 1
0.1UF
25V
2
R319
UTIL_3V3
R6391
10.0K
1/10W
VCC12_SW
Keyed Fan Header
1
UTIL_3V3
D1
SW1
360MW
2
SH1
SH2
3
3
6-PIN MINI-FIT
AC ADAPTER (BRICK)
1
4
3
L19
VCC12_SW
2
1
VCC12_VCCINT
D
2
1
FERRITE-96
C252
1
10A 1
1
2.2UF
25V
X7R
2
2
2
VCC12_SW
C208 C207
22UF
25V
X7R
2 PLACES
D
GND
GND
R462
2.00K
1/16W
MAX15301
C420
10UF
6.3V
X6S
1 1
C477
2 2
4.7UF
6.3V
X6S
GND
AGND1
L45
10UH
9
SALRT
10
SCLK
11
SDAT
LBO
LBI
OUTP
C
OUTN
1
23
2
21
VCCINT_FPGA
27
26
Z61 2
DCRP
MAX15301
INTUNE DIGITAL
POL CONTROLLER
1
C727
2
0.15UF
16V
X7R
1
C364
2
0.01UF
25V Q2
X7R
5 6 7 8
D
12
1
R156
2
7.15K
1/10W
1%
B
17
1
16
LXSNS
14
1
2
ADDR0
4
ADDR1
3
SET
2.21K
1/10W
1%
1
2
1
R514 1 R81
2
140K
1/10W
1%
2
12.7K
1/10W
1%
2
1
Q23
3
1
C738
2
100PF
50V
X7R
1
2
7
8
28
29
5
DL
TEMPX
CIO
LCFFP
LCFFN
DGND
19
2
2
22UF
25V
X7R
S
2 PLACES
2
2200PF
50V
X7R
C163
4 G
S
3 2 1
33
1
1
C251
2
2.2UF
10V
X6S
2
Z1
GND
5 6 7 8
D
4 G
S
3 2 1
S1
S1
C165
R425
1.00K 2
1/16W
2
1
2
1
2
1
2
C164
GND
R86
1
2
1
VCCINT_FPGA
R1 1
2
C166
0.002
100UF
4V
X6S
6 PLACES
GND
FDMS8558S
2 PLACES
78W
DEFAULT = 0.95VDC
VCCINT 40A Regulator
2
GND
TITLE: VCCINT 40A Regulator
SCHEM, ROHS COMPLIANT
HW-U1-KCU105_REV1_0
A
VCCINT RAIL SWITCHING FREQUENCY IS 400kHz AND SHOULD NOT BE
SYNCHRONIZED TO OTHER LOWER CURRENT RAILS OPERATING AT 600 kHZ.
ASSY P/N:
PCB P/N:
SCH P/N:
TEST P/N:
0431811
1280723
0381556
TSS0165
A
DATE: 11/13/2014:10:59
2
CONNECT AGND TO GND AT OUTPUT CAPACITORS
5
PLACE TEMP COMPENSATION TRANSISTOR ON THE BACKSIDE OF THE BOARD DIRECTLY UNDER OUTPUT INDUCTOR
1
MINIMUM 1K LOAD REQUIRED. MUST BE CONNECTED BEFORE SENSE RESISTOR
TO AVOID CONTRIBUTION TO CURRENT MEASUREMENTS.
4
CONNECT ACROSS PINS OF OUTPUT INDUCTOR
4
B
AGND1
AGND1
3
D16
MMSZ4680T1G
2.2V
500MW
GND
Q19
Q20
GND
2 VCCINT_SYSMON_SENSE_N
C167
2 R2
1
C162
5 6 7 8
D
Z3
2 VCCINT_SYSMON_SENSE_P
VCCINT
1%
3W S2
S2
1
C453
Z2
1
L57
R230
2.2
1/10W
1
18
GDRV
20
PGND
EPAD
GND
1
1
GND
VCCINT_DL
U29
5
C205 C206
250NH
VCCINT_FET_SWITCH
2
AGND1
R226
1
GND
R461
2.00K
1/16W
PMBUS ADDR
0x0A
VCCINT_TEMPX
1
3 2 1
C403
0.22UF
6.3V
X6S
2
LX
4 G
3 2 1
SYNC
EN
S
5 6 7 8
D
1
REG_EN
4
VCCINT_FET_SWITCH
Z62 2
1
AGND1 R406
0
1/10W
15
1
2VCCINT_DH_R4 G
DH
1
C
2
VCCINT
Q3
BST
1
VCC12_VCCINT
FDMS8018
2 PLACES
83W
3
VCCINT_SNS_N
2
2
PG
30
1
Z5
Z4
VCCINT
10.0K
1/10W
1%
32
1
DCRN
VCCINT_PGOOD
R710
1
31
VCCINT_SNS_P
J55
PMBUS_ALERT
PMBUS_SCL
PMBUS_SDA
REMOTE SENSE CONNECTIONS
AT DUT PADS
1
2
2
1UF
16V
X5R
PWR
DNP
1
1
C111
24
3P3
25
3P3
6
1P8
INSNS
2
22
0.15UF
16V
X7R
13
2
2
C636
1
1
1
R90
10
1/10W 2
3
SHEET SIZE: B
SHEET
2
52
OF
VER:
1.0
REV:
01
DRAWN BY:
66
BF
1
4
3
2
1
D
D
VCC12_SW
2
R459
1.00K
1/16W
MAX15303
15
INSNS
3P3
24
PWR
25
PWR
34
PWR
GND
C142
1
1UF
16V
X5R
2
1P8
35
8
C431
10UF
6.3V
VCC12_SW X6S
100K
1/10W
1%
L56
2
PMBUS_ALERT
PMBUS_SCL
PMBUS_SDA
C
11
SALRT
12
SCLK
13
SDAT
LBI
LBO
OUTP
OUTN
C488
2 2
4.7UF
6.3V
X6S
R882
1
GND
1 1
AGND2
DNP
1
33
0.15UF
16V
X7R
2
C385
1
22UF
25V
X7R
2
C233
1
1
REMOTE SENSE CONNECTIONS
AT DUT PADS
2
32
37
VCCAUX_FPGA_SNS_P
36
DCRP
40
MAX15303
INTUNE DIGITAL
POL REGULATOR
2
0.015UF
25V
X5R
1
C386
2
0.01UF
25V
X7R
VCCAUX_FPGA_SNS_N
Z82 2
1
VCCAUX
VCCAUX
8.87K
1/10W
1%
PG
C737
1
GND
1
VCCAUX_FET_SWITCH
Z83 2
2
2
2
1
1
VCCAUX_PGOOD
1
R720
1
DCRN
C
VCCAUX_FPGA
Z41 2
Z40 2
1
Z38 2
VCCAUX_SYSMON_SENSE_P
1
Z39 2
VCCAUX_SYSMON_SENSE_N
AGND2
4
ADDR0
5
ADDR1
6
SET
VCCAUX_TEMPX
R193
5.11K
1/10W
1%
1
2
1
2
R509 1 R203
140K
38.3K Q33
1/10W
1/10W
1%
2
2
1
3
1%
1
C748
2
100PF
50V
X7R
GND
1
J72
DNP
0.005
1W
1%
2
1
B
D26
C202
100UF
6.3V
X6S
2
2
R148
1
2
1
1
0.1UF
25V
X5R
2
R458
1.00K
1/16W
MMSZ4686T1G
3.9V
500MW
GND
GND
DEFAULT = 1.80VDC
9
TEMPX
10
CIO
39
38
18
17
7
1
VCCAUX_FPGA
GND
GDRV
PGND
PGND
PGND
PGND
SGND
SGND
SGND
SGND
DGND
EPAD
31
28
27
22
21
41
1
2
1
C273
2
2.2UF
10V
X6S
VCCAUX 5A Regulator
Z42
3
TQFN_40_EP
U10
AGND2
A
16
1
L11
40V
2A
LXSNS
2
1
1
MBRS240LT3G
PMBUS ADDR
0x0B
EN
29
26
23
20
19
D33
12.7K
1/10W
1%
LX
LX
LX
LX
LX
2
R224
SYNC
2
14
1/16W
3
REG_EN
1.15UH
VCCAUX_FET_SWITCH
2
1
REG_SYNC
B
1
DNP
DNP
DNP
2
BST
VCCAUX
30
R457
1.00K
R370
1
C414
AGND2
AGND2
TITLE: VCCAUX 5A Regulator
SCHEM, ROHS COMPLIANT
HW-U1-KCU105_REV1_0
GND
ASSY P/N:
PCB P/N:
SCH P/N:
TEST P/N:
0431811
1280723
0381556
TSS0165
A
3
PLACE TEMP COMPENSATION TRANSISTOR ON THE BACKSIDE OF THE BOARD DIRECTLY UNDER OUTPUT INDUCTOR
2
CONNECT ACROSS PINS OF OUTPUT INDUCTOR
1
DATE: 11/13/2014:12:00
SHEET SIZE: B
SHEET
MINIMUM 1K LOAD REQUIRED. MUST BE CONNECTED BEFORE SENSE RESISTOR
TO AVOID CONTRIBUTION TO CURRENT MEASUREMENTS.
4
3
2
53
OF
VER:
1.0
REV:
01
DRAWN BY:
66
BF
1
4
3
2
1
D
D
VCC12_SW
2
R432
1.00K
1/16W
MAX15303
15
INSNS
3P3
24
PWR
25
PWR
34
PWR
GND
C122
1
1UF
16V
X5R
2
1P8
35
8
C422
VCC12_SW
100K
1/10W
1%
L47
2
PMBUS_ALERT
PMBUS_SCL
PMBUS_SDA
11
SALRT
12
SCLK
13
SDAT
LBI
LBO
C
OUTP
OUTN
C479
2 2
4.7UF
6.3V
X6S
R876
1
GND
1 1
10UF
6.3V
X6S
AGND4
DNP
1
33
0.15UF
16V
X7R
2
2
1
22UF
25V
X7R
C367
C211
1
1
REMOTE SENSE CONNECTIONS
AT DUT PADS
2
32
VCCBRAM_FPGA
37
VCCBRAM_FPGA_SNS_P
36
DCRP
MAX15303
INTUNE DIGITAL
POL REGULATOR
1
C728
2
0.015UF
25V
X5R
1
C368
2
0.01UF
25V
X7R
1
VCCBRAM_FPGA_SNS_N
Z63 2
1
C
VCCBRAM
VCCBRAM
1
Z64 2
GND
2
VCCBRAM_FET_SWITCH
2
PG
1
40
14.3K
1/10W
1%
2
1
DCRN
VCCBRAM_PGOOD
R711
1
Z12 2
Z11 2
1
1
Z9
2 VCCBRAM_SYSMON_SENSE_P
Z10 2
VCCBRAM_SYSMON_SENSE_N
AGND4
4
ADDR0
5
ADDR1
6
SET
VCCBRAM_TEMPX
R505
9.53K
1/10W
1%
1
2
1
R165 1 R82
2
140K
1/10W
1%
2
12.7K
1/10W
1%
2
1
Q24
3
1
C739
2
100PF
50V
X7R
J57
DNP
0.005
1W
1%
2
1
R141
0.1UF
25V
X5R
2
1
C405
1
2
GND
1
2
1
2
R431
1.00K
1/16W
C171
D18
MMSZ4680T1G
2.2V
500MW
100UF
4V
X6S
B
GND
GND
GND
DEFAULT = 0.95VDC
9
TEMPX
10
CIO
39
38
18
17
7
1
2
16
1
L2
40V
2A
LXSNS
2
1
1
MBRS240LT3G
PMBUS ADDR
0x0F
EN
D27
12.7K
1/10W
1%
LX
LX
LX
LX
LX
R433
1.00K
R213
B
SYNC
VCCBRAM_FPGA
VCCBRAM_FET_SWITCH
2
14
1UH
29
26
23
20
19
2
REG_EN
VCCBRAM
30
1/16W
2
3
1
REG_SYNC
1
BST
1
DNP
DNP
DNP
R361
AGND4
GDRV
PGND
PGND
PGND
PGND
SGND
SGND
SGND
SGND
DGND
EPAD
31
28
27
22
21
41
1
2
1
C255
2
2.2UF
10V
X6S
VCCBRAM 5A Regulator
Z13
3
TQFN_40_EP
U3
AGND4
AGND4
GND
TITLE: VCCBRAM 5A Regulator
SCHEM, ROHS COMPLIANT
HW-U1-KCU105_REV1_0
A
ASSY P/N:
PCB P/N:
SCH P/N:
TEST P/N:
0431811
1280723
0381556
TSS0165
A
3
PLACE TEMP COMPENSATION TRANSISTOR ON THE BACKSIDE OF THE BOARD DIRECTLY UNDER OUTPUT INDUCTOR
2
CONNECT ACROSS PINS OF OUTPUT INDUCTOR
DATE: 11/13/2014:12:00
SHEET SIZE: B
SHEET
1
MINIMUM 1K LOAD REQUIRED. MUST BE CONNECTED BEFORE SENSE RESISTOR
TO AVOID CONTRIBUTION TO CURRENT MEASUREMENTS.
4
3
2
54
OF
VER:
1.0
REV:
01
DRAWN BY:
66
BF
1
4
3
2
1
D
D
VCC12_SW
MAX15303
15
INSNS
3P3
24
PWR
25
PWR
34
PWR
GND
C139
1
1UF
16V
X5R
2
1P8
35
8
C430
10UF
6.3V
VCC12_SW X6S
C
100K
1/10W
1%
L55
2
PMBUS_ALERT
PMBUS_SCL
PMBUS_SDA
11
SALRT
12
SCLK
13
SDAT
LBI
LBO
OUTP
OUTN
C487
2 2
4.7UF
6.3V
X6S
R881
1
GND
1 1
AGND5
DNP
1
33
REMOTE SENSE CONNECTIONS
AT DUT PADS
0.15UF
16V
X7R
2
R455
1.00K
1/16W
C383
1
22UF
25V
X7R
2
C231
2
1
1
2
32
VCC1V8_FPGA
37
VCC1V8_SNS_P
36
PG
DCRP
40
MAX15303
INTUNE DIGITAL
POL REGULATOR
C736
2
0.015UF
25V
X5R
1
C384
2
0.01UF
25V
X7R
1
VCC1V8
VCC1V8
5.9K
1/10W
1%
2
1
VCC1V8_SNS_N
Z80 2
1
Z81 2
GND
2
VCC1V8_FET_SWITCH
2
VCC1V8_PGOOD
1
1
DCRN
R719
1
C
Z36 2
Z35 2
1
1
Z84 2
VCC1V8_SYSMON_SENSE_P
1
Z85 2
VCC1V8_SYSMON_SENSE_N
AGND5
4
ADDR0
5
ADDR1
6
SET
VCC1V8_TEMPX
R222
1
1
12.7K
1/10W
1%
2
2
R508 1 R202
140K
38.3K
Q32
1/10W
1/10W
1%
2
2
1
1%
3
16
C747
2
100PF
50V
X7R
39
38
18
17
7
J71
2
DNP
0.005
1W
1%
1
R836
0.1UF
25V
X5R
2
1
C413
1
2
1
2
1
2
R454
1.00K
1/16W
C199
GND
B
D25
47UF
6.3V
X6S
MMSZ4686T1G
3.9V
500MW
GND
GND
GND
9
TEMPX
10
CIO
1
1
2
LXSNS
1
L10
40V
2A
2
MBRS240LT3G
12.7K
1/10W
1%
1
1
VCC1V8_FPGA
VCC1V8_FET_SWITCH
R456
1.00K
1/16W
PMBUS ADDR
0x11
R223
EN
3.3UH
29
26
23
20
19
D32
14
LX
LX
LX
LX
LX
2
REG_EN
B
SYNC
VCC1V8
30
2
2
3
1
REG_SYNC
1
BST
1
DNP
DNP
DNP
R369
AGND5
GDRV
PGND
PGND
PGND
PGND
SGND
SGND
SGND
SGND
DGND
EPAD
DEFAULT = 1.80VDC
31
28
27
22
21
41
1
2
1
C271
2
2.2UF
10V
X6S
VCC1V8 2A Regulator
Z37
3
TQFN_40_EP
U9
AGND5
AGND5
GND
TITLE: VCC1V8 2A Regulator
SCHEM, ROHS COMPLIANT
HW-U1-KCU105_REV1_0
A
ASSY P/N:
PCB P/N:
SCH P/N:
TEST P/N:
0431811
1280723
0381556
TSS0165
A
3
PLACE TEMP COMPENSATION TRANSISTOR ON THE BACKSIDE OF THE BOARD DIRECTLY UNDER OUTPUT INDUCTOR
2
CONNECT ACROSS PINS OF OUTPUT INDUCTOR
1
DATE: 11/13/2014:12:00
SHEET SIZE: B
SHEET
MINIMUM 1K LOAD REQUIRED. MUST BE CONNECTED BEFORE SENSE RESISTOR
TO AVOID CONTRIBUTION TO CURRENT MEASUREMENTS.
4
3
2
55
OF
VER:
1.0
REV:
01
DRAWN BY:
66
BF
1
4
3
VCC12_SW
UTIL_3V3
2
SN74LVC1G08
1
1/10W
10.0K
R331
5
VCC12_VADJ_1V8
FERRITE-96
1
C640 1
0.1UF
25V
2
UTIL_3V3
L22
1
1
C257
2
2.2UF
25V
X7R
GND
2
UTIL_3V3
2
10A
VCC
4
VADJ_1V8_EN
VCC12_SW
MAX15301
22
C124
PWR
C423
1
1UF
16V
X5R
GND
24
3P3
25
3P3
6
1P8
INSNS
10UF
6.3V
X6S
2
1 1
C480
2 2
4.7UF
6.3V
X6S
C369
GND
AGND6
L48
10UH
9
SALRT
10
SCLK
11
SDAT
LBO
LBI
OUTP
OUTN
1
23
2
C
21
1
PMBUS_ALERT
PMBUS_SCL
PMBUS_SDA
C
REMOTE SENSE CONNECTIONS
AT DUT PADS
VADJ_1V8_FPGA
27
VADJ_1V8_FPGA_SNS_P
26
PG
DCRP
30
DH
DNP
DNP
DNP
R362
MAX15301
INTUNE DIGITAL
POL CONTROLLER
BST
B
2
1
1
REG_SYNC
VADJ_1V8_EN
12
12.7K
1/10W
1%
PMBUS ADDR
0x12
14.7K
1/10W
1%
2
1
2
2
2
0.01UF
25V
X7R
EN
LXSNS
14
2
1
VADJ_DH_R
C406
0.22UF
6.3V
X6S
GND
1
2
R464
2.00K
1/16W
38.3K
1/10WQ25
1%
1
3
1
C740
2
100PF
50V
X7R
7
8
28
29
5
DL
TEMPX
CIO
LCFFP
LCFFN
DGND
19
2
1
5
6
10
7
HSG
GND
GND
GND
LSG
VP
VP
SW
SW
SW
1
1
2
2
33
22UF
25V
X7R
2 PLACES
8
9
2
3
4
VADJ_1V8
2
2200PF
50V
X7R
Z47 2
VADJ_1V8_SYSMON_SENSE_P
1
Z48 2
VADJ_1V8_SYSMON_SENSE_N
2
GND
R434
1.00K
1/16W
1
VADJ_1V8_FPGA
B
D19
C174
100UF
2
6.3V
X6S
MMSZ4686T1G
3.9V
500MW
GND
GND
DEFAULT = 1.80VDC
1
C258
2
2.2UF
10V
X6S
2
Z15
1
1
C454
1
GND
L3
GND
VADJ_DL
1
C215
C216
1UH
Q9
VADJ_1V8_FET_SWITCH
R231
2.2
1/10W
1
18
GDRV
20
PGND
EPAD
GND
2
VADJ_1V8_FET_SWITCH
Z66 2
FDPC8011S
AGND6
2
1
17
16
VADJ_1V8
VCC12_VADJ_1V8
AGND6 R98
10
1/10W
15
1
2
2
LX
R515 1 R199
140K
1/10W
1%
C370
1
1
VAD_1V8_TEMPX
1
1
SYNC
2
ADDR0
4
ADDR1
3
SET
R155
2
0.15UF
16V
X7R
1
VADJ_1V8
1
R214
C729
1.4K
1/10W
1%
32
1
VADJ_1V8_FPGA_SNS_N
Z65 2
2
VADJ_1V8_PGOOD
31
1
DCRN
R712
1
Z16 2
Z14 2
1
J58
13
1
1
2
R463
2.00K
1/16W
2
GND
2
1
DNP
1
R95
10
1/10W 2
1
GND
3 SC70_5
2
U25
Y
0.005
1W
1%
AND
R87
B
1
2
D
GND
2
J14
1
1/16W
1.00K
R435
A
HDR_1X2
2
FMC_VADJ_ON
1
0.15UF
16V
X7R
REG_EN
2
D
VADJ 1V8 10A Regulator
U30
AGND6
GND
3
A
TITLE: VADJ 1V8 10A Regulator
SCHEM, ROHS COMPLIANT
HW-U1-KCU105_REV1_0
AGND6
ASSY P/N:
PCB P/N:
SCH P/N:
TEST P/N:
0431811
1280723
0381556
TSS0165
A
3
PLACE TEMP COMPENSATION TRANSISTOR ON THE BACKSIDE OF THE BOARD DIRECTLY UNDER OUTPUT INDUCTOR
2
CONNECT ACROSS PINS OF OUTPUT INDUCTOR
DATE: 11/13/2014:10:59
SHEET SIZE: B
SHEET
1
MINIMUM 1K LOAD REQUIRED. MUST BE CONNECTED BEFORE SENSE RESISTOR
TO AVOID CONTRIBUTION TO CURRENT MEASUREMENTS.
4
3
2
56
OF
VER:
1.0
REV:
01
DRAWN BY:
66
BF
1
4
3
2
1
D
D
VCC12_SW
2
2
R437
1.00K
1/16W
MAX15303
15
INSNS
3P3
24
PWR
25
PWR
34
PWR
GND
C126
1
1UF
16V
X5R
2
1P8
35
8
C424
VCC12_SW
100K
1/10W
1%
L49
2
11
SALRT
12
SCLK
13
SDAT
LBI
LBO
OUTP
OUTN
2 2
4.7UF
6.3V
X6S
AGND8
DNP
1
33
REMOTE SENSE CONNECTIONS
AT DUT PADS
2
C
32
1
PMBUS_ALERT
PMBUS_SCL
PMBUS_SDA
C
C481
R877
1
GND
1 1
10UF
6.3V
X6S
0.15UF
16V
X7R
1
22UF
25V
X7R
VCC1V2_FPGA
2
C217
C371
1
37
VCC1V2_FPGA_SNS_P
36
PG
DCRP
40
MAX15303
INTUNE DIGITAL
POL REGULATOR
C730
2
0.015UF
25V
X5R
1
C372
2
0.01UF
25V
X7R
VCC1V2_FPGA_SNS_N
Z67 2
1
VCC1V2
VCC1V2
1
GND
2
VCC1V2_FET_SWITCH
Z68 2
2
2
1
4.75K
1/10W
1%
VCC1V2_PGOOD
1
1
DCRN
R713
1
Z18 2
Z17 2
1
1
Z49 2
VCC1V2_SYSMON_SENSE_P
1
Z50 2
VCC1V2_SYSMON_SENSE_N
1
R506 1 R2
21.5K
1/10W
1%
2
2
140K
1/10W
1%
2
26.1K
1/10W
Q26
1%
2
1
3
C741
2
100PF
50V
X7R
39
38
18
17
7
J59
2
DNP
0.005
1W
1%
1
R142
0.1UF
25V
X5R
1
VCC1V2_FPGA
1
1
C180
2
100UF
4V
X6S
B
D20
MMSZ4680T1G
2.2V
500MW
2
2
R436
1.00K
1/16W
1
2
1
L4
40V
2A
1
1
VCC1V2_FET_SWITCH
GND
GND
GND
GND
9
TEMPX
10
CIO
1
DEFAULT = 1.20VDC
GDRV
PGND
PGND
PGND
PGND
SGND
SGND
SGND
SGND
DGND
EPAD
31
28
27
22
21
41
1
2
1
C259
2
2.2UF
10V
X6S
VCC1V2 3A Regulator
Z19
3
TQFN_40_EP
U4
A
16
4
ADDR0
5
ADDR1
6
SET
VCC1V2_TEMPX
1
29
26
23
20
19
MBRS240LT3G
LXSNS
2
AGND8
R166
EN
1
12.7K
1/10W
1%
PMBUS ADDR
0x14
LX
LX
LX
LX
LX
D28
R215
SYNC
2
14
2
3
REG_EN
2.2UH
2
1
2
REG_SYNC
B
1
DNP
DNP
DNP
BST
VCC1V2
30
R438
1.00K
1/16W
R363
1
C407
AGND8
AGND8
AGND8
TITLE: VCC1V2 3A Regulator
SCHEM, ROHS COMPLIANT
HW-U1-KCU105_REV1_0
GND
ASSY P/N:
PCB P/N:
SCH P/N:
TEST P/N:
0431811
1280723
0381556
TSS0165
A
3
PLACE TEMP COMPENSATION TRANSISTOR ON THE BACKSIDE OF THE BOARD DIRECTLY UNDER OUTPUT INDUCTOR
2
CONNECT ACROSS PINS OF OUTPUT INDUCTOR
1
DATE: 11/13/2014:12:00
SHEET SIZE: B
SHEET
MINIMUM 1K LOAD REQUIRED. MUST BE CONNECTED BEFORE SENSE RESISTOR
TO AVOID CONTRIBUTION TO CURRENT MEASUREMENTS.
4
3
2
57
OF
VER:
1.0
REV:
01
DRAWN BY:
66
BF
1
A3_OUT_PS
3.3UH
A3_OUT_NORM
R909 1
29.4K
TS_FAULTB
C1067
DNP
2
R925
DNP
MGTAVCC_PWM2GND
MGTAVCC_ISENSE2
MGTAVCC_TS_FAULTB
30
MGTAVCC_A3_IN
R931
28
29
1
0
2
19
C1086
8200PF
C1066
R918
DNP
2.49K
C1079
100PF
1
2
HPQFN_19_A
GND
C1074
1000PF
VCC12_MGTAVCC
C989 C990
C979
C980
C1048
22UF
0.1UF
0.1UF
1UF
1
1
1
2
2
2
VDD33
MAX20751EKX
MULTIPHASE MASTER
AGND9
GND
PMBUS_ALERT
PMBUS_SCL
PMBUS_SDA
AGND9
ISENSE1
20
R941
3.01K
ISENSE2 21
1
C1003
10UF
ISENSE3 22
13
PMALERTB
12
PMCLOCK
11
PMDATA
MGTAVCC_PGOOD
24
REG_EN
9
ISENSE4 23
1
C1084
2
22PF
50V
C0G, NP0
35
MGTAVCC_FPGA_SNS_N
1
Z92
2
GND
37
1
2
Z86
AGND9
U137
QFN_36_C AGND9
GND
MGTAVCC
1.00K
1/16W
1%
1
EPAD
25
MGTAVCC_FPGA
C1102
0.022UF
80.6
PGND
C1100
1
2.2UF
10V
X6S
2
1
1
C1088
C1094
C1095
C1096
C1090
C1091
1
1
1
1
1
GND
MGTAVCC_SYSMON_SENSE_P
2
DNP
DNP 2
DNP
MGTAVCC_SYSMON_SENSE_N
GND
A
GND
DNP
DNP
DNP
B
DNP
DNP
DNP
DEFAULT = 1.00VDC
1
J61
MGTAVCC 5A Regulator
D34
MMSZ4680T1G
2.2V
TITLE: MGTAVCC 5A Regulator
SCHEM, ROHS COMPLIANT
HW-U1-KCU105_REV1_0
ASSY P/N:
PCB P/N:
SCH P/N:
TEST P/N:
GND
0431811
1280723
0381556
TSS0165
A
DATE: 11/13/2014:12:08
NOTES
SHEET SIZE: B
SHEET
Capacitors should be placed as close as possible to Pin12 and 14
3
2
DNP
DNP 2
DNP
MGTAVCC_FPGA
2
DNP
2
DNP
DNP
DNP
DNP
DNP 2
DNP
2
1
C1076
1
1
R947
10%
2
2
1
L70
1%
1W
0.001
210NH
MGTAVCC_VX2
DNP
DNP 2
DNP
C1103
0.022UF
GND
4
1UF
2
R900
NC 10
NC
7
GND
C1049
MGTAVCC_FPGA
Z93
2
PMBUS ADDR
0x72
1
2
2
MGTAVCC_FPGA_SNS_P
R954
2
2
36
1
AGND9
R935 1
402
2
SPLIT POWER PLANE
REMOTE SENSE CONNECTIONS
AT DUT PADS
1
2
R939
22.1K
1/10W2
1%
R907 1
576
1
2
C
1.00K
1/16W
1%
20.0K
0.5%
R932
1
0
1
2
MGTAVCC_ISENSE2
R955
1
R921 1
SENSE_N
1
2
2
VR_ON
SENSE_P
1
2
GND
PWRGD
R_REF
MRAMP
R_SEL0
R_SEL1
R_SEL2
R_SEL3
1
2 2
R913
499
GND
1
2
3
4
5
6
1 1
MGTAVCC_A3_IN
1
2
27
C1078
100PF
1C995
47UF
2
25V
47UF
25V
2 2
1UF
C996
MGTAVCC_PWM2
R902
0.1UF
18
PWM1
17
PWM2
16
PWM3
15
PWM4
10
1/10W
1%
VIN_UV
1 1
2
14
UTIL_3V3 C981 C1050
10
1/10W
1%
2
1
22UF
2
1
2
D
2
3
4
5
MGTAVCC_TS_FAULTB
R903
MGTAVCC_VIN_UV
B
U135
C1072
0.22UF
16V
2
10
VSS
VSS
VSS
VSS
13
PWM
15
ISENSE
16
TS_FAULTB
R945 1
4.7
2
MGTAVCC_VX2
1
BST
2
31
6
7
8
9
VX
VX
VX
VX
GND
R911 1
2.15K
1
VDDH
VDD
VCC
AGND
GND
GND
GND
R943
604
2
C
DNP
1
C983
0.1UF
2
1
12
11
14
17
18
19
2
1
GND
1
1
2
C1009 1
0.022UF
2
2
R940
680
1
1
C1060
1UF
2
2
R926
DNP
1
2
2
2
1
A3_IN
PVX
2
1
26
2.2UF
25V
X7R
R901
10
10A
2
L68
GND
1
32
1
A2B_OUT
2
A2_OUT
1
2
2
2
VCC12_SW
1
R937
332
2
VCC12_MGTAVCC
VT1697SBFQX
C1007
33
1
2
A2_IN
VCC12_MGTAVCC
MGTAVCC_SLAVE_1V8
2
2
1
34
2
1
1
R916
4.99
1
A1_OUT
VDD
R897
1
174
1
8
1
1
0.1UF
1
2
1
22UF
2
1
1UF
MAX20751EKX
C1051 C982
2
1UF
L64
1
1
C1053
MGTAVCC_VDD_MASTER
1UF
D
VCC12_SW
FERRITE-96
MGTAVCC_SLAVE_1V8
C1052C991
2
C1083
220PF
3
R920
220
1/10W
1%
4
2
58
OF
VER:
1.0
REV:
01
DRAWN BY:
66
BF
1
A3_OUT_PS
3.3UH
A3_OUT_NORM
R910 1
29.4K
TS_FAULTB
C1071
DNP
2
R929
DNP
VDDH
VDD
VCC
AGND
GND
GND
GND
MGTAVTT_PWM2GND
MGTAVTT_ISENSE2
MGTAVTT_TS_FAULTB
30
MGTAVTT_A3_IN
R933
28
29
1
0
2
19
C1087
8200PF
C1070
R919
DNP
2.49K
C1081
100PF
1
2
C1073
0.22UF
16V
U136
D
2
10
2
3
4
5
VSS
VSS
VSS
VSS
13
PWM
15
ISENSE
16
TS_FAULTB
R946 1
4.7
2
MGTAVTT_VX2
1
BST
2
31
6
7
8
9
VX
VX
VX
VX
R944
604
HPQFN_19_A
GND
C1075
1000PF
MGTAVTT_TS_FAULTB
VCC12_MGTAVTT
2
C992 C993
C984
C985
C1054
22UF
0.1UF
0.1UF
1UF
22UF
GND
MGTAVTT_VIN_UV
1
2
2
14
VIN_UV
UTIL_3V3 C986 C1056
0.1UF
1UF
27
C1080
100PF
1
1
1
2
2
2
VDD33
MAX20751EKX
MULTIPHASE MASTER
GND
20
R942
3.01K
1
MGTAVTT_PGOOD
24
REG_EN
9
1C997
47UF
2
25V
1 1
1
1
1
1
1
2 2
2
2
2
2
2
C1055
1UF
MGTAVTT_A3_IN
ISENSE3 22
13
PMALERTB
12
PMCLOCK
11
PMDATA
47UF
25V
1
ISENSE2 21
C1004
10UF
C998
MGTAVTT_PWM2
AGND10
ISENSE1
AGND10
PMBUS_ALERT
PMBUS_SCL
PMBUS_SDA
18
PWM1
17
PWM2
16
PWM3
15
PWM4
ISENSE4 23
R914
499
GND
2
C
MGTAVTT_ISENSE2
2
R912 1
2.15K
C
DNP
1
C988
0.1UF
2
1
12
11
14
17
18
19
2
1
GND
1
1
2
C1010 1
0.022UF
2
2
R936
820
1
1
C1061
1UF
2
2
R930
DNP
1
2
2
2
1
A3_IN
PVX
2
1
26
2.2UF
25V
X7R
R904
10
10A
2
L69
GND
1
32
1
A2B_OUT
2
A2_OUT
1
2
2
2
VCC12_SW
1
R938
332
2
VCC12_MGTAVTT
VT1697SBFQX
C1008
33
1
2
A2_IN
VCC12_MGTAVTT
MGTAVTT_SLAVE_1V8
2
2
1
34
2
1
1
R917
4.99
1
A1_OUT
VDD
R898
1
174
1
8
1
1
0.1UF
1
2
1
22UF
2
1
1UF
MAX20751EKX
C1057 C987
2
1UF
L65
1
1
C1059
MGTAVTT_VDD_MASTER
1UF
D
VCC12_SW
FERRITE-96
MGTAVTT_SLAVE_1V8
C1058C994
2
C1082
100PF
3
R899
82.5
1/10W
1%
4
1
C1085
2
22PF
50V
C0G, NP0
SPLIT POWER PLANE
REMOTE SENSE CONNECTIONS
AT DUT PADS
PWRGD
AGND10
PMBUS ADDR
0x73
2 2
10
1/10W
1%
1 1
2
Z95
MGTAVTT_FPGA
MGTAVTT_FPGA
C1104
0.022UF
EPAD
37
1
2
Z87
U138
QFN_36_C AGND10
GND
MGTAVTT
1.00K
1/16W
1%
PGND
NC 10
NC
7
GND
25
2
GND
1
R949
1.02K
1/16W
1%
AGND10
2
10
1/10W
1%
1
R906
MGTAVTT_FPGA_SNS_N
2
2
R908 1
576
1/10W
1% 2
35
Z94
2
2
R950 1
1.02K
1/16W
2
1%
1
R956
2
R915
24.9K
1/10W2
1%
MGTAVTT_FPGA_SNS_P
1
20.0K
0.5%
SENSE_N
36
1
R922 1
SENSE_P
1.00K
1/16W
1%
1
B
R934
1
0
R_REF
MRAMP
R_SEL0
R_SEL1
R_SEL2
R_SEL3
R957
1
1
2
3
4
5
6
R905
GND
VR_ON
GND
MGTAVTT_SYSMON_SENSE_P
C1101
2
MGTAVTT_SYSMON_SENSE_N
1
A
GND
DNP
DNP 2
DNP
DNP
DNP 2
DNP
DNP
DNP
DNP
2
GND
DEFAULT = 1.20VDC
1
J62
MGTAVTT 5A Regulator
D35
MMSZ4680T1G
2.2V
TITLE: MGTAVTT 5A Regulator
SCHEM, ROHS COMPLIANT
HW-U1-KCU105_REV1_0
ASSY P/N:
PCB P/N:
SCH P/N:
TEST P/N:
GND
SHEET SIZE: B
SHEET
Capacitors should be placed as close as possible to Pin12 and 14
3
0431811
1280723
0381556
TSS0165
A
NOTES
4
B
DNP
DNP
DNP
C1105
0.022UF
DATE: 11/13/2014:12:08
1
DNP
DNP 2
DNP
MGTAVTT_FPGA
2
DNP
2
DNP
DNP
DNP
2
DNP
DNP 2
DNP
2
1
C1077
1
1
R948
10%
2
2
1
L71
1%
1W
0.001
210NH
C1089
C1097
C1098
C1099
C1092
C1093
1
1
1
1
1
1
2.2UF
10V
X6S
GND
MGTAVTT_VX2
1
2
59
OF
VER:
1.0
REV:
01
DRAWN BY:
66
BF
1
4
3
2
1
1
UTIL_3V3
J63
D
DNP
D
MGTVCCAUX
MAX8869EUE18
1
C1047
2
1UF
25V
X5R
C
GND
2 IN1
OUT4 15
3 IN2
OUT3 14
4 IN3
OUT2 13
5 IN4
OUT1
7 SHDN_B
1
C1063
2
DNP
DNP
DNP
8 SS
10
GND
17
PAD
U134
NC1 1 NC
9
NC
NC2
NC3 16 NC
TSSOP_16_EP
PLACE NEAR U1 FPGA
C1002
10UF
6.3V
X6S
C
GND
MGTVCCAUX_PGOOD
1
R952
2
10.2K
1/10W
1%
1
R951
2
8.06K
1/10W
1%
Pin 1 of 10.2K resistor must
be routed as a sense line directly
to a U1 power pin
SET 11
GND
B
2
12
RST_B 6
MGTAVTT_PGOOD
1
GND
B
DEFAULT = 1.80VDC
MGTVCCAUX 1A Regulator
TITLE: MGTVCCAUX 1A Regulator
SCHEM, ROHS COMPLIANT
HW-U1-KCU105_REV1_0
A
ASSY P/N:
PCB P/N:
SCH P/N:
TEST P/N:
0431811
1280723
0381556
TSS0165
A
DATE: 11/13/2014:12:00
SHEET SIZE: B
SHEET
4
3
2
60
OF
VER:
1.0
REV:
01
DRAWN BY:
66
BF
1
4
3
VCC12_SW
2
L28
1
VCC12_UTIL_3V3
D
VCC12_SW
C269
1
2.2UF
25V
X7R
2
2
1
FERRITE-96
10A
D
GND
R465
2.00K
1/16W
MAX15301
C429
10UF
6.3V
X6S
1 1
C486
2 2
4.7UF
6.3V
X6S
GND
AGND12
L54
10UH
LBI
C
OUTP
OUTN
DCRN
VCC12_SW
UTIL_3V3_PGOOD
1
R333
2
4.7K
1/10W
5%
1
R756
2
1.78K
1/10W
1%
32
PG
DCRP
DNP
R368
DH
BST
2
1
1
12
12.7K
1/10W
1%
PMBUS ADDR
0x1B
2
2
140K
1/10W
1%
UTIL_3V3_SNS_N
1
31
30
1
C735
2
0.15UF
16V
X7R
1
C382
2
0.01UF
25V
X7R
15
1
LX
UTIL_3V3_DH_R
C412
0.22UF
6.3V
X6S
LXSNS
14
2
1
R387
2
51.1K
1/10W
Q31
1%
2
1
3
1
Z79 2
1
R466
2.00K
1/16W
1
C746
2
100PF
50V
X7R
7
8
28
29
5
DL
TEMPX
CIO
LCFFP
LCFFN
DGND
19
2
GND
UTIL_3V3_FET_SWITCH
1
5
6
10
7
HSG
GND
GND
GND
LSG
VP
VP
SW
SW
SW
8
9
2
3
4
1
1
2
2
C229
C230
DEFAULT = 3.30VDC
22UF
25V
X7R
2 PLACES
GND
1UH
UTIL_3V3_DL
33
1
L9
1
1
C455
2
1000PF
50V
X7R
UTIL_3V3
UTIL_3V3_FET_SWITCH
R232
2.2
1/10W
1
B
C194
100UF
2
6.3V
X6S
R451
1.00K
1/16W 2
GND
1
GND
GND
18
GDRV
20
PGND
EPAD
C
UTIL_3V3
GND
2
AGND12
1
Z78 2
Q10
FDPC8011S
17
16
1
Z33 2
Z34 2
VCC12_UTIL_3V3
2
2
1
UTIL_3V3_TEMPX
R516
26
1
2
ADDR0
4
ADDR1
3
SET
1
1
1
R220
B
1
UTIL_3V3_SNS_P
SYNC
EN
UTIL_3V3
27
R110
AGND12 10
1/10W
REG_SYNC
68.1K
1/10W
1%
2
21
MAX15301
INTUNE DIGITAL
POL CONTROLLER
GND
R225
1
23
J64
LBO
DNP
9
SALRT
10
SCLK
11
SDAT
1
PMBUS_ALERT
PMBUS_SCL
PMBUS_SDA
REMOTE SENSE CONNECTIONS
AT DUT PADS
2
2
0.15UF
16V
X7R
1UF
16V
X5R
PWR
2
1
2
C136
24
3P3
25
3P3
6
1P8
INSNS
C381
22
1
13
1.4K
1/10W
1%
2
R718
1
1
1
R109
10
1/10W 2
1
C270
2
2.2UF
10V
X6S
2
Z32
UTIL_3V3 10A Regulator
U31
AGND12
GND
3
AGND12
TITLE: UTIL_3V3 10A Regulator
SCHEM, ROHS COMPLIANT
HW-U1-KCU105_REV1_0
A
ASSY P/N:
PCB P/N:
SCH P/N:
TEST P/N:
0431811
1280723
0381556
TSS0165
A
3
PLACE TEMP COMPENSATION TRANSISTOR ON THE BACKSIDE OF THE BOARD DIRECTLY UNDER OUTPUT INDUCTOR
2
CONNECT ACROSS PINS OF OUTPUT INDUCTOR
1
DATE: 11/13/2014:10:59
SHEET SIZE: B
SHEET
MINIMUM 1K LOAD REQUIRED. MUST BE CONNECTED BEFORE SENSE RESISTOR
TO AVOID CONTRIBUTION TO CURRENT MEASUREMENTS.
4
3
2
61
OF
VER:
1.0
REV:
01
DRAWN BY:
66
BF
1
4
3
2
1
D
D
22UH
LX
L59
C536 1
4.7UF
25V
2
1
2
SYS_5V0
R550
2.00K
1/16W
1
2
SYS_5V0
10
1
VIN
1A
R542
487K
1/10W
2
2
C
1
MAX17502_5V0
J77
VCC12_SW
DNP
5.0V @ 1A
20%
1
C537
2
10UF
25V
X5R
GND
3
EN_UVLO
FB_VO
2
C
Q22
GND
2
DS40
1
3
R546
10.0K
1/10W 2
BSS138
2
1
VCC12_SW
1
1
GND
SYS_5V0
POWER
5
360MW
GND
R544
90.9K
1/10W
RESET_B
NC
7
NC
4
VCC
6
SS
C534
1 1
C539
1UF
16V
2 2
3300PF
50V
X7R
8
NC
1
PGND
9
GND
11
EPAD
TDFN_10
U82
GND
GND
B
B
SYS_5V0 Regulator
TITLE: SYS_5V0 Regulator
SCHEM, ROHS COMPLIANT
HW-U1-KCU105_REV1_0
A
ASSY P/N:
PCB P/N:
SCH P/N:
TEST P/N:
0431811
1280723
0381556
TSS0165
A
DATE: 11/13/2014:10:59
SHEET SIZE: B
SHEET
4
3
2
62
OF
VER:
1.0
REV:
01
DRAWN BY:
66
BF
1
4
3
2
1
1
UTIL_3V3
MAX15053
C8661
2
22UF
25V 2
X5R
10.0K
1/10W
L63
1/10W
1%
2
SYS_1V0_PGOOD
NC
SYS_1V0_POR_B
20%
C879
560PF
50V
FB C1
C3 PGOOD
GND
2
1
LX A2
C8641 R823 1 R828
20K
0.1UF
25V 2
B2 SKIP
D
SYS_1V0
1.2UH 2.6A
A3 IN
1
J86
DNP
1.0V @ 2A
D
1
2
1
2
R814
2.67K
1/10W
1
C865
1
1
2
0.1UF
25V
2
2
COMP B1
SS_REFIN C2
B3 EN
1
GND A1
U124
WLP_9
1
C872
2
0.01UF
25V
X7R
1
R813
3.65K
1/10W
2
1
C878
2
5600PF
50V
2
C868
C867
47UF
25V
2 PLACES
R805
4.02K
1/10W
GND
GND
R830
2.00K
1/16W
1
2
GND
UTIL_3V3
GND
C905
DS46
1
2
C
1.8V @ 1A
2
1
UTIL_3V3
SYS_1V0_PGOOD1
Q36
BSS138
SYS_1V8
2
360MW
MAX15027
GND
3.3V Bulk
VCC12_SW
3
1
J70
100UF
6.3V
X6S
DNP
C
SYS_1V0
POWER
C874
1
1 IN
OUT 10
1UF
16V
2
2 IN
OUT 9
SYS_1V8
1
3 IN
2
GND
R824
10.0K
1/10W
1
R832
26.1K
1/10W
1
C876
2
4.7UF
25V
X5R
5 EN
EP 11
4 IC
GND 8
U125
1
C862
2
0.1UF
25V
2
R821
Q5
2
10.0K
1/10W
360MW
R468
2.00K
1/16W
1
2
GND
GND
SYS_2V5
POWER
DS27
1
2
1
GND
B
2
BSS138
GND
SYS_2V5
TDFN_10_3X3_EP
DS28
1
3
R334
10.0K
1/10W 2
1
1
SS 6
SYS_1V8_POR_B
GND
SYS_1V8
POWER
1
FB 7
2
R467
2.00K
1/16W
1
2
3
R335
10.0K
1/10W 2
GND
B
1
Q6
BSS138
2
1
UTIL_3V3
J67
DNP
2.5V @ 1A
SYS_2V5
360MW
GND
MAX15027
C875
1
1 IN
OUT 10
1UF
16V
2
2 IN
OUT 9
1
R829
1
C877
2
40.2K
1/10W
1%
2
4.7UF
25V
X5R
R822
GND
3 IN
GND
R825
10.0K
1/10W
1
FB 7
SYS_2V5_POR_B
5 EN
EP 11
4 IC
GND 8
U126
A
1
SS 6
2
TDFN_10_3X3_EP
1
C863
2
0.1UF
25V
2
SYS_2V5 SYS_1V8 SYS_1V0 Regulators
10.0K
1/10W
GND
TITLE: SYS_2V5 SYS_1V8 SYS_1V0 Regulators
SCHEM, ROHS COMPLIANT
HW-U1-KCU105_REV1_0
GND
ASSY P/N:
PCB P/N:
SCH P/N:
TEST P/N:
GND
A
DATE: 11/13/2014:12:08
SHEET SIZE: B
SHEET
4
3
0431811
1280723
0381556
TSS0165
2
63
OF
VER:
1.0
REV:
01
DRAWN BY:
66
BF
1