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Sem título-1

Instituto Federal de Santa Catarina
Campus Joinville
Curso Tecnólogo em Mecatrônica Industrial
Samuel Filipe Carstens
Tiago Alexandre Carstens
Makson Vieira
Relatório de Desenvolvimento
Projeto de Fonte Simétrica Ajustável
Projeto de Gerador de Sinal PWM
Projeto de Aquisição de dados
Joinville - SC
Julho de 2010
______________________________________________________________________________________
Sumário:
1. Introdução.............................................................................................................................................3
2. Fonte Simétrica Ajustável.....................................................................................................................4
2.1. Diagrama de Blocos......................................................................................................................4
2.1.1. 1º Rede.................................................................................................................................4
2.1.2. 2º Transformador.................................................................................................................4
2.1.3. 3º Ponte Retificadora...........................................................................................................4
2.1.4. 4º Filtro Capacitivo...............................................................................................................6
2.1.5. 5º Regulador de Tensão.......................................................................................................6
2.1.6. 6º Saída................................................................................................................................7
2.1.7. Dimensionamento dos Componentes..................................................................................7
2.1.7.1. Fórmulas....................................................................................................................7
2.1.7.2. Cálculos......................................................................................................................7
2.2. Esquema eletrônico da fonte........................................................................................................8
2.3. Layout da placa da fonte simétrica ajustável...............................................................................9
3. Gerador de Sinal PWM........................................................................................................................10
3.1. Diagrama de Blocos....................................................................................................................10
3.1.1. 1º Gerador Dente de Serra 555..........................................................................................10
3.1.1.1. Componentes Utilizados..........................................................................................11
3.1.1.2. Cálculos....................................................................................................................11
3.1.1.3. Forma de onda Scope1.............................................................................................12
3.1.2. 2º Offset Negativo..............................................................................................................12
3.1.2.1. Forma de onda sobre Pot2.......................................................................................13
3.1.3. 3º Buffer.............................................................................................................................13
3.1.3.1. Fórmulas para o Buffer.............................................................................................14
3.1.3.2. Formas de onda pós-buffer......................................................................................14
3.1.4. 4º Amplificador Somador...................................................................................................15
3.1.4.1. Formas de onda na entrada e saida do amplificador somador................................16
3.1.4.2. Cálculos para Amplificação.......................................................................................17
3.1.5. 5º Ajuste PWM...................................................................................................................17
3.1.6. 6º Comparador...................................................................................................................18
3.1.7. 7º Saída PWM.....................................................................................................................18
3.2. Esquema eletrônico do gerador de sinal PWM...........................................................................19
3.3. Layout da placa do gerador de sinal PWM .................................................................................20
4. Placa de Conexões...............................................................................................................................21
4.2. Esquema Eletrônico da placa de conexões.................................................................................22
4.3. Layout da placa de conexões......................................................................................................23
5. Ponte – H.............................................................................................................................................24
5.2. Esquema eletrônico da ponte-H.................................................................................................25
5.3. Layout da placa ponte-H.............................................................................................................26
6. Leitura do Encoder, placa Contadores.................................................................................................27
6.2. Esquema eletrônico da placa Contadores...................................................................................28
6.3. Layout da placa Contadores........................................................................................................29
7. Placa Decodificadora/Displays............................................................................................................30
7.2. Esquema eletrônico da placa Decodificadora/Displays..............................................................30
7.3. Layout da placa Decodificadora/Displays...................................................................................31
8. Conclusão............................................................................................................................................32
1
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9. Imagens do desenvolvimento do projeto............................................................................................33
10. Datasheets dos componentes utilizados (bibliografia).......................................................................44
10.1. Datasheet Diodo 1N4007
10.2. Datasheet Diodo 1N5408
10.3. Datasheet Diodo Zener BZX55C3V3
10.4. Datasheet LM317
10.8. Datasheet L7805
10.9. Datasheet Transistor BC548
10.10.
Datasheet Transistor Darlington TIP122
10.11.
Datasheet Transistor Darlington TIP125
10.12.
Datasheet Circuito Integrado DM74LS14
10.13.
10.14.
10.15.
Datasheet Display 7 segmentos 1 dígito
10.16.
Datasheet Display 7 segmentos 2 dígitos
10.17.
Datasheet Motor AK280 5R-193
Todos os datasheets foram retirados do site: WWW.datasheetcatalog.com
Com exceção dos displays, que foram retirados diretamente do site do fabricante: WWW.sunled.com
E do motor, que foi retirado do site do revendedor: www.akiyama.com.br/site/
2
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1. Introdução:
Foi proposto o desenvolvimento de uma mesa de posicionamento, movimentada através de um motor
de corrente contínua, com velocidade ajustável, e também um circuito digital que contasse o
deslocamento da mesa, através da contagem do número de voltas efetuadas pelo motor.
Na estrutura mecânica foram utilizados perfis de alumínio extrudado, pela praticidade de montagem e
grande flexibilidade e precisão. Foi acoplado ao motor um fuso (barra roscada M6), pois o passo por
volta é de 1mm. As guias lineares nas laterais da estrutura que sustentam a mesa são de aço inoxidável
trefilado de Ø8mm, dispensando assim a usinagem, pois tem um ótimo acabamento externo. As bases
das guias e da mesa bem como do fuso são todas feitas de nylon, pela facilidade de usinagem e
confecção das mesmas.
Desenvolvemos uma fonte simétrica ajustável, com capacidade para suportar até 1,5 ampères com
uma tensão ajustável entre 1,25V e 16V. A mesma alimentará toda parte eletrônica-analógica, isto
inclui, geração de sinal PWM, conexões (chaves fim-de-curso), ponte-H e motor. A fonte simétrica é
ajustada para fornecer +12V, -12V e GND. O sinal PWM é baseado no circuito integrado LM555, onde é
gerado uma onda dente de serra e posteriormente é ajustado conforme a necessidade através de
amplificadores operacionais LM324.
A ponte-H tem a tarefa de fazer o chaveamento do motor, conforme o sinal PWM que é direcionado
através da placa conexões, que recebe os sinais de todas as chaves.
Quanto à parte eletrônica-digital, tínhamos o objetivo de fazer um contador up/down, que mostraria a
posição da mesa em um display, sendo que para um lado seria uma contagem crescente, e para o outro
lado decrescente, resultando assim na variação do deslocamento da mesa, no caso ∆x. Devido ao fato
do contador 74LS193 ser hexadecimal e não possuir reset interno decimal, ou seja, de 0 para 9 tanto
como de 9 para 0, tornaria o desenvolvimento mais elaborado, e devido a um curto prazo, optamos por
fazer um contador crescente utilizando o contador 74LS90 com botão de reset externo.
3
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2. Fonte Simétrica Ajustável:
2.1. Diagrama de blocos:
2.1.1. 1º Rede:
Tensão fornecida pela concessionária local (celesc): Vef = 220V f=60Hz
2.1.2. 2º Transformador:
Tem a função de reduzir a amplitude da tensão de 220Vef para 15Vef.
Características do transformador: 220V / 15V + 15V X 1A
2.1.3. 3º Ponte Retificadora:
A ponte retificadora tem como função transformar a tensão alternada em tensão contínua, tendo um
potencial positivo e um potencial negativo a uma mesma referencia (Terra).
Semi-ciclo positivo: D2 conduz para referência positiva, enquanto D3 conduz para referência negativa.
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Semi-ciclo negativo: D1 conduz para referência positiva, enquanto D4 conduz para referência negativa.
Formas de onda (referência positiva) sem filtro capacitivo:
Obs¹.: O Mesmo se aplica à referência negativa, porém com os gráficos invertidos.
Obs².: Considerando diodos ideais, e desconsiderando a queda de tensão ≈ 0,7V em cada diodo.
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2.1.4. 4º Filtro Capacitivo:
Sua função é atenuar a variação da tensão de ripple. A tensão de ripple varia conforme a carga.
Forma de onda (referência positiva):
Obs¹.: O Mesmo se aplica à referência negativa, porém com o gráfico invertido.
Obs².: Considerando diodos ideais, e desconsiderando a queda de tensão ≈ 0,7V em cada diodo.
2.1.5. 5º Regulador de Tensão Ajustável:
Tem como objetivo ceifar a tensão de ripple, para uma tensão menor que Vmin, esta pode ser ajustada
por POT1 para referência positiva, e POT2 para referência negativa.
C3, C4, C5, C6, C7 e C8 são capacitores de filtros recomendados pelo fabricante dos reguladores LM-317
e LM-337.
Formulas para o cálculo da tensão de saída dos reguladores:
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2.1.6. 6º Saída:
Formas de onda na saída da fonte:
A saída será um sinal DC limpo, com sua amplitude ajustada pelos potenciômetros POT1 e POT2.
Obs.: O Mesmo se aplica à referência negativa, porém com o gráfico invertido.
2.1.7. Dimensionamento dos Componentes:
2.1.7.1. Fórmulas:
. . 2
2
2
2.1.7.2. Cálculos:
Transformador:
220V / 15V + 15V x 1A ~ 60Hz
15. √2
21,21
21,21 0,7
20,51
ã 17
á 16Ω
20,51 17
3,51
3,51
21,21 2
19,455
120&' (2 )
19,455
120.16.3,51
2880+,
-. -
/. 3300+,
Recalculando a partir do capacitor adotado:
19,455
120.16.3300+
3,07
20,51 3,07
17,44
20,51 17,44
2
18.975
0 1
0.ê- 3í 51.á6
71,25
0 1
(18,975 1,25). 1
0 1
17,7258 (9Á;<9=)
3í á 51.á6
16
0 1
(18,975 16). 1
0 1
2,9758 (9Í?<9=)
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2.2. Esquema Eletrônico da Fonte:
8
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2.3. Layout da Fonte
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3. Gerador de Sinal PWM:
3.1. Diagrama de Blocos:
3.1.1. 1º Gerador Dente de Serra 555:
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Ra, Rb e C controlam a freqüência e o período alto e período baixo, de acordo com as fórmulas:
& 0,693. ( 2. @). 1,44
( 2. @). 1
Onde:
0 BC
& 0,693. ( @). & 0í /
. BC
0,693. @. 0í D BC
A
@
2@
,E1ê- BF'C
A A1.G -
3.1.1.1. Componentes Utilizados:
18HΩ
@ 330Ω
1+,
3.1.1.2. Cálculos:
0,693. (18I 2.330). 1+
12,93138
& 0,693. (18H 330). 1+
& 12,70269
0,693.330.1+
0,22869
1
12,93138
77,33F'
330
18I 2.330
A 0,017
A
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3.1.1.3. Forma de onda Scope1:
Vemos que na saída do gerador temos uma freqüência diferente dos cálculos, devido a variação dos valores
dos componentes utilizados.
Podem-se notar também os valores de tensão 8 e 3,92.
3.1.2. 2º Offset-Negativo:
Até então, obtemos uma onda dente de serra com um offset de ≈ 4V. Para podermos utilizá-la, devemos
tirar esse deslocamento do ponto zero, somando essa onda com um sinal DC ≈ -4V. Para obtermos esta
tensão, fizemos um divisor de tensão negativo, com um resistor 4 10HΩ e com um trimpot 0.2 100HΩ. Como mostra o circuito abaixo:
. 4
12. 0.2
10H 0.2
0.2 2,5HΩ
4 Pot2 deve ser ajustado em 2,5KΩ para obter
uma tensão = -4V sobre ele.
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3.1.2.1. Forma de onda sobre Pot2:
Devido à imprecisão no momento do ajuste do trimpot Pot2, não foi possível obter -4V preciso, porém não
afetará a sequencia do ajuste da onda.
3.1.3. 3º BUFFER:
O Buffer tem como função isolar os circuitos anteriores e posteriores a ele.
Exemplos de buffers utilizados:
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3.1.3.1. Fórmulas para o Buffer:
0
1
0 1
0
1
1
3.1.3.2. Formas de onda pós-buffer:
Scope2
Scope3
Scope6
Na figura Scope3, notamos um certo ruído no sinal vindo do divisor de tensão negativo, o qual não ocorria
antes do buffer. Este ruído foi percebido na montagem em protoboard, a princípio foi constatado que
poderia ser ruido do protoboard, já que este ruido não ocorria antes do buffer, o circuito integrado estava
100% e adicionando capacitores o ruído persistia. Mesmo após a confecção da PCI, notamos que ainda havia
o ruído, porém analisamos que ele não influencia no sinal PWM de saída, portanto não foi preciso eliminá-lo.
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3.1.4. 4º Amplificador Somador:
Nesta etapa, as tensões em R1 e R2 são somadas entre sí, retirando o offset da onda Dente de Serra
formada pelo 555, conforme Figura 3. Porém o resultado dessa soma, é uma onda com amplitude de 1,66V,
que é muito baixa, e se fosse aplicada diretamente no comparador, o sinal PWM de saída não teria um ajuste
fino. Portanto é necessário amplificar esse sinal o máximo possível, no caso = +Vcc, ou seja 12V.
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3.1.4.1. Formas de onda na entrada e saida do amplificador somador:
Figura 1
Figura 2
Figura 3
As figuras anteriores mostram a soma do sinal Dente de Serra do 555 (pós-buffer) e do Offset negativo (pósbuffer). Agora precisamos amplificar o sinal, para obtermos um ajuste fino no comparador.
Figura 3 (entrada do amplificador)
Figura 4 (saída do amplificador)
16
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3.1.4.2. Cálculos para Amplificação:
Com base nos cálculos, obtivemos um pico de onda = 17,6V. Como a alimentação dos amplificadores é de
+12V e -12V, não é possível obter tal amplitude. Com o auxílio do osciloscópio digital, verificamos que a
amplitude máxima possível, sem saturar a onda foi de 10,4V, fazendo o ajuste no Trimpot (Pot1).
J1 K
0.1 1 2
LM .
3
2
Equação do amplificador.
Amplificação máxima, considerando:
0.1 100HΩ (á)
3 10HΩ
1 8 (-)
2 4,8
Amplificação máxima possível:
10,4
3 10HΩ
1 8(-)
2 4,8
100H
8 4,8
L.
10H
2
3,2
11 .
2
17,6
0.1 8 4,8
L.
10H
2
0.1
10,4 1,6 1,6.
10H
10,4 1,6
0.1 . 10H
1,6
0.1 55HΩ
K1 10,4 K1 3.1.5. 5º Ajuste PWM:
É nesta etapa que é feito o ajuste da freqüência do sinal PWM. Novamente é usado um divisor de tensão e
um buffer em seguida, como mostra a figura abaixo.
17
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3.1.6. 6º Comparador:
Parâmetros do comparador:
Se N então 1. -Se O então 1. -Como o sinal de saída deve partir de 0V (GND) até 12V, com forma de onda quadrada, o circuito integrado
no qual foi usado o ampop para fazer o comparador teve de ser alimentado da seguinte maneira:
-- 12 e – -- Q?A.
Na entrada negativa (V-), o sinal vem do amplificador, e na entrada positiva (V+), o sinal vem do ajuste
PWM.
Se a tensão sobre Pot3 for ≥ 10,4V não haverá ajuste, pois a saída será +Vcc, pois V+ será maior que V-.
Sendo assim, concluímos que para haver ajuste na saída PWM, a tensão sobre Pot3 deve variar entre 0V e
10,4V. Com essa informação podemos calcular a resistência máxima do Trimpot (Pot3) para o ajuste.
Cálculo do divisor de tensão (ajuste PWM) para máxima resistência no Pot3:
1. . 0.3
5 0.3
-- 12
10,4 1. 10,4
12. 0.3
10H. 0.3
104H 10,40.3 120.3 0
5 10HΩ
0.3 65HΩ
3.1.7. 7º Saída PWM:
Feito todos os ajustes, obtivemos a seguinte saída:
Saída PWM.
Antes de ir para a Ponte-H, o sinal PWM passa pela placa “Conexões”, que dará o sentido de giro do
motor, a partir de uma chave.
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3.2. Esquema eletrônico do gerador de sinal PWM:
19
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3.3 Layout da placa do gerador de Sinal PWM:
20
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4. Placa Conexões
Sua função é direcionar o sinal PWM para a Ponte-H, conforme selecionado na Chave Direção, e inibir o
pulso para uma direção na qual a chave Fim-de-curso estiver acionada. Desta placa, também saem os
leds de indicação do fim de curso.
O Sinal entra pelo conector CN2 passa por uma chave On/Off através do conector CN3, em seguida
entra no comum da chave de direção no conector CN4, que por sua vez fará o direcionamento do sinal
PWM para esquerda ou direita. O terminal NF das chaves fim-de-curso estão ligadas Vcc, e o terminal
NA no GND. Q1 ou Q2 chaveiam conforme o sinal PWM que entra em suas bases se a chave fim-decurso não estiver acionada, ou seja, C
NF
Vcc, lembrando que os coletores de Q1 e Q2 estão
ligados aos comuns de suas respectivas chaves fim-de-curso. Em contra partida se a chave estiver
pressionada, ira conectar o coletor ao GND inibindo o chaveamento do transistor, e juntamente ligando
o led de sinalização de fim-de-curso.
21
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4.2 Esquema Eletrônico da placa de conexões
22
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4.3. Layout da placa de conexões
23
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5. Ponte-H:
A placa “conexões” envia o sinal PWM para a placa “Ponte-H”, lembrando que, Q1 e Q2 nunca são
chaveados simultaneamente. Pois assim estaria fechando curto-circuito na fonte, pois Q3 e Q3
chaveariam por conseqüência de Q1 e Q2 estarem chaveados.
O Chaveamento é feito na diagonal, Q3 só entra em condução, quando o sinal PWM estiver ALTO em
Q2, dando uma direção para a corrente e para o motor. Por outro lado, Q4 só entra em condução se o
sinal PWM estiver ALTO em Q1, invertendo o sentido da corrente e do motor também. Os diodos rodalivre D1, D2, D3 e D4 servem para desmagnetizar o motor, evitando danos para os transistores através
da corrente reversa, característica indutiva do motor.
24
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5.2. Esquema eletrônico da Ponte-H
25
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5.3. Layout da placa da ponte-H
26
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6. Leitura do encoder, placa Contadores:
O encoder é uma chave óptica, composta de um led infravermelho e um foto-transistor alinhados de
frente um para o outro, com uma pequena distância entre si. Neste pequeno espaço gira um disco
perfurado no qual o foto-transistor é chaveado quando a luz do led infravermelho atravessa o furo do
disco caracterizando um pulso. Esse pulso é recebido com certo ruído, já que na transição do bloqueio e
desbloqueio da luz do led infravermelho, o foto-transistor conduz proporcionalmente a incidência de luz
infravermelha, formando assim uma rampa de 0-5v ou 5-0v dependendo do posicionamento do disco.
Este sinal aplicado diretamente no contador 74ls90 causa um pulo na contagem binária, já que na
transição 5-0v o sinal flutua entre 5v e 0v. Para corrigir este sinal foi adicionada uma porta inversora
com schimtt-trigger 74ls14 antes de o sinal entrar no contador.
Os contadores estão ligados em cascata, o bit mais significativo vai ligado ao clock do contador
seguinte, que no caso será um contador para unidade, um para dezena e um para a centena.
O botão reset é um push-button ligado ao +VCC e as entradas de reset de todos os contadores, ou seja,
o +VCC é aplicado às entradas de reset quando o botão é pressionado, resetando os mesmos.
Conforme o esquema seguinte, R1, R2, R3, C1, Dz1 e Q1, fazem parte de um circuito que fornece um
pulso diretamente as portas reset dos contadores quando o circuito é ligado. Garantindo assim o inicio
da contagem a partir de zero. Enquanto o carregamento do capacitor C1 não atinge 3,3V, Dz1 não
conduz, portanto Q1 está aberto, ligando Vcc para as portas reset através de R2 e R3. Quando Dz1
conduz, Q1 satura, ligando R3 diretamente ao GND, dando condições dos contadores funcionarem
normalmente, a partir de zero. Essa transição ocorre em frações de segundo, e apenas uma vez, quando
o circuito é ligado.
Devido aos ruídos ocorridos no controle do motor, parte analógica do projeto, foi necessário criar
outra fonte de alimentação, isolada da fonte simétrica. Já que qualquer ruído presente na entrada do
clock resultaria em uma contagem desordenada. Assim, foi adicionada uma fonte na placa contadores
exclusivamente para a parte digital.
27
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6.2. Esquema eletrônico da placa Contadores:
28
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6.3. Layout da placa Contadores:
29
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7. Placa Decodificadora/Displays:
Finalmente, recebendo os dados em binário, os decodificadores 74ls48, convertem para amostragem
nos displays (catodo comum). Como já foi mencionado sobre a separação das fontes (analógica/digital),
esta placa recebe alimentação da placa contadores.
7.2. Esquema eletrônico da placa Decodificadora/Displays
30
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7.3. Layout da placa Decodificadora/Displays:
31
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8. Conclusão:
No desenvolvimento do projeto, nos deparamos com alguns ruídos e problemas não percebidos na
teoria. Um deles foi que acabamos tendo de projetar uma nova fonte para parte digital, já que o ruído
gerado pelo motor voltava para a fonte e consequentemente iria para no circuito de leitura do encoder.
Outro imprevisto, desta vez não por ruído, e sim por característica do foto-transistor do encoder, é que
ele tem uma condução proporcional à incidência de luz infravermelha sobre si, deixando o sinal de saída
como uma rampa, e esta será mais inclinada, quanto mais lento passar o furo do disco entre o par
emissor-receptor. Este infortúnio foi resolvido quando adicionamos um inversor schmitt-trigger 74LS14
antes da entrada de clock do contador de unidades. Transformando essa rampa em um sinal quadrado.
Percebemos também um ruído no buffer do offset negativo, o qual não ocorre antes do buffer, e
somente em sua saída. No intuito de corrigir esta “falha”, foram adicionados capacitores em paralelo
com a alimentação do circuito integrado utilizado, trocado o amplificador do mesmo circuito integrado,
trocado o próprio circuito integrado, e o problema persistiu no protoboard. Imaginou-se que este ruído
poderia vir do protoboard, então foi desenvolvida a PCI do circuito, e o problema persistiu, após várias
análises, juntamente com o professor, constatou-se que este ruído não interferia no funcionamento do
conjunto, e acabou sendo “ignorado”.
Este projeto foi muito importante para fixar todos os conhecimentos obtidos em teoria na sala, bem
como um incentivo e para mostrar que a prática é muito diferente da teoria. Pois na teoria, todos
componentes são “ideais” e não há nenhum ruído ou falha de fabricação, tudo funciona perfeitamente.
E na prática, foi possível observar com clareza essa diferença.
32
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9. Imagens do desenvolvimento do projeto:
Foto 1 - Gerador PWM no protoboard
Foto 2 - PWM ligado na Ponte-H
33
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Foto 3 - Tirando fotos das formas de onda diretamente do osciloscópio digital
Foto 4 - Testes iniciais em protótipos com contadores e decodificadores
34
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Foto 5 - Contadores no protoboard, os leds indicam o valor em binário
Foto 6 - Teste final com a implementação do 74ls14 no sinal do encoder
35
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Foto 7 - Testes eletrônica + mecânica
Foto 8 - Estrutura completa
36
______________________________________________________________________________________
Foto 9 - Ensaios com a fonte simétrica (analógica)
Foto 10 - Circuito impresso em papel especial pronto para transferir para placa (PCI Contadores)
37
______________________________________________________________________________________
Foto 11 - Furação da PCI, após sucesso na transferência
Foto 12 - Furação concluída
38
______________________________________________________________________________________
Foto 13 - Inicio da corrosão em solução de ácido muriático
Foto 14 - Nota-se em verde, o óxido de cobre, resíduo da reação
39
______________________________________________________________________________________
Foto 15 - Placa corroída
Foto 16 - Testes finais
40
______________________________________________________________________________________
Foto 17 - Estrutura Previamente projetada em SolidWorks
Foto 18 - Estrutura Mecânica Concluída
41
______________________________________________________________________________________
Foto 19 - Placa Contador face componentes (Final)
Foto 20 - Placa Contador Face das Trilhas (Final)
42
______________________________________________________________________________________
Foto 21 - Placa Decodificadora/Displays face dos Componentes (Final)
Foto 22 - Placa Decodificadora/Displays face das trilhas (Final)
43
______________________________________________________________________________________
10. Datasheets dos Componentes Utilizados:
A partir desta pagina estão todos os datasheets dos componentes utilizados para o desenvolvimento
do projeto que nos foi proposto.
44
1N4001-1N4007
1N4001 - 1N4007
Features
•
Low forward voltage drop.
•
High surge current capability.
DO-41
COLOR BAND DENOTES CATHODE
General Purpose Rectifiers (Glass Passivated)
Absolute Maximum Ratings*
Symbol
TA = 25°C unless otherwise noted
Parameter
Value
Units
4001
4002
4003
4004
4005
4006 4007
50
100
200
400
600
800
VRRM
Peak Repetitive Reverse Voltage
IF(AV)
Average Rectified Forward Current,
.375 " lead length @ TA = 75°C
Non-repetitive Peak Forward Surge
Current
8.3 ms Single Half-Sine-Wave
Storage Temperature Range
-55 to +175
°C
Operating Junction Temperature
-55 to +175
°C
IFSM
Tstg
TJ
1000
V
1.0
A
30
A
*These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.
Thermal Characteristics
Symbol
Parameter
Value
Units
PD
Power Dissipation
3.0
W
RθJA
Thermal Resistance, Junction to Ambient
50
°C/W
Electrical Characteristics
Symbol
Parameter
Device
4001
4002
4003
4004
Units
4005
4006 4007
VF
Forward Voltage @ 1.0 A
1.1
V
Irr
Maximum Full Load Reverse Current, Full
Cycle
TA = 75°C
Reverse Current @ rated VR TA = 25°C
TA = 100°C
Total Capacitance
VR = 4.0 V, f = 1.0 MHz
30
µA
5.0
500
µA
µA
pF
IR
CT
2001 Fairchild Semiconductor Corporation
15
1N4001-1N4007, Rev. C
(continued)
1.6
20
1.4
10
1.2
4
Forward Current, IF [A]
Average Rectified Forward Current, IF [A]
Typical Characteristics
1
SINGLE PHASE
HALF WAVE
60HZ
RESISTIVE OR
INDUCTIVE LOAD
.375" 9.0 mm LEAD
LENGTHS
0.8
0.6
0.4
0.2
0
1
0.4
0.2
0.1
0.04
20
40
60
80 100 120 140
Ambient Temperature [ºC]
160
0.01
0.6
180
24
100
Reverse Current, IR [mA]
1000
18
12
6
1
2
4 6 8 10
20
40 60
Number of Cycles at 60Hz
100
Figure 3. Non-Repetitive Surge Current
0.8
1
1.2
Forward Voltage, VF [V]
1.4
Figure 2. Forward Voltage Characteristics
30
0
T J = 25ºC
µS
Pulse Width = 300µ
2% Duty Cycle
0.02
0
Figure 1. Forward Current Derating Curve
Peak Forward Surge Current, IFSM [A]
2
TJ = 150ºC
10
TJ = 100ºC
1
0.1
0.01
T J = 25ºC
0
20
40
60
80
100 120
140
Percent of Rated Peak Reverse Voltage [%]
Figure 4. Reverse Current vs Reverse Voltage
1N4001-1N4007, Rev. C
1N4001-1N4007
General Purpose Rectifiers (Glass Passivated)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FACT Quiet Series™
FAST 
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench 
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER 
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET 
VCX™
STAR*POWER is used under license
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into
support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4
This datasheet has been download from:
www.datasheetcatalog.com
Datasheets for electronics components.
1N5400-1N5408
1N5400 - 1N5408
Features
•
3.0 ampere operation at TA = 75°C
with no thermal runaway.
•
High current capability.
•
Low leakage.
DO-201AD
General Purpose Rectifiers
Symbol
Parameter
VRRM
Maximum Repetitive Reverse
Voltage
Average Rectified Forward Current,
.375 " lead length @ TA = 75°C
Non-repetitive Peak Forward Surge
Current
8.3 ms Single Half-Sine-Wave
IF(AV)
IFSM
Tstg
TJ
Value
Units
5400
5401
5402
5403
5404
5405
5406
5407
5408
50
100
200
300
400
500
600
800
1000
Operating Junction Temperature
V
3.0
A
200
A
-55 to +150
°C
-55 to +150
°C
Symbol
Parameter
Value
PD
Power Dissipation
RθJA
Symbol
Parameter
Irr
Maximum Full Load Reverse
Current, Full Cycle
TA = 105°C
Reverse Current @ rated VR
TA = 25°C
TA = 100°C
Toatal Capacitance
VR = 4.0 V, f = 1.0 MHz
W
20
°C/W
Device
5400
Forward Voltage @ 3.0 A
CT
6.25
VF
IR
Units
5401
5402
5403
5404
Units
5405
5406
5407
5408
1.2
V
0.5
mA
5.0
500
µA
µA
30
pF
1N5400-1N5408, Rev. C
(continued)
4
100
3
Forward Current, IF [A]
Average Rectified Forward Current, IF [A]
9.5mm LEAD LENGTH
2
1
0
25
50
75
100
125
150
Ambient Temperature [ºC]
175
0.1
0.6
0.8
1
1.2
1.4
Forward Voltage, VF [V]
1.6
1.8
Figure 2. Forward Voltage Characteristics
200
100
160
Reverse Current, IR [mA]
Peak Forward Surge Current, IFSM [A]
T J = 25ºC
µS
Pulse Width = 200µ
1% Duty Cycle
1
0.01
0.4
200
Figure 1. Forward Current Derating Curve
10
5
120
80
T A = 105 º C
40
0
1
2
5
10
20
Number of Cycles at 60Hz
50
100
Figure 3. Non-Repetitive Surge Current
10
TA = 25º C
1
0.1
0
20
40
60
80
100
120
140
Percent of Rated Peak Reverse Voltage [%]
Figure 4. Reverse Current vs Reverse Voltage
Total Capacitance, CT [pF]
100
50
10
5
1
0.1
1
5 10
Reverse Voltage, VR [V]
50 100
Figure 5. Total Capacitance
1N5400-1N5408, Rev. C
1N5400-1N5408
General Purpose Rectifiers
TRADEMARKS
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FAST 
FASTr™
FRFET™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench 
QFET™
QS™
Quiet Series™
SILENT SWITCHER 
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET 
VCX™
DISCLAIMER
LIFE SUPPORT POLICY
As used herein:
effectiveness.
user.
Definition of Terms
Product Status
Definition
Advance Information
Formative or
In Design
Preliminary
First Production
design.
Full Production
Obsolete
Not In Production
Rev. H4
Symbol
Parameter
PD
Power Dissipation
TSTG
TJ
Tolerance: C = 5%
Value
Units
500
mW
-65 to +200
°C
Maximum Junction Operating Temperature
+ 200
°C
Lead Temperature (1/16” from case for 10
seconds)
Surge Power**
+ 230
°C
30
W
*These ratings are limiting values above which the serviceability of the diode may be impaired.
**Non-recurrent square wave PW= 8.3 ms, TA= 50 degrees C.
DO-35
NOTES:
1) These ratings are based on a maximum junction temperature of 200 degrees C.
2) These are steady state limits. The factory should be consulted on applications involving pulsed
or low duty cycle operations.
Device
BZX55C 3V3
BZX55C 3V6
BZX55C 3V9
BZX55C 4V3
BZX55C 4V7
BZX55C 5V1
BZX55C 5V6
BZX55C 6V2
BZX55C 6V8
BZX55C 7V5
BZX55C 8V2
BZX55C 9V1
BZX55C 10
BZX55C 11
BZX55C 12
BZX55C 13
BZX55C 15
BZX55C 16
BZX55C 18
BZX55C 20
BZX55C 22
BZX55C 24
BZX55C 27
BZX55C 30
BZX55C 33
VF
VZ(V)
MIN MAX
3.1
3.5
3.4
3.8
3.7
4.1
4.0
4.6
4.4
5.0
4.8
5.4
5.2
6.0
5.8
6.6
6.4
7.2
7.0
7.9
7.7
8.7
8.5
9.6
9.4 10.6
10.4 11.6
11.4 12.7
12.4 14.1
13.8 15.6
15.3 17.1
16.8 19.1
18.8 21.1
20.8 23.3
22.8 25.6
25.1 28.9
28.0 32.0
31.0 35.0
Ω)@ IZ(mA)
ZZ(Ω
85
85
85
75
60
35
25
10
8.0
7.0
7.0
10
15
20
20
26
30
40
50
55
55
80
80
80
80
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
Ω) @IZK(mA) IR1(µ
µA)@VR(V)
ZZK(Ω
600
600
600
600
600
550
450
200
150
50
50
50
70
70
90
110
110
170
170
220
220
220
220
220
220
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
2.0
2.0
2.0
1.0
0.5
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
1.0
1.0
1.0
1.0
1.0
1.0
1.0
2.0
3.0
5.0
6.2
6.8
7.5
8.2
9.1
10
11
12
13
15
16
18
20
22
24
IR2(µµA)@VR(V)
TA= 150°°C
40
1.0
40
1.0
40
1.0
20
1.0
10
1.0
2.0
1.0
2.0
1.0
2.0
2.0
2.0
3.0
2.0
5.0
2.0
6.2
2.0
6.8
2.0
7.5
2.0
8.2
2.0
9.1
2.0
10
2.0
11
2.0
12
2.0
13
2.0
15
2.0
16
2.0
18
2.0
20
2.0
22
2.0
24
TC
(%/°°C)
- 0.060
- 0.055
- 0.050
- 0.040
- 0.020
+0.010
+0.025
+0.032
+0.040
+0.045
+0.048
+0.050
+0.055
+0.060
+0.065
0.070
0.070
0.075
0.075
0.080
0.080
0.080
0.085
0.085
0.085
IZRM
(mA)
115
105
95
90
85
80
70
64
58
53
47
43
40
36
32
29
27
24
21
20
18
16
14
13
12
Foward Voltage = 1.0 V Maximum @ IF = 100 mA for all BZX 55 series
BZX55 Series Rev. C
Zeners (BZX55C 3V3 - BZX55C 33)
Zeners
BZX55C 3V3 - BZX55C 33
(continued)
35
5000
25
Z Z - IMPEDANCE (ohms)
V Z - ZENER VOLTAGE (V)
30
TA = 25º C
20
15
V Z = 12.0V
10
V Z = 5.1V
5
1
2
V Z = 3.3V
5
10
I Z- ZENER CURRENT (mA)
20
200
100
50
30
4
T A = -25º C
TA = 25º C
3
TA = 85º C
T A = 100 º C
T A= 125 º C
2
5
10
I Z- ZENER CURRENT (mA)
20
5 TA = 100º C
TA = -25º C
1
TA = 85º C
TA = 100 º C
5
0
1
2
5
10
I Z - ZENER CURRENT (mA)
20
30
12 Zener Voltage vs. Zener Temperature
2
5
10
20
30
5.1 Zener Voltage vs. Temperature
V Z = 33.0V
TA = 125º C
TA = 25º C
TA = 85º C
T A = 25º C
4.5
30
10 T = -25º C
A
20
TA = 125º C
40
V Z = 12.0V
10
V Z = 5.1V
3.3 Zener Voltage vs. Temperature
15
0.5
1
2
5
5.5
4
1
0.2
Zener Current vs. Zener Impedence
V Z = 3.3V
2
V Z = 33.0V
20
10 V Z = 12.0V
5
6
5
2000
1000
500 V Z = 3.3V
2
1
0.1
Zener Current vs. Zener Voltage
1
TA = 25º C
V Z = 5.1V
V Z = 33.0V
TA = 100º C
TA = 125º C
35
30 TA = -25º C
T A = 25º C
TA = 85º C
25
20
1
2
5
10
20
30
33 Zener Voltage vs. Zener Temperature
BZX55 series Rev. C
TRADEMARKS
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FAST 
FASTr™
FRFET™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench 
QFET™
QS™
Quiet Series™
SILENT SWITCHER 
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET 
VCX™
DISCLAIMER
LIFE SUPPORT POLICY
As used herein:
effectiveness.
user.
Definition of Terms
Product Status
Definition
Advance Information
Formative or
In Design
Preliminary
First Production
design.
Full Production
Obsolete
Not In Production
Rev. H4
www.fairchildsemi.com
LM317
3-Terminal Positive Adjustable Regulator
Features
Description
•
•
•
•
•
•
This monolithic integrated circuit is an adjustable 3-terminal
positive voltage regulator designed to supply more than 1.5A
of load current with an output voltage adjustable over a 1.2
to 37V. It employs internal current limiting, thermal
shut-down and safe area compensation.
Output Current In Excess of 1. 5A
Output Adjustable Between 1. 2V and 37V
Internal Thermal Overload Protection
Internal Short Circuit Current Limiting
Output Transistor Safe Operating Area Compensation
TO-220 Package
TO-220
1
1. Adj 2. Output 3. Input
Internal Block Diagram
Vin 3
Input
+
-
Voltage
Reference
Protection
Circuitry
Rlimit
2 Vo
Output
1
Adj
Vadj
Rev. 1.0.0
©2001 Fairchild Semiconductor Corporation
LM317
Absolute Maximum Ratings
Parameter
Symbol
Value
Unit
Input-Output Voltage Differential
V I - VO
40
V
Lead Temperature
TLEAD
230
°C
Power Dissipation
PD
Internally limited
W
Operating Junction Temperature Range
Tj
0 ~ +125
°C
TSTG
-65 ~+125
°C
∆Vo/∆T
±0.02
%/°C
Temperature Coefficient of Output Voltage
(VI-VO=5V, IO= 0.5A, 0°C ≤ TJ ≤ + 125°C, IMAX = 1.5A, PDMAX = 20W, unless otherwise specified)
Parameter
Line Regulation (Note1)
Load Regulation (Note1)
Symbol
Rline
Rload
Conditions
Min
Typ.
Max.
Unit
TA = +25°C
3V ≤ VI - VO ≤ 40V
-
0.01
0.04
%/V
3V ≤ VI - VO ≤ 40V
-
0.02
0.07
%/V
TA = +25°C, 10mA ≤ IO ≤ IMAX
VO< 5V
VO ≥ 5V
-
18
0.4
25
0.5
mV% / VO
10mA ≤ IO ≤ IMAX
VO < 5V
VO ≥ 5V
-
40
0.8
70
1.5
mV% / VO
IADJ
-
-
46
100
µA
Adjustable Pin Current Change
∆IADJ
3V ≤ VI - VO ≤ 40V
10mA ≤ IO ≤ IMAX PD ≤ PMAX
-
2.0
5
µA
Reference Voltage
VREF
3V ≤ VIN - VO ≤ 40V
10mA ≤ IO ≤ IMAX
PD ≤ PMAX
1.20
1.25
1.30
V
-
0.7
-
% / VO
-
3.5
12
mA
1.0
2.2
0.3
-
A
-
0.003
0.01
% / VO
66
60
75
-
dB
-
0.3
1
%
-
5
-
°C / W
Adjustable Pin Current
Temperature Stability
STT
-
Minimum Load Current to Maintain
Regulation
IL(MIN)
VI - VO = 40V
Maximum Output Current
IO(MAX)
VI - VO ≤ 15V, PD ≤ PMAX
VI - VO ≤ 40V, PD ≤ PMAX
TA=25°C
RMS Noise, % of VOUT
eN
TA= +25°C, 10Hz ≤ f ≤ 10KHz
Ripple Rejection
RR
VO = 10V, f = 120Hz
without CADJ
CADJ = 10µF (Note2)
ST
TA = +25°C for end point
measurements, 1000HR
Long-Term Stability, TJ = THIGH
Thermal Resistance Junction to
Case
RθJC
-
Note:
1. Load and line regulation are specified at constant junction temperature. Change in VD due to heating effects must be taken
into account separately. Pulse testing with low duty is used. (PMAX = 20W)
2. CADJ, when used, is connected between the adjustment pin and ground.
2
LM317
ADJUSTMENT CURRENT(uA)
OUTPUT VOLTAGE DEVIATION(%)
Typical Perfomance Characteristics
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 2. Adjustment Current
REFERENCE VOLTAGE(V)
INPUT-OUTPUT DIFFERENTIAL(V)
Figure 1. Load Regulation
TEMPERATURE (°C)
Figure 3. Dropout Voltage
TEMPERATURE (°C)
Figure 4. Reference Voltage
3
LM317
Typical Application
VI
Input
Ci
0. 1µ
µF
VI
LM317
KA317
Output
Vo
Vadj
R1
I adj
Co
1µ
µF
R2 I adj
VO = 1.25V (1+ R 2/ R1)+Iadj R2
Figure 5. Programmable Regulator
Ci is required when regulator is located an appreciable distance from power supply filter.
Co is not needed for stability, however, it does improve transient response.
Since IADJ is controlled to less than 100µA, the error associated with this term is negligible in most applications.
4
LM317
Mechanical Dimensions
Package
TO-220
4.50 ±0.20
2.80 ±0.10
(3.00)
+0.10
1.30 –0.05
18.95MAX.
(3.70)
ø3.60 ±0.10
15.90 ±0.20
1.30 ±0.10
(8.70)
(1.46)
9.20 ±0.20
(1.70)
9.90 ±0.20
(45°
1.52 ±0.10
0.80 ±0.10
2.54TYP
[2.54 ±0.20]
10.08 ±0.30
(1.00)
13.08 ±0.20
)
1.27 ±0.10
+0.10
0.50 –0.05
2.40 ±0.20
2.54TYP
[2.54 ±0.20]
10.00 ±0.20
5
LM317
Ordering Information
6
Product Number
Package
Operating Temperature
LM317T
TO-220
0°C to + 125°C
LM317
7
LM317
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
6/1/01 0.0m 001
Stock#DSxxxxxxxx
 2001 Fairchild Semiconductor Corporation
LM337
3-Terminal 1.5A Negative Adjustable Regulator
Features
Description
•
•
•
•
•
•
•
The LM337 is a 3-terminal negative adjustable regulator. It
supplies in excess of 1.5A over an output voltage range of
-1.2V to - 37V. This regulator requires only two external
resistor to set the output voltage. Included on the chip are
current limiting, thermal overload protection and safe area
compensation.
Output current in excess of 1.5A
Output voltage adjustable between -1.2V and - 37V
Internal thermal overload protection
Internal short circuit current limiting
Output transistor safe area compensation
Floating operation for high voltage applications
Standard 3-pin TO-220 package
TO-220
1
1. Adj 2. Input 3. Output
Vadj
1
Voltage
Reference
3
Output
+
Protection
Circuitry
2 Input
Rev. 1.0.0
LM337
Parameter
Symbol
Input-Output Voltage Differential
|VI - VO|
40
V
PD
Internally limited
W
Operating Temperature Range
TOPR
0 ~ +125
°C
TSTG
-65 ~+125
°C
Power Dissipation
Value
Unit
(VI - VO = 5V, IO = 40mA, 0°C ≤ TJ ≤ +125°C, PDMAX = 20W, unless otherwise specified)
Parameter
Symbol
Line Regulation (Note1)
Rline
Load Regulation (Note1)
Rload
Adjustable Pin Current
Adjustable Pin Current Change
Reference Voltage
Temperature Stability
Minimum Load Current to Maintain
Regulation
Min
Typ.
Max.
TA = +25°C
3V ≤ I VI - VO I ≤ 40V
-
0.01
0.04
3V ≤ I VI - VO I ≤ 40V
-
0.02
0.07
TA = +25°C
10mA ≤ IO ≤ 0.5A
-
15
50
10mA ≤ IO ≤ 1.5A
-
15
150
-
50
100
µA
-
2
5
µA
TA =+ 25°C
-1.213
-1.250
-1.287
3V ≤ I VI - VO I ≤ 40V
10mA ≤ IO ≤ 1.5A
-1.200
-1.250
-1.300
V
0°C ≤ ΤJ ≤ +125°C
-
0.6
-
%
3V ≤I VI - VO I ≤ 40V
-
2.5
10
3V ≤I VI - VO I ≤ 10V
-
1.5
6
mA
TA =+25°C 10Hz ≤ f ≤10KHz
-
0.003
-
V/106
VO = -10V, f = 120Hz
-
60
-
CADJ = 10µF (Note2)
66
77
-
dB
-
0.3
1
%
-
4
-
°C/ W
-
IADJ
∆IADJ
VREF
STT
IL(MIN)
Output Noise
eN
Ripple Rejection Ratio
RR
Long Term Stability
ST
Thermal Resistance Junction to
Case
Conditions
RθJC
TA =+ 25°C
10mA ≤ IO ≤ 1.5A
3V ≤I VI - VO I ≤ 40V
TJ = 125°C ,1000Hours
-
Unit
%/ V
mV
Note:
1. Load and line regulation are specified at constant junction temperature. Change in VO due to heating effects must be taken into
account separately. Pulse testing with low duty is used.
2. CADJ, when used, is connected detween the adjustment pin and ground.
2
LM337
Typical Application
IPROG
R2
Ci
0. 1µF
+
+
Iadj
R1
Co
1µF
Vadj
-VI
VI
KA337
LM337
Vo
-Vo
Figure 1. Programmable Regulator
• Ci is required if regulator is located more then 4 inches from power supply filter.
A 1.0µF solid tantalum or 10µF aluminum electrolytic is recommended.
Co is necessary for stability. A 1.0µF solid tantalum or 10µF aluminum electrolytic is recommended.
• VO= -1.25V (1+R2/R1)
3
LM337
Package
TO-220
4.50 ±0.20
2.80 ±0.10
(3.00)
+0.10
1.30 –0.05
18.95MAX.
(3.70)
ø3.60 ±0.10
15.90 ±0.20
1.30 ±0.10
(8.70)
(1.46)
9.20 ±0.20
(1.70)
9.90 ±0.20
(45°
1.52 ±0.10
0.80 ±0.10
2.54TYP
[2.54 ±0.20]
2.54TYP
[2.54 ±0.20]
10.00 ±0.20
4
10.08 ±0.30
(1.00)
13.08 ±0.20
)
1.27 ±0.10
+0.10
0.50 –0.05
2.40 ±0.20
LM337
Product Number
Package
LM337T
TO-220
0°C to + 125°C
5
LM337
DISCLAIMER
LIFE SUPPORT POLICY
user.
6/1/01 0.0m 001
Stock#DSxxxxxxxx
LM2902,LM324/LM324A,LM224/
LM224A
Quad Operational Amplifier
Features
Description
• Internally Frequency Compensated for Unity Gain
• Large DC Voltage Gain: 100dB
• Wide Power Supply Range:
LM224/LM224A, LM324/LM324A : 3V~32V (or ±1.5 ~
15V)
LM2902: 3V~26V (or ±1.5V ~ 13V)
• Input Common Mode Voltage Range Includes Ground
• Large Output Voltage Swing: 0V to VCC -1.5V
• Power Drain Suitable for Battery Operation
The LM324/LM324A,LM2902,LM224/LM224A consist of
four independent, high gain, internally frequency
compensated operational amplifiers which were designed
specifically to operate from a single power supply over a
wide voltage range. Operation from split power supplies is
also possible so long as the difference between the two
supplies is 3 volts to 32 volts. Application areas include
transducer amplifier, DC gain blocks and all the
conventional OP-AMP circuits which now can be easily
implemented in single power supply systems.
14-DIP
1
14-SOP
1
14 OUT4
OUT1 1
IN1 (-)
2
IN1 (+) 3
1
_ +
+
4
_
13 IN4 (-)
12 IN4 (+)
VCC 4
11 GND
IN2 (+)
5
_ +
IN2 (-)
6
2
OUT2
7
+
_
10 IN3 (+)
3
9 IN3 (-)
8 OUT3
Rev. 1.0.3
LM2902,LM324/LM324A,LM224/LM224A
Schematic Diagram
(One Section Only)
VCC
Q5
Q12
Q6
Q17
Q19
Q20
Q2
Q3
R1
C1
Q4
IN(-)
Q18
Q1
R2
IN(+)
Q11
OUTPUT
Q21
Q10
Q7
Q8
Q9
Q15
Q14
Q13
Q16
GND
Parameter
Power Supply Voltage
Differential Input Voltage
Symbol
LM224/LM224A
LM324/LM324A
LM2902
Unit
VCC
±16 or 32
±16 or 32
±13 or 26
V
VI(DIFF)
32
32
26
V
Input Voltage
VI
-0.3 to +32
-0.3 to +32
-0.3 to +26
V
Output Short Circuit to GND
Vcc≤15V, TA=25°C(one Amp)
-
Continuous
Continuous
Continuous
-
PD
1310
640
1310
640
1310
640
mW
TOPR
-25 ~ +85
0 ~ +70
-40 ~ +85
°C
TSTG
-65 ~ +150
-65 ~ +150
-65 ~ +150
°C
Power Dissipation, TA=25°C
14-DIP
14-SOP
Thermal Data
Parameter
Thermal Resistance Junction-Ambient Max.
14-DIP
14-SOP
2
Symbol
Value
Unit
Rθja
95
195
°C/W
LM2902,LM324/LM324A,LM224/LM224A
(VCC = 5.0V, VEE = GND, TA = 25 °C, unless otherwise specified)
Parameter
Symbol
Input Offset
Voltage
VIO
Input Offset
Current
IIO
IBIAS
Input Bias Current
Common-Mode
Input
Voltage Range
Supply Current
Large Signal
Voltage Gain
Output Voltage
Swing
VI(R)
ICC
GV
VO(H)
Conditions
VCM = 0V to VCC
-1.5V
VO(P) = 1.4V, RS
= 0Ω
LM224
LM324
LM2902
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
Unit
-
1.5
5.0
-
1.5
7.0
-
1.5
7.0
mV
-
-
2.0
30
-
3.0
50
-
3.0
50
nA
-
-
40
150
-
40
250
-
40
250
nA
-
0
-
VCC
-1.5
V
Note1
0
-
VCC
-1.5
0
VCC
-1.5
RL = ∞,VCC = 30V
(all Amps)
-
1.0
3
-
1.0
3
-
1.0
3
mA
RL = ∞,VCC = 5V
(all Amps)
(VCC = 26V for
LM2902)
-
0.7
1.2
-
0.7
1.2
-
0.7
1.2
mA
50
100
-
25
100
-
-
100
-
V/
mV
RL =
2KΩ
26
-
-
26
-
-
22
-
-
V
RL =
10KΩ
27
28
-
27
28
-
23
24
-
V
VCC = 15V,RL≥2KΩ
VO(P) = 1V to 11V
Note1
VO(L)
VCC = 5V,RL≥10KΩ
-
5
20
-
5
20
-
5
100
mV
Common-Mode
Rejection Ratio
CMRR
-
70
85
-
65
75
-
50
75
-
dB
Power Supply
Rejection Ratio
PSRR
-
65
100
-
65
100
-
50
100
-
dB
Channel
Separation
CS
f = 1KHz to 20KHz
-
120
-
-
120
-
-
120
-
dB
Short Circuit to
GND
ISC
-
-
40
60
-
40
60
-
40
60
mA
VI(+) = 1V, VI(-) = 0V
ISOURCE VCC = 15V, VO(P)
20
= 2V
40
-
20
40
-
20
40
-
mA
VI(+) = 0V, VI(-) = 1V
VCC = 15V, VO(P)
10
= 2V
13
-
10
13
-
10
13
-
mA
VI(+) = 0V, VI(-) = 1V
VCC = 15V,VO(R) = 12
200mV
45
-
12
45
-
-
-
-
µA
-
VCC
-
-
VCC
-
-
VCC
V
Output Current
ISINK
Differential Input
Voltage
VI(DIFF)
-
-
Note :
1. VCC=30V for LM224 and LM324 , VCC = 26V for LM2902
3
LM2902,LM324/LM324A,LM224/LM224A
Electrical Characteristics (Continued)
(VCC = 5.0V, VEE = GND, unless otherwise specified)
The following specification apply over the range of -25°C ≤ TA ≤ + 85°C for the LM224; and the 0°C ≤ TA ≤ +70°C
for the LM324 ; and the - 40°C ≤ TA ≤ +85°C for the LM2902
Parameter
LM224
LM2902
Conditions
Input Offset Voltage
VIO
VICM = 0V to VCC
-1.5V
VO(P) = 1.4V, RS
= 0Ω
-
-
7.0
-
-
9.0
-
-
10.0
mV
Drift
∆VIO/∆T
-
-
7.0
-
-
7.0
-
-
7.0
-
µV/°C
Input Offset Current
IIO
-
-
-
100
-
-
150
-
-
200
nA
Drift
∆IIO/∆T
-
-
10
-
-
10
-
-
10
-
pA/°C
Input Bias Current
IBIAS
-
-
-
300
-
-
500
-
-
500
nA
Common-Mode
Input Voltage Range
VI(R)
0
-
VCC
-2.0
0
-
VCC
-2.0
0
-
VCC
-2.0
V
Large Signal Voltage
Gain
GV
VCC = 15V, RL ≥
2.0KΩ
25
VO(P) = 1V to 11V
-
-
15
-
-
15
-
-
V/mV
RL =
2KΩ
26
-
-
26
-
-
22
-
-
V
RL =
10KΩ
27
28
-
27
28
-
23
24
-
V
5
20
-
5
20
-
5
100
mV
Output Voltage
Swing
VO(H)
VO(L)
Differential Input
Voltage
Note1
Note1
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
VCC = 5V,
RL≥10KΩ
Unit
VI(+) = 1V, VI(-)
ISOURCE = 0V VCC = 15V,
VO(P) = 2V
10
20
-
10
20
-
10
20
-
mA
ISINK
VI(+) = 0V, VI(-) =
1V
VCC = 15V, VO(P)
= 2V
10
13
-
5
8
-
5
8
-
mA
VI(DIFF)
-
-
-
VCC
-
-
VCC
-
-
VCC
V
Output Current
Note:
1. VCC=30V for LM224 and LM324 , VCC = 26V for LM2902
4
LM324
Symbol
LM2902,LM324/LM324A,LM224/LM224A
(VCC = 5.0V, VEE = GND, TA = 25°C, unless otherwise specified)
Parameter
LM224A
LM324A
Symbol
Conditions
VIO
VCM = 0V to VCC
-1.5V
VO(P) = 1.4V, RS = 0 Ω
-
1.0
3.0
-
1.5
3.0
mV
IIO
-
-
2
15
-
3.0
30
nA
Input Bias Current
IBIAS
-
-
40
80
-
40
100
nA
Input Common-Mode
Voltage Range
VI(R)
VCC = 30V
0
-
VCC
-1.5
0
-
VCC
-1.5
V
Supply Current (All Amps)
ICC
VCC = 30V
-
1.5
3
-
1.5
3
mA
VCC = 5V
-
0.7
1.2
-
0.7
1.2
mA
Large Signal Voltage Gain
GV
50
100
-
25
100
-
V/mV
Output Voltage Swing
VO(H)
VCC = 15V, RL≥ 2 KΩ
VO(P) = 1V to 11V
Note1
Min. Typ. Max. Min. Typ. Max.
Unit
RL = 2 KΩ
26
-
-
26
-
-
V
RL = 10 KΩ
27
28
-
27
28
-
V
VO(L)
VCC = 5V, RL≥ 10 KΩ
-
5
20
-
5
20
mV
Common-Mode Rejection
Ratio
CMRR
-
70
85
-
65
85
-
dB
Power Supply Rejection Ratio
PSRR
-
65
100
-
65
100
-
dB
-
120
-
-
120
-
dB
-
40
60
-
40
60
mA
VI(+) = 1V, VI(-) = 0V
VCC = 15V
20
40
-
20
40
-
mA
VI(+) = 0V, VI(-) = 1V
VCC = 15V, VO(P) = 2V
10
20
-
10
20
-
mA
VI(+) = 0v, VI(-) = 1V
VCC = 15V, VO(P) =
200mV
12
50
-
12
50
-
µA
-
-
VCC
-
-
VCC
V
Channel Separation
CS
Short Circuit to GND
ISC
ISOURCE
Output Current
ISINK
VI(DIFF)
f = 1KHz to 20KHz
-
-
Note:
1. VCC=30V for LM224A, LM324A
5
LM2902,LM324/LM324A,LM224/LM224A
(VCC = 5.0V, VEE = GND, unless otherwise specified)
The following specification apply over the range of -25°C ≤ TA ≤ + 85°C for the LM224A; and the 0°C ≤ TA ≤ +70°C
for the LM324A
Parameter
Input Offset Voltage Drift
LM224A
LM324A
Min.
Typ.
Typ.
Max.
VCM = 0V to VCC -1.5V
VO(P) = 1.4V, RS = 0Ω
-
-
4.0
-
-
5.0
mV
∆VIO/∆T
-
-
7.0
20
-
7.0
30
µV/°C
IIO
-
-
-
30
-
-
75
nA
Symbol
Conditions
VIO
Unit
∆IIO/∆T
-
-
10
200
-
10
300 pA/°C
Input Bias Current
IBIAS
-
-
40
100
-
40
200
nA
Common-Mode Input
Voltage Range
VI(R)
0
-
VCC
-2.0
0
-
VCC
-2.0
V
Input Offset Current Drift
Large Signal Voltage Gain
Output Voltage Swing
GV
VCC = 30V
VCC = 15V, RL≥ 2.0KΩ
25
-
-
15
-
-
V/mV
RL = 2KΩ
26
-
-
26
-
-
V
RL = 10KΩ
27
28
-
27
28
-
VO(H)
VCC =
30V
VO(L)
VCC = 5V, RL≥ 10KΩ
-
5
20
-
5
20
mA
ISOURCE
VI(+) = 1V, VI(-) = 0V
VCC = 15V
10
20
-
10
20
-
mA
ISINK
VI(+) = 0V, VI(-) = 1V
VCC = 15V
5
8
-
5
8
-
mA
-
-
VCC
-
-
VCC
V
Output Current
6
Max. Min.
VI(DIFF)
-
LM2902,LM324/LM324A,LM224/LM224A
Typical Performance Characteristics
Supply Voltage(v)
Figure 1. Input Voltage Range vs Supply Voltage
Supply Voltage (V)
Figure 3. Supply Current vs Supply Voltage
Frequency (Hz)
Figure 5. Open Loop Frequency Response
Temperature Tj ( °C)
Figure 2. Input Current vs Temperature
Supply Voltage (V)
Figure 4. Voltage Gain vs Supply Voltage
Frequency (Hz)
Figure 6. Common mode Rejection Ratio
7
LM2902,LM324/LM324A,LM224/LM224A
Typical Performance Characteristics (Continued)
8
Figure 7. Slew Rate
Figure 8. Voltage Follower Pulse Response
Figure 9. Large Signal Frequency Response
Figure 10. Output Characteristics vs Current Sourcing
Figure 11. Output Characteristics vs Current Sinking
Figure 12. Current Limiting vs Temperature
LM2902,LM324/LM324A,LM224/LM224A
Package
Dimensions in millimeters
2.08
)
0.082
14-DIP
7.62
0.300
3.25 ±0.20
0.128 ±0.008
5.08
MAX
0.200
1.50 ±0.10
0.059 ±0.004
#8
2.54
0.100
#7
19.40 ±0.20
0.764 ±0.008
#14
19.80
MAX
0.780
#1
0.46 ±0.10
0.018 ±0.004
(
6.40 ±0.20
0.252 ±0.008
0.20
0.008 MIN
3.30 ±0.30
0.130 ±0.012
+0.10
0.25 –0.05
0~15°
+0.004
0.010 –0.002
9
LM2902,LM324/LM324A,LM224/LM224A
Mechanical Dimensions (Continued)
Package
14-SOP
0.05
0.002
MIN
0.60 ±0.20
0.024 ±0.008
10
MAX0.10
MAX0.004
1.80
MAX
0.071
5.72
0.225
8°
3.95 ±0.20
0.156 ±0.008
0~
+0.004
0.008 -0.002
0.20
+0.10
-0.05
6.00 ±0.30
0.236 ±0.012
0.016 -0.002
-0.05
+0.004
+0.10
#8
0.406
#7
1.27
0.050
#14
8.70
MAX
0.343
#1
8.56 ±0.20
0.337 ±0.008
(
0.47
)
0.019
1.55 ±0.10
0.061 ±0.004
LM2902,LM324/LM324A,LM224/LM224A
Product Number
LM324N
LM324AN
LM324M
LM324AM
Package
14-DIP
0 ~ +70°C
14-SOP
LM2902N
14-DIP
LM2902M
14-SOP
LM224N
LM224AN
LM224M
LM224AM
-40 ~ +85°C
14-DIP
-25 ~ +85°C
14-SOP
11
LM2902,LM324/LM324A,LM224/LM224A
DISCLAIMER
LIFE SUPPORT POLICY
user.
3/22/02 0.0m 001
Stock#DSxxxxxxxx
LM555/NE555/SA555
Single Timer
Features
Description
•
•
•
•
•
The LM555/NE555/SA555 is a highly stable controller
capable of producing accurate timing pulses. With
monostable operation, the time delay is controlled by one
external resistor and one capacitor. With astable operation,
the frequency and duty cycle are accurately controlled with
two external resistors and one capacitor.
High Current Drive Capability (200mA)
Adjustable Duty Cycle
Temperature Stability of 0.005%/°C
Timing From µSec to Hours
Turn off Time Less Than 2µSec
Applications
•
•
•
•
8-DIP
Precision Timing
Pulse Generation
Time Delay Generation
Sequential Timing
1
8-SOP
1
R
GND
1
Trigger
2
R
Comp.
Output
Reset
3
OutPut
Stage
R
8
Vcc
7
Discharge
6
Threshold
5
Control
Voltage
Discharging Tr.
F/F
4
Vref
Comp.
Rev. 1.0.2
LM555/NE555/SA555
Absolute Maximum Ratings (TA = 25°°C)
Parameter
Supply Voltage
Lead Temperature (Soldering 10sec)
Power Dissipation
LM555/NE555
SA555
2
Symbol
Value
Unit
VCC
16
V
TLEAD
300
°C
PD
600
mW
TOPR
0 ~ +70
-40 ~ +85
°C
TSTG
-65 ~ +150
°C
LM555/NE555/SA555
(TA = 25°C, VCC = 5 ~ 15V, unless otherwise specified)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
Supply Voltage
VCC
-
4.5
-
16
V
Supply Current *1(Low Stable)
ICC
VCC = 5V, RL = ∞
-
3
6
mA
VCC = 15V, RL = ∞
-
7.5
15
mA
-
1.0
50
0.1
3.0
%
ppm/°C
%/V
2.25
150
0.3
-
%
ppm/°C
%/V
Timing Error *2 (Monostable)
Initial Accuracy
Drift with Temperature
Drift with Supply Voltage
Timing Error *2(Astable)
Intial Accuracy
Drift with Temperature
Drift with Supply Voltage
ACCUR
∆t/∆T
∆t/∆VCC
ACCUR
∆t/∆T
∆t/∆VCC
Control Voltage
VC
Threshold Voltage
VTH
Threshold Current
*3
RA = 1kΩ to100kΩ
C = 0.1µF
RA = 1kΩ to 100kΩ
C = 0.1µF
VCC = 15V
9.0
10.0
11.0
V
VCC = 5V
2.6
3.33
4.0
V
VCC = 15V
-
10.0
-
V
VCC = 5V
-
3.33
-
V
-
0.1
0.25
µA
VCC = 5V
1.1
1.67
2.2
V
VCC = 15V
4.5
ITH
-
Trigger Voltage
VTR
Trigger Current
ITR
Reset Voltage
VRST
-
Reset Current
IRST
-
Low Output Voltage
High Output Voltage
VOL
VOH
-
0.5
VTR = 0V
0.4
5
5.6
V
0.01
2.0
µA
0.7
1.0
V
0.1
0.4
mA
VCC = 15V
ISINK = 10mA
ISINK = 50mA
-
0.06
0.3
0.25
0.75
V
V
VCC = 5V
ISINK = 5mA
-
0.05
0.35
V
12.5
13.3
-
12.75
V
V
2.75
3.3
-
V
VCC = 15V
ISOURCE = 200mA
ISOURCE = 100mA
VCC = 5V
ISOURCE = 100mA
Rise Time of Output
tR
-
-
100
-
ns
Fall Time of Output
tF
-
-
100
-
ns
ILKG
-
-
20
100
nA
Discharge Leakage Current
Notes:
1. Supply current when output is high is typically 1mA less at VCC = 5V
2. Tested at VCC = 5.0V and VCC = 15V
3. This will determine maximum value of RA + RB for 15V operation, the max. total R = 20MΩ, and for 5V operation the max.
total R = 6.7MΩ
3
LM555/NE555/SA555
Application Information
Table 1 below is the basic operating table of 555 timer:
Table 1. Basic Operating Table
Threshold Voltage
Trigger Voltage
Discharging Tr.
Reset(PIN 4)
Output(PIN 3)
(Vth)(PIN 6)
(Vtr)(PIN 2)
(PIN 7)
Don't care
Don't care
Low
Low
ON
Vth > 2Vcc / 3
Vth > 2Vcc / 3
High
Low
ON
High
Vcc / 3 < Vth < 2 Vcc / 3 Vcc / 3 < Vth < 2 Vcc / 3
Vth < Vcc / 3
High
High
OFF
Vth < Vcc / 3
When the low signal input is applied to the reset terminal, the timer output remains low regardless of the threshold voltage or
the trigger voltage. Only when the high signal is applied to the reset terminal, timer's output changes according to threshold
voltage and trigger voltage.
When the threshold voltage exceeds 2/3 of the supply voltage while the timer output is high, the timer's internal discharge Tr.
turns on, lowering the threshold voltage to below 1/3 of the supply voltage. During this time, the timer output is maintained
low. Later, if a low signal is applied to the trigger voltage so that it becomes 1/3 of the supply voltage, the timer's internal
discharge Tr. turns off, increasing the threshold voltage and driving the timer output again at high.
1. Monostable Operation
+Vcc
10
THRES
3
6
OUT
C1
GND
CONT 5
1
10
Ω
10
M
Ω
1M
10
0k
Ω
1
R
TRIG
Capacitance(uF)
2
RL
10
DISCH 7
10
kΩ
Trigger
=1
kΩ
8
Vcc
A
4
RESET
2
RA
0
10
-1
10
-2
10
-3
C2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
Time Delay(s)
Figure 1. Monoatable Circuit
Figure 3. Waveforms of Monostable Operation
4
Figure 2. Resistance and Capacitance vs.
Time delay(td)
10
2
LM555/NE555/SA555
Figure 1 illustrates a monostable circuit. In this mode, the timer generates a fixed pulse whenever the trigger voltage falls
below Vcc/3. When the trigger pulse voltage applied to the #2 pin falls below Vcc/3 while the timer output is low, the timer's
internal flip-flop turns the discharging Tr. off and causes the timer output to become high by charging the external capacitor
C1and setting the flip-flop output at the same time.
The voltage across the external capacitor C1, VC1 increases exponentially with the time constant t=RA*C and reaches 2Vcc/3
at td=1.1RA*C. Hence, capacitor C1 is charged through resistor RA. The greater the time constant RAC, the longer it takes
for the VC1 to reach 2Vcc/3. In other words, the time constant RAC controls the output pulse width.
When the applied voltage to the capacitor C1 reaches 2Vcc/3, the comparator on the trigger terminal resets the flip-flop,
turning the discharging Tr. on. At this time, C1 begins to discharge and the timer output converts to low.
In this way, the timer operating in monostable repeats the above process. Figure 2 shows the time constant relationship based
on RA and C. Figure 3 shows the general waveforms during monostable operation.
It must be noted that, for normal operation, the trigger pulse voltage needs to maintain a minimum of Vcc/3 before the timer
output turns low. That is, although the output remains unaffected even if a different trigger pulse is applied while the output is
high, it may be affected and the waveform not operate properly if the trigger pulse voltage at the end of the output pulse
remains at below Vcc/3. Figure 4 shows such timer output abnormality.
Figure 4. Waveforms of Monostable Operation (abnormal)
2. Astable Operation
+Vcc
100
RA
OUT
C1
GND
RL
0.1
M
10
3
1
1M
RB
THRES 6
Capacitance(uF)
7
TRIG
0k
10
DISCH
2
1k
8
Vcc
k
10
4
RESET
(RA+2RB)
10
0.01
CONT 5
1
C2
1E-3
100m
1
10
100
1k
10k
100k
Frequency(Hz)
Figure 5. Astable Circuit
Figure 6. Capacitance and Resistance vs. Frequency
5
LM555/NE555/SA555
Figure 7. Waveforms of Astable Operation
An astable timer operation is achieved by adding resistor RB to Figure 1 and configuring as shown on Figure 5. In astable
operation, the trigger terminal and the threshold terminal are connected so that a self-trigger is formed, operating as a multi
vibrator. When the timer output is high, its internal discharging Tr. turns off and the VC1 increases by exponential
function with the time constant (RA+RB)*C.
When the VC1, or the threshold voltage, reaches 2Vcc/3, the comparator output on the trigger terminal becomes high,
resetting the F/F and causing the timer output to become low. This in turn turns on the discharging Tr. and the C1 discharges
through the discharging channel formed by RB and the discharging Tr. When the VC1 falls below Vcc/3, the comparator
output on the trigger terminal becomes high and the timer output becomes high again. The discharging Tr. turns off and the
VC1 rises again.
In the above process, the section where the timer output is high is the time it takes for the VC1 to rise from Vcc/3 to 2Vcc/3,
and the section where the timer output is low is the time it takes for the VC1 to drop from 2Vcc/3 to Vcc/3. When timer output
is high, the equivalent circuit for charging capacitor C1 is as follows:
RA
RB
Vcc
C1
dv c1 V cc – V ( 0- )
C ------------- = ------------------------------1 dt
RA + RB
V
C1
( 0+ ) = V
CC

⁄3
Vc1(0-)=Vcc/3
(1)
(2)

t
-  – ------------------------------------ 

( R + R )C1

2  A B 
V C1 ( t ) = V CC  1 – --- e

3




(3)
Since the duration of the timer output high state(tH) is the amount of time it takes for the VC1(t) to reach 2Vcc/3,
6
LM555/NE555/SA555

t

H

-  – ------------------------------------ 

2
2  ( R A + R B )C1 
=V
V ( t ) = --- V
 1 – --- e

C1
3 CC
3
CC 



t
H
(4)
= C ( R + R )In2 = 0.693 ( R + R )C
1 A
B
A
B 1
(5)
The equivalent circuit for discharging capacitor C1 when timer output is low as follows:
RB
C1
VC1(0-)=2Vcc/3
RD
dv
1
C1
C 1 -------------- + ----------------------- V C1 = 0
R +R
dt
A
B
2
V C1 ( t ) = --- V
3 CC e
t
- ------------------------------------( R A + R D )C1
(6)
(7)
Since the duration of the timer output low state(tL) is the amount of time it takes for the VC1(t) to reach Vcc/3,
tL
- -----------------------------------( R A + R D )C1
1
2
--- V
-= V
(8)
3 CC 3 CC e
t = C ( R + R )In2 = 0.693 ( R + R )C
L
1 B
D
B
D 1
(9)
Since RD is normally RB>>RD although related to the size of discharging Tr.,
(10)
tL=0.693RBC1
Consequently, if the timer operates in astable, the period is the same with
'T=tH+tL=0.693(RA+RB)C1+0.693RBC1=0.693(RA+2RB)C1' because the period is the sum of the charge time and discharge
time. And since frequency is the reciprocal of the period, the following applies.
frequency,
1
1.44
f = --- = ---------------------------------------T
( R + 2R )C
A
B 1
( 11 )
3. Frequency divider
By adjusting the length of the timing cycle, the basic circuit of Figure 1 can be made to operate as a frequency divider. Figure
8. illustrates a divide-by-three circuit that makes use of the fact that retriggering cannot occur during the timing cycle.
7
LM555/NE555/SA555
Figure 8. Waveforms of Frequency Divider Operation
4. Pulse Width Modulation
The timer output waveform may be changed by modulating the control voltage applied to the timer's pin 5 and changing the
reference of the timer's internal comparators. Figure 9. illustrates the pulse width modulation circuit.
When the continuous trigger pulse train is applied in the monostable mode, the timer output width is modulated according to
the signal applied to the control terminal. Sine wave as well as other waveforms may be applied as a signal to the control
terminal. Figure 10 shows an example of pulse width modulation waveform.
+Vcc
4
RA
8
RESET
Vcc
Trigger
7
DISCH
2
TRIG
6
THRES
Output
3
OUT
Input
GND
CONT
5
C
1
Figure 9. Circuit for Pulse Width Modulation
Figure 10. Waveforms of Pulse Width Modulation
5. Pulse Position Modulation
If the modulating signal is applied to the control terminal while the timer is connected for astable operation as in Figure 11, the
timer becomes a pulse position modulator.
In the pulse position modulator, the reference of the timer's internal comparators is modulated which in turn modulates the
timer output according to the modulation signal applied to the control terminal.
Figure 12 illustrates a sine wave for modulation signal and the resulting output pulse position modulation : however, any wave
shape could be used.
8
LM555/NE555/SA555
+Vcc
4
RA
8
RESET
Vcc
7
DISCH
2
TRIG
RB
6
THRES
Output
3
OUT
Modulation
GND
5
CONT
C
1
Figure 12. Waveforms of pulse position modulation
Figure 11. Circuit for Pulse Position Modulation
6. Linear Ramp
When the pull-up resistor RA in the monostable circuit shown in Figure 1 is replaced with constant current source, the VC1
increases linearly, generating a linear ramp. Figure 13 shows the linear ramp generating circuit and Figure 14 illustrates the
generated linear ramp waveforms.
+Vcc
RE
2
4
8
RESET
Vcc
DISCH
7
THRES
6
R1
Q1
TRIG
R2
Output
3
OUT
GND
C1
CONT 5
C2
1
Figure 13. Circuit for Linear Ramp
Figure 14. Waveforms of Linear Ramp
In Figure 13, current source is created by PNP transistor Q1 and resistor R1, R2, and RE.
I
V
E
V
–V
CC
E= -------------------------C
R
E
Here, V
E is
= V
BE
R2
+ ---------------------- V
R 1 + R 2 CC
( 12 )
( 13 )
For example, if Vcc=15V, RE=20kΩ, R1=5kW, R2=10kΩ, and VBE=0.7V,
VE=0.7V+10V=10.7V
Ic=(15-10.7)/20k=0.215mA
9
LM555/NE555/SA555
When the trigger is started in a timer configured as shown in Figure 13, the current flowing to capacitor C1 becomes a constant
current generated by PNP transistor and resistors.
Hence, the VC is a linear ramp function as shown in Figure 14. The gradient S of the linear ramp function is defined as
follows:
Vp – p
S = ---------------T
( 14 )
Here the Vp-p is the peak-to-peak voltage.
If the electric charge amount accumulated in the capacitor is divided by the capacitance, the VC comes out as follows:
V=Q/C
(15)
The above equation divided on both sides by T gives us
V
Q⁄T
---- = -----------T
C
( 16 )
and may be simplified into the following equation.
S=I/C
(17)
In other words, the gradient of the linear ramp function appearing across the capacitor can be obtained by using the constant
current flowing through the capacitor.
If the constant current flow through the capacitor is 0.215mA and the capacitance is 0.02uF, the gradient of the ramp function
at both ends of the capacitor is S = 0.215m/0.022u = 9.77V/ms.
10
LM555/NE555/SA555
Package
0.060 ±0.004
#5
1.524 ±0.10
#4
0.018 ±0.004
#8
2.54
0.100
9.60
MAX
0.378
#1
9.20 ±0.20
0.362 ±0.008
(
6.40 ±0.20
0.252 ±0.008
0.46 ±0.10
0.79
)
0.031
8-DIP
5.08
MAX
0.200
7.62
0.300
3.40 ±0.20
0.134 ±0.008
3.30 ±0.30
0.130 ±0.012
0.33
0.013 MIN
+0.10
0.25 –0.05
+0.004
0~15°
0.010 –0.002
11
LM555/NE555/SA555
Mechanical Dimensions (Continued)
Package
8-SOP
MIN
#5
12
0~
8°
+0.10
0.15 -0.05
+0.004
0.006 -0.002
3.95 ±0.20
0.156 ±0.008
5.72
0.225
0.50 ±0.20
0.020 ±0.008
1.80
MAX
0.071
MAX0.10
MAX0.004
6.00 ±0.30
0.236 ±0.012
0.41 ±0.10
0.016 ±0.004
#4
1.27
0.050
#8
5.13
MAX
0.202
#1
4.92 ±0.20
0.194 ±0.008
(
0.56
)
0.022
1.55 ±0.20
0.061 ±0.008
0.1~0.25
0.004~0.001
LM555/NE555/SA555
Product Number
Package
LM555CN
8-DIP
LM555CM
8-SOP
Product Number
Package
NE555N
8-DIP
NE555D
8-SOP
Product Number
Package
SA555
8-DIP
SA555D
8-SOP
0 ~ +70°C
0 ~ +70°C
-40 ~ +85°C
13
LM555/NE555/SA555
DISCLAIMER
LIFE SUPPORT POLICY
user.
7/16/02 0.0m 001
Stock#DSxxxxxxxx
L7800
SERIES
POSITIVE VOLTAGE REGULATORS
■
■
■
■
■
OUTPUT CURRENT TO 1.5A
OUTPUT VOLTAGES OF 5; 5.2; 6; 8; 8.5; 9;
10; 12; 15; 18; 24V
THERMAL OVERLOAD PROTECTION
SHORT CIRCUIT PROTECTION
OUTPUT TRANSITION SOA PROTECTION
DESCRIPTION
The L7800 series of three-terminal positive
regulators is available in TO-220, TO-220FP,
TO-220FM, TO-3 and D2PAK packages and
several fixed output voltages, making it useful in a
wide range of applications. These regulators can
provide local on-card regulation, eliminating the
distribution problems associated with single point
regulation. Each type employs internal current
limiting, thermal shut-down and safe area
protection, making it essentially indestructible. If
adequate heat sinking is provided, they can
deliver over 1A output current. Although designed
primarily as fixed voltage regulators, these
devices can be used with external components to
obtain adjustable voltage and currents.
TO-220
D2PAK
TO-220FP
TO-220FM
TO-3
Figure 1: Schematic Diagram
November 2004
Rev. 12
1/34
L7800 SERIES
Table 1: Absolute Maximum Ratings
Symbol
VI
Parameter
DC Input Voltage
Value
for VO= 5 to 18V
35
for VO= 20, 24V
40
Unit
V
Output Current
Internally Limited
Ptot
Power Dissipation
Internally Limited
Tstg
-65 to 150
°C
Top
Operating Junction Temperature for L7800
Range
for L7800C
-55 to 150
0 to 150
°C
IO
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is
not implied.
Table 2: Thermal Data
Symbol
Parameter
Rthj-case Thermal Resistance Junction-case Max
Thermal Resistance Junction-ambient
Rthj-amb
Max
Figure 2: Schematic Diagram
2/34
D2PAK
TO-220
3
5
5
62.5
50
60
TO-220FP TO-220FM
TO-3
Unit
5
4
°C/W
60
35
°C/W
L7800 SERIES
Figure 3: Connection Diagram (top view)
TO-220 (Any Type)
TO-220FP/TO-220FM
D2PAK (Any Type)
TO-3
Table 3: Order Codes
TYPE
L7805
L7805C
L7852C
L7806
L7806C
L7808
L7808C
L7885C
L7809C
L7810C
L7812
L7812C
L7815
L7815C
L7818
L7818C
L7820
L7820C
L7824
L7824C
TO-220
(A Type)
TO-220
(C Type)
L7805CV
L7852CV
TO-220
(E Type)
D2PAK
(A Type) (*)
D2PAK
(C Type)
(T & R)
TO-220FP
TO-220FM
L7805C-V L7805CV1 L7805CD2T L7805C-D2TR
L7852CD2T
L7805CP
L7852CP
L7805CF
L7852CF
L7806CV
L7806C-V
L7806CD2T
L7806CP
L7806CF
L7808CV
L7885CV
L7809CV
L7810CV
L7808C-V
L7808CD2T
L7885CD2T
L7809CD2T
L7810CD2T
L7808CP
L7885CP
L7809CP
L7810CP
L7808CF
L7885CF
L7809CF
L7812CV
L7812C-V
L7812CD2T
L7812CP
L7812CF
L7815CV
L7815C-V
L7815CD2T
L7815CP
L7815CF
L7818CV
L7818CD2T
L7818CP
L7818CF
L7820CV
L7820CD2T
L7820CP
L7820CF
L7824CV
L7824CD2T
L7824CP
L7824CF
L7809C-V
TO-3
L7805T
L7805CT
L7852CT
L7806T
L7806CT
L7808T
L7808CT
L7885CT
L7809CT
L7812T
L7812CT
L7815T
L7815CT
L7818T
L7818CT
L7820T
L7820CT
L7824T
L7824CT
(*) Available in Tape & Reel with the suffix "-TR".
3/34
L7800 SERIES
Figure 4: Application Circuits
TEST CIRCUITS
Figure 5: DC Parameter
Figure 6: Load Regulation
4/34
L7800 SERIES
Figure 7: Ripple Rejection
Table 4: Electrical Characteristics Of L7805 (refer to the test circuits, TJ = -55 to 150°C, VI = 10V,
IO = 500 mA, CI = 0.33 µF, CO = 0.1 µF unless otherwise specified).
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 8 to 20 V
∆VO(*)
Line Regulation
VI = 7 to 25 V
TJ = 25°C
VI = 8 to 12 V
TJ = 25°C
IO = 5 mA to 1.5 A
TJ = 25°C
100
IO = 250 to 750 mA
TJ = 25°C
25
∆VO(*)
Id
∆Id
Load Regulation
Quiescent Current
TJ = 25°C
Quiescent Current Change
IO = 5 mA to 1 A
PO ≤ 15W
4.8
5
5.2
V
4.65
5
5.35
V
3
50
mV
1
25
VI = 8 to 25 V
∆VO/∆T Output Voltage Drift
eN
SVR
B =10Hz to 100KHz
VI = 8 to 18 V
Vd
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
Short Circuit Current
VI = 35 V
Iscp
Short Circuit Peak Current
TJ = 25°C
6
mA
0.5
mA
0.6
Supply Voltage Rejection
mV
0.8
IO = 5 mA
Output Noise Voltage
Unit
TJ = 25°C
f = 120Hz
mV/°C
40
68
TJ = 25°C
dB
2
2.5
17
TJ = 25°C
1.3
µV/VO
V
mΩ
0.75
1.2
A
2.2
3.3
A
(*) Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.
5/34
L7800 SERIES
Symbol
Parameter
Test Conditions
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 9 to 21 V
∆VO(*)
Line Regulation
VI = 8 to 25 V
VI = 9 to 13 V
∆VO(*)
Id
∆Id
Load Regulation
SVR
Typ.
Max.
Unit
5.75
6
6.25
V
5.65
6
6.35
V
TJ = 25°C
60
mV
TJ = 25°C
30
IO = 5 mA to 1.5 A
TJ = 25°C
100
IO = 250 to 750 mA
TJ = 25°C
30
PO ≤ 15W
mV
Quiescent Current
TJ = 25°C
6
mA
IO = 5 mA to 1 A
0.5
mA
VI = 9 to 25 V
0.8
eN
Min.
IO = 5 mA
0.7
B =10Hz to 100KHz
VI = 9 to 19 V
Vd
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
TJ = 25°C
f = 120Hz
mV/°C
40
65
µV/VO
dB
TJ = 25°C
2
2.5
TJ = 25°C
0.75
1.2
A
2.2
3.3
A
19
1.3
V
mΩ
Symbol
Parameter
Test Conditions
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 11.5 to 23 V
∆VO(*)
Line Regulation
VI = 10.5 to 25 V
VI = 11 to 17 V
∆VO(*)
Id
∆Id
Load Regulation
SVR
Typ.
Max.
Unit
7.7
8
8.3
V
7.6
8
8.4
V
TJ = 25°C
80
mV
TJ = 25°C
40
IO = 5 mA to 1.5 A
TJ = 25°C
100
IO = 250 to 750 mA
TJ = 25°C
40
PO ≤ 15W
mV
Quiescent Current
TJ = 25°C
6
mA
IO = 5 mA to 1 A
0.5
mA
VI = 11.5 to 25 V
0.8
eN
Min.
IO = 5 mA
1
B =10Hz to 100KHz
TJ = 25°C
f = 120Hz
VI = 11.5 to 21.5 V
Vd
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
mV/°C
40
62
µV/VO
dB
TJ = 25°C
2
2.5
TJ = 25°C
0.75
1.2
A
2.2
3.3
A
16
1.3
V
mΩ
6/34
L7800 SERIES
Symbol
Parameter
Test Conditions
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 15.5 to 27 V
∆VO(*)
Line Regulation
VI = 14.5 to 30 V
VI = 16 to 22 V
∆VO(*)
Id
∆Id
Load Regulation
SVR
Typ.
Max.
Unit
11.5
12
12.5
V
11.4
12
12.6
V
TJ = 25°C
120
mV
TJ = 25°C
60
IO = 5 mA to 1.5 A
TJ = 25°C
100
IO = 250 to 750 mA
TJ = 25°C
60
PO ≤ 15W
mV
Quiescent Current
TJ = 25°C
6
mA
IO = 5 mA to 1 A
0.5
mA
VI = 15 to 30 V
0.8
eN
Min.
IO = 5 mA
1.5
B =10Hz to 100KHz
TJ = 25°C
f = 120Hz
VI = 15 to 25 V
Vd
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
mV/°C
40
61
µV/VO
dB
TJ = 25°C
2
2.5
TJ = 25°C
0.75
1.2
A
2.2
3.3
A
18
1.3
V
mΩ
Symbol
Parameter
Test Conditions
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 18.5 to 30 V
∆VO(*)
Line Regulation
VI = 17.5 to 30 V
VI = 20 to 26 V
∆VO(*)
Id
∆Id
Load Regulation
SVR
Typ.
Max.
Unit
14.4
15
15.6
V
14.25
15
15.75
V
TJ = 25°C
150
mV
TJ = 25°C
75
IO = 5 mA to 1.5 A
TJ = 25°C
150
IO = 250 to 750 mA
TJ = 25°C
75
PO ≤ 15W
mV
Quiescent Current
TJ = 25°C
6
mA
IO = 5 mA to 1 A
0.5
mA
VI = 18.5 to 30 V
0.8
eN
Min.
IO = 5 mA
1.8
B =10Hz to 100KHz
TJ = 25°C
f = 120Hz
VI = 18.5 to 28.5 V
Vd
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
mV/°C
40
60
µV/VO
dB
TJ = 25°C
2
2.5
TJ = 25°C
0.75
1.2
A
2.2
3.3
A
19
1.3
V
mΩ
7/34
L7800 SERIES
Symbol
Parameter
Test Conditions
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 22 to 33 V
∆VO(*)
Line Regulation
VI = 21 to 33 V
VI = 24 to 30 V
∆VO(*)
Id
∆Id
Load Regulation
SVR
Typ.
Max.
Unit
17.3
18
18.7
V
17.1
18
18.9
V
TJ = 25°C
180
mV
TJ = 25°C
90
IO = 5 mA to 1.5 A
TJ = 25°C
180
IO = 250 to 750 mA
TJ = 25°C
90
PO ≤ 15W
mV
Quiescent Current
TJ = 25°C
6
mA
IO = 5 mA to 1 A
0.5
mA
VI = 22 to 33 V
0.8
eN
Min.
IO = 5 mA
2.3
B =10Hz to 100KHz
TJ = 25°C
f = 120Hz
VI = 22 to 32 V
Vd
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
mV/°C
40
59
µV/VO
dB
TJ = 25°C
2
2.5
TJ = 25°C
0.75
1.2
A
2.2
3.3
A
22
1.3
V
mΩ
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
19.2
20
20.8
V
19
20
21
V
mV
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 24 to 35 V
∆VO(*)
Line Regulation
VI = 22.5 to 35 V
TJ = 25°C
200
VI = 26 to 32 V
TJ = 25°C
100
IO = 5 mA to 1.5 A
TJ = 25°C
200
IO = 250 to 750 mA
TJ = 25°C
100
∆VO(*)
Id
∆Id
Load Regulation
SVR
mV
Quiescent Current
TJ = 25°C
6
mA
IO = 5 mA to 1 A
0.5
mA
VI = 24 to 35 V
0.8
eN
PO ≤ 15W
Unit
IO = 5 mA
2.5
B =10Hz to 100KHz
TJ = 25°C
f = 120Hz
VI = 24 to 35 V
Vd
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
mV/°C
40
58
µV/VO
dB
TJ = 25°C
2
2.5
TJ = 25°C
0.75
1.2
A
2.2
3.3
A
24
1.3
V
mΩ
8/34
L7800 SERIES
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 28 to 38 V
∆VO(*)
Line Regulation
VI = 27 to 38 V
VI = 30 to 36 V
IO = 5 mA to 1.5 A
TJ = 25°C
240
IO = 250 to 750 mA
TJ = 25°C
120
∆VO(*)
Id
∆Id
Load Regulation
SVR
23
24
25
V
22.8
24
25.2
V
TJ = 25°C
240
mV
TJ = 25°C
120
PO ≤ 15W
mV
Quiescent Current
TJ = 25°C
6
mA
IO = 5 mA to 1 A
0.5
mA
VI = 28 to 38 V
0.8
eN
Unit
IO = 5 mA
3
B =10Hz to 100KHz
TJ = 25°C
f = 120Hz
VI = 28 to 38 V
Vd
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
mV/°C
40
56
µV/VO
dB
TJ = 25°C
2
2.5
TJ = 25°C
0.75
1.2
A
2.2
3.3
A
28
1.3
V
mΩ
Table 12: Electrical Characteristics Of L7805C (refer to the test circuits, TJ = 0 to 125°C, VI = 10V,
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 7 to 20 V
∆VO(*)
Line Regulation
VI = 7 to 25 V
VI = 8 to 12 V
IO = 5 mA to 1.5 A
TJ = 25°C
100
IO = 250 to 750 mA
TJ = 25°C
50
∆VO(*)
Id
∆Id
Load Regulation
SVR
4.8
5
5.2
V
4.75
5
5.25
V
TJ = 25°C
3
100
mV
TJ = 25°C
1
50
PO ≤ 15W
mV
Quiescent Current
TJ = 25°C
8
mA
IO = 5 mA to 1 A
0.5
mA
VI = 7 to 25 V
0.8
eN
Unit
IO = 5 mA
B =10Hz to 100KHz
VI = 8 to 18 V
Vd
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
TJ = 25°C
f = 120Hz
-1.1
mV/°C
40
µV/VO
62
dB
TJ = 25°C
2
V
17
mΩ
TJ = 25°C
0.75
A
2.2
A
9/34
L7800 SERIES
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 8 to 20 V
∆VO(*)
Line Regulation
VI = 7 to 25 V
VI = 8 to 12 V
IO = 5 mA to 1.5 A
TJ = 25°C
105
IO = 250 to 750 mA
TJ = 25°C
52
∆VO(*)
Id
∆Id
Load Regulation
SVR
5.0
5.2
5.4
V
4.95
5.2
5.45
V
TJ = 25°C
3
105
mV
TJ = 25°C
1
52
PO ≤ 15W
mV
Quiescent Current
TJ = 25°C
8
mA
IO = 5 mA to 1 A
0.5
mA
VI = 7 to 25 V
1.3
eN
Unit
IO = 5 mA
B =10Hz to 100KHz
VI = 8 to 18 V
Vd
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
TJ = 25°C
f = 120Hz
-1
mV/°C
42
µV/VO
61
dB
TJ = 25°C
2
V
17
mΩ
TJ = 25°C
0.75
A
2.2
A
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
5.75
6
6.25
V
5.7
6
6.3
V
120
mV
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 8 to 21 V
∆VO(*)
Line Regulation
VI = 8 to 25 V
VI = 9 to 13 V
TJ = 25°C
60
∆VO(*)
Load Regulation
IO = 5 mA to 1.5 A
TJ = 25°C
120
IO = 250 to 750 mA
TJ = 25°C
60
Id
∆Id
Quiescent Current
TJ = 25°C
IO = 5 mA to 1 A
PO ≤ 15W
TJ = 25°C
VI = 8 to 25 V
eN
SVR
B =10Hz to 100KHz
VI = 9 to 19 V
Vd
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
TJ = 25°C
TJ = 25°C
8
mA
0.5
mA
1.3
IO = 5 mA
mV
TJ = 25°C
f = 120Hz
-0.8
mV/°C
45
µV/VO
59
dB
2
V
19
mΩ
0.55
A
2.2
A
10/34
L7800 SERIES
Symbol
Parameter
Test Conditions
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 10.5 to 25 V
∆VO(*)
Line Regulation
VI = 10.5 to 25 V
VI = 11 to 17 V
∆VO(*)
Id
∆Id
Load Regulation
SVR
Typ.
Max.
Unit
7.7
8
8.3
V
7.6
8
8.4
V
TJ = 25°C
160
mV
TJ = 25°C
80
IO = 5 mA to 1.5 A
TJ = 25°C
160
IO = 250 to 750 mA
TJ = 25°C
80
PO ≤ 15W
mV
Quiescent Current
TJ = 25°C
8
mA
IO = 5 mA to 1 A
0.5
mA
VI = 10.5 to 25 V
1
eN
Min.
IO = 5 mA
B =10Hz to 100KHz
TJ = 25°C
f = 120Hz
VI = 11.5 to 21.5 V
Vd
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
-0.8
mV/°C
52
µV/VO
56
dB
TJ = 25°C
2
V
16
mΩ
TJ = 25°C
0.45
A
2.2
A
Table 16: Electrical Characteristics Of L7885C (refer to the test circuits, TJ = 0 to 125°C, VI = 14.5V,
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 11 to 26 V
∆VO(*)
Line Regulation
VI = 11 to 27 V
VI = 11.5 to 17.5 V
IO = 5 mA to 1.5 A
TJ = 25°C
160
IO = 250 to 750 mA
TJ = 25°C
80
∆VO(*)
Id
∆Id
Load Regulation
Quiescent Current
TJ = 25°C
IO = 5 mA to 1 A
8.2
8.5
8.8
V
8.1
8.5
8.9
V
TJ = 25°C
160
mV
TJ = 25°C
80
PO ≤ 15W
VI = 11 to 27 V
eN
SVR
IO = 5 mA
B =10Hz to 100KHz
TJ = 25°C
f = 120Hz
VI = 12 to 22 V
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
mV
8
mA
0.5
mA
1
Vd
Unit
-0.8
mV/°C
55
µV/VO
56
dB
TJ = 25°C
2
V
16
mΩ
TJ = 25°C
0.45
A
2.2
A
11/34
L7800 SERIES
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 11.5 to 26 V
∆VO(*)
Line Regulation
VI = 11.5 to 26 V
VI = 12 to 18 V
IO = 5 mA to 1.5 A
TJ = 25°C
180
IO = 250 to 750 mA
TJ = 25°C
90
∆VO(*)
Id
∆Id
Load Regulation
SVR
8.64
9
9.36
V
8.55
9
9.45
V
TJ = 25°C
180
mV
TJ = 25°C
90
PO ≤ 15W
mV
Quiescent Current
TJ = 25°C
8
mA
IO = 5 mA to 1 A
0.5
mA
VI = 11.5 to 26 V
1
eN
Unit
IO = 5 mA
B =10Hz to 100KHz
TJ = 25°C
f = 120Hz
VI = 12 to 23 V
Vd
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
-1
mV/°C
70
µV/VO
55
dB
TJ = 25°C
2
V
17
mΩ
TJ = 25°C
0.40
A
2.2
A
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 12.5 to 26 V
∆VO(*)
Line Regulation
VI = 12.5 to 26 V
VI = 13.5 to 19 V
IO = 5 mA to 1.5 A
TJ = 25°C
200
IO = 250 to 750 mA
TJ = 25°C
100
∆VO(*)
Id
∆Id
Load Regulation
SVR
9.6
10
10.4
V
9.5
10
10.5
V
TJ = 25°C
200
mV
TJ = 25°C
100
PO ≤ 15W
mV
Quiescent Current
TJ = 25°C
8
mA
IO = 5 mA to 1 A
0.5
mA
VI = 12.5 to 26 V
1
eN
Unit
IO = 5 mA
B =10Hz to 100KHz
TJ = 25°C
f = 120Hz
VI = 13 to 23 V
Vd
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
-1
mV/°C
70
µV/VO
55
dB
TJ = 25°C
2
V
17
mΩ
TJ = 25°C
0.40
A
2.2
A
12/34
L7800 SERIES
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 14.5 to 27 V
∆VO(*)
Line Regulation
VI = 14.5 to 30 V
VI = 16 to 22 V
IO = 5 mA to 1.5 A
TJ = 25°C
240
IO = 250 to 750 mA
TJ = 25°C
120
∆VO(*)
Id
∆Id
Load Regulation
SVR
11.5
12
12.5
V
11.4
12
12.6
V
TJ = 25°C
240
mV
TJ = 25°C
120
PO ≤ 15W
mV
Quiescent Current
TJ = 25°C
8
mA
IO = 5 mA to 1 A
0.5
mA
VI = 14.5 to 30 V
1
eN
Unit
IO = 5 mA
B =10Hz to 100KHz
TJ = 25°C
f = 120Hz
VI = 15 to 25 V
Vd
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
-1
mV/°C
75
µV/VO
55
dB
TJ = 25°C
2
V
18
mΩ
TJ = 25°C
0.35
A
2.2
A
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 17.5 to 30 V
∆VO(*)
Line Regulation
VI = 17.5 to 30 V
VI = 20 to 26 V
IO = 5 mA to 1.5 A
TJ = 25°C
300
IO = 250 to 750 mA
TJ = 25°C
150
∆VO(*)
Id
∆Id
Load Regulation
SVR
14.5
15
15.6
V
14.25
15
15.75
V
TJ = 25°C
300
mV
TJ = 25°C
150
PO ≤ 15W
mV
Quiescent Current
TJ = 25°C
8
mA
IO = 5 mA to 1 A
0.5
mA
VI = 17.5 to 30 V
1
eN
Unit
IO = 5 mA
B =10Hz to 100KHz
TJ = 25°C
f = 120Hz
VI = 18.5 to 28.5 V
Vd
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
-1
mV/°C
90
µV/VO
54
dB
TJ = 25°C
2
V
19
mΩ
TJ = 25°C
0.23
A
2.2
A
13/34
L7800 SERIES
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 21 to 33 V
∆VO(*)
Line Regulation
VI = 21 to 33 V
VI = 24 to 30 V
IO = 5 mA to 1.5 A
TJ = 25°C
360
IO = 250 to 750 mA
TJ = 25°C
180
∆VO(*)
Id
∆Id
Load Regulation
Quiescent Current
TJ = 25°C
IO = 5 mA to 1 A
17.3
18
18.7
V
17.1
18
18.9
V
TJ = 25°C
360
mV
TJ = 25°C
180
PO ≤ 15W
VI = 21 to 33 V
eN
SVR
IO = 5 mA
B =10Hz to 100KHz
TJ = 25°C
f = 120Hz
VI = 22 to 32 V
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
mV
8
mA
0.5
mA
1
Vd
Unit
-1
mV/°C
110
µV/VO
53
dB
TJ = 25°C
2
V
22
mΩ
TJ = 25°C
0.20
A
2.1
A
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
19.2
20
20.8
V
19
20
21
V
mV
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 23 to 35 V
∆VO(*)
Line Regulation
VI = 22.5 to 35 V
TJ = 25°C
400
VI = 26 to 32 V
TJ = 25°C
200
IO = 5 mA to 1.5 A
TJ = 25°C
400
IO = 250 to 750 mA
TJ = 25°C
200
∆VO(*)
Id
∆Id
Load Regulation
Quiescent Current
TJ = 25°C
IO = 5 mA to 1 A
PO ≤ 15W
VI = 23 to 35 V
eN
SVR
IO = 5 mA
B =10Hz to 100KHz
TJ = 25°C
f = 120Hz
VI = 24 to 35 V
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
mV
8
mA
0.5
mA
1
Vd
Unit
-1
mV/°C
150
µV/VO
52
dB
TJ = 25°C
2
V
24
mΩ
TJ = 25°C
0.18
A
2.1
A
14/34
L7800 SERIES
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
VO
Output Voltage
TJ = 25°C
VO
Output Voltage
IO = 5 mA to 1 A
VI = 27 to 38 V
∆VO(*)
Line Regulation
VI = 27 to 38 V
VI = 30 to 36 V
IO = 5 mA to 1.5 A
TJ = 25°C
480
IO = 250 to 750 mA
TJ = 25°C
240
∆VO(*)
Id
∆Id
Load Regulation
Quiescent Current
TJ = 25°C
IO = 5 mA to 1 A
23
24
25
V
22.8
24
25.2
V
TJ = 25°C
480
mV
TJ = 25°C
240
PO ≤ 15W
VI = 27 to 38 V
eN
SVR
IO = 5 mA
B =10Hz to 100KHz
TJ = 25°C
f = 120Hz
VI = 28 to 38 V
Dropout Voltage
IO = 1 A
RO
Output Resistance
f = 1 KHz
Isc
VI = 35 V
Iscp
TJ = 25°C
mV
8
mA
0.5
mA
1
Vd
Unit
-1.5
mV/°C
170
µV/VO
50
dB
TJ = 25°C
2
V
28
mΩ
TJ = 25°C
0.15
A
2.1
A
Figure 8: Dropout Voltage vs Junction
Temperature
Figure 9: Peak Output Current vs Input/output
Differential Voltage
15/34
L7800 SERIES
Figure 10: Supply Voltage Rejection vs
Frequency
Figure 13: Quiescent Current vs Junction
Temperature
Figure 11: Output Voltage vs Junction
Temperature
Figure 14: Load Transient Response
Figure 12: Output Impedance vs Frequency
Figure 15: Line Transient Response
16/34
L7800 SERIES
Figure 16: Quiescent Current vs Input Voltage
Figure 17: Fixed Output Regulator
NOTE:
1. To specify an output voltage, substitute voltage value for "XX".
2. Although no output capacitor is need for stability, it does improve transient response.
3. Required if regulator is locate an appreciable distance from power supply filter.
Figure 18: Current Regulator
Vxx
IO = 
+ Id
R1
17/34
L7800 SERIES
Figure 19: Circuit for Increasing Output Voltage
IR1 ≥ 5 Id
R2
VO = VXX (1+  ) + Id R2
R1
Figure 20: Adjustable Output Regulator (7 to 30V)
Figure 21: 0.5 to 10V Regulator
R4
VO = V xx 
R1
18/34
L7800 SERIES
Figure 22: High Current Voltage Regulator
VBEQ1
R1 = 
IQ1
IREQ - 
βQ1
VBEQ1
IO = IREG + Q1 (IREG )
R1
Figure 23: High Output Current with Short Circuit Protection
VBEQ2
RSC = 
ISC
Figure 24: Tracking Voltage Regulator
19/34
L7800 SERIES
Figure 25: Split Power Supply (± 15V - 1 A)
* Against potential latch-up problems.
Figure 26: Negative Output Voltage Circuit
Figure 27: Switching Regulator
20/34
L7800 SERIES
Figure 28: High Input Voltage Circuit
VIN = VI - (VZ + VBE)
Figure 29: High Input Voltage Circuit
Figure 30: High Output Voltage Regulator
Figure 31: High Input and Output Voltage
VO = VXX + VZ1
21/34
L7800 SERIES
Figure 32: Reducing Power Dissipation with Dropping Resistor
VI(min) - VXX - VDROP(max)
R = 
IO(max) + Id(max)
Figure 33: Remote Shutdown
Figure 34: Power AM Modulator (unity voltage gain, IO ≤ 0.5)
NOTE: The circuit performs well up to 100 KHz.
22/34
L7800 SERIES
Figure 35: Adjustable Output Voltage with Temperature Compensation
R2
VO = VXX (1+ )
+ V BE
R
1
NOTE: Q2 is connected as a diode in order to compensate the variation of the Q1 VBE with the temperature. C allows a slow rise time of the VO.
Figure 36: Light Controllers (VOmin = VXX + VBE)
VO falls when the light goes up
VO rises when the light goes up
Figure 37: Protection against Input Short-Circuit with High Capacitance Loads
Application with high capacitance loads and an output voltage greater than 6 volts need an external diode (see fig. 33) to protect the device
against input short circuit. In this case the input voltage falls rapidly while the output voltage decrease slowly. The capacitance discharges by
means of the Base-Emitter junction of the series pass transistor in the regulator. If the energy is sufficiently high, the transistor may be destroyed. The external diode by-passes the current from the IC to ground.
23/34
L7800 SERIES
TO-3 MECHANICAL DATA
mm.
DIM.
MIN.
A
inch
TYP
MAX.
MIN.
TYP.
11.85
B
0.96
MAX.
0.466
1.05
1.10
0.037
0.041
0.043
C
1.70
0.066
D
8.7
0.342
E
20.0
0.787
G
10.9
0.429
N
16.9
0.665
P
26.2
R
3.88
1.031
4.09
U
0.152
39.5
V
1.555
30.10
1.185
A
P
D
C
O
N
B
V
E
G
U
0.161
R
P003C/C
24/34
L7800 SERIES
TO-220 (A TYPE) MECHANICAL DATA
DIM.
mm.
MIN.
TYP
inch
MAX.
MIN.
A
4.40
4.60
0.173
TYP.
MAX.
0.181
b
0.61
0.88
0.024
0.034
b1
1.15
1.70
0.045
0.067
c
0.49
0.70
0.019
0.027
D
15.25
15.75
0.600
0.620
E
10.0
10.40
0.393
0.409
e
2.4
2.7
0.094
0.106
e1
4.95
5.15
0.194
0.203
F
1.23
1.32
0.048
0.051
H1
6.2
6.6
0.244
0.260
J1
2.40
2.72
0.094
0.107
L
13.0
14.0
0.511
0.551
L1
3.5
3.93
0.137
0.154
L20
16.4
L30
0.645
28.9
1.138
φP
3.75
3.85
0.147
0.151
Q
2.65
2.95
0.104
0.116
0015988/N
25/34
L7800 SERIES
TO-220 (C TYPE) MECHANICAL DATA
DIM.
mm.
MIN.
MAX.
MIN.
A
4.30
4.70
0.169
0.185
b
0.70
0.90
0.028
0.035
b1
1.42
1.62
0.056
0.064
c
0.45
0.60
0.018
D
E
TYP
inch
15.70
9.80
TYP.
0.024
0.618
10.20
0.386
0.402
e
2.54
0.100
e1
5.08
0.200
F
1.25
H1
MAX.
1.39
0.049
6.5
0.055
0.256
J1
2.20
2.60
0.087
0.202
L
12.88
13.28
0.507
0.523
L1
L20
3
15.70
L30
0.118
16.1
0.618
28.9
0.634
1.138
φP
3.50
3.70
0.138
0.146
Q
2.70
2.90
0.106
0.114
0015988/N
26/34
L7800 SERIES
TO-220 (E TYPE) MECHANICAL DATA
DIM.
mm.
MIN.
TYP
inch
MAX.
MIN.
A
4.47
4.67
0.176
TYP.
0.184
b
0.70
0.91
0.028
0.036
b1
1.17
1.37
0.046
0.054
c
0.31
0.53
0.012
0.021
D
14.60
15.70
0.575
0.618
E
9.96
10.36
0.392
0.408
e
2.54
0.100
e1
5.08
0.200
MAX.
F
1.17
1.37
0.046
0.054
H1
6.1
6.8
0.240
0.268
J1
2.52
2.82
0.099
0.111
L
12.70
13.80
0.500
0.543
L1
3.20
3.96
0.126
0.156
L20
15.21
16.77
0.599
0.660
φP
3.73
3.94
0.147
0.155
Q
2.59
2.89
0.102
0.114
7655923/A
27/34
L7800 SERIES
TO-220FP MECHANICAL DATA
mm.
DIM.
MIN.
TYP
inch
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
B
2.5
2.7
0.098
0.106
D
2.5
2.75
0.098
0.108
E
0.45
0.70
0.017
0.027
F
0.75
1
0.030
0.039
F1
1.15
1.50
0.045
0.059
F2
1.15
1.50
0.045
0.059
G
4.95
5.2
0.194
0.204
G1
2.4
2.7
0.094
0.106
H
10.0
10.40
0.393
L2
L3
16
0.409
0.630
28.6
30.6
1.126
1.204
L4
9.8
10.6
0.385
0.417
L5
2.9
3.6
0.114
0.142
L6
15.9
16.4
0.626
0.645
L7
9
9.3
0.354
0.366
DIA.
3
3.2
0.118
0.126
7012510A-H
28/34
L7800 SERIES
TO-220FM MECHANICAL DATA
DIM.
mm.
MIN.
TYP
inch
MAX.
MIN.
TYP.
MAX.
A
4.50
4.90
0.177
0.193
B
2.34
2.74
0.092
0.108
D
2.56
2.96
0.101
0.117
E
0.45
0.60
0.018
F
0.70
0.90
0.028
0.50
F1
0.020
0.035
1.47
G
0.058
5.08
G1
2.34
H
9.96
L2
2.54
0.024
0.200
2.74
0.092
10.36
0.392
15.8
0.100
0.108
0.408
0.622
L4
9.45
10.05
0.372
0.396
L6
15.67
16.07
0.617
0.633
L7
8.99
9.39
0.354
0.370
L8
DIA.
3.30
3.08
0.130
3.28
0.121
0.129
7012510C-H
29/34
L7800 SERIES
D2PAK (A TYPE) MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.4
4.6
0.173
0.181
A1
0.03
0.23
0.001
0.009
b
0.7
0.93
0.027
0.036
b2
1.14
1.7
0.044
0.067
c
0.45
0.6
0.017
0.023
c2
1.23
1.36
0.048
0.053
D
8.95
8
9.35
0.352
0.368
E
10
10.4
E1
8.5
D1
e
0.315
0.393
0.409
0.335
2.54
0.100
e1
4.88
5.28
0.192
0.208
H
15
15.85
0.590
0.624
J1
2.49
2.69
0.098
0.106
L
2.29
2.79
0.090
0.110
L1
1.27
1.4
0.050
0.055
L2
1.3
1.75
0.051
0.069
8°
0°
R
V2
0.4
0°
0.016
8°
0079457/J
30/34
L7800 SERIES
D2PAK (C TYPE) MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.3
4.7
0.169
0.185
A1
0
0.20
0.000
0.008
0.035
b
0.70
0.90
0.028
b2
1.17
1.37
0.046
c
0.45
0.50
0.6
0.018
0.020
0.024
c2
1.25
1.30
1.40
0.049
0.051
0.055
9.2
9.4
0.354
0.362
0.370
D
9.0
D1
7.5
E
9.8
E1
7.5
0.054
0.295
10.2
0.386
0.402
0.295
e
2.54
e1
5.08
0.200
H
15
J1
2.20
2.60
0.087
0.102
L
1.79
2.79
0.070
0.110
L1
1.0
1.4
0.039
0.055
L2
1.2
1.6
0.047
0.063
3°
0°
R
V2
15.30
0.100
15.60
0.591
0.3
0°
0.602
0.614
0.012
3°
0079457/J
31/34
L7800 SERIES
Tape & Reel D2PAK-P 2PAK-D 2PAK/A-P 2PAK/A MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MIN.
TYP.
180
13.0
13.2
MAX.
7.086
C
12.8
D
20.2
0.795
N
60
2.362
T
32/34
MAX.
0.504
0.512
14.4
0.519
0.567
Ao
10.50
10.6
10.70
0.413
0.417
0.421
Bo
15.70
15.80
15.90
0.618
0.622
0.626
Ko
4.80
4.90
5.00
0.189
0.193
0.197
Po
3.9
4.0
4.1
0.153
0.157
0.161
P
11.9
12.0
12.1
0.468
0.472
0.476
L7800 SERIES
Table 24: Revision History
Date
Revision
09-Nov-2004
12
Description of Changes
Add New Part Number.
33/34
L7800 SERIES
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
All other names are the property of their respective owners
© 2004 STMicroelectronics - All Rights Reserved
STMicroelectronics group of companies
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www.st.com
34/34
BC548 / BC548A / BC548B / BC548C
BC548
BC548A
BC548B
BC548C
E
B
TO-92
C
NPN General Purpose Amplifier
This device is designed for use as general purpose amplifiers
and switches requiring collector currents to 300 mA. Sourced from
Process 10. See PN100A for characteristics.
Symbol
Parameter
Value
Units
VCEO
Collector-Emitter Voltage
30
V
VCES
Collector-Base Voltage
30
V
VEBO
Emitter-Base Voltage
5.0
V
IC
Collector Current - Continuous
500
mA
TJ, Tstg
Operating and Storage Junction Temperature Range
-55 to +150
°C
NOTES:
1) These ratings are based on a maximum junction temperature of 150 degrees C.
2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.
Symbol
PD
Characteristic
RθJC
Total Device Dissipation
Derate above 25°C
Thermal Resistance, Junction to Case
RθJA
 1997 Fairchild Semiconductor Corporation
Max
Units
BC548 / A / B / C
625
5.0
83.3
mW
mW/°C
°C/W
200
°C/W
548-ABC, Rev B
(continued)
Symbol
Parameter
Test Conditions
Min
Max
Units
OFF CHARACTERISTICS
V(BR)CEO
Collector-Emitter Breakdown Voltage
IC = 10 mA, IB = 0
30
V
V(BR)CBO
Collector-Base Breakdown Voltage
IC = 10 µA, IE = 0
30
V
V(BR)CES
Collector-Base Breakdown Voltage
IC = 10 µA, IE = 0
30
V
V(BR)EBO
Emitter-Base Breakdown Voltage
IE = 10 µA, IC = 0
5.0
V
ICBO
Collector Cutoff Current
VCB = 30 V, IE = 0
VCB = 30 V, IE = 0, TA = +150 °C
15
5.0
nA
µA
800
220
450
800
0.25
0.60
0.70
0.77
V
V
V
V
ON CHARACTERISTICS
hFE
DC Current Gain
VCE = 5.0 V, IC = 2.0 mA
VCE(sat)
Collector-Emitter Saturation Voltage
VBE(on)
Base-Emitter On Voltage
IC = 10 mA, IB = 0.5 mA
IC = 100 mA, IB = 5.0 mA
VCE = 5.0 V, IC = 2.0 mA
VCE = 5.0 V, IC = 10 mA
548
548A
548B
548C
110
110
200
420
0.58
SMALL SIGNAL CHARACTERISTICS
hfe
Small-Signal Current Gain
NF
Noise Figure
IC = 2.0 mA, VCE = 5.0 V,
f = 1.0 kHz
VCE = 5.0 V, IC = 200 µA,
RS = 2.0 kΩ, f = 1.0 kHz,
BW = 200 Hz
125
900
10
dB
BC548 / BC548A / BC548B / BC548C
NPN General Purpose Amplifier
TRADEMARKS
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DOME™
E2CMOSTM
EnSignaTM
FACT™
FAST 
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
PowerTrench 
QFET™
QS™
Quiet Series™
SILENT SWITCHER 
SMART START™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
VCX™
DISCLAIMER
LIFE SUPPORT POLICY
As used herein:
effectiveness.
user.
Definition of Terms
Product Status
Definition
Advance Information
Formative or
In Design
Preliminary
First Production
design.
Full Production
Obsolete
Not In Production
Rev. G
TIP120/121/122
TIP120/121/122
Medium Power Linear Switching Applications
• Complementary to TIP125/126/127
TO-220
1
1.Base
2.Collector
3.Emitter
NPN Epitaxial Darlington Transistor
Absolute Maximum Ratings TC=25°C unless otherwise noted
Symbol
VCBO
Parameter
: TIP120
: TIP121
: TIP122
Value
60
80
100
Units
V
V
V
60
80
100
V
V
V
VCEO
Collector-Emitter Voltage : TIP120
: TIP121
: TIP122
VEBO
5
V
IC
Collector Current (DC)
5
A
ICP
Collector Current (Pulse)
8
A
IB
Base Current (DC)
120
mA
PC
Collector Dissipation (Ta=25°C)
2
W
Collector Dissipation (TC=25°C)
65
W
TJ
Junction Temperature
150
°C
TSTG
Storage Temperature
- 65 ~ 150
°C
Equivalent Circuit
C
B
R1
R2
R1 ≅ 8kΩ
R 2 ≅ 0.12 k Ω
E
Electrical Characteristics TC=25°C unless otherwise noted
Symbol
VCEO(sus)
ICEO
ICBO
Parameter
Collector-Emitter Sustaining Voltage
: TIP120
: TIP121
: TIP122
Test Condition
IC = 100mA, IB = 0
Min.
Max.
60
80
100
Units
V
V
V
Collector Cut-off Current
: TIP120
: TIP121
: TIP122
VCE = 30V, IB = 0
VCE = 40V, IB = 0
VCE = 50V, IB = 0
0.5
0.5
0.5
mA
mA
mA
: TIP120
: TIP121
: TIP122
VCB = 60V, IE = 0
VCB = 80V, IE = 0
VCB = 100V, IE = 0
0.2
0.2
0.2
mA
mA
mA
2
mA
2.0
4.0
V
V
IEBO
Emitter Cut-off Current
VBE = 5V, IC = 0
hFE
* DC Current Gain
VCE = 3V,IC = 0.5A
VCE = 3V, IC = 3A
VCE(sat)
* Collector-Emitter Saturation Voltage
IC = 3A, IB = 12mA
IC = 5A, IB = 20mA
VBE(on)
* Base-Emitter ON Voltage
VCE = 3V, IC = 3A
2.5
V
Cob
Output Capacitance
VCB = 10V, IE = 0, f = 0.1MHz
200
pF
1000
1000
* Pulse Test : PW≤300µs, Duty cycle ≤2%
Rev. A1, June 2001
TIP120/121/122
VBE(sat), VCE(sat)[V], SATURATION VOLTAGE
Typical characteristics
10000
hFE, DC CURRENT GAIN
VCE = 4V
1000
100
0.1
1
10
3.5
IC = 250IB
3.0
2.5
2.0
1.5
V BE(sat)
1.0
V CE(sat)
0.5
0.1
IC[A], COLLECTOR CURRENT
1
10
Figure 1. DC current Gain
Figure 2. Base-Emitter Saturation Voltage
1000
10
10
0.1
1
10
100
1
0.1
TIP120
TIP121
TIP122
0.01
1
VCB[V], COLLECTOR-BASE VOLTAGE
VEB[V], EMITTER-BASE VOLTAGE
s
5m
Cob
Cib
s
1m
100
C
D
Cob[pF] Cib[pF], CAPACITANCE
s
0u
10 us
0
50
f=0.1MHz
10
100
VCE[V], COLLECTOR-EMITTER VOLTAGE
Figure 3. Output and Input Capacitance
vs. Reverse Voltage
Figure 4. Safe Operating Area
80
PC[W], POWER DISSIPATION
70
60
50
40
30
20
10
0
0
25
50
75
100
125
150
175
o
TC[ C], CASE TEMPERATURE
Figure 5. Power Derating
Rev. A1, June 2001
TIP120/121/122
Package Demensions
TO-220
4.50 ±0.20
2.80 ±0.10
(3.00)
+0.10
1.30 –0.05
18.95MAX.
(3.70)
ø3.60 ±0.10
15.90 ±0.20
1.30 ±0.10
(8.70)
(1.46)
9.20 ±0.20
(1.70)
9.90 ±0.20
1.52 ±0.10
0.80 ±0.10
2.54TYP
[2.54 ±0.20]
10.08 ±0.30
(1.00)
13.08 ±0.20
)
(45°
1.27 ±0.10
+0.10
0.50 –0.05
2.40 ±0.20
2.54TYP
[2.54 ±0.20]
10.00 ±0.20
Dimensions in Millimeters
Rev. A1, June 2001
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not
intended to be an exhaustive list of all such trademarks.
STAR*POWER™
FAST®
OPTOPLANAR™
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOS™
EnSigna™
FACT™
FASTr™
FRFET™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MICROWIRE™
OPTOLOGIC™
PACMAN™
POP™
Power247™
PowerTrench®
QFET™
QS™
Quiet Series™
SLIENT SWITCHER®
SMART START™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TruTranslation™
TinyLogic™
UHC™
UltraFET®
VCX™
DISCLAIMER
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
2. A critical component is any component of a life support
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
Definition of Terms
Product Status
Definition
Advance Information
Formative or In
Design
Preliminary
First Production
design.
Full Production
Obsolete
Not In Production
Rev. H3
TIP125/126/127
TIP125/126/127
Medium Power Linear Switching Applications
• Complementary to TIP120/121/122
TO-220
1
1.Base
2.Collector
3.Emitter
PNP Epitaxial Darlington Transistor
Absolute Maximum Ratings TC=25°C unless otherwise noted
Symbol
VCBO
Parameter
: TIP125
: TIP126
: TIP127
Value
- 60
- 80
- 100
Units
V
V
V
VCEO
Collector-Emitter Voltage : TIP125
: TIP126
: TIP127
- 60
- 80
- 100
V
V
V
VEBO
-5
V
IC
Collector Current (DC)
-5
A
ICP
Collector Current (Pulse)
-8
A
IB
Base Current (DC)
- 120
mA
PC
Collector Dissipation (Ta=25°C)
2
Collector Dissipation (TC=25°C)
65
W
Equivalent Circuit
C
B
R1
R2
R1 ≅ 8kΩ
R 2 ≅ 0.12 k Ω
E
W
TJ
Junction Temperature
150
°C
TSTG
Storage Temperature
- 65 ~ 150
°C
Electrical Characteristics TC=25°C unless otherwise noted
Symbol
VCEO(sus)
ICEO
ICBO
Parameter
Collector-Emitter Sustaining Voltage
: TIP125
: TIP126
: TIP127
Test Condition
IC = -100mA, IB = 0
Min.
Max.
-60
-80
-120
Units
V
V
V
: TIP125
: TIP126
: TIP127
VCE = -30V, IB = 0
VCE = -40V, IB = 0
VCE = -50V, IB = 0
-2
-2
-2
mA
mA
mA
: TIP125
: TIP126
: TIP127
VCB = -60V, IE = 0
VCB = -80V, IE = 0
VCB = -100V, IE = 0
-1
-1
-1
mA
mA
mA
-2
mA
V
V
IEBO
Emitter Cut-off Current
VBE = -5V, IC = 0
hFE
* DC Current Gain
VCE = -3V, IC = 0.5A
VCE = -3V, IC = -3A
VCE(sat)
* Collector-Emitter Saturation Voltage
IC = -3A, IB = -12mA
IC=-5A, IB=-20mA
-2
-4
VBE(on)
* Base-Emitter ON Voltage
VCE = -3V, IC = -3A
-2.5
V
Cob
Output Capacitance
VCB = -10V, IE = 0, f = 0.1MHz
300
pF
1000
1000
* Pulse Test : PW≤300µs, Duty cycle ≤2%
Rev. A1, June 2001
TIP125/126/127
VBE(sat), VCE(sat)[V], SATURATION VOLTAGE
10k
hFE, DC CURRENT GAIN
V CE = 4V
1k
100
-0.1
-1
-10
-3.5
IC = 250IB
-3.0
-2.5
-2.0
-1.5
-1.0
V BE(sat)
VCE(sat)
-0.5
-0.1
IC [A], COLLECTOR CURRENT
-1
-10
Figure 1. DC current Gain
Figure 2. Base-Emitter Saturation Voltage
1000
-10
Cob[pF] Cib[pF], CAPACITANCE
s
5m
Cob
Cib
C
D
100
s
0u
50 ms
1
s
0u
10
f = 0.1MHz
-1
-0.1
TIP125
TIP126
TIP127
10
-0.1
-1
-10
-100
-0.01
-1
VCB[V], COLLECTOR-BASE VOLTAGE
VEB[V], EMITTER-BASE VOLTAGE
-10
-100
VCE[V], COLLECTOR-EMITTER VOLTAGE
Figure 3. Output and Input Capacitance
vs. Reverse Voltage
Figure 4. Safe Operating Area
90
PC[W], POWER DISSIPATION
75
60
45
30
15
0
0
25
50
75
100
125
150
175
o
TC[ C], CASE TEMPERATURE
Figure 5. Power Derating
Rev. A1, June 2001
TIP125/126/127
Package Demensions
TO-220
4.50 ±0.20
2.80 ±0.10
(3.00)
+0.10
1.30 –0.05
18.95MAX.
(3.70)
ø3.60 ±0.10
15.90 ±0.20
1.30 ±0.10
(8.70)
(1.46)
9.20 ±0.20
(1.70)
9.90 ±0.20
1.52 ±0.10
0.80 ±0.10
2.54TYP
[2.54 ±0.20]
10.08 ±0.30
(1.00)
13.08 ±0.20
)
(45°
1.27 ±0.10
+0.10
0.50 –0.05
2.40 ±0.20
2.54TYP
[2.54 ±0.20]
10.00 ±0.20
Dimensions in Millimeters
Rev. A1, June 2001
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not
intended to be an exhaustive list of all such trademarks.
STAR*POWER™
FAST®
OPTOPLANAR™
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOS™
EnSigna™
FACT™
FASTr™
FRFET™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MICROWIRE™
OPTOLOGIC™
PACMAN™
POP™
Power247™
PowerTrench®
QFET™
QS™
Quiet Series™
SLIENT SWITCHER®
SMART START™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TruTranslation™
TinyLogic™
UHC™
UltraFET®
VCX™
DISCLAIMER
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
2. A critical component is any component of a life support
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
Definition of Terms
Product Status
Definition
Advance Information
Formative or In
Design
Preliminary
First Production
design.
Full Production
Obsolete
Not In Production
Rev. H3
Revised March 2000
DM74LS14
Hex Inverter with Schmitt Trigger Inputs
General Description
This device contains six independent gates each of which
performs the logic INVERT function. Each input has hysteresis which increases the noise immunity and transforms a
slowly changing input signal to a fast changing, jitter free
output.
Ordering Code:
Order Number
Package Number
Package Description
DM74LS14M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
DM74LS14SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74LS14N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Y=A
Input
Output
A
Y
L
H
H
L
H = HIGH Logic Level
L = LOW Logic Level
© 2000 Fairchild Semiconductor Corporation
DS006353
DM74LS14 Hex Inverter with Schmitt Trigger Inputs
August 1986
DM74LS14
Absolute Maximum Ratings(Note 1)
Supply Voltage
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
7V
Input Voltage
7V
0°C to +70°C
Operating Free Air Temperature Range
−65°C to +150°C
Recommended Operating Conditions
Min
Nom
Max
VCC
Symbol
Supply Voltage
Parameter
4.75
5
5.25
Units
V
VT+
Positive-Going Input Threshold Voltage (Note 2)
1.4
1.6
1.9
V
VT−
Negative-Going Input Threshold Voltage (Note 2)
0.5
0.8
1
V
HYS
Input Hysteresis (Note 2)
0.4
0.8
IOH
HIGH Level Output Current
−0.4
mA
IOL
LOW Level Output Current
8
mA
TA
Free Air Operating Temperature
70
°C
V
0
Note 2: VCC = 5V.
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
VI
Input Clamp Voltage
VCC = Min, II = −18 mA
VOH
HIGH Level
VCC = Min, IOH = Max
Output Voltage
VIL = Max
VOL
IT+
LOW Level
VCC = Min, IOL = Max
Output Voltage
VIH = Min
Input Current at
Min
Typ
(Note 3)
2.7
Max
Units
−1.5
V
3.4
V
0.35
0.5
VCC = Min, IOL = 4 mA
0.25
0.4
VCC = 5V, VI = VT+
−0.14
mA
VCC = 5V, VI = VT−
−0.18
mA
V
Positive-Going Threshold
IT−
Input Current at
Negative-Going Threshold
II
Input Current @ Max Input Voltage
VCC = Max, VI = 7V
0.1
IIH
HIGH Level Input Current
VCC = Max, VI = 2.7V
20
µA
IIL
LOW Level Input Current
−0.4
mA
IOS
Short Circuit Output Current
VCC = Max (Note 4)
−100
mA
ICCH
Supply Current with Outputs HIGH
VCC = Max
8.6
16
mA
ICCL
Supply Current with Outputs LOW
VCC = Max
12
21
mA
−20
mA
Note 3: All typicals are at VCC = 5V, TA = 25°C.
Note 4: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Switching Characteristics
at VCC = 5V and TA = 25°C
RL = 2 kΩ
Symbol
tPLH
CL = 15 pF
Parameter
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
HIGH-to-LOW Level Output
2
CL = 50 pF
Units
Min
Max
Min
Max
5
22
8
25
ns
5
22
10
33
ns
DM74LS14
Physical Dimensions inches (millimeters) unless otherwise noted
Package Number M14A
3
DM74LS14
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
4
DM74LS14 Hex Inverter with Schmitt Trigger Inputs
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
5
This datasheet has been downloaded from:
www.DatasheetCatalog.com
Datasheets for electronic components.
DM74LS48
BCD to 7-Segment Decoder
General Description
The ’LS48 translates four lines of BCD (8421) input data
into the 7-segment numeral code and provides seven corresponding outputs having pull-up resistors, as opposed to
totem pole pull-ups. These outputs can serve as logic signals, with a HIGH output corresponding to a lighted lamp
segment, or can provide a 1.3 mA base current to npn lamp
driver transistors. Auxiliary inputs provide lamp test, blanking and cascadable zero-suppression functions.
The ’LS48 decodes the input data in the pattern indicated in
the Truth Table and the segment identification illustration.
Connection Diagram
Dual-In-Line Package
TL/F/10172 – 1
Order Number DM74LS48M or DM74LS48N
See NS Package Number M16A or N16E
C1995 National Semiconductor Corporation
TL/F/10172
RRD-B30M105/Printed in U. S. A.
DM74LS48 BCD to 7-Segment Decoder
January 1992
Absolute Maximum Ratings (Note)
Supply Voltage
7V
Input Voltage
7V
DM74LS
Note: The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation .
0§ C to a 70§ C
b 65§ C to a 150§ C
Symbol
DM74LS48
Parameter
VCC
Supply Voltage
VIH
High Level Input Voltage
VIL
Low Level Input Voltage
IOH
Units
Min
Nom
Max
4.75
5
5.25
V
2
V
0.8
V
High Level Output Current
b 50
mA
IOL
Low Level Output Current
6.0
mA
TA
70
§C
0
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
(Note 1)
Max
Units
b 1.5
V
VI
Input Clamp Voltage
VCC e Min, II e b18 mA
VOH
High Level Output
Voltage
VCC Min, IOH e Max,
VIL e Max
IOFF
Output High Current
Segment Outputs
VCC e Min, VO e 0.85V
VOL
Low Level Output
Voltage
VCC e Min, IOL e Max,
VIH e Min
0.5
IOL e 2.0 mA, VCC e Min
0.4
VCC e Max, VI e 7V
0.1
2.4
V
b 1.3
mA
V
II
Input Current @ Max
Input Voltage
IIH
High Level Input Current
VCC e Max, VI e 2.7V
20
mA
IIL
Low Level Input Current
VCC e Max, VI e 0.4V
b 0.4
mA
IOS
Short Circuit
Output Current
VCC e Max, VO e 0V
at BI/RBO (Note 2)
b2
mA
ICCH
Supply Current
VCC e Max, VIN e 4.5V
38
mA
b 0.3
mA
Note 1: All typicals are at VCC e 5V, TA e 25§ C.
Switching Characteristics at VCC e 5V and TA e 25§ C
Symbol
CL e 15 pF
Parameter
Min
Units
Max
tPLH
tPHL
An to a–g
100
100
ns
tPLH
tPHL
RBI to a–f
100
100
ns
Note: LT e HIGH, A0 –A3 e HIGH.
2
Numerical DesignationsÐResultant Displays
TL/F/10172 – 4
Truth Table
Decimal
Or
Function
Inputs
Outputs
LT
RBI
A3
A2
A1
A0
BI/RBO
a
b
c
d
e
f
g
0 (Note 1)
1 (Note 1)
2
3
H
H
H
H
H
X
X
X
L
L
L
L
L
L
L
L
L
L
H
H
L
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
L
H
H
H
L
H
L
H
L
L
L
L
L
H
H
4
5
6
7
8
H
H
H
H
H
X
X
X
X
X
L
L
L
L
H
H
H
H
H
L
L
L
H
H
L
L
H
L
H
L
H
H
H
H
H
L
H
L
H
H
H
L
L
H
H
H
H
H
H
H
L
H
H
L
H
L
L
H
L
H
H
H
H
L
H
H
H
H
L
H
9
10
11
12
13
H
H
H
H
H
X
X
X
X
X
H
H
H
H
H
L
L
L
H
H
L
H
H
L
L
H
L
H
L
H
H
H
H
H
H
H
L
L
L
H
H
L
L
H
L
H
L
H
L
L
L
H
H
L
H
L
H
L
L
L
H
L
L
H
H
H
H
H
H
H
14
15
BI (Note 2)
RBI (Note 3)
LT (Note 4)
H
H
X
H
L
X
X
X
L
X
H
H
X
L
X
H
H
X
L
X
H
H
X
L
X
L
H
X
L
X
H
H
L
L
H
L
L
L
L
H
L
L
L
L
H
L
L
L
L
H
H
L
L
L
H
H
L
L
L
H
H
L
L
L
H
H
L
L
L
H
Note 1: BI/RBO is wired-AND logic serving as blanking input (BI) and/or ripple-blanking output (RBO). The blanking out (BI) must be open or held at a HIGH level
when output functions 0 through 15 are desired, and ripple-blanking input (RBI) must be open or at a HIGH level if blanking of a decimal 0 is not desired. X e input
may be HIGH or LOW.
Note 2: When a LOW level is applied to the blanking input (forced condition) all segment outputs go to a LOW level, regardless of the state of any other input
condition.
Note 3: When ripple-blanking input (RBI) and inputs A0, A1, A2, and A3 are at LOW level, with the lamp test input at HIGH level, all segment outputs go to a LOW
level and the ripple-blanking output (RBO) goes to a LOW level (response condition).
Note 4: When the blanking input/ripple-blanking output (BI/RBO) is open or held at a HIGH level, and a LOW level is applied to lamp test input, all segment outputs
go to a HIGH level.
Logic Symbol
TL/F/10172 – 2
VCC e Pin 16
GND e Pin 8
3
Logic Diagram
TL/F/10172 – 3
4
Physical Dimensions inches (millimeters)
16-Lead Small Outline Molded Package (M)
Order Number DM74LS48M
NS Package Number M16A
5
DM74LS48 BCD to 7-Segment Decoder
Physical Dimensions inches (millimeters) (Continued)
16-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS48N
NS Package Number N16E
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
National Semiconductor
Corporation
1111 West Bardin Road
Arlington, TX 76017
Tel: 1(800) 272-9959
Fax: 1(800) 737-7018
effectiveness.
Europe
Fax: (a49) 0-180-530 85 86
Email: cnjwge @ tevm2.nsc.com
Deutsch Tel: (a49) 0-180-530 85 85
English Tel: (a49) 0-180-532 78 32
Fran3ais Tel: (a49) 0-180-532 93 58
Italiano Tel: (a49) 0-180-534 16 80
Hong Kong Ltd.
13th Floor, Straight Block,
Ocean Centre, 5 Canton Rd.
Tsimshatsui, Kowloon
Hong Kong
Tel: (852) 2737-1600
Fax: (852) 2736-9960
Japan Ltd.
Tel: 81-043-299-2309
Fax: 81-043-299-2408
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
DM74LS90 Decade and Binary Counters
August 1986
Revised March 2000
DM74LS90
Decade and Binary Counters
General Description
Features
Each of these monolithic counters contains four masterslave flip-flops and additional gating to provide a divide-bytwo counter and a three-stage binary counter for which the
count cycle length is divide-by-five for the DM74LS90.
■ Typical power dissipation 45 mW
■ Count frequency 42 MHz
All of these counters have a gated zero reset and the
DM74LS90 also has gated set-to-nine inputs for use in
BCD nine’s complement applications.
To use their maximum count length (decade or four bit
binary), the B input is connected to the QA output. The
input count pulses are applied to input A and the outputs
are as described in the appropriate truth table. A symmetrical divide-by-ten count can be obtained from the
DM74LS90 counters by connecting the QD output to the A
input and applying the input count to the B input which
gives a divide-by-ten square wave at output QA.
Ordering Code:
Order Number
Package Number
Package Description
DM74LS90M
M14A
DM74LS90N
N14A
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Reset/Count Truth Table
Reset Inputs
© 2000 Fairchild Semiconductor Corporation
DS006381
Output
R0(1)
R0(2)
R9(1)
R9(2)
QD
QC
QB
QA
H
H
L
X
L
L
L
L
H
H
X
L
L
L
L
L
X
X
H
H
H
L
L
H
X
L
X
L
L
X
L
X
COUNT
L
X
X
L
COUNT
X
L
L
X
COUNT
COUNT
DM74LS90
Function Tables
Logic Diagram
BCD Count Sequence (Note 1)
Count
Output
QD
QC
QB
0
L
L
L
QA
L
1
L
L
L
H
2
L
L
H
L
3
L
L
H
H
4
L
H
L
L
5
L
H
L
H
6
L
H
H
L
7
L
H
H
H
8
H
L
L
L
9
H
L
L
H
Bi-Quinary (5-2) (Note 2)
Count
Output
QA
QD
QC
0
L
L
L
QB
L
1
L
L
L
H
2
L
L
H
L
3
L
L
H
H
4
L
H
L
L
5
H
L
L
L
6
H
L
L
H
7
H
L
H
L
8
H
L
H
H
9
H
H
L
L
H = HIGH Level
L = LOW Level
X = Don’t Care
The J and K inputs shown without connection are for reference only and
are functionally at a high level.
Note 1: Output QA is connected to input B for BCD count.
Note 2: Output QD is connected to input A for bi-quinary count.
Note 3: Output QA is connected to input B.
2
Supply Voltage
7V
Input Voltage (Reset)
7V
Input Voltage (A or B)
Note 4: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the “Electrical
Characteristics” table are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
5.5V
0°C to +70°C
−65°C to +150°C
Symbol
Parameter
Min
Nom
Max
Units
4.75
5
5.25
V
LOW Level Input Voltage
0.8
V
IOH
HIGH Level Output Current
−0.4
mA
IOL
LOW Level Output Current
8
mA
fCLK
Clock Frequency (Note 5)
MHz
fCLK
Clock Frequency (Note 6)
VCC
Supply Voltage
VIH
HIGH Level Input Voltage
VIL
tW
tW
Pulse Width (Note 5)
Pulse Width (Note 6)
2
V
A to QA
0
32
B to QB
0
16
A to QA
0
20
B to QB
0
10
A
15
B
30
Reset
15
A
25
B
50
Reset
25
tREL
Reset Release Time (Note 5)
25
tREL
Reset Release Time (Note 6)
35
TA
0
MHz
ns
ns
ns
ns
°C
70
Note 5: CL = 15 pF, RL = 2 kΩ, TA = 25°C and VCC = 5V.
Note 6: CL = 50 pF, RL = 2 kΩ, TA = 25°C and VCC = 5V.
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
VI
Input Clamp Voltage
VCC = Min, II = −18 mA
VOH
HIGH Level
VCC = Min, IOH = Max
Output Voltage
VIL = Max, VIH = Min
VOL
LOW Level
VCC = Min, IOL = Max
Output Voltage
VIL = Max, VIH = Min
Min
2.7
(Note 8)
IOL = 4 mA, VCC = Min
II
IIH
Max
Units
−1.5
V
3.4
V
0.35
0.5
0.25
0.4
Input Current @ Max
VCC = Max, VI = 7V
Reset
0.1
Input Voltage
VCC = Max
A
0.2
VI = 5.5V
B
0.4
Reset
20
A
40
B
80
HIGH Level
Input Current
IIL
Typ
(Note 7)
LOW Level
Input Current
IOS
Short Circuit Output Current
VCC = Max (Note 9)
ICC
Supply Current
VCC = Max (Note 7)
Reset
−0.4
A
−2.4
B
−3.2
−20
9
V
mA
µA
mA
−100
mA
15
mA
Note 7: All typicals are at VCC = 5V, TA = 25°C.
3
DM74LS90
Absolute Maximum Ratings(Note 4)
DM74LS90
(Continued)
Note 8: QA outputs are tested at IOL = Max plus the limit value of IIL for the B input. This permits driving the B input while maintaining full fan-out capability.
Note 10: ICC is measured with all outputs open, both RO inputs grounded following momentary connection to 4.5V and all other inputs grounded.
Switching Characteristics at VCC = 5V and TA = 25°C
RL = 2 kΩ
From (Input)
Symbol
Parameter
CL = 15 pF
To (Output)
Min
fMAX
tPLH
A to QA
32
20
Frequency
B to QB
16
10
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPHL
CL = 50 pF
Min
Maximum Clock
tPHL
Max
Units
Max
MHz
A to QA
16
20
ns
A to QA
18
24
ns
A to QD
48
52
ns
A to QD
50
60
ns
B to QB
16
23
ns
B to QB
21
30
ns
B to QC
32
37
ns
B to QC
35
44
ns
B to QD
32
36
ns
B to QD
35
44
ns
SET-9 to QA, QD
30
35
ns
SET-9 to QB, QC
40
48
ns
SET-0 to Any Q
40
52
ns
4
DM74LS90
Physical Dimensions inches (millimeters) unless otherwise noted
Package Number M14A
5
DM74LS90 Decade and Binary Counters
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
6
This datasheet has been downloaded from:
www.DatasheetCatalog.com
Datasheets for electronic components.
Part Number:
www.SunLED.com
DUG14A
14.2mm (0.56") SINGLE DIGIT NUMERIC DISPLAY
Features
z
0.56 INCH DIGIT HEIGHT.
z
LOW CURRENT OPERATION.
z
EXCELLENT CHARACTER APPEARANCE.
z
EASY MOUNTING ON P.C. BOARDS OR SOCKETS.
z
I.C. COMPATIBLE.
z
MECHANICALLY RUGGED.
z
STANDARD : GRAY FACE, WHITE SEGMENT.
z
RoHS COMPLIANT.
Notes:
Operating Characteristics
(TA=25°C)
1. All dimensions are in millimeters (inches).
2. Tolerance is ± 0.25(0.01") unless otherwise noted.
3. Specifications are subject to change without notice.
(TA=25°C)
UG
(GaP)
Unit
Reverse Voltage
VR
5
V
Forward Current
IF
25
mA
Forward Current (Peak)
1/10 Duty Cycle
0.1ms Pulse Width
iFS
140
mA
Power Dissipation
PT
62.5
TA
-40 ~ +85
Tstg
-40 ~ +85
Storage Temperature
Lead Solder Temperature
[2mm Below Package Base]
Part
Number
DUG14A
mW
°C
260°C For 3~5 Seconds
Emitting
Color
Green
Published Date : MAR 01, 2008
Emitting
Material
GaP
Unit
Forward Voltage (Typ.)
(IF=10mA)
VF
2.0
V
Forward Voltage (Max.)
(IF=10mA)
VF
2.5
V
Reverse Current (Max.)
(VR=5V)
IR
10
uA
Wavelength Of Peak
Emission (Typ.)
(IF=10mA)
λP
565
nm
Wavelength Of Dominant
Emission (Typ.)
(IF=10mA)
λD
568
nm
Spectral Line Full Width
At Half-Maximum (Typ.)
(IF=10mA)
Δλ
30
nm
Capacitance (Typ.)
(VF=0V, f=1MHz)
C
15
pF
Luminous
Intensity
(IF=10mA)
ucd
min.
typ.
1900
10490
Drawing No : SDSA2088
UG
(GaP)
V5
Wavelength
nm
λP
Description
565
Common Anode, Rt. Hand
Decimal
Checked : Shin Chi
P.1/4
Part Number:
www.SunLED.com
DUG14A
UG
V5
Checked : Shin Chi
P.2/4
Part Number:
www.SunLED.com
DUG14A
Remarks:
If special sorting is required (e.g. binning based on forward voltage, luminous intensity / luminous flux, or wavelength),
the typical accuracy of the sorting process is as follows:
1. Wavelength: +/-1nm
2. Luminous Intensity / Luminous Flux: +/-15%
3. Forward Voltage: +/-0.1V
Note: Accuracy may depend on the sorting parameters.
V5
Checked : Shin Chi
P.3/4
Part Number:
www.SunLED.com
PACKING & LABEL SPECIFICATIONS
DUG14A
DUG14A
V5
Checked : Shin Chi
P.4/4
Part Number:
DUG14A2
14.22mm (0.56”) DUAL DIGIT NUMERIC
DISPLAY
www.SunLED.com
Features
0.56 INCH DIGIT HEIGHT.
LOW CURRENT OPERATION.
EXCELLENT CHARACTER APPEARANCE.
EASY MOUNTING ON P.C. BOARDS OR SOCKETS.
TWO DIGIT PACKAGE SIMPLIFIESALIGNMENTS
& ASSEMBLY.
I.C. COMPATIBLE.
MECHANICALLY RUGGED.
STANDARD : GRAY FACE, WHITE SEGMENT.
RoHS COMPLIANT.
Notes:
1. All dimensions are in millimeters (inches).
Operating Characteristics
(TA=25°C)
2. Tolerance is ± 0.25(0.01") unless otherwise noted.
3. Specifications are subject to change without notice.
(TA=25°C)
V
Reverse Current (Max.)
(VR=5V)
IR
10
uA
Wavelength Of Peak
Emission (Typ.)
(IF=10mA)
λP
565
nm
Wavelength Of Dominant
Emission (Typ.)
(IF=10mA)
λD
568
nm
Spectral Line Full Width
At Half-Maximum (Typ.)
(IF=10mA)
Δλ
30
nm
Capacitance (Typ.)
(VF=0V, f=1MHz)
C
15
pF
IF
25
mA
Forward Current (Peak)
1/10 Duty Cycle
0.1ms Pulse Width
iFS
140
mA
Power Dissipation
PT
62.5
mW
TA
-40 ~ +85
Tstg
-40 ~ +85
Green
Published Date : FEB 29 , 2008
V
2.5
Forward Current
DUG14A2
2.0
VF
V
Emitting
Color
VF
Forward Voltage (Max.)
(IF=10mA)
5
Part
Number
Forward Voltage (Typ.)
(IF=10mA)
Unit
VR
Lead Solder Temperature
[2mm Below Package Base]
Unit
UG
(GaP)
Reverse Voltage
Storage Temperature
UG
(GaP)
°C
260°C For 3~5 Seconds
Emitting
Material
GaP
Luminous
Intensity
(IF=10mA)
ucd
min.
typ.
1900
10490
V4
Wavelength
nm
λP
Description
565
Common Anode, Rt. Hand
Decimal.
Checked : Shin Chi
P.1/4
Part Number:
DUG14A2
DISPLAY
www.SunLED.com
UG
V4
Checked : Shin Chi
P.2/4
Part Number:
DUG14A2
DISPLAY
www.SunLED.com
Remarks:
If special sorting is required (e.g. binning based on forward voltage, luminous intensity/ luminous flux or wavelength),
the typical accuracy of the sorting process is as follows:
1. Wavelength: +/-1nm
2. Luminous Intensity/ luminous flux: +/-15%
3. Forward Voltage: +/-0.1V
Note: Accuracy may depend on the sorting parameters.
V4
Checked : Shin Chi
P.3/4
Part Number:
www.SunLED.com
PACKING & LABEL SPECIFICATIONS
DUG14A2
DISPLAY
DUG14A2
V4
Checked : Shin Chi
P.4/4
AK280 com redução
Rev. 01
Ø17
8
Ø24.4
19
Ø8.5
Ø7
Ø4
3.5
Ø25
2-M3
Ø25
10
A
2
30
medidas em mm
Especificações
Modelo
Sem carga
Tensão
Máximo rendimento
operação nominal rotação corrente rotação corrente
Máxima Potência
torque
potência
torque
Velocidade
89 rpm
AK280/5-R193
3~12V
5V
150rpm
0.33A
135rpm
1.44A
1.10kgf.cm
1.8W
2.50kgf.cm
AK280/5-R330
3~12V
5V
330rpm
0.33A
280rpm
1.44A
0.63kgf.cm
1.8W
1.48kgf.cm 184 rpm
Caixa de redução
Caixa de Redução
Comprimento
A
Relação
23 +- 0.2 mm
1 para 70
21 +- 0.2 mm
1 para 40
Fone / Fax: Curitiba +55 (41) 3028-0222 / Joinville +55 (47) 3028-6757
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