IBM eServer pSeries
Transcription
IBM eServer pSeries
IBM eServer pSeries server HCR U6 server pSeries Revised April 2003 September, 2005 © 2005 IBM Corporation IBM eServer pSeries Ubicación del p615 en el cosmos de servidores © 2005 IBM Corporation IBM eServer pSeries Servidores de IBM zSeries The most reliable, mission-critical systems on earth pSeries Most powerful, technologically advanced UNIX servers iSeries High-performance integrated business servers for mid-market companies xSeries Intel-based servers with mainframe-inspired reliability technologies © 2005 IBM Corporation IBM eServer pSeries El mercado de servidores UNIX WW UNIX Server Revenue Share – Rolling 4Q Average 40% 45% 35% 40% 30% 25% 35% 20% IBM HP Sun Other 30% 15% 10% 25% 5% 20% 15% 20 5 Q 10 5 Q 40 4 Q 30 4 Q 20 4 Q 10 4 Q 40 3 Q 30 3 Q 20 3 Q 10 3 Q 40 2 Q 30 2 Q 20 2 Q 5% 10 2 10% Q Quarterly UNIX-based Revenue Share 45% Source: IDC Quarterly Server Tracker, 8/05 © 2005 IBM Corporation IBM eServer pSeries POWER4+: El motor del p615 © 2005 IBM Corporation IBM eServer pSeries pSeries 615 POWER4+ Chip Technology •Superescalar. Habilidad para ejecutar hasta 8 instrucciones en paralelo. •Superpipelined. Posibilidad de completar cinco instrucciones por ciclo. POWER4+ microprocessor D I >1GHz CPU >1GHz CPU D I Shared L2 Cache •L1 instruction cache •128K/chip;64K/processor. •L1 data cache •64K/chip; 32K/processor. •L2 cache •1440K/chip; shared between processors) L3 Controller L3 Directory L3 Cache Fabric Controller Distributed Switch Processor local bus I/O Bus Memory . © 2005 IBM Corporation IBM eServer pSeries pSeries 615 POWER4+ Chip Technology Each processor contains •two FXUs (fixed point units) •two FPUs (floating point units) •two load/store units •a branching unit •a CR (condition register) unit © 2005 IBM Corporation IBM eServer pSeries POWER™ Microprocessor Roadmap POWER4™ 0.09 microns 0.13 microns 0.18 microns 1.0 to 1.3 GHz Core POWER5™ POWER4+™ 1.2 to 1.9 GHz Core 1.2 to 1.9 GHz Core >>> GHz >>> GHz Core Core 0.13 microns 1-1.3 GHz Core >> GHz Core 1.4-2.0 GHz CoreShared L2 Shared L2 Distributed Switch Shared L2 Distributed Switch 2002-3 Distributed Switch 2001 Distributed Switch Shared L2 LPAR Autonomic computing Chip multiprocessing Shared L2 2005 Distributed Switch 2004 Larger L2 More LPARs High-speed Switch 64-way SMP Sub-processor partitioning Enhanced Distributed Switch Enhanced core parallelism Improved floating-point performance Faster memory environment Dynamic firmware updates © 2005 IBM Corporation IBM eServer pSeries POWER : The Most Scaleable Architecture POWER2 PPC 401 PPC 750 PPC 750CXe PPC 405GP PPC 750FX PPC 440GP s Server PPC 750GX PPC 970FX PPC 440GX op t k s e D s Game ed d d e b m E Binary Compatibility PPC 603e POWER3 POWER4 POWER5 POWER4+ © 2005 IBM Corporation IBM eServer pSeries Anatomía del p615 © 2005 IBM Corporation IBM eServer pSeries Internal Structure of p615 Rack Model Service processor Hot-plug power supplies (one redundant – optional) Six hot-plug PCI-X slots: Three long 64-bit 133 MHz 3.3v One short 64-bit 133 MHz 3.3v Two short 32-bit 66 MHz 3.3v 3 hot-plug fans (redundancy) H C R U6 server Two 4-packs (separate backplanes) hot-swappable Ultra320 SCSI disks 1st four-pack standard Server planar board contains: pSeries Op-panel Three media bays Two slimline One standard RJ-48 connector (when in use, pre-empts the S1 serial port on rear) One or two 2 1.2 GHz or 2-way 1.45 GHz POWER4+ processors, 1.5MB L2 Cache, 8MB L3 Cache, 1 to 16GB DDR Chipkill memory, Three serial ports, two optional HMC ports, keyboard, mouse and parallel ports 10/100 and 10/100/1000 (1 Gbps) Ethernet ports © 2005 IBM Corporation IBM eServer pSeries Rear View of p615 Rack Model server H C R U6 server Two hot-plug AC power supplies with dual isolated line cords pSeries Three serial ports (S1, S2, S3) Mfg. Diagnostic port (not for client use) Parallel Rack indicator light port S2 S3 S1 HMC 1 HMC 2 10/100 Ethernet 10/100/1000 Ethernet Six hot-plug PCI-X slots: Three long 64-bit 133 MHz 3.3v One short 64-bit 133 MHz 3.3v Two short 32-bit 66 MHz 3.3v © 2005 IBM Corporation IBM eServer pSeries p615 Memory Quad Positioning Main memory ranges from 1GB to 16GB ECC DDR SDRAM. Memory is configured in two quads on the planar board, and is pre-balanced by design for optimal performance with each quad split between two synchronous memory interface (SMI) controllers. Plan ahead to reach desired maximum memory to avoid discarding memory. 1GB quad = 4 X 256MB DIMMs 2GB quad = 4 X 512MB DIMMs 4GB quad = 4 X 1GB DIMMs 8GB quad = 4 X 2GB DIMMs SMI L3 Shared L2 Distributed switch Quad 1 Quad 2 SMI © 2005 IBM Corporation IBM eServer pSeries pSeries 615 Server Peak Bandwidth per 1.2 GHz 2-way Chip 12.8GB/sec (= 2 x 16 bytes @ 1/3 Clock Speed) For 2-way chip L3 Shared L2 6.4GB/sec (= four 8-byte paths @ 200 MHz) M E M O R Y 1 to 16GB GX Bus 3.2GB/sec (= dual 4-byte paths @ 1/3 Clock Speed) Distributed switch Six PCI-X slots I/O Hub 2GB/sec © 2005 IBM Corporation IBM eServer pSeries pSeries 615 Server Peak Bandwidth per 1.45 GHz 2-way Chip 15.5GB/sec For 2-way chip L3 6.4GB/sec Shared L2 M E M O R Y 1 to 16GB GX Bus 3.9GB/sec Distributed switch Six PCI-X slots I/O Hub 2GB/sec © 2005 IBM Corporation IBM eServer pSeries RAS (Fiabilidad, Disponibilidad y Servicialidad) © 2005 IBM Corporation IBM eServer pSeries POWER4+ Reliability Across the Product Line 24x7 IBM pSeries server Mainframe-inspired RAS Reliability, Availability and Serviceability SelfConfiguring SelfHealing SelfSelfOptimizing Protecting ris e S p ris e S p H C R U6 server server H C R U6 server pSeries First Failure Data Capture DDR ECC Chipkill™ memory Bit-steering/redundant memory Memory soft scrubbing Redundant power, fans Dynamic Processor Deallocation Deallocate PCI-X bus, L2/L3 cache Persistent memory deallocation Hot-plug PCI-X slots, fans, power Internal LED diagnostics Hot-swappable disk drives © 2005 IBM Corporation IBM eServer pSeries First Failure Data Capture Technology Old Failure Recreate Strategy –Run diagnostic test cases during service call Fault Isolation Register (FIR) –Repair based on test case symptom (unique fingerprint of each –Questionable correlation to original problem error captured) –Development focus on improved test cases –Open service action plan if failure not recreated –Test cases used to try to isolate failures and verify Service correct operation Processor Error Checkers CPU L1 Cache L2/L3 Cache Log Error Memory Nonvolatile RAM Disk Reliably identify each failing component, reducing costly downtime First Failure Data Capture: an IBM Exclusive –Specialized hardware designed to capture failure data at time of failure –Repair based on root-cause analysis –Direct correlation to original client problem –Engineering focus on built-in error detection and capture –Service action plan driven by captured failure information –Test cases used to only to verify correct operation © 2005 IBM Corporation IBM eServer pSeries Start Off With Quality-based Design lt Fau nce ida Avo Designing extra quality into system to keep errors from ever happening Mainframe-class components and technologies - Reduced power consumption, cooler operating temperatures for increased reliability © 2005 IBM Corporation IBM eServer pSeries ECC Memory Integrity and Availability Memory scrubbing for soft single-bit errors that are corrected in the background while memory is idle, to help prevent multiple-bit errors. Failing memory bit steered to spare memory chip Chipkill X X Dynamically reassign memory I/O via bit-steering if error threshold is reached on same bit .... Spare memory chip Scatter memory chip bits across four separate ECC words for Chipkill recovery Bit-scattering allows normal single bit ECC error processing, thereby keeping system running with a Chipkill failure. Bit-steering allows memory lines from a spare memory chip to be dynamically reassigned to a memory module with a faulty line to keep system running. If all bits are used up on the spare memory chips, and threshold is reached, the Service Processor will be invoked to request deferred maintenance at a time acceptable to client. © 2005 IBM Corporation IBM eServer pSeries Built-in Redundancies for Non-stop Operation N+1 ancy und d e R Use of redundancy to remain operational with full resources Redundant spare memory chips Redundant fans - Fans will speed up to try to compensate for failed fan Redundant power supplies (optional) © 2005 IBM Corporation IBM eServer pSeries p615 PCI Bus and Card Error Recoveries PCI-X Controller X Problem with damaged connection results in PCI-X bus error - That particular slot is varied offline by system - All other slots remain active - System stays operational without the slot active - If PCI card is damaged, replace with new one - If slot is damaged, plan for maintenance at client’s convenience © 2005 IBM Corporation IBM eServer pSeries Replacement of Parts While System Runs t ren r u c e Con enanc nt M ai Online hot-plug of defective electromechanical components keeps system operational Disk drives Cooling fans Power subsystems PCI, PCI-X adapter cards © 2005 IBM Corporation IBM eServer pSeries Quicker Service for Client Convenience vice Se r y tivit c u d Pr o Increasing service productivity means more client uptime Internal LED diagnostics identify components that require service LEDs on I/O provide status of PCI-X slots and disk drives for power, hot-swap and need for service © 2005 IBM Corporation IBM eServer pSeries Sistemas Operativos © 2005 IBM Corporation IBM eServer pSeries AIX 5L™ & Linux AIX Linux Servers AIX Hypervisor Linux server HCR U6 server pSeries pSeries server Native 64-bit Linux High performance POWER4 SMP, LPAR, Clusters Proven, reliable pSeries Surprisingly affordable compared to Intel SMPs Standard Linux APIs in AIX Common Functionality Interoperability Testing AIX Toolbox for Linux Apps - Linux development environment on AIX Run Linux and AIX on the same pSeries server Workload Consolidation - Linux for Infrastructure, AIX for Database Server Consolidation - Develop, Test, Production Competitive Consolidation © 2005 IBM Corporation IBM eServer pSeries Referencias © 2005 IBM Corporation IBM eServer pSeries For more details, see the POWER4 System Microarchitecture white paper at http://www1.ibm.com/servers/eserver/pseries/h ardware/whitepapers/power4.html (or search for "power4 architecture" in the Search window at www.ibm.com) – – – © 2005 IBM Corporation IBM eServer pSeries Y ya está... (a no ser que tengais más preguntas) © 2005 IBM Corporation