Compal LA-3691P - Schematics. www.s

Transcription

A
B
C
D
E
ZZZ1
SE000008600
PCB
1
1
Compal Confidential
2
2
Everest Schematics Document
Intel Merom Processor with Crestline + DDRII + ICH8M
2007-03-05
3
3
REV: 0.2
4
4
2006/08/18
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2007/8/18
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
Title
Cover Page
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
Thursday, March 08, 2007
E
1
of
45
A
B
C
D
E
Compal Confidential
Intel Merom Processor
Model Name : Everest
File Name : LA-3691P
uPGA-478 Package
page 4,5,6
1
FSB
667/800MHz
H_A#(3..35)
CRT
CRT
NB7M
128M
VGA/B
1
H_D#(0..63)
CRT
page 19
Memory BUS(DDRII)
Intel Crestline
LVDS
Dual Channel
LVDS
LCD Conn.
page 18
page 7,8,9,10,11,12,13
DMI
X4 mode
USB conn x2
TO M/B
USB conn x2
TO I/O/B
page 33
2
PCI-Express
3.3V ATA-100
page 29
page 28
S-ATA
HD Audio
IDE
port 0
MDC 1.5
Conn
page 42
LAN(10/100M)
BCM5906
32
RTS 5158
33
USB
3.3V 48MHz
page 20,21,22,23
3G/TV-Tuner
Robson page
3 in 1
socket
Card Reader
2
Intel ICH8-M
BGA-676
page 33
Bluetooth
Conn page
page 37
3.3V 24.576MHz/48Mhz
New Card MINI Card
WLAN,
Socket
page 14,15
BANK 0, 1, 2, 3
1.8V DDRII 533/667
uFCBGA-1299
PCI-Express
200pin DDRII-SO-DIMM X2
page 30
ALC861VD
page 38
CDROM
Conn.
page 24
S-ATA HDD
Conn.page 24
LPC BUS
HDA Codec
Audio AMP
RJ45
page 39
page 31
3
3
SPI ROM
ENE KB926
Audio BD
USB BD
Fan Control
page 4
Int SPK
Mic/Int
Int.KBD
Touch Pad
K_SW
BIOS
page 36
page 34
page 36
Line-out
page 35
Clock Generator
Mic/Ext
Sub BD
ICS9LPRS365
page 16
USBx2
Thermal Sensor
ADM1032
4
4
page 4
SW Board
HDD/ODD
Power circuit
NUM
CAP
Scroll
NOVO
Mute
User
Power
page X
MB
A
Battery
W/L
2006/08/18
Issued Date
Compal Secret Data
Power
2007/8/18
Deciphered Date
B
C
D
Title
Block Diagrams
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
E
2
of
45
A
1
2
B
C
D
E
Voltage Rails
1
Power Plane
Description
S1
S3
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
S5
External PCI Devices
VIN
Adapter power supply (19V)
N/A
N/A
N/A
B+
AC or battery power rail for power circuit.
N/A
N/A
N/A
+CPU_CORE
Core voltage for CPU
ON
OFF
OFF
+0.9VS
0.9V switched power rail for DDR terminator
ON
OFF
OFF
+1.05VS
1.05V switched power rail
ON
OFF
OFF
+1.25VS
ON
OFF
OFF
+1.5VS
ON
OFF
OFF
+1.8V
1.8V power rail for DDR
ON
ON
OFF
+1.8VS
ON
OFF
OFF
+2.5VS
ON
OFF
OFF
+3VALW
3.3V always on power rail
ON
ON
ON*
DEVICE
+3VS
ON
OFF
OFF
5V always on power rail
ON
ON
ON*
5V switched power rail
ON
OFF
OFF
VSB always on power rail
ON
ON
ON*
+RTCVCC
RTC power
ON
ON
ON
SLP_S1# SLP_S3# SLP_S4# SLP_S5#
EC SM Bus1 address
+VALW
+V
+VS
HIGH
HIGH
HIGH
HIGH
ON
ON
ON
ON
S1(Power On Suspend)
LOW
HIGH
HIGH
HIGH
ON
ON
ON
LOW
S3 (Suspend to RAM)
LOW
LOW
HIGH
HIGH
ON
ON
OFF
OFF
S4 (Suspend to Disk)
LOW
LOW
LOW
HIGH
ON
OFF
OFF
OFF
S5 (Soft OFF)
LOW
LOW
LOW
LOW
ON
OFF
OFF
OFF
Full ON
PIRQ
2
+5VS
+VSB
SIGNAL
REQ/GNT #
No PCI Device
+5VALW
STATE
IDSEL #
EC SM Bus2 address
Device
Address
Device
Address
Smart Battery
0001 011X b
GMT-781
1001 100X b
EEPROM(24C16/02)
1010 000X b
NVIDIA NB8X
Clock
ICH8M SM Bus address
3
BOARD ID Table
ID1
0(R744)
0(R744)
1(R741)
ID0
0(R745)
1(R742)
0(R745)
TEST
A-TEST
B-TEST
C-TEST
Device
Address
Clock Generator
(ICS9LPRS325AKLFT_MLF72)
1101 001Xb
DDR DIMM0
1010 000Xb
DDR DIMM1
1010 010Xb
3
PANEL ID Table
R
Ra (R743)
Rb (R740)
Size
15W
14W
4
4
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
A
B
C
D
Title
Notes List
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
E
3
of
45
5
4
3
2
1
Place close to CPU within 500mil
H_A#[3..35]
XDP Reserve
H_REQ#[0..4]
JP15A
J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1
A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
K3
H2
K2
J3
L1
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
<7> H_ADSTB#1
Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1
<21> H_A20M#
<21> H_FERR#
<21> H_IGNNE#
A6
A5
C4
A20M#
FERR#
IGNNE#
<21> H_STPCLK#
<21> H_INTR
<21> H_NMI
<21> H_SMI#
D5
C6
B4
A3
STPCLK#
LINT0
LINT1
SMI#
M4
N5
T2
V3
B2
C3
D2
D22
D3
F6
RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
RSVD[10]
CONTROL
BR0#
ADDR GROUP 1
H1
E2
G5
H_ADS# <7>
H_BNR# <7>
H_BPRI# <7>
H5
F21
E1
H_DEFER# <7>
H_DRDY# <7>
H_DBSY# <7>
F1
IERR#
INIT#
D20
B3
LOCK#
H4
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
C1
F3
F4
G3
G2
HIT#
HITM#
G6
E4
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
ICH
THERMTRIP#
XDP_TDI
R33
1
2
150_0402_1%
XDP_TMS
R32
1
2
39_0402_1%
XDP_TDO
R31
1 56_0402_5%
H_INIT# <21>
1
2 @ 54.9_0402_1%
XDP_BPM#5
R28
1
2
H_LOCK# <7>
XDP_HOOK1
R27
1
2 @ 54.9_0402_1%
XDP_TRST#
R24
1
2
560_0402_5%
XDP_TCK
R17
1
2
27_0402_5%
+VCCP
H_BR0# <7>
H_IERR#
R73
H_RESET#
H_RS#0
H_RS#1
H_RS#2
2
H_RESET# <7>
D21
A24
B25
D
54.9_0402_1%
H_TRDY# <7>
H_HIT# <7>
H_HITM# <7>
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#
T1
T4
T3
T7
T6
T9
T5
T12
T10
T11
T8
XDP_DBRESET# <22>
+3VS
C327
1
2
R70
H_THERMDA
H_THERMDC
2
0.1U_0402_16V4Z
R268
10K_0402_5%
U19
H_THERMDA
1
Connect SB SYS_RESET# or just left NC
H_PROCHOT#
THERMAL
PROCHOT#
THERMDA
THERMDC
+VCCP
H_PROCHOT# <45>
1
56_0402_5% +VCCP
C328
2
<32> EC_SMB_CK2
H_THERMDC
2200P_0402_50V7K
EC_SMB_CK2
EC_SMB_DA2
<32> EC_SMB_DA2
2
D+
3
D-
8
SCLK
7
SDATA
VDD1
1
ALERT#
6
THERM#
4
GND
5
THERM_SCI#
2
R267
THERM#
2
10K_0402_5%
1
EC_THERM# <22,32>
@ 0_0402_5%
1
+3VS
R269
Check : to sb
C
G781F_SOP8
Address:100_1100
C7
H_THERMTRIP# <8,21>
A22
A21
CLK_CPU_BCLK <16>
CLK_CPU_BCLK# <16>
H CLK
BCLK[0]
BCLK[1]
FAN1 Conn
H_THERMDA, H_THERMDC routing together,
Trace width / Spacing = 10 / 10 mil
+5VS
C100
1
+5VS
2.2U_0603_16V6K
2
1
C
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#
DEFER#
DRDY#
DBSY#
XDP/ITP SIGNALS
<7> H_ADSTB#0
ADS#
BNR#
BPRI#
ADDR GROUP 0
D
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
RESERVED
H_RS#[0..2]
<7> H_RS#[0..2]
2
<7> H_REQ#[0..4]
1
<7> H_A#[3..35]
B
U6
<32> EN_FAN1
1
2
3
4
+VCC_FAN1
EN_FAN1
D8
VEN
VIN
VO
VSET
GND
GND
GND
GND
8
7
6
5
2
FOX_PZ4782A-274M-41_Merom
ME@
G993P1UF_SOP8
DIODE
Closed to
Connector
B
1SS355_SOD323
@
D7
@ 1N4148_SOT23
1
2
C94
2.2U_0603_16V6K
1
2
+3VS
C358
1000P_0402_50V7K
1
2
1
1
+VCCP
R276
10K_0402_5%
R68
40mil
2 2
2
@ 56_0402_5%
<32> FAN_SPEED1
B
1
E
H_PROCHOT#
JP17
+VCC_FAN1
3
1 OCP#
@ Q4
MMBT3904_SOT23
C
OCP# <22>
C341
1000P_0402_50V7K
1
2
3
1
2
3
4
5
GND
GND
2
A
A
ACES_85205-03001
ME@
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
4
3
2
Title
Merom (1/3)
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
1
4
of
45
5
4
3
H_D#[0..63]
2
+CPU_CORE
<7> H_DSTBN#0
<7> H_DSTBP#0
<7> H_DINV#0
C
2
+VCCP
R263
1K_0402_1%
1
<7> H_DSTBN#1
<7> H_DSTBP#1
<7> H_DINV#1
2
Width=20 mil
R76
R67
C303 1
AD26
C23
D25
C24
AF26
AF1
A26
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
B22
B23
C21
<16> CPU_BSEL0
<16> CPU_BSEL1
<16> CPU_BSEL2
MISC
BSEL[0]
BSEL[1]
BSEL[2]
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
DATA GRP 2
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
1
R261
2K_0402_1%
GTL_REF
TEST1
1 @ 1K_0402_5%
TEST2
1 @ 1K_0402_5%
TEST3
T14 PAD
2 @ 0.1U_0402_16V4Z TEST4
TEST5
PAD
T2
TEST6
T13 PAD
2
2
N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24
DATA GRP 1
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
Close to CPU pin AD26
within 500mils.
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
DATA GRP 3
D
E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25
DATA GRP 0
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
JP15C
H_D#[0..63] <7>
JP15B
COMP[0]
COMP[1]
COMP[2]
COMP[3]
R26
U26
AA1
Y1
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
E5
B5
D24
D6
D7
AE6
H_DSTBN#2 <7>
H_DSTBP#2 <7>
H_DINV#2 <7>
H_DSTBN#3 <7>
H_DSTBP#3 <7>
H_DINV#3 <7>
COMP0
COMP1
COMP2
COMP3
R266
R264
R35
R39
1
1
1
1
H_PWRGOOD
H_CPUSLP#
2
2
2
2
27.4_0402_1%
54.9_0402_1%
27.4_0402_1%
54.9_0402_1%
H_DPRSTP# <8,21,45>
H_DPSLP# <21>
H_DPWR# <7>
H_PWRGOOD <21>
H_CPUSLP# <7>
H_PSI# <45>
ME@
B
layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs
CPU_BSEL
CPU_BSEL2
CPU_BSEL1
CPU_BSEL0
166
0
1
1
200
0
1
0
1
Resistor placed within
0.5" of CPU pin.Trace
should be at least 25
mils away from any other
toggling signal.
COMP[0,2] trace width is
18 mils. COMP[1,3] trace
width is 4 mils.
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
VCCA[01]
VCCA[02]
B26
C26
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
AD6
AF5
AE5
AF4
AE3
AF3
AE2
VCCSENSE
AF7
VCCSENSE
VSSSENSE
AE7
VSSSENSE
+CPU_CORE
D
Place this cap more close to
B26/C26 rather than 10UF
C
+VCCP
1
+ C317
2
330U_D2E_2.5VM_R9
20mils
+1.5VS
1
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
1
R13
.
ME@
<45>
<45>
<45>
<45>
<45>
<45>
<45>
1
C326
2 0.01U_0402_16V7K 2
2
100_0402_1%
C325
10U_0805_10V4Z
B
+CPU_CORE
VCCSENSE <45>
VSSSENSE <45>
R14
1
2
100_0402_1%
Length match within 25 mils.
The trace width/space/other is
20/7/25.
Close to CPU pin
within 500mils.
A
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
4
3
A
2
Title
Merom (2/3)
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
1
5
of
45
5
4
3
2
+CPU_CORE
+CPU_CORE
3 x 330uF(9mOhm/2)
JP15D
A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3
D
C
B
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
1
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
3 x 330uF(9mOhm/2)
1
+
C298
1
C297
1
+
C332
330U_D2E_2.5VM_R9
2
2
330U_D2E_2.5VM_R9
1
+
C331
+
330U_D2E_2.5VM_R9
2
2
330U_D2E_2.5VM_R9
D
South Side Secondary
North Side Secondary
+CPU_CORE
1
1
C26
1
C27
1
C28
1
C29
1
C30
C31
1
C32
1
C33
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
(Place these capacitors on South side,Secondary Layer)
+CPU_CORE
1
1
C56
1
C55
1
C54
1
C53
1
C52
C51
1
C50
1
C49
9/25 10U checked. OK for use!
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
C
(Place these capacitors on North side,Secondary Layer)
+CPU_CORE
1
1
C315
1
C316
1
C305
1
C306
1
C307
C308
1
C309
1
C310
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
(Place these capacitors on South side,Primary Layer)
+CPU_CORE
1
1
C313
1
C314
1
C323
1
C322
1
C321
C320
1
C319
1
C318
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
(Place these capacitors on North side,Primary Layer)
+CPU-CORE
Decoupling
SPCAP,Polymer
MLCC 0805 X5R
B
C,uF
ESR, mohm
ESL,nH
6X330uF
9m ohm/6
1.8nH/6
32X22uF
3m ohm/32
0.6nH/32
32X10uF
3m ohm/32
0.6nH/32
+VCCP
.
ME@
1
C324
1
+
330U_D2E_2.5VM
2
C38
1
C43
1
C58
1
C24
1
C39
1
C45
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
A
A
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
4
3
2
Title
Merom (3/3)
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
1
6
of
45
4
3
D
1
+VCCP
R279
2
221_0402_1%
2
H_SWNG
1
R282
100_0402_1%
2
0.1U_0402_16V4Z
1
C
C360
Near B3 pin
1
H_RCOMP
R283
2
24.9_0402_1%
+VCCP
2
Route H_SCOMP and H_SCOMP# with
trace width, spacing and
impedance (55 ohm) same as FSB
data traces
2
layout note:
R164
R168
54.9_0402_1%
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
54.9_0402_1%
E2
G2
G7
M6
H7
H3
G4
F3
N8
H2
M10
N12
N9
H5
P13
K9
M2
W10
Y8
V4
M3
J1
N5
N3
W6
W9
N2
Y7
Y9
P4
W3
N1
AD12
AE3
AD9
AC9
AC7
AC14
AD11
AC11
AB2
AD7
AB1
Y3
AC6
AE2
AC5
AG3
AJ9
AH8
AJ14
AE9
AE11
AH12
AJ5
AH5
AJ6
AE7
AJ7
AJ2
AE5
AJ3
AH2
AH13
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
1
1
2
<4> H_RESET#
<5> H_CPUSLP#
R112
H_SWNG
H_RCOMP
B3
C2
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP#
W1
W2
H_SCOMP
H_SCOMP#
H_RESET#
H_CPUSLP#
B6
E5
H_CPURST#
H_CPUSLP#
1
1K_0402_1%
1
H_VREF
R117
2
C91
B9
A9
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7
H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DBSY#
CLK_MCH_BCLK
CLK_MCH_BCLK#
H_DPWR#
H_DRD Y#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
K5
L2
AD13
AE13
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
M7
K3
AD2
AH11
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
L7
K2
AC2
AJ10
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
M14
E13
A11
H13
B12
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#_0
H_RS#_1
H_RS#_2
E12
D7
D8
H_RS#0
H_RS#1
H_RS#2
U20
U20
965GM
960GM
@
GM@
D
H_ADS# <4>
H_ADSTB#0 <4>
H_ADSTB#1 <4>
H_BNR# <4>
H_BPRI# <4>
H_BR0# <4>
H_DEFER# <4>
H_DBSY# <4>
CLK_MCH_BCLK <16>
CLK_MCH_BCLK# <16>
H_DPWR# <5>
H_DRDY# <4>
H_HIT# <4>
H_HITM# <4>
H_LOCK# <4>
H_TRDY# <4>
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
C
<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>
H_DSTBP#0 <5>
H_DSTBP#1 <5>
H_DSTBP#2 <5>
H_DSTBP#3 <5>
H_REQ#[0..4] <4>
B
H_RS#[0..2] <4>
H_AVREF
H_DVREF
CRESTLINE_1p0
PM@
0.1U_0402_16V4Z
2
2K_0402_1%
1
1
H_A#[3..35] <4>
B
+VCCP
2
U20A
<5> H_D#[0..63]
HOST
5
within 100mil to Ball A9,B9
A
A
5
Compal Secret Data
Layout Note:
H_RCOMP / H_VREF / H_SWNG
trace width and spacing is 10/20
2006/08/18
Issued Date
Deciphered Date
2007/8/18
4
3
2
Title
Crestline (1/7)-GTL
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
1
7
of
45
5
4
3
2
1
U20B
MCH_CFG_16
MCH_CFG_19
MCH_CFG_20
B
<17,20,22,24,25,30> PLT_RST_BUF#
<4,21> H_THERMTRIP#
<22,45> PM_DPRSLPVR
PM_EXTTS#0
PM_EXTTS#1
R176
R104 1
100_0402_5%
2 0_0402_5%
G41
L39
L36
J36
GMCH_PWROK AW49
MCH_RSTIN#
AV20
N20
G36
PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
If THERMTRIP no used, left NC
Use VGATE for GMCH_PWROK
<22,32> ICH_POK
ICH_POK
A
1
R184
1
R186
GMCH_PWROK
2
@ 0_0402_5%
2
0_0402_5%
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
BE29
AY32
BD39
BG37
DDRA_CKE0
DDRA_CKE1
DDRB_CKE0
DDRB_CKE1
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
BG20
BK16
BG16
BE13
DDRA_SCS0#
DDRA_SCS1#
DDRB_SCS0#
DDRB_SCS1#
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
BH18
BJ15
BJ14
BE16
DDRA_ODT0
DDRA_ODT1
DDRB_ODT0
DDRB_ODT1
SM_RCOMP
SM_RCOMP#
BL15
BK14
SMRCOMP
SMRCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
BK31
BL31
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF_0
SM_VREF_1
AR49
AW4
R397
3.01K_0402_1%
<14>
<14>
<15>
<15>
Layout Note:
SM_VREF trace
width and spacing
is 20/20.
<14>
<14>
<15>
<15>
<14>
<14>
<15>
<15>
2.2U_0805_10V6K
0.01U_0402_16V7K
C467
+1.8V
Maybe not used
CLK_DREF_96M#
R182
CLK_DREF_SSC#
20mil
SM_VREF
B42
C42
H48
H47
CLK_DREF_96M
CLK_DREF_96M#
CLK_DREF_SSC
CLK_DREF_SSC#
PEG_CLK
PEG_CLK#
K44
K45
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
AN47
AJ38
AN42
AN46
DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
AM47
AJ39
AN41
AN45
DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
AJ46
AJ41
AM40
AM44
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
AJ47
AJ42
AM39
AM43
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3
CLK_DREF_96M <16>
CLK_DREF_96M# <16>
CLK_DREF_SSC <16>
CLK_DREF_SSC# <16>
CLK_DREF_96M
CLK_DREF_SSC
1
1K_0402_1%
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3
<22>
<22>
<22>
<22>
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3
<22>
<22>
<22>
<22>
0_0402_5%
0_0402_5%
0_0402_5%
011 = 667MT/s FSB
010 = 800MT/s FSB
0 = DMI x 2
1 = DMI x 4 * (Default)
0 = Lane Reversal Enable
1 = Normal Operation * (Default)
00 = Reserved
01 = XOR Mode Enabled
10 = All Z Mode Enabled
11 = Normal Operation * (Default)
0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled * (Default)
0 = Normal Operation
*(Default)
1 = DMI Lane Reversal Enable
0 = Only PCIE or SDVO is operational.
* (Default)
1 = PCIE/SDVO are operating simu.
CFG[2:0]
CFG5
<22>
<22>
<22>
<22>
0_0402_5%
Strap Pin Table
CFG[19:18] have internal pull down
<22>
<22>
<22>
<22>
DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3
2
PM@
2
PM@
2
PM@
2
PM@
CFG[17:3] have internal pull up
CLK_MCH_3GPLL <16>
CLK_MCH_3GPLL# <16>
DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3
1
R122
1
R146
1
R123
1
R142
+VCCP
R180
0.1U_0402_16V4Z
2
1
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
1
1K_0402_1%
CFG9
CFG[13:12]
CFG16
CFG19
CFG20
(PCIE/SDVO select)
C
0 = No SDVO Device Present* (Default)
1 = SDVO Device Present
B
MCH_CFG_5
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VR_EN
AM49
AK50
AT43
AN49
AM50
@ 4.02K_0402_1%
R141
@ 4.02K_0402_1%
R145
@ 4.02K_0402_1%
R133
@ 4.02K_0402_1%
R155
@ 4.02K_0402_1%
R135
@ 4.02K_0402_1%
R151
@ 4.02K_0402_1%
R113
@ 4.02K_0402_1%
R126
@ 4.02K_0402_1%
R114
10K_0402_5%
R138
10K_0402_5%
MCH_CFG_12
MCH_CFG_13
+1.25VS
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
R132
MCH_CFG_9
E35
A39
C38
B39
E36
MCH_CFG_16
MCH_CFG_7
R173
1K_0402_1%
CL_CLK0 <22>
CL_DATA0 <22>
CL_PWROK <22>
CL_RST# <22>
CL_VREF
MCH_CFG_8
MCH_CFG_19
+3VS
MCH_CFG_20
R172
392_0402_1%
PM_EXTTS#0
SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLK_REQ#
ICH_SYNC#
TEST_1
TEST_2
H35
K36
G39
G40
SDVO_CTRL_CLK
SDVO_CTRL_DATA
MCH_CLKREQ#
A37
R32
MCH_TEST_1
MCH_TEST_2
0.1U_0402_16V4Z
2
R124
R158
MCH_CLKREQ#
R125
SDVO_CTRL_CLK
0_0402_5%
20K_0402_5%
R149
SDVO_CTRL_DATA
R160
Deciphered Date
2007/8/18
3
10K_0402_5%
1
1
@
@
2
2
A
0_0402_5%
0_0402_5%
Compal Secret Data
2006/08/18
Issued Date
+3VS
PM_EXTTS#1
MCH_CLKREQ# <16>
MCH_ICH_SYNC# <22>
4
C464
2.2U_0805_10V6K
0.01U_0402_16V7K
+1.8V
2 20_0402_1%
2 20_0402_1%
D
SM_RCOMP_VOL
R384
1K_0402_1%
CRESTLINE_1p0
PM@
5
C465
2
R382 1
R381 1
SM_RCOMP_VOH
C469
2
MUXING
DDR
SM_CKE_0
SM_CKE_1
SM_CKE_3
SM_CKE_4
<14>
<14>
<15>
<15>
C142 1
NC
VGATE
<22,45> VGATE
BJ51
BK51
BK50
BL50
BL49
BL3
BL2
BK1
BJ1
E1
A5
C51
B50
A50
A49
BK2
DDRA_CLK0#
DDRA_CLK1#
DDRB_CLK0#
DDRB_CLK1#
SDVO_CTRLDATA
PM
<22> PM_BMBUSY#
<5,21,45> H_DPRSTP#
<14> PM_EXTTS#0
<15> PM_EXTTS#1
AW30
BA23
AW25
AW23
R410
1K_0402_1%
2
MCH_CFG_12
MCH_CFG_13
CFG
MCH_CFG_7
MCH_CFG_8
MCH_CFG_9
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
SM_CK#_0
SM_CK#_1
SM_CK#_3
SM_CK#_4
<14>
<14>
<15>
<15>
1
MCH_CFG_5
P27
N27
N24
C21
C23
F23
N23
G23
J20
C20
R24
L23
J23
E23
E20
K23
M20
M24
L32
N33
L35
DDRA_CLK0
DDRA_CLK1
DDRB_CLK0
DDRB_CLK1
2
MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2
AV29
BB23
BA25
AV23
1
<16> MCH_CLKSEL0
<16> MCH_CLKSEL1
<16> MCH_CLKSEL2
CLK
C
SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4
C161
DMI
9/20 Modify NB symbol for Pin BJ29/BE24/C48/D47
GRAPHICS VID
DDRA_SMA14
DDRB_SMA14
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
SA_MA_14
SB_MA_14
RSVD34
RSVD35
RSVD36
LVDSA_DATA#_3
LVDSA_DATA_3
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
ME
<14> DDRA_SMA14
<15> DDRB_SMA14
H10
B51
BJ20
BK22
BF19
BH20
BK18
BJ18
BF23
BG23
BC23
BD24
BJ29
BE24
BH39
AW20
BK20
C48
D47
B44
C44
A35
B37
B36
B34
C34
+1.8V
MISC
D
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD
P36
P37
R35
N35
AR12
AR13
AM12
AN13
J12
AR37
AM36
AL36
AM37
D20
2
Title
Crestline (2/7)-DMI/DDR
Size Document Number
Custom
R ev
0.2
LA-3691P
Date:
Sheet
1
8
of
45
5
4
<15> DDRB_SDM[0..7]
DDRA_SMA[0..13]
<15> DDRB_SMA[0..13]
B
DDRB_SDM[0..7]
DDRB_SMA[0..13]
D
U20E
MEMORY
SYSTEM
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
DDR
C
AR43
AW44
BA45
AY46
AR41
AR45
AT42
AW47
BB45
BF48
BG47
BJ45
BB47
BG50
BH49
BE45
AW43
BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40
AW40
AT39
AW36
AW41
AY41
AV38
AT38
AV13
AT13
AW11
AV11
AU15
AT11
BA13
BA11
BE10
BD10
BD8
AY9
BG10
AW9
BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3
AM8
AN10
AT9
AN9
AM9
AN11
A
U20D
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
DDRB_SDQ[0..63]
SA_BS_0
SA_BS_1
SA_BS_2
BB19
BK19
BF29
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63
DDRA_SBS0 <14>
DDRA_SBS1 <14>
DDRA_SBS2 <14>
SA_CAS#
BL17
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6
DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2
DDRA_SDQS0
DDRA_SDQS1
DDRA_SDQS2
DDRA_SDQS3
DDRA_SDQS4
DDRA_SDQS5
DDRA_SDQS6
DDRA_SDQS7
DDRA_SDQS0#
DDRA_SDQS1#
DDRA_SDQS2#
DDRA_SDQS3#
DDRA_SDQS4#
DDRA_SDQS5#
DDRA_SDQS6#
DDRA_SDQS7#
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
SA_RAS#
SA_RCVEN#
BE18
AY20
SA_WE#
BA19
DDRA_SCAS# <14>
SA_RCVEN#
DDRA_SDQS0 <14>
DDRA_SDQS1 <14>
DDRA_SDQS2 <14>
DDRA_SDQS3 <14>
DDRA_SDQS4 <14>
DDRA_SDQS5 <14>
DDRA_SDQS6 <14>
DDRA_SDQS7 <14>
DDRA_SDQS0# <14>
DDRA_SDQS1# <14>
DDRA_SDQS2# <14>
DDRA_SDQS3# <14>
DDRA_SDQS4# <14>
DDRA_SDQS5# <14>
DDRA_SDQS6# <14>
DDRA_SDQS7# <14>
DDRA_SRAS# <14>
PAD
T15
DDRA_SWE# <14>
CRESTLINE_1p0
PM@
AP49
AR51
AW50
AW51
AN51
AN50
AV50
AV49
BA50
BB50
BA49
BE50
BA51
AY49
BF50
BF49
BJ50
BJ44
BJ43
BL43
BK47
BK49
BK43
BK42
BJ41
BL41
BJ37
BJ36
BK41
BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12
BJ10
BL9
BK5
BL5
BK9
BK10
BJ8
BJ6
BF4
BH5
BG1
BC2
BK3
BE4
BD3
BJ2
BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
B
<14> DDRA_SMA[0..13]
<15> DDRB_SDQ[0..63]
DDRA_SDM[0..7]
MEMORY
D
DDRA_SDQ[0..63]
1
SB_BS_0
SB_BS_1
SB_BS_2
AY17
BG18
BG36
DDRB_SBS0 <15>
DDRB_SBS1 <15>
DDRB_SBS2 <15>
SB_CAS#
BE17
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2
DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3
DDRB_SDQS0
DDRB_SDQS1
DDRB_SDQS2
DDRB_SDQS3
DDRB_SDQS4
DDRB_SDQS5
DDRB_SDQS6
DDRB_SDQS7
DDRB_SDQS0#
DDRB_SDQS1#
DDRB_SDQS2#
DDRB_SDQS3#
DDRB_SDQS4#
DDRB_SDQS5#
DDRB_SDQS6#
DDRB_SDQS7#
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
SB_RAS#
SB_RCVEN#
AV16
AY18
SB_WE#
BC17
SYSTEM
<14> DDRA_SDM[0..7]
2
DDR
<14> DDRA_SDQ[0..63]
3
DDRB_SCAS# <15>
SB_RCVEN#
DDRB_SDQS0 <15>
DDRB_SDQS1 <15>
DDRB_SDQS2 <15>
DDRB_SDQS3 <15>
DDRB_SDQS4 <15>
DDRB_SDQS5 <15>
DDRB_SDQS6 <15>
DDRB_SDQS7 <15>
DDRB_SDQS0# <15>
DDRB_SDQS1# <15>
DDRB_SDQS2# <15>
DDRB_SDQS3# <15>
DDRB_SDQS4# <15>
DDRB_SDQS5# <15>
DDRB_SDQS6# <15>
DDRB_SDQS7# <15>
C
DDRB_SRAS# <15>
PAD
T16
B
DDRB_SWE# <15>
CRESTLINE_1p0
PM@
A
A
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
4
3
2
Title
Crestline (3/7)-DDRII
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
1
9
of
45
5
4
3
2
1
U20C
<18> GMCH_ENBKL
<18> LVDS_SCL
<18> LVDS_SDA
<18> GMCH_ENVDD
D
<18> LVDS_A0#
<18> LVDS_A1#
<18> LVDS_A2#
LVDS_A0#
LVDS_A1#
LVDS_A2#
G51
E51
F49
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
<18> LVDS_A0
<18> LVDS_A1
<18> LVDS_A2
LVDS_A0
LVDS_A1
LVDS_A2
G50
E50
F48
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
<18> LVDS_B0#
<18> LVDS_B1#
<18> LVDS_B2#
LVDS_B0#
LVDS_B1#
LVDS_B2#
G44
B47
B45
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
<18> LVDS_B0
<18> LVDS_B1
<18> LVDS_B2
LVDS_B0
LVDS_B1
LVDS_B2
E44
A47
A45
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA
E27
G27
K27
TVA_DAC
TVB_DAC
TVC_DAC
F27
J27
L27
TVA_RTN
TVB_RTN
TVC_RTN
M35
P33
TV_DCONSEL_0
TV_DCONSEL_1
1
150_0402_5%
2
R153
TV_DCONSEL_0
TV_DCONSEL_1
150_0402_5%
1
R148
1
R143
2
2
R140
TV
LVDS_ACLK#
LVDS_ACLK
LVDS_BCLK#
LVDS_BCLK
LVDS_ACLK#
LVDS_ACLK
LVDS_BCLK#
LVDS_BCLK
LVDS
R152
LVDS_IBG
2.4K_0402_1%
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
<18>
<18>
<18>
<18>
R147
2
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN
L41
L43
N41
N40
D46
C45
D44
E42
R150
C
1
J40
H39
E39
E40
C37
D35
K40
150_0402_5%
0_0402_5%
PM@
0_0402_5%
PM@
GRAPHICS
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
PCI-EXPRESS
CRB 2.37K_1% to GND
0_0402_5%
PM@
Change to 0Ohm when use PM chip
<19> GMCH_CRT_B
<19> GMCH_CRT_R
H32
G32
K29
J29
F29
E29
1
GM@ 150_0402_1%
1
GM@ 150_0402_1%
1
GM@ 150_0402_1%
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
B
<19> GMCH_CRT_HSYNC
1
R85
1
R88
GMCH_CRT_CLK
GMCH_CRT_DATA
K33
G35
F33
CRT_IREF C32
E33
2
GM@ 39_0402_1%
2
GM@ 39_0402_1%
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
J51
L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_N15
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
J50
L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
N45
U39
U47
N51
R50
T42
Y43
W46
W38
AD39
AC46
AC49
AC42
AH39
AE49
AH44
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
M45
T38
T46
N50
R51
U43
W42
Y47
Y39
AC38
AD47
AC50
AD43
AG39
AE50
AH43
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15
2
<19> GMCH_CRT_VSYNC
<19> GMCH_CRT_CLK
<19> GMCH_CRT_DATA
R86
0_0402_5%
PM@
R110
1.3K_0402_1%
20/25mils
C396 1
C400 1
C410 1
C422 1
C425 1
C430 1
C432 1
C442 1
C394 1
C397 1
C402 1
C417 1
C424 1
C427 1
C431 1
C438 1
2
24.9_0402_1%
+VCCP
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
D
PCIE_MTX_C_GRX_N[0..15] <17>
PCIE_MTX_C_GRX_P[0..15] <17>
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15] <17>
PCIE_GTX_C_MRX_P[0..15] <17>
C
C124
2 PM@ 0.1U_0402_10V7K
C130
2 PM@ 0.1U_0402_10V7K
C140
2 PM@ 0.1U_0402_10V7K
C145
2 PM@ 0.1U_0402_10V7K
C153
2 PM@ 0.1U_0402_10V7K
C157
2 PM@ 0.1U_0402_10V7K
C165
2 PM@ 0.1U_0402_10V7K
C171
2 PM@ 0.1U_0402_10V7K
1
C121
2 PM@ 0.1U_0402_10V7K
C126
PM@
0.1U_0402_10V7K
2
C134
2 PM@ 0.1U_0402_10V7K
C143
PM@
0.1U_0402_10V7K
2
C148
2 PM@ 0.1U_0402_10V7K
C154
2 PM@ 0.1U_0402_10V7K
C163
2 PM@ 0.1U_0402_10V7K
C168
2 PM@ 0.1U_0402_10V7K
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N3
PM@
0.1U_0402_10V7K
PCIE_MTX_C_GRX_N4
2
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N7
PM@
0.1U_0402_10V7K
PCIE_MTX_C_GRX_N8
2
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N11
PM@
0.1U_0402_10V7K
PCIE_MTX_C_GRX_N12
2
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N15
2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P13
PM@
0.1U_0402_10V7K
PCIE_MTX_C_GRX_P14
2
PCIE_MTX_C_GRX_P15
B
CRESTLINE_1p0
1
CRB 2.2K , Follow!
R87
0_0402_5%
PM@
1
R154
N43
M43
VGA
2
R147
2
R152
2
R140
<19> GMCH_CRT_G
PEG_COMP
PEG_COMPI
PEG_COMPO
+3VS
PM@
R131 1
2 10K_0402_5%
LCTLB_DATA
R130 1
2 10K_0402_5%
LCTLA_CLK
R108
2.2K_0402_5%
TV_DCONSEL_0
R109
2.2K_0402_5%
TV_DCONSEL_1
A
A
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
4
3
2
Title
Crestline (4/7)-VGA/LVDS/TV
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
1
10
of
45
5
4
3
U20G
R20
T14
W13
W14
Y12
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AJ20
AN14
+VCC_AXG
B
A
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
9/19 change to 330u, 9/29 change to 220u
VCC: 1573mA
(220UF*1, 22UF*1, 0.22UF*2, 0.1UF*1)
+VCCP
1
1
+
C408
C118
C114
C128
Follow DG 1.1
VCC_SM: 3300mA
(330UF*1, 22UF*2, 0.1UF*1)
+1.8V
C474
9/14 add for reservation
1
1
+
1
C164
C177
C181
1
C156
C170
C183
330U_D2E_2.5VM
10U_0805_10V4Z
1U_0603_10V4Z
2
2
2
2
10U_0805_10V4Z
4.7U_0805_10V4Z
@ 0.1U_0402_16V4Z
1U_0603_10V4Z
@
9/18 modify from +1.05VS to +VCC_AXG
VCC_AXG: 7700mA
(330UF*2, 22UF*1, 10UF*1, 1U*1, 0.47U*1, 0.1UF*2)
+VCC_AXG
C433
9/18 Add for 965PM use
1
C434
+
1
+
C115 1
C112 1
C141
C136
C127 1
C119 1
R159
0_0805_5%
PM@
330U_D2E_2.5VM
10U_0805_10V4Z
1U_0603_10V4Z
0.1U_0402_16V4Z
@2
GM@ 2
GM@
GM@ 2
GM@ 2
GM@ 2
GM@
GM@ 2
330U_D2E_2.5VM
10U_0805_10V4Z
0.47U_0603_16V4Z
0.1U_0402_16V4Z
VCC_AXM: 540mA
(22UF*2, 0.22UF*2, 0.1UF*2)
C147
1
C139
C146
C138
1
C137
AL24
AL26
AL28
AM26
AM28
AM29
AM31
AM32
AM33
AP29
AP31
AP32
AP33
AL29
AL31
AL32
AR31
AR32
AR33
+VCCP
+VCCP
1
C150
1
22U_0805_6.3V6M
0.22U_0603_16V7K
0.1U_0402_16V4Z
2
2
2
2
0.22U_0603_16V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
9/29 +1.05VS_AXM change to +1.05VS
J6
1
+VCCP
2
PAD-OPEN 3x3m
+VCC_AXG
@
J2
1
2
PAD-OPEN 3x3m
@
VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
VCC_NCTF_45
VCC_NCTF_46
VCC_NCTF_47
VCC_NCTF_48
VCC_NCTF_49
VCC_NCTF_50
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28
D
POWER
VCC_AXM_NCTF_1
VCC_AXM_NCTF_2
VCC_AXM_NCTF_3
VCC_AXM_NCTF_4
VCC_AXM_NCTF_5
VCC_AXM_NCTF_6
VCC_AXM_NCTF_7
VCC_AXM_NCTF_8
VCC_AXM_NCTF_9
VCC_AXM_NCTF_10
VCC_AXM_NCTF_11
VCC_AXM_NCTF_12
VCC_AXM_NCTF_13
VCC_AXM_NCTF_14
VCC_AXM_NCTF_15
VCC_AXM_NCTF_16
VCC_AXM_NCTF_17
VCC_AXM_NCTF_18
VCC_AXM_NCTF_19
VSS_SCB1
VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6
A3
B2
C1
BL1
BL51
A51
VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7
AT33
AT31
AK29
AK24
AK23
AJ26
AJ23
C
+VCCP
9/29
+1.05VS_AXM
change to
+1.05VS
B
CRESTLINE_1p0
PM@
1005 This is for GM@
Remember open stencil at GM@
VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7
1
C152
C158
1
C172
C173
C175
C166
C159
0.1U_0402_16V4Z
0.22U_0603_16V7K
0.47U_0603_16V4Z
1U_0603_10V4Z
2
2
0.1U_0402_16V4Z
0.22U_0603_16V7K
1U_0603_10V4Z
Issued Date
A
Compal Secret Data
CRESTLINE_1p0
PM@
2006/08/18
Deciphered Date
2007/8/18
Title
5
1
C122
220U_D2_4VMR15
0.22U_0603_16V7K
0.1U_0402_16V4Z
2
2
2
@
10U_0805_10V4Z
0.22U_0603_16V7K
AB33
AB36
AB37
AC33
AC35
AC36
AD35
AD36
AF33
AF36
AH33
AH35
AH36
AH37
AJ33
AJ35
AK33
AK35
AK36
AK37
AD33
AJ36
AM35
AL33
AL35
AA33
AA35
AA36
AP35
AP36
AR35
AR36
Y32
Y33
Y35
Y36
Y37
T30
T34
T35
U29
U31
U32
U33
U35
U36
V32
V33
V36
V37
VSS NCTF
AW45
BC39
BE39
BD17
BD4
AW8
AT6
+VCCP
VSS SCB
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
CRB 270uF , there is no 270u part.
VCC AXM
C
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC GFX NCTF
AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35
BJ32
BJ33
BJ34
BK32
BK33
BK34
BK35
BL33
AU30
+1.8V
VCC SM
POWER
+VCC_AXG
VCC NCTF
VCC_13
U20F
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83
T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31
VCC AXM NCTF
R30
1
VCC GFX
Replace 0 Ohm
by directly
connection
VCC_1
VCC_2
VCC_3
VCC_5
VCC_4
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC SM LF
D
AT35
AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32
VCC CORE
+VCCP
2
4
3
2
Crestline (5/7)-VCC
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
11
1
of
45
4
2
0.1U_0402_16V4Z
2
VSSA_DAC_BG
+1.25VS_DPLLA
B49
VCCA_DPLLA
1
+1.25VS_DPLLB
H49
VCCA_DPLLB
+1.25VS_HPLL
AL2
VCCA_HPLL
+1.25VS_MPLL
AM2
VCCA_MPLL
A41
VCCA_LVDS
B41
VSSA_LVDS
K50
VCCA_PEG_BG
K49
VSSA_PEG_BG
U51
VCCA_PEG_PLL
+1.8V_TX_LVDS
2
1
C90
+3VS
VCCA_LVDS: 10mA
(0.1UF*1)
1000P_0402_50V7K
2
GM@
1
C106
0.1U_0402_16V4Z
VCCA_PEG_BG: 5mA
(0.1UF*1)
2
L24 1
2 +1.25VS_A_PEGPLL
MBK1608121YZF_0603
1
C385
2
1
C387
R302
1_0603_5%
VCCA_PEG_PLL:
10U_0805_10V4Z
0.1U_0402_16V4Z
(0.1UF*1)
2
+1.25VS_A_SM
VCCA_SM: 640mA
+1.25VS
C
+1.25VS
+3VS_SYNC
1
R189
VCC_SYNC: 10mA (0.1UF*1)
+3VS
1
R119
GM@
1
C102
GM@
0.1U_0402_16V4Z
+1.25VS_A_SM_CK
0_0402_5%
PM@
+1.25VS
R190
R89
C352
GM@
0.1U_0402_16V4Z
1
C351
GM@
2
B
22u_0805
0.022U_0402_16V7K
L9 1
2
MBK1608121YZF_0603
GM@
GM@
R106
C350
1
0.1U_0402_16V4Z
GM@ 2
22u_0805
C88
GM@
C162
0_0603_5% 1
C188
C178
C186
AT22
AT21
AT19
AT18
AT17
AR17
AR16
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9
VCCA_SM_10
VCCA_SM_11
VCCA_SM_NCTF_1
VCCA_SM_NCTF_2
BC29
BB29
VCCA_SM_CK_1
VCCA_SM_CK_2
R115
C105
C93
GM@
R118
0.1U_0402_16V4Z
0_0402_5%
2 0.022U_0402_16V7K
PM@
+1.5VS_TVDAC
+1.5VS_QDAC
VCCD_HPLL: 250mA (0.1UF*1)
+1.25VS
R106
C149
0_0805_5%
PM@
C25
B25
C27
B27
B28
A28
VCCA_TVA_DAC_1
VCCA_TVA_DAC_2
VCCA_TVB_DAC_1
VCCA_TVB_DAC_2
VCCA_TVC_DAC_1
VCCA_TVC_DAC_2
M32
L29
VCCD_CRT
VCCD_TVDAC
1
0.1U_0402_16V4Z
2
VCCA_PEG_PLL: 100mA
(0.1UF*1)
+1.25VS_A_PEGPLL
1
C113
N28
VCCD_QDAC
AN2
VCCD_HPLL
U48
VCCD_PEG_PLL
J41
H42
VCCD_LVDS_1
VCCD_LVDS_2
0.1U_0402_16V4Z
2
U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5
VCC_AXD_6
AT23
AU28
AU24
AT29
AT25
AT30
VCC_AXD_NCTF
AR29
+
+1.8V
C389
1
1
1
1
C348
C349
C344
C345
C337
C338
R134
GM@
GM@
GM@
0.1U_0402_16V4Z 0.1U_0402_16V4Z
0.1U_0402_16V4Z
0_0402_5%
2
2
2
2
22U_0805_10V4Z
PM@
GM@
0.022U_0402_16V7K 0.022U_0402_16V7K 0.022U_0402_16V7K
GM@
GM@
GM@
0_0402_5%
GM@
1
C89
R188
1
C155
1U_0603_10V4Z
2
+1.25VS_AXF
10U_0805_10V4Z
2
@
D
C343
+1.25VS
0_0603_5%
C179
22U_0805_6.3V6M
VCC_AXF: 495mA
(10UF*1, 1UF*1)
R273
1
+1.25VS
0_0603_5%
C346
10U_0805_10V4Z
2
1U_0603_10V4Z
+1.25VS
AJ50
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
BK24
BK23
BJ24
BJ23
1
C133
1
C466
22U_0805_6.3V6M
+1.8V_TX_LVDS: 100mA
+1.8V_TX_LVDS
(220UF*1, 1000PF*1)
A43
VCC_HV: 100mA
C40
B40
VCC_HV_1
VCC_HV_2
VCC_DMI: 100mA (0.1UF*1)
0.1U_0402_16V4Z
2
+1.8V_SM_CK
C336
+
C353
VCC_SM_CK: 200mA (22UF*1, 0.1UF*1)
C463
1
2
+1.8V
L34
MBK1608121YZF_0603
1
1
220U_D2_4VMR15
2 GM@
2
GM@
1000P_0402_50V7K
L12 1
2
MBK1608121YZF_0603
GM@
R105
0_0402_5%
PM@
+1.05VS_PEG: 1260mA (220UF*1, 10UF*1)
AH50
AH51
C393
1
R162
+
C120
2
+VCCP
0_0805_5%
B
1
220U_D2_4VMR15
2
2
10U_0805_10V4Z
VTTLF_CAP1
A7
VTTLF_CAP2
F2
AH1 VTTLF_CAP3
VTTLF1
VTTLF2
VTTLF3
+1.8V
+VCCP_PEG
1
VCC_RXR_DMI_1
VCC_RXR_DMI_2
1
2
C472
10U_0805_10V4Z
R396
2
1_0603_5%
0.1U_0402_16V4Z
2
1
+3VS
AD51
W50
W51
V49
V50
+1.05VS_DMI: 100mA (220UF*1, 10UF*1)
+VCCP_PEG
CRESTLINE_1p0
PM@
C398
C371
C347
1
C129
0.47U_0603_16V4Z
2
0.47U_0603_16V4Z
C96
C111
VCC_AXD: 515mA
(22UF*1, 1UF*1)
+1.8V_LVDS
R120
C108
+1.25VS_AXD
0.47U_0603_16V4Z
+3VS_A_TVDAC
C390
330U_D2E_2.5VM
4.7U_0805_10V4Z
0.47U_0603_16V4Z
2
4.7U_0805_10V4Z
2.2U_0805_10V6K
C
VCC_DMI
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5
VTT: 850mA
(220UF*1, 4.7UF*21, 2.2UF*1, 0.47UF*1)
1
C395
B23
B21
A21
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
VCC_TX_LVDS
0_0402_5%
VCCD_CRT
1
POWER
1
C167
VCCA_TV_DAC: 40mA each DAC (0.1UF*1, 0.022UF*1 for each DAC)
+3VS
VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
VCCD_TVDAC / CRT: each 60mA (0.1UF*1, 0.022UF*1)
+1.5VS_TVDAC
GM@
L19 1
2
MBK1608121YZF_0603
GM@
C335
AW18
AV19
AU19
AU18
AU17
+3VS_A_TVDAC
0_0805_5%
PM@
0.022U_0402_16V7K
L13 1
2
MBK1608121YZF_0603
GM@
C187
VCCA_SM_CK: 35mA
(22UF*1, 1UF*2, 0.1UF*1)
R89
+3VS_DACBG
VCCA_DAC_BG: 5mA (0.1UF*1, 0.022UF*1)
+3VS
1
22U_0805_6.3V6M
1U_0603_10V4Z
2
2
@
@
1U_0603_10V4Z
0.1U_0402_16V4Z
VCCA_CRT_DAC: 80mA (0.1UF*1, 0.022UF*1)+3VS_CRTDAC
+3VS
C180
22U_0805_6.3V6M
4.7U_0805_10V4Z
2
2
@
22U_0805_6.3V6M
1U_0603_10V4Z
R136
2
(22UF*21, 4.7UF*1, 1UF*1)
2
0_0805_5% 1
C182
2
0_0603_5%
100mA
VTT
220U_D2_4VMR15
1
VTTLF
10U_0805_10V4Z
0.1U_0402_16V4Z
VCCA_DAC_BG
B32
+3VS_DACBG
C103
AXD
C404
2
A30
AXF
0.5_0603_1%
VCCA_CRT_DAC_1
VCCA_CRT_DAC_2
+1.25VS_DPLLB
L22 1
2
1
10U_FLC-453232-100K_0.25A_10%
C378 +
C403
VCCSYNC
SM CK
1
J32
A33
B33
HV
L25 1
2
MBK1608121YZF_0603
R327
VCCA_DPLLA/B: 100mA
(470UF*1, 0.1UF*1)
+3VS_SYNC
+3VS_CRTDAC
PEG
VCCA_MPLL:150mA
(10UF*1, 0.1UF*1)
D
+VCCP
U20H
2
DMI
+1.25VS_MPLL
2
1
C95
0.1U_0402_16V4Z
CRT
2
220U_D2_4VMR15
PLL
2
0.1U_0402_16V4Z
A LVDS
10U_0805_10V4Z
+1.25VS
C418
A PEG
+1.25VS
1
+1.25VS_DPLLA
A SM
1
L20 1
2
1
10U_FLC-453232-100K_0.25A_10%
C357 +
A CK
VCCA_DPLLA/B: 100mA
(470UF*1, 0.1UF*1)
TV
+1.25VS_HPLL
L26 1
2
MBK1608121YZF_0603
1
C421
2
D TV/CRT
VCCA_HPLL: 50mA
(22UF*1, 0.1UF*1)
3
LVDS
5
10U_0805_10V4Z
R129
+3VS
0_0402_5%
PM@
GM@
1U_0603_10V4Z
D9
2
1
1
R156
RB751V-40TE17_SOD323-2
+VCCP
VCCD_LVDS: 150mA
(10UF*1, 0.1UF*1)
C98
2
+3VS
10_0603_5%
1
0.1U_0402_16V4Z
2
A
A
+1.5VS_TVDAC
+1.5VS
L11 1
2
MBK1608121YZF_0603
+1.5VS
1
C87
R127
VCCD_QDAC: 5mA
(0.1UF*1, 0.022UF*1)
2
L14 1
MBK1608121YZF_0603 1
C110
GM@
0.1U_0402_16V4Z
GM@ 2
22U_0805_10V4Z
2
PM@
Close to VCC_HV (pin C40/B40)
C109
0.022U_0402_16V7K
GM@
R127
PM@
0_0805_5%
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
22u_0805
GM@
5
+1.5VS_QDAC
4
3
2
Title
Crestline (6/7)-VCC
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
1
12
of
45
5
4
3
2
1
U20I
U20J
A13
A15
A17
A24
AA21
AA24
AA29
AB20
AB23
AB26
AB28
AB31
AC10
AC13
AC3
AC39
AC43
AC47
AD1
AD21
AD26
AD29
AD3
AD41
AD45
AD49
AD5
AD50
AD8
AE10
AE14
AE6
AF20
AF23
AF24
AF31
AG2
AG38
AG43
AG47
AG50
AH3
AH40
AH41
AH7
AH9
AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45
AJ49
AK20
AK21
AK26
AK28
AK31
AK51
AL1
AM11
AM13
AM3
AM4
AM41
AM45
AN1
AN38
AN39
AN43
AN5
AN7
AP4
AP48
AP50
AR11
AR2
AR39
AR44
AR47
AR7
AT10
AT14
AT41
AT49
AU1
AU23
AU29
AU3
AU36
AU49
AU51
AV39
AV48
AW1
AW12
AW16
D
C
B
A
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41
C46
C50
C7
D13
D24
D3
D32
D39
D45
D49
E10
E16
E24
E28
E32
E47
F19
F36
F4
F40
F50
G1
G13
G16
G19
G24
G28
G29
G33
G42
G45
G48
G8
H24
H28
H4
H45
J11
J16
J2
J24
J28
J33
J35
J39
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
K12
K47
K8
L1
L17
L20
L24
L28
L3
L33
L49
M28
M42
M46
M49
M5
M50
M9
N11
N14
N17
N29
N32
N36
N39
N44
N49
N7
P19
P2
P23
P3
P50
R49
T39
T43
T47
U41
U45
U50
V2
V3
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50
D
C
VSS
B
CRESTLINE_1p0
PM@
A
CRESTLINE_1p0
PM@
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
4
3
2
Title
Crestline (7/7)-GND
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
1
13
of
45
4
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQS0#
DDRA_SDQS0
<9> DDRA_SDQS0#
<9> DDRA_SDQS0
DDRA_SDQ2
DDRA_SDQ3
D
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQS1#
DDRA_SDQS1
<9> DDRA_SDQS1#
<9> DDRA_SDQS1
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQS2#
DDRA_SDQS2
<9> DDRA_SDQS2#
<9> DDRA_SDQS2
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDM3
EC_TX_P80_DATA
<15,32,34> EC_TX_P80_DATA
DDRA_SDQ26
DDRA_SDQ27
DDRA_CKE0
<8> DDRA_CKE0
C
EC_RX_P80_CLK
DDRA_SBS2
<15,32,34> EC_RX_P80_CLK
<9> DDRA_SBS2
DDRA_SMA12
DDRA_SMA9
DDRA_SMA8
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1
DDRA_SMA10
DDRA_SBS0
DDRA_SWE#
<9> DDRA_SBS0
<9> DDRA_SWE#
DDRA_SCAS#
DDRA_SCS1#
<9> DDRA_SCAS#
<8> DDRA_SCS1#
DDRA_ODT1
<8> DDRA_ODT1
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQS4#
DDRA_SDQS4
<9> DDRA_SDQS4#
<9> DDRA_SDQS4
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ40
DDRA_SDQ41
B
DDRA_SDM5
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ48
DDRA_SDQ49
EC_RX_P80_CLK
R201 1
2 0_0402_5%
EC_RX_P80_CLK_R
<15> EC_RX_P80_CLK_R
DDRA_SDQS6#
DDRA_SDQS6
<9> DDRA_SDQS6#
<9> DDRA_SDQS6
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ58
DDRA_SDQ59
D_CK_SDATA
D_CK_SCLK
<15,16,24,25> D_CK_SDATA
<15,16,24,25> D_CK_SCLK
+3VS
C234
1
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SA0
SA1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
9/25 Change DIMM0 to SP070004Z00 (HBL50)
1
1K_0402_1%
20mils
DDRA_SDQ6
DDRA_SDQ7
+DIMM_VREF
1
DDRA_SDQ12
DDRA_SDQ13
1
C224
C225
1
R198
2
DDRA_SDM1
0.1U_0402_16V4Z
2
2.2U_0805_10V6K
1K_0402_1%
220P_0402_50V7K
2 @
DDRA_CLK0 <8>
DDRA_CLK0# <8>
DDRA_SDQ20
DDRA_SDQ21
R207 1
DDRA_SDM2
2 0_0402_5%
PM_EXTTS#0 <8>
<9> DDRA_SDQ[0..63]
+1.8V
1
DDRA_SDQS3# <9>
DDRA_SDQS3 <9>
DDRA_SDQ30
DDRA_SDQ31
DDRA_CKE1
Layout Note:
Place near JP35
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
<9> DDRA_SDM[0..7]
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQS3#
DDRA_SDQS3
DDRA_SMA[0..13]
<9> DDRA_SMA[0..13]
DDRA_SDQ22
DDRA_SDQ23
2
C232
2.2U_0805_10V6K
DDRA_CKE1 <8>
DDRA_CKE0
DDRA_SBS2
1
2
RP14
4
3
56_0404_4P2R_5%
DDRA_SMA11
DDRA_SMA7
DDRA_SMA6
DDRA_SMA12
1
DDRA_SMA9
2
RP15
4
3
56_0404_4P2R_5%
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0
DDRA_SMA8
DDRA_SMA5
1
2
RP16
4
3
56_0404_4P2R_5%
1
2
RP17
4
3
56_0404_4P2R_5%
DDRA_SMA10
1
DDRA_SBS0
2
RP18
4
3
56_0404_4P2R_5%
DDRA_SWE#
1
DDRA_SCAS#
2
RP19
4
3
56_0404_4P2R_5%
DDRA_SCS1#
1
DDRA_ODT1
2
RP20
4
3
56_0404_4P2R_5%
DDRA_SMA11
1
DDRA_SMA14
2
RP21
4
3
56_0404_4P2R_5%
+0.9VS
DDRA_SMA6
DDRA_SMA7
1
2
RP22
4
3
56_0404_4P2R_5%
1
DDRA_SMA2
DDRA_SMA4
1
2
RP23
4
3
56_0404_4P2R_5%
DDRA_SBS1
DDRA_SMA0
1
2
RP24
4
3
56_0404_4P2R_5%
DDRA_SCS0#
1
DDRA_SRAS#
2
RP25
4
3
56_0404_4P2R_5%
DDRA_SMA13
1
DDRA_ODT0
2
RP26
4
3
56_0404_4P2R_5%
DDRA_ODT0
DDRA_SMA13
DDRA_SMA3
DDRA_SMA1
DDRA_SBS1 <9>
DDRA_SRAS# <9>
DDRA_SCS0# <8>
DDRA_ODT0 <8>
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDM4
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQS5#
DDRA_SDQS5
<8> DDRA_SMA14
DDRA_SDQS5# <9>
DDRA_SDQS5 <9>
95.10.5 modify
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ52
DDRA_SDQ53
DDRA_CLK1 <8>
DDRA_CLK1# <8>
DDRA_SDM6
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQS7#
DDRA_SDQS7
DDRA_SDQS7# <9>
DDRA_SDQS7 <9>
DDRA_CKE1
DDRA_SDQ62
DDRA_SDQ63
R204 1
R205 1
2.2U_0805_10V6K
2
1
C233
2.2U_0805_10V6K
2
1
C242
2.2U_0805_10V6K
2
C246
2.2U_0805_10V6K
+1.8V
1
1
R208
2
C243
0.1U_0402_16V4Z
1
2
1
C244
0.1U_0402_16V4Z
2
1
C230
0.1U_0402_16V4Z
2
C231
0.1U_0402_16V4Z
+0.9VS
1
2
2
C235
0.1U_0402_16V4Z
1
2
1
C236
0.1U_0402_16V4Z
2
1
C237
0.1U_0402_16V4Z
2
1
C238
0.1U_0402_16V4Z
2
C239
0.1U_0402_16V4Z
B
C240
0.1U_0402_16V4Z
1
2
1
C241
0.1U_0402_16V4Z
2
1
C250
0.1U_0402_16V4Z
2
1
C251
0.1U_0402_16V4Z
2
C252
0.1U_0402_16V4Z
+0.9VS
1
2
C253
0.1U_0402_16V4Z
1
2
1
C254
0.1U_0402_16V4Z
2
C255
0.1U_0402_16V4Z
2
56_0402_5%
2 10K_0402_5%
2 10K_0402_5%
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
Layout Note:
Pla ce these resistor
closely JP35,all
trace length Max=1.5"
2006/08/18
2007/8/18
Deciphered Date
3
A
Compal Secret Data
4
2
1
C245
C
DDRA_SMA14
DDRA_SBS1
DDRA_SRAS#
DDRA_SCS0#
1
+0.9VS
Issued Date
5
D
C221
DDRA_SDQ14
DDRA_SDQ15
DIMM0 STD H:5.2mm (BOT)
0.1U_0402_16V4Z
2
2
2.2U_0805_10V6K
R195
+DIMM_VREF
DDRA_SDM0
Change PCB Footprint
C228
+1.8V
DDRA_SDQ4
DDRA_SDQ5
TYCO_292526-4
ME@
+3VS
A
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
1
+DIMM_VREF
1
2
+1.8V
JP25
2
1
+1.8V
3
2
5
2
Title
DDRII-SODIMM0
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
1
14
of
45
A
B
C
D
E
9/25 Change DIMM1 to SP070006F00
+1.8V
+1.8V
+DIMM_VREF
JP23
+DIMM_VREF
DDRB_SDQ0
DDRB_SDQ1
1
<9> DDRB_SDQS0#
<9> DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS0
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ8
DDRB_SDQ9
<9> DDRB_SDQS1#
<9> DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS1
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ16
DDRB_SDQ17
<9> DDRB_SDQS2#
<9> DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS2
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDM3
EC_TX_P80_DATA
<14,32,34> EC_TX_P80_DATA
2
DDRB_SDQ26
DDRB_SDQ27
<8> DDRB_CKE0
<14,32,34> EC_RX_P80_CLK
<9> DDRB_SBS2
DDRB_CKE0
EC_RX_P80_CLK
DDRB_SBS2
DDRB_SMA12
DDRB_SMA9
DDRB_SMA8
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1
<9> DDRB_SBS0
<9> DDRB_SWE#
<9> DDRB_SCAS#
<8> DDRB_SCS1#
<8> DDRB_ODT1
DDRB_SMA10
DDRB_SBS0
DDRB_SWE#
DDRB_SCAS#
DDRB_SCS1#
DDRB_ODT1
DDRB_SDQ32
DDRB_SDQ33
<9> DDRB_SDQS4#
<9> DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS4
DDRB_SDQ34
DDRB_SDQ35
3
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDM5
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ48
DDRB_SDQ49
EC_RX_P80_CLK_R
<14> EC_RX_P80_CLK_R
<9> DDRB_SDQS6#
<9> DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS6
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDM7
DDRB_SDQ58
DDRB_SDQ59
<14,16,24,25> D_CK_SDATA
<14,16,24,25> D_CK_SCLK
D_CK_SDATA
D_CK_SCLK
+3VS
4
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDRB_SDQ4
DDRB_SDQ5
DDRB_SMA[0..13]
<9> DDRB_SMA[0..13]
DDRB_SDM0
C199
<9> DDRB_SDQ[0..63]
DDRB_SDQ6
DDRB_SDQ7
1
DDRB_SDM1
DDRB_CLK0 <8>
DDRB_CLK0# <8>
DDRB_CLK0?
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ20
DDRB_SDQ21
R199 1
DDRB_SDM2
0_0402_5%
2
Layout Note:
Place near JP34
PM_EXTTS#1 <8>
DDRB_SDQ22
DDRB_SDQ23
+1.8V
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQS3#
DDRB_SDQS3
C483
DDRB_SDQS3# <9>
DDRB_SDQS3 <9>
+0.9VS
DDRB_SDQ30
DDRB_SDQ31
DDRB_CKE1
DDRB_SMA14
DDRB_CKE1 <8>
DDRB_SMA14 <8>
DDRB_SMA11
DDRB_SMA7
DDRB_SMA6
DDRB_SBS1
DDRB_SRAS#
DDRB_SCS0#
DDRB_ODT0
DDRB_SMA13
DDRB_CKE0
DDRB_SBS2
1
2
RP1
4
3
56_0404_4P2R_5%
DDRB_SMA12
DDRB_SMA9
1
2
RP2
4
3
56_0404_4P2R_5%
DDRB_SMA8
DDRB_SMA5
1
2
RP3
4
3
56_0404_4P2R_5%
DDRB_SBS1 <9>
DDRB_SRAS# <9>
DDRB_SCS0# <8>
DDRB_SMA3
DDRB_SMA1
1
2
RP4
4
3
56_0404_4P2R_5%
DDRB_ODT0 <8>
DDRB_SMA10
DDRB_SBS0
1
2
RP5
4
3
56_0404_4P2R_5%
DDRB_SWE#
DDRB_SCAS#
1
2
RP6
4
3
56_0404_4P2R_5%
DDRB_SCS1#
DDRB_ODT1
1
2
RP7
4
3
56_0404_4P2R_5%
DDRB_SMA11
DDRB_CKE1
1
2
RP8
4
3
56_0404_4P2R_5%
DDRB_SMA6
DDRB_SMA7
1
2
RP9
4
3
56_0404_4P2R_5%
DDRB_SMA2
DDRB_SMA4
1
2
RP10
4
3
56_0404_4P2R_5%
DDRB_SBS1
DDRB_SMA0
1
2
RP11
4
3
56_0404_4P2R_5%
DDRB_SCS0#
DDRB_SRAS#
1
2
RP12
4
3
56_0404_4P2R_5%
DDRB_SMA13
DDRB_ODT0
1
2
RP13
4
3
56_0404_4P2R_5%
DDRB_SDQ36
DDRB_SDQ37
C487
1
C219
1
C220
1
C216
1
2
+1.8V
1
C217
1
C482
1
C479
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
C192
DDRB_SDM4
1
2.2U_0805_10V6K
2.2U_0805_10V6K
2.2U_0805_10V6K
2
2
2
2
2
2.2U_0805_10V6K
2.2U_0805_10V6K
C218
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
1
C193
1
C194
1
C195
1
C196
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQS5#
DDRB_SDQS5
DDRB_SDQS5# <9>
DDRB_SDQS5 <9>
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ52
DDRB_SDQ53
DDRB_CLK1 <8>
DDRB_CLK1# <8>
DDRB_SDM6
DDRB_CLK1?
DDRB_SDQ54
DDRB_SDQ55
<8> DDRB_SMA14
DDRB_SDQS7# <9>
DDRB_SDQS7 <9>
DDRB_SMA14
1
R194
1
C198
1
C203
1
C204
1
C205
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
C206
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQS7#
DDRB_SDQS7
3
+0.9VS
C197
1
C207
1
C208
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
2
56_0402_5%
DDRB_SDQ62
DDRB_SDQ63
R196
R197
1
1
2 10K_0402_5%
2 10K_0402_5%
Layout Note:
Pla ce these resistor
closely JP35,all
trace length Max=1.5"
+3VS
DIMM1 STD H:9.2mm (BOT)
2006/08/18
Issued Date
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
2007/8/18
Deciphered Date
C
4
Compal Secret Data
B
1
DDRB_SDQ12
DDRB_SDQ13
TYCO_292530-4
ME@
A
C200
2.2U_0805_10V6K
2
2
0.1U_0402_16V4Z
DDRB_SDM[0..7]
<9> DDRB_SDM[0..7]
1
DDRB_SDQ[0..63]
D
Title
DDRII-SODIMM1
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
E
15
of
45
5
4
200
100
PCI
MHz
+3VS
1
R460
2
0_1206_5% 1
1
1
166
100
10U_0805_10V4Z
CPU Driven
667MHz
No Stuff
R401
R408
R417
Stuff
R401
R417
R447
No Stuff
R408
R430
R438
R408
R417
R447
2
0.1U_0402_16V4Z
R401
R430
R438
R430
R438
1
R461
2
0_1206_5%
1
No Stuff
2
0.1U_0402_16V4Z
R447
2
1
10U_0805_10V4Z
C491
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
R430
0.1U_0402_16V4Z
2.2K_0402_5%
1
2
0.1U_0402_16V4Z
2
1
C519
0.1U_0402_16V4Z
2
1
C517
0.1U_0402_16V4Z
2
1
C490
0.1U_0402_16V4Z
2
C492
2.2K_0402_5%
D_CK_SDATA
3
Q34
2N7002_SOT23
D
+3VS
0.1U_0402_16V4Z
<22,30> ICH_SMBCLK
1
3
D_CK_SCLK
Q32
2N7002_SOT23
10/17 : Change P/N from SA0001GT00 to SA00001GT10
+3VM_CK505
2
1
56_0402_5%
@
1
2
+1.25VM_CK505
MCH_CLKSEL0 <8>
R388
1K_0402_5%
U23
2
9
16
61
VDD_PCI
VDD48
VDDPLL3
VDDREF
39
55
VDDSRC
VDDCPU
12
20
26
VDD96_IO
VDDPLL3_IO
VDDSRC_IO
36
49
VDDSRC_IO
VDDCPU_IO
NC
48
SCLK
SDATA
64
63
D_CK_SCLK
D_CK_SDATA
PCI_STOP#
CPU_STOP#
38
37
PM_STP_PCI#
PM_STP_CPU#
CPU0
CPU0#
54
53
CLK_CPU_BCLK
CLK_CPU_BCLK#
CPU1_F
CPU1#_F
51
50
CLK_MCH_BCLK
CLK_MCH_BCLK#
2
R385
1K_0402_5%
@
<22> SATA_CLKREQ#
2 R415
PCI_CLK0 1
PCI0/CR#_A
<8> MCH_CLKREQ#
475_0402_1%1
2 R403
PCI_CLK1 3
PCI1/CR#_B
PCI2_TME 4
PCI2/TME
PCI3
2
+VCCP
475_0402_1%1
SRC8/ITP
SRC8#/ITP#
47
46
SRC10#
SRC10
35
34
1
R444
FSB
1K_0402_5%
@
1
2
22_0402_5% 1
2 R401
PCI_CLK3 5
<34> CLK_PCI_DB
33_0402_5% 1
2 R413
27_SEL
6
PCI4/27_Select
<20> CLK_PCI_ICH
33_0402_5% 1
2 R412
ITP_EN
7
PCIF5/ITP_EN
MCH_CLKSEL1 <8>
R448
1K_0402_5%
1
1
2
R450
0_0402_5%
<32> CLK_PCI_LPC
CLK_XTAL_IN
60
X1
CLK_XTAL_OUT
59
X2
2
R445
0_0402_5%
@
D_CK_SCLK <14,15,24,25>
D_CK_SDATA <14,15,24,25>
PM_STP_PCI# <22>
PM_STP_CPU# <22>
CLK_CPU_BCLK <4>
CLK_CPU_BCLK# <4>
C
1
1
2
R393
0_0402_5%
<5> CPU_BSEL1
2
1
C520
R387
R386
2.2K_0402_5%
FSA 2
1
<5> CPU_BSEL0
1
C493
<22,30> ICH_SMBDATA
C533
+VCCP
C
1
C494
Need to update Symbol
Stuff
800MHz
1
C521
+1.25VM_CK505
+1.25VS
Stuff
*(Default)
1
C522
33.3
FSB Frequency Selet:
D
1
C518
R434
33.3
2
0
+3VS
1
C534
S
0
SRC
MHz
S
1
0
CPU
MHz
D
CLKSEL0
2
G
FSLA
CLKSEL1
1
2
G
FSLB
CLKSEL2
2
D
FSLC
3
+3VM_CK505
CLK_MCH_BCLK <7>
CLK_MCH_BCLK# <7>
CLK_PCIE_EXP#
CLK_PCIE_EXP
CLK_PCIE_EXP# <25>
CLK_PCIE_EXP <25>
R441 1
R439 1
R417 1
SRC11/CR#_H
SRC11#/CR#_G
33
32
SRC9
SRC9#
30
31
CLK_PCIE_WLAN
CLK_PCIE_WLAN#
SRC7/CR#_F
SRC7#/CR#_E
44
43
R_CLKREQ#_E R440 1
475_0402_1%
475_0402_1%
2
2
R411 1
+VCCP
SRC6
SRC6#
CLK_PCIE_LAN
CLK_PCIE_LAN#
SRC4
SRC4#
27
28
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
33_0402_5% 1
2 R399
FSA
10
USB_48MHZ/FSLA
FSB
57
FSLB/TEST MODE
22_0402_5% 1
22_0402_5% 1
2 R442
2 R443
FSC
62
REF0/FSLC/TEST_SEL
45
VDDSRC_IO
SRC3/CR#_C
SRC3#/CR#_D
24
25
CLK_PCIE_ICH
CLK_PCIE_ICH#
GNDSRC
SRC2/SATA
SRC2#/SATA#
21
22
CLK_PCIE_SATA
CLK_PCIE_SATA#
SRC1/SE1/27MHz_NonSS
SRC1#/SE2/27MHz_SS
17
18
CLK_PCIE0
CLK_PCIE0#
2 10K_0402_5%
+3VS
475_0402_1%
2
CLKREQ_LAN# <30>
2 10K_0402_5%
+3VS
B
CLK_PCIE_LAN <30>
CLK_PCIE_LAN# <30>
2
<22> CLK_ICH_48M
41
40
+3VS
EXP_CLKREQ# <25>
WLAN_CLKREQ# <24>
CLK_PCIE_WLAN <24>
CLK_PCIE_WLAN# <24>
R449 1
B
2 10K_0402_5%
1
2
R456
0_0402_5%
MCH_CLKSEL2 <8>
<34> CLK_14M_SIO
<22> CLK_ICH_14M
R455
1K_0402_5%
2
<5> CPU_BSEL2
1K_0402_5%
@
1
2
+1.25VM_CK505
1
1
FSC
1
R453
R451
2.2K_0402_5%
2
1
R452
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
0_0402_5%
@
For 27_SEL, 0 = Enable DOT96 & SRC1,
2
0.1U_0402_16V4Z
42
8
For PCI2_EN, 0 = Overclocking of CPU and SRC Allowed
1 = Overclocking of CPU and SRC NOT allowed
2
19
GND
52
GNDCPU
23
GNDSRC
58
GNDREF
ITP_EN
1
GNDSRC
10K_0402_5%
1
29
10K_0402_5%
PM@
27_SEL
13
14
CK_PWRGD/PD#
56
R_CLK_DOT
R_CLK_DOT#
R405
R404
R390
R389
1
1
1
1
2
2
2
2
GM@
GM@
PM@
PM@
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
R407
R406
R392
R391
1
1
1
1
2
2
2
2
GM@
GM@
PM@
PM@
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
CK_PW RGD
* Internal Pull-Up Resistor
<BOM Structure>
** Internal Pull-Down Resistor
R400
R402
R414
10K_0402_5%
10K_0402_5%
GM@
10K_0402_5%
@
CLK_DREF_96M <8>
CLK_DREF_96M# <8>
CLK_PCIE_VGA <17>
CLK_PCIE_VGA# <17>
CK_PWRGD <22>
2
C530
2
C480
2
C529
2
C477
2
C485
2
1 CLK_ICH_48M
@ 5P_0402_50V8C
1 CLK_ICH_14M
@ 4.7P_0402_50V8C
1 CLK_PCI_ICH
@ 4.7P_0402_50V8C
1 CLK_14M_SIO
@ 4.7P_0402_50V8C
1 CLK_PCI_LPC
@ 4.7P_0402_50V8C
1 CLK_PCI_DB
@ 4.7P_0402_50V8C
Place close to U35
A
Compal Secret Data
2006/08/04
Issued Date
ICS9LPRS365/SA00001GT00
2006/10/06
Deciphered Date
4
CLK_DREF_SSC <8>
CLK_DREF_SSC# <8>
CLK_27M_VGA <17>
CLK_27M_VGA# <17>
C471
ICS9LPRS365
2
2
SRC0/DOT96
SRC0/DOT96#
PCI2_TME
Routing the trace at least 10mil
5
GND
10K_0402_5%
@
CLK_XTAL_OUT
27P_0402_50V8J
1
C524
GND48
15
R418
1
2
1
Y3
14.31818MHZ_16PF_DSX840GA
11
R408
2
27P_0402_50V8J
CLK_PCIE_SATA <21>
CLK_PCIE_SATA# <21>
GNDPCI
R395
1
C525
A
1
CLK_XTAL_IN
+3VS
2
2
+3VS
CLK_PCIE_ICH <22>
CLK_PCIE_ICH# <22>
C489
1= Enable SRC0 & 27MHz
+3VS
CLK_MCH_3GPLL <8>
CLK_MCH_3GPLL# <8>
3
2
Title
Clock generator
Size
Document Number
Rev
0.2
LA-3691P
Date:
Sheet
1
16
of
45
5
4
3
2
1
D
<10> PCIE_MTX_C_GRX_N[0..15]
<10> PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
+1.5VS
+3VS
+2.5VS
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
+5VS
+1.8VS
<16> CLK_PCIE_VGA
<16> CLK_PCIE_VGA#
<19> VGA_DDCCLK
<19> VGA_DDCDATA
B+
<19> VGA_VSYNC
<19> VGA_HSYNC
<19> VGA_CRT_R
<19> VGA_CRT_G
<19> VGA_CRT_B
HRS_FX8-80P-SV1(92)
ME@
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
C
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
+5VS
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
2
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14
SUSP#
VGA_THER_ALERT#
1
SUSP# <25,32,37,40,42,43,44>
VGA_THER_ALERT# <22>
+2.5VS
2
1
PM@
PM@
2
1
@
2
1
0.1U_0402_16V4Z
C458
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
0.1U_0402_16V4Z
C454
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1
0.1U_0402_16V4Z
C176
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
@
VGA_ENBKL <18>
PLT_RST_BUF# <8,20,22,24,25,30>
CLK_27M_VGA <16>
CLK_27M_VGA# <16>
+3VS
CARD_COMP
CARD_LUMA
CARD_CRMA
HRS_FX8-80P-SV1(92)
ME@
B
1
2
PM@
C445
0.047U_0402_16V4Z
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
JP20
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
0.1U_0402_16V4Z
C174
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
MAX. 655mA @ 3.3V
C444
0.047U_0402_16V4Z
JP19
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_P[0..15]
<10> PCIE_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
MAX. 130mA @ 2.5V
PCIE_MTX_C_GRX_N[0..15]
PCIE_GTX_C_MRX_N[0..15]
<10> PCIE_GTX_C_MRX_N[0..15]
C
D
MAX. 4.06A @ 1.8V
1
2
B
PM@
A
A
Title
5
4
3
2
VGA/B connector
Size
Document Number
Custom IEL10 LA-3451P
Date:
Sheet
1
17
Rev
0.2
of
45
5
4
3
2
LCD POWER CIRCUIT
INVERTER Conn.
+3VS
+3VALW
+LCDVDD
JP3
W=60mils
B+ <32> INVT_PWM
1
1
1
OUT
2 GM@
C330
+3VS
0.1U_0603_50V4Z
R6
0.047U_0402_16V7K
GM@
3
Q5
DTC124EKAT146_SC59-3
GM@
4.7K_0402_5%
W=60mils
1
1
C334
4.7U_0805_10V4Z
2
2
D3
<32> BKOFF#
BKOFF#
1
<10> GMCH_ENBKL
0.1U_0402_16V4Z
2
RB751V-40TE17_SOD323-2
2
1
R69
GM@ 0_0402_5%
2
1
R72
PM@ 0_0402_5%
C333 GM@
<17> VGA_ENBKL
2
@
R71
100K_0402_5%
C14
Q29
AO3413_SOT23-3
GM@
D
MOLEX_53780-0790
ME@
2
IN
L1
2
1+INVPWR_B+
FBMA-L11-201209-221LMA30T_0805
+LCDVDD
1
GND
2
1
<10> GMCH_ENVDD
2 0_0402_5%
<32> DAC_BRIG
4.7U_0805_10V4Z
1
1
3
DTC124EK
2
1
2
1
R270 GM@ 1K_0402_5%
S
R74 1
GM@
G
2
G
D
D
GM@ Q6
2N7002_SOT23
3
2
2
1
2
3
4
5
6
7
DISPOFF#
S
1 2
R271
10K_0402_5%
GM@
C329 GM@
DISPOFF#
ENBKL
ENBKL <32>
2
R90
300_0603_5%
GM@
D
1
R66
1
100K_0402_5%
LCD/PANEL BD. Conn.
ME@
ACES_87216-3006
31
C
<10> LVDS_A0#
<10> LVDS_A0
LVDS_A0#
LVDS_A0
<10> LVDS_A1#
<10> LVDS_A1
LVDS_A1#
LVDS_A1
LVDS_A2#
LVDS_A2
<10> LVDS_A2#
<10> LVDS_A2
LVDS_ACLK#
LVDS_ACLK
<10> LVDS_ACLK#
<10> LVDS_ACLK
2
+LCDVDD
1
+LCDVDD_L
(60 MIL)
L18
FBMA-L11-201209-221LMA30T_0805
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GNDGND
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
JP16
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
32
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
LVDS_B0#
LVDS_B0
LVDS_B0# <10>
LVDS_B0 <10>
LVDS_B1#
LVDS_B1
LVDS_B1# <10>
LVDS_B1 <10>
LVDS_B2#
LVDS_B2
C
LVDS_B2# <10>
LVDS_B2 <10>
LVDS_BCLK#
LVDS_BCLK
LVDS_BCLK# <10>
LVDS_BCLK <10>
LVDS_DATA
LVDS_CLK
+3VS
Follow HEL80's pin definition
Except pin 29
+3VS
B
B
R77 GM@
2.2K_0402_5%
R75 GM@
2.2K_0402_5%
LVDS_DATA
<10> LVDS_SDA
LVDS_CLK
<10> LVDS_SCL
A
A
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
5
4
3
2
Title
LVDS & DVI Connector
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
1
18
of
45
A
B
C
D
E
CRT Connector
1
1
Place closed to chipset
1
1
R80
R93
<17> VGA_CRT_B
<10> GMCH_CRT_B
1
1
R79
R92
L2
1
2
FLM1608081R8K_0603
L3
1
2
FLM1608081R8K_0603
L4
1
2
FLM1608081R8K_0603
CRT_R_1
0_0402_5%
0_0402_5%
CRT_G_1
0_0402_5%
0_0402_5%
CRT_B_1
0_0402_5%
0_0402_5%
R8
R9
R12
C15
150_0402_1%
22P_0402_50V8J
1
C16
1
1
22P_0402_50V8J
2
2
2
2
2
RED
GREEN
BLUE
1
<17> VGA_CRT_G
<10> GMCH_CRT_G
2
2 PM@
GM@
2
2 PM@
GM@
2
2 PM@
GM@
1
1
1
R78
R91
1
<17> VGA_CRT_R
<10> GMCH_CRT_R
150_0402_1%
C17
1
C6
22P_0402_50V8J
2
22P_0402_50V8J
2
1
+5VS
1
C13
22P_0402_50V8J
2
2
C12
22P_0402_50V8J
+CRT_VCC
D1
2
1
W=40mils
RB411DT146_SOT23-3
150_0402_1%
1
+CRT_VCC
2
0.1U_0402_16V4Z
2
R30
1
1
2
<10> GMCH_CRT_HSYNC
2
A
1
1K_0402_5%
2
FCM1608C-121T_0603
JVGA_HS
1
L6
2
FCM1608C-121T_0603
JVGA_VS
C5
0.1U_0402_16V4Z
2
U2
CRT_HSYNC_1
4
Y
@ C10
10P_0402_50V8J
G
2
PM@ 0_0402_5%
2
GM@ 0_0402_5%
3
1
R82
1
R81
<17> VGA_HSYNC
OE#
P
5
C34
1
L5
SN74AHCT1G125DCKR_SC70-5
1
1
2
2
@ C11
10P_0402_50V8J
2
+CRT_VCC
+CRT_VCC
2
0.1U_0402_16V4Z
<10> GMCH_CRT_VSYNC
OE#
U3
A
RED
Y
CRT_VSYNC_1
4
GREEN
G
<17> VGA_VSYNC
2
2
PM@ 0_0402_5%
2
GM@ 0_0402_5%
3
1
R83
1
R84
JP1
1
1
P
C42
5
Place closed to chipset
SN74AHCT1G125DCKR_SC70-5
BLUE
JVGA_VS
JVGA_HS
VGA_DDC_DAT
VGA_DDC_CLK
Update Footprint
PIN4
1
PIN ASSIGMENT
PIN D-SUB
1
9
1
2
3
6
4
2
5
7
6
3
7
8
8
14
10
9
13
11
12
10
15
11
4
12
+3VS
1
1
2.2K
2.2K_0402_5%
R60
1
1
R62
G
G
2
2
R55
2
R61
3
1
D
1
0_0402_5% GM@
1
2.2K_0402_5%
VGA_DDC_DAT
Q2
2N7002_SOT23
S
<10> GMCH_CRT_CLK
3
D
1
0_0402_5% GM@
S
<10> GMCH_CRT_DATA
R56
2.2K_0402_5%
R58
2
PM@
2
2
0_0402_5%
2
2
<17> VGA_DDCDATA
+3VS
1
R53
2.2K_0402_5%
2
3
+CRT_VCC
2.2K
VGA_DDC_CLK
Q3
2N7002_SOT23
<17> VGA_DDCCLK
2
0_0402_5%
PM@
1
R64
C9
@
1
2
100P_0402_50V8J
1
C8 @ 2
68P_0402_50V8K
4
2006/08/18
Issued Date
B
C
13
14
GND1
GND2
ACES_87213-1200G
2 0.1U_0402_16V4Z ME@
3
4
2007/8/18
Deciphered Date
A
1
2
3
4
5
6
7
8
9
10
11
12
FUNCTION
+CRT_VCC
RED
GND
GREEN
GND
BLUE
GND
VSYNC
GND
HSYNC
SENSE
SM_DAT
SM_CLK
PIN4
Compal Secret Data
C7
1
2
3
4
5
6
7
8
9
10
11
12
D
Title
CRT & TV-OUT Connector
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
E
19
of
45
5
4
3
2
1
+3VS
10/17 : Change P/N from SA000010G00 to SA00001JU10
2 8.2K_0402_5%
PCI_DEVSEL#
1
2 8.2K_0402_5%
PCI_STOP#
R281 1
2 8.2K_0402_5%
PCI_TRDY#
R96
10/17 : FootPrint : SA000010G00
BOM : SA00001JU10
D
U5B
R101 1
2 8.2K_0402_5%
PCI_FRAME#
R111 1
2 8.2K_0402_5%
PCI_PLOCK#
R278 1
2 8.2K_0402_5%
P CI_IRDY#
R297 1
2 8.2K_0402_5%
PCI_SERR#
R107 1
2 8.2K_0402_5%
PCI_PERR#
R301 1
2 8.2K_0402_5%
PCI_PIRQA#
R128 1
2 8.2K_0402_5%
PCI_PIRQB#
R139 1
2 8.2K_0402_5%
PCI_PIRQC#
R99
+3VS
C
1
2 8.2K_0402_5%
PCI_PIRQD#
R298 1
2 8.2K_0402_5%
PCI_PIRQE#
R300 1
2 8.2K_0402_5%
PCI_PIRQF#
R296 1
2 8.2K_0402_5%
PCI_PIRQG#
R121 1
2 8.2K_0402_5%
PCI_PIRQH#
R116 1
2 8.2K_0402_5%
PCI_REQ#0
R102 1
2 8.2K_0402_5%
PCI_REQ#1
R103 1
2 8.2K_0402_5%
PCI_REQ#2
R100 1
2 8.2K_0402_5%
PCI_REQ#3
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
D20
E19
D19
A20
D17
A21
A19
C19
A18
B16
A12
E16
A14
G16
A15
B6
C11
A9
D11
B12
C12
D10
C7
F13
E11
E13
E12
D8
A6
E8
D6
A3
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
F9
B5
C5
A10
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PCI
PCI_REQ#0
PCI_GNT#0
PCI_REQ#1
REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
A4
D7
E18
C18
B19
F18
A11
C10
C/BE0#
C/BE1#
C/BE2#
C/BE3#
C17
E15
F16
E17
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
C8
D9
G6
D16
A7
B7
F10
C16
C9
A17
PCIRST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PLTRST#
PCICLK
PME#
AG24
B10
G7
PLT_RST#
CLK_PCI_ICH
PCI_PME#
PCI_REQ#2
PCI_REQ#3
PCI_GNT#3
P CI_IRDY#
Place closely pin B10
CLK_PCI_ICH
2
D
1
R280
10_0402_5%
@
CLK_PCI_ICH <16>
PCI_PME# <32>
C356
10P_0402_50V8J
@
Interrupt I/F
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
F8
G11
F12
B3
C
1
R97
1
2
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
ICH8M REV 1.0
A16 Swap Override Strap
1
2 1K_0402_5% PCI_GNT#0
@
1
2 1K_0402_5%
@
PCI_GNT#3
Low= A16 swap override Enable
High= Default*
+3VS
PLT_RST#
R285
SPI_CS#1 <22>
2
B
1
A
B
PLT_RST_BUF# <8,17,22,24,25,30>
3
1
B
U21
NC7SZ08P5X_NL_SC70-5
@
Y 4
5
2 1K_0402_5% PCI_GNT#3
@
P
R286
1
G
R284
R370
Boot BIOS Strap
Boot BIOS Loaction
1
SPI
1
0
PCI
1
1
LPC*
1
R340
2
0_0402_5%
+3VS
B
1
A
U8
NC7SZ08P5X_NL_SC70-5
@
Y 4
PCI_RST# <32,34>
3
1
2
G
PCIRST#
P
5
0
SPI_CS#1
2
100K_0402_5%
PCI_GNT#0
R157
100K_0402_5%
2
0_0402_5%
2
1
R144
A
A
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
4
3
2
Title
ICH8M(1/4)-PCI
Size
Document Number
Rev
0.2
LA-3691P
Date:
Sheet
1
20
of
45
5
4
3
2
1
+RTCVCC
C441
15P_0402_50V8J
2
1
OUT
4
NC
IN
1
LAN100_SLP
2
330K_0402_1%
1
2
R308
20K_0402_5%
+RTCVCC
close to RAM door
2
J5
1
@ JOPEN
+VCCP
U5A
ICH_RTCX2
AG25
AF24
ICH_RTCRST#
AF23
RTCRST#
SM_INTRUDER#
AD22
INTRUDER#
ICH_INTVRMEN
LAN100_SLP
AF25
AD21
C392
1U_0603_10V4Z
1
2
<26> HDA_SYNC_AUDIO
<25> HDA_SYNC_MDC
<26> HDA_BITCLK_AUDIO
<25> HDA_BITCLK_MDC
C
<26> HDA_RST_AUDIO#
<25> HDA_RST_MDC#
<26> HDA_SDOUT_AUDIO
<25> HDA_SDOUT_MDC
1
R362
1
R361
HDA_SYNC_ICH
2
33_0402_5%
2
33_0402_5%
1
R347
1
R346
HDA_BITCLK_ICH
2
33_0402_5%
2
33_0402_5%
1
R365
1
R364
HDA_RST_ICH#
2
33_0402_5%
2
33_0402_5%
1
R367
1
R366
HDA_SDOUT_ICH
2
33_0402_5%
2
33_0402_5%
+3VS
+1.5VS
R274
1
2
SATA_ITX_C_DRX_P0 2
C436
SATA_ITX_C_DRX_N0 2
C435
<28> SATA_ITX_C_DRX_N0
D22
LAN_RSTSYNC
C21
B21
C22
LAN_RXD0
LAN_RXD1
LAN_RXD2
D21
E20
C20
LAN_TXD0
LAN_TXD1
LAN_TXD2
HDA_BITCLK_ICH
HDA_SYNC_ICH
AJ16
AJ15
HDA_BIT_CLK
HDA_SYNC
<28> IDE_HRESET#
<28> SATA_DTX_C_IRX_N0
<28> SATA_DTX_C_IRX_P0
close
ICH8
SATA_ITX_DRX_P0
1
3900P_0402_50V7K
AE14
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDOUT_ICH
AE13
HDA_SDOUT
IDE_HRESET#
AE10
AG14
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34
SATA_LED#
AF10
SATALED#
SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0
SATA_ITX_DRX_N0
SATA_ITX_DRX_P0
AF6
AF5
AH5
AH6
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA_DTX_C_IRX_N1
SATA_DTX_C_IRX_P1
AG3
AG4
AJ4
AJ3
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
AF2
AF1
AE4
AE3
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
AB7
AC6
SATA_CLKN
SATA_CLKP
AG1
AG2
SATARBIAS#
SATARBIAS
SATA_DTX_C_IRX_N2
SATA_DTX_C_IRX_P2
B
CLK_PCIE_SATA#
CLK_PCIE_SATA
<16> CLK_PCIE_SATA#
<16> CLK_PCIE_SATA
1
2 24.9_0402_1%
SATARBIAS
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
FWH4/LFRAME#
C4
LPC_FRAME#
LDRQ0#
LDRQ1#/GPIO23
G9
E6
LPC_DRQ0#
10mils width less than 500mils
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
H_DPRSTP#
R167
H_DPSLP#
R163
H_FERR#
R292
<32,34>
<32,34>
<32,34>
<32,34>
LPC_FRAME# <32,34>
2
@
2
@
2
1
1
1
D
56_0402_5%
56_0402_5%
56_0402_5%
LPC_DRQ0# <34>
1 R304 10K_0402_5%
GATEA20 <32>
H_A20M# <4>
2
A20GATE
A20M#
AF13
AG26
GATEA20
H_A20M#
DPRSTP#
DPSLP#
AF26
AE26
DPRSTP# R169 1
DPSLP# R161 1
FERR#
AD24
H_FERR#
CPUPWRGD/GPIO49
AG29
H_PWRGOOD
IGNNE#
AF27
H_IGNNE#
INIT#
INTR
RCIN#
AE24
AC20
AH14
H_INIT#
H_INTR
KB_RST#
NMI
SMI#
AD23
AG28
H_NMI
H_SMI#
STPCLK#
AA24
H_STPCLK#
THRMTRIP#
AE27
THRMTRIP_ICH#
TP8
AA23
HDA_RST#
AJ17
AH17
AH15
AD13
SATA_ITX_DRX_N0
1
3900P_0402_50V7K
R181
GLAN_DOCK#/GPIO13
GLAN_COMPI
GLAN_COMPO
<28> SATA_LED#
<28> SATA_ITX_C_DRX_P0
GLAN_CLK
D25
C25
<26> HDA_SDIN0
<25> HDA_SDIN1
SATA_LED#
10K_0402_5%
B24
GLAN_COMP
2
24.9_0402_1%
HDA_RST_ICH#
E5
F5
G8
F6
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
INTVRMEN
LAN100_SLP
AH21
R353
1
RTCX1
RTCX2
RTC
LPC
R316
NC
2
C440
15P_0402_50V8J
2
1
High = Internal VR Enable
D
1
3
LAN / GLAN
CPU
32.768KHZ_12.5P_MC-306
IHDA
R314
ICH_INTVRMEN
2
330K_0402_1%
1
ICH_RTCX1
X2
IDE
same as GT30
SATA
SM_INTRUDER#
2
1M_0402_5%
1
R341
10M_0402_5%
2
1
R315
+3VS
0_0402_5% H_DPRSTP#
0_0402_5% H_DPSLP#
2
2
H_DPRSTP# <5,8,45>
H_DPSLP# <5>
H_FERR# <4>
H_PWRGOOD <5>
H_IGNNE# <4>
H_INIT# <4>
H_INTR <4>
R349
1 10K_0402_5%
2
+3VS
KB_RST# <32>
H_NMI <4>
H_SMI# <4>
R2912
H_STPCLK# <4>
R287 1
2 24.9_0402_1%
156_0402_5%
H_THERMTRIP#
C
+VCCP
H_THERMTRIP# <4,8>
IDE_DD[0..15] <28>
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
V1
U2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6
IDE_DD0
IDE_DD1
IDE_DD2
IDE_DD3
IDE_DD4
IDE_DD5
IDE_DD6
IDE_DD7
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
DA0
DA1
DA2
AA4
AA1
AB3
IDE_DA0
IDE_DA1
IDE_DA2
DCS1#
DCS3#
Y6
Y5
IDE_DCS1#
IDE_DCS3#
DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ
W4
W3
Y2
Y3
Y1
W5
IDE_DIOR#
IDE_DIOW#
IDE_DDACK#
IDE_IRQ
IDE _DIORDY
IDE_DDREQ
IDE _DIORDY
R171 1
2 4.7K_0402_5%
IDE_IRQ
R324 1
2 8.2K_0402_5%
+3VS
IDE_DA[0..2] <28>
IDE_DCS1# <28>
IDE_DCS3# <28>
B
IDE_DIOR# <28>
IDE_DIOW# <28>
IDE_DDACK# <28>
IDE_IRQ <28>
IDE_DIORDY <28>
IDE_DDREQ <28>
ICH8M REV 1.0
<BOM Structure>
RTC Battery
Change BATT1 P/N : SP093PA0200 (Panasonic)
SP093MX0000 (MAXELL)
1
R335
1
R339
1
R179
1
R177
+3VS
R368
1K_0402_5%
@
A
HDA_SDOUT_ICH
R356
1K_0402_5%
@
2
1
R293
+RTCBATT1
D15
2
2
+CHGRTC
1
510_0603_1%
3
+RTCVCC
1
BAS40-04_SOT23
XOR Chain Entrance Strap
HDA_SDOUT
Description
0
0
RSVD
0
1
Enter XOR Chain
1
0
Normal Operation
1
1
Set PCIE port config bit 1
SATA_RXn/p need tie to ground when SATA port no used
4
2
9/29 Checked. Same as HEL80's
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
9/29 modified to follow ISKAA
+RTC_BATT
+
BATT1
ML1220T13RE
45@
ICH_TP3
<22> ICH_TP3
SATA_DTX_C_IRX_N1
2
1K_0402_5%
SATA_DTX_C_IRX_P1
2
1K_0402_5%
SATA_DTX_C_IRX_N2
2
1K_0402_5%
SATA_DTX_C_IRX_P2
2
1K_0402_5%
3
2
Title
C420
0.1U_0402_16V4Z
A
ICH8M(2/4)-LAN,IDELPC,RTC
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
1
21
of
45
4
1
T20 PAD
<4> XDP_DBRESET#
OCP#
10K_0402_5%
R329 1
2
GPIO48
WOL_EN
I CH_RI#
10K_0402_5%
R311 1
2
ICH_SMLINK0
AG22
SMBALERT#/GPIO11
PM_STP_PCI#
PM_STP_CPU#
R343 2
1
0_0402_5%
AE20
AG18
STP_PCI#/GPIO15
STP_CPU#/GPIO25
PM_CLKRUN#
AH11
CLKRUN#/GPIO32
ICH_PCIE_WAKE#
SERIRQ
EC_THERM#
AE17
AF12
AC13
WAKE#
SERIRQ
THRM#
2
R342
1 ICH_VGATE AJ20
0_0402_5%
AJ22
T28 PAD
OCP#
EC_SMI#
EC_SCI#
<32> EC_SMI#
<32> EC_SCI#
ICH_SMLINK1
10K_0402_5%
R310 1
2
LINKALERT#
10K_0402_5%
R312 1
2
XDP_DBRESET#
SATA_CLKREQ#
VGA_THER_ALERT#
GPIO39
GPIO48
<16> SATA_CLKREQ#
<17> VGA_THER_ALERT#
PM_BATLOW#
10K_0402_5%
R187 1
2
D _ACIN
10K_0402_5%
R345 1
2
EC_LID_OUT#
10K_0402_5%
R498 1
2
CL_RST#
10K_0402_5%
R363 1
2
PM_DPRSLPVR
AD9
TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
GPIO12
TACH0/GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
QRT_STATE0/GPIO27
QRT_STATE1/GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
SPKR
<8> MCH_ICH_SYNC#
AJ13
MCH_SYNC#
<21> ICH_TP3
AJ21
TP3
ICH8M REV 1.0
S4_STATE#/GPIO26
AH27
PWROK
AE23
DPRSLPVR/GPIO16
AJ14
BATLOW#
1
2
PM_SLP_S3#
PM_SLP_S4#
PM_SLP_S5#
PAD
PAD
C2
PBTN_OUT#
LAN_RST#
AH20
RSMRST#
AG27
CLPWROK
SLP_M#
AJ25
CL_CLK0
CL_CLK1
F23
AE18
CL_DATA0
CL_DATA1
F22
AF19
CL_VREF0
CL_VREF1
D24
AH23
CL_RST#
AJ23
MEM_LED/GPIO24
ME_EC_ALERT/GPIO10
EC_ME_ALERT/GPIO14
WOL_EN/GPIO9
AJ27
AJ24
AF22
AG19
1
@ R330
2
10K_0402_5%
ICH_POK
AE21
E1
ICH_POK <8,32>
1
100_0402_1%
+3VS
PM_DPRSLPVR <8,45>
R272
3.24K_0402_1%
@
PBTN_OUT# <32>
PLT_RST_BUF#
2
1
PLT_RST_BUF# <8,17,20,24,25,30>
R359
0_0402_5%
EC_RSMRST#R
1
2
R332
10K_0402_5%
CK_PW RGD
CK_PWRGD <16>
ICH_POK
2
1
R290
0_0402_5%
CL_PWROK <8>
PM_SLP_M#
PAD
CL_VREF0_ICH
C342
CL_CLK0 <8>
C
CL_DATA0 <8>
+3V_STB
CL_VREF0_ICH
CL_VREF1_ICH
@ R377
3.24K_0402_1%
CL_RST# <8>
@ Q13 2N7002LT1G_SOT23-3
1
ACIN <32,38>
+3V_STB
D _ACIN
3
WOL_EN R334 1
2 100K_0402_5%
CL_VREF1_ICH
@ C429
PERN2
PERP2
PETN2
PETP2
<25>
<25>
<25>
<25>
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_C_PRX_N3
PCIE_ITX_C_PRX_P3
C101 2
C99 2
1 0.1U_0402_10V7K
1 0.1U_0402_10V7K
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_PRX_N3
PCIE_ITX_PRX_P3
K27
K26
J29
J28
PERN3
PERP3
PETN3
PETP3
<30>
<30>
<30>
<30>
PCIE_PTX_C_IRX_N4
PCIE_PTX_C_IRX_P4
PCIE_ITX_C_PRX_N4
PCIE_ITX_C_PRX_P4
C97
C92
1 0.1U_0402_10V7K
1 0.1U_0402_10V7K
PCIE_PTX_C_IRX_N4
PCIE_PTX_C_IRX_P4
PCIE_ITX_PRX_N4
PCIE_ITX_PRX_P4
H27
H26
G29
G28
PERN4
PERP4
PETN4
PETP4
F27
F26
E29
E28
PERN5
PERP5
PETN5
PETP5
D27
D26
C29
C28
PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
C23
B23
E22
SPI_CLK
SPI_CS0#
SPI_CS1#
D23
F21
SPI_MOSI
SPI_MISO
RP27
5
6
7
8
4
3
2
1
USB_OC#2
CPUSB#
USB_OC#4
USB_OC#5
10K_1206_8P4R_5%
1
2
R313
10K_0402_5%
1
2
R358
10K_0402_5%
1
2
R320
10K_0402_5%
1
2
R321
10K_0402_5%
1
2
R379
10K_0402_5%
1
2
R378
10K_0402_5%
USB_OC#0
USB_OC#6
SPI not used, Left NC
USB_OC#3
<20> SPI_CS#1
USB_OC#8
USB_OC#9
<36> USB_OC#0
<25> CPUSB#
<36> USB_OC#2
CP_PE#
<36> USB_OC#4
USB_OC#5
<36> USB_OC#6
USB_OC#0
CPUSB#
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
CP_PE#
USB_OC#8
USB_OC#9
AJ19
AG16
AG15
AE15
AF15
AG17
AD12
AJ18
AD14
AH18
OC0#
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
OC8#
OC9#
Y27
Y26
W29
W28
DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_ITX_MRX_N1
DMI_ITX_MRX_P1
DMI_MTX_IRX_N1 <8>
DMI_MTX_IRX_P1 <8>
DMI_ITX_MRX_N1 <8>
DMI_ITX_MRX_P1 <8>
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
AB26
AB25
AA29
AA28
DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_ITX_MRX_N2
DMI_ITX_MRX_P2
DMI_MTX_IRX_N2 <8>
DMI_MTX_IRX_P2 <8>
DMI_ITX_MRX_N2 <8>
DMI_ITX_MRX_P2 <8>
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
AD27
AD26
AC29
AC28
DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_ITX_MRX_N3
DMI_ITX_MRX_P3
DMI_MTX_IRX_N3 <8>
DMI_MTX_IRX_P3 <8>
DMI_ITX_MRX_N3 <8>
DMI_ITX_MRX_P3 <8>
CLK_PCIE_ICH#
CLK_PCIE_ICH
DMI_CLKN
DMI_CLKP
T26
T25
DMI_ZCOMP
DMI_IRCOMP
Y23
Y24
DMI_IRCOMP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
G3
G2
H5
H4
H2
H1
J3
J2
K5
K4
K2
K1
L3
L2
M5
M4
M2
M1
N3
N2
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N8
USB20_P8
USB20_N9
USB20_P9
USBRBIAS#
USBRBIAS
F2
F3
USBRBIAS
USB
A
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
RSMRST circuit
R421
1
Q30
CLK_PCIE_ICH# <16>
CLK_PCIE_ICH <16>
R309 24.9_0402_1%
1
2
3
<32> EC_RSMRST#
+1.5VS
<36>
<36>
<24>
<24>
<36>
<36>
USB
WLAN
USB
EC_RSMRST#R
1
Within 500 mils
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N8
USB20_P8
B
0_0402_5%
2
1 2
M27
M26
L29
L28
2
PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2
PCIE_ITX_PRX_N2
PCIE_ITX_PRX_P2
DMI_MTX_IRX_N0 <8>
DMI_MTX_IRX_P0 <8>
DMI_ITX_MRX_N0 <8>
DMI_ITX_MRX_P0 <8>
B
1 0.1U_0402_10V7K
1 0.1U_0402_10V7K
DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_ITX_MRX_N0
DMI_ITX_MRX_P0
E
C107 2
C104 2
V27
V26
U29
U28
C
PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2
PCIE_ITX_C_PRX_N2
PCIE_ITX_C_PRX_P2
2
2
@ R369
453_0402_1%
@ R435
2.2K_0402_5%
@ D18B
BAV99DW-7_SOT363
@ MMBT3906_SOT23
1
2
+3V_STB
R423
@ 4.7K_0402_5%
@ D18A
BAV99DW-7_SOT363
1
R429
6
Not in CRB,Keep!
<24>
<24>
<24>
<24>
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
4
LAN
1
0.1U_0402_16V4Z
2
5
B
R275
453_0402_1%
@
T29
3
NEW Card
PERN1
PERP1
PETN1
PETP1
1
0.1U_0402_16V4Z
2
@
2
WLAN
P27
P26
N29
N28
D
T17
ICH_POK
T27
PWRBTN#
E3
2
PM_SLP_S3# <32>
PM_SLP_S4# <32>
PM_SLP_S5# <32>
DPRSLPVR 2
R348
PM_BATLOW#
CK_PWRGD
2
U5D
100K_0402_5%
@ R337 1
ICH_VGATE
2
+3V_STB
SUS_CLK
1
@ C426
10P_0402_50V8J
G
8.2K_0402_5%
R325 2
1
SB_SPKR
<26> SB_SPKR
TP7
D3
AG23
AF21
AD18
1
@ C375
10P_0402_50V8J
D
ICH_PCIE_WAKE#
AJ8
AJ9
AH9
AE16
AC19
AG8
AH12
AE11
AG10
AH25
AD16
AG13
AF9
AJ11
AD10
VRMPWRGD
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
CLK_ICH_14M <16>
CLK_ICH_48M <16>
S
1K_0402_5%
R319 1
2
1
0_0402_5%
2 8.2K_0402_5%
1
10K_0402_5%
R318 1
2
BMBUSY#/GPIO0
1
<4> OCP#
10K_0402_5%
R328 1
2
AG12
R336 2
<8,45> VGATE
+3V_STB
SUS_STAT#/LPCPD#
SYS_RESET#
EC_LID_OUT#
<24,25,30> ICH_PCIE_WAKE#
<32,34> SERIRQ
<4,32> EC_THERM#
GPIO39
F4
AD15
CLK_ICH_14M
CLK_ICH_48M
PCI-Express
Direct Media Interface
10K_0402_5%
R338 1
2
SUS_STAT#
XDP_DBRESET#
AG9
G5
CLK14
CLK48
SPI
10K_0402_5%
@ R494 1
2
<16> PM_STP_PCI#
<16> PM_STP_CPU#
RI#
PM_BMBUSY#
<8> PM_BMBUSY#
<32> EC_LID_OUT#
AF17
R326 1
2
10K_0402_5%
R354 1
2
2
2
SATA_CLKREQ#
10K_0402_5%
R376 1
2VGA_THER_ALERT#
I CH_RI#
AJ12
AJ10
AF11
AG11
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
SATA3GP/GPIO37
SATA
GPIO
PM_STP_CPU#
SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1
SMB
PM_STP_PCI#
10K_0402_5%
@ R344 1
2
AJ26
AD19
AG21
AC17
AE19
@ R333
10_0402_5%
@ R294
10_0402_5%
U5C
ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1
<16,30> ICH_SMBCLK
<16,30> ICH_SMBDATA
Clocks
EC_THERM#
10K_0402_5%
@ R360 1
2
CLK_ICH_14M
+3VS
R317
2.2K_0402_5%
Power MGT
8.2K_0402_5%
R322 1
2
R355
2.2K_0402_5%
Place closely pin AC1
CLK_ICH_48M
SYS
GPIO
PM_CLKRUN#
Place closely pin B2
1
8.2K_0402_5%
R352 1
2
1
SERIRQ
10K_0402_5%
R350 1
2
C
2
+3V_STB
10K_0402_5%
R351 1
2
MISC
GPIO
Controller Link
D
3
2
5
+3VS
2
@ 2.2K_0402_5%
<36>
<36>
<25>
<25>
<36>
<36>
<24>
<24>
<29>
<29>
USB
New Card
USB
BT
Card Reader
1
2
R289
22.6_0402_1%
A
ICH8M REV 1.0
Within 500 mils
Compal Secret Data
Issued Date
2006/08/18
2007/8/18
Deciphered Date
5
4
3
2
Title
ICH8M(3/4)-USB,GPIO,PCIE
Custom
Rev
0.2
LA-3691P
Date:
Sheet
1
22
of
45
5
4
+5VS +3VS
A16
T7
close to AE7
close to AC1
VCC1_5_A ~1.56A
VCCUSBPLL ~10mA
B
+1.5VS
1
C382
1
C379
1
C374 0.1U_0402_16V4Z
+
0.1U_0402_16V4Z
2
220U_D2_4VMR15
2
@
2
close to D1
+3VS
VCCLAN3_3 ~18mA
C372
1
2
0.1U_0402_16V4Z
T19
T18
C72
VCCGLANPLL~23mA (10UF*1, 1UF*1)10U_0805_10V4Z
2
C71
2.2U_0805_10V6K
+1.5VS_PCIE_ICH
(220UF*1, 1UF*1)
C340
CORE
VCCP_CORE
IDE
AC1
AC2
AC3
AC4
AC5
VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]
VCC1_5_A[09]
VCC1_5_A[10]
AC10
AC9
VCC1_5_A[11]
VCC1_5_A[12]
AA5
AA6
VCC1_5_A[13]
VCC1_5_A[14]
G12
G17
H7
VCC1_5_A[15]
VCC1_5_A[16]
VCC1_5_A[17]
AC7
AD7
VCC1_5_A[18]
VCC1_5_A[19]
D1
VCCUSBPLL
F1
L6
L7
M6
M7
VCC1_5_A[20]
VCC1_5_A[21]
VCC1_5_A[22]
VCC1_5_A[23]
VCC1_5_A[24]
W23
VCC1_5_A[25]
VCCLAN1_05[1]
VCCLAN1_05[2]
F19
G20
VCCLAN3_3[1]
VCCLAN3_3[2]
A24
VCCGLANPLL
A26
A27
B26
B27
B28
VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
VCCGLAN1_5[5]
B25
VCCGLAN3_3
GLAN POWER
+VCC_GLANPLL_R 1
+VCC_GLANPLL_ICH
2
1_0603_5%
L10 MBK1608121YZF_0603
1
VCCGLAN1_5 ~80mA
VCC1_5_A[01]
VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]
TP_VCCLAN1_05_ICH_1 F17
TP_VCCLAN1_05_ICH_2 G18
PAD
PAD
A
AE7
AF7
AG7
AH7
AJ7
USB CORE
close to F1
VCCSATAPLL
PCI
C414
AJ6
ATX
C419
1U_0603_10V4Z
1U_0603_10V4Z
VCC1_5_B[01]
VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCCPSUS
2
1
1
2
1
V5REF_SUS
ARX
+1.5VS
R95
V5REF[1]
V5REF[2]
VCCPUSB
2
2
D14
RB751V-40TE17_SOD323-2
0.1U_0402_16V4Z
2
C409
+ICH_V5REF_SUS G4
1U_0603_10V4Z
1mA
+ICH_V5REF
AA25
AA26
2
C355
AA27
AB27
0.1U_0402_16V4Z
AB28
1
AB29
D28
D29
+5VALW +3V_STB
E25
E26
ALW or V
E27
F24
D16
F25
RB751V-40TE17_SOD323-2
R299
G24
10_0402_5%
H23
H24
+ICH_V5REF_SUS
J23
J24
2
C373
K24
K25
0.1U_0402_16V4Z
L23
1
L24
+1.5VS_PCIE_ICH
L25
M24
(220UF*1, 22UF*2, 2.2UF*1)
L23 2
1
M25
+1.5VS
FBMA-L11-201209-221LMA30T_0805
N23
1
N24
1
1
C376 + C363
C384
C377
N25
VCC1_5_B ~675mA
P24
220U_D2_4VMR15
10U_0805_10V4Z
P25
2
2
2
R24
10U_0805_10V4Z
2.2U_0805_10V6K
R25
R26
R27
T23
+1.5VS_SATAPLL_ICH
T24
T27
L32
1
2
T28
+1.5VS
MBK1608121YZF_0603
T29
U24
1
C448
C437
U25
V23
V24
10U_0805_10V4Z
2
V25
(10UF*1, 1UF*1)
1U_0603_10V4Z
W25
Y25
+1.5VS
1
U5E
VCCRTC
VCCA3GP
C
1mA
+ICH_V5REF
1
C411
1
D
2
U5F
AD25
+RTCVCC
R277
100_0402_5%
3
VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
VCC1_05[27]
VCC1_05[28]
A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
VCCDMIPLL
R29
VCC_DMI[1]
VCC_DMI[2]
AE28
AE29
V_CPU_IO[1]
V_CPU_IO[2]
AC23
AC24
VCC3_3[01]
AF29
VCC3_3[02]
AD2
VCC3_3[03]
VCC3_3[04]
VCC3_3[05]
VCC3_3[06]
AC8
AD8
AE8
AF8
VCC3_3[07]
VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
AA3
U7
V7
W1
W6
W7
Y7
VCC3_3[14]
VCC3_3[15]
VCC3_3[16]
VCC3_3[17]
VCC3_3[18]
VCC3_3[19]
VCC3_3[20]
VCC3_3[21]
VCC3_3[22]
VCC3_3[23]
VCC3_3[24]
A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11
VCCHDA
AC12
VCCSUSHDA
AD11
C380
1
C391
(47UF*1, 0.047UF*1, 0.022UF*1)
1
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
+1.5VS_DMIPLL_ICH
+1.5VS_DMIPLL_R
L21 1
2
MBK1608121YZF_0603
1
(10UF*1,
C383
C381
10U_0805_10V4Z
2
0.01U_0402_16V7K
+VCCP
C388
C412
1
1
C401
V_CPU_IO ~1mA
4.7U_0805_10V4Z
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
close to AD2
+3VS
C423
1
C415
1
C399
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
close to AF29
VCC3_3 ~278mA
Add for Audio low voltage mode
close to AA3
+3VS
C362
1
C361
1
1
C359
+3VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
1
2
VCCHDA~32mA
C405
0.1U_0402_16V4Z
+VCCSUS_HDA_ICH
VCCSusHDA~32mA
1
VCCSUS1_5[1]
AC16 TP_VCCSUS1_5_ICH_1
PAD
T25
PAD
T23
VCCSUS1_5[2]
J7
TP_VCCSUS1_5_ICH_2
VCCSUS3_3[01]
C3
VCCSUS3_3
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]
VCCSUS3_3[05]
VCCSUS3_3[06]
AC18
AC21
AC22
AG20
AH28
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
P6
P7
C1
N7
P1
P2
P3
P4
P5
R1
R3
R5
R6
2
1
R303
1
C407
C386
2
0.1U_0402_16V4Z
close to P6
R323
0_0603_5%
+3V_STB
C416
0.1U_0402_16V4Z
2
+3V_STB
0_0805_5%
VCCSus3_3~177mA
1
C406
4.7U_0805_10V4Z
0.1U_0402_16V4Z
2
(0.1UF*1, 0.022UF*2)
close to AC18
1
@ C354
@ C339
G22 TP_VCCCL1_05_ICH
F20
G21
VCCDMIPLL~23mA
(4.7UF*1, 0.1UF*2)
T22
T26
VCCCL3_3[1]
VCCCL3_3[2]
0.01UF*1)
+1.5VS
VCCDMI ~50mA
22U_0805_6.3V6M
2
PAD
PAD
A22
1_0603_5%
(22UF*1, 0.1UF*1)
1
TP_VCCSUS1_05_ICH_1
J6
AF20 TP_VCCSUS1_05_ICH_2
VCCCL1_5
R295
+1.25VS
C144
VCCSUS1_05[1]
VCCSUS1_05[2]
VCCCL1_05
VCC1_05 ~1.13A
+VCCP
PAD
T21
1U_0603_10V4Z
2
0.1U_0402_16V4Z
+3VS
K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24
VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]
A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29
D
C
B
A
(0.1UF*1)
+3VS
18mA
Compal Secret Data
2006/08/18
Issued Date
4
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
ICH8M REV 1.0
1mA ICH8M REV 1.0
4.7U_0805_10V4Z
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
+VCCCL1_5_INT_ICH
Deciphered Date
2007/8/18
5
A23
A5
AA2
AA7
A25
AB1
AB24
AC11
AC14
AC25
AC26
AC27
AD17
AD20
AD28
AD29
AD3
AD4
AD6
AE1
AE12
AE2
AE22
AD1
AE25
AE5
AE6
AE9
AF14
AF16
AF18
AF3
AF4
AG5
AG6
AH10
AH13
AH16
AH19
AH2
AF28
AH22
AH24
AH26
AH3
AH4
AH8
AJ5
B11
B14
B17
B2
B20
B22
B8
C24
C26
C27
C6
D12
D15
D18
D2
D4
E21
E24
E4
E9
F15
E23
F28
F29
F7
G1
E2
G10
G13
G19
G23
G25
G26
G27
H25
H28
H29
H3
H6
J1
J25
J26
J27
J4
J5
K23
K28
K29
K3
K6
3
2
Title
IFTXX M/B LA-3541P Schematic
Custom
R ev
0.2
LA-3691P
Date:
Sheet
1
23
of
45
A
B
C
D
E
Mini-Express Card for 3G Or TV Tuner
Mini-Express Card for WLAN
+3VS
+1.5VS
+3VALW
1
2
1
C365
4.7U_0805_10V4Z
2
1
C370
0.1U_0402_16V4Z
2
1
C364
4.7U_0805_10V4Z
2
1
C369
0.1U_0402_16V4Z
2
1
C368
0.1U_0402_16V4Z
2
1
C367
0.1U_0402_16V4Z
1
JP18
ICH_PCIE_WAKE#
BT_ACTIVE
WLAN_ACTIVE
W LAN_CLKREQ#
<16> WLAN_CLKREQ#
@ R306 1
@ R305 1
2
2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
0_0402_5%
0_0402_5%
<16> CLK_PCIE_WLAN#
<16> CLK_PCIE_WLAN
<22> PCIE_PTX_C_IRX_N2
<22> PCIE_PTX_C_IRX_P2
<22> PCIE_ITX_C_PRX_N2
<22> PCIE_ITX_C_PRX_P2
2
2005/09/27 modified.
Base on OPTION GTM351E Datasheet Rev0.1
53
Vcc 3.3V +/- 8%
Peak Icc 2750mA
with max supply droop 50mA
Average Icc 1000mA
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
GND1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
54
+3VS
+1.5VS
WL_OFF#
PLT_RST_BUF#
WL_OFF# <32>
PLT_RST_BUF# <8,17,20,22,25,30>
+3VALW
D_CK_SCLK <14,15,16,25>
D_CK_SDATA <14,15,16,25>
(WWAN_LED#)
USB20_N1 <22>
USB20_P1 <22>
@ R5001
2 0_0402_5%
WLAN_LED#
@ R288
1
2
WLAN_LED# <35>
2
+5VS
100K_0402_5%
FOX_AS0B226-S56N-7F
ME@
1
+5VS
1 2
R98
10K_0402_1%
3
3
Q9
DTC114EKA_SC59-3
<32> BT_OFF#
BT MODULE CONN
2
D
+3VS_BT
Q8
1 AO3413_SOT23-3
2
1
C60
0.1U_0402_16V4Z
S
3
+3VS
3
G
2
<35> BT_LED#
1
JP6
<22> USB20_N7
<22> USB20_P7
Q7
DTC124EK_SC59
3
1
2
R94
10K_0402_5%
USB20_N7
USB20_P7
BTON_LED
BT_ACTIVE
WLAN_ACTIVE
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
GND1
GND2
2
MOLEX_53780-0870
ME@
4
4
Compal Secret Data
2006/08/05
Issued Date
2007/08/05
Deciphered Date
A
B
C
D
Title
Mini-Card/3G/FeliCa/FP
Size
Document Number
Rev
0.2
LA-3691P
Date:
Sheet
E
24
of
45
A
B
C
D
E
+1.5VS_CARD1
Imax = 0.75A
1
Express Card Power Switch
+1.5VS
2
C222
1
1
0.1U_0402_16V4Z
12
14
+3VS
2
C223
2
C212
<8,17,20,22,24,30> PLT_RST_BUF#
1
0.1U_0402_16V4Z
+3VALW
1
0.1U_0402_16V4Z
PLT_RST#
SYSON
<32,37,42> SYSON
SUSP#
<17,32,37,40,42,43,44> SUSP#
2 R200
+3VALW
1
CPUSB#
<22> CPUSB#
100K_0402_5%
C202
10U_0805_10V4Z
U11
2
4
17
6
1.5Vin
1.5Vin
1.5Vout
1.5Vout
3
5
+3VS_CARD1
AUX_OUT
15
+3VALW_CARD1
OC#
19
3.3Vin
3.3Vin
AUX_IN
3.3Vout
3.3Vout
SYSRST#
20
SHDN#
1
STBY#
NC
10
CPPE#
GND
9
18
+1.5VS_CARD1
11
13
PERST#
2
C201
0.1U_0402_16V4Z
JP9
2
40mil
<22> USB20_N5
<22> USB20_P5
60mils
+3VS_CARD1
1
C213
10U_0805_10V4Z
2
1
C214
0.1U_0402_16V4Z
CPUSB#
<14,15,16,24> D_CK_SCLK
<14,15,16,24> D_CK_SDATA
+1.5VS_CARD1
Imax = 1.35A
40mil
PERST#
8
New Card Socket (Left/TOP)
1
+3VALW_CARD1
PERST#
+3VS_CARD1
2
16
<16> EXP_CLKREQ#
7
<16> CLK_PCIE_EXP#
<16> CLK_PCIE_EXP
CPUSB#
CPUSB#
+3VALW_CARD1
RCLKEN
Imax = 0.275A
R5538_QFN20
1
C210
10U_0805_10V4Z
2
1
C211
0.1U_0402_16V4Z
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
2
GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND
1
GND
GND
FOX_1CH4110C
ME@
(NEW)
2
2
+3V_STB
3
MDC CONN.
1
3
R485
10K_0402_5%
C559
1
2 0_0402_5%
<21> HDA_SDOUT_MDC
@ D20
2
1
<21> HDA_SYNC_MDC
<21> HDA_SDIN1
R474 1
MDC_RST#
AZ _SYNC
2AZ_SDIN3
33_0402_5%
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
2
4
6
8
10
12
+3V_STB
HDA_BITCLK_MDC <21>
1
3
1
3
5
7
9
11
13
14
15
16
17
18
GND
GND
GND
GND
GND
GND
DAP202U_SOT323-3
R475
10K_0402_5%
@ R481
10_0402_5%
ACES_88018-124G
ME@
Connector for MDC Rev1.5
2
R489 1
<21> HDA_RST_MDC#
1U_0805_25V4Z
2
2
JP10
1
2
@C560
22P_0402_50V8J
4
4
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
A
B
C
D
Title
NEW CARD & USB Connector
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
E
25
of
45
A
B
C
D
E
+VDDA
1
AC97 Codec
28.7K for Module Design (VDDA = 4.702)
+5VS
+5VAMP
2
1
1
1
1
R239
1
C
2
C573
680P_0402_50V7K
LINE_OUTL
C572
680P_0402_50V7K
LINE_OUTR
1
D
S
CNOISE
1
GND
3
+VDDA
4.85V
1
R493
150K_0603_1%
1
C578
2
C278
10U_0805_10V4Z
1
Q24
2N7002_SOT23-3
@
R492
51K_0603_1%
SUB WOOFER SUPPORT
D11
RB751V_SOD323
ALC262
2
@ R231
10K_0402_5%
2
SD
6
2
EAPD 2
G
1
1
<22> SB_SPKR
ERROR
8
SENSE or ADJ
(output = 250 mA)
40mil
SI9182DH-AD_MSOP8
3
R230
10K_0402_1%
2
2
1 1
2
C273
R227
1U_0603_10V4Z
560_0402_5%
7
5
0.1U_0402_16V4Z
Q26
2SC2411KT146_SOT23-3
E
C280
10U_1206_10V4Z
2
DELAY
1
R229
10K_0402_1%
2
20K_0402_5%
2
@ C267
0.1U_0402_16V4Z
R236 560_0402_5%
2
1 1
2
2
B
C279
1U_0603_10V4Z
2MONO_IN1
R238 20K_0402_5%
C567
10U_0805_10V4Z
1
1
DOS_BEEP# <27>
C271 1U_0603_10V4Z
2
1 MONO_IN
2
VOUT
3
<32> BEEP#
1
2
2
R245
10K_0402_1%
1
VIN
2
+VDDA
C272
2 470P_0402_50V7K
U15
4
1
1
C285
1U_0603_10V4Z
60mil
L17 1
2
FBMA-L11-201209-221LMA30T_0805
@ L16 1
2
FBMA-L11-201209-221LMA30T_0805
1
2
2
1
R242
10K_0402_1%
+MIC2_VREFO
+MIC1_VREFO_L
+AUD_VREF
ALC861D
Window mode
Driver initial
DOS mode
1
@ C562
1U_0603_10V4Z
ACPI
10mil
2
1
2
1
10mil
@ C561
@
C265
0.1U_0402_16V4Z 1U_0603_10V4Z
2GNDA
1
1
@
C263
0.1U_0402_16V4Z
2
10mil
@
C266
1U_0603_10V4Z
2GNDA
1
2
@ C264
0.1U_0402_16V4Z
GNDA
RST
2
2
+VDDC
+AVDD_AC97
L40
CHB1608U301_0603
1
2
DOS mode
HP_L
<27> HP_L
RST
C553
<27> INT_MIC
C556
3
R468
R469
R479
R478
<28> INT_CD_L
<28> INT_CD_R
CD_AGND
2
R470
20K_0402_5%
12sec
1
1
1
1
20K_0402_5% CD_R_L
20K_0402_5%
20K_0402_5%
20K_0402_5% CD_R_R
CD_GNA
1
2
R472
20K_0402_5%
+3VS
1
1
1
2
1
R466
2
0_0603_5%
1
R482
2
0_0603_5%
2
39
C_HP_OUTL
17
MIC2_R
SURR_OUT_R
41
C_HP_OUTR
23
LINE1_L
SIDESURR_OUT_L
45
46
C558 1
2 1U_0402_6.3V4Z
C D_RC_R
20
CD_R
LFE_OUT
44
2 1U_0603_10V4Z
CD_GNDA
19
CD_GND
BIT_CLK
6
SDATA_IN
8
MIC
1
C563
1
C564
2
2
C_MIC
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
R213 1
R212 1
2 0_0402_5%
2 0_0402_5%
21
MIC1_L
22
MIC1_R
12
PCBEEP
11
RESET#
10
5
R467 1
JACK_PLUG 1
R232
EAPD
L37
1
GPIO0
GPIO1
SENSE A
SENSE B
2
47
EAPD
48
SPDIFO
4
7
DVSS1
DVSS2
0_0603_5%
37
NC
29
LINE2_VREFO
31
MIC1_VREFO_L
28
MIC1_VREFO_R
32
MIC2_VREFO
30
SDATA_OUT
2 20K_0402_1%
2
NC
SYNC
2
3
13
34
39.2K_0402_1%
+3VS
9
SURR_OUT_L
43
VREF
27
JDREF
40
NC
33
AVSS1
AVSS2
26
42
1
@ C262
1
@ C261
2
1000P_0402_50V7K
2
1000P_0402_50V7K
1
C566
1
C565
1
@ C557
1
@ C551
LINE_OUTL
2
1U_0603_10V4Z
LINE_OUTR
2
1U_0603_10V4Z
HP_L
2
1U_0603_10V4Z
HP_R
2
1U_0603_10V4Z
LINE_OUTL <27>
LINE_OUTR <27>
3
1
@ R216
2
22_0402_5%
1
2
@ C256 22P_0402_50V8J
HDA_BITCLK_AUDIO
250_SDIN
10mil
10mil
10mil
2
R471
1
@ R228
1
R215
2
33_0402_5%
HDA_BITCLK_AUDIO <21>
HDA_SDIN0
HDA_SDIN0 <21>
+MIC1_VREFO_L
+AUD_VREF
+MIC2_VREFO
2
1
C270
10U_0805_10V4Z
1
20K_0402_1%
2
+VDDA
10K_0402_5%
4
ALC861-VD-GR_LQFP48
Compal Secret Data
GND
MIC2_L
CEN_OUT
<27> JACK_PLUG_MIC
<27,32> EAPD
16
SIDESURR_OUT_R
1
4
2
0_0603_5%
C_LINE_OUTR
CD_L
GPIO
@ R217
10K_0402_1%
C_LINE_OUTL
36
LINE1_R
EAPD @
<27> JACK_PLUG
35
FRONT_OUT_R
18
<21> HDA_SDOUT_AUDIO
GPIO
FRONT_OUT_L
LINE2_R
24
<21> HDA_SYNC_AUDIO
@ R214
10K_0402_1%
LINE2_L
15
CD_RC_L
MONO_IN
GNDA
14
2 1U_0402_6.3V4Z
<21> HDA_RST_AUDIO#
1
R463
U13
C550 1
CD_GNA C554 1
<27> EXT_MIC
1
<28> CD_AGND
2
2
2
2
1
2
C549
4.7U_0603_6.3V6K
1
2
C552
4.7U_0603_6.3V6K
2
2.2U_0603_6.3V6K
2
2.2U_0603_6.3V6K
HP_R
<27> HP_R
EC_MUTE
C260
0.1U_0402_16V4Z
2
1
C555
0.1U_0402_16V4Z
2
2
CHB1608U301_0603
1
DVDD2
DOS mode
2
1
C257
C258
C259
2
2
2
0.1U_0402_16V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
1
AVDD1
C569
10U_0805_10V4Z
1
DVDD1
1
38
+VDDA
25
12sec
AVDD2
EC_MUTE
1
R218
1
GNDA
2006/08/04
Issued Date
2006/10/06
Deciphered Date
A
B
C
D
Title
ALC861 VD Codec
Date:
Rev
0.2
Sheet
E
26
of
45
A
B
C
D
E
+5VS
+3VS
2
L44 BLM15BB121SN1D_0402
1
2
R504
0_0402_5%
AMP_RHPIN
<26> HP_R
4
6
INR_H
INL_H
INR _H
INL_H
26
1 AMP_BEEP 28
0_0402_5%
AMP_CP+
12
AMP_CP14
1
2
C269 1U_0402_6.3V4Z
AMP_BIAS
25
C282 2.2U_0603_6.3V6K
2
1
C288 0.1U_0402_16V4Z
2
@ R246
/SD
1
19
11
20
10
PVDD
PVDD
HVDD
VDD
LOUT+
LOUT-
SPKL+
SPKL-
HP_R
HP_L
17
18
HP_ROUT
HP_LOUT
CVSS
15
VSS
16
GND
PGND
PGND
CGND
2
23
7
13
Change
2007-02-13
Revision
2057A
BIAS
20mil
SPK_L1+
SPK_L1SPK_R1+
SPK_R1-
4
3
2
1
Speaker Conn.
1
2
BEEP
CP+
CP-
Speaker
Speaker
Headphone
Headphone
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
CVSS
1
2
1
2
1
2
C268
1U_0402_6.3V4Z
6
5
1
2
R1
0_0402_5%
@
APA2056_TSSOP28
9/5 If implement AMP BEEP, Swap C155 and R79.
R79 change from 0 Ohm to 47K
4 GND
3 GND
2
1
JP2
22P_0402_50V8J
HP EN
SPKR+
SPKR-
8
9
2
2
2
2
22P_0402_50V8J
2
0_0402_5%
24
22
21
1
1
1
1
22P_0402_50V8J
AMP_SD#
1
2
@ C281
0.47U_0402_6.3V6K
2
39K_0402_5%
2
39K_0402_5%
/AMP EN
ROUT+
ROUT-
R5
R4
R3
R2
22P_0402_50V8J
2
1
R491
1
R488
AMP_LHPIN
<26> HP_L
HP_EN
INR_A
INL_A
SPKL+
SPKLSPKR+
SPKR-
2
+5VS
1
ME@
ACES_87213-0400G
U16
@ C1
2 100K_0402_5%
1U_0402_6.3V4Z
@ C2
R226 1
C290
1
@ C3
Change C43/C44 from 2.2uf to 4.7uf.
2
@ C4
R254 1
1
2
R247 0_0402_5% INR_A
3
5
1
2 INL_A
R243 0_0402_5%
AMP_EN#27
2 100K_0402_5%
<26> LINE_OUTL
9/19 Realtek suggest
1
@ R237
2
2
1.5K_0402_1%
2
1.5K_0402_1%
<26> LINE_OUTR
<26> DOS_BEEP#
2
1
C275
CVDD
1
@ R240
1
@ R253
1
10U_0805_10V4Z
1
C277
0.1U_0402_16V4Z
680P_0402_50V7K
C274
fo=1/(2*3.14*R*C)=106Hz
R=1.5K / C= 1uF
9/5 ANPEC Suggest
Place 1U cap between pin 1 and 2
1
W=40mil
1
APA2057A SPK/HP Amplifier
IN_A Gain = 10dB (Internal Speaker)
IN_H Gain = 0dB (Headphone)
<32> EC_MUTE#
+5VAMP
EAPD
<26,32> EAPD
1
EC_MUTE#
2
R233 @
2
@ R234
1
0_0402_5%
2
AMP_SD#
EXT MIC
+MIC1_VREFO_L
1
0_0402_5%
Audio Jack
2
1
R509
39K_0402_5%
AMP_SD#
2
1
2
0_0402_5% G
R505
100K_0402_5%
@
S
Q39
2N7002KW_SOT323-3
<26> EXT_MIC
1
2
EXT_MIC_L
L36
C585
0.1U_0402_16V4Z
JACK_PLUG_MIC
EXT_MIC_L-2
2
FBM-11-160808-700T_0603
1
+AUD_VREF
1
1
EC_MUTE#2
R510
3
<32> EC_MUTE#
2
1
R465
<26> JACK_PLUG_MIC
3K_0402_5%
D
2
C542
47P_0402_50V8J
JP27
1
EXT_MIC_L-2
GNDA
@ C547
10P_0402_50V8J
2
GNDA
3
JACK_PLUG_MIC
+MIC2_VREFO
INT MIC
1
3
5
7
9
11
13
15
17
1
3
5
7
9
11
G1
G3
G5
2
4
6
8
10
12
G2
G4
G6
2
4
6
8
10
12
14
16
18
PL-OUT
PR-OUT
3
JACK_PLUG
1
ACES_88028-1210M
ME@
End or Begain
R490
3K_0402_5%
WM-64PCY_2P
45@
HP_LOUT
1
L38
@ R473
1K_0402_5%
2
C574
47P_0402_50V8J
2
GNDA
L39
1
INT_MIC <26>
2
47_0402_5%
2
47_0402_5%
1
INT_MIC
GNDA
1
R476
1
R477
1
1
PR-OUT
2
FBM-11-160808-700T_0603
PL-OUT
2
FBM-11-160808-700T_0603
@ R480
1K_0402_5%
GNDA
GNDA
2
2
MIC1
1
2
JACK_PLUG
<26> JACK_PLUG
HP_ROUT
1
@ C546
10P_0402_50V8J
2 GNDA
1
2
@ C548
10P_0402_50V8J
4
4
2006/08/05
Issued Date
Compal Secret Data
2007/08/05
Deciphered Date
A
B
C
D
Title
AMP/VR/Audio Jack/MIC
Custom
LA-3691P
Date:
Rev
0.2
Sheet
E
27
of
45
A
B
D
E
1
1
1
F
G
+5VS
Placea caps. near ODD CONN.
+5VS
1
C
1
1
1
IDE_DD[0..15]
<21> IDE_DD[0..15]
C248
C247
C249
C540
C541
1000P_0402_50V7K 0.1U_0402_16V4Z 1U_0603_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z
2
2
2
2
2
C296
1000P_0402_50V7K
2
IDE_DA[0..2]
<21> IDE_DA[0..2]
H
+3VS
1
1
C295
0.1U_0402_16V4Z
2
1
C299
1U_0603_10V4Z
2
1
1
C300
C302
10U_0805_10V4Z 10U_0805_10V4Z
2
2
C304
0.1U_0402_16V4Z
1
2 @
SATA HDD Conn.
JP28
<26> INT_CD_L
<26> CD_AGND
IDE_DIOW#
IDE_ DIORDY
IDE_IRQ
IDE_DA1
IDE_DA0
IDE_DCS1#
IDE_LED#
<21> IDE_DIOW#
<21> IDE_DIORDY
<21> IDE_IRQ
2
R209
+5VS
<21> IDE_DCS1#
1
100K_0402_5%
2
1
R206
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
IDE_RST#
IDE_DD7
IDE_DD6
IDE_DD5
IDE_DD4
IDE_DD3
IDE_DD2
IDE_DD1
IDE_DD0
+5VS
2
470_0402_5%
IDE_CSEL
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
JP14
INT_CD_R <26>
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
IDE_DDREQ
IDE_DIOR#
<21> SATA_ITX_C_DRX_P0
<21> SATA_ITX_C_DRX_N0
<21> SATA_DTX_C_IRX_N0
<21> SATA_DTX_C_IRX_P0
SATA_DTX_C_IRX_P0
1
C312
1
C311
SATA_DTX_IRX_N0
2
3900P_0402_50V7K
SATA_DTX_IRX_P0
2
3900P_0402_50V7K
IDE_DDREQ <21>
IDE_DIOR# <21>
IDE_DDACK#
IDE_PDIAG#
IDE_DA2
IDE_DCS3#
SATA_DTX_C_IRX_N0
1
2
3
4
5
6
7
SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+3VS
IDE_DDACK# <21>
1
R210
2
100K_0402_5%
+5VS
+5VS
IDE_DCS3# <21>
+5VS
OCTEK_CDR-50DY1G
ME@
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
2
SUYIN_127043FB022S338ZR_RV
ME@
(NEW)
IDE_CSEL
Grounding for Master (When use SATA HDD)
Open or High for Slaver (Normal)
GND
A+
AGND
BB+
GND
(NEW)
Change Library
1
+3VS
1
R221
2
0_0402_5%
2
@ R220
10K_0402_5%
1
3
2
G
<21> IDE_HRESET#
+5VS
2
@ R219
3
IDE_RST#
S
D
3
@ Q21
2N7002_SOT23-3
1
100K_0402_5%
U12
<21> SATA_LED#
IDE_LED#
2
SATA_LED#
3
4
1
DRIVE_LED#
DRIVE_LED# <33>
4
DAP202U_SOT323-3
Issued Date
Compal Secret Data
2006/08/18
2007/8/18
Deciphered Date
A
B
C
D
E
F
Title
HDD & ODD Connector
Size
B
Document Number
Rev
0.2
LA-3691P
Date:
G
Sheet
28
H
of
45
5
4
3
2
1
D
D
2
R438
C531 1
0.1U_0402_16V4Z
1
2
C580 0.1U_0402_16V4Z
2
@ R495 1
AV_PLL
A3V3
A3V3
CARD_3V3
D3V3
D3V3
8
44
45
47
48
VBUS
RST#
MODE_SEL
XTLI
XTLO
4
5
14
DM
DP
GPIO0
2 0_0402_5% 1
RST#
MODE SEL
XTLI
XTLO
C532
0.1U_0402_16V4Z
2
USB20_N8
USB20_P8
<22> USB20_N8
<22> USB20_P8
+3VS
2
C
1
R437
100K_0402_5%
RST#
1
10
22
30
XD_CLE/CF_SP19
XD_CE#/CF_D11_SP18
XD_ALE/CF_D4_SP17
SD_DAT2/XD_RE#/CF_D12_SP16
SD_DAT3/XD_WE#/CF_D5_SP15
XD_RDY/CF_D13_SP14
SD_DAT4/XD_WP#/CF_D6_SP13
SD_DAT5/XD_D0/CF_D14_SP12
SD_CLK/XD_D1/MS_CLK/CF_D7_SP11
SD_DAT6/XD_D7/MS_D3/CF_D15_SP10
MS_INS#/CF_IORD#_SP9
SD_DAT7/XD_D2/MS_D2/CF_IOWR#_SP8
SD_DAT0/XD_D6/MS_D0/CF_RST#_SP7
SD_DAT1/XD_D3/MS_D1/CF_IORDY_SP6
XD_D5/MS_BS/CF_A2_SP5
CF_A1/XD_D4_SP4
CF_A0/SD_CD#_SP3
CF_D0/SM_WPM#/XD_WP_SP2
CF_D1/XD_CD#_SP1
CF_D8/SM_CD#_SP0
43
42
41
40
39
38
37
35
34
31
29
28
27
26
25
23
21
20
19
18
RREF
DGND
DGND
6
46
AGND
AGND
1
2
C523 1U_0603_16V4Z
3 in 1 Card Reader
CF_CD#
CF_DMARQ
13
24
CF_D10
CF_D9
CF_D2
SD_CMD
15
16
17
36
JP26
+VCC_3IN1
SD_DATA2
SD_DATA3
R446 1
SD_MS_CLK
2 22_0402_5%
MS_DATA3_SD_DATA6
MSCD#
MS_DATA2_SD_DATA7
SD_MS_DATA0
SD_MS_DATA1
MSBS
SD_MS_DATA0
SD_MS_DATA1
SD_DATA2
SD_DATA3
SD_MS_CLK
SDW P#
SDCMD
S DCD#
R458 1
2 22_0402_5%
SD_MS_DATA1
S DCD#
SDW P#
SD_MS_CLK
MSCD#
SD_MS_DATA0
MSBS
MS_DATA3_SD_DATA6
MS_DATA2_SD_DATA7
MSCLK
SDCMD
VCC_MS
VCC_MS
SCLK_MS
INS_MS
SDIO_MS
BS_MS
RESERVED_MS
RESERVED_MS
VSS_MS
VSS_MS
GND
GND
C
PROCO_MDR019-C0-1202
ME@
2
0_0402_5%
40mil
+3VS
@ R457
10_0402_5%
+VCC_3IN1
U26
27P_0402_50V8J
GND
RT9701-PB_SOT23-5
@
1
1
2
@ C536
10P_0402_50V8J
@ C537
10P_0402_50V8J
B
@
2
1
XTLO
C515
1
VIN
VOUT
VIN/CE VOUT
2 @
2
2
2
Y2
12MHZ_16P_6X12000012
R501
100K_0402_5%
C535
0.1U_0402_16V4Z
1
1
1
2
1
5
R462
150K_0402_5%
3
4
C538
1U_0603_10V4Z
27P_0402_50V8J
SDPW R0_MSPWR
R436
10K_0402_5%
@ R459
10_0402_5%
2
XTLI
C511
2
19
13
14
16
18
20
15
17
21
12
22
23
R433
0_0402_5%
MODE SEL
@ C513
0.1U_0402_16V4Z
VDD_SD
DAT0_SD
DAT1_SD
DAT2_SD
CD/DAT3_SD
CLK_SD
WP_SD
CMD_SD
CD_SD
VSS_SD
VSS_SD
RTS5158-GR_LQFP48_7x7
1
R497
B
SDCLK
6
9
10
2
3
7
11
4
1
5
8
1
R447
6.19K_0402_1%
1
2
12
32
2
C514
1U_0402_6.3V4Z
2
2
VREG
CF_DMACK#
CF_CS0#
<BOM Structure>
2 0_0402_5%
R496 1
R454
0_0402_5%
2
1
SDPW R0_MSPWR 1
1
+5VALW
2
1
3
7
9
11
33
2
+5VS
U25
Used 9701 by 10K
1
C526
1U_0603_16V4Z
1
0_0402_5%
reserved power circuit
A
A
Compal Secret Data
Issued Date
2006/08/04
Deciphered Date
2006/10/06
5
4
3
2
Title
1394+3 in 1 Card
Custom LA-3691P
Date:
R ev
0.2
Sheet
1
29
of
45
A
B
C
D
E
Layout Notice : 1.2V filter. Place as close
chip as possible.
L15
FBM-L11-321611-260-LMT_1206
1
Q12 2
Layout Notice : Filter place as close
chip as possible.
Layout Notice : Place as close
chip as possible.
+1.2V_LAN
+3VALW_VDDIO
C450
0.1U_0402_16V4Z
+LAN_AVDD
2
<32> EN_WOL
C449
0.1U_0402_16V4Z
1
1
EN_WOL 2
G
Q11
2N7002_SOT23
D
1
S
2
1
1
1
1
1
1
2
1
2
1
C457
0.1U_0402_16V4Z
1
2
C476
0.1U_0402_16V4Z
1
2
C460
0.1U_0402_16V4Z
1
2
C461
0.1U_0402_16V4Z
2
2
C481
0.1U_0402_16V4Z
2
2
C506
0.1U_0402_16V4Z
2
C507
0.1U_0402_16V4Z
2
33K_0402_5%
C486
0.1U_0402_16V4Z
2
1
L31 FBM-L11-160808-601LMT_0603
2
1
R174
C505
0.1U_0402_16V4Z
C468
4.7U_0805_10V4Z
+VSB
2
C503
0.1U_0402_16V4Z
S
D
3
2
G
1
1
C488
0.1U_0402_16V4Z
3
4
1
+3VALW
2
1
+XTALVDD
L35 FBM-L11-160808-601LMT_0603
2
C502
0.1U_0402_16V4Z
C456
4.7U_0805_6.3V6K
AO3414_SOT23
+2.5V_LAN
2
1
4
C132
0.1U_0603_25V7K
U22
close to each of the pins 38, 45, and 52
+LAN_BIASVDD
2
1
L29 FBM-L11-160808-601LMT_0603
1
2
C455
0.1U_0402_16V4Z
(CLKREQ#) and (ENERGY_DET) are
only supported in BCM5787M
<16> CLK_PCIE_LAN#
28
PCIE_REFCLK_N
<16> CLK_PCIE_LAN
29
PCIE_REFCLK_P
11
CLKREQ#
3
LOW PWR
<16> CLKREQ_LAN#
1
R426
+1.2V_LAN
1
1
+AVDDL
1
@ R428
C451
0.1U_0402_16V4Z
2
4.7K_0402_5%
2
0_0402_5%
+3VS
R371
+3VALW_VDDIO
R380
1
CBE#1 53
2
1K_0402_5%
2
1K_0402_5%
1
54
41
40
42
43
48
47
49
50
LAN_TX0LAN_TX0+
LAN_RX1LAN_RX1+
LAN_TX2LAN_TX2+
LAN_TX3LAN_TX3+
LAN_TX0- <31>
LAN_TX0+ <31>
LAN_RX1- <31>
LAN_RX1+ <31>
+3VALW_VDDIO
VMAIN_PRSNT
LINKLED#
SPD100LED#
SERIAL_DI
TRAFFICLED#
VAUX_PRSNT
2 R425 1
1 R424 1
67 R420@1
66
2 0_0402_5%
0_0402_5%
2
2 0_0402_5%
LINKLED# <31>
ACTIVITY# <31>
Place closed to L14 & K14
C516 1
2 0.1U_0402_16V4Z
C512 1
2 4.7U_0603_6.3V6K
3
C439
4.7U_0805_6.3V6K
1
@ R432
2
100K_0402_5%
LAN_LOW_PWR
2
1
L28 FBM-L11-160808-601LMT_0603
2
2
RDN
RDP
TDN
TDP
DC
DC
DC
DC
1
1
2
1
PCIE_RXD_N
31
PCIE_RXD_P
25
PCIE_TXD_N
26
PCIE_TXD_P
10
PERST#
12
WAKE
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
+PCIE_PLLVDD
1 PCIE_MRX_C_LTX_N2
C484
1 PCIE_MRX_C_LTX_P2
C478
<8,17,20,22,24,25> PLT_RST_BUF#
@
+PCIE_VDD
<32> LAN_WAKE#
C475
0.1U_0402_16V4Z
<16,22> ICH_SMBCLK
@
<16,22> ICH_SMBDATA
PCIE_GND
@
1
R427
1
R431
1
R394
1
R383
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
58
DC
57
DC
SMBus to support ASF
1
2
@ R502
0_0402_5%
LAN_WP
4
GPIO_0
7
GPIO_1
No CIS Symbol
2
R422
XTALO
1
200_0603_1%
Y1 1
2
1
2
25MHZ_20P_1BG25000CK1A
2
1
C501
27P_0402_50V8J
C495
27P_0402_50V8J
XTALI
2
REGCTL12
REGCTL25
RDAC
C470
0.1U_0402_16V4Z
2
1
L30 FBM-L11-160808-601LMT_0603
1
2
C453
4.7U_0805_6.3V6K
32
2
1
L33 FBM-L11-160808-601LMT_0603
2
2
C459
4.7U_0805_6.3V6K
Pin16 conect to C1206 Pin1
8
GPIO_2
9
UART_MODE
XTALI
21
XTALI
XTALO
22
XTALO
REG_GND
16
VSS
24
VSS
69
PCIE_GND
65
63
64
62
CTL12
Q33 1
MMJT9435T1G_SOT223
+1.2V_LAN
CTL12
14
18 CTL25
37 2
R357
3
1
C510
0.1U_0402_16V4Z
1
1K_0402_1%
XTALVDD
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
23
6
15
19
56
61
+XTALVDD
+3VALW_VDDIO
VDDP
VDDP
17
68
+2.5V_LAN
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
5
13
20
34
55
60
+1.2V_LAN
1
2REG_GND 2
C509
10U_0805_10V4Z
+3VALW_VDDIO
1
2
C508
0.1U_0402_16V4Z
4.7uF
4
1
C452
0.1U_0402_16V4Z
SCLK
NC
SO
SERIAL_DO
CTL25
Q31
3
MBT35200MT1G_TSOP6
+LAN_BIASVDD
BIASVDD
PCIE_PLLVDD
PCIE_VDD
PCIE_VDD
36
30
27
33
DC
DC
DC
38
45
52
+LAN_AVDD
AVDDL
DC
DC
DC
39
44
46
51
+AVDDL
1
2
5
6
1
DC
2
0_0402_5%
+GPHY_PLLVDD
2
4
C443
4.7U_0805_6.3V6K
ENERGY_DET
35
+GPHY_PLLVDD
GND
3
59
1
@ R398
LAN_ENERGY_DET
2
1
L27 FBM-L11-160808-601LMT_0603
2
2
LAN_CLK
SI
LAN_DATA
CS#
+PCIE_PLLVDD
+PCIE_VDD
2
+2.5V_LAN
Notice : 4.7u 6.3V capactor Thickness 1.25mm
BCM5906MKMLG P12_QFN68_10x10
Layout Notice : Filter place as close
chip as possible.
Pin 24 conect to C1339 Pin1
Layout Notice : Place as close
chip as possible.
+3VALW_VDDIO
+2.5V_LAN
VCC
WP
SCL
SDA
A0
A1
NC
GND
1
1
2
3
4
C498
2
2
1
2
C496
8
7
6
5
LAN_WP
LAN_CLK
LAN_DATA
2
2
1
0.1U_0402_16V4Z
U7
0.1U_0402_16V4Z
C116
0.1U_0402_16V4Z
R166
4.7K_0402_5%
C504
R165
4.7K_0402_5%
2
10U_0805_10V4Z
1
1
1
AT24C02_SO8
1
1
Close to U87
LAN_CLK
SI
CS#
1
R419
2
@ R416
1
@ R409
2
4.7K_0402_5%
1
4.7K_0402_5%
2
4.7K_0402_5%
Compal Secret Data
Issued Date
2006/08/04
2006/10/06
Deciphered Date
A
B
C
D
Title
BCM5787M-GLAN
Date:
Rev
0.2
Sheet
E
30
of
45
5
4
3
2
1
1
+2.5V_LAN
R331
0_0402_5%
2
D
C413 1
2 0.1U_0402_16V4Z
C428 1
2 0.1U_0402_16V4Z
Lan Conn.
T24
<30> LAN_TX0+
<30> LAN_TX0-
LAN_TX0+
LAN_TX0TCT
TCT
<30> LAN_RX1+
<30> LAN_RX1-
LAN_RX1+
LAN_RX1-
1
2
3
4
5
6
7
8
RD+
RDCT
NC
NC
CT
TD+
TD-
RX+
RXCT
NC
NC
CT
TX+
TX-
16
15
14
13
12
11
10
9
MDO0+
MDO0MCT0
MCT1
MDO1+
MDO1-
@ C1691
2
1 R175
75_0402_5%
2
1 R178
75_0402_5%
2
C125
2 220P_0402_50V7K
<30> ACTIVITY#
JP21
ACTIVITY#
1
R170
2
300_0402_5%
10mil
Change C468,C470,C473,C474,C475,C476 from 0.01uF to 0.1uF
<30> LINKLED#
1
49.9_0402_1%
1
49.9_0402_1%
LINKLED#
C446
1
2 0.1U_0402_16V4Z
C
1
49.9_0402_1%
1
49.9_0402_1%
SHLD4
16
PR4-
SHLD3
15
MDO3+
7
PR4+
MDO1-
6
PR2-
MDO2-
5
PR3-
MDO2+
4
PR3+
MDO1+
3
PR2+
MDO0-
2
PR1-
MDO0+
SHLD2
14
1
PR1+
SHLD1
13
2
10
Green LED-
9
Green LED+
TYCO_2-1734819-5
1
68P_0402_50V8K
1
@ C123
LAN_TX0- 2
R374
LAN_TX0+ 2
R375
Amber LED+
+3VALW_VDDIO
2
C160
Amber LED-
11
8
210mil
300_0402_5%
1
R183
12
MDO3-
+3VALW_VDDIO
350uH_NS0013LF
LAN_RX1- 2
R373
LAN_RX1+ 2
R372
D
1
68P_0402_50V8K
C
220P_0402_50V7K
C447
1
2 0.1U_0402_16V4Z
RJ45_PR
C151 1
2 1000P_1206_2KV7K
near LAN controller
B
B
A
A
Compal Secret Data
2006/08/04
Issued Date
2006/10/06
Deciphered Date
5
4
3
2
Title
LAN CONTROLLER
Custom LA-3691P
Date:
Rev
0.2
Sheet
1
31
of
45
+3VALW
+EC_AVCC
<33> KSO16
<33> KSO17
2
<39>
<39>
<4>
<4>
1
R47
10K_0402_5%
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
1
@ R507
2
0_0402_5%
1
2
G
+3V_STB
<14,15,34> EC_TX_P80_DATA
<14,15,34> EC_RX_P80_CLK
<33> ON/OFF#
<35> PWR_LED#
<33> NUM_LED#
@ Q1
2N7002_SOT23
+3VALW
XCLKI
XCLKO
FRD#SPI_SO
2
100K_0402_1%
FSEL#SPICS#
2
100K_0402_1%
XCLKI
2XCLKO
20M_0603_5%
1
@ R25
KSO17
2
10K_0402_5%
77
78
79
80
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
122
123
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
DAC_BRIG
EN_FAN1
IR EF
2
1
KB925 SPI STRAP PIN
1
10K_0402_5%
CHARGE_LED0#
CAPS_LED#
CHARGE_LED1#
SYSON
EC_LID_OUT#
EC_ON
ICH_POK_EC
BKOFF#
+3VALW
+3VALW
FSTCHG <40>
CHARGE_LED0# <35>
CAPS_LED# <33>
CHARGE_LED1# <35>
NOVO# <33>
SYSON <25,37,42>
VR_ON <45>
ACIN <22,38>
0
1
2
3
4
5
6
7
Vab
UMA_DES
IHL00/IGT30 UMA 3.30V
IHL00V2/V3 UMA 2.20V
IHL00V2/V3 VGA 0.25V
IHL00/IGT30 VGA 0V
I
H
L
0
0
V
2
3
I
G
T
3
0
0
1
2
3
4
5
6
7
SCROLL_LED# <33>
PM_SLP_S4# <22>
ENBKL <18>
EAPD <26,27>
KILL_SW# <36>
2
1
+3VALW
R21
10K_0402_5%
STB <37>
BATT_IN
BATT_IN
no used at B-test
2
4.7K_0402_5%
2
4.7K_0402_5%
UMA_DES
Vab
2
1
C47
2
PM@ R42
56K_0402_5%
BRD ID
R54/42(Rb) Vab
R01 (EVT)
R02 (DVT)
R03 (PVT)
R10A (MP)
R01 (EVT)
R02 (DVT)
R03 (PVT)
R10A (MP)
0
8.2K
18K
33K
56K
100K
200K
NC
R57/45(Ra)=100K Ohm
0V
0.25V
0.50V
0.82V
1.19V
1.65V
2.20V
3.30V
+3VALW
20mils
1
1
R36
TP_DATA
1
R34
R54
ID
C293
0.1U_0402_16V4Z
TP_CLK
2
I
H
L
0
0
EC_RSMRST# <22>
EC_LID_OUT# <22>
EC_ON <33>
RB751V_SOD323
ICH_POK
D5 1
2
ICH_POK <8,22>
BKOFF# <18>
1
2
1
2
+3VS
WL_OFF# <24>
@ R16 0_0402_5% R22 10K_0402_5%
8M SPI ROM
U18
2
FSEL#SPICS# 2
R259
SPI_CLK
2
R19
FWR#SPI_SI 2
R257
ECAGND
BRD_ID
1
@ C41
1
R51
ID
GM@ R45
100K_0402_1%
0.1U_0402_16V4Z
1
10K_0402_5%
SKU_ID
2 4.7K_0402_5%
1
BT_OFF# <24>
2
R23
R57
100K_0402_1%
1
@ R50
100K_0402_1%
R26
+3VALW
1
TP_CLK <34>
TP_DATA <34>
+3VALW
2
+3VALW
2
@ 10K_0402_5%
2
1
R40
2
TP_CLK
TP_DATA
2
R52
124
+3VALW
EC_MUTE#
73
74
89
90
91
92
93
95
121
127
V18R
Analog Board ID definition,
Please see page 3.
DAC_BRIG <18>
EN_FAN1 <4>
IREF <40>
EC_MUTE# <27>
USB_ON <36>
FRD#SPI_SO
FWR#SPI_SI
SPI_CLK
FSEL#SPICS#
110
112
114
115
116
117
118
R63
100K_0402_1%
C19
15P_0402_50V8J
1
4
OUT
IN
NC
2
NC
15P_0402_50V8J
3
C20
1
2
3
4
BATT_TEMP <39>
BATT_OVP <40>
ADP_I <40>
+5VS
EC_SMB_CK1
2
4.7K_0402_5%
EC_SMB_DA1
2
4.7K_0402_5%
A0
A1
A2
GND
2
BRD_ID
SKU_ID
UMA_DES
119
120
126
128
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
GPI
VCC
WP
SCL
SDA
AT24C16AN-10SU-2.7_SO8
1
97
98
99
109
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
+5VALW
1
R48
1
R44
83
84
85
86
87
88
100
101
102
103
104
105
106
107
108
XCLK1
XCLK0
KB926QFA1_LQFP128
1
67
AVCC
9
22
33
96
111
125
VCC
VCC
VCC
VCC
VCC
VCC
68
70
71
72
ECAGND
1
@ R41
EC_TX_P80_DATA
EC_RX_P80_CLK
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
PSCLK1/GPIO4A
KSI4/GPIO34
PSDAT1/GPIO4B
KSI5/GPIO35
PSCLK2/GPIO4C
PS2 Interface
KSI6/GPIO36
PSDAT2/GPIO4D
KSI7/GPIO37
TP_CLK/PSCLK3/GPIO4E
KSO0/GPIO20
TP_DATA/PSDAT3/GPIO4F
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
SDICS#/GPXOA00
KSO4/GPIO24
SDICLK/GPXOA01
KSO5/GPIO25 Int. K/B
SDIDO/GPXOA02
KSO6/GPIO26 Matrix
SDIDI/GPXID0
SPI Device Interface
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
SPIDI/RD#
KSO10/GPIO2A
SPIDO/WR#
SPI Flash ROM SPICLK/GPIO58
KSO11/GPIO2B
KSO12/GPIO2C
SPICS#
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
CIR_RX/GPIO40
KSO16/GPIO48
CIR_RLC_TX/GPIO41
KSO17/GPIO49
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
GPIO BATT_LOW_LED#/GPIO54
SCL1/GPIO44
SDA1/GPIO45
SUSP_LED#/GPIO55
SM Bus
SCL2/GPIO46
SYSON/GPIO56
SDA2/GPIO47
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
GND
GND
GND
GND
GND
1
@ R20
1
@ R18
EC_THERM#
FAN_SPEED1
<4,22> EC_THERM#
<4> FAN_SPEED1
D
S
3
<20> PCI_PME#
<22> PM_SLP_S3#
<22> PM_SLP_S5#
<22> EC_SMI#
<33> LID_SW#
<17,25,37,40,42,43,44> SUSP#
<22> PBTN_OUT#
EC_PME#
2
0_0402_5%
AD
11
24
35
94
113
1
R46
<30> LAN_WAKE#
PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
LID_SW#
SUSP#
PBTN_OUT#
BATT_TEMP
BATT_OVP
PWM Output
DA Output
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
+3VALW
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
63
64
65
66
75
76
INVT_PWM <18>
BEEP# <26>
EN_WOL <30>
ACOFF <38,40>
ACOFF
8.2K_0402_5%
KSI[0..7]
<33,34> KSI[0..7]
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
0.1U_0402_16V4Z
KSO[0..15]
<34> KSO[0..15]
INVT_PWM
BEEP#
2
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
<34> KSI1
<33,34> KSI2
21
23
26
27
1
1
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
R65
100K_0402_1%
U4
8
7
6
5
EC_SMB_CK1
EC_SMB_DA1
2
2
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
C59
2 0.1U_0402_16V4Z
1
1
<22> EC_SCI#
2
56K_0402_5%
12
13
EC_RST#
37
EC_SCI#
20
PM_CLKRUN# 38
<16> CLK_PCI_LPC
<20,34> PCI_RST#
2
47K_0402_5%
C57
0.1U_0402_16V4Z
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
1
2
3
4
5
7
8
10
+5VALW
USB_ON
2
10K_0402_5%
1
R506
AGND
1
@ R38 10_0402_5%
1
R59
+3VALW
<22,34> SERIRQ
<21,34> LPC_FRAME#
<21,34> LPC_AD3
<21,34> LPC_AD2
<21,34> LPC_AD1
<21,34> LPC_AD0
2
U1
+5VALW
1
69
1
2
22P_0402_50V8J
<21> GATEA20
1
RB751V_SOD323
2
1
C48
1000P_0402_50V7K
2
@ C35
2
1
C40
1000P_0402_50V7K
2
D6
<21> KB_RST#
1
C25
0.1U_0402_16V4Z
+3V_STB
2
10K_0402_5%
2
C21
0.1U_0402_16V4Z
1
@ R29
2
1
C22
0.1U_0402_16V4Z
C23
0.1U_0402_16V4Z
+3VALW
L8 1
2
+EC_AVCC
FBM-11-160808-601-T_0603
2
1
C44
C46
0.1U_0402_16V4Z
1000P_0402_50V7K
1 ECAGND 2
1
2
L7
FBM-11-160808-601-T_0603
1
SPI_CS#
1
15_0402_5%
SPI_CLK_R
1
15_0402_5%
SPI_SI
1
15_0402_5%
8
VCC
3
W
7
HOLD
1
S
6
C
5
VSS
4
Q
2
D
SPI_SO 2
R260
1 FRD#SPI_SO
15_0402_5%
SST25LF080A_SO8-200mil
2
1
@ C292
10P_0402_25V8K
2
@ R256
SPI_CLK_R
1
15_0402_5%
JP11
SPI_CS#
SPI_SO
+3VALW
1
3
5
7
1
3
5
7
2
4
6
8
2
4
6
8
+3VALW
SPI_CLK_R
SPI_SI
E&T_2941-G08N-00E~D
ME@
32.768KHZ_12.5P_1TJS125BJ2A251
X1
+3VS
1
R49
1
R43
EC_SMB_CK2
2
4.7K_0402_5%
EC_SMB_DA2
2
4.7K_0402_5%
C36
@ 100P_0402_50V8J
1
1
2
2
C37
@ 100P_0402_50V8J
Compal Secret Data
Issued Date
2006/08/04
Deciphered Date
2006/10/06
Title
BIOS & EC I/O Port
Custom IGT30 LA-3571P
Date:
Rev
0.2
Sheet
32
of
45
Power Button
JP4
ACES_88716-1601-01
3
4
6
5
2
+3VALW
SMT1-05_4P
1
@ JOPEN
1
@ JOPEN
2
R255
100K_0402_5%
Bottom Side
D12
1
3
+3VALW
+5VALW
+3VALW
ON/OFF#
2
ON/OFFBTN#
ON/OFFBTN#
Switch Board Conn.
1
J3
2
2
TOP Side
J1
1
1
+5VS
2
0_0402_5%
2
0_0402_5%
<28> DRIVE_LED#
<32> CAPS_LED#
<32> NUM_LED#
<32> SCROLL_LED#
DRIVE_LED#
CAPS_LED#
NUM_LED#
SCROLL_LED#
ON/OFFBTN#
2
C291
1000P_0402_50V7K
1
D13
RLZ20A_LL34
<32> KSO16
<32,34> KSI0
2
DTC124EK_SC59
2
EC_ON
1
51_ON# <38>
Q40
<32> EC_ON
@ R10
1
ON/OFF# <32>
51_ON#
DAN202UT106_SC70-3
R258
4.7K_0402_5%
R11
+5VALW
1
ON/OFF switch
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
GND
GND
SW1
1
R511
2
2
33K_0402_5%
<32> KSO17
<32,34> KSI2
3
NOVO_BTN#
1
MUTE# D
MUTE #
USER #
KSI0 & KSO16
KSI2 & KSO17
2
3
S
+3VALW
2
G
Q27
2N7002_SOT23
R15
1
100K_0402_5%
<32> NOVO#
NOVO#
<38> 51_ON#
D4
2
51_ON#
NOVO_BTN#
1
3
DAN202U_SC70
Lid Switch
+VCC_LID
2
0_0402_5%
R244 1
2 100K_0402_5%
A3212ELHLT-T_SOT23W-3
VDD
2
1
R241
1
OUTPUT
2
3
LID_SW# <32>
2
GND
C289
0.1U_0402_16V4Z
1
+3VALW
U14
1
C276
10P_0402_50V8J
Issued Date
Compal Secret Data
2006/08/18
Deciphered Date
2007/8/18
Title
BIOS, I/O Port & K/B Connector
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
33
of
45
5
4
3
2
1
INT_KBD Conn.
D
KSI[0..7]
D
KSI[0..7] <32,33>
KSO[0..15]
KSO[0..15] <32>
For IHL00
To TP/B Conn.
ME@
ACES_85202-24051
2 @ 100P_0402_50V8J
KSO4
C66
1
2 @ 100P_0402_50V8J
1
2 @ 100P_0402_50V8J
KSO5
C64
1
2 @ 100P_0402_50V8J
KSI2
C63
1
2 @ 100P_0402_50V8J
KSO6
C82
1
2 @ 100P_0402_50V8J
KSI3
C78
1
2 @ 100P_0402_50V8J
KSO7
C81
1
2 @ 100P_0402_50V8J
KSI4
C76
1
2 @ 100P_0402_50V8J
KSO8
C67
1
2 @ 100P_0402_50V8J
KSI5
C62
1
2 @ 100P_0402_50V8J
KSO9
C61
1
2 @ 100P_0402_50V8J
KSI6
C75
1
2 @ 100P_0402_50V8J
KSO10
C85
1
2 @ 100P_0402_50V8J
KSI7
C74
1
2 @ 100P_0402_50V8J
KSO11
C70
1
2 @ 100P_0402_50V8J
KSO0
C77
1
2 @ 100P_0402_50V8J
KSO12
C83
1
2 @ 100P_0402_50V8J
KSO1
C79
1
2 @ 100P_0402_50V8J
KSO13
C69
1
2 @ 100P_0402_50V8J
KSO2
C80
1
2 @ 100P_0402_50V8J
KSO14
C84
1
2 @ 100P_0402_50V8J
KSO3
C68
1
2 @ 100P_0402_50V8J
KSO15
C86
1
2 @ 100P_0402_50V8J
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
G1
G2
JP7
JP8
1
2
3
4
5
6
7
8
+5VS
TP_DATA
TP_CLK
<32> TP_DATA
<32> TP_CLK
1
2
3
4
5
6
7
8
ACES_87151-0807G
ME@
TP_DATA
TP_CLK
+5VS
3
1
C73
2
C65
KSI1
C
C117
@ D10
PSOT24C_SOT23
0.1U_0402_16V4Z
1
C
KSI0
Update Footprint
FOR LPC SIO DEBUG PORT
JP13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
B
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
+5VS
B
EC DEBUG PORT
+3VS
JP12
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ0#
PCI_RST#
CLK_PCI_DB
SERIRQ
CLK_14M_SIO <16>
LPC_AD0 <21,32>
LPC_AD1 <21,32>
LPC_AD2 <21,32>
LPC_AD3 <21,32>
LPC_FRAME# <21,32>
LPC_DRQ0# <21>
PCI_RST# <20,32>
CLK_PCI_DB <16>
SERIRQ <22,32>
2
R265
+3VALW
<14,15,32> EC_TX_P80_DATA
<14,15,32> EC_RX_P80_CLK
EC_TX_P80_DATA
EC_RX_P80_CLK
1
2
3
4
1
2
3
4
ACES_85205-0400
ME@
1
10K_0402_5%
ACES_85201-2005
ME@
A
A
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
4
3
2
Title
EC ENE KB910L(Reserved)
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
1
34
of
45
LED
+5VALW
1
R249
1 LED3
HT-191NB_BLUE_0603
2
2
300_0402_5%
PWR_LED# <32>
LED1
2
4
300_0402_5%
+5VALW
1
R250
2
2
300_0402_5%
A
1
R248
3
B
+3VALW
1
Amber
CHARGE_LED1# <32>
Blue
CHARGE_LED0# <32>
HT-297UD/CB _BLUE/AMB_0603
Blue&Amber
LED2
+3VS
1
R252
2
4
300_0402_5%
3
+5VS
1
R251
2
2
300_0402_5%
1
Amber
BT_LED# <24>
Blue
WLAN_LED# <24>
A
B
HT-297UD/CB _BLUE/AMB_0603
Issued Date
Compal Secret Data
2006/08/18
Deciphered Date
2007/8/18
Title
MDC/CIR & LED
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
35
of
45
A
B
C
D
E
USB Conn.
W=80mils
+USB_VCCC
ME@
ACES_87213-1000G
Kill SWITCH
1
GND2
GND1
12
11
10
9
8
7
6
5
4
3
2
1
10
9
8
7
6
5
4
3
2
1
1
+USB_VCCC
+3VS
2
+USB_VCCC
D2
DAN217_SC59
2
@
3
+3VALW
+USB_VCCC
R7
2
C497
150U_D2_6.3VM
2
C499
470P_0402_50V7K
+5VALW
2
2
C18
470P_0402_50V7K
100K_0402_5%
KILL_SW#
1
1
+
1
+USB_VCCC
1
1
C301
1
8
7
6
5
OUT
OUT
OUT
OC#
G545A1P1U_SO8
4.7U_0805_10V4Z
USB20_P2 <22>
USB20_N2 <22>
W=80mils
2
+USB_VCCA
1
2
USB20_P4 <22>
USB20_N4 <22>
USB20_P2
USB20_N2
USB CONN. 1
+USB_VCCC
GND
IN
IN
EN#
USB20_P4
USB20_N4
JP5
KILL_SW# <32>
U17
1
2
3
4
KILL_SW#
USB_OC#4 <22>
USB_OC#2 <22>
@ D17
USB20_P0
6
CH3
CH2
3
USB20_N6
+
0.1U_0402_16V4Z
2 @
+USB_VCCA
5
Vp
Vn
W=80mils
+USB_VCCA
1
C294
C462
2
2
<32> USB_ON
1
150U_D2_6.3VM
2
C473
470P_0402_50V7K
JP22
USB20_P6
4
CH4
CH1
1
USB20_N0
<22> USB20_N0
<22> USB20_P0
CM1293-04SO_SOT23-6
USB20_N0
USB20_P0
1
2
3
4
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
SUYIN_020173MR004G579ZR
ME@
3
3
USB CONN. 2
+5VALW
+USB_VCCA
+USB_VCCA
W=80mils
U24
C527 0.1U_0402_16V4Z
2
1
<32> USB_ON
1
2
3
USB_ON 4
GND
IN
IN
EN#
OUT
OUT
OUT
OC#
8
7
6
5
1
USB_OC#6 <22>
G545A1P1U_SO8
2
USB_OC#0 <22>
1
C528
470P_0402_50V7K
JP24
C500
@ 1000P_0402_50V7K
<22> USB20_N6
<22> USB20_P6
USB20_N6
USB20_P6
2
1
2
3
4
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
ME@
4
4
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
A
B
C
D
Title
Power OK, Reset and RTC Circuit, TP
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
E
36
of
45
A
B
C
+5VALW TO +5VS
1
D
E
+3VALW TO +3VS
+5VALW
1
+1.8V to +1.8VS
+5VS
+3VALW
+1.8V
+3VS
+1.8VS
U28
10U_0805_10V4Z
2
2
1U_0603_10V4Z
1
2 SUSP
G
Q38
2N7002_SOT23
D
1
S
2
+VSB
C568
1
2
R202
47K_0402_5%
1
C582
1
R203
1
2
Q18 G
2N7002_SOT23
8
7
6
5
D
1
2
S
S
S
G
1
2
3
4
1
1
C184
C185
PM@
PM@
10U_0805_10V4Z
2
2
1U_0603_10V4Z
R193
PM@
470_0603_5%
D
2 SUSP
G
Q19
2N7002_SOT23
+VSB
1.8VS_GATE
S
R192
PM@
33K_0402_5%
C209
1
D
SUSP
0.1U_0603_25V7K
2
G
Q15 PM@
S
2N7002_SOT23
2
2 SUSP
G
Q17 PM@
2N7002_SOT23
C189
PM@
0.1U_0603_25V7K
3
S
D
D
D
D
C190
C191
PM@
AO4468_SO8
PM@
10U_0805_10V4Z
2
2
10U_0805_10V4Z
10U_0805_10V4Z
470_0603_5%
2
2
1U_0603_10V4Z
D
1
SUSP
0.1U_0603_25V7K
3
3
C581
S
SUSP
2
Q37G
2N7002_SOT23
1
2
3
4
S
S
S
G
3
S
3
R483
33K_0402_5%
C584
D
D
D
D
AO4468_SO8
D
5VS_GATE
1
10U_0805_10V4Z
2
2
10U_0805_10V4Z
1
10U_0805_10V4Z
2
2
10U_0805_10V4Z
C583
470_0603_5%
1
2
R484
1
1
1
C579
2
1
3
AO4468_SO8
+VSB
8
7
6
5
2
C575
1
1
U9 PM@
U10
1
2
3
4
1 1
C571
S
S
S
G
1
1
D
D
D
D
1
C577
8
7
6
5
2
2
+3VALW to +3V Transfer
+3V_STB
J4
@
PAD-OPEN 3x3m
2
+5VALW
2
0.1U_0402_16V4Z
U27
10U_0805_10V4Z
1
8
7
6
5
2
@ AO4468_SO8
D
D
D
D
1
2
3
4
S
S
S
G
1
1
C545
2
2
R225
100K_0402_5%
C543
1
C539
10U_0805_10V4Z
3
D
S
Q23
2N7002_SOT23
2
G
1
1
R224
100K_0402_5%
2
G
1
SYSON
<25,32,42> SYSON
S
D
Q35 AOS3414
+VSB
SYSON#
SYSON#
1
1
3
+3VALW
2
2
R464
33K_0402_5%
Q36
2N7002_SOT23-3
2
G
C544
0.1U_0603_25V7K
RTCVREF
+5VALW
2
2
S
1
2
STB
1
<32> STB
3
D
3
3
+0.9VS
+1.8V
2
2
2
2
2
S
2 SUSP
G
Q14
2N7002_SOT23
4
Compal Secret Data
2006/08/18
2007/8/18
Deciphered Date
A
B
C
1
2
1
D
2 SYSON#
G
Q16
2N7002_SOT23
Issued Date
Q22
2N7002_SOT23
R222
100K_0402_5%
R185
470_0603_5%
3
S
S
1
1
1
1
S
D
2 SUSP
G
Q20
2N7002_SOT23
3
S
+1.25VS
R191
470_0603_5%
D
2 SUSP
G
Q28
2N7002_SOT23
3
D
2 SUSP
G
Q10
2N7002_SOT23
R211
470_0603_5%
1
1
1
1
S
R262
470_0603_5%
3
3
S
D
2 SUSP
G
Q25
2N7002_SOT23
3
D
4
R137
470_0603_5%
1
1
1
R235
470_0603_5%
1
+VCCP
2
+2.5VS
D
2
G
<17,25,32,40,42,43,44> SUSP#
+1.5VS
1
SUSP
<44> SUSP
3
1
R508
R223
10K_0402_5% 100K_0402_5%
@
D
Title
DC Interface
Size
B
Date:
Document Number
Rev
0.2
LA-3691P
Sheet
E
37
of
45
B
C
D
BATT ONLY
Precharge detector
Min.
typ.
Max.
H-->L 6.138V 6.214V 6.359V
L-->H 7.196V 7.349V 7.505V
ACIN
Precharge detector
Min.
typ.
Max.
H-->L 14.589V 14.84V 15.243V
L-->H 15.562V 15.97V 16.388V
DC030005Q00
1
PR1
10_1206_5%
PR2
1K_1206_5%
1
2
PR3
1K_1206_5%
1
2
LL4148_LL34-2
PR4
PC5
@10K_0402_1% @ 0.01U_0402_25V7K
1
2
1
2
2
PR12
10K_0402_1%
1
2
ACIN <22,32>
PACIN
2
2
<32,40> ACOFF
Vin Detector
2
PQ3
DTC115EUA_SC70-3
High 18.764 17.901 17.063
Low 17.745 16.9
16.03
3.3V
B+
2
3
RTCVREF
2
GLZ4.3B_LL34-2
PR17
10K_0402_1%
2
1
PQ2
DTC115EUA_SC70-3
PACIN <40>
3
PD3
PR16
10K_0402_1%
1
O
PU1A
LM393DG_SO8
1
P
-
1
+
2
G
1
8
3
4
1
PC7
0.1U_0402_16V7K
2
PR7
1K_1206_5%
1
2
1
PR11
10K_0402_1%
2
1
PR10
84.5K_0402_1%
1
PR15
20K_0402_1%
2
1
PC6
1000P_0402_50V7K
2
2
VS
PR13
22K_0402_1%
1
2
PR5
1K_1206_5%
1
2
VS
PR6
1M_0402_1%
1
2
VIN
PQ1
TP0610K-T1-E3_SOT23-3
1
3
2
1
1
PR14
100K_0402_5%
@
2
2
1
PR9
100K_0402_5%
PD2
VIN
1
2
1
PR8
100K_0402_5%
PD1
RLZ24B_LL34
1 2
@
2
1
2
PC4
1000P_0402_50V7K
JST_B4B-EH-A(LF)(SN)
1
4
PC3
100P_0402_50V8J
4
2
3
2
1
1
2
3
PC2
100P_0402_50V8J
2
2
1
1
1
PC1
1000P_0402_50V7K
ADPIN
PJP1
VIN
PL11
FBMA-L11-322513-201LMA40T_1210
1
2
1 2
A
VIN
PR18
2.2M_0402_5%
2
1
2
VL
1
(7A,280mils ,Via NO.=14)
+5VALW
(8A,320mils ,Via NO.= 16)
+0.9VSP
1
PJ6
PAD-OPEN 3x3m
2
8
1
PQ5 D
1
PC14
0.01U_0402_25V7K
2
2
1
PR28
499K_0402_1%
1
PR27
191K_0402_1%
PRG++ 2
1
PR30
34K_0402_1%
2
1
2N7002W-T/R7_SOT323-3
PR31
47K_0402_1%
2
2
1
G
PACIN <40>
1
RTCVREF
PU1B
LM393DG_SO8
3
+VCCPP
PJ4
PAD-OPEN 3x3m
1
2
+VCCP
S
PQ6
DTC115EUA_SC70-3
+5VALWP
2
@
(16A,800mils ,Via NO.= 24)
+0.9VS
3
+5VALWP
PJ5
PAD-OPEN 3x3m
1
2
+1.8VP
6
3
+1.5VS
5
-
2
1
PR32
66.5K_0402_1%
+1.5VSP
PJ3 PAD-OPEN 3x3m
1
2
+1.8V
+
O
2
BAS40CW_SOT323-3
PQ4
TP0610K-T1-E3_SOT23-3
PJ2
PAD-OPEN 3x3m
1
2
7
P
1
3
G
<40> ACON
2
4
<39,41> MAINPWON
2
1
2
2
1
PD6
1
PC13
1000P_0402_50V7K
<33> 51_ON#
PR29
22K_0402_1%
1
2
3
PC10
0.22U_1206_25V7K
1
CHGRTCP
2
GND
2
1
2
PC8
4.7U_0805_6.3V6K
+CHGRTC
PR25
200_0805_5%
2
1
2
1
3
IN
2
1
PR26
100K_0402_5%
OUT
PC9
1U_0805_25V4Z
PU2
3
2
1
PR22
100K_0402_1%
G920AT24U_SOT89-3
PR24
PR23
560_0603_5%
560_0603_5%
1
2 1
2
VS
VS
1
1
RB751V-40_SOD323-2
PC11
0.1U_0603_25V7K
2
2
1
PR20
68_1206_5%
2
1
PR21
68_1206_5%
BATT+
RTCVREF
PC12
0.1U_0603_25V7K
PD5
3.3V
2
1
PR19
499K_0402_1%
PD4
LL4148_LL34-2
4
+3VALWP
PJ7
PAD-OPEN 3x3m
1
2
4
PJ8
+3VALW
+2.5VSP
1
1
2
2
+2.5VS
JUMP_43X79
+1.25VP
1
PJ9
PAD-OPEN 3x3m
2
+1.25VS
A
+VSBP
1
PJ10
PAD-OPEN 3x3m
2
Issued Date
Compal Secret Data
+VSB
2005/10/17
Deciphered Date
2006/10/17
(0.3A,40mils ,Via NO.= 2)
B
C
Title
DCIN/DECTOR
Size
B
Date:
Document Number
Rev
0.2
IHL00 LA-3691P
D
Sheet
38
of
45
B
C
PL12
HCB4532KF-800T90_1812
1
2
BATT+
PH1 under CPU botten side :
CPU thermal protection at 87 degree C
Recovery at 70 degree C
PJP2
1
PR41
100_0402_1%
1
2
PR38
150K_0402_1%
8
-
O
4
1
2
2
1
PR45
1K_0402_1%
2
+
2
1
MAINPWON <38,41>
PU3A
LM393DG_SO8
PR46
150K_0402_1%
+3VALWP
3
PR43
2 150K_0402_1%
1
VL
1
2
PR44
6.49K_0402_1%
PC20
1U_0603_6.3V6M
1
1
2
1
2
PC19
1000P_0402_50V7K
EC_SMB_DA1 <32>
PH1
100K_0603_1%_TH11-4H104FT
TM_REF1
EC_SMB_CK1 <32>
2
PR39
1 442K_0603_1%
2
PR42
69.8K_0603_1%
1
2
2
2
1
PR40
100_0402_1%
ALI/MH# <40>
1
VL
P
1
VL
2
1
PR37
10.5K_0402_1%
1
VS
1
2
PC17
0.01U_0603_50V7K
PR35
1K_0402_1%
2
@ 100K_0402_5%
1
PR33
100K_0402_5%
+3VALWP
2
2
PC16
1000P_0603_50V7K
PR34
1
+3VALWP
1
ID
B /I
SMC
SMD
TS
GND
2
PC15
1000P_0603_50V7K
1
PR36
1K_0402_5%
1
2
1
BATT++
1
2
3
4
5
6
7
8
9
10
11
2
1
2
3
4
5
6
7
8
9
G1
G2
G
DC040003600
D
PC18
0.1U_0603_25V7K
BATT++
2
A
2
BATT_TEMP <32>
PQ7
TP0610K-T1-E3_SOT23-3
1
2
3
2
2N7002W-T/R7_SOT323-3
+
P
D
5
6
-
G
8
2
1
2
PC21
0.22U_1206_25V7K
VS
O
4
PQ8
2
G
1
PR50
0_0402_5%
2
3
1
1
<41> SPOK
PC23
0.1U_0402_16V7K
1
2
PR49
100K_0402_5%
3
2
1
PR47
100K_0402_5%
PR48
22K_0402_1%
1
2
VL
+VSBP
1
PC22
0.1U_0603_25V7K
3
B+
7
PU3B
LM393DG_SO8
S
4
4
Issued Date
Compal Secret Data
2005/10/17
Deciphered Date
2006/10/17
A
B
C
Title
BATTERY CONN. / OTP
Size
B
Date:
Document Number
Rev
0.2
IHL00 LA-3691P
D
Sheet
39
of
45
A
B
C
65W, Iadapter=0~3.42A, Current sense=0.02ohm, PR70=39.2K, CP=3.079A
90W, Iadapter=0~4.74A, Current Sense=0.015ohm, PR70=28.7K, CP=4.263A
D
ADP_I = 19.9*Iadapter*Rsense
B+
4
1
2
3CS IN
JUMP_43X118
2
6
VCOMP
CSIP
19
PHASE
18
ICM
2
1
BOOT
16
PR68
BST_CHG 1
2
2.2_0603_5%
ACLIM
VDDP
15
6251VDDP
10
4
2
1
BST_CHGA
2
1
PC41
0.1U_0603_25V7K
PD10
1
11
VADJ
LGATE
14
12
GND
PGND
13
39.2K_0402_1%
PR70
2
ISL6251AHAZ-T_QSOP24
PR65
0.02_2512_1%
PQ19
SI4800BDY-T1-E3_SO8
1
26251VDD
4.7_0603_5%
PR71
PC45
4.7U_0805_6.3V6K
6251VDD 1
2
1
PU5A
3
3
2
1
PR76
499K_0402_1%
+
-
2
LM358ADR_SO8
PR78
105K_0402_1%
PC48
0.01U_0402_25V7K
OVP voltage :
LI-3S :13.50V--BATT-OVP=1.5V
2
@
1
0
1
8
P
1
PR75
340K_0402_1%
BATT-OVP=0.111*BATT+
2
1
2
PR77
10K_0402_1%
2
PC47
0.01U_0402_25V7K
1
<32> BATT_OVP
G
CHGSEL
If this area float, Charge voltage is 4.2V/cell
PC46
0.01U_0402_25V7K
2
PR211
20K_0402_1%
2SC2411KT146_SOT23-3
@
1
1
3
E
2
1
2
B
4
2
@ SI2301BDS-T1-E3_SOT23-3
2
<39> ALI/MH#
C PQ44
2
1
PQ21
PQ45
DTC115EUA_SC70-3
BATT+
2
3
1
1
VS
CELLS
2
PR58
47K_0402_5%
PR210
100K_0402_1%
PR73
@ 274K_0402_1%
PR74
@ 100K_0402_1%
2
1
BATT+
CSON
6251VREF
10K_0402_1%
PR72
1
3
4
3
2
1
DL_CHG
4
2
1
CHLIM
9
1
2
DH_CHG
6251VREF 1
3
CHG
2
D
D
D
D
17
VREF
RB751V-40_SOD323-2
CSON
CC=0.6~3.4A
VCHLM=0.24V~1.36V
IREF=0.972*Icharge
IREF=0.5832V~3.3V
PC27
2200P_0402_50V7K
2
1
2
1
UGATE
8
2
PL1
10U_LF919AS-100M-P3_4.5A_20%
1
6251_EN
6251VREF
CP mode
Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05)
where Vaclm=0.5535V, Iinput=3.079A
where Vaclm=0.6667V, Iinput=4.263A
7
PQ17
SI4800BDY-T1-E3_SO8
CS IN
2
1
PC38
PR62 20_0603_5%
0.1U_0603_25V7K
CSIP
1
2
PR220
2.2_0603_5%
LX_CHG
1
20
PC43
10U_1206_25V6M
CSIN
2
Be careful the
IREF voltage!!
PC26
0.1U_0603_25V7K
2
1
1
ICOMP
PACIN <38>
S
3
21
PQ15
2
G
1
CSOP
PC157
0.01U_0402_25V7K
2
1
3
2N7002W-T/R7_SOT323-3
2
CELLS
5
PC33
0.1U_0603_25V7K
4
3
CSON
PR219
20_0603_5%
CSON
1
2
PC35
0.047U_0603_25V7M
CSOP
1
2
PR61
20_0603_5%
D
D
D
D
EN
22
1
PC44
1
2
2
PR69
100K_0402_1%
2
G
S
S
S
3
5
6
7
8
23
G
S
S
S
2
<32> IREF
1
3
PQ20
DTC115EUA_SC70-3
0.01U_0402_25V7K
<32,38> ACOFF
1
1SS355_SOD323-2
D
4
3
2
1
ACSET ACPRN
<32> ADP_I
PR67
143K_0402_1%
2
1
PD9
2
5
6
7
8
6251VREF
PC40
0.1U_0402_16V7K
2
PQ14
DTC115EUA_SC70-3
BATT+
CSOP
PR63
10K_0402_1%
1
PC37
0.01U_0402_25V7K
1
2
2 1
S
6251DC_IN 2
1
2N7002W-T/R7_SOT323-3
ACON
100_0402_1%
PR64 2
1
D
1
VIN
2
24
1
DCIN
2
CELLS
100P_0402_50V8J
PC39
200K_0402_1%
PR56
1
2
1
2
1
PC156
0.1U_0402_16V7K
1
<38> ACON
2
2
1
PQ18
2
G
3
<38> PACIN
1
PC36
6800P_0402_25V7K
PR66
22K_0402_1%
PACIN 1
2
ACOFF <32,38>
SUSP# <17,25,32,37,42,43,44>
PC32
0.1U_0603_25V7K
VDD
2
1SS355_SOD323-2
BAS40CW_SOT323-3
2
2
2
2
@ 680P_0402_50V7K
PC34
CSON1
2
100K_0402_1%
PR59
2
1
1
PR57
10K_0402_5%
1
PC42
10U_1206_25V6M
1
1
PR60
150K_0402_1%
2N7002W-T/R7_SOT323-3
2
1
VIN
PD7
1
3
2
PR209
100K_0402_1%
1
S
3
1
D
3
PQ16
2
G
FSTCHG
2
2
1
PC31
2.2U_0603_6.3V6K
6251_EN
1
PR54
47K_0402_1%
1
2
PC30
PU4
2
1
PD16
1SS355_SOD323-2
PD8
1
2
8
7
6
5
PR55
10K_0402_1%
0.1U_0603_25V7K
6251VDD
<32> FSTCHG
1
2
3
PQ43
DTC115EUA_SC70-3
2
PR208
100K_0402_1%
6251DC_IN
1
PQ11
AO4407_SO8
PC25
10U_1206_25V6M
2
1
PC29
5600P_0402_25V7K
1
2
3
VIN
PQ12
DTA144EUA_SC70-3
PQ13
DTC115EUA_SC70-3
2
PQ42
TP0610K-T1-E3_SOT23-3
2
2
1
2
PR51
0.02_2512_1%
4
2
1
2
3
PC28
0.1U_0603_25V7K
1
4
1
2
PR53
200K_0402_1%
1
PC24
10U_1206_25V6M
2
1
CSIP
1
PR52
47K_0402_1%
CHG_B+
PJ12
8
7
6
5
1
1
2
3
2
1
2
3
P3
1
8
7
6
5
VIN
PQ10
AO4407_SO8
3
P2
1
PQ9
AO4407_SO8
4
4
BATT Type
Charging Voltage
CHGSEL
(0x15)
2800mAH 3S pack
Normal 3S LI-ON Cells
A
CV mode
13050mV
LOW
12.90V
12600mV
HIGH
12.60V
Issued Date
Compal Secret Data
2006/05/18
Deciphered Date
2007/05/18
B
C
Title
CHARGER
Size
Document Number
R ev
0.2
IHL00 LA-3691P
Date:
D
Sheet
40
of
45
A
B
C
D
PJ13
JUMP_43X118
B+++
2
1
B+++
PQ23
SI4800BDY-T1-E3_SO8
5
6
7
8
4
3
2
1
G
S
S
S
D
D
D
D
10U_1206_25V6M
1
2
PL3
2
DL3
28
26
24
27
22
1
DH3
10UH_1164AY-100M=P3_4.7A_20%
PQ25
SI4810BDY-T1-E3_SO8
5
6
7
8
D
D
D
D
1
4
3
2
1
G
S
S
S
2
PR87
0_0603_5%
BST3A
1
2
PR89
499K_0402_1%
11
PC53
2200P_0402_50V7K
PC54
2
1
2
PR84
0_0603_5%
1
2
PR86
200K_0402_1%
1
2
PR85
200K_0402_1%
1
2
PR88
499K_0402_1%
1
1
5
3HG
LX3
7
2
2
1
2
PR95
6.81K_0402_1%
1
+
<39> SPOK
1
2
PR99
10K_0402_1%
2
PC62
330U_D3L_6.3VM_R25M
+3VALWP
PRO#
VCC
V+
TON
ILIM3
4.7U_0805_6.3V6K
10
1
2
PR97
0_0402_5%
REF
LDO3
8
25
12
PC52
0.1U_0402_16V7K
2
1
2
17
2
13
20
18
LX5
DL5
ILIM5
OUT5
PU7
FB5
BST3
N.C.MAX8734AEEI+_QSOP28 DH3
DL3
SHDN#
LX3
ON5
OUT3
ON3
FB3
SKIP#
PGOOD
PC63
2
1
1
2
1
3
2
1
PR98
47K_0402_1%
1
2
15
19
21
9
1
PC61
0.22U_0603_16V7K
2
PR94
0_0402_5%
DH5
PC64
0.047U_0603_16V7K
1
2
PC60
0.047U_0603_16V7K
GLZ5.1B_LL34-2
1
2
PR96
100K_0402_5%
1
2
PR90
10.5K_0402_1%
+5V Ipeak = 6.66A ~ 10A
1
2
PR91
0_0402_5%
8734_VREF
PR93
47K_0402_1%
2 1
2
BST5
16
6
4
3
VS
1
14
LD05
BST5A
8734_VREF
PC57
1U_0805_16V7K
PC56
4.7U_0805_6.3V6K
2
1
2
VL
DL5
PZD1
PC55
1U_0805_25V4Z
1
PQ24
SI4810BDY-T1-E3_SO8
8
7
6
5
D
D
D
D
1
2
3
4
S
S
S
G
1
2
PL2
10UH_1164AY-100M=P3_4.7A_20%
2
1
2
PR92
6.81K_0402_1%
+
PC59
150U_D2_6.3VM
1
@
1 PC58
0.1U_0603_25V7K
DH5
<BOM Structure>
+5VALWP
2
1
PR81
4.7_1206_5%
1
2
PR82
47_0402_5%
2
1
PR80
4.7_1206_5%
PR83
0_0603_5%
2
BAW56W_SOT323-3
B+++
GND
1
2
PR79
0_0603_5%
1
VL
LX5
2
PC50
0.1U_0402_16V7K
1
2
BST3B
23
5HG
PD11
<BOM Structure>
PQ22
SI4800BDY-T1-E3_SO8
1
2
3
4
S
S
S
G
D
D
D
D
10U_1206_25V6M
2
PC51
1
8
7
6
5
1
BST5B
1
1
PC49
0.1U_0402_16V7K
1
2
3
1
2
2
B+
3
VFB=2V
+3.3V Ipeak = 6.66A ~ 10A
1
2
PC65
1U_0603_6.3V6M
MAINPWON <38,39>
4
4
Issued Date
Compal Secret Data
2005/10/17
Deciphered Date
2006/10/17
A
B
C
Title
+5VALWP/+3VALWP
Custom
Date:
Rev
0.2
IHL00 LA-3691P
D
Sheet
41
of
45
5
4
3
2
1
+5VALW
1
FB_1.8V
ILIM1
VCCA1
25
VCCA_1.8V
LX1
VOUT1
24
Vout_1.8V
DH1
TON1
23
EN/PSV1
22
LX2
19
LX_1.05V
VCCA2
12
FB2
ILIM2
18
VDDP2
17
<17,25,32,37,40,43,44> SUSP#
PGND2
15
VSSA2
SC413TSTRT_TSSOP28
1
2
+5VALW
2
1
2
FB_1.05V
PC78
1U_0603_10V6K
1
+
2
PR107
10K_0402_1%
VFB=0.5V
@ PC70
0.1U_0402_16V7K
PC67
4.7U_1206_25V6K
PC66
4.7U_1206_25V6K
2
1
5
6
7
8
D
D
D
D
PC74
33P_0402_50V8K
1
+
2
@
1
2
to VSSA1 and VOUT1 PIN
16
2
Close to IC Side
DL2
PGD2
SI4810BDY-T1-E3_SO8
PQ27
DL_1.05V
+VCCPP
Vout_1.05V
1
FB_1.05V
PR109
ILIM_1.05V1
2
34K_0402_1%
+5VALW
Maximum continuous current=>6A
PL4
1.8UH_1164AY-1R8N=P3_9.5A_30%
1
2
PC71
330U_D2_2V_Y
VOUT2
Vout_1.05V
DH_1.05V-1
PC69
330U_D2_2V_Y
10
VCCA_1.05V 11
PR102
0_0402_5%
1
2
0.1U_0603_25V7K
C
2
1
PR106
11.5K_0402_1%
BST_1.05V
1
2
0_0402_5%
DH_1.05V
1
20
2
21
DH2
B+_1.8/1.05
G
S
S
S
BST2
TON2
PC72
1
2
4
3
2
1
EN/PSV2
9
14
Differential routing of feedback
PR108
8
13
PR103
0_0402_5%
1
SI4800BDY-T1-E3_SO8
PR112
PQ26
2
1 B+_1.8/1.05
820K_0402_5%
5
6
7
8
BST1
PGOOD1_1.8V
PC84
1000P_0402_50V7K
1
2
D
D
D
D
PC68
1000P_0402_50V7K
26
G
S
S
S
PR116
1M_0402_5%
27
FB1
VDDP1
4
3
2
1
0_0402_5%
1
1
B+_1.8/1.05 2
28
PGD1
DL1
1
1
0.1U_0603_25V7K
PQ29
SI4810BDY-T1-E3_SO8
1
2
3
4
PR121
10K_0402_1%
PC82
2
DH_1.8V
6
PR115
2 BST_1.8V 7
VSSA1
PGND1
2
8
7
6
5
D
D
D
D
FB_1.8V
3
2
2
1
PC91
1U_0603_10V6K
2
1 2
PR119
0_0402_5%
2
1
DH_1.8V-1
1
1
DL_1.8V
2
PC80
1
2 +5VALW 3
1U_0603_10V6K
1
2 ILIM_1.8V
4
PR114 27.4K_0402_1%
LX_1.8V
5
S
S
S
G
2
2
1
2
BST_1.05V-1
8
7
6
5
D
D
D
D
PQ28
SI4800BDY-T1-E3_SO8
1
PC89
33P_0402_50V8K
1
+
BST_1.8V-1
2
PC85
220U_D2_4VY_R15M
1
PR122
26.1K_0402_1%
PL5
1.8UH_1164AY-1R8N=P3_9.5A_30%
1
2
Vout_1.8V
C
1
2
3
4
+1.8VP
PR100
100K_0402_5%
@
PU8
S
S
S
G
JUMP_43X118
VCCA_1.8V
2
2
PC86
4.7U_1206_25V6K
2
1
2
PC87
4.7U_1206_25V6K
2
1
1
BAW56W_SOT323-3
PD12
VCCA_1.05V
2
B+_1.8/1.05
PJ14
1
PR101
10_0603_5%
PR110
10_0603_5%
B+
1
1
PC83
2.2U_0603_6.3V6K
PC90
1U_0603_10V6K
2
1
D
1
D
2
<25,32,37> SYSON
PR124
0_0402_5%
1
Close to IC Side
B
Differential routing of feedback to VSSA2 and VOUT2 PIN
2
1
PR113
100K_0402_5%
@
B
@ PC170
0.1U_0402_16V7K
2
PGOOD2_1.05V
VFB=0.5V
VFB=0.5V
Vo=VFB*(1+PR129/PR130)=1.5V
Vo=VFB*(1+PR122/PR127)=1.805V
Ipeak=5.16A, Imax=3.612A
Ton=(3.3E-12*(PR125+37K)*(Vout/VBat))+50ns
Ipeak=12.17A, Imax=8.519A
Ton=(3.3E-12*(PR121+37K)*(Vout/VBat))+50ns
=0.3201us
AO4916 Rds(on)=>Typ:21 mOhm
=3.3*10e-12*(820K+37K)*(1.8/19)+50ns=0.3179us
Max:27 mOhm
FDS6670AS:Rds(on)=>Typ:9 mOhm
Max:11.5 mOhm
A
Ivalleymin=9*10u*(29.4K/0.027*1.4)=7A
Iocp=Ivalley+ Iripple /2
Ivalleymax=11*E-6*(29.4K/0.021*1.1)=12.833A
Iripple=(vin-vout)*(Ton/L)=5.467A, 1/2 Iripple=2.734A.
Iripple=(vin-vout)*(Ton/L)=2.546A, 1/2Iriiple=1.273A
Ivalleymin=10E-6*(PR120/Rds(ON)max*1.5)
=9*10e-6*(27.4K/0.0115*1.5)=14.295A>11.73*1.2=14.076A
OCP==>8.273A~14.106A
A
Ivalleymax=10E-6*(PR120/Rds(ON)typ*1.2)
=11*10e-6*(27.4K/0.009*1.2)=27.907A.
Compal Secret Data
OCP==>17.029A~30.641A
2005/10/17
Issued Date
Deciphered Date
2006/10/17
VCCPP/1.8VP
5
4
3
Title
2
Custom
Date:
Rev
0.2
IHL00 LA-3691P
Sheet
1
42
of
45
5
4
3
2
1
1
1
+5VALW
2
ILIM_1.5V
9
+5VALW
0.1U_0603_25V7K
1
PC93
4.7U_1206_25V6K
2
1
5
6
7
8
FB_1.5V
1
+
2
PR133
10K_0402_1%
1
PC108
1U_0603_10V6K
2
2
+1.5VSP
Vout_1.5V
1
VFB=0.5V
C
2
G
S
S
S
PC101
33P_0402_50V8K
4
3
2
1
DL_1.5V
B+
2
2
D
D
D
D
SI4810BDY-T1-E3_SO8
PQ31
1
JUMP_43X118
PL6
1.8UH_1164AY-1R8N=P3_9.5A_30%
1
2
DL
PR128
1
2
26.1K_0402_1%
1
PC96
470U_D2_2.5VM
ILIM
10
PJ15
PR132
30K_0402_1%
LX
LX_1.5V
1
DH_1.5V
11
PC100
2
2
12
VDDP
8
PGND
7
17
DH
1
PC111
4.7U_1206_25V6K
2
1
13
BST
15
14
NC
16
TON
PGD
VSSA
FB
4
NC
VCCA
3
PU9
SC411MLTRT_MLPQ16_4X4
EN/PSV
VOUT
TP
PGOOD2_1.5V
2
6
2
FB_1.5V
1
5
1
Vout_1.5V
VCCA_1.5V
PR126
1
2
0_0603_5%
BST_1.5V
PQ30
SI4800BDY-T1-E3_SO8
4 G
D 5
3 S
D 6
2 S
D 7
1 S
D 8
1
2
+5VALW
PR214
100K_0402_5%
BST_1.5V-1
PC164
1000P_0402_50V7K
D
B+_1.5VSP
1SS355_SOD323-2
1
2
@PC163
B+_1.5VSP
0.1U_0402_16V7K
PD14
VCCA_1.5V
1
PR213
1M_0402_5%
2
1
2
2
D
PR127
10_0603_5%
PC97
2.2U_0603_6.3V6K
PC99
1U_0603_10V6K
2
1
<17,25,32,37,40,42,44> SUSP#
PR212
0_0402_5%
1
2
C
Close to IC Side
Differential routing of feedback to VSSA2 and VOUT2 PIN
VFB=0.5V, Ipeak=14.02A, Imax=9.814A
The current rating of +1.05VSP include +VCC_GFX current.
Vo=VFB*(1+PR146/PR147)=1.05V
Ipeak=2.91A, Imax=2A.
Ton=(3.3E-12*(PR142+37K)*(Vout/VBat))+50ns=0.2391us
Vo=0.8*(1+PR190/PR191)=1.2608V
SI4810BDY:Rds(on)=>Typ:9mOhm
+5VS
Max:11.5 mOhm
Ivalleymin=9*10E-6*(PR145/Rds(ON)max*1.5)
=9*10E-6*(26.1K/(0.0115*1.5))=13.617A
PR215
10K_0402_1%
1
2
Ivalleymax=11*10E-6*(PR145/Rds(ON)min*1.2)
1
=11*10E-6*(26.1K/(0.009*1.3))=20.076A
B
PC165
Iripple=(vin-vout)*(Ton/L)=4.292A, 1/2Iripple=2.146A
B
1U_0603_6.3V6M
2
OCP==>15.763A~22.222A
PU13
EN
POK
VOUT
VOUT
3
4
FB
2
+1.25VP
1
1
PC166
0.01U_0402_25V
2
2
PR217
576_0402_1%
+
PC167
22U_1206_10V6M
2
PC168
@ 150U_D2E_6.3VM_R18
1
APL5913-KAC-TRL_SO8
2
GND
1
8
7
1
VCNTL
VIN
VIN
+1.5VS
PR218
1K_0402_1%
1
1
2
2
PC169
0.1U_0402_16V7K
6
5
9
1
1
<17,25,32,37,40,42,44> SUSP#
PR216
100K_0402_5%
1
2
1
2
2
PJP3
JUMP_43X118
2
A
A
PC162
22U_1206_10V6M
Issued Date
Compal Secret Data
2005/10/17
2006/10/17
Deciphered Date
1.5VSP/1.25VP
5
4
3
Title
2
Custom
Date:
Rev
0.2
IHL00 LA-3691P
Sheet
1
43
of
45
5
4
3
2
1
D
D
+5VS
PC117
1U_0603_6.3V6M
2
PJ16
JUMP_43X79
PU10
1
PC119
2
2
2.15K_0402_1%
1
1
PC121
@0.1U_0402_16V7K
FB
APL5913-KAC-TRL_SO8
0.01U_0402_25V7K
2
C
+2.5VSP
PR151
22U_1206_6.3V6M
EN
POK
3
4
PC120
2
8
7
VOUT
VOUT
1
VCNTL
VIN
VIN
1
6
5
9
1
<17,25,32,37,40,42,43> SUSP#
PR150
0_0402_5%
1
2
2
PC118
10U_0805_6.3V6M
GND
2
1 2
2
1
1
1
+3VS
C
2
PR152
1K_0402_1%
1
+1.8V
2
2
1
PJ17
JUMP_43X118
PU11
VIN
VCNTL
6
2
GND
NC
5
3
REFEN
NC
7
4
VOUT
NC
8
GND
9
+3VALW
2
2
2
PC122
10U_0805_6.3V6M
PR153
1K_0402_1%
B
1
1
1
1
B
PC123
1U_0603_6.3V6M
RT9173DPSP_SO8
S
PR155
1K_0402_1%
2
2
2
1
1
1
+0.9VSP
D
PC125
22U_1206_6.3V6M
2
@
PC126
0.1U_0402_16V7K
3
PQ34
2
G
1
<37> SUSP
1
PR154
0_0402_5%
1
2
PC124
0.1U_0402_16V7K
2N7002W-T/R7_SOT323-3
A
A
Issued Date
Compal Secret Data
2005/10/17
2006/10/17
Deciphered Date
+2.5VSP/0.9VSP
5
4
3
Title
2
Custom
Date:
Rev
0.2
IHL00 LA-3691P
Sheet
1
44
of
45
5
4
3
2
1
+5VS
CPU_B+
B+
2
1
33
D2
LX1
28
LX1__CPU
<5> CPU_VID3
2
1
34
D3
DL1
26
DL1__CPU
<5> CPU_VID4
2
1
35
D4
PGND1
27
<5> CPU_VID5
2
1
36
D5
GND
18
<5> CPU_VID6
1
2
37
D6
CSP1
17
TIME
CSN1
16
CSN1_CPU
9
CCV
FB
12
FB_CPU
11
REF
CCI
10
C CI_CPU
DPRSLPVR
DH2
21
DH2_CPU-1
BST2
20
BST2_CPU
LX2
22
LX2_CPU
DL2
24
DL2__CPU
PGND2
23
2
PC138
2
0.22U_0603_16V7K 39
PR176
<5,8,21> H_DPRSTP#
0_0402_5%
1
2
40
PR177
<5> H_PSI#
+3VS
1
2
3
PSI
2
PWRGD
1
CLKEN
PQ36
IRF8113PBF_SO8
CSN2__CPU
GNDS
13
PR184
1
PC141
1
<5> VSSSENSE
1
VSSSENSE
1
@
2
1
PC132
2200P_0402_50V7K
2
1
PC131
0.1U_0603_25V7K
2
1
100_0402_1%
PC142
4700P_0402_25V7K
@
2
PR188
3K_0603_1%
2
PC144
470P_0603_50V8J
PR191
20K_0402_1%
CPU_B+
PQ38
SI7686DP-T1-E3_SO8
0_0603_5%
PR196
1
2
PR198
10_0402_5%
2
2
2
PR185
DH2_CPU-2
4
3
2
1
2
PC151
0.1U_0402_16V7K
PR200
2.1K_0402_1%
2
1
2
3
2
1
DL2__CPU
3
2
1
PQ40
IRF8113PBF_SO8
4
1
PL10
0.36H_ETQP4LR36WFC_24A_20%
1
1
5
6
7
8
5
6
7
8
PQ39
PR199
4.7_1206_5%
2
IRF8113PBF_SO8
4
PR201
3.48K_0402_1%
1
2
NTC
1
2005/10/17
Issued Date
Deciphered Date
3
2
0.22U_0603_16V7K
A
2006/10/17
4
PC153
Compal Secret Data
PH3
2
10KB_0603_5%_ERTJ1VR103J
1
PR202 0_0402_5%
1
2
A
5
B
PR197 10K_0402_1%
PC152
680P_0603_50V7K
1
2
POUT
C
0.022U_0402_16V7K
CPU_VCC_SENSE
2
1
1
BSTM2_CPU
2
PR194
100_0402_1%
1
0_0402_5%
1
2
1
1
<4> H_PROCHOT#
0.22U_0603_16V7K
5
1
PR195
B
4700P_0402_25V7K
@ PR193
56_0402_5%
1
PC145
2
1
+3VS
PR192
@ 10K_0402_5%
1
PR190
0_0402_5%
PC143
2
2
@
@
<5> VCCSENSE
PR178
0_0402_5%
3.92K_0402_1%
2
NTC PR187
@ 3K_0603_1%
1
MAX8770GTL+_TQFN40
<BOM Structure>
41
TP
POUT
PC130
10U_1206_25V6M
2
1
PC140
IRF8113PBF_SO8
2
15
PR180
14
CSN2
1
CSP2
VRHOT
PH2 NTC
2
10KB_0603_5%_ERTJ1VR103J
1
2
PR181 @ 3K_0603_1%
1
2
0.22U_0603_16V7K
4
2
0_0402_5%
@ PR189
1
2
1
SHDN
2
<32> VR_ON
5
1
1
CLK_ENABLE#
1
38
PR183
@ 2K_0402_1%
2
<8,22> VGATE
2
2
PR182
10K_0402_1%
PR186
0_0402_5%
CSP2_CPU
PQ37
3.48K_0402_1%
PR174
2
1
1
PR179 0_0402_5%
1
2
2
0_0402_5%
DPRSTP
4
2
1
1
PC139
4
2
<8,22> PM_DPRSLPVR
499_0402_1%
2
CSP1__CPU
+CPU_CORE
1
<5> CPU_VID2
+CPU_CORE
PL9
0.36H_ETQP4LR36WFC_24A_20%
2
1
PC150
2200P_0402_50V7K
2
1
DH1__CPU-1
10_0402_5%
1
29
2
DH1
PR172
D1
47P_0402_50V8J
1
D
PC149
0.1U_0603_25V7K
2
1
32
PC148
10U_1206_25V6M
2
1
1
PC147
10U_1206_25V6M
2
1
2
PC146
10U_1206_25V6M
2
1
<5> CPU_VID1
0.22U_0603_16V7K
PC136
BSTM1_CPU 1
2
1
BST1_CPU 1
2
30
PR169
4.7_1206_5%
2
1
BST1
71.5K_0402_1%
1
7
PC129
10U_1206_25V6M
2
1
5
D0
3
2
1
31
5
6
7
8
1
C
PC128
10U_1206_25V6M
2
1
1
2
200K_0402_1%
2 PR158 1
1
0_0603_5%
PR163
2
2
PR1732
PR175
8
<5> CPU_VID0
PC137
680P_0603_50V7K 2.1K_0402_1%
PR170
1
2
PR171 0_0402_5%
TON
3
2
1
PR168 0_0402_5%
VDD
THRM
DL1__CPU
PR167 0_0402_5%
25
Vcc
5
6
7
8
PR166 0_0402_5%
6
3
2
1
PR165 0_0402_5%
19
+
2
0_0603_5%
PR161
1
2DH1_CPU-2
4
0_0603_5%
PR164 0_0402_5%
V CC
1
PQ35
SI7686DP-T1-E3_SO8
PU12
1
NTC
100K_0402_5%
PR160
1
2
PR162 0_0402_5%
PC134
1U_0603_6.3V6M
1
PR159
13K_0402_5%
2
2
2
2
PC135
2.2U_0603_6.3V6K
PC127
0.01U_0402_25V7K
1
0_1206_5%
PR157
10_0402_5%
D
PL8
HCB4532KF-800T90_1812
1
2
1
PC133
100U_25V_M
PR156
5VS12
2
Title
+CPU_CORE
Custom
Date:
R ev
0.2
IHL00 LA-3691P
Sheet
1
45
of
45
5
4
3
2
Version change list (P.I.R. List)
Item
Fixed Issue
1
Page 1 of 1
Rev.
PG#
Modify List
B.Ver#
Phase
D
D
1
2
3
4
5
6
7
C
C
8
9
10
11
12
13
B
14
B
15
16
17
A
A
Title
POWER PIR
5
4
3
2
Size
Date:
Document Number
Rev
Sheet
1
48
of
48
5
4
3
2
Version change list (P.I.R. List)
Item
Fixed Issue
1
Page 1 of 1
Rev.
PG#
Modify List
B.Ver#
Phase
D
D
1
XDP_BPM#0~4 test point short as EMI request
B
4
Modify Layout
2
ADD J6 for +VCC_AXG UMA VGA power shape
B
11
Modify Layout
3
Fixed Speaker no function
A2
37
Change Q91 form SI2301BDS to MMBT3906, Del R895
4
Fixed SWDJ function can't work
A2
36
Add R904
5
Fixed Audio Codec can't work
A2
29
Add R905,Q96
6
Fixed USB Port4 can't work
A2
27
Swap USB_N4 & USB_P4
7
Fixed EMI issue
A2
32 37
Add R908,C878,C879
C
B
C
8
Fixed SWDJ mode EC_MUTE# ISSUE
B
30
Add D39,Q99,R914
9
Fixed CMOS noise
B
36
Add R912,C880
10
Fixed EMI
B
25
Add C881,C882
11
Add chipset id
B
33
Add R915,R916
12
Fix SWDJ Subwoofer issue
B
31
Add R917
13
Fix DFX issue
C
22,33
Change Y3,X1,Y2 footprint
14
FOR E-STAR V4 wake on lan
C
22,33
Add R918,R919
15
For ESD issue
C
36
Add C883~C887 D40,D41
16
For AUDIO team design
C
30
Add R920 R921
17
Change LAN led function
C
25
Swap JP73 PIN12
B
& PIN14
A
A
Title
POWER PIR
5
4
3
2
Size
Date:
Document Number
Rev
Sheet
1
48
of
48

Compal LA-3691P - Schematics. www.s

Transcription

Similar documents

Compal confidential

IBM Lenovo G480 LA-7981p Free Laptop Schematic

Compal LA-3081P HBL51 Schematics. www.s

PDF - InformaticaNapoli

Compal Confidential

Compal LA-7741P - Schematics. www.s

Compal LA-8391P - Schematics. www.s