New Experimental Results

Transcription

ISAGST 2010, Troy, NY September 28-30, 2010
Electron Scattering in Buried InGaAs/High-k MOS Channels
S. Oktyabrsky, P. Nagaiah, T. Chidambaram V. Tokranov,
M. Yakimov, and R. Kambhampati
College of Nanoscale Science and Engineering, University at Albany-SUNY, Albany, NY
D. Veksler, G. Bersuker, and N. Goel,
International SEMATECH, Albany, NY
College of Nanoscale Science and Engineering
Outline
• InGaAs based MOSFETs with high-k dielectrics: challenges
• Mobility in buried n-type QW channels:
• Top semiconductor barrier
• Temperature
• Electron density
• Annealing
• Interface control using in-situ a-Si passivation
• Summary
III-V MOSFETs: Challenges
InAs
regrown
contact
• High quality interface with dielectric
High-k
oxide
gate metal
• Low density of interface states
• High thermal stability of the interface (challenge
for implant activation)
spacer
Channel: InGaAs
SI Substrate: GaAs or InP
• Improvement of channel mobility
• Low mass: Scattering – Coulomb, roughness,
remote soft phonons
• Buried channel – increased tox, higher power
• Spacer – 5 nm (tox  +1.7nm)
~8000-15000 cm2/V-s in GaAs or InGaAs
spacer
~1500-2000
cm2/V-s
• S-D resistance
• Regrown InAs for n-type or InSb on p-type
in GaAs or InGaAs
• p-channel mobility/drain current (goal: CMOS)
m*
From Weber et al. SSE 2006
• Strain
• III-Sb
• Ge
n-MOSFET with Buried In0.53Ga0.47As/InP
Channel and in situ HfO2
Reactive
e-beam
deposition
Effective channel mobility
10000
2k
InP
/sq
/sq
.
.
/sq
Uncorrected
Charge-corrected
.
Hall mobility
at Vg=0V
2
InP
Mobility, cm /V-s
5k
1k
Drain and gate leakage current
HfO2 on In0.52Al0.48As
L/W= 80 m /80 m
HfO2 on 2ML In0.53Ga0.47As
1000
L/W=10 m/370 m
100
10
12
13
10
Sheet carrier concentration, cm
-2
• Effective channel mobility
1300cm2/V-s
• Hall mobility of 1800 cm2/V-s at
3x1012 cm-2
• Significant reduction of Dit 2ML in HfO2 /2ML InGaAs
• SS from 2.2 V/dec  150 mV/dec
J. Cryst. Growth 2008
n-InGaAs Buried QWs: Experimental
Goal:
Space of Variables:
• QW
• In content 77%
- baseline for QW MOSFET mobility (Hall measurements)
- main scattering mechanisms
Motivation:
-Very little data on mobility in QW channels
-Unreliable data on MOSFETs
-Another method to characterize interface
Variations of doping
(50 nm thick barrier)
• Thickness 10 nm
• Top Barrier
• Thickness
High-k
• Oxide
• HfO2 reactive e-beam deposition
• ALD ZrO2, Al2O3, Al2O3+ZrO2
• No interface passivation or a-Si
IPL
• Modulation Doping
InAlAs
5 nm spacer, -doping
In0.77GaAs QW
5 nm spacer, -doping
n = 1.8x1012 cm-2
2
5 nm spacer = 7990 cm /V-s
= 435 /sq.
bulk-doping
InAlAs
• Bulk below QW
• Processing
• RTA 400-600 0C
n = 1.3x1012 cm-2
= 14300 cm2/V-s
= 328 /sq.
InP:Fe
n = 1.5x1012 cm-2
= 11400 cm2/V-s
= 375 /sq.
n-InGaAs Buried QWs:
Transport vs. Semiconductor Barrier Thickness
InAlAs/InGaAs
RT transport in 10 nm In0.77Ga0.23As QWs
11400
10000
2
In0.77GaAs QW
5 nm spacer
Mod.-doping
InAlAs
PVD- HfO2
ALD- ZrO2
ALD- Al2O3
ALD- Al2O3+ ZrO2
Hall Mobility, cm /V-s
High-k
InP:Fe
• n ~ (1-3)x1012 cm-2 (in high-mobility
samples)
• Clear dependence of mobility on db
• ~1.5x higher mobility with ALD
oxides
• Remote scattering due to interface and
oxide
5000
PVD HfO2
ALD Al2O3+ZrO2
ALD ZrO2
ALD Al2O3
2000
1000
0
1
2
3
4
5
6
7
50
Semicond. Barrier thickness, nm
Scattering Mechanisms
Zhu and Ma, EDL, 25, 89 (2004)
• Bulk III-V:
• Phonon scattering
• Ionized impurities scattering
• etc.
+
• Remote charge scattering (RCS):
• Is caused by interfacial states and bulk oxide
charges, >0:
RCS
bT
• Remote phonon scattering (RPS):
• Caused by phonons in high-k oxide
• Should have different trend vs. T, >0
Ph HK
Laikhtman and Solomon,
JAP, 103, 014501 (2008)
CT
• Interface roughness:
• Exponentially decrease with the barrier
thickness
SR
const
Temperature dependence of mobility
10 nm InGaAs/InAlAs QWs
(from Matsuoka, JJAP 1990)
Mobility in QWs vs. T and d (HfO2)
~T
2
100000
-1.2
dB =
50nm
10000
7nm
5nm
3nm
1nm
0nm
1000
~T
100
1.0
200
300
Si/HfO2 and Si/SiO2
(from Maitra, JAP 2007)
Temperature, K
• Deep QWs – phonon-limited mobility,
•
~T-1.2
~T-1.2
vs. T dependence reverses at d=5 nm (at
~ 4000 at RT)
• Approaching ~T+1.0 at small d - likely remote Coulomb
scattering (RCS)
• Si channels - do not show positive slope, though slope
reduces with high-k’s
Theoretical (low-mobility samples)
• Poisson equation with Stern-Howard
screening
• 2D scattering, Fermi statistics
Calculations of RCS mobility are performed
following (Barraud et al Microel. Eng.
2007, 84, 2404; JAP 2008, 104, 073725)
• Isotropic effective mass
• Kubo-Greenwood formulation for mobility
Solid -experiment; open - theory
• Single fitting parameter: Number of
Thick barrier - Phonon scattering
dominates with (T) ~T-1.2
Thin barriers - Coulomb scattering
~T
2
• Nt = 2x1013 cm-2 at the highk/barrier interface assumed
in calculations
100000
trapped charges at the high-k/barrier
interface
-1.2
50nm
10000
7nm
5nm
3nm
1nm
1000
~T
100
150
1.0
200
250 300 350 400
Temperature, K
Issues with the explanation
1) Need to identify the nature of
2x1013 cm-2 charges
2) At room temperature there is
significant deviation between theory
and experiment
T at 300K
Int
Acceptors
Dit
EF
CNL
Donors
Donors are neutral if filed
Acceptors are neutral if empty
The Fermi level is close to the CNL –
number of charged traps is small
Low-mobility samples: Transport activation
• Activation type dependence of conductivity vs.
temperature is observed
Conductivity, (Ohm/sq.)
-1
0.8meV
• Activation energy decreases with higher carrier
density
• Activation energy is lower at higher conductivity
1E-3
• Conductivity saturates at low temperature (as for
typical localization)
10meV 6meV
Instead of scattering at the Remote
charges potential one may consider
percolation in this potential:
3.5meV
13.5
1E-4
10meV
40meV
34meV
0.000
0.005
0.010
1/T (K)
0.015
-1
From: http://terpconnect.umd.edu/~enrossi/research.html
Activation energy
EF +/- 3kT
Potential in the channel
Activation energy at RT, meV
Low mobility and it’s dependence vs.
temperature can be explained by hoping
10
1
1E12
Electron Density, cm
•
With ns increase Ef becomes higher
•
With T increase more energetic electrons exist
1E13
-2
High-mobility samples: T-dependence
Experimental and interface-related
Mobility vs. T=10-300K
Electron mobility of ALD Gate Stacks
with 3nm semiconductor barrier
1.E+05
Bulk QW
ZrO2
Mobility, cm2/VS
5nm
1.E+04
ALD ZrO2, 3nm
1.E+03
10
100
T, K
• Similar trends as with PVD HFO2:
• Phonon-like in high mobility samples
• Flattens and RCS-like in low-mobility samples
• Crossover is at ~3000 cm2/Vs
• Mobility saturates at T<70-80K
• ZrO2 shows phonon behavior
High-mobility samples: T-dependence
Experimental and interface-related Mobility vs. T
Int
T at 300K
• Very high LT mobility when oxide is thin 
• Scattering charge is distributed deeper than 2-6 nm
in the oxide
• Slope changes from negative to positive with
thickness and low-k interface oxide 
• Competition between RCS and high-k phonon ?
Mobility vs. electron density
Mobility vs. Ns in MOS-QW
Mobility vs. Ns in HEMTs
(from Decobert et al., JCG-1998)
10000
HfO2
3nm top barrier
ZrO2
Mobility, cm2/Vs
Al2O3+ZrO2
Al203
1000
100
1.E+10
1.E+11
1.E+12
Electron density,
1.E+13
cm-2
Charges of ~4x1012 cm-2 do
not degrade mobility!
• Top semiconductor barrier 3 nm
• All the samples: different anneal, doping, oxide thickness
• Mobility has maximum 5000-6000 cm2/Vs close to (1-2)x1012 cm-2
• At low density - likely the reduction of screening of RCS
• At high - the electrons start occupying the higher valleys
Buried QWs: Annealing Behavior
De-trapping of carriers with
annealing (HfO2)
d=5 nm
-3.5
11
2x doping
3 nm
1 nm
0 nm
12
10
-2
n=8x10 cm
-4.0
12
2x10
Energy, eV
Electron concentration, cm
-2
12
5x10
-4.5
12
Ef
-2
2x10 cm
-5.0
1
-6.0
11
100
500
0.01
600
0.02
0.03
Distance, m
0
Annealing Temperature, C
CV shift with annealing of ALD Al2O3
0.04
0.05
• After 6000C annealing: Dit <1012 cm-2-eV-1
Sheet conc. vs Temp.
vs T for ALD Al2O3/HfO2
P-1057, n-InGaAs, A3 oxide, PDA 500C
0.65
• For 3nm barrier shift in surface potential is
as ~250 meV
• As-grown and 5000C: Dit ~ 6x1012 cm-2-eV-
-5.5
5x10
• Interface traps are effectively annealed at
6000C
Capacitance, F/cm
2
0.60
0.55
1MHz
500kHz
200kHz
100kHz
50kHz
20kHz
10kHz
5kHz
2kHz
1kHz
500Hz
0.50
0.45
0.40
0.35
0.30
0.25
0.20
-3
-2
-1
0
1
2
3
Voltage, V
P-1057, n-InGaAs, A3 oxide (Al2O3), PMA 600C
0.60
Qox ~ 1.6e12 cm-2
due to 600 anneal
Capacitance, F/cm
2
0.55
0.50
1MHz
500kHz
200kHz
100kHz
50kHz
20kHz
10kHz
5kHz
2kHz
1kHz
500Hz
0.45
0.40
0.35
0.30
0.25
0.20
-3
-2
-1
0
Voltage, V
1
2
Dit and apparent fixed charge change are too low to
explain the RCS
3
Role of the Low-k Interlayer
Mobility vs. EOT
Role of SiOx/Si layer
7000
Si IPL Thickness, nm
-1
0
1
0
1
2
6000
5000
2
-2
4000
oxidized
2
-3
HfO2/InGaAs
HfO2/[1nm +Si]/InGaAs
HfO2/[3nm +Si]/InGaAs
3000
2000
4000
3000
2000
Oxidized Si
1000
0.0
1000
0
1
2
3
4
Top Barrier Thickness, nm
5
• In-situ oxidation of the a-Si IPL
improves mobility
• Low-k interlayer reduces scattering –
another confirmation of RCS
• Too large contribution to EOT
• Is a-Si IPL useful for InGaAs?
0.5
1.0
1.5
EOT (HfO2 extra 1.6nm), nm
EOT:
• k= 3.9 for SiO2
• 5A – in situ
• 15A - oxidized
2.0
HfO2
SiOx
• k= 9 for a-Si
InGaAs
InGaAs: Effect of a-Si IPL
Dit vs. bias voltage
In0.53Ga0.47As MOSFET with a-Si/GdScO3
conductance
method
14
10
Id, A
2
D it , 1/cm -eV
10
13
10
with a-Si
12
10
-2
-1
0
(Vg-Vt), V
1
Gate stack with Si IPL annealed at 800ºC
Vd = 1V
0.01
1E-3
1E-4
1E-5
1E-6
1E-7
1E-8
1E-9
1E-10
1E-11
1E-12
50mV
No Si
Ig
TH131, 15 nm GdScO3/Si/InGaAs MOSFET
22
20
18
Ig
16
Vg = -0.5V to 3V
Step = 0.25V
14
Id, mA
from 1/f noise
15
12
10
8
6
W/L = 37
4
2
-0.5
0.0
0.5
1.0
1.5
2.0
0
0.0
0.5
1.0
Vg, V
Subthreshold swing
(mV/dec)
(kΩ/sq.)
• Improves thermal stability
• Reduces band-edge Dit
• Slightly Improves transport
1.5
2.0
Vd, V
Dit from Subthreshold
swing ( 1/cm2-eV )
Channel resistance in
linear region
aSi
No
a-Si
a-Si
No a-Si
a-Si
No a-Si
5 nm ALDZrO2
-
95
-
1.3x1013
-
2.6
15 nm
LaAlO3
140
290
4.7x1012
1.3x1013
1.4
1.6
15 nm
GdScO3
130
160
4x1012
6x1012
1.5
1.7
High-angle ADF/EDX after 8000C anneal
No Si
With a-Si IPL
Ga
Ga
Si
Si
Distance
Distance



As
In
Ga
Gd
Sc
O
Si
Ni
Counts, a.u.
Counts, a.u.
As
In
Ga
Gd
Sc
O
Si
The increased roughness in “no Si” sample
Reduced density interfacial layer
Ga-rich interfacial layer
Summary of scattering mechanisms
1
1
phonon
1
int
Mobility limits for various
mechanisms at RT and 3 nm barrier
at 2x1012 cm-2
1
1
bulk
Dit
Process
+
+
Interface
+
oxide charge
+
_
+
+_ +
__ _ _
- Interface + + + +
Trapped
interface charge
roughness
Bulk oxide
charge
Interface
dipoles
Top barrier
QW
Phonons and semiinterfaces
RCS due to fixed
oxide charge/dipoles
Limited mobility
cm2/Vs
12,000
4,600-10,000
Remote (soft)
phonons
>15,000
Trapped interface
charge ~2x1012 cm-2
>20,000
Summary

Baseline QW mobility vs. top semiconductor barrier thickness and electron
density is evaluated

Mobility does not directly affected by Dit but mainly determined by remote fixed
charges/dipols at the High-K/III-V interface, in both “low mobility” and “high
mobility” samples

vs. T differs for ZrO2 and Al2O3+ZrO2 samples – likely competition of RCS
and remote phonons scattering

Low mobility values in some samples at low carrier density and their
temperature dependences may be explained by hopping and associated with
hopping carrier activation

a-Si IPL is valuable for InGaAs/InP system if high-T annealing is used
Funding:
• SEMATECH
• INTEL Corporation
• FCRP/DARPA (MSD)

New Experimental Results

Transcription

Similar documents

AVL Rotary Range Extender