Flat-Panel Imaging Arrays for Digital Radiography

Transcription

Flat-Panel Imaging Arrays for Digital Radiography
Outline
Flat-Panel Imaging Arrays
for Digital Radiography
• Market and clinical challenges for digital radiography
• Passive pixel amorphous silicon imaging arrays
• Active pixel amorphous silicon imaging arrays
Timothy Tredwell, Jeff Chang, Jackson Lai, Greg Heiler, Mark Shafer, John Yorkston
• Active pixel LTPS imaging arrays
Carestream Health, Inc., Rochester, NY 14615, USA
Jin Jang, Jae Won Choi, Jae Ik Kim, Seung Hyun Park, Jun Hyuk Cheon, Sauabh Saxena, Won
Kyu Lee
• Silicon-on-glass circuits for future active pixel imaging
arrays
Advanced Display Research Center, Kyung Hee University, Seoul, Korea
Arokia Nathan
London Center for Nanotechnology, University College, London
Eric Mozdy, Carlo Kosik Williams, Jeffery Cites, Chuan Che Wang
Corning Incorporated, Sullivan Park, Corning, NY 14831, USA
2
DR: “Digital” Radiography
DR:
1 step acquisition with electrical “scanning”
“Flat panel” and CCD based technology (introduced ~1995)
(Courtesy Imaging Dynamics Corp.)
3
Two-Dimensional Projection Radiography
4
The Market Outlook for DR: Rapid Growth
World’s Population is Aging
• Still most common exam
• >1.5 x 109 exams per year
• Chest imaging most common
1999
2050
Procedural Volume Trends
• An aging population:
2,500
Procedures (Ms)
• By 2050, over 25% of the population in North America, Europe, China
and Australia will be over 60
• For every 1 time a 20-year-old visits a doctor …
…a 60-year-old visits a doctor 26 times
Nuc Med
2,000
ULtrasound
1,500
MR
CT
1,000
• Rising incomes in Asia and Latin America will accelerate demand
• Emerging economies could go direct to digital
• Cost must be low – significant market opportunity
Digital X-ray
500
Analog x-ray
2001 2002 2003 2004 2005 2006 2007 2008
5
Source: WHO, World Bank
6
Anatomical Noise in Projection Radiography
Anatomical Noise
3-Dim
2-Dim
&KHVW5DGLRJUDSK
0DPPRJUDSK\
• 3 dim. structure projected into 2 dim.
• Overlapping structures obscure clinical details
• Anatomical structure noise > x10 detector noise
7
Tissue Discrimination: Dual-Energy Imaging
8
Tissue Discrimination: Dual-Energy Imaging
High-Energy Image
High-Energy Image
Bone Image
120-150 kVp
IH
IH
wb
Low-Energy Image
Soft-Tissue Image
120-150 kVp
ws
Low-Energy Image
60-90 kVp
60-90 kVp
IL
IBone
IL
!
!
ln I Bone $ # ln I H " wb ln I L
!
ISoft
!
Dual-Energy Increases Conspicuity of Subtle lesions
!
ln I Soft $ ln I H # ws ln I L
9
!
10
Spatial Discrimination: Tomosynthesis
Utilizes parallax relative motions between shots
(Courtesy: JM Sabol, GE Healthcare and RC Gilkeson, Dept. Radiology Case Western Univ.)
11
12
Chest Tomosynthesis Clinical Example
Flat-panel “Cone Beam” CT
15 mm hilar nodule not visible in projection image
5
16-degree tube angle, 61 projection images, 5 mm slice spacing
!"#$%"!&!%'()!*+,'%-%.#"',#$%/&#0'%'()!*+,'%1*2,''3%4/$&5
6
4
7
3
8
2
1
1
2
8
7
3
6
15 mm nodule
5
(Courtesy: James Dobbins, PhD, Duke University Medical Center)
Detector
13
CBCT Spatial Discrimination
4
14
CBCT Image Guidance
• Isotropic resolution
• Patient dose << CT
• Some soft tissue vis.
Pre-Op.
Intra-Post Op.
Evaluation
Needle
PMMA
15
Advanced Imaging Modality Requirements
Dual Energy
Tomo-Synthesis
• 2-D Projection Radiography
o Cost (on-glass electronics, digital lithography & fab-less design)
o Robustness & weight (robust plastic/metal substrates)
5
6
7
3
• Advanced Applications (Dual energy and 3D modalities)
8
2
1
1
2
8
7
3
6
5
16
Key Vectors for Radiographic Detector Development
Cone-beam CT
4
( D. A. Jaffray and J. H. Siewerdsen, Princess Margaret Hospital , University of Toronto )
4
Detector
o Improved sensitivity (SNR) at low exposure (“smart” pixels)
o Improved spatial resolution (improved x-ray converters)
o High frame-rate readout (on-glass electronics)
Flexible Substrate
Active Pixel Design
On-glass Shift Register
Number of
images
2
Number of
images
~20 -100
Number of
images
100’s
Total dose
1X
Total dose
1X-5X
Total dose
1X - 10X+
Dose per image
50%
Dose per image
10%
Dose per image
1%–5%
Frame rate
~5 fps
Frame rate
~5-30fps
Frame rate
~30 fps
17
1 mm
(Courtesy Dr. T.Jackson PennState)18
Outline
DR X-ray Detection
Indirect Systems
• Market and clinical challenges for digital radiography
Powdered Phosphor
Structured Phosphor
• Passive pixel amorphous silicon imaging arrays
Direct System
X-ray
X-ray
X-ray
• Active pixel amorphous silicon imaging arrays
+- -+ +
-+ +
α-Se
Photoconductor
• Active pixel LTPS imaging arrays
• Silicon-on-glass circuits for future active pixel imaging
arrays
19
Photosensors for Indirect Radiographic Detectors
Signal and Noise vs. Exposure
α-Si:H PIN Photodiodes
Projection Radiography: Chest
1.E+08
Signal
ignal (elec) & Noise (rms
s elec)
ele
20
Al bias line
nitride
ITO
30 nm P+ α-Si
Signal
(electrons)
1.E+07
1.E+06
500 nm i α-Si
1.E+05
-+
50 nm N+ α-Si
Mo electrode
Quantum Noise
1.E+04
Electronic Noise
1.E+03
Heart
0.12 mR
Typ. Entrance
Exposure
7.2 mR
Lungs
0.29 mR
Advantages
• High quantum efficiency
• Low dark current
• Operated steady-state (no transient)
Disadvantages
• P+ not widely available – requires
special process capability
Maximum
Exposure
30 mR
1.E+02
0.001
0.01
0.1
1
10
100
Quantum Efficiency
• 85% quantum efficiency in green
• QE drops in blue due to absorption in P+
• QE in red decreases due to band edge
Exposure (mR)
21
Photodiode characteristics
22
Amorphous silicon TFT characteristics
10 µm to 1 mm photodiode dimensions
109 on-off ratio
• Critical for radiographic imaging
due to wide exposure range in
radiograpic images
• Low on-resistance required for
rapid charge transfer from diode
• Leakage current < 1 fA at VDS =
3V required for low smear and
low charge loss
However,
• Low leakage TFT’s are not a
standard process at display
fabrication lines
23
• Requires special TFT
development and process
24
α-Si:H PIN Photodiode in DR Array
Cross-section of Vertically Integrated DR Array
Spectral Quantum Efficiency
Primary Array Spectral Quantum Efficiency
0.8
M5 : Bias electrode
0.7
2nd passi : SiNx
125 nm
M4 : Top electrode (IZO)
395 nm
p-i-n
130 nm
M3 : Mushroom electrode (MoW)
487 nm
1st passivation
158 nm
M2 : Data electrode (MoW)
388 nm
Gate insulator : SiNx
145 nm
M1 : Gate electrode (MoW)
0.6
Quantum Efficiency
316 nm
130 nm
0.5
0.4
0.3
Active :
a-Si:H
0.2
0.1
Glass
0
350
07/10/2008
Carestream Health Restricted Information
25
25
Dark Current Density vs. Bias and Temperature
Average Array Dark Current
vs. Bias and Temperature
Number of Occurrences
Num
nces
2
40 C
28 C
2
10
1
10
0
-1
-2
-3
600
650
700
Carestream Health Restricted Information
26
26
• High M2 dataline resistance
• High M1-M2 overlap capacitance
(500 nm nitride)
Total Noise
4
3
Dark Current (pA/cm )
Da
500
550
Wavelength (nm)
Dataline Thermal Noise Dominates
Dark Current Histogram at 40 C
10
0
450
Noise in α-Si:H Passive-Pixel Array
α-Si:H Imaging Array
10
07/10/2008
400
-4
-5
Photodiode Bias (Volts)
8
x 10
6
Data Line Thermal
-2.5 V bias
40C
PD Shot
Dataline thermal
noise at 9,000 el
dominates
~ C*R1/2
4
TFT Shot
2
TFT Transient
0
0
25
50
75
100
• Dataline is in Metal 2, gateline in
metal 1 with 500 nm inter-layer
dielectric
• Dataline thermal noise ~ C*R1/2
is the largest contributor with
9,000 electrons noise
125
2
Dark Current (pA/cm )
Reset
0
2000
4000
6000
8000
27
Experimental a-Si Passive Pixel
28
Experimental a-Si Passive Pixel
Reduced dataline thermal noise
Dataline in lowresistance Metal
10000
e-rms
3X Noise Reduction in Passive a-Si Arrays
3X overall noise reduction
0.6 µm PIN diode
Total Noise
4X DL noise reduction
Dielectric
Data Line Thermal
2 µm BCB
between TFT &
photosensor
PD Shot
New Design
2 um BCB
New Design
500 nm Si02
TFT Shot
Baseline
TFT
• 2 µm thick BCB layer or thick nitride dielectric between TFT plane and photosensor
plane
• Planarization of topography
• Reduced overlap capacitance
Reset
0
2000
4000
6000
8000
10000
e - r ms
• ~40% Reduction in CDL
• ~90% Reduction in RDL
• Dataline in metal 5
• 4X reduction in data line thermal noise
• 500 nm Al for low resistance
• 2,000 nm BCB + 400 nm nitride dielectric for reduced overlap capacitance
29
30
Operation of 3T a–Si:H Active Pixel Sensor
Outline
1.Integration Mode
• Market and clinical challenges for digital radiography
• Photogenerated carriers are
stored by the internal
capacitance of the sensor (CPIX).
• Passive pixel amorphous silicon imaging arrays
• Active pixel amorphous silicon imaging arrays
2.Readout Mode
• Active pixel LTPS imaging arrays
• Gain current via AMP TFT is
passed through READ TFT to
external charge amplifier.
• Silicon-on-glass circuits for future active pixel imaging
arrays
3.Reset Mode
• Signal charge stored in CPIX is
released with the onset of the
RESET TFT.
31
Advanced α-Si:H arrays
June 18, 2009
32 32
© Carestream Health Inc. — Confidential
α-Si:H Shift Register for Active-Pixel Array
3T Active-Pixel Design with 139µm Pixel
120 µm pitch α-Si:H Shift Register
30
1st output
2nd output
Input
3rd output
Output Voltage (V)
Outp
25
• Advantages
o Noise Reduction:
o Speed Increase:
Dataline thermal noise reduced by charge gain of pixel amplifier (>5 X)
Reduction in dataline setting time due to active amplifier
4th output
20
15
10
5
0
• Disadvantages
o Yield:
o Linearity:
o Stability:
13th output
-5
0.0
9 X increase in transistor area and ~ 3 additional bias and clock lines
Smaller linear range of output vs. exposure
TFT threshold voltage shift with aging – TFT is amplifier, not a switch
0.5
1.0
1.5
2.0
Time (ms)
33
Noise in Active-Pixel α-Si:H Arrays
34
Limitations of a-Si APS
3-Transistor Active-Pixel Architecture
More complex process – lower yield
1T PPS
3T APS
APS backplane requires larger area due to:
• Dataline thermal noise reduced 5 X by charge gain of pixel amplifier
• External amplifier noise reduced 5 X by charge gain of pixel amplifier
• Largest remaining noise source is reset noise of the photodiode
• Threshold voltage instability in amplifier TFT a serious issue
• Still requires external read-out IC with charge integrating analog front-end
•
High current from active pixel requires large capacitance on AFE – large die area
35
• Higher transistor count
• Increased number of routing lines
• Larger amplifier TFT for higher gain
APS backplane has higher transistor density
• Lower yield
APS backplane uses a-Si TFT as analog circuit
element, not as a switch
Sensitive to parameter variation and
shift Health Inc. — Confidential
June •
18, 2009
© Carestream
Requires vertical
integration using high
mask-count process
Requires high
yield, stable
backplane process
36 36
Limitations of a-Si APS
Impact of TFT Leakage
Limitations of a-Si APS
Stability of APS
Charge gain is a function of gm, which is in
turn influenced by the threshold voltage of
AMP TFT (VTH,AMP).
• Prolonged DC gate bias to AMP causes
VTH,AMP to shift, resulting in degredation
of the TFT transconductance
• Pixel gain self compensation helps
mitigate the stress
– voltage drop across READ TFT
provides a feedback loop for
degradation in IAMP due to VT,AMP
– VTH,AMP
IDS,AMP !
VDS,READ !
IDS,AMP (compensates
VDS,AMP
the current drop)
June 18, 2009
© Carestream Health Inc. — Confidential
37 37
K. Karim et al., Mat. Res. Soc. Symp. Proc., vol. 715, p. A4.2.4, 2002.
June 18, 2009
– as a result, the pixel transconductance
(GM) degradation is dampened
38 38
© Carestream Health Inc. — Confidential
LTPS Imaging Array with Peripheral Circuits
Outline
PMOS 3T Active-Pixel with PMOS Peripheral Circuits
• Market and clinical challenges for digital radiography
• Passive pixel amorphous silicon imaging arrays
• Active pixel amorphous silicon imaging arrays
• Active pixel LTPS imaging arrays
• Silicon-on-glass circuits for future active pixel imaging
arrays
39
LTPS Flat-Panel Imager with Peripheral Circuits
40
Pixel of LTPS Imaging Array with α-Si:H PIN Photodiode
45-micron Pixel with 3-micron Design Rules
PMOS Shift Register
α-Si:H PIN Photodiode
Thick dielectric isolation
LTPS TFT Backplane
41
42
Key Challenges for LTPS Imaging Arrays
Sources of Leakage in LTPS Transistors
Reset TFT Leakage Current Siphons Off Photo-charge
TFT Channel Leakage
At Grain Boundaries
Gate Oxide Leakage at
Grain Boundaries
Photocurrent
TFT Leakage
Current
IDS(VDS, T)
VDS
Net
Charge
43
Key Challenges for LTPS Imaging Arrays
• Generation current at grain
boundaries results in TFT leakage
• Gate-to-drain field enhances leakage
current, resulting in exponential
increase in leakage with gate
voltage, even band-band tunneling
• Variable from TFT to TFT
• Surface topography at grain boundary
edges causes gate oxide leakage
• Variable from TFT to TFT
44
Pattern Noise due to non-uniformity
61K electrons pattern noise; matches Monte Carlo simulation of ∆VT pattern noise
Threshold Voltage Variability
Pixel Amplifier TFT
Uncorrected Image
Corrected Image
Noise sources in Exposed Frame:
! Row-to-row
! FPN due to "VT in V-SR + noise
! Column-to-column
! FPN due to "VT in V-SR + noise
! Col-mirror
VT variation
FPN
! Pixel-to-pixel FPN
! Pixel-to-pixel PRNU
! Pixel + readout electronic noise + kTC +
shot + photon shot noise
Electronic noise
486 rms electron noise
Pattern + electronic noise:
69,000 rms electron noise
Current Mirror Column
Amplifier TFT
45
Noise in LTPS Imaging Arrays
350 rms electrons after gain and offset correction
• Without offset and gain
correction, fixed pattern noise
caused by TFT threshold and
mobility variation is dominant (>
60,000 rms electrons)
• After offset and gain correction,
fixed pattern noise is reduced
below temporal noise
• Temporal noise is dominated by
kTC noise of the a-Si PIN
photodiode
Simulated pattern noise due to "VT
using Monte Carlo method:
~ 61,340 rms electron noise
Simulated electronic noise based on
measured imager gain
~ 441 rms electron noise
46
Outline
• Market and clinical challenges for digital radiography
• Passive pixel amorphous silicon imaging arrays
• Active pixel amorphous silicon imaging arrays
• Active pixel LTPS imaging arrays
• Silicon-on-glass circuits for future active pixel imaging
arrays
• Total noise is 300 rms electrons :
10 X lower than comparable aSi:H passive-pixel imaging arrays
for DR
• However, any small temperature
or operating voltage shift between
the dark reference frames and the
image can result in significant
fixed pattern noise in the
difference image
47
48
Silicon-on-Glass: Bonding Process
Comparison of Active-Pixel Backplane Technologies
Voltage
Si Substrate
Si-H
Electron Mobility
SiOG
SiOG
p-Si
(ELA)
Si + H2
p-Si
(MICC)
Si Substrate
LTPS Electron mobility: 50-200 cm2 / V·s
Uniformity: poor (random grains)
p-Si
(SPC)
H
Anodic Bonding Step
Oxide
c-Si
Ion Implantation
Heat
a-Si
Clean and Pre-Bond to Glass
Separate Si Substrate
TFT performance
Uniformity
Mature
Thin and Clean
glass
Early
Stage
SiOG
SiOG Electron mobility: ~500 cm2 / V·s
Uniformity: excellent (single crystal)
49
Silicon-on-Glass has Built-In Benefits
50
Fabrication Procedure of SiOG Backplane
SiOG
Single Crystal Silicon
Ion-Free Barrier Layer
Ion Accumulation Zone
SiOG island patterning
Glass substrate
Gate
SiO2
Corning EAGLE XG™ Glass Substrate
Deposition of Gate metal / SiO2
Glass substrate
SiO2 layer
B+
B+
Gate
SiO2
Gate pattern and ion doping
• High mobility, sharp sub-threshold slope and low leakage
• NMOS: > 450 cm2 / (V·s)
• PMOS: > 200 cm2 / (V·s)
• Uniformity: Excellent (single crystal) for uniform transistor performance
• Built-in barrier layer protects backplane during processing with an ultrastrong bond
Glass substrate
Source
After Passivation layer (SiNX /SiO2)
Contact Hole
S/D Formation
51
Characteristics of SiOG and LTPS Transistors
52
NMOS
SiOG
NMOS
ELA
SiOG
0.9 V
0.92 V
VT
-2.2 V
-0.7 V
VT
S
0.53 V/dec
0.15 V/dec
S
58.7 cm2/Vs
186.4 cm2/Vs
EFF
Glass substrate
LTPS and SiOG
PMOS
ELA
Drain
Comparison of PMOS TFT’s
PMOS and NMOS
PMOS
Gate
SiO2
EFF
0.42 V/dec
0.27 V/dec
162.4 cm2/Vs
264.1 cm2/Vs
53
54
Comparison of PMOS TFT’s
TFT Characteristics Comparison – Double gate TFT W/L = 4/5+5
Used for row-select and for reset transistor in active pixel arrays
LTPS and SiOG
SiOG 50nm active
LTPS ELA
55
TFT Leakage: Dopuble-gate LTPS and SiOG transistors
SiOG reset transistor has 100X lower leakage than LTPS
56
Comparison of NMOS TFT’s
LTPS and SiOG
VGS ~ 5V
SiOG TFT
has 2 orders of
magnitude lower leakage
SiOG TFTs
ELA poly-Si TFTs
µfe
(cm2/Vs)
Vth (V)
S
(mV/dec.)
Ioff (A)
µfe (cm2/Vs)
Vth (V)
S
(mV/dec.)
Ioff (A)
Average
205
-0.84
130
3.4 x
10-14
64
-2.27
400
1.2 x
10-13
Standard
deviation
3.86
0.06
5.6
–
4.38
0.19
80
–
LTPS
L = 5µm+5µm
W = 4 µm
SiOG
57
Comparison of SiOG and LTPS Circuits
58
Comparison of SiOG and LTPS Circuits
4-Phase PMOS Shift Registers
Ring Oscillators
f osc "
Load = 15µm/4µm
Drive = 150µm/4µm
Silicon-on-Glass: 5 ns delay
10
6
0.0
t PHL t PLH "
0.5
ELA Polysilicon: 29.6 ns delay
9
VOUT (V)
VOUT (V)
< VDD = 10 V >
fosc = 8.62 MHz
V HIGH = 8.56 V
V LOW = 7.38 V
8
7
1
" 5.04ns
23 ! 8.62 # 106 Hz
1.0
Time ( s)
1.5
T1
T2
< VDD = 10 V >
fosc = 1.47 MHz
V HIGH = 8.61 V
V LOW = 6.83 V
T3
T7
T6
T8
4 / 4 um
4 / 4 +4 um
VDD
8
<VDD = 9.9 V>
10
16 / 4 um
T5
Output
(n)
4 / 4 um
T4
12
4 / 4 um
P
4 / 4 +4 um
VDD
Next
Input
4/ 4 +4 um
4 / 4+4 um
0.09 pF
10
9
1
N ! (t PHL t PLH )
Output Voltage (V)
23 stage ring oscillator
Start (n-1) CLK 1 CLK 3
8
Because of parallel
connected RLOAD
6
4
2
0
2.0
6
0.0
0.5
-2
0.0
1
" 29.6ns
23 !1.47 #106 Hz
1.0
1.5
CLK3
CLK1
SiOG
9.55 V
9.8 V
VLOW
0.25 V
0.3 V
tRISE
11 s
2.8 us
tFALL
6 us
1.4 us
Input signal
SiOG shift register
ELA poly-Si shift register
7
t PHL t PLH "
ELA
VHIGH
0.1
0.2
0.3
0.4
0.5
0.6
Time (ms)
2.0
Time ( s)
The propagation delay of SiOG inverter is ~ 5 X shorter than of ELA poly-Si inverter.
59
The response time of SiOG shift register is ~ 4 X faster than ELA poly-Si shift register.
60
Summary
Directions for Radiographic Detector Development
• 2-D Projection Radiography
• Robustness, weight
Arrays on metal foil or plastic
• Cost
Fabless model
Thank You!
• Advanced Applications (Dual energy and Volumetric Imaging)
• Improved sensitivity
Improved passive pixel designs
Active-pixel α-Si:H
Active-pixel LTPS or SiOG
• Improved resolution
Structured phosphors or direct detection
Active-pixel LTPS or SiOG
• High frame rate
Active-pixel α-Si:H
Active-pixel LTPS or SiOG
61
References
References (cont)
Amorphous Silicon PIN Photodiodes
Radiographic Systems:
• M. Watanabe et. al., Proc. SPIE, 4320, 103 (2001)
• John A. Rowlands and John Yorkston, “Flat Panel Detectors for Digital
Radiography”, in Handbook of Medical Imaging, J. Beutel, H. Kundel and R.
VanMetter (editors), Published by SPIE Press, 2000, ISBN 0819436216,
9780819436214
• Y. Vygranenko, P. Louro, M. Vieira, J. H. Chang, A. Nathan, Low leakage current a-Si:H/aSiC:H n-i-p photodiode with Cr/a-SiNx front contact, J. Non Cryst. Solids, vol. 352, pp. 18371840, 2006.
• Y. Vygranenko, R. Kerr, K. Kim, J. H. Chang, D. Striakhilev, A. Nathan, G. Heiler, T.
Tredwell, Segmented Amorphous Silicon n-i-p Photodiodes on Stainless-Steel Foils for
Flexible Imaging Arrays, MRS Symp. Proc. Vol. 989, 2007
Direct Detection
• W. Zhao and J. A. Rowlands, “X-ray imaging using amorphous selenium: Feasibility
of a flat panel self-scanned detector for digital radiology,” Med. Phys., vol. 22, no.
10, pp. 1595-1604, 1995.
• K. Kim, Y.Vygranenko, M. Bedzyk, J. H. Chang, T. Chuang, D. Striakhilev, A. Nathan, G.
Heiler, T. Tredwell, High Performance Hydrogenated Amorphous Silicon n-i-p Photo-diodes
on Glass and Plastic Substrates by Low-Temperature Fabrication Process, MRS Symp.
Proc. Vol. 989, 2007
• R. A. Street et. al. High Resolution Direct Detection X-Ray Image Sensors, Proc.
SPIE, 2000: Real Time Radiography
• J. H. Chang, T. Chuang, Y. Vygranenko, D. Striakhilev, K. Kim, A. Nathan, G. Heiler, T.
Tredwell, Temperature Dependence of Leakage Current in Segmented a-Si:H n-i-p
Photodiodes, MRS Symp. Proc. Vol. 989, 2007
63
References (cont)
• J. H. Chang, T. Tredwell, G. Heiler, Y. Vygranenko, D. Striakhilev, K. H. Kim, A. Nathan,
Physically Based Compact Model for Segmented a-Si:H n-i-p Photodiodes, MRS Symp.
Proc. Vol. 1066, 2008
64
References (cont)
Amorphous Silicon PIN Photodiodes (cont)
Passive pixel amorphous silicon image sensors
• K. H. Kim, Y. Vygranenko, D. Striakhilev, M. Bedzyk, J. H. Chang, A. Nathan, T. C. Chuang,
G. Heiler, T. Tredwell, Performance of a-Si:H n-i-p photodiodes on plastic substrate, J. Non
Cryst. Solids, vol. 354, pp. 19-25, 2008.
• R. A. Street et. al. High Resolution Direct Detection X-Ray Image Sensors, Proc. SPIE, 2000:
Real Time Radiography
• Y. Vygranenko, E. Fathi, A. Sazonov, M. Vieira, G. Heiler, T. Tredwell, Optimization of p-type
Nanocrystalline Silicon Thin Films for Solar Cells and Photodiodes, MRS Symp. Proc. Vol.
10153, 2009
• Larry E. Antonuk, John M. Boudry, Youcef El-Mohri, Weidong Huang, Jeffrey H. Siewerdsen,
and John Yorkston, Large-area flat-panel amorphous silicon imagers, Proc. SPIE, Vol. 2432,
216 (1995);
• R. A. Street, X. D. Wu, R. Weisfield, S. Ready, R. Apte, M. Nguyen, and P. Nylen, “Two
dimensional amorphous silicon image sensor arrays,” in MRS Symp. Proc., vol. 377, 1995, pp.
757-766.
Amorphous silicon MIS Photosensors
• C. Mochizuki, Patent US 6682960B1, Jan 27, 2004
• N. Safavian, Y. Vygranenko, J. H. Chang, K. Kim, J. Lai, D. Striakhilev, A. Nathan, G. Heiler,
T. Tredwell, M. Fernandes , Modeling and Characterization of the Hydrogenated Amorphous
Silicon Metal Insulator Semiconductor Photosensors for Digital Radiography, MRS Symp.
Proc. Vol. 989, 2007
• M. Fernandes, Y. Vygranenko, M. Vieira, G. Heiler, T. Tredwell, A. Nathan, Transient Current
in a-Si:H-based MIS Photosensors, MRS Symp. Proc. Vol. 1066, 2008
• Weisfield, R.L. , “Amorphous silicon TFT X-ray image sensors”, Technical Digest, International
Electron Devices Meeting, 1998, Page(s):21 - 24
• R. Weisfield et. al., “Performance Analysis of a 127-micron pixel large-area TFT/Photodiode
Array with Boosted Fill Factor”, Phys of Med Imaging, Proc SPIE, 2004
• K. S. Karim, P. Servati, N. Mohan, A. Nathan, and J. A. Rowlands, “VHDL-AMS modeling and
simulation of a passive pixel sensor in a-Si:H technology for medical imaging,” in Proc. IEEE Int.
Symp. Circuits and Systems 2001 Sydney, Australia, vol. 5, May 6\–9, 2001, pp. 479-482.
Continuous Photosensors
• M.D. Wright, Patent Application Publication US 2006/0001120 A1, Jan 5, 2006
65
66
References (cont)
References (cont)
Passive pixel amorphous silicon image sensors (cont)
Passive pixel amorphous silicon image sensors (cont)
• R. B. Apte, R. A. Street, S. E. Ready, D. A. Jared, A. M. Moore, R. L. Weisfield, T. A.
Rodericks, and T. A. Granberg, “Large area, low-noise amorphous silicon imaging
system,” Proc. SPIE, vol. 3301, pp. 2-8, 1998.
• Y. Vygranenko, J. H. Chang, A. Nathan, “Two-dimensional a-Si:H/a-SiC:H n-i-p sensor
array with ITO/a-Si:Nx antireflection coating”, MRS Symp. Proc. vol. 862, 2005.
• Y. Vygranenko, J. H. Chang, A. Nathan, “Two-dimensional a-Si:H n-i-p photodiode array
for low-level light detection”, IEEE J. Quantum Electron., vol. 41, pp. 697-703, 2005.
• M. Maolinbay, Y. El-Mohri, L. E. Antonuk, K.-W. Jee, S. Nassif, X. Rong, and Q. Zhao,
“Additive noise properties of active matrix flat-panel imagers,” Med. Phys., vol. 27, no.
8, pp. 1841-1854, Aug. 2000.
• J. Lai, Y. Vygranenko, G. Heiler, N. Safavian, D. Striakhilev, A. Nathan, T. Tredwell,
Noise Performance of High Fill Factor Pixel Architectures for Robust Large-Area Image
Sensors using Amorphous Silicon Technology, MRS Symp. Proc. Vol. 989, 2007
• R. Jayakumar, K. S. Karim, S. Sivoththaman, and A. Nathan, “Integration issues for
polymeric dielectrics in large area electronics,” in Proc. 23rd Int. Conf. Microelectronics
(MIEL 2002), May 2002, pp. 543-546.
• Y. Vygranenko, A. Sazonov, D. Striakhilev, J. H. Chang, G. Heiler, J. Lai, T. Tredwell, A.
Nathan, High Fill Factor a-Si:H Sensor Arrays with Reduced Pixel Crosstalk, MRS Symp.
Proc. Vol. 1066, 2008
• J. H. Chang, Y. Vygranenko, A. Nathan, “Two-dimensional a-Si:H based n-i-p sensor
array”, J. Vac. Sci. Technol. A Vac. Surf. Films, vol. 22, pp. 971-974, 2004.
• J. H. Chang, Y. Vygranenko, and A. Nathan, “Two-dimensional sensor array for lowlevel light detection” Proc. SPIE, vol. 5578, pp. 420-427, 2004.
67
References (cont)
68
References (cont)
Active Pixel Amorphous Silicon Image Sensors
Active Pixel Amorphous Silicon Image Sensors
• K. S. Karim and A. Nathan, “Readout circuit in active pixel sensors in amorphous silicon
technology,” IEEE Electron Device Lett., vol. 22, pp. 469-471, Oct. 2001
• K. S. Karim and A. Nathan, “Readout circuit in active pixel sensors in amorphous silicon
technology,” IEEE Electron Device Lett., vol. 22, pp. 469-471, Oct. 2001
• H. Tian, B. Fowler, and A. El Gamal, “Analysis of temporal noise in CMOS photodiode active
pixel sensor,” IEEE J. Solid-State Circuits, vol. 36, pp. 92-101, Jan. 2001.
• Z. Huang and T. Ando, “A novel amplified image sensor with a-Si:H photoconductor and
MOS transistors,” IEEE Trans. Electron Devices, vol. 37, pp. 1432-1438, June 1990.
• H. Tian, B. Fowler, and A. El Gamal, “Analysis of temporal noise in CMOS photodiode active
pixel sensor,” IEEE J. Solid-State Circuits, vol. 36, pp. 92-101, Jan. 2001.
• Z. Huang and T. Ando, “A novel amplified image sensor with a-Si:H photoconductor and
MOS transistors,” IEEE Trans. Electron Devices, vol. 37, pp. 1432-1438, June 1990.
• K. S. Karim, A. Nathan, and J. A. Rowlands, “Active pixel sensor architectures in a-Si:H for
medical imaging,” J. Vac. Sci. Technol. A, vol. 20, no. 3, pp. 1095-1099, May 2002.
• K. S. Karim, A. Nathan, and J. A. Rowlands, “Active pixel sensor architectures in a-Si:H for
medical imaging,” J. Vac. Sci. Technol. A, vol. 20, no. 3, pp. 1095-1099, May 2002.
• K. S. Karim, A. Nathan, J. A. Rowlands, “Amorphous silicon active pixel sensor readout
circuit architectures for medical imaging”, MRS Symp. Proc., vol 715, pp. 661-666, 2002.
• K. S. Karim, A. Nathan, and J. A. Rowlands, “Feasibility of current mediated amorphous
silicon active pixel sensor readout circuits for large area diagnostic medical imaging,” in Proc.
Opto-Canada: SPIE Regional Meeting on Optoelectronics, Photonics and Imaging, vol.
TD01, May 2002, pp. 358-360.
• G. Chaji, A. Nathan, Q.A. Pankhurst, “Merged phototransistor pixel with enhanced near infrared response and flicker noise reduction for bio-molecular imaging,” Appl. Phys. Lett., vol. 93
(2008) 203504-1-3
• K. S. Karim, A. Nathan, J. A. Rowlands, “Amorphous silicon active pixel sensor readout
circuit architectures for medical imaging”, MRS Symp. Proc., vol 715, pp. 661-666, 2002.
• K. S. Karim, A. Nathan, and J. A. Rowlands, “Feasibility of current mediated amorphous
silicon active pixel sensor readout circuits for large area diagnostic medical imaging,” in Proc.
Opto-Canada: SPIE Regional Meeting on Optoelectronics, Photonics and Imaging, vol.
TD01, May 2002, pp. 358-360.
69
References (cont)
70
References (cont)
Active Pixel Amorphous Silicon Image Sensors
Silicon-on-Glass
• K. S. Karim, A. Nathan, J. A. Rowlands, Amorphous silicon active pixel sensor readout circuit for digital
imaging, IEEE Trans. Electron Devices, vol. 50, pp. 200-208, 2003.
K. P. Gadkaree, K. Soni, S.-C. Cheng, and C. A. Kosik Williams, “Single Crystal Silicon Films on
Glass,” J. Mater. Res., 22, pp. 2363-2367, 2007.
• C. Huang, T. Teng, J. Tsai, and H. Cheng, “The instability mechanisms of hydrogenated amorphous silicon
thin film transistors under AC Bias stress,” Jpn. J. Appl. Phys., vol. 39(1), no. 7A, pp. 3867-3871, 2000.
• N. Mohan, K. S. Karim, and A. Nathan, “Stability issues in digital circuits in amorphous silicon technology,”
in Proc. IEEE Canadian Conf. Electrical and Computer Engineering 2001 Toronto, ON, Canada, vol. 1, May
13\–16, 2001, pp. 583-588.
• X-Ray Detection Using a Two-Transistor Active Pixel Sensor Array Coupled to an a-Se X-Ray
Photoconductor, Taghibakhsh, F.; Karim, K.S.; Belev, G.; Kasap, S.O.. Sensors Journal, IEEE
• Ya-Hsiang Tai,Shih-Che Huang, Ko-Ching Su and Chen-Yeh Tseng, Variation and mismatch effects of the
low-temperature poly-Si TFTs on the circuit for the X-ray active matrix sensor, Solid State Electronics, 2008
• F. Taghibakhsh, K. S. Karim, Two-transistor active pixel sensor readout circuits in amorphous silicon
technology for high-resolution digital imaging applications, IEEE Trans. Electron Devices, vol. 55, pp. 21212128, 2008.
J. B. Choi, Y. J. Chang, S. H. Shim, C. W. Kim, and S. E. Ahn, “AMOLED based on Silicon-onGlass (SiOG) Thin-film Transistors,” SID 07 Technical Digest, pp. 1378-1381, 2007.
C. Kosik Williams, et al, “Demonstration of High Performance TFTs on Silicon-on-Glass (SiOG)
Substrate” SID 07 Technical Digest, 38, pp 287-289, 2007.
D. F. Dawson-Elli, C. A. Kosik Williams, J. G. Couillard, J. S. Cites, R. G. Manley, G. L. Fenger,
and K. D. Hirschman “Development of High Performance TFTs on Silicon-on-Glass (SiOG)
Substrate,” ECS Transactions, 8, pp. 223-228, 2007.
R. G. Manley, G. L. Fenger, P. M. Meller, K. D. Hirschman C. A. Kosik Williams, D. F. DawsonElli, J. G. Couillard, and J. S. Cites, “Development of integrated electronics on silicon-on-glass
(SiOG) substrate,” ECS Transactions, 16, pp. 371-380, 2008.
C. Kosik Williams, J. G. Couillard, C. Wang, J. S. Cites, J. H. Cheon, S. H. Park, J. W. Choi, and
J. Jang, “Plasma Processing in the Fabrication of Silicon-on-Glass (SiOG) Thin-film
Transistors,” IDW 08 Proceedings, pp. 1595-1598, 2008.
• L.E. Antonuk, Y. El-Mohri, M. Koniczek, Q. Zhao, “Active Pixel and Photon Counting Imagers Based on
Poly-Si TFTs”, Proceedings, 2009 SPIE Symposium on Medical Imaging
71
72
References (cont)
References (cont)
Silicon-on-Glass (cont)
• J. H. Hyuk, S. H. Park, M. H. Kang, J. Jang, S. E. Ahn, J. S. Cites, C. A. Kosik Williams
and C. Wang, “Ultrathin Si Thin-film Transistor on Glass,” IEEE Elect. Dev. Lett, 30, pp.
145-147, 2009.
Silicon-on-Glass (cont)
• J. W. Choi, J. I. Kim, S. H. Park, J. H. Cheon, S. Saxena, W. K. L, J. Jang, J. Lai, J. H.
Chang, G. Heiler, T. J. Tredwell, E. J. Mozdy, S. E. Ahn, C. A. Kosik Williams, J. S. Cites,
and C. Wang, “Low Voltage TFT Circuits Based on SiOG”, 2009 International Thin-Film
Transistor Conference, Digest of Technical Papers.
• S. H. Jung, H. S. Shin, J. H. Lee, and M. K. Han, SID ’05 Digest, 300 (2005)
• Y. M. Ha, SID ’00 Digest, 1116 (2000)
• R G. Manley, G. Fenger, K. D. Hirschman, J. G. Couillard C. Kosik Williams, D. DawsonElli, and J. Cites, SID’08 Digest, pp. 287 (2008)
• T. Sameshima and S. Usui, “XeCl EXCIMER LASER ANNEALING USED TO FABRICATE
POLY-SI TFTS”, Mater. Res. Soc. Symp. Proc. 71, 453 (1986)
• F. Plais, O. Huet, P. Legagneux, D. Pribat, A. J. Auberton-Herve, and T. Barge, “Single
crystalline silicon thin film transistors fabricated on corning 7059”, Proc. IEEE Int. SOI
Conf. 170 (1995).
• Robert S. Sposili and James S. lm, Appl. Phys. Lett. 69, 2864 (1996)
• J. Sullivan, H. R. Kirk, A. J. Lamm, S. Kang, P. I. Ong, and F. J. Henley, SID ’06 Digest,
280 (2006).
• J. G. Couillard, K. P. Gadkaree, and J. F. Mach, US Patent 7176528B2
• M. Okabe, AMLCD’96, pp. 5 (1996)
• X. Shi, K. Henttinen, T. Suni, I. Suni, S. S. Lau, and M. Wong, “Characterization of lowtemperature processed single-crystalline silicon thin-film transistor on glass”, IEEE
Electron Device Lett. 24, 574, (2003).
73
74

Similar documents