4. Field efect transistors - VGTU Elektronikos fakultetas

4. Field efect transistors - VGTU Elektronikos fakultetas

ELEKTRONIKOS ĮTAISAI
1
2009
Field Effect Transistors
A field-effect transistor (FET) is a three-terminal device in which current flows
through a narrow conducting channel between two electrodes called source and
drain. The current is modulated by the electric field caused by voltage applied at
the third electrode called gate. Current flow along the channel is almost entirely
due to the motion of majority carriers. So, the FET is a unipolar device and
there are two types of FETs: n-channel devices and p-channel devices.
Lauko tranzistoriuose (angl. FET – field effect transistor) srovę kuria specialiai sudaryto
kanalo pagrindiniai krūvininkai. Kadangi srovę lemia vieno ženklo krūvininkai, šie
tranzistoriai dar vadinami vienpoliais tranzistoriais. Kanalo laidumą ir juo tekančią srovę
valdo statmenas srovės krypčiai elektrinis laukas.
Lauko tranzistoriaus n arba p kanalo (angl. – channel) gale sudaromi du elektrodai.
Elektrodas, per kurį į kanalą patenka pagrindiniai krūvininkai, vadinamas ištaka (source).
Elektrodas, per kurį pagrindiniai krūvininkai išteka, vadinamas santaka (drain). Kanale
tekančią srovę valdo trečiojo tranzistoriaus elektrodo – užtūros (gate) – įtampa.
Pagal užtūros tipą lauko tranzistoriai skirstomi į lauko tranzistorius su valdančiosiomis pn
sandūromis (sandūrinius lauko tranzistorius) ir lauko tranzistorius su izoliuotąja užtūra.
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
2
2009
http://www.electro.patent-invent.com/electricity/inventions/fet.html#History
History
In 1926 Julius Edgar Lilienfeld applied for three patents. The first two, from 1926
and 1928, describe what we now call a field-effect transistor (FET) structure. The
first patent (J.E. Lilienfeld, Method and apparatus for controlling electric currents,
US Patent 1,745,175, application filed October 8, 1926, granted January 18,
1930) gives a MESFET or metal/semiconductor FET. The second patent (J.E.
Lilienfeld, Device for controlling electric current, US Patent 1,900,018 application
filed March 28, 1928, patented March 7, 1933) is derived from the first, and gives
a depletion mode MOSFET.
In 1960 Bell scientist John Atalla developed a new design (MOSFET) based on
William Shockley's original field-effect theories.
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
3
2009
Types of FETs
The FET is simpler in concept than the bipolar transistor and can be constructed from a
wide range of materials. The channel region of any FET is either doped to produce an Ntype semiconductor, giving an "N-channel" device, or with a P-type to give a "P-channel"
device. The doping determines the polarity of gate operation. The different types of fieldeffect transistors can be distinguished by the method of insulation between channel and
gate:
The MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) utilizes an insulator
(typically SiO2).
The JFET (Junction Field-Effect Transistor) uses a p-n junction as the gate.
The MESFET (Metal-Semiconductor Field-Effect Transistor) substitutes the p-n-junction
of the JFET with a Schottky barrier; used in GaAs and other III-V semiconductor
materials.
Using bandgap engineering in a ternary semiconductor like AlGaAs gives a HEMT (High
Electron Mobility Transistor), also called an HFET (heterostructure FET). The fully
depleted wide-band-gap material forms the isolation.
The MODFET (Modulation-Doped Field Effect Transistor) uses a quantum well structure
formed by graded doping of the active region.
Among the more unusual body materials are amorphous silicon, polycrystalline silicon or
other amorphous semiconductors in thin-film transistors or organic field effect transistors
that are based on organic semiconductors and often apply organic gate insulators and
electrodes.
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
4
2009
Types of FETs
The FET is simpler in concept than the bipolar transistor and can be constructed from a
wide range of materials. The different types of field-effect transistors can be distinguished
by the method of isolation between channel and gate:
The MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) utilizes an isolator
(typically SiO2).
Power MOSFETs become less conductive with increasing temperature and can
therefore be thought of as n-channel devices by default. Silicon devices that use
electrons, rather than holes, as the majority carriers are slightly faster and can carry
more current than their P-type counterparts. The same is true in GaAs devices.
The JFET (Junction Field-Effect Transistor) uses a p-n junction as the gate.
The MESFET (Metal-Semiconductor Field-Effect Transistor) substitutes the p-n-junction of
the JFET with a Schottky barrier; used in GaAs and other III-V semiconductor materials.
Using bandgap engineering in a ternary semiconductor like AlGaAs gives a HEMT (High
Electron Mobility Transistor), also named an HFET (heterostructure FET). The fully
depleted wide-band-gap material forms the isolation.
TFTs (thin-film transistor) use amorphous silicon, polycrystalline silicon or other amorphous
semiconductors as body material.
A subgroup of TFTs are organic field effect transistors that are based on organic
semiconductors and often apply organic gate insulators and electrodes.
The channel region of any FET is either doped to produce n-type semiconductor, giving an
"N-channel" device, or with p-type to give a "P-channel" device. The doping determines the
polarity of gate operation.
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
5
2009
(FETs)
Junction FETs (JFETs)
LT su valdančiosiomis
pn sandūromis –
sandūriniai LT
IG FETs, MISFETs,
MOSFETs
LT su izoliuotąja užtūra
– MDP LT, MOP LT
DE-MOSFETs
LT su įterptuoju kanalu
– nuskurdintosios-praturtintosios
veikos LT
E-MOSFETs
LT su indukuotuoju
kanalu - praturtintosios
veikos LT
GAAS FETs, MESFETs
Metalo-puslaidininkio
(MP) LT
HEMTs
Heterostruktūriniai LT –
didelio elektronų
judrumo LT
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
6
2009
Field Effect Transistors
• Junction field effect transistors
• MOSFETs
• Parameters and equivalent circuits of FETs
• Frequency properties and parameters
Objectives:
Knowledge of field-effect transistors (FET):
• their structures and classification
• principles of operation
• static characteristics
• parameters and equivalent circuits
• frequency properties and parameters
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
7
2009
Structure and operation of JFETs
If reverse bias voltage is applied to the gates, the
space-charge layers extend into the channel.
Thus, application of a reverse voltage to the gates
governs the effective channel dimensions.
The depletion-layer thickness occurs in the n-type
channel region and the gate voltage effectively
controls the channel thickness if the p-type
gates are much more heavily doped than the
n-channel.
b = bn − 2d n
VGTU EF ESK
b = bn − 2
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2ε (U GS + U b )
qN d
ELEKTRONIKOS ĮTAISAI
8
2009
Structure and operation of JFETs
If we increase the gate-source
voltage, the channel thickness
decreases. At some voltage the
thickness of the channel becomes
0. This voltage is called the pinchoff voltage.
The gate voltage governs the
effective channel thickness, the
channel resistance and hence
controls the drain current. At the
pinch-off voltage the drain current
becomes 0. The pinch-off voltage
is negative for n-channel devices
and positive for p-channel JFETs.
b = bn − 2d n
VGTU EF ESK
b = bn − 2
2ε (U GS + U b )
qN d
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ELEKTRONIKOS ĮTAISAI
9
2009
Structure and operation of JFETs
The pinch-off voltage
UP
Drain current versus gate-source
voltage
VGTU EF ESK
bn2 qN d
=
−Ub
8ε

b = bn  1 −


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U GS + U b 
UP +Ub 

ELEKTRONIKOS ĮTAISAI
10
2009
Structure and operation of JFETs
The drain current is
dependent on the drain
voltage. It increases with
increase of the drain
voltage.
The thickness of the
conducting channel at the
drain end decreases if the
drain voltage increases.
At some drain voltage the
space-charge regions from
the gates meet. The channel
becomes pinched-off. At
drain voltages beyond
pinch-off, the drain current
becomes saturated and
remains almost at some
value.
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
11
2009
Structure and operation of JFETs
…Increase of the output voltage drops on the
depletion layer and causes electric field. The
field causes the drift of charge carriers to drain
region.
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
12
2009
Structure and operation of JFETs
1. JFETs are voltage-controlled devices.
2. JFETs have high input impedance.
3. There are four regions of JFET operation: the ohmic, saturation,
breakdown and cut-off regions.
4. The input current of a JFET is small. The drain current is dependent on
the input and output voltages. Therefore a JFET can be characterized by
one set of I-U characteristics. In practice two sets are used: the commonsource transfer curves (perdavimo charakteristikos) and the commonsource output curves - drain characteristics (išėjimo charakteristikos).
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
13
2009
Structure and operation of JFETs
In the pinch-off or saturation region the relationship between the output
current and input voltage is non-linear and is defined by Shockley’s
equation:

U GS

I D = I D max 1 −
 U GS0
VGTU EF ESK




2
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ELEKTRONIKOS ĮTAISAI
14
2009
Structures of JFETs
Structure of (a) n-channel JFET and (b) MESFET
If the drain current increases, the slope of the transfer characteristic also
increases and higher gain is possible.
However the gate-source voltage must be reverse to the gate junction. This
condition limits increasing of drain current and gain.
… pn junction can be changed by dielectric layer.
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
15
2009
MOSFETs
IG FETs, MISFETs,
MOSFETs
(LT su izoliuotąja užtūra
– MDP LT, MOP LT)
E-MOSFETs
DE-MOSFETs
(LT su įterptuoju kanalu
– nuskurdintosios-praturtintosios
veikos LT)
(LT su indukuotuoju
kanalu - praturtintosios
veikos LT)
HEMTs
(Heterostruktūriniai LT –
didelio elektronų
judrumo LT)
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
16
2009
DE-MOSFETs
DE-MOSFET – depletionenhancement MOSFET
 U 
I D = I DSs 1 − GS 
UP 

VGTU EF ESK
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2
ELEKTRONIKOS ĮTAISAI
17
2009
DE-MOSFETs (with induced channel)
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
18
2009
DE-MOSFETs (with induced channel)
I S = K (U GS − U GS0 ) 2
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
19
2009
I-U characteristics of FETs
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
20
2009
FETs: parameters, models and frequency properties
IG = 0
I D = f (U GS , U DS )
d ID =
∂I D
∂I D
1
d U GS +
d U DS = g m d U GS + d U DS
∂U GS
∂U DS
ro
I D = g m U GS +
gm = S =
ro =
1
U DS
ro
dI D
at U DS = const
dU GS
d U DS
at U GS = const
d ID
∆I D
gm =
= 2 A(U GS − U GS0 ) = 2 A I D
I D ≅ A(U GS − U GS0 ) ;
∆U GS
g m / I CQ ≅ q/kT ≅ 40 V -1 >> g m / I DQ = 2 /(U GS − U GS0 )
2
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
21
2009
FETs: parameters, models and frequency properties
g m / I KQ ≅ q / kT ≅ 40 V -1 >> g m / I SQ = 2 /(U UI − U UI 0 )
gm ~
µ
lk
Isolated gate bipolar transistor (IGBT)
The structure of a V-MOS
transistor
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
22
2009
IGBT
The IGBT combines the simple gate-drive characteristics of the MOSFETs with the highcurrent and low–saturation-voltage capability of bipolar transistors by combining an
isolated gate FET for the control input, and a bipolar power transistor as a switch, in a
single device.
The IGBT is a fairly recent invention. The first-generation devices of the 1980s and early
1990s were relatively slow in switching ...
Large IGBT modules typically consist of many devices in parallel and can have very high
current handling capabilities in the order of hundreds of amps with blocking voltages of
6,000 V. Toyota's second generation hybrid Prius has a 50 kW IGBT inverter controlling
two AC motor/generators connected to the DC battery pack.[
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
23
2009
FETS: frequency properties
The slope of the transfer characteristic decreases with frequency:
S sin x − jx
K ( jω) =
=
e
S0
x
x=
ωτ
2
τ = lch / v max
The unit-gain condition is reached when the input current becomes equal to
the output drain current when the output is short-circuited.
I G = jω(C GS + C GD )U GS
fT =
gm
1
=
2 π(CGS + CGD ) 2 πτ
VGTU EF ESK
I D = g m U GS
fT =
vmax
2πlch
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IG = ID
f max =
fT
2
gm
go
ELEKTRONIKOS ĮTAISAI
24
2009
The Π type model of a FET
∆I D
gm =
∆U GS
∆U DS
ro =
∆I D
U DS = const
U GS = const
CGD = C12
CGS = C11 − C12
C DS = C 22 − C12
gm
fT =
2 π(CGS + CGD )
80 nm,… 400 GHz
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
25
2009
Field Effect Transistors
1. The charge carriers in an n-type channel of JFET are (holes, electrons).
2. As the charge carriers in a JFET move from the source region to the
drain region they cross (no, 1, 2) junctions.
3. An n-channel JFET is in its CS configuration. Its maximal drain current is
20 mA and the pinch-off voltage is minus 10 V. What is its drain current
when the gate-source voltage is zero volts? What value of output voltage
is required to saturate the JFET if the gate-source voltage is minus 2 V?
4. An n-channel JFET is in its CS configuration. Its pinch-off voltage is
minus 6 V and maximal drain current is 12 mA. Sketch the transfer
characteristic of the FET.
5. Negative values of input voltage are required to (enhance, deplete) the
channel of the n-channel DE-MOSFET while positive values of the
voltage are required to (enhance, deplete) the channel.
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
26
2009
Field Effect Transistors
6. Sketch the Π-type equivalent circuits of field effect and bipolar
transistors and comment on them.
7. A JFET is used in its CS configuration. Its maximal drain current is 8 mA,
the pinch-off voltage is minus 4 V. Find the slope of the transfer
characteristic at input voltage of minus 1,5 V.
8. A JFET is used in its CS configuration. Its maximal drain current is 9 mA,
the pinch-off voltage is minus 3 V. Find the slope of the transfer
characteristic at drain current of 4 mA. Sketch the Π-type model. Find
parameters of circuit elements. The input capacitance is 2 pF, the
transfer capacitance is 1 pF, and the output capacitance is 1.5 pF. Find
the gain-frequency product.
9. Explain why MOSFETs are typically shipped with their leads shortened
together.
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
27
2009
After years of research and experimentation involving literally
hundreds of scientist from around the world, the final breakthrough
in the development of the transistor was left to three men. Dr Walter
Brattain, Dr John Bardeen and Dr William Shockley all three
scientists working at Bell laboratories, are the men credited with this
significant achievement. In December 1947 they made the historic
discovery of the transistor effect and in so doing developed the very
first transistor device. In 1956 their achievement was acknowledged
when they were awarded the Nobel Prize for physics.
VGTU EF ESK
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ELEKTRONIKOS ĮTAISAI
28
2009
___trailing the Transistor History.mht
VGTU EF ESK
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