1 - HMC Computer Science

OK Recursing?
OKer than before?
Jotto Corner
Submission Site vs. Sakai? Sakai can Recurse!
cs5 guess
alien: 1
party: 0
judge: 2
????? : ?
137 words left…
Faye / Garrett
my guess
diner: 2 diner: 0
savvy: 1 savvy: 1
ghost: 0 ghost: 2
plumb: ? plumb: ?
287 words left…
200 words left…
Hw#4: binary + Python
Hw#5: Circuit design
in Logisim
IST
Today!
A circuit for any function can be built from …
Minterm
Expansion
Principle
That's minterm,
NOT midterm
… just these three logic gates!
Creativity with Caesar...
def decipher( S ):
""" TESIJHYDW - je tusyfxuh
jxyi tesijhydw, zkij hkd
tusyfxuh ed yj.
"""
… code here …
Creativity with Caesar...
def decipher( S ):
""" DOCSTRING - to decipher
this docstring, just run
decipher on it.
"""
… code here …
my favorite not-fully-working decipher…
Creativity with Caesar...
def decipher( S ):
""" This works sometimes """
return encipher( S, 3 )
and this docstring
is 100% correct!
solved with whatever resources were available
~1987
Creativity withMacGyver,
Caesar...
def decipher( S ):
""" This works sometimes """
return encipher( S, 3 )
and this docstring
is 100% correct!
solved with whatever resources were available
MacGyver, back for 2016…
Thirty years ago, Angus MacGyver was the most
iconic engineer hero on TV. In 2015, we’re looking
for new engineering heroes.
The USC Viterbi School of Engineering and the
National Academy of Engineering are partnering
with Lee Zlotoff, creator of the MacGyver series
to identify and develop the first great TV show
featuring women engineers.
Five winners receive $5,000 each and be given
the rare opportunity to be paired with top
Hollywood mentors [to develop the show]. Please
submit your ideas to www.thenextmacgyver.com
We’re looking for ideas only at this stage. No
completed scripts necessary. All genres welcome.
We’re not looking to re-make MacGyver. We’re
looking for that next show in the spirit of
MacGyver, with a female protagonist who uses
engineering to solve problems.
Who can submit: Anyone worldwide over 18.
Screenwriters, engineers, students, non-students
and essentially anyone who has a good idea and
cares deeply about exciting young people to
STEM fields.
Submission deadline: April 17
This
week
def decipher( S ):
""" This works sometimes """
return encipher( S, 3 )
Designing physical devices
that work all the time!
In a computer, each bit is represented
as a voltage (1 is +5v and 0 is 0v)
42
Computation is simply the deliberate
combination of those voltages!
101010 (1) set input voltages
ADDER
circuit
110011
(2) perform computation
51
(3) read output
voltages
9
What's in that
green box?
001001
Richard Feynman: "Computation is just a
physics experiment that always works!"
Part 1: Represent your f'n as bits…
IN
OUT
x
y
c
circuit output
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
0
1
Any function can be represented using only bits…
…are simply f'ns of bits
All computations…
binary inputs A and B
output, A+B
A
B
sum
00
00
00
00
01
01
01
01
10
10
10
10
11
11
11
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
000
001
010
011
001
010
011
100
010
011
100
101
011
100
101
110
bitwise
addition
function
Part 2: Arrange logic gates to match…
input
x
0
0
1
1
output
y
0
1
0
1
AND(x,y)
0
0
0
1
AND outputs 1 only
if ALL inputs are 1
AND
input
x
y
0
0
1
1
0
1
0
1
output
OR(x,y)
0
1
1
1
OR outputs 1 if
ANY input is 1
OR
input
output
x NOT(x)
1
0
0
1
NOT reverses
its input
NOT
not just theoretical models!
Our building blocks: logic gates
AND outputs 1 only
if ALL inputs are 1
AND
OR outputs 1 if
ANY input is 1
OR
NOT reverses
its input
NOT
These circuits are physical functions of bits…
… and all mathematical functions can be built from them!
AND
drill sergeant
metaphor?
inputs
AND
Strict! Everything input must be
True to output a True
output
AND outputs 1 when ALL inputs are 1
otherwise it outputs 0
Strict! Everything input must be
True to output a True
AND
x
inputs
AND
y
input
AND's
function:
output
x
0
0
1
1
y
0
1
0
1
output
AND(x,y)
0
0
0
1
output
Strict! Everything input must be
True to output a True
AND
inputs
AND
output
How many different input
combinations yield an
output of 0 here?
AND outputs 1 when ALL inputs are 1
otherwise it outputs 0
Strict! Everything input must be
True to output a True
AND
inputs
x
y
z
w
AND
input
AND's
function:
x
0
0
y
0
0
z w
0 0
0 1
…12 more rows not shown…
1
1
1
1
1 0
1 1
output
output
output
AND(xyzw)
0
0
fifteen 0s
0
0
1
one 1
camp counselor
metaphor?
OR
inputs
easy-going: if anything is
OK, everything's OK
OR
output
OR outputs 1 when ANY input is 1
It outputs 0 only if all inputs are 0.
easy-going: if anything is
True, the output is True
OR
x
inputs
OR
y
input
OR's
function:
output
x
0
0
1
1
y
0
1
0
1
output
OR(x,y)
0
1
1
1
output
easy-going: if anything is
OK, everything's OK
OR
inputs
output
OR
How many different 4-input
combinations yield an
output of 1?
OR outputs 1 when ANY input is 1
It outputs 0 only if all inputs are 0.
easy-going: if anything is
OK, everything's OK
OR
inputs
x
y
z
w
OR
input
OR's
function:
x
0
0
y
0
0
z w
0 0
0 1
…12 more rows not shown…
1
1
1
1
1 0
1 1
output
output
output
OR(xyzw)
0
1
one 0
1
1
1
fifteen 1s
NOT
inputs
NOT's
function:
"NOT bubble"
(optional – or the only
thing needed!)
output
NOT
x
input
x
0
1
output
NOT(x)
1
0
one 1
one 0
Our building blocks: logic gates
input
x
0
0
1
1
output
y
0
1
0
1
AND(x,y)
0
0
0
1
AND outputs 1 only
if ALL inputs are 1
AND
input
x
y
0
0
1
1
0
1
0
1
output
OR(x,y)
0
1
1
1
OR outputs 1 if
ANY input is 1
OR
input
output
x NOT(x)
1
0
0
1
NOT reverses
its input
NOT
Claim !?
We need only these three building
blocks to compute anything at all
AND
AND outputs 1 iff ALL
its inputs are 1
OR
OR outputs 1 iff ANY
input is 1
NOT
NOT reverses its input
I need
proof!
A circuit…
What inputs make this circuit output 1?
Logisim
What inputs make this circuit output 0?
A circuit…
c
What are ALL of its outputs?
Logisim
Rails
What are the
differences
between these
two circuits?
using rails for not x, not y, + not c
Any advantages
of this "rails"
approach?
disadvantages?
Quiz
Fill in the function values for
this circuit (the truth table)
Name(s) ___________________________________
Each input x, y, and z can independently be 0 or 1, for eight possible inputs:
circuit
output
inputs
A
B
C
x
y
z
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
D
Each output
is 0 or 1
(1) This circuit uses 8 logic gates – how many of each? AND ___
OR ___
(2) Follow the inputs of x=1, y=1, z=1 and see why the overall output is 1 ...
NOT ___
(already labeled)
(3) For each possible input, write the circuit output in the truth table above.
(4) Could this circuit use fewer logic gates?
If so, how?!
If not, how do you know?!
Quiz
Fill in the function values for
this circuit (the truth table)
Try this on the back page first…
Each input x, y, and z can independently be 0 or 1, for eight possible inputs:
circuit
output
inputs
A
B
C
x
y
z
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
D
Each output
is 0 or 1
(1) This circuit uses 8 logic gates – how many of each? AND ___
OR ___
(2) Follow the inputs of x=1, y=1, z=1 and see why the overall output is 1 ...
NOT ___
(already labeled)
(3) For each possible input, write the circuit output in the truth table above.
(4) Could this circuit use fewer logic gates?
If so, how?!
If not, how do you know?!
Real! logic gates...
Hex NOT gate
Real? logic gates
"It's not real unless
it can be done in
Minecraft."
- perhaps not a
real quote
1:31
https://www.youtube.com/watch?v=P7E4K5D834g "Minecraft Logi Gates"
https://www.youtube.com/watch?v=r7N3K8ulEEM "Minecraft Logic Gates Water"
:41
The claim…
AND
AND outputs 1 only if
ALL its inputs are 1
OR
OR outputs 1 if
ANY input is 1
NOT
NOT reverses its input
We need only these three building blocks
to compute anything at all
I need
proof!
The proof… !
AND
AND outputs 1 only if
ALL its inputs are 1
OR
OR outputs 1 if
ANY input is 1
NOT
NOT reverses its input
We need only these three building blocks
to compute anything at all
I need
proof!
A constructive proof… !
i
Specify a truth table defining
any function you want
input
x
0
0
1
1
y
0
1
0
1
ii
output
f(x,y)
0
1
1
0
iii
For each input row whose
output needs to be 1, build
an AND circuit that outputs 1
only for that specific input!
OR them all together
Hey!
This is
a 3-i'ed
proof!
A constructive proof…
i
Specify a truth table defining
any function you want
input
x
0
0
1
1
x
y
0
1
0
1
ii
output
f(x,y)
0
1
1
0
iii
For each input row whose
output needs to be 1, build
an AND circuit that outputs 1
only for that specific input!
OR them all together
y
The ZERO rows ALREADY work –
with no connections at all !
x
We ensure this OR
outputs zero by
default.
y
0
OR
A constructive proof…
i
Specify a truth table defining
any function you want
input
x
0
0
1
1
x
y
0
1
0
1
ii
output
f(x,y)
0
1
1
0
iii
For each input row whose
output needs to be 1, build
an AND circuit that outputs 1
only for that specific input!
OR them all together
y
NOT
AND
OR
Does this wire turn on for the red input row?
x
y
Does this wire turn on for any other input rows?
A constructive proof…
i
Specify a truth table defining
any function you want
input
x
0
0
1
1
x
y
0
1
0
1
ii
output
f(x,y)
0
1
1
0
iii
For each input row whose
output needs to be 1, build
an AND circuit that outputs 1
only for that specific input!
OR them all together
y
NOT
AND
OR
AND
x
y
NOT
blue row?
other rows?
A constructive proof…
i
Specify a truth table defining
any function you want
input
x
0
0
1
1
x
y
0
1
0
1
ii
output
f(x,y)
0
1
1
0
iii
For each input row whose
output needs to be 1, build
an AND circuit that outputs 1
only for that specific input!
OR them all together
y
NOT
AND
OR
AND
x
y
NOT
blue row?
other rows?
A constructive proof…
i
Specify a truth table defining
any function you want
input
x
0
0
1
1
x
y
0
1
0
1
ii
output
f(x,y)
0
1
1
0
iii
For each input row whose
output needs to be 1, build
an AND circuit that outputs 1
only for that specific input!
OR them all together
y
NOT
AND
OR
AND
x
y
NOT
blue row?
other rows?
Minterm?
A minterm is an AND gate
connected to all input bits either directly or inverted
Each minterm selects one input:
What 3-bit input makes
this AND gate output a 1?
a minterm is an AND gate
that "selects" a single input
input
A
B
C
D
output
x
y
c
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
(1) Fill in the function
values (the truth table)
for this circuit…
Hint: Determine the input
that turns each AND gate –
each minterm -- to True
c
input
(Extra #1) Could you
replace the OR gate with
ANDs and NOTs – so ORs
aren't needed at all?!
(Extra #2) How could
these two circuits can
implement any binary
addition at all !?
Take 2…
(2) Draw the upstream
wires that will implement
this function as a circuit.
output
x
y
c
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
A
0
0
0
1
0
1
1
1
B
C
D
input
output
x
y
OR(x,y)
0
0
1
1
0
1
0
1
0
1
1
1
OR else ?!
Can you get rid of ORs by using
only NOTs and ANDs?
x
x OR y
y
OR
Lab5: adders!
x y cin
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
3 individual
bits of input
A full adder sums three
input bits to create a
2-bit binary output
cout
sum
0
0
0
1
0
1
1
1
0
1
1
0
1
0
0
1
2 bits of output:
a binary #
the full adder
x y cin
FA
these columns
look familiar!
sum
cout
Lab5: adders!
Use this in lab
this week!
sum
A full adder sums three
input bits to create a
2-bit binary output
the full adder
x y cin
FA
connect these directly…
sum
cout
carryout
2 bits of output:
a two-bit binary #
3 individual
bits of input
Compose!
+
0
1
Any binary addition at all?
1
1
1
0
1
1
8 bits in
5 bits out
Do you see how to use
our Full Adders here?
Compose!
+
0
1
4-bit Ripple-Carry Adder
1
1
1
0
1
1
8 bits in
5 bits out
We've used four full
adders here… .
an "official" adder…
A zombie-themed
ripple-carry adder
It looks pretty
wiry to me!
relative scale…
Many
adders!
These aren't Easter Eggs,
they're adder eggs!
chugging right along…
Ridin' the Rails !
What to do with all that extra silicon?
What to do with all that extra silicon?
The "silicon zoo": micro.magnet.fsu.edu/creatures/index.html
Homestate pride…
Marriage proposals?
and secret? messages…
Jotto Corner
Python
Hmmm
computer
main memory
registers
1-bit memory: flip-flops
arithmetic
bitwise functions
A
B
S
T
R
A
C
T
I
O
N
cs5 guess
alien: 1
party: 0
judge: 2
throw : 1
?????: ?
66 words left…
Faye / Garrett
my guess
diner: 2 diner: 0
savvy: 1 savvy: 1
ghost: 0 ghost: 2
plumb: 1 plumb: 1
aloha: ? aloha: ?
156 words left…
99 words left…
logic gates
switches (transistors)
What could be roiling
around under here?
Hw 5: be fruitful! multiply,
divide, and remember
CS 5
IST338
CS
Aaron B.
Python!
Hmmm
computer
main memory
registers
1-bit memory: flip-flops
arithmetic
A
B
S
T
R
A
C
T
I
O
N
taking
Logisim's
"canvas"
literally
…
bitwise functions
logic gates
switches (transistors)
Things seem to get messy around here…
An example of a
happy RCA solution...
Composing circuits ~ hw5
4-bit "Ripple-Carry" Adder
4-bit Multiplier
3x2-bit Divider
extra credit
12 nGbits of memory (RAM)
Composing circuits
4-bit Ripple-Carry Adder
+
0
1
1
1
1
0
1
1
8 bits in
5 bits out
Composing circuits
4-bit Ripple-Carry Adder
+
1
0
1
1
1
1
0
1
1
8 input bits
0
1
0
0
5 output bits
Now let's make lots of them!!
hw5pr2: A 4-bit multiplier
1
1
0
1
Multiplicand
0
1
1
0
Multiplier
0
0
0
0
4 partial products
1
1
0
1
1
1
0
1
0
Final answer…
x
+
0
0
0
0
0
1
0
0
1
1
1
(Q1) How could THREE 4-bit ripple-carry adders help here?
(Q2) What bit would be correct for the starred spot
?
(Q3) What circuits could you use to create the four "partial products" ??
hw5pr2: A 4-bit multiplier
1
1
0
1
Multiplicand
0
1
1
0
Multiplier
0
0
0
0
4 partial products
1
1
0
1
1
1
0
1
0
Final answer…
x
+
0
0
0
0
0
1
0
0
1
1
1
(A3) Remember that the AND gate is single-bit multiplication.
(A2) Use a 4x1-bit helper circuit to find the four partial products…
(A1) You need three (3) ripple-carry adders to finish: see above…
Logisim layout…
one factor horizontal…
4-bit multiplier
the 4-bit ripplecarry adder
the output
use labels!
one factor
vertical…
6 x 7…
what else?
The "canvas"
These are
circuit-based
compositions!
Division?
hw5pr3
Division!
hw5pr3
DIVISOR
DIVIDEND
QUOTIENT
Only a human would
build a circuit like
this!
Error bit
Minterm Division
(0) All computation can be expressed as bits...
(1) Any function of bits can be made a truth table
(2) Consider the output, one bit at a time...
(3) The circuit will output 0 by default!
(4) Use an AND gate to select each input for
which the output should be 1. (a minterm)
To implement the red 1, how many
inputs will its minterm AND need?
How many negated?
What division is this?
(5) OR the outputs from step (4) together.
(6) optimize your circuit later -- or never
INPUTS
OUTPUT
Y2 Y1 Y0 X1 X0
Z2 Z1 Z0 E
anything
0 0
anything
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
Circuit Optimization?
using a "genetic algorithm"
7 gates
16 gates
Perhaps artistically
optimized!
Optimization for what?!
Time-optimized circuits: Carry lookahead adders
The following circuit is called a carry lookahead adder.
By adding more hardware, we reduced the number of levels in the circuit and sped things up.
We can "cascade" carry lookahead adders, just like ripple carry adders.
We'd have to do carry lookahead between the adders too.
How much faster is this?
For a 4-bit adder, not much. There are 4 gates in the longest path of a carry lookahead
adder, versus 9 gates for a ripple carry adder.
But if we do the cascading properly, a 16-bit carry lookahead adder could have only 8 gates
in the longest path, as opposed to 33 for a ripple carry adder.
Newer CPUs these days use 64-bit adders. That's 12 vs. 129 gates or 10x speedup!
The delay of a carry lookahead adder grows logarithmically with the size of the adder, while a
ripple carry adder's delay grows linearly.
The thing to remember about this is the trade-off between complexity and performance. Ripple
carry adders are simpler, but slower. Carry lookahead adders are faster but more complex.
A 4-bit carry-lookahead adder circuit
xor
xor
xor
Sum bits
xor
xor
xor
xor
xor
carry-in
“carry-out”,
not “c-zero”
Carry bits
What's inside gates?
What's the other half
of computation?
Gates without Si? Sí!
water!
legos!!
Reading this week:
molecular computing
with robots...
Electromechanical "gates" (relays)
metal
plate
Spring
External
Power (6v)
Electromagnet
Signal Input, A
Signal
Output
Q
Which gate is this?
External
Power (6v)
Signal
Output
Q
Input, A
AND
Input, B
NAND
OR
NOR
XOR
The Mark 1
an early, relay-based computer
http://www-03.ibm.com/ibm/history/exhibits/markI/markI_reference.html
Grace Hopper + Howard Aiken, Harvard ~ 1944
5 tons
530 miles of wiring
765,299 distinct parts!
ran at 0.00001 MHz
Addition: 0.6 seconds
Multiplication: 5.7 seconds
Division: 15.3 seconds
Today's gates?
Silicon-based switches (transisors)
a single etched transistor labeled with
base (b), emitter (e), and collector (c)
Transistors
Radio Shack transistors
Transistors are
current switches:
voltage here
A low voltage here
allows current here
otherwise it's blocked
allows current here
A high voltage here
allows current here
otherwise it's blocked
30 nm
SET transistor
single-electron tunneling
Building a NOT gate
Transistors are
current switches:
input
NOT
output
A low voltage here
Building a NOT gate from transistors…
allows current here
otherwise it's blocked
A high voltage here
+5 v
POWER
OUTPUT
INPUT
(1 or 0)
(0 or 1)
SIGNAL
allows current here
otherwise it's blocked
Ground
NOT gate
Transistors are
current switches:
A low voltage here
allows current here
otherwise it's blocked
A high voltage here
+5
+5 vv
POWER
OUTPUT
INPUT
(1 or 0)
(0 or 1)
SIGNAL
allows current here
otherwise it's blocked
Ground
Quiz
Name(s) __________________________________________
Power, 1 or +5v
X
X
0
0
1
1
Y
0
1
0
1
Z
Truth Table
INPUTS
Y
OUTPUT
Z
each is 0 or 1
independently
X
Y
Ground, 0 or 0v
Extra! How could you
The above circuit is one of these gates – which one?
alter this transistor-level
design to create an AND?
NAND
"not and"
OR
NOR
"not or"
XOR
"exclusive or"
Transistors as disruptive technology
point contact transistor
1947: Bell Labs
seeking amplifiers for phone lines
team of physicists: Walter Brattain,
William Shockley, and John Bardeen
1948: junction transistor
much more robust design
1956: Shockley Semiconductor Co.
the start of Silicon Valley…
1957: Fairchild Semiconductor Co.
the "traitorous eight" - ICs
Half a computer: the CPU
transistors
gates
arithmetic
6 x 7… !
Make no mistake… computers
process numbers - not symbols.
We can only automate what
we can arithmetize.
- Alan Perlis
True! But this still misses 99% of
what computers do! What?
What's inside gates?
What's the other half
of computation?
For systems, a face-lift is to add
an edge that creates a cycle, not
just an additional node.
- also Alan Perlis
NOR's Truth Table
inputs
S
R
NOR
Q
output
NOR
S R Q
0
0
1
1
0
1
0
1
1
0
0
0
Take a look at this circuit.
input S
NOR
Q
R
feedback cycle
(Question #1)
If S is 1, what will Q be?
(Question #2)
What happens if S becomes 0?
• Is this circuit stable or oscillating now?
Memory Circuits
with S == 0, R == 0, and the storage bit Q == 0
• What will happen if input S is set to 1?
"Set"
0
S
NOR
0
1
"Reset"
0
NOR
R
1
0
Q
1 bit of
storage
SR latch
Keep this page, in
case you'd like to try
the extra credit… .
Memory!
• Is this circuit stable or oscillating now?
with S == 0, R == 0, and the storage bit Q == 0
• What will happen if input S is set to 1?
• What will happen if input S is then set back to 0?
"Set"
0
S
NOR
0
1
• What will happen if input R is then set to 1?
1
• What will happen if input R is then set back to 0?
"Reset"
Note: "S" stands for "Set" and R for "Reset"
Take a look at the diagram at
right. The D (data) line holds
a single bit we want to store
(either a 0 or a 1).
How does the strobe direct
storing the data into Q?
Hint: What happens when the "strobe" is 1?
0
R
NOR
0
Q
1 bit of
storage
The flip-flop
D data
inputs
AND
"strobe"
0
NOR
0
1
AND
a flip-flop diagram
D
Q
strobe
1
1 bit of memory!
NOR
0
0
Q
1 bit of
storage
The flip-flop
D data
inputs
AND
"strobe"
0
NOR
0
1
AND
a flip-flop diagram
D
Q
strobe
1
1 bit of memory!
NOR
0
0
Q
1 bit of
storage
Random Access Memory
Extra this week: Design 12nGbits of RAM
Inputs
Outputs
3 data input bits
write enable line
read enable line
2 data address bits
Simplified
Prototype for
Accessing
Memory
12 bits of RAM
3 bits stored at location 00
3 bits stored at location 01
3 bits stored at location 10
3 bits stored at location 11
3 data output bits
3 data input bits
Ex Cr
STORE
0. Make data input bits 101
the value 5 into
mem. loc. #1
1. Give 01 to the decoder (the 1 goes on)
2. Make the "Write Enable" high
3. How do the * AND gates make
sure that the value does go into
memory location #1?
4. How do the * AND
gates make sure that the
value does NOT go into
memory location #0?
D
memory
location
0
Q
D
strobe
strobe
D
Q
D
strobe
A0
D
0
Q
strobe
*
Binary
Address
Decoder
1
Q
Q
D
strobe
1
Q
strobe
*
A1
data address,
in binary
2
3
write enable line
OR
read enable line
OR
OR
two other memory lines and their flip-flops are not drawn
3 data output bits
3 data input bits
0. Suppose 101 is in Location #1
LOAD
1. Give 01 to the decoder (the 1 goes on)
take data from
mem. location #1
2. Make the "Read Enable" high
3. Which gates will ensure bits from
memory location #1 are read out?
4. Which gates will ensure bits from
memory location #0 are not read out?
5. Draw where the "Read Enable"
wire should go!
memory
location
D
Q
D
strobe
Q
D
strobe
0
Q
strobe
0
Binary
Address
Decoder
D
Q
D
strobe
Q
D
strobe
1
Q
strobe
1
A0
A1
data address,
in binary
2
3
write enable line
OR
read enable line
OR
OR
two other memory lines and their flip-flops are not drawn
3 data output bits
Animusic's Fiber Bundles
Bailey @ the Motley Th: 8-10 & lots of weekend grutoring hours… !
More Memory!
Registers
on the Central Processing Unit
Main Memory
(replaceable RAM)
Disk Drive
magnetic storage
8 flip-flops are an 8-bit register
D Q D Q D Q D Q D Q D Q D Q D Q
s
s
s
s
s
s
s
s
100 Registers of 8-64 bits each
~ 10,000 bits
memory from
logic gates
~ 10 billion bits +
~10 trillion bits (or more)
1 GB memory
1 TB drive
"Leaky Bucket"
capacitors
"640K ought to be enough for anybody"
remagnetizing
surfaces
- maybe Bill Gates!
More Memory!
Registers
on the Central Processing Unit
Main Memory
(replaceable RAM)
Disk Drive
magnetic storage
8 flip-flops are an 8-bit register
D Q D Q D Q D Q D Q D Q D Q D Q
s
s
s
s
s
s
s
s
100 Registers of 8-64 bits each
~ 10,000 bits
~ 10 billion bits +
~10 trillion bits (or more)
1 GB memory
1 TB drive
Price
~$100
~$100
~$100
Time
1 clock cycle
10-9 sec
100 cycles
10-7 sec
107 cycles
10-2 sec
1 min
1.5 hours
If a cycle ==
1 minute
More Memory!
Registers
on the Central Processing Unit
Main Memory
(replaceable RAM)
Disk Drive
magnetic storage
8 flip-flops are an 8-bit register
D Q D Q D Q D Q D Q D Q D Q D Q
s
s
s
s
s
s
s
s
100 Registers of 8-64 bits each
~ 10,000 bits
~ 10 billion bits +
~10 trillion bits (or more)
1 GB memory
1 TB drive
Price
~$100
~$100
~$100
Time
1 clock cycle
10-9 sec
100 cycles
10-7 sec
107 cycles
10-2 sec
1 min
1.5 hours
19 YEARS
If a cycle ==
1 minute