Laser Beam Testing and Analysis of Integrated Circuits

Transcription

Laser Beam Testing and Analysis of Integrated Circuits
Laser Beam Testing and Analysis of
Integrated Circuits
Vincent POUGET
IMS Lab - University of Bordeaux, CNRS, ENSEIRB, France
[email protected]
Laboratoire de l’Intégration, du Matériau au Système
CNRS UMR 5218
Bordeaux
Paris
FRANCE
Laser beam testing and analysis of integrated circuits
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IMS: Integration, from Materials to Systems
CNRS
National Institute for
Scientific Research
ENSEIRB
Engineering school in
Electronics & Computer science
University of Bordeaux 1
Sciences & Technologies
~300 people
120 researchers
120 PhD students
IMS Laboratory
Materials,
Sensors,
Microsystems
Signal,
Automatics,
Productics
Design,
Reliability
• RF circuits
• Ultra-fast mixed circuits
• Embedded digital systems
• Neuromorphic systems
• Technologies characterization & modelling
• Laser beam testing & analysis
• Failure modelling
• Reliability prediction
• Optoelectronic and hyper-freq. technologies
• Assembly and packaging
• Power devices and systems
Laser beam testing and analysis of integrated circuits
We are here
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IMS « Laser » team
• 4 Researchers
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Pascal FOUILLAT (Professor, ENSEIRB)
Dean LEWIS (Professor, University Bordeaux 1)
Vincent POUGET (Researcher, CNRS)
Frédéric DARRACQ (Assistant Prof., University Bordeaux 1)
• 12 PhD students
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Abdellatif Firiti
Kevin Sanchez
Gérald Haller
Alexandre Douin
Hélène Michel
Aziz Machouat
Julie Ferrigno
Patrice Jaulent
Alexandre Bocquillon
Alexia Gallo
Thomas Fernandez
Catherine Godlewski
Laser beam testing and analysis of integrated circuits
• Partners & Collaborations
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STMicroelectronics
ATMEL
CNES
CEA
EADS
Thales
Alcatel
TIMA Lab
Vanderbilt University
Arizona State University
NASA
NRL
…
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Outline
• Context
• Parameters of laser-semiconductor interaction
• Different applications of laser testing
− Failure analysis
− Radiation testing
− Fault injection
• Conclusions
Laser beam testing and analysis of integrated circuits
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Context
Technology scaling roadmap
Laser beam testing and analysis of integrated circuits
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Transistors / Chip roadmap
Laser beam testing and analysis of integrated circuits
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Context
• Evolution of
−
−
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Technologies
Number of IOs
Packaging
Domain of applications
• Need for new
− Testing methods
− Failure analysis techniques
Laser beam testing and analysis of integrated circuits
What can we do
with a laser ?
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Life cycle of an integrated circuit
Design
Production
Test
Application
Analysis
•
Failure
Laser & Production
−
−
−
Lithography, mask repair, micro-machining
Resistor trimming
Metrology
•
Laser & Test
−
−
Characterisation, design debug
Specification, validation
•
Laser & Analysis
−
−
−
Laser beam testing and analysis of integrated circuits
Package opening
Defect localisation and analysis
Metrology
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The LASER
•
LASER : Light Amplification by Stimulated Emission of Radiation
•
Laser = optical oscillator
−
−
Gain : amplifying medium favorable for stimulated emission
Feedback : optical cavity, like a Fabry-Perrot interferometer
•
•
1960 : first ruby laser
1992 : first commercial femtosecond laser
•
2 main properties the laser electromagnetic wave :
−
Temporal coherence
•
•
•
−
Gain
Phase accidents are rare
Monochromatic light
Possibility to concentrate energy in ultra-short pulses
Spatial coherence
•
•
•
Good wavefront quality
Directivity
Possibility to concentrate energy on dimensions of the order of the wavelength
Laser beam testing and analysis of integrated circuits
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Different kinds of lasers
•
Amplifying medium
−
−
−
•
Pumping method (i.e. energy source)
−
−
−
•
Gas (HeNe, CO2 …)
Liquid (Dye …)
Solid (Crystal, semiconductor…)
Optical (flash or laser)
Electrical
Chemical
Temporal regime
−
−
Continuous-wave (CW)
Pulsed
•
•
Q-switched
Mode-locking
Laser beam testing and analysis of integrated circuits
Main factors of choice of a laser source :
−
−
−
−
−
−
Wavelength
Power (CW) or Energy (pulses)
Temporal regime
Stability (power/energy noise)
Compacity
Cost
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Laser-semiconductor interaction
Laser – Integrated Circuit interaction
• Interaction mode defined by 4 parameters
λ
− Wavelength (photon energy)
• Photoelectrical and/or photothermal effect
− Temporal regime
• Continuous, modulated or pulsed interaction
− Power or Energy
• Weak or strong perturbation regime
• Possibility of non-linear interaction for high pulse energies
− Beam size
P
w
• Localised or uniform perturbation
Laser beam testing and analysis of integrated circuits
τ
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Beer-Lambert’s Law
• Governs the propagation of light in an absorbing medium:
« The relative variation of the flux is proportionnal to the thickness »
dΦ
= −α dz
Φ
Φ
Φ
Φ + dΦ
Φ0
Absorbing
medium
⇒ Φ ( z ) = Φ 0e−α z
z
dz
α : optical (linear) absorption coefficient
d = 1/α : penetration depth (attenuation by a factor 1/e)
Laser beam testing and analysis of integrated circuits
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Different optical absorption mechanisms
Interband
absorption
αIB
Free carriers
absorption
EC
=ω
=ω ≥ Eg
=ω
T
EC
αFC
EV
Photoelectric effect in
semiconductors
EV
Photothermal effect in
metal and semiconductors
2-photons
absorption
=ω
β
=ω ≥
Eg
2
Laser beam testing and analysis of integrated circuits
EC
=ω
EV
Non-linear
absorption
of ultrashort
pulses
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Optical absorption in silicon
•
•
•
Absorption at indirect bandgap
assisted by a phonon
Egi=1.12eV
Absorption coefficient depends on
−
−
−
−
λ
1064 nm
800 nm
Wavelength
Doping type and concentration
Temperature
Electrical field
Laser beam testing and analysis of integrated circuits
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Optical absorption in silicon
• Total absorption
Physical
effect
α = αIB + αFC
Photoelectric
Photothermal
Current source
Resistance variation
λ
Electrical
modelling
Laser beam testing and analysis of integrated circuits
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Optical absorption in silicon vs wavelength
•
Absorption coefficient in lightly P-doped silicon (<1017) at room temperature
10000
10000
λ
1000
1000
100
100
10
10
1
0,70
Penetration
depth (µm)
Profondeur
de pénétration
(µm)
Absorption
coefficient(cm
(cm-1)-1)
Coeff. d'absorption
coefficient
Absorptiond'absorption
coefficient
Penetrationde
depth
profondeur
pénétration
1
0,75
0,80
0,85
0,90
0,95
1,00
1,05
Wavelength
(µm)
Longueur
d'onde
(µm)
Laser beam testing and analysis of integrated circuits
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Optical absorption in silicon vs wavelength
λ
Distribution of optical intensity I(r,z)
514nm
800nm
Laser beam testing and analysis of integrated circuits
1µm
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Photocurrent in a PN junction
Laser
(Si type P)
LDn
E
Space charge
LDp
(Si type N)
Photons
absorption
Electron-hole pairs
generation
- Charge collection
by drift & diffusion
- Recombinaison
Laser beam testing and analysis of integrated circuits
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Photoelectric effect on a MOS transistor
•
Laser
Device simulation of a laser strike on the drain of
an Off-NMOS
−
Perturbation of potential lines of the drain-bulk junction
Bulk
Laser beam testing and analysis of integrated circuits
Source
Gate
Drain
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Laser pulse duration: 1ps
Energy: 2.5pJ
B
τ
Laser pulse focused on the drain of the off-NMOS in an SRAM cell
S
G
Laser
Bit-flip
D
3,5
IDrain
IGate
ISource
IBulk
Laser Beam
3,0
Voltage (V)
2,5
2,0
1,5
1,0
VDrain
VGate
0,5
0,0
t=3.5ps
Laser beam testing and analysis of integrated circuits
-0,5
1E-12
1E-11
1E-10
Time (s)
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0,0035
0,0030
0,0025
0,0020
0,0015
0,0010
0,0005
0,0000
-0,0005
-0,0010
-0,0015
-0,0020
-0,0025
1E-9
23
Current (A)
•
Laser pulse duration: 1ns
Energy : 10pJ
B
τ
Laser pulse focused on the drain of the off-NMOS in an SRAM cell
S
G
Laser
D
3,5
0,00020
3,0
IDrain
IGate
ISource
IBulk
Laser Beam
Voltage (V)
2,5
2,0
1,5
Laser beam testing and analysis of integrated circuits
0,00010
0,00005
0,00000
1,0
VDrain
VGate
500,0m
t=3ns
0,00015
-0,00005
-0,00010
0,0
-0,00015
-500,0m
-0,00020
1E-9
1E-8
Time (s)
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1E-7
24
Current (A)
•
Influence of pulse duration on threshold energy
τ
Different durations = different kinds of fault = different models
1E-5
1E-6
Energy
Device simulation
Linear model
1E-7
Power
10
Device simulation
Linear model
P
1
1E-8
0,1
1E-9
Power (W)
Energy (J)
•
1E-10
0,01
1E-11
1E-12
1E-13 1E-12 1E-11 1E-10 1E-9
1E-8
1E-7
1E-6
1E-5
1E-3
1E-4
Pulse Duration (s)
Eγ ⎡ qS
2 iLτ ⎤
Eth (τ ) =
+
eT ⎢⎣1 − e−α dS 1 − e−α d L ⎥⎦
Transistor level models…
Laser beam testing and analysis of integrated circuits
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Laser spot size vs Technology scaling
Transistor
Inverter
130nm
SRAM
w
Modeling 1µm spot
Transistor level
OK
90nm
65nm
Laser beam testing and analysis of integrated circuits
Gate or
function level
required
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Electrical modeling of a laser pulse
w
• D-Latch model vs spot size
3
3
3
Clk
Q
1
D
2
Clk
D
3
3
Q
3
2
1
3
3
• Increased modeling complexity
−
−
−
−
Number of current sources to consider
Amplitude distribution vs spot position
Charge sharing effects
Latchup sensitivity
Laser beam testing and analysis of integrated circuits
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Different approaches for laser testing
IC testing and analysis with a laser beam
LASER
reflection
absorption
vic
e
D
• Amplitude
• Phase
• Polarisation
• ...
te s
r
e
nd
u
e
t
transmission
Electrical
parameters
• Voltage
• Current
• Charge
DUT
DUT
TECHNIQUE
STIMULUS
ANALYSE
Electrical
Electrical
Electrical testing (IDDQ, …)
Electrical
Optical
Probe (Reflectometry, …)
Optical
Electrical
Pump (OBIC, fault injection…)
Optical
Optical
Pump-probe (ps ultrasonics, …)
Laser beam testing and analysis of integrated circuits
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IC testing and analysis with a laser beam
•
Advantages
−
−
−
−
•
Contact-less
Non-destructive
Spatial resolution ≈ λ
Temporal resolution ≈ ps
Constraint
−
Optical access
Laser beam testing and analysis of integrated circuits
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Packaging & optical access
Laser beam testing and analysis of integrated circuits
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Front side / Backside approach
Microscope
objective
Active
volume
Microscope
objective
Active
volume
2w0
2w0
substrate
Front side
Laser beam testing and analysis of integrated circuits
nSi≈3.5
Backside
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Experimental set-up
ATLAS Laser Facility at IMS
Laser beam testing and analysis of integrated circuits
ƒ
NIR-tunable picosecond laser
source
ƒ
Amplified femtosecond
parametric laser source
ƒ
Computer controlled
tunability :
400 - 2500 nm
ƒ
Energy : up to 1 mJ
ƒ
Picosecond synchronization
of laser pulse with test vector
ƒ
3 laser-injected microscopes
ƒ
Backside testing
ƒ
Microprobing station with
backside laser scanning
microscope
ƒ
New laser techniques for
failure analysis
ƒ
Dedicated test chips
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SPA Source
• Picosecond pulses
• Wavelength range suitable for frontside
or backside testing
Nd:YVO4 Pump
Pulse
Picker
Ti:Sapphire Oscillator
A
B
C
D
E
Wavelength
Pulse duration
A
780 - 1000nm
1ps
B
780 - 920nm
200fs
C
780 - 1000nm
1ps
D
780 - 920nm
80fs
E
532nm
Laser beam testing and analysis of integrated circuits
Pulse energy
Repetition rate
1nJ
Single shot - 4MHz
10nJ
80MHz
10W cw
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SPA & TPA Source
Amplified
Ti:Sapphire
Nd:YVO4
Q-switched Pump
F
Compressor
Femtosecond pulses
A
Two-photon absorption
Automated wavelength tuning
around Si bandgap
Laser beam testing and analysis of integrated circuits
B
C
Wavelength
Pulse duration
800nm
100fs
C
1600 - 2630nm
130fs
10µJ
D
1150 - 1600nm
100fs
50µJ
E
800 - 1200nm
F
600 - 800nm
130fs
1µJ
G
400 - 600nm
A
B
•
Harmonic
Generation
E
Stretcher
•
Optical
Parametric
Amplifier
Regenerative
Amplifier
Seed
oscillator
•
G
D
Pulse energy
Repetition rate
5nJ
80MHz
1mJ
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Single shot - 1kHz
36
« Pump » optical bench
Femtosecond Ti:sapphire
Regenerative Amplifier
Optical
Parametric
Amplifier
Harmonic
Generation
Picosecond
Ti:sapphire
Oscillator
Nd:YVO4 Pump
10W
Power
meter
Function generators
Pattern generator
Pulse energy
control
Pulse Picker
Mechanical
shutter
r
Electro-optic
modulator
i
inputs
Spectrometer
Autocorrelator
Delay generator
Power supplies
IR
LED
Infrared
microscope
GPIB, RS232, Ethernet, USB, LPT
Oscilloscope
Lock-in amplifier
outputs
IR
Vidicon
100x
Multimeter
DUT
4 axis controller
XYZ
CCD
100x
Test
board
SEEM
DAQ board
White
Light
Visible
microscope
Sync
Video board
Laser beam testing and analysis of integrated circuits
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SEEM software
•
SEEM : Single-Event Effects Mapper
•
C and C++ software developped for controlling the different pulsed laser experiments
at the ATLAS laser facility
•
14 scanning modes implemented
•
Basic interface for communicating with an external tester
•
SEEM controls :
−
Laser wavelength and pulse energy
−
DUT electrical environment
−
DUT positioning
−
Laser pulse triggering
−
Data acquisition
−
Data visualization
•
Up to 1000 acquisitions / second
•
Real-time data analysis tools
•
SEEM Reader : Light version for data exploitation, available for users of the ATLAS
laser facility
Laser beam testing and analysis of integrated circuits
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ATLAS Remote testing capabilities
GPIB, RS232, Ethernet, USB, LPT
Remote
user
First successful demonstration during SERESSA 2006
Remote testing from Sevilla, Spain
Laser beam testing and analysis of integrated circuits
ATLAS engineer
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Industrial set-up at EADS
Optical Fiber
Attenuator
CCD
camera
Z axis
stage
DUT backside
visible image
Nd : YAG
Pulsed Nanolaser
Energy
measurement
FEATURES :
λ :1064 nm
x 100
DUT
X,Y
MOTORIZED STAGE
Memory test
system
Pulse duration : 700 ps
Energy : up to 5 nJ
Spot radius : ≈2 µm
Minimum step : 0.1 µm
Z-resolution : 1 µm
Laser beam testing and analysis of integrated circuits
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Commercial tools
Phemos 1000 (Hamamatsu)
1064nm and / or 1340nm
CCD and / or HgCdTe
Laser beam testing and analysis of integrated circuits
IDS OptiCA (NPTest / Credence)
Dual laser source
1064nm and 1340nm
PICA and SiAPD or HgCdTe and SSPD
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Commercial tools
• Credence
− EmiScope
− GlobalScan
− Meridian
Laser beam testing and analysis of integrated circuits
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« Pump » techniques
« Pump » techniques
LASER
absorption
vic
De
te s
r
e
nd
u
e
t
Electrical
parameters
• Voltage
• Current
• Charge
Laser beam testing and analysis of integrated circuits
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Pump techniques
• Photoelectric effect
−
−
−
−
−
−
OBIC (Optical Beam Induced Current)
Fault injection
LADA (Laser Assisted Device Alteration)
LIVA (Light Induced Voltage Alteration)
Radiation effects testing
Latch-up sensitivity testing
• Photothermal effect
− OBIRCh (Optical Beam Induced Resistance Change)
− TIVA (Thermally Induced Voltage Alteration)
• Different methodologies
− Perturbation = Test
− Imaging = Analysis
Laser beam testing and analysis of integrated circuits
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Pump techniques
• Temporal modes
Electrical
Static
Dynamic
Optical
- Unbiased device (off-line)
- Static bias
CW Laser
- Device running (on-line)
- Test vectors
- Modulated laser
- Pulsed laser
Laser beam testing and analysis of integrated circuits
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Pump techniques
• Applications for failure analysis
Laser beam testing and analysis of integrated circuits
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Photothermal techniques
•
Performed with IR lasers (1300nm)
−
Front side / backside compatibility
•
Principle : local heating of ICs materials induce
resistivity variations (essentially metal interconnects
and polysilicon)
•
Mapping of resisitivity variations can reveal defects
Δρ = ρoαTCR(ΔT)
• Current variation
ΔΙ = -(ΔR/R) I @ constant V
Temperature
Coefficient of
Resistivity
• Voltage variation
ΔV = ΔR I @ constant I
OBIRCH
TIVA
Optical Beam Induced Resistance Change
Thermally Induced Voltage Alteration
Laser beam testing and analysis of integrated circuits
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OBIRCh
• Localization of a metallic short
OBIRCH image
Laser beam testing and analysis of integrated circuits
SEM image
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Photoelectric techniques
• Parameters
− Wavelength
• Strongly depends on the technology and the kind of test
• λ = 750-900nm = good polyvalence for front side testing of silicon
technologies
• Backside :
• Without substrate thinning : λ = 1000 nm
• Substrate thinned down to approx. 100µm : λ = 900-950 nm
− Pulse duration
• Temporal resolution for dynamic testing
• Amplitude of the perturbation
Laser beam testing and analysis of integrated circuits
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SPICE model of the photoelectric response
of a MOS transistor
• Double exponential
current source
• Simple model for the
parasitic bipolar transistor
activated only for short
laser pulses
Drain
Internal
Bulk
Gate
Source
Bulk
Laser beam testing and analysis of integrated circuits
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OBIC techniques
• OBIC = « Optical Beam Induced Current »
• Measurement of the photocurrent, or its
consequences, resulting from the excess carriers
generated by the laser
• Applications
− Internal logical state probing
− Evaluation of latch-up sensitivity
− Semiconductor defects localization
Laser beam testing and analysis of integrated circuits
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OBIC : internal state probing
VDD
A current is
observed on VDD
Probed node
0
PMOS
LASER
VSS
N+
N+
Substrate P
Laser beam testing and analysis of integrated circuits
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OBIC : internal state probing
VDD
No current
observed on VDD
Probed node
1
PMOS
LASER
VSS
N+
N+
Substrate P
Laser beam testing and analysis of integrated circuits
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OBIC : evaluation of latch-up sensitivity
•
Latchup = self-locking in a low-impedance state of a thyristor-like
parasitic structure inherent to CMOS technologies
•
May lead to a destruction of devices by short-circuit between Vdd and
Vss
•
Latch-up sensitive areas can be triggered by laser generated carriers
Laser
VDD
VSS
N+
P+
N+
P+
N well
Rwell
Rbulk
P bulk
Laser beam testing and analysis of integrated circuits
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OBIC : defect localization
Localization of amorphous
silicon zones in an overstressed ESD protection
structure
Initial
state
20µm
•
OBIC images
After
ESD
stress
30µm
Laser beam testing and analysis of integrated circuits
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« Pump » techniques
Application to the evaluation of radiation effects on
integrated circuits
Radiation environnements
Van Allen belts
Solar flares
Cosmic rays
Atmosphere
Laser beam testing and analysis of integrated circuits
Ground-level
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Single-event effects
+
-+
++ +
-
Coulombian interaction
Energy
: ~ 100 MeV
Penetration (Si) : ~ 10 µm
LET
: ~ 10 MeV / µm
−
−
−
−
−
−
SET (Transient)
SEU (Upset)
SEL (Latch-up)
SEFI (Functionnal Interrupt)
SEGR (Gate Rupture)
SEB (Burnout)
Cross section vs LET
σs
1 ,0
Cross section
-+
• SEE (Single-Event Effects) :
Section efficace (u.a.)
Heavy Ion
0 ,5
L0
M e s u re s
W e ib u ll
0 ,0
10
20
30
40
LET
L E T ( u .a .)
Laser beam testing and analysis of integrated circuits
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Single-Event Effects
SEE
Destructive
SEB
SEGR
Residual
SEL
SEU
MBU
Transient
SEFI
SET
DSET
Power
Laser beam testing and analysis of integrated circuits
Digital
ASET
Analog
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Simulating radiation effects with a laser
100 X
-+
-+
+
-+
+
-+
-+
+-+
++ +
-
•
Ionizing particle
•
Laser pulse
•
Coulombian interaction
•
Photoelectric effect
•
Parameter :
•
Parameters :
- LET (Linear Energy Transfer)
- Energy
- Absorption coefficient
Charge : ~ 1 pC
Duration : ~ 1 ps
Laser beam testing and analysis of integrated circuits
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SEE Testing methods
SEE testing
Particle accelerator
efficace (u.a.)
LaserSection
cross
section
σs
1 ,0
Section efficace
(u.a.)
Cross
section
Pulsed laser
σLs
1 ,0
0 ,5
0 ,5
L0
M e s u re s
W e ib u ll
0 ,0
10
20
30
E0
M e s u re s
W e ib u ll
0 ,0
40
LET
L E T ( u .a .)
Rate prediction
Laser beam testing and analysis of integrated circuits
10
20
30
40
Energy
L E T ( u .a .)
Designs comparison
Screening
Complex case studies
Rad-hard design
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Labs using the laser for SEE testing
MBDA
Boeing
JPL
IMS
NRL
Laser beam testing and analysis of integrated circuits
EADS
INFN
JAERI
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Performances of laser systems for SEE testing
λ (nm)
IMS
NRL
1600
MBDA
1200
MBDA
EADS
Boeing
NRL
NRL
800
LAAS
IMS INFN
IMS
JPL
400
1985
1990
1995
2000
2005
NRL
100fs
NRL
IMS
MBDA
Year of first
communication
IMS
1ps
IMS
LAAS
10ps
NRL
100ps
JPL
Boeing
1ns
MBDA
EADS
INFN
Durée
Laser beam testing and analysis of integrated circuits
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SEU sensitivity mapping of a single SRAM cell
1193pJ
891pJ
588pJ
SRAM cell
305pJ
177pJ
120pJ
49pJ
gy
r
e
En
30pJ
10pJ
Laser beam testing and analysis of integrated circuits
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Case studies: test of HM6504 SRAM
A0
…
A11
/W
/E
D
Q
Power supply
Test board
HM6504
Laser
VDD
VSS
Translation tables
•
•
VDD=5V
IDDmax=50mA
•
•
•
Wavelength : 800nm
Pulse length : 1ps
Spot 1/e ∅ : 1.1µm
Laser beam testing and analysis of integrated circuits
•
Scanning step : 1µm
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66
SEU mapping of a single SRAM cell
•
A single cell is visually selected in the middle of the
array : the « target cell »
•
Its logical address is read from the tester by
inducing an SEU with the laser
•
The adresses of the surrounding cells (the
« neighbors ») are also noted
Target cell
•
During the scan, after each laser strike :
−
only upsets in the target cell are used to build the mapping
−
neighbors state is monitored to ensure that the electrical
environment of the target cell remains the same
Neighbors
Laser beam testing and analysis of integrated circuits
PUCP – 03 /2007 - V. Pouget
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SEU mapping
4 pJ
All to 0
All to 1
20µm
Laser beam testing and analysis of integrated circuits
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SEU mapping
7.2 pJ
All to 0
All to 1
20µm
Laser beam testing and analysis of integrated circuits
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SEU mapping
10.4 pJ
All to 0
All to 1
20µm
Laser beam testing and analysis of integrated circuits
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SEU mapping
13.6 pJ
All to 0
All to 1
20µm
Laser beam testing and analysis of integrated circuits
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SEU mapping
16.8 pJ
All to 0
All to 1
20µm
Laser beam testing and analysis of integrated circuits
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SEU mapping
20 pJ
All to 0
All to 1
20µm
Laser beam testing and analysis of integrated circuits
PUCP – 03 /2007 - V. Pouget
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Laser cross-section
x10
-6
11
Laser SEU cross-section (cm²)
10
Data
All-to-0
All-to-1
Average
9
8
7
6
Corrected for
Beam
Beam & Metal
5
4
3
2
1
0
0
10
20
30
40
50
60
Laser pulse incident energy (pJ)
Laser beam testing and analysis of integrated circuits
PUCP – 03 /2007 - V. Pouget
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Design comparison
• Comparison of 2 flip-flop
designs
Laser cross section
Standard cell
Cross
(cm²)
SectionSection
efficace (cm²)
1E-6
Hardened cell
SEU
sensitive
areas
1E-7
1E-8
Cell
Bascule
Standard
Hardened
Durcie
1E-9
1E-10
10
20
30
40
50
60
70
80
Energie
incidente
Energy
(pJ) (pJ)
Help for « Rad Hard » design
Test, Specification, Validation
Laser beam testing and analysis of integrated circuits
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SET in linear devices
• LM124 : quad operationnal amplifier
• SET observed during particle accelerator testing
• Transients duration in the µs domain
IN
OUT
+
2
1
0
-1
-2
-3
-4
-5
Laser beam testing and analysis of integrated circuits
Output (V)
Heavy ion (Br)
0
50µ
Time (s)
PUCP – 03 /2007 - V. Pouget
100µ
76
SET in linear devices
2
1
0
-1
-2
-3
-4
-5
2
1
0
-1
-2
-3
-4
-5
Output (V)
Electrical model
of the device
Heavy ion (Br)
0
50µ
Time (s)
SPICE analysis
100µ
Output (V)
Laser (800nm)
0
50µ
Time (s)
100µ
Laser beam testing and analysis of integrated circuits
PUCP – 03 /2007 - V. Pouget
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SET in linear devices
LM124
Front side
Backside
• Mappings of the amplitude of the transient observed on the output
• Sensitive areas clearly identified
• Possibility to measure the cross section
Laser beam testing and analysis of integrated circuits
PUCP – 03 /2007 - V. Pouget
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SET in RF devices
•
•
SET in a 5.1GHz VCO in BiCMOS7 SiGe
SET observed in frequency and time domain
0
dBm
-20
-40
-60
-80
-100
5.00
25% - Disruption Time (ns)
25
mV
15
5
-5
-15
-25
0
5
10
15
20
25
30
35
40
45
Time (ns)
Laser beam testing and analysis of integrated circuits
50
5.05
5.10
5.15
5.20
Frequency (GHz)
35
30
25
20
15
10
5
0
0
25
50
75
100
125
150
175
200
Pulse energy (pJ)
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« Pump » techniques
Application to fault injection
Time-resolved injection of transient faults
• Application to safe or secured systems
− Fault criticity evaluation
− Extraction of critical time-windows
− Invasive attack for reverse engineering or sensitive data extraction
− System robustness evaluation
• Validation of error correction codes (software or hardware)
• Study of error propagation and application for design debug or
analysis
Laser beam testing and analysis of integrated circuits
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81
Different kinds of faults induced by a laser
Parametric fault
Logical faute
Mode
Electrical
modelling
Photoélectric
-Photocurrent
-Switching time
- Supply current
Photothermal
- Resistivity
- Leakage
current
-Propagation time - Timing error
-Supply current
- Transient
- Bit flip
o
Laser p
Laser beam testing and analysis of integrated circuits
Degradation
wer
- Timing error
- Transient
- Bit flip
- Latchup
- Breakdown
- Fusion
- Fusion
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Fault injection in SRAM-based FPGA
•
•
•
•
•
Collaboration with TIMA, EADS
Backside laser testing of Xilinx Virtex II
Methodology for analysis and evaluation of faults criticity
Relative sensitivity of different elements (LUT, Mux, Routing…)
Providing guidelines for low-cost design hardening
“Tools and Methodology Development for Pulsed
Laser Fault Injection in Sram-based FPGAs”
To be presented at IEEE LATW in Cuzco, March 2007
Laser beam testing and analysis of integrated circuits
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83
Dynamic laser testing of GHz devices
• Synchronization of test vector with pulsed laser oscillation
− Single pulse to test clock max jitter reduced to 20ps
− Electronic resolution 5ps
− Optical resolution 1ps
Laser Beam
Trigger
Electrical Signal
Photodiode
Mode-Locked
Laser
Pulse
Picker
DUT
DSO
Y
Z
X
Laser Synchronous
Generator
Only for TRLS
Delay
Generator
Test Pattern
Generator
10MHz Ref Clock
PhD thesis, Alexandre DOUIN
To be defended in 2007
Laser beam testing and analysis of integrated circuits
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Dynamic fault injection in an ADC
¾Analog-to-Digital Converter
Mixed device = complex errors
¾AD 7821, 8 bits, 100kS/s, semi-flash
Trig
3.10 mm
La
s
D3
2.87 mm
Control
logic
D2
LSB comparators
D1
WR
D0
Vref
Vin
DUT
INT
AD7821
Data
Conversion
start
DAC
DAC
er
MSB
latched
Data
available
500ns
WR
INT
MSB comparators
Laser
D4
D5
D6
D7
Laser beam testing and analysis of integrated circuits
Over
flow
TLas
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Dynamic fault injection in an ADC
2 comparators
Laser beam testing and analysis of integrated circuits
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Identification of the critical time-window
•
Evolution of sensitive area during the conversion cycle
MSB
latched
Conversion
start
Data
available
WR
INT
Cross section (cm2)
1E-4
1E-5
1E-6
1E-7
-200
0
200
400
600
800
1000
Critical window
<
0.1 x Cycle de conversion
Laser Pulse Delay (ns)
•
Efficient method for complex systems including software
Laser beam testing and analysis of integrated circuits
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Conclusions
• Laser techniques
−
−
−
−
−
Contact-less
Non-destructive
High space and time resolutions
Compatible with backside approach (mandatory with modern packages)
Probing or perturbation of running devices
• In the last decade, techniques based on cw lasers have become
major tools in industrial laboratories for:
− Failure analysis
− Design debug
− Security evaluation
• Techniques based on pulsed lasers are emerging
− Single Event Effects testing : mature technique, used by space agencies and
satellite manufacturers, in connection with circuit or system design
− Improved space and time resolution with short pulses
− New techniques based on non-linear interactions
Laser beam testing and analysis of integrated circuits
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On-going projects
•
STMicroelectronics
−
•
CNES
−
•
Modelling of laser effects on secured integrated circuits
Industrial partner
−
•
Methodology for qualifying power MOSFETs for space applications
Industrial partner
−
•
Using two-photon absorption for extracting SEE sensitivity parameters
CNES - Alcatel
−
•
New techniques for failure analysis of Systems-In-Package (SIP)
CNES
−
•
New laser-based techniques for failure analysis of nanotechnologies
Improvement of laser techniques for testing secured ICs
European industrial consortium
−
Design and qualification of rad-hard systems exposed to atmospheric neutrons
Laser beam testing and analysis of integrated circuits
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On-going projects
•
•
•
•
•
•
•
•
ALFA NICRON
−
Fault-tolerant system design and verification for safety-critical applications built from advanced ICs
TIMA – EADS
−
Design and testing methodologies for using SRAM-based FPGAs in embedded systems
Arizona State University
−
Analysis of SEE in RF devices for design hardening
Academic
−
Modelling and testing of SET in fast linear devices
Academic
−
New laser-based technique for time-resolved contact-less probing of internal votalges
Academic
−
Dynamic laser testing of multi-GHz digital devices (Intel Core2Duo)
Academic
−
New structures and design concepts for intra-chip optical interconnects
Technology transfer
−
Creation of an industrial-level platform for SEE laser testing
Laser beam testing and analysis of integrated circuits
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