[OFC 2013 Tutorial OW3G.4] Burst-mode Receiver

Transcription

[OFC 2013 Tutorial OW3G.4]
Burst-mode Receiver Technology for
Short Synchronization
Xing-Zhi Qiu ([email protected])
Ghent University – Information Technology Department (INTEC),
Interuniversity MicroElectronics Center (IMEC), Belgium
INTEC
www.intec.ugent.be
1
X.Z. Qiu,http://
OFC’13, OW3G.4
Outline

Introduction
 Evolution of PONs (IEEE and ITU-T)

OLT BM-RX Requirements
 High Optical Power Budget
 Short Burst Synchronization
 BM-RX Figure of Merit

Overview of Fast Synchronization BM-RXs
 AC-Coupled & DC-Coupled BM-RX Configurations
 3R Fast Synchronization BM-RX Architectures
 Dual-Rate BM-RXs

Prototypes of IEEE/ITU-T BM-RXs/Sub-Systems
 IEEE 10G-EPON BM-RXs & System Performance
 10G-PON Fast Synchronization BM-RXs Performance

Summary
PON: passive optical network, OLT: optical line terminal, BM-RX: burst-mode receiver
X.Z. Qiu, OFC’13, OW3G.4
2
Access Network Bandwidth Trends

50% compounded annual growth rate (CAGR)

Technology Bandwidth Growth: 10x every 5~6 years
Source: Ronald Heron, Alcatel-Lucent ECOC’10 WS5
DS: downstream, US: upstream, BW: bandwidth
3
ITU-T/IEEE TDM-PON Standards

PON Standardization Organization for Optical Access
 ITU-T FSAN Study Group 15 - Question2 “Optical systems for fibre access networks”
 IEEE 802.3 working group “CSMA/CD (ETHERNET)”: 802.3ah-EFM & 802.3av-10G PHY

ITU-T Recommendations [1]
 APON/BPON G.983.1,2,3,4,5
- 155/622Mb/s DS, 155Mb/s US
 G-PON G.984.1,2,3,4,5,6,7
-
2.5Gb/s DS, 1.25Gb/s US
G984.5: GPON Enhancement band
G984.6: GPON Reach extension
G984.7: GPON Long reach
[3]
 XG-PON G.987.1,2,3,4
- 10Gb/s DS, 2.5Gb/s US
- Evolutionary growth of the existing GPON standard, and coexist with G-PON ODN
 NG-PON2 G.989.1,2,3 - 40-Gigabit-capable passive optical networks (NG-PON2): general
requirements, PMD layer specification / TC layer specification framework) – under study [4]

IEEE Standards [2]
 1G-EPON IEEE 802.3ah (1Gb/s DS, 1Gb/s US)
 10G-EPON IEEE 802.3av (asymmetric 10/1G-EPON, symmetric 10/10G-EPON)
[1] ITU-T Recommendation G.983-987, [2] IEEE P802.3av 10GEPON Task Force, http://www.802.org/3/av/index.html, 2009
[3] Masaki Noda et al., OFC’12, OTh4G.6, [4] http://www.itu.int/itu-t/workprog/wp_search.aspx?sg=15
EFM: Ethernet in the first mile, ODN: optical distribution network
X.Z. Qiu, OFC’13, OW3G.4 4
Evolution of TDM-PONs
Wednesday 16:30, OW4D.5 invited “FSAN NG-PON2 updates”
Thursday 16:30, NTh4F.5 Tutorial “NG-PON2 Technology”
Data rate (bit/s)
40G
ITU-T standardization
IEEE standardization
10G
ITU-T G.989 consented
NG-PON2 G.989
40G
ITU-T XG-PON G.987 completed in 2010
10/2.5G10/10G
XG-PON G.987
Japan (10/1G10/10G)
IEEE 802.3av
ITU-T PON deployment
10G-EPON 802.3av completed in Sept 2009
IEEE PON deployment
Milestone
G-PON 1st Interop Event in Jan 2006, wide scale
deploy 4Q 2007, G.984.1-6 amendments till 2008
2.5
G
G.984.x
G-PON: NA, EMEA
G-PON G.984 completed in June 2004
IEEE 802.3ah
1G
E-PON: Japan, China
EPON 802.3ah published in 2004
G.983.x published
Revised
622
M BPON G.983 completed in 2000, revised till 2002
BPON: NTT, Verizon
BPON 1st Interop. Event in March 2004
APON
155 FSAN founded in 1995
M APON G983.1 in 1998
1998
Year
2000
2005
2010
[1] Rob Bond, Telcordia, FTTH Council Webinar, July 30, 2008, [2] P. Vetter ECOC’12 Tutorial, Tu.3.G.1
TDM: time division multiplexing, TWDM: time/wavelength division multiplexing
2013
5
IEEE 10G-EPON based Access Networks


Symmetric 10G/10G & Asymmetric 10G/1G PONs
Coexistence with Deployed 1G-EPON
Source: Glen Kramer, ECOC’09 Symposium NG Optical Access
6
TDM-PON Burst-Mode PMD Components

Three BM Physical Medium Dependent (BM-PMD) Components [1]
 OLT 2R burst-mode receiver (BM-RX) – key component of PONs
 OLT burst-mode clock data recovery (BM-CDR)
 ONT burst-mode transmitter (BM-TX)
Verizon XG-PON
BM-TX
1270nm US
2R BM-RX & BM-CDR
 OLT 3R BM-RX
Source: Link Hoewing, “FiOS: An Ultra Broadband Case Study”, Verizon, October 15, 2010
[1] X.Z. Qiu et al., "Development of GPON upstream physical-media-dependent prototypes", JLT, Vol. 22, 2004, pp. 2498-2507
ONT: optical network terminal
Outline

Introduction
 Evolution of PONs (IEEE and ITU-T)

 High Optical Power Budget
 Short Burst Synchronization
 BM-RX Figure of Merit
8
US TDMA Scheme & OLT 3R BM-RX

PON Transmission Scheme & US TDMA Bursty Nature
 Downstream TDM: Continuous wave-mode (same amplitude and synchronous phase)
 Upstream TDMA: Burst-mode (differential amplitude & phase on burst basis)

OLT 3R BM-RX
 Re-amplification & re-shaping: BM-TIA & BM-LA gain control & decision threshold extraction
 Retiming: BM-CDR data recovery/phase alignment
1
3 2 2 1
 BM-RX settling time/preamble required
ONT1
1
OLT at Central Office
(Synchronous
PON system with
OLT master clock)
3
2
2
DS TDM
(broadcast)
1
3
2 2
1
2
ONT2
OLT
3R
BM-RX
2
2
3
US TDMA
(Burst)
1
Passive
splitters
3
2
3
1
OLT US-PMD (3R BM-RX)
BMCDR
BMLA
APD
BM-TIA
2
3
1
US ONU bursts
aligned after ranging
3
ONT3
Unsynchronized opticalpower-varied bursts
3
ONTx extracts
its own DS
frames
3
2 2
1
ONU DS PMD (3R CW-RX)
APD
-TIA
TDMA: time division multiple access, CDR: clock & data recovery, TIA: transimpedance amplifier,
BM-LA: burst-mode limiting amplifier, CW: continuous wave-mode, MAC: medium access control X.Z. Qiu, OFC’13, OW3G.4
CW
-LA
9
CWCDR
3
IEEE 10G-EPON Upstream Burst

Burst Composition [1][2]
 10Gb/s Burst overhead (variable):
- Guard time / dead zone: max. 512ns laser Toff
- Idle: max. 512ns laser Ton + Sync time (max. 800ns 2R RX settling + max. 400ns CDR lock + 66
bits burst delimiter)
 FEC protected data payload

Short burst overhead required for
network throughput efficiency
IEEE 802.3av 10GE-PON burst signal format
End_Burst_
Delimiter
EOB
laserOnTime
(Ton)
Toff
End of
burst
Dead zone
FEC unprotected
400+400ns
E-PON burst signal format
Sync time
2R BM-RX
settling
CDR
lock
Sync pattern
(Preamble)
FEC protected data payload EOB
laserOffTime
(Toff)
Burst Delimiter
(code group align)
Idle
Overhead
Data Payload
[1] Naoto Yoshimoto, “Smooth migration Technology from GE-PON to NG-PON towards NGN era in Japan”, Computex Taipei Forum - NGN2009
[2] IEEE P802.3av 10GEPON Task Force, http://www.802.org/3/av/index.html
OH: overhead, EOB: end of burst, Ton: laser turn-on, Toff: laser turn-off
FEC: forward error correction, EOB: end of burst, OH: overhead
ITU-T XG-PON Upstream PHY Layer Overhead

G.987.2 Upstream Physical (PHY) Layer Burst Overhead [1]
 Guard time: 64-128 bit time @2.5Gb/s (25.6 ns - 51.2ns) for burst overlap prevention
– Laser turn-on time Ton+Tu (32bit time) and laser turn-off time Toff+Tu (32 bit time)
 Upstream physical synchronization block PSBu:
– Preamble time: 160-1856 bit time @2.5Gb/s (64 ns - 742ns) for 2R RX settling and CDR lock
– Burst delimiter time: 32-64 bit time
 XG-PON OLT burst overhead time: objective 256 bit time (102 ns), worst case 2048 bit time
(819ns)
XG-PON burst overhead
Physical layer overhead time
Tplo
Tg
G-PON burst overhead time
PSBu
FEC-protected data
Start of upstream
PHY frame
Tu
End of previous
burst, ONU i
[1] ITU-T Recommendation G.987.2 & G.987.3, 2010
Toff
Ton
Tu
Tg
(Guard
time)
2R BMRX
settling
Tp
(Preamble
time)
CDR
lock
Beginning of next burst ONU j
(scrambled PHY payload)
Td (Burst delimiter)
PHY: physical layer, OH: overhead, PSBu: upstream physical synchronization block, Tplo: physical layer overhead time,
Tg: guard time, Tu: timing uncertainty, Tp: preamble time, Td: delimiter time
11
IEEE 10G-EPON 3R BM-RX Requirements

IEEE 802.3av OLT 10GBASE-PR-D3 Spec






Line rate: 10.3125 Gb/s, Line code: 64B/66B data encoding
Average RX power: max. -6dBm
RX sensitivity: -28 dBm @BER=1E-3 (Pre-FEC) --> Loud/soft = 22dB
Sync time: max. 800ns for 2R RX settling plus max. 400ns for CDR lock
Consecutive identical digits immunity (CID): 65 bits for 64B/66B
Mandatory 1G/10G Dual-Rate TDMA Technique

Dual-rate BM-RX supporting 10G / 1G–EPON ONUs coexistence on the same outside plant
ITU-T and IEEE wavelength plan:
-ITU-T WDM wavelength plan:
2.5G XG-PON Up (12601280nm), 1.25G G-PON Up
(1290-1310/1330 nm), dual-rate
operation is not mandatory
-Wavelength overlap of IEEE GEPON Up (1260-1360nm) with
10G-EPON Up (1260-1280nm)
signals, require 1G/10G dualrate mode at BM-RX
Up: upstream
Source: Paolo Solina, ECOC’10, We.8.B.1
12
ITU-T G-PON / XG-PON BM-RX Requirements

ITU-T ODN Loss Spec [1]
 G-PON ODN loss:
(G.984.2, G.984.7)
 XG-PON ODN loss:
(G.987.2, with FEC)

ODN
Class A
Class B
Class B+
Class C
Class C+
Loss (dB)
5-20
10-25
13-28
15-30
17-32 (FEC)
ODN
N1 Class
N2 Class
E1 Class
E2 Class
Loss (dB)
14-29
16-31
18-33 (OA)
20-35 (OA)
High ODN Loss Requires High Optical Power Budget [2]
 High TX optical output power and high RX Sensitivity



1.25Gb/s G-PON OLT BM-Rx sensitivity: < -28 dBm (Class B+) @BER=1E-10
2.5Gb/s XG-PON OLT BM-Rx sensitivity: < -27.5 dBm (N1), -29.5 dBm (N2) @BER=1E-4
(Pre-FEC)
G. 987 OLT BM-RX Other Spec





Line rate: 2.48832 Gb/s, line code: NRZ
RX overload: max. -7dBm (N1 class), -9 dBm (N2 class)
Wide dynamic range: min. 20.5 dB incl. max. 15dB DODN + max. 4dB DTX_PO
Overhead / preamble time: min. 102 / 64ns, max. 819/742ns
Consecutive identical digits immunity (CID): 72 bits for scrambled NRZ
[1] ITU-T Recommendation G.987.1 & G.987.2, 2010,
[2] Fabrice BOURGART, ”ITU-T Standardization: from G-PON to 10G XG-PON”, FTTH 2010
N1: Nominal 1 class, N2: Nominal 2 class, OA: optical amplifier, DODN: differential loss of
ODN, CID: consecutive identical digit, DTX_PO: differential launch power of TX
13
BM-RX with Short Sync Time - Specific Issues

Transients During Guard Time and Burst Preamble [1]
 Issue 1: DC drift due to loud/soft packets resulting in long tail effect (~1us)
 “RESET” signal within guard time to erase DC wander caused by preceding loud packet
 Issue 2: high RX sensitivity resulting in spurious output during guard period, and invalid
output during preamble / RX settling
 a blanking signal to ignore OLT false transition until valid data is received

Sensitivity Penalty Caused by Inaccurate Fast Threshold Extraction [2]
GPON
OLT Rx
output
Invalid output
during preamble
1.224us
RESET
DC drift issue
 long tail after loud
packet
Guard time
(10ns/div)
High RX sensitivity
 spurious output
Preamble
Lesson Learned from G-PON Deployment [1]
[1] Rich Baca, “Technological challenges to G-PON operation”, OFC/NFOEC’08, NMD1
[2] P. Ossieur et al., JLT, Vol. 24, No. 3, 2006, pp.1543-1550.
14
New Feature of OLT BM-RX

Reliable GPON Operation Needs Two Feedback Signals
[1]
 A time-critical RESET pulse from the MAC to the OLT transceiver (BM-RX)
 A time-critical blanking/CDR reset signal from the MAC to the BM-CDR

New Feature Eliminates Two Time-Critical Signaling [2]
 On-chip auto-RESET generated inside BM-LA replacing external RESET pulse from MAC
 Self-detected burst activity signal generated inside BM-LA replacing a blanking signal from
MAC to BM-CDR
Burst activity detected
OLT
transceiver
On-chip autoRESET
Blanking/CDR reset signal
CDR
SerDes
DC-coupled
MAC
RESET signal
OLT Line Card
New feature allows no time-critical control signals / interfaces cross the
boundary between PHY & MAC layer for better system interoperability
[1] Rich Baca, “Technological challenges to G-PON operation”, OFC/NFOEC’08, NMD1
[2] X. Z. Qiu et al., "Evolution of burst mode receivers", ECOC’09, 7.5.1
BM-LA: burst-mode limiting amplifier, SerDes: serializer/deserializer,
PHY: physical layer, MAC: medium access control
15
10G BM-RX Figure of Merit

Generic 10G BM-RX Design Guidelines
 Combined high performance (RX sensitivity, loud/soft ratio, shorter OH)
 Compromise of short burst overhead and relaxed OLT timing parameters for
simpler implementation with low power consumption
 Robust design for high yield manufacturing
 Elimination of time-critical control signaling form MAC to PHY for system
interoperability
 Multi-rate operation for supporting network flexibility, scalability and upgradeability

Challenging 10G BM-RX Performance Spec
 High Rx sensitivity: < -28dBm@raw BER=10-3 with FEC (G-PON Class B+ and
XG-PON N1 Class compliant, optical amplifiers used for higher power budget than
N1 Class)
 Wide dynamic range: > 22dB (IEEE 10GBASE-PR-D3)
 Short 2R settling time: 100-400ns (FFS)
TWDM: time/wavelength division multiplexing, FSS: for further study
16
Outline



Introduction
 AC-Coupled & DC-coupled BM-RX Configurations
– AC-coupled 2R BM-RXs
– DC-coupled 2R BM-RXs
– BM-CDRs
17
OLT AC-Coupled BM-RX Configuration

3R BM-RX Key Techniques [1]
 BM-TIA: converting current from photodiode into a differential output voltage with variable gain (handle >
22dB optical input power in tens of ns scale) and DC offset control
 BM-LA: amplification, offset removal / decision threshold extraction (time constant critical, optimal low
frequency cut-off for low baseline DC droop & low pattern dependent jitter)
 BM-CDR: timing and data recovery (fast clock phase extraction)
“no light”
AC or DC
Coupling
Coupling
capacitors
“1”
“0”
Optical input
PD
BM-TIA:
gain control
BMTIA
BMCDR
BM-LA
Waveform
distorted
Decision
threshold
Phase
mismatched
BM-LA: offset
cancellation &
constant amplitude
Optical input
BM-CDR: clock
extraction &
data recovery
t
Loud burst followed by soft burst
DC component decays with time t
[1] Masafumi Nogawa, NTT Technical Review, Mar. 2011
[2] Haim Ben-Amram, www.ieee802.org/3/av/public/2008.../3av_0801_benamram_2.pdf
PD: photodiode, G1/G2: gain 1 / gain 2
18
OLT DC-Coupled BM-RX Configuration
 DC-Coupled BM-RX Preferred over AC-Coupling for Fast Sync.
 BM-TIA with Fast AGC [1]


Step AGC: very short response time in nanosecond, but RESET needed
Continuous AGC: gain adjusting continuously without RESET, slow response > 250ns if 65bits CID
 BM-LA with Fast Offset Cancellation



Peak/bottom detection with RESET
Feed-forward average detection without RESET
Feedback offset cancelation with RESET or without RESET
APD
BM-TIA
Loud burst
level ”1”
BM-CDR
Loud
burst
Soft burst at sensitivity level
RESET
BM-LA
RESET
signal(s)
Extinction
ratio
Level ”0”
DC-coupled 3R BM-RX
Guard
Preamble
Soft burst
Vth1
Decision
threshold
Vth2
Long CID
RESET
[1] Yusuke Ohtomo et al, “High-speed circuit technology for 10-Gb/s optical burst-mode transmission” OFC’10, OWX1
AGC: automatic gain control
19
10G AC-Coupled BM-RX Time Constant Issue

Deterioration in Response Time [1]
 Time constant of average detector - small time
constant for short preamble, BUT max. 65-bit CIDs
 AC-coupling time constant - small time constant for
short preamble, limited by RX dynamic range & CIDs
 Tradeoff between short preamble and baseline DC
droop  RX preamble: 250~360ns (10.3Gb/s,
64b66b) [2]  IEEE BM-RX settling time: 800ns
Average
detector
Transient response after AC-coupling
Preamble
Waveform distortion by duty fluctuation
Output of TIA & Vth
(Vth)
B(Vth) - small AD time constant
t
Preamble
[1] Kazutaka Hara et al., JLT ,Vol 28, No 19, 2010 , pp. 2775-2782
[2] Rujian Lin, www.ieee802.org/3/av/public/2008_03/3av_0803_lin_1.pdf
CID: consecutive identical digit, Vth: threshold voltage, AD: average detector
B(Vth) - large time constant
20
10G AC-Coupled BM-RX (Transient-Cancellation)

NTT Baseline Wander Common Mode Rejection (BLW-CMR) &
Inverted Distortion Technique [1]




Two LAs and two ADs – shorten response time
Transient response cancellation using BLW-CMR technique [2]
Inverted distortion technique – less duty-cycle distortion
Small time constant
Shorter preamble and high tolerance to CIDs
for short preamble
[1] Kazutaka Hara et al., JLT ,Vol 28, No 19, 2010 , pp. 2775-2782
[2] Hirotaka Nakamura et al., JLT Vol. 27, NO. 3, 2009, pp. 336-342
AD: average detector, BLW-CMR: baseline wander common mode rejection
DC droop during long CID
21
BM-TIA with 2-Step AGC & Coarse/Fine AOC

NTT PIN-TIA with 2-Step AGC and AOC (with Reset) [1]
 Fast high / low 2-step transimpedance Rf switching (10 ns)
 Fast coarse / fine AOC, allowing AC-coupled with a simple BM-LA
 Decision threshold level = common mode voltage – duty cycle distortion
minimal
RESET
[1] M. Nakamura et al., “A 10G burst-mode PIN-TIA with 10-nsec response for PON systems”, LEOS’07, MH2, pp. 67-68,
AOC: automatic offset control
22
BM-TIA with 3-Step AGC & Coarse AOC

UGENT APD-TIA with 3-Step AGC and Coarse Offset Control [1]




Fast High / Medium / Low 3-step transimpedance Rf switching (<10 ns)
Fast coarse offset control (fine offset cancellation/decision threshold extraction done at BM-LA)
RESET detection via common-mode signaling
DC-coupled with dedicated BM-LA  Short preamble
VTIA
Reset
Gain
switching/lock
Vdummy
RF
GS1
Lock
Common-mode
signaling
VCM
GS2
Output buffer
APD
DC-coupled between
BM-TIA & BM-LA
Vout+
Input
TIA core
Vout-
S2D
GS1 (High/Medium gain)
BM-LA
RLoad
GS2 (Medium/Low gain)
RF
VCC
BM-TIA
output
Dynamic range
3
TIA dummy
Idummy
Low gain
2
1
Medium gain
GND
GS1 (High/Medium gain)
High gain
BM-TIA input
BM-TIA
[1] X. Yin et al., "DC-coupled burst-mode receiver with high sensitivity, wide dynamic range and short settling time for
symmetric 10G-GPONs”, ECOC’11, Mo.1.C.5
GS1/GS2: gain control signal, S2D: single to differential converter, VCM: common-mode voltage
23
Step / Continuous AGC / ATC BM-RXs

Mitsubishi BM-RX with Continuous AGC and Continuous ATC [1]
 Continuous gain adaptation within burst without RESET
 Continuous threshold varying
based on detected average power
 Tracking power fluctuation in burst
 Longer response time (a few hundred ns)
for high tolerance to CIDs
BM-RX with continuous AGC/ATC
BM-RX with
step AGC/peak detect ATC
[1] M. Noda et al., “Technology progress of high-speed burst-mode 3R receiver for PON applications”, OFC’12, OTh4G.6
[2] Masaki Noda et al., ECOC’10, Mo2.B.2
ATC: automatic threshold control,
24
DC-Coupled BM-LA (Feedforward Type)

UGENT Feed-forward Peak/Bottom Detection with RESET [1]
 4 successive amplifier stages with 4 peak/bottom detectors (TH1-TH4) - critical timing
 Relative decision threshold error (to signal amplitude) decreased along BM-LA stages
 17.8 ns for complete threshold extraction – 2R RX settling time: 25 ns with auto-RESET
BM-TIA
PIN
DC-coupled BM-LA
Peak/bottom threshold extraction
+
Peak
detector
High/low
gain
Gain
switching
& locking
TH1
Coarse
threshold
extraction
TH1
TH4
A1
A4
+
Burst
detect
Reset
logic
Burst detected
RESET
A3 output
A1 output
+
TIA
RESET
A4 output
BM-TIA output
Preamble
set gain / threshold extract
A2 output
TH2
TH3
TH4
[1] P. Ossieur et al., "A 10 Gb/s burst-mode receiver with automatic reset generation
and burst detection for extended reach PONs", OFC’09, OWH3
[2] X.Z. Qiu et al., “Evolution of Burst Mode Receivers ”, ECOC’09, 7.5.1
BM-LA output
RESET
generated
Burst detected
25
10 ns/div
DC-Coupled BM-LA (Feedback Type)

NTT Feedback Offset Cancelation without RESET [1]
 Two-stage amplifiers with active feedback, two stages w/o feedback
 Automatic voltage offset cancellation (AOC) in 200 ns without RESET
Two-stage feedback AOC
<200 ns
RX settling time (1-stage vs 2-stage feedback AOC)
Conventional 1-stage feedback AOC
[1] M. Nogawa et al., “A 10-Gb/s burst-mode limiting amplifier using a two-stage active feedback
circuit”, Symposium on VLSI Circuits 2009, 2-5, pp. 18-19.
26
BM-LA (Switched Bandwidth Feedback Type)

UGENT Feedback Type BM-RX with Switched Loop Bandwidth [1]
 Feedback-type BM-RX with switchable AOC loop BW without external RESET
 Programmable two time-constants (fast response during preamble, large time
constant during payload)
 Additional features: on-chip auto-RESET generation, 2.5G/5G/10Gb/s operation
Wide dynamic range
10G APD-basedDC-coupled
BM-RX ICsBM-LA
TIA output
VAPD
High
Auto-reset
generation
Offset integrator with
switchable BW
Low gain
APD
External reset
Medium gain
TIA input
TIAc
Medium
/Low
GS2 gain
GS1
TIAd
GS1
A1
S2D
High/
Medium
gain
Gain switch
& lock
GS1
Output
buffer
Reset
Lock
A2
A3
A4
Data
Buffer output
Activity
detection
Reset
detection
GS2
10G BM-LA
10G BM APD-TIA
BM-TIA
[1] X. Yin et al., "Experiments on 10Gb/s fast settling high sensitivity burst-mode receiver
with on-chip auto-reset for 10G-GPONs", OFC’12, NTu1J.4
BW: bandwidth
27
AC-Coupled versus DC-Coupled BM-RXs

AC-Coupled “GE-PON like” BM-RXs
 Higher sensitivity (DC offset removal via AC coupling)
 Easier design for low power consumption, flexible use of different components w/o RESET
 Longer RX settling time, not efficient for short packets (baseline DC droop  pattern
dependent jitter)
 Not directly scaled for different data rates (AC-coupling critical time constants and CID
tolerance contradicting)
 Lower data throughput (line coding 8b10b for GE-PON, 64b66b for 10GE-PON)

DC-Coupled “G-PON like” BM-RXs
 Shorter burst overhead (less time constant constraint)
 Simultaneous multi-rate operation possible (no line coding, less time constant and CID
tolerance contradicting)
 Sensitivity penalty (DC offset & decision threshold error due to very short Rx settling time)
 Not very friendly for component replacement from different vendors (dedicated BM-LA)
 Difficult to design (RESET signal required)

DC-Coupled method Preferable for Fast Burst Synchronization
NRZ: non-return-to-zero, CID: consecutive identical digit
28
Pros & Cons of BM-RX Design Types

UGENT 10Gb/s APD BM-RX combines both advantages of AC- and
DC-coupled approaches
AC-coupled BM-RX
 Higher sensitivity
DC-coupled BM-RX
UGENT DC-coupled New Approach
 Sensitivity penalty (DC offset  Higher sensitivity (less time constant
(DC offset removal via & decision threshold error using tradeoff for settling time, payload
AC coupling)
FF peak/bottom detection)
tracking with LOW AOC loop BW)
 Slow settling (AC-
 Faster RX settling (less time  Shorter RX settling time (Feedback
coupling time constant constant constraint)
constraint)
type with switchable HIGH AOC loop
BW for faster threshold extraction)
 Line coding (limit
 No line coding (scrambled
number of CIDs)
NRZ, large CID tolerance)
 Support simultaneous multiple rate
 Easier design for
 Not friendly for network
 Relative friendly for network
low power
consumption, friendly
use of components
interoperability (dedicated BMLA with external RESET signal
required)
interoperability (on-chip auto-RESET, no
timing-critical signaling cross PHY-MAC
layer)
 Need dedicated BM-LA
operation (2.5G/5G/10G, NRZ)
FF: feedforward, AOC: automatic offset control, BW: banwidth, CID: consecutive identical digit,
NRZ: non-return-to-zero, PHY: physical layer, MAC: medium access control
29
BM-CDR Configurations

Three Main Types of BM-CDR Techniques [1,2]
 Fast-lock PLL based CDR: acquisition time limit +/- 130 ns with 0.1 UI of peak-to-peak
output jitter, sub-100 ns locking time demonstrated [3]
 Gated-VCO based CDR: very fast response in 1 bit, but larger output clock jitter & narrow
tolerance to pulse-width distortion [4]
 Over-sampling based CDR: fast response in a few ns, low jitter, large tolerance to pulsewidth distortion, but high power consumption and large chip area [5]
1) Fast-lock PLL based BM-CDR
2) Gated-VCO based BM-CDR
3) Over-sampling based BM-CDR
[1] M. Noda et al., “Technology progress of high-speed burst-mode 3R receiver for PON applications”, OFC 2012, OTh4G.6
[2] Yusuke Ohtomo et al, OFC’10, OWX1, [3] Y. Chang, ECOC’09, P6.29, [4] J. Terada et al., ISSCC’09, 5.8, pp.104-105,
[5] C, Mélange et al., JLT, Vol. 27, Nr. 17, 2009, pp. 3837-3844.
PLL: phase-locked loop, VCO: voltage-controlled oscillator, DEC: decision circuit
GVCO Based BM-CDRs

NTT GVCO CDRs [1-3]
1) 2 GVCOs
(PLL with 20MHz
frequency difference)
2) Single GVCO
(FLL with 2MHz
frequency difference)
3) Cascaded GVCOs
(Sync time:14 bits, better jitter performance & tolerance to long CIDs
by jitter-reduction and PWD-compensation circuits)
[1] J. Terada et al., “Jitter-Reduction and Pulse-Width-Distortion Compensation Circuits for a 10Gb/s Burst-Mode CDR Circuit ”
ISSCC’09, 5.8, pp.104-105, [2] M. Nogawa et al., ISSCC’05, pp. 228-229, [3] J. Terada et al., ISSCC’08, pp. 226-227.
GVCO: gated VCO, FLL: frequency-locked loop
Over-Sampling Based BM-CDRs

Mitsubishi 8x Over-Sampling CDR [1-3]
 8-phase PLL: 8x10.3Gb/s 45-degree phase-shifted CLK#0-CLK#7 synchronized
with system clock
 82.5 GS/s sampler: sample the incoming burst data at 82.5 Gs/s (D0-D7)
 Data edge counter: number of rising/falling edges from D0-D7
 Data phase decider: data-phase decision-algorithm for optimum recovery phase
[1] N. Suzuki et al., ECOC’08, P.6.3, [2] N. Suzuki et al., EL, Vol. 45 No. 24, 2009, pp. 1261-1263
[3] J. Nakagawa et. al., PTL, Vol. 22, No. 7, April, 2010, pp.471-473,
32
Dual-Rate G-PON 10x Over-Sampling BM-CDR

UGENT 622/1244Mb/s GPON BM-CDR IC in 0.13um CMOS [1]
10x replica delay line (800/1600ps)
Freq / 2
Charge
Pump
Delay element
control
Phase
Detector
Reference DLL
Reference
DLL
(delay locked
loop)
Data
10x data
delay lines
Data
1.24G/622M
D0
D1
D8
D9
10-tap (80/160ps)
Sampler
Reference clock (sync
with OLT master clock)
Data sampler
Dual-rate (622Mb/s or 1244Mb/s)
bit synchronization (analog part –
reference DLL & data sampler)
Q<0:9>
10
To tap
selection
 Two matched delay lines (10x master data delay line & 10x
replica delay line), both controlled by slave DLL
 Reference delay locked loop (DLL) sets replica delay lines to
data bit period (800ps @1.25Gb/s or 1600ps @622Mb/s)
 Data sampler: 10x oversampling – 80ps per tap, 10x taps
 Middle bit detection: search for middle of “010” pattern
 Optimum tap selected via majority voting algorithm (averaging)
 Low power digital processing at 1/8 data rate (155/77MHz)
 Payload tracking mode: +/-1 extra bit shift in worst case
 Sync time: 20bits (16ns) incl. phase averaging algorithm
Sampled
data in
100
D
10
Q
D
Q
D
D
Q
Q
Data
out
8
Clock
1.24G/622M
Middle
Middle
ofbit
bit
detection
detector
Low speed clock
155M/77M
Optimum phase
selection algorithm
Tap
selector
Tap Selection
Data recovery with fast optimum decision phase
(digital part – middle bit detect & tap select algorithm)
[1] P. Ossieur et al., “A dual-rate burst-mode bit synchronization and data recovery circuit
with fast optimum decision phase calculation", AEU, Vol. 63, Nr. 11, 2008, pp. 931-938.
33
10Gb/s 4x Over-Sampling BM-CDR

UGENT 10Gb/s Over-Sampling BM-CDR [1-3]
 Two matched delay lines (data delay line & replica delay line),
both controlled by slave DLL (delay locked loop)
 4:64 DeSer: timing jitter averaging (group of 16 data bits)
 Low power phase picking algorithm with 622MHz clock
 Output synchronous to system clock
 Fast locking (1.6 ns)
 Robust against pulse width distortion (100ps +/- 20%, 72 CIDs)
 1.5 W @ 2.5V power consumption with built-in phase selection
 Die size: 2.75 x 2.25 sqmm
[1] C. Mélange et al., EL Vol. 45, 2009, pp.694-695,
[2] C, Mélange et al., JLT, Vol. 27, Nr. 17, 2009, pp. 3837-3844
[3] C, Mélange et al., OFC’10, OWX2
Reference DLL
Replica delay line
Data delay line
Data sampler
34
10GE-PON / 1GE-PON Coexistence

Backward Compatibility with ODNs & Deployed GE-PON Systems
Wavelength
overlap
OLT data paths operating in dual-rate
mode (1G/1 G, 10G/1G, 10G/10G with
a single optical input)
MAC: medium access control
RS: reconciliation sublayer
XGMII: 10Gb/s media independent interface
PCS: physical coding sublayer
PMA: physical media attachment
PMD: physical medium dependent
[1] Keiji Tanaka et al, “IEEE 802.3av 10G-EPON
Standardization and Its Research and Development
Status”, JLT Vol. 28, No. 4, 2010, pp. 651-661
Dual-rate PMD conﬁguration: 1) optical domain split, 2) electrical
domain split (preferred)
35
Dual-Rate BM-RX with Bit-Rate Discrimination
 NTT IEEE 10G/1G Dual-Rate 2R BM-RX with Bit-Rate Discrimination Circuit [1]
BDC: Bit-rate
discrimination
circuit
GC: gate circuit
Dual-rate 2R BM-RX settling time: <250 ns
[1] Hara, Kazutaka et al, “1.25/10.3-Gbit/s dual-rate burst-mode receiver with automatic
bit-rate discrimination circuit for coexisting PON systems” COIN’10, pp.1-3
36
Dual-Rate BM-RX with External Rate Select Signal
 Mitsubishi IEEE 10G/1G Dual-Rate 3R BM-RX with Rate Select Signal [1]
Burst overhead
- Ton/Toff: 48ns
- RX_settling: 800ns
- CDR_settling: 37ns
- BD: 6.4ns
- EOB: 6.4ns
- Grant cycle: 1ms
[1] M. Noda et al., OFC 2012, OTh4G.6
37
Multi-Rate BM-RX with On-Chip Auto-RESET
 UGENT XG-PON 10G/5G/2.5G Multi-Rate 2R BM-RX with ON-Chip Auto-RESET [1-2]


2R RX settling time: 75 ns for simultaneous 10G/5G/2.5G operation
Tracking mode with slow time constant - large tolerance to > 72 CIDs at 10G/5G/2.5Gb/s
VAPD
VTIA
VDUMMY
BM-TIA IC
APD
BM-LA IC
Reset
Gain
Switching
Lock
CM
Signaling
VOS+
VOS-
R2
M1
VDD
R1
GS1 GS2
RF
V1+
Iin
TIA core
GS1
Buffer
V2-
V3+
V3-
-
Vout+
A1
Buffer
GS2
GS2
GS1
R4
RE
R4
GS2
Activity
Detection
R3
RE
Auto reset
generation
Decision
threshold
extracted
GS1
GS2
Gain steps
1
1
High-gain
Small Iin,pp
0
0
1
1
0
0
Medium-gain
Low-gain
-
Large Iin,pp
[1] X. Yin et al., ISSCC’12, pp. 416-417
[2] J. Put et al., EL, Vol. 47, 2011, pp.
970-972
Vout-
Pre-Amp with
CM signaling
R3
TIA dummy
V2+
Auto Reset
Generation
Vtia-
RF
Dummy
current
S2D
V1-
Activity
-
Vtia+
VCM
Reset
Offset Integrator with
Switchable Loop BW
5x faster
Activity
detection
Fast threshold
Slow threshold
extraction
tracking
Incoming
burst
Guard time
Reset
Preamble
Activity
Common-mode VCM
38
Payload
Outline

Introduction


 AC-Coupled & DC-Coupled BM-RX Configurations

Prototypes of IEEE/ITU-T BM-RXs/Sub-Systems
 IEEE 10G-EPON BM-RXs & System Performance
 10G-PON Fast Synchronization BM-RXs Performance

Summary
39
BM-RX Specifications in PON Systems
ATM-PON
GE-PON
G-PON
10G-EPON
10G-EPON
XG-PON
NG-PON2
Standard
ITU-T
G.983
(Class C)
IEEE
802.3ah
(PX20-D)
ITU-T
G.984
(Class C)
IEEE
802.3av
(PR-D3)
IEEE
802.3av
(PRX-D3)
ITU-T
G.987
(N2)
ITU-T
G.989.2
(FFS)
US data rate
155 Mb/s
1.25 Gb/s
1.25 Gb/s
10.3 Gb/s
1.25 Gb/s
2.5 Gb/s
10 Gb/s
10 bits
400+400ns
44 bits
800+400ns
400+400ns
>160 bits
2R: 200 ns*
-33 dBm
/ -11
-27 dBm
/ -6 dBm
-29 dBm
/ -8 dBm
-28 dBm
/ -6 dBm
-29.78/ 9.38dBm
-29.5 dBm
/ -9 dBm
-28 dBm
/ -6 dBm
Dynamic range
22 dB
21 dB
21 dB
22 dB
20.4 dB
20.5 dB
22 dB
BER condition
1E-10
1E-12
1E-10
1E-3 (FEC)
1E-12
1E-4 (FEC)
1E-3 (FEC)
Response time
Sensitivity
/ Overload
Response time: 2R RX settling time + CDR
ITU-T G.989.2 “40-Gigabit-capable passive
optical networks (NG-PON2): Physical media
dependent (PMD) layer specification” study
period 2013-2016 – no Spec yet
6.4dB FEC gain after 20km with
Reed–Solomon code (255, 223)
[1] M. Nakamura et al., BCTM’10, .pp.21-28
[2] Keiji Tanaka et al, JLT Vol. 28, No. 4, 2010, pp. 651-661
FSS: for further study
40
NTT IEEE 3R BM-RX Performance
1.7 mm x 1.7 mm
210 mW
B-CDR
1.05 mm x 0.9 mm
180 mW
RESET
-29.5dBm 3R BM-RX
sensitivity @ 200ns
B-TIA
B-LA
[1] Masafumi Nogawa et al, NTT Technical Review, Vol. 9 No. 3 Mar. 2011, pp. 1-7
41
Dual-Rate Triplexer for 10G-EPON OLT XFP TRX
 NTT Small and Low-Cost Dual-Rate Optical Triplexer [1]
 Full-duplex operation (10.3Gb/s and 1.25Gb/s TX ON).
10.3-Gb/s and 1.25-Gb/s
TX eye diagrams
[1] A. Kanda et al, OECC’12, 3D2-2, pp. 77-78
42
Mitsubishi Dual-Rate 3R BM-RX Performance
480 mW
280 mW
3W
RX_settling:
800ns
Experimental test-up
-31.2 dBm sensitivity
800ns settling
25.2 dB dynamic range
33.5 dB loss budget
[1] M. Noda et al., OFC 2012, OTh4G.6,
[2] J. Nakagawa et al., PTL, Vol. 22, No. 24, Dec. 2010, pp. 1841-1843,
43
Latest Progress BM Transceivers (Mitsubishi)
Demo set-up
RX_settling:
240ns
OLT XFP / ONU
SFP+ TRXs
US optical burst-packets
& US / DS loss budgets
- 35.9 dB loss budget
- 240 ns sync time
- 256-split with 15 km
transmission
[1] Satoshi Yoshima, ECOC
2012, Tu.1.B.3
44
10G-GPON Multi-Rate 2R BM-RX
 UGENT 10G/5G/2.5G Fast Settling 2R BM-RX without External RESET




Common-mode signaling  standard package (5-pin TO-CAN) to reduce cost
Feedback-type limiting amplifier with switchable time-constant  multi-rate operation (fast sync: ~75 ns)
Auto-Reset generation (miss Resets in case FEC used) - tolerant to high pre-FEC BER (1E-3) scenario
Robust Auto-Reset generation: count more bits (n) and allow errors (f) with programmable n and f.
External reset
VAPD
Test circuit
Biasing
APD
TIA core/
dummy
Gain
switching
S2D
Output
buffer
Common-mode
signaling
TIAc
High/
Medium
gain
BM-TIA
Lock
Auto-reset
generation
A3
Output
buffer
Reset
Gain switch
& lock
GS1
A2
A1
Medium
/Low
GS2 gain
TIAd
Offset integrator with
switchable BW
S2D
GS1
GS1
1.28mm x 1.02mm
200 mW
A4
Activity
detection
Reset
detection
BM-LA
GS2
Auto-RESET generation under Pre-FEC BER case [1-2]
V
Offset
integrator
SIGNAL
Guard time ( = noise)
with
decision level: 1
Burst 1
...
...
...
counter
restarts
...
Test
circuit
1.21mm x 1.26mm
430 mW
EoB detected
 reset generated
...
(k-n)
Output
buffer
t
counter
restarts
...
Limiting stages
Biasing
...
EoB detection threshold (n)
...
Reset
generation
Burst 2
0
EoB counter
COUNTER
counter
restarts
Activity
detection
erroneously received 1-bit
Pre-amp
...
Missing end-of-burst (EOB)
Reset probability vs guard time
Data
output
Buffer
...
k
t (1/bitrate)
[1] J. Put et al, Optics Express, Vol. 19, Nr. 26, 2011, pp. B604-B610, [2] X. Yin et al., ISSCC’12, pp. 416-417
[3] X. Yin et al., JOCN, Vol. 4, Nr. 11, Oct. 2012, pp. B68-B76
45
10G-GPON 3R BM-RX Performance
 Combined High Performance 10Gb/s BM-RX Experiments [1-2]
-31.9dBm RX sensitivity (BM-static, BER=1E-3), error free at -5dBm
-31.3 dBm Rx sensitivity (loud/soft ratio = 26.3 dB, BER=1E-3)
75 ns 2R RX settling time, 25 ns guard time, with on-chip RESET
80ns fast-lock PLL based BM-CDR (Vitesse sample)
BM-TX1
Data 1 BM-EAM
driver
.
.
.
TX2
TX#1
EML
TX1
TX2
10Gb/s upstream bursts
Att1
BM-TX2
ONUs
BM-laser
driver DFB
Data 2
Att2
TX1
1310nm
upstream
APD
BM-TIA
t
10G-GPON OLT
BM-LA
BM-RX
BM-CDR
Data output
Log10(BER)




-2
BM-B2B
BM-2TX
-31.3 dBm
≥ 26.3 dB dynamic range
-3
-4
-5
-31.9
dBm
-6
-26.8
dBm
-7
-8
-9
-10
-11
-12
-40
-35
-30
APD M=9,
10G NRZ PRBS 231-1
plus 72-bit CID,
guard time 25.6ns,
-26.2 settling time 76.8ns
dBm
-25
-20
-15
-10
≥ -5
dBm
-5
Input optical power (dBm)
Measured 2R BM-RX Performance
Att1
BMTX#1
25km
fiber
EAM
driver
BM-TIA IC
BM-LA IC
EML
BM-TX#2
2x2
splitter
Att2
BM-CDR
APD-TIA
test board
DFB TOSA
BM-LA test
board
10Gb/s 3R BM-RX Experimental Setup
[1] X. Yin et al., OFC’12, NTu1J.4
BM-RX
Measured 3R BM-RX Performance
46
0
10G-GPON 2R BM-RX for Multi-Rate Operation
 10G/5G/2.5Gb/s BM-RX Experiments with On-Chip Auto-RESET [1-2]





100 ns 2R RX settling time for 10G/5G/2.5G
50 ns guard time (longer guard time for Auto-Reset @ BER=1E-3)
Data payload: NRZ PRBS31 plus 72-bit CIDs
-31 dBm @ 10Gb/s Rx sensitivity (BER=1E-3, loud/soft ratio> 26dB)
-28.9 dBm @ 5G & 2.5Gb/s (BER=1E-10) (** input power < -31 dBm is too weak for on-chip Auto-Reset
circuit in current design)
 Superior CID tolerance up to 512-bit CIDs
Measured BER &
total jitter
[1] X. Yin et al., OFC’12, NTu1J.4
47
Future Work

EU FP7-Funded ICT DISCUS IP Project [1]
 Project start/end date: 01/11/2012 - 31/10/2015
 12 partners (TCD, ALUD, NSN, TID, TI, ASTON, IMEC, III-V, Tyndall+UCC, Polatis, ATE,
KTH)

LR-PON Physical Hardware to be Implemented within DISCUS
 10Gb/s burst-mode electronic dispersion compensation [2] supported by a linear BM-RX [3-4]
(Tyndall)
 40Gb/s downstream PMD components (IMEC, III-V)
 10/40Gb/s power-efficient bit-interleaved CDR / decimator (IMEC) [5]

System Integration and Proof Concept Test Bed
[1] FP7 ICT DISCUS IP Project http://www.discus-fp7.eu/,
[2] P. Ossieur et al., PTL, Vol., Vol. 20, Nr. 20, 2008, pp. 1706-170
[3] P. Ossieur et al., OPEX, 2011, pp. B604–B610,
[4] X. Yin et al., OPEX, 2012, B462-B469,
[5] C. Van Praet et al., OPEX, 2012, B7-B14.
48
Summary

Review of OLT BM-RX Requirements / Design Guidelines
 Optical power budget and network coexistance with deployed PONs
 Relaxed timing parameters but still shorter burst overhead for robust design and high yield manufacture
 Trade-off between cost effectiveness (die size, packaging, power consumption) and good enough
performance
 No external time-critical control signals cross PHY & MAC layer for better system interoperability

Overview of IEEE & ITU-T Fast Synchronization BM-RX Development
 AC-coupled & DC-coupled BM-RX Configurations
 Various 2R / 3R BM-RX Architectures
 Dual-rate and multi-rate operation

(Sub)-System Integration and Demonstration
 Technology for IEEE 10G-EPON BM-Rx is ready for production, need low cost-engineering work
 10G/5G/2.5Gb/s upstream burst-mode transmission demonstrated with excellent performance (elimination
of external reset, fast synchronization with fully programmable short overhead)  well suited for ITU-T
10G/10G symmetric PON systems
BM-RX design challenge: the combined requirements of high RX sensitivity, wide
dynamic range, short burst overhead, multi-rate operation, without external signaling
from MAC  Successfully demonstrated!
49
Acknowledgements

EU-Funded Projects: PIEMAN, MARISE, EUROFOS

INTEC_design Colleagues of INTEC Dept., Ghent University / IMEC

Bell Labs Alcatel-Lucent (Stuttgart, Murray Hill) for Bilateral Funding

III-V Lab (Marcoussis) Collaboration within MARISE

STMicroelectronics for Technical Support and Chip Fabrication

Sumitomo Electric Devices Innovations, Inc for 10Gb/s APD-TIA
Assembly

Vitesse Semiconductor for Providing 10Gb/s BM-CDR and DFB TOSA
50
References (1)
Ronald Heron, “Future Technologies for the Mass Market Residential Access Network”, Alcatel-Lucent, ECOC’10 WS5
ITU-T Recommendation G.983-987
IEEE P802.3av 10GEPON Task Force, http://www.802.org/3/av/index.html, 2009
Masaki Noda, Naoki Suzuki, Satoshi Yoshima, Masamichi Nogami, and Junichi Nakagawa, “Technology progress of high-speed burstmode 3R receiver for PON applications”, OFC’12, OTh4G.6
[Slide 4-4]
http://www.itu.int/itu-t/workprog/wp_search.aspx?sg=15
[Slide 5-1]
Rob Bond, Telcordia, “ITU PON – Past, Present, and Future - A Review of ITU-T PON Activities” FTTH Council Webinar, July 30, 2008,
[Slide 5-2]
Peter Vetter, “Next Generation Optical Access Technologies”, ECOC’12 Tutorial, Tu.3.G.1
[Slide 6-1]
http://www.gazettabyte.com/home/2012/4/4/fsan-close-to-choosing-the-next-generation-of-pon.html, “FSAN close to choosing the next
generation of PON”
[Slide 6-2]
Frank Effenberger, “XG-PON1 versus NG-PON2: Which One Will Win?”, ECOC’12, Tu.4.B.1
[Slide 6-3]
Martin Carroll, “FTTx Access in North America, Europe, and Other Regions – Status and Perspectives”, Joint ITU/IEEE Workshop on
Ethernet - Emerging Applications and Technologies Geneva, 22 Sept. 2012
[Slide 7-1]
Glen Kramer, “10G––EPON Drivers, Challenges, and Solutions”, ECOC’09 Symposium NG Optical Access
[Slide 8-1]
X.Z. Qiu P. Ossieur, J. Bauwelinck, Y.C. Yi, D. Verhulst, J. Vandewege, B. De Vos, P. Solina, "Development of GPO upstream physicalmedia-dependent prototypes", JLT, Vol. 22, 2004, pp. 2498-2507
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Naoto Yoshimoto, “Smooth migration Technology from GE-PON to NG-PON towards NGN era in Japan”, Computex Taipei Forum NGN2009
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C. Van Praet, H. Chow, D. Suvakovic, D. Van Veen, A. Dupas, R. Boislaigue, R. Farah, M. F. Lau, J. Galaro, G. Qua, N. P.
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54
The End
Thanks for your attention!
55

[OFC 2013 Tutorial OW3G.4] Burst-mode Receiver

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