Design and Test of Core-Based Systems
Transcription
Design and Test of Core-Based Systems
ECE 260C VLSI Advanced Topics: System-on-Chip Design Spring 2015 Sujit Dey ECE Department UC San Diego [email protected] http://esdat.ucsd.edu ECE 260C Sujit Dey Spring 2015 ECE 260C • Objective: System-on-Chip Design: Advanced Topics on SoC design and methodologies • Lectures: Tuesday, Thursday 2:00pm-3:20pm – Location: WLH 2207 • Professor Sujit Dey – Office Hours : Tuesday, Thursday 1:00pm-2:00pm – Office : Jacobs Hall 4404 – E-mail: [email protected] • TA: Cong Zhao – TA/Lab Hours: Monday, Wednesday, Friday 1:00-2:00pm – Office: EBU1 4307 – Email: [email protected] ECE 260C Sujit Dey Topics • Introduction to System-on-Chip Design • System Design Objectives and Design Alternatives • Hardware Design and Behavioral/RTL Synthesis – • Hardware/Software Co-Design – – • General Purpose, Domain-Specific Platforms Multi-core Processors (Embedded, Mobile, Servers, …) Multi-Processor System-on-Chip (MPSoC) Network-on-Chip Design – – – ECE 260C Methodologies, Design Flow, Design Trade-offs Hardware-Software Co-Simulation and Co-Verification SoC Platforms, and Multi-core, Multi-Processor SoCs – – – • Specifications, Scheduling, Resource Sharing and Assignment On-Chip Communication Architectures, Protocols, and Analysis Network on Chip Design Techniques; Case Studies On-chip routers and routing protocols Sujit Dey Topics - 2 • Low Power System Design/Green Computing – – – – – – – • Designing System-on-Chips using Nano-meter Technologies – – – – – ECE 260C Introduction to Low Power Design Low Power Processor/Software Design Power Management Techniques for SoCs Battery Aware Mobile/Embedded Devices Power Electronics for Renewable Energy, Smart Grids Smart Power Management Systems Energy Efficient Servers/Data Centers, Thermal Management Roadmap and Issues Leakage Current: Design Techniques Variability due to Process Variations, and Variability Tolerant Design Nano-meter Test Issues and Techniques Design for Reliability (Self-Repair etc) Sujit Dey Design Projects • Requirement: • Working knowledge of Verilog – no Verilog lessons will be given in this course • Schedule: • Project 1: April 14; Due: May 12 • Project 1 Presentation: May 12, 14, 19 • Project 2: May 14 • Due: May 28 ECE 260C Sujit Dey Grading Design Projects Project 1 Project 1 Presentation Project 2 Final Demonstration 25% 10% 15% 10% Project group size: 2 students Topic Survey and Research: • Term Paper 20% • Presentation 20% ECE 260C Sujit Dey ECE 260C Lab • Assigned ACS Lab • EBUI-4307 • 24-hour/day access with combination • Toolset: Mentor Graphics, Synopsys, ARM • Hardware Simulators and Synthesis Tools • Embedded Software Design Tools • Hardware-Software Co-Design/Simulation Tools ECE 260C Sujit Dey