Electrical and Computer Engineering 06-88-531

Electrical and Computer Engineering
06-88-531-01: VLSI Design
Course Syllabus - Summer 2015
Dr. Roberto Muscedere, Room 3040 CEI, Ext. 4798
Email: [email protected]
http://courses.muscedere.com
WELCOME
Welcome to the course 88-531-01: VLSI Design. The Graduate Assistant’s names
and contact office hours can be found on the course website (see above). Please see
the GAs regarding any questions about the course content. For other issues, please
come to room 3040 in the CEI. My office hours are flexible, so please contact me by
email to setup an appointment.
TIME AND PLACE
Lecture Periods:
Wednesdays from 1:00pm to 3:50pm in EH186
(working on changing this).
Additional Time:
You may use the resources in the RCIM lab (CEI
2205) as long as there are workstations available.
RCIM students and researchers have priority over
students in graduate courses.
COURSE CONTENT
The emphasis in this course is on the introduction of the industry standard
Electronic Design Automation (EDA) tools and the process technologies available
to the graduate students of the University of Windsor. These tools along with
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technology libraries are used in the development of digital, analog, and mixed
signal integrated circuits. Our concentration will focus on using the TSMC 0.18
micron CMOS process. Although this process is relatively old, it is not restricted by
the generally crippling Non-Disclosure Agreements of current fabrication processes
(<90nm) which allows us fairly more flexibility during the instruction of this
course. Since this course focuses the use of automated EDA tools, device level
modeling will not be covered as it can become very extensive and not necessary to
the tools operation. Our goals is to obtain a better understanding of the tools
abilities and how they can possibly be used in students research work to achieve real
world results. We shall cover the following tools through homework assignments:
1. Cadence dfII (40%)
• Virtuoso
• Full custom layout editor featuring design rule checking and extraction to
schematic circuits for simulation
• Used to create our own custom digital logic cells and analog building
blocks
• Analog Artist
• Analog/Mixed signal simulation tool
• Used to perform simulations to determine the proper transistor sizes to
optimize the custom designs based on power, speed, or space
• LVS (Layout versus Schematic)
• Comparison tool to compare schematics to custom layouts
2. Cadence Native Compiler (NC) Verilog/VHDL or VerilogXL (20%)
• Verilog Simulator
• Used to verify the functionality of your Hardware Description Language
(HDL) designs prior to implementation
• Can also be used to verify gate-level net-lists to original HDL designs
3. Synopsys Design Compiler (15%)
• HDL Synthesizer
• Used to generate a gate level design of our described HDL code
• Many options can be selected to optimize the design for power, speed, or
space
4. Cadence Encounter (25%)
• Automated Digital Design front-to-back end implementation tools
• Used to take your gate-level code and create a fully implemented design
ready for fabrication
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LEARNING OUTCOMES
The individual key learning outcomes are listed below:
Index
Learning Outcome
1
Learn to use the available EDA tools for designing custom layouts,
simulation behavioural designs, synthesising behavioural designs,
simulating synthesised designs, implementing and verifying
synthesised designs
2
Design custom cells with user set constraints (size, speed, power)
3
Analyze the performance of the custom cells; compare physically
designed cells with simulatable versions
4
Design a high level, multiple hierarchy system, using behavioural
constructs
5
Simulate the behavioural system
6
Synthesis the behavioural system into a physical version (gates)
7
Simulate the gate version of the design to ensure the system model
is honoured
8
Implement the physical version into a full layout which can be used
for fabrication; verify to ensure no process or timing violations exist
EVALUATION METHODS
Due to the nature of the material covered in the course, examinations will not be
required as they may not reflect, in the given time, the students knowledge of the
material. Instead the course grading will be based on the 4 homework assignments
listed in the “learning outcome” section.
FINAL GRADE ASSIGNMENT
The sum of the above marks will be rounded to the nearest integer and submitted to
the Registrar. Do your best throughout the course and do not assume that “I now
have enough marks to pass”.
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LECTURES
Students should seize the opportunity to share and discuss information in lectures,
labs, and tutorials as attendance is critical to student success. Courses are designed
to move swiftly and efficiently. Although all the lectures and labs are posted online,
a student should contact the instructor prior to missing a lecture or a GA prior to
missing a lab so that the impact of missing the session will be known in advance.
Students are encouraged to utilize office hours as much as possible to ask questions
or to resolve any issues with the course material. Emails will generally be
responded to within 24 hours from Monday to Friday. Only emails sent from a
“uwindsor.ca” email address will be responded to. Emails should be sent with
courtesy using a salutation (e.g., Hello Dr. Name), an informative subject line, a
body, and a closing with your name (e.g., Best regards, Name) and an easy form of
identification such as your SID.
Any excessive talking, noises or other inappropriate behaviour by students can
disrupt the lecture and disadvantage those present. Thus, any student(s) engaging in
disruptive behaviour, as deemed by the instructor, will be required to leave the
lecture room and possibly withdraw from the course.
The use of technology during lectures and tutorials is limited to resources
associated with this course, such as lecture notes and simulation tools. Social media
and general web surfing are never acceptable uses of technology during class, and
consequently distracts other students. If a situation arises where communication by
e-mail or mobile phone is needed, please respect all present in the lecture and leave
the classroom to attend to the matter, and return once it is resolved.
Your co-operation in this matter will be appreciated.
STUDENT EVALUATION OF TEACHING (SET)
The Student Evaluation of Teaching (SET) forms will be distributed during one of
the last four lectures (in April 2015); the actual date will be given as that time
approaches. Please attend as this is your opportunity to provide feedback to the
University regarding the course as well as the instructor.
ACADEMIC INTEGRITY
All incidents of academic dishonesty will be documented with the Associate Dean
of Engineering - Academic where University procedures will be followed. Such
incidents may include, but are not limited to: submission of assignments other than
your own, receiving or sharing prior knowledge of test questions, sharing or
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receiving information during a test by any means (including electronic), possession
of any electronic device (including cell phones) during a test except for an approved
calculator, sharing or receiving knowledge of a test with students who have not yet
written the test, sharing a calculator or formula sheet during the test, using a
solutions manual to prepare submitted assignments.
Plagiarism is the act of copying, reproducing or paraphrasing portions of someone
else's published or unpublished material (from any source, including the internet),
without proper acknowledgement. Plagiarism applies to all intellectual endeavours:
creation and presentation of music, drawings, designs, dance, photography and
other artistic and technical works. In the case of oral presentations, the use of
material that is not one's own, without proper acknowledgment or attribution,
constitutes plagiarism, and hence academic dishonesty. (Students have the
responsibility to learn and use the conventions of documentation as accepted in their
area of study.)
See “Windsor Bylaw 31: Student Affairs and Integrity” at “http://www.uwindsor.ca/
senate” for more information.
USE OF TURNITIN® PLAGIARISM-DETECTION SERVICE
Turnitin will be used in this course to verify the genuineness of the reports
generated by the students. The nature of these reports should generate vastly
different results between students. This service is used to ensure that these results
should be unique from current and past years students.
SERVICES AVAILABLE TO STUDENTS AT THE UNIVERSITY OF WINDSOR
Students are encouraged to discuss any disabilities, including questions, and
concerns regarding disabilities, with the course instructor. Let's plan a comfortable
and productive learning experience for everyone. The following services are also
available to students:
Student disability services: http://www.uwindsor.ca/disability
Skills to enhance personal success (S.T.E.P.S.):
http://www.uwindsor.ca/lifeline/steps-skills-to-enhance-personal-success
Student counseling centre: http://www.uwindsor.ca/scc
Academic advising centre: http://www.uwindsor.ca/advising
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