Experimental Damage Mechanics of Micro/Power Electronics of Solder

Transcription

Experimental Damage Mechanics of Micro/Power Electronics of Solder
International Journal of Damage
Mechanics
http://ijd.sagepub.com
Experimental Damage Mechanics of Micro/Power Electronics Solder
Joints under Electric Current Stresses
Hua Ye, Cemal Basaran and Douglas C. Hopkins
International Journal of Damage Mechanics 2006; 15; 41
DOI: 10.1177/1056789506054311
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Experimental Damage Mechanics
of Micro/Power Electronics
Solder Joints under
Electric Current Stresses
HUA YE
Energy and Environmental Technology Applications Center
College of Nanoscale Science and Engineering
State University of New York, Albany, USA
CEMAL BASARAN* AND DOUGLAS C. HOPKINS
Electronic Packaging Laboratory
University at Buffalo
State University of New York, Albany, USA
ABSTRACT: Experimental damage mechanics of flip chip solder joints under
current stressing is studied using 20 test vehicle flip chip modules. Three different
failure modes are observed. The dominant damage mechanism is caused by the
combined effect of electromigration and thermomigration, where void nucleation
and growth lead to the ultimate failure of the module. It is observed that thermomigration driving forces are stronger than electromigration; as a result thermomigration, not electromigration, determines the site of void nucleation. The void
nucleation and growth modes and their preferred sites are also observed and
discussed in detail. The interface between the Ni barrier layer and the solder joint is
found to be the favorite site of void nucleation and growth. The effect of pre-existing
voids on the failure process of a solder joint is also studied. It is observed that Black’s
time to failure law for thin films is unreliable for solder joints.
KEY WORDS: thermomigration, electromigration, damage mechanics, solder
joints, nanoelectronics, microelectronics, power electronics, solder joint reliability.
INTRODUCTION
LECTROMIGRATION IN SOLDER joints under high electrical direct
current density is a reliability concern for the future high-density
microelectronics, nanoelectronics, and power electronics packaging
E
*Author to whom correspondence should be addressed. E-mail: [email protected]
International Journal of DAMAGE MECHANICS, Vol. 15—January 2006
1056-7895/06/01 0041–27 $10.00/0
DOI: 10.1177/1056789506054311
ß 2006 SAGE Publications
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41
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ET AL.
(Lee and Tu, 2001; Lee et al., 2001; Ye et al., 2002a,b,c, 2003a,b,d). The
trend in flip chip, ball grid array (BGA), and chip scale packaging (CSP) is
to increase I/O count and IC density, which drives the interconnecting
solder joints to be smaller in size, larger in number and, thus, carry higher
current density. The current density will increase further as the chip voltage
decreases and absolute current levels increase. The same trend also occurs in
flip chip power electronics and the evolving system-on-package (SOP)
power processors (Liu et al., 1999, 2000; Liu and Lu, 2001; PaulastoKrockel and Hauck, 2001). The physical limits to increasing current density
(and further miniaturization of the whole package) in both micro/
nanoelectronics and power electronics are electromigration and thermomigration. Due to their relatively large size and low current densities,
electromigration-and thermomigration-induced failure in solder joints has
not been a concern until now. The research on electromigration in solder
joints is still in its early stages and literature on the subject is sparse. The
damage mechanics of flip chip solder joints under high electric current
stressing is not yet well understood. Thermomigration has also not been a
problem till now, because of low joule heating that takes place under low
current densities in the existing technology. In the next generation
electronics packaging, joule heating due to higher current density will be
much larger. As a result, thermomigration in solder joints will become a
major reliability issue.
In this research, 20 test vehicle flip chip modules, provided by
Motorola, were subjected to dc electric current stressing for more than
3000 h. The current levels ranged from 0.5 to 1.5 A, which led to current
densities in the solder joint in the range of 0.4 104–1.2 104 A/cm2,
depending on the cross-sectional area of the solder joint. Two
test modules were subjected to dc pulse current stressing at a level of
3–10 A. Fourteen test modules failed due to current stressing, four were
damaged due to mishandling (human error), and two survived more than
3000 h of stressing and never failed. Table 1 shows the test matrix of the
experiment.
Table 1. Test matrix of flip chip modules.
Current level (A)
0.5
1
0.9
1.15, 1.5
Pulse
Test module number
M8, M15, M26
M1, M6, M12, M14, M22, M31, M33, M41, M42, M51, M52, M54, M56
M34
M5, M53
M4, M7
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Damage Mechanics of Micro/Power Electronics Solder Joints
EXPERIMENTAL SETUP
The test vehicle module has a dummy silicon die with only aluminum
(Al) conductor trace on it. The silicon die is attached to a FR4 printed
circuit board (PCB) through eutectic Pb37–Sn63 solder joints. The copper
plates on the PCB provide the wetting surface and electric connection to
the solder joints. The under bump metallization (UBM) on the silicon die
side is electroless Ni. The space between the solder joints is filled with
underfill epoxy. The thickness of the Al trace is about 1 mm and the
width is about 150 mm. The diameter of the solder joint is around 150 mm
and the height is about 100 mm. The test module was cross-sectioned
and finely polished toward the center of the solder joints before being
subjected to current stressing. Two solder joints were tested on each
module. The solder joints on each test module is named in such a way
that current always flows from the copper trace through solder joint A
into the Al trace on the silicon die side and then flows through solder
joint B to another copper trace on the PCB side. Figure 1 shows the
schematic cross section of the test vehicle module and the direction of
current flow in the experiments. During the course of current stressing,
the test modules were taken off circuit for imaging by scanning electron
microscopy (SEM). Since it is very difficult to measure the temperature
on a 100-mm solder joint directly, the temperature of the silicon die was
measured during current stressing with a fine-tipped thermal couple
thermometer (OMEGAÕ HH-602). In a coupled thermal–electrical finite
element simulation, Ye et al. (2003c) predicted that the temperature in
the solder joint would be very close to the temperature on the silicon die,
in this test module. The temperature measurements, which we conducted
on similar modules indicate that there are only a few degrees (Celsius) of
difference between the temperature at the top of the Si die and on the
PCB substrate.
Solder joint A
Cu plate
Al trace
Solder joint B
Si die
i
Encapsulation
Current flow i
i
FR4
Figure 1. Schematic cross section of the test module.
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OBSERVED FAILURE MODES
Three types of failure modes were observed in our experiments:
(1) Failure of the solder joint by melting due to high temperature;
(2) Failure of the Al trace by melting due to high temperature;
(3) Failure of the solder joint due to void nucleation and growth.
The reason for the first type of failure is obvious since the Pb–Sn eutectic
solder has a low melting point of 183 C. Modules M31, M33, and M53
exhibited this type of failure. M31 and M33 failed just after 30 min
of current stressing with a measured Si die temperature of over 200 C.
The solder joints in these two test modules melted. The heat in M31 was
apparently generated in the Al trace since the solder joint has good wetting
with both Ni UBM on the Si die side and Cu plate on the FR4 side.
Therefore, we assume Al trace contributed to most of the resistance. The
heat in M33 might have come from both Al trace and solder joint A since in
this module, solder joint A had very poor wetting with Cu plate as shown in
Figure 2. For modules M31 and M33, electromigration and thermomigration should have no contribution to the failure mechanism of the module
due to their short life. Module M53 survived just 22.5 h of current stressing.
The initial temperature of the Si die is 150 C, which then gradually increased
to 180 C. Figure 3 shows that even half an hour before the final failure,
solder joint A was already nearly melted. Figure 3 also shows a
misregistration of solder joint B (solder joint is misaligned with respect
to the copper pad underneath) in Module 53. Due to the time elapsed,
thermomigration forces were effective in this module’s failure.
Thermomigration is clearly visible in solder B as big voids are observed
near the Ni UBM–solder interface. Since the temperature of the Si die was
180 C, an extremely high (2000 C/cm) thermal gradient existed in the solder
Figure 2. Secondary scanning electron micrographs of M33 after failure: (a) solder joint A
and (b) solder joint B.
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Damage Mechanics of Micro/Power Electronics Solder Joints
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Figure 3. Secondary scanning electron micrographs of M53 after failure: (a) solder joint A
and (b) solder joint B.
joint to trigger thermomigration, as predicted by the 3-D coupled thermal–
electrical FE simulation reported by Ye et al. (2003a). For module M53,
we did not observe any void nucleation in the cathode side of the solder
joint A or B. As a result, it is safe to assume that thermomigration forces
were much stronger than electromigration forces, which resulted in void
nucleation in the high temperature side of solder joint B. For solder joint A,
electromigration and thermomigration forces are in the same direction,
from the silicon die side (cathode) to the PCB side (anode). Interaction of
electromigration field forces and thermomigration field forces are discussed
in Basaran et al. (2003).
Modules M4, M5, M7, and M54 experienced Type 2 failure. Modules M4
and M7 were subjected to pulsed direct current (PDC) stressing and
modules M5 and M54 were subjected to direct current only, as all other
modules. A TektronixÕ 371A programmable high power curve tracer was
used for pulse stressing. The pulse frequency of the PDC was 120 Hz with
a pulse width of 80 ms. The pulse shape depends on the wiring impedance,
but resembles a rectangular wave. The duty factor (defined as the ratio of
duration of the on-period to that of the whole pulse period) was calculated
as 0.96%. When M4 was subjected to a 10-A peak PDC stressing, its
resistance increased to infinity immediately. The scanning electron micrograph in Figure 4(a) clearly shows that the damage of the module was in the
Al trace and silicon die. M7 was first subjected to a 3-A PDC stressing for
50 h, then a 5-A PDC stressing for 57 h, and finally a 7-A PDC stressing for
23 h. Scanning electron micrographs taken after stressing show that there
was no microstructural change or void nucleation in the solder joints at all.
When M7 was subjected to a 10-A PDC stressing, it failed immediately.
Figure 4(b) shows that the Al trace eventually melted.
With a 7-A PDC, the peak current density in the solder joints was about
5–7 104 A/cm2, which is much higher than the one we applied in the dc
current stressing experiments. The effect of PDC on electromigration has
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Figure 4. Failure in the Al trace and Si die: (a) M4, solder joint A and (b) M7, solder joint A.
been shown to be dependent on the frequency and duty factor (Li et al.,
1999). At a low frequency, electromigration acts as if it were dc for the time
‘on’ and back diffusion may occur during the time ‘off ’ (Lloyd, 1999). In
our experiment, the PDC frequency of 120 Hz is within the low frequency
regime. The reason for why we did not observe any damage in the solder
joint during PDC stressing even when a very high current density was
applied may be the low duty factor (0.96%) of PDC. This has two effects on
electromigration: (1) the joule heating generated in the Al trace during time
‘on’ is readily dissipated before it transfers to the solder joints; therefore, the
temperature on the solder joints during the whole pulse period is low (close
to ambient). The low temperature also leads to a low diffusivity of solder,
which makes the solder joint less prone to migration; (2) the low duty factor
means less accumulated ‘on’ time and more ‘off ’ time for back diffusion.
The accumulated ‘on’ time of M7 during its 130 h of PDC stressing is about
1.3 h. On the other hand, the high peak current of PDC generates a lot of
heat in the Al trace, which leads to its failure even though the melting
temperature of Al is much higher than that of eutectic Pb–Sn.
Modules M5 and M54 also experienced Type 2 failures although they
were subjected to dc stressing only. The applied current on M5 was 1.5 A
and the module immediately failed. Secondary scanning electron micrographs of the solder joint B before and after stressing is shown in
Figures 5(a) and (b). Figure 5(b) shows that the Si die separated from the
solder joint and underfill material along the Al trace, where tremendous
heat was generated. When 1 A of dc current was applied to M54, the
resistance of the module immediately increased from 1.6 to 9 . There was
no microstructural change or void nucleation on the solder surface after the
failure of module, as shown in Figure 6. The failure is in the Al trace. The
initial module resistance of 1.6 (compared to 0.4–0.6 for all other
modules) indicates that the Al trace might have been partially damaged
during polishing process and can be easily damaged by a high electric
current density.
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Damage Mechanics of Micro/Power Electronics Solder Joints
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Figure 5. Secondary scanning electron micrographs of M5, solder joint B: (a) initially and
(b) after failure.
Figure 6. Secondary scanning electron micrographs of M54, solder joint B: (a) initially and
(b) after failure.
Modules M6, M14, M34, M41, M42, M51, and M56 exhibited Type 3
failure mode. In these modules, severe void nucleation and growth were
observed in the solder joints before failure. The fact that void nucleation was
always on the Si die side (cathode) and mass accumulation on the Cu plate
side (anode), indicates that the failure process in solder joint is the combined
effect of electromigration and thermomigration, where thermomigration
forces are larger than electromigration forces, as shown in Figure 7. If
electromigration forces were larger than thermomigration forces, void
nucleation would always happen on the cathode side and hillocks would
accumulate on the anode side. It should be remembered that in electromigration, atomic flux divergence is from the cathode side to the anode side;
for thermomigration, it is from the hotter side to the colder side. In these
modules, solder joint A (where the direction of electromigration is the same
as that of thermomigration) always had a much larger void nucleation than
solder joint B (where the direction of electromigration is opposite to that of
thermomigration). Therefore, the degradation of solder joint A caused the
ultimate failure of the modules that experienced type 3 failure mode.
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Figure 7. Secondary scanning electron micrographs: (a) module M34, solder joint A, 95 h
before failure; (b) module M42, solder joint A, 2 h before failure; (c) M51, solder joint A, after
168 h stressing; and (d) M51, solder joint B, after 168 h stressing.
Type 1 and Type 2 failures are not due to electromigration or thermomigration in solder joints, because there was no time for the migration to
happen before the module failed due to other causes (except in M53, where
migration might have taken place, but the failure cause was still high
temperature since solder joint A was totally melted at the end). In this
article, we focus on Type 3 failure since the primary concern in this research
is thermo/electro migration of solder due to current stressing.
VOID NUCLEATION MECHANISMS AND PREFERRED SITES
In order to understand the electromigration- and thermomigrationinduced damage mechanisms, it is important to analyze the void nucleation
modes in solder joints during current stressing and their relationship
with the failure. In addition to the modules that exhibited type 3 failure
(thermomigration- and electromigration-induced failure), there were other
modules which had void nucleation also but never failed even after 3000 h
of testing. Some modules failed during the course of experiments due to
mishandling. In this section, the void nucleation mechanism observed in
all these modules is discussed. Four types of void nucleation modes were
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Table 2. Summary of void nucleation and growth modes in the experiment.
Void nucleation and growth mode
Module number
Mode 1 (at the Ni UBM–solder interface)
M1 (solder A)
M12 (solder A and B)
M34 (solder B)
M51 (solder A and B)
M6 (solder A and B)
M14 (solder A and B)
M42 (solder A and B)
M53 (solder B)
Mode 2 (near the UBM–solder interface)
M34 (solder A)
M56 (solder B)
M41 (solder B)
Mode 3 (growth of pre-existing voids)
M41 (solder A)
M56 (solder A)
M52 (solder A and B)
Mode 4 (no void nucleation)
M7 (solder A and B)
M15 (solder A and B)
M8 (solder A and B)
M26 (solder A and B)
observed: (1) voids nucleate and grow at the interface between the Ni UBM
and the solder joint; (2) voids nucleate in the region near the Ni UBM–
solder joint; (3) growth of pre-existing voids; (4) no void nucleation and
growth after 3000 h of current stressing. Table 2 gives a summary of void
nucleation and growth mode exhibited by these modules and the assigned
module number.
Mode 1
The voids were observed to nucleate and grow at the Ni UBM–solder
joint interface for the majority of the solder joints in our experiments. This
interface was the favorite site for void nucleation and growth because of
the diffusive properties of the interface, and the thermal gradient direction.
The combined electromigration and thermomigration effect leads to a
significant atomic flux divergence in this region for solder joint A, where
electromigration and thermomigration forces are acting in the same
direction. For solder joint B, electromigration forces are in the direction
opposite to that of the thermomigration forces. As thermomigration forces
are larger, the void nucleation is in the cathode side, which is also the higher
temperature side. This observation is in agreement with results reported
earlier by Ye et al. (2003c). Theoretical electromigration analysis indicates
that maximum tensile spherical stress will be generated in the cathode region
and vacancy condensation will also occur in this region (Blech and
Kinsbron, 1975; Blech, 1976; Blech and Herring, 1976; Blech and Tai,
1977; Kirchheim, 1992; Korhonen et al., 1993; Povirk, 1997; Rzepka et al.,
1997; Park et al., 1999; Sarychev and Zhinikov, 1999; Basaran et al., 2003;
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Ye et al., 2003b). The driving force for void nucleation and growth is
proportional to the tensile stress (Gleixner and Nix, 1999). Gleixner and Nix
(1996) numerically calculated the void nucleation rate in passivated
interconnect line due to electromigration and thermal stresses (not
thermomigration). On the basis of vacancy condensation theory, Raj and
Ashby (1975), and Hirth and Nix (1985) suggested that void nucleation by
vacancy condensation in the lattice is extremely slow and would not
be expected to lead to void nucleation in reality. Flinn (1995) proposed the
possibility of contaminants at the metal–passivation interface acting as void
nucleation sites in passivated metal lines. Gleixner and Nix (1996) analyzed
the effect of contaminants on void nucleation and found that void
formation at a flaw at the interface would require a considerably smaller
stress than that in the classical void nucleation theory. They further
concluded that voids would grow only at the intersection of the grain
boundary with the passivation layer due to the large, strong diffusivity of
the grain boundary compared to the lattice diffusivities. For void growth
to occur, atoms must be removed from the void surface and the grain
boundary acts as an extremely fast path for material removal relative to
the lattice (Gleixner and Nix, 1996). Raj (1978) showed that heterogeneous
nucleation at the triple junction of a second-phase particle and a grain
boundary was the most probable one. Based upon the findings of other
researchers and our observations, it is safe to state that the Ni UBM–solder
interface is the preferred site for void nucleation and growth, because of
diffusive properties. In our experiments, the voids nucleated at the interface
of the grain boundary of the Ni–solder intermetallic compound probably
with the assistance of contaminants that are at the interface. In
microelectronics, manufacturing contaminants are regularly introduced at
interfaces (Basaran et al., 2002). Figures 8 and 9 show examples of Mode 1
void nucleation and growth at the Ni UBM–solder joint interface.
Figure 8. Secondary scanning electron micrographs of module M12 solder joint A: (a) at
16 h and (b) at 36 h.
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Damage Mechanics of Micro/Power Electronics Solder Joints
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Figure 9. Secondary scanning electron micrographs of module M42, solder joint A: (a) at
60.5 h and (b) at 178 h.
Figure 10. Secondary scanning electron micrographs of module M34, solder joint A: (a) at
22 h; (b) at 268 h; (c) at 444 h; and (d) at 865 h.
Mode 2
Void nucleation and growth were observed near the Ni UBM–solder joint
interface (cathode side for solder joint A and anode side for solder
joint B). Only three solder joints were observed to have failed in Mode 2.
Figure 10(a) shows the solder joint A in M34 after 22 h into current
testing. Figure 10(b) shows the void nucleation in the region near the
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Ni UBM–solder interface, after 268 h of current stressing. Hillocks were
observed to build up near the solder–Cu plate interface. Figure 10(c) shows
that voids grow and develop into a severe depression in the region near the
Ni UBM–solder interface after 444 h of current stressing (please note that
the depression was filled with thermal compound left over when using a
thermal couple to measure the temperature). One unexpected observation
is the void nucleation in the anode/cooler region, where hillocks are also
formed. The origin of these voids is not clear. Since they were in the anode/
cooler region (downwind region of thermomigration and electromigration),
where atoms diffuse into and the material experiences compressive stresses,
the theory of void nucleation and growth under tensile stresses does not
apply.
One possibility of this observation is the void nucleation and growth
under shear stresses. Xue et al. (2002) reported that the shear bands are
the preferred sites for nucleation and coalescence of voids, and are, as such,
precursors to failure in titanium and Ti–6Al–4V alloy. In the hillocks region
of solder joint A in M34, the material was subjected to biaxial compression
stress according to electromigration theory, but in the direction perpendicular to the solder surface, the normal stress is zero. Therefore, in addition
to the compressive stresses, the material in this region is also subjected to
shear stresses and this might cause the onset of new voids. Figure 10(d)
shows the solder joint A after 865 h of current stressing (which is 100 h
before final failure). More severe depression in the interface region of
Ni UBM–solder joint was observed. In the meantime, void nucleation at
the interface between the Ni UBM and the solder joint was also observed,
indicating that this site was still the preferred position for void nucleation
even if voids initially nucleated elsewhere. An interesting observation in
this figure is that the void nucleation in the hillocks regions was actually
becoming smaller after 400 h of current stressing. This probably indicates
that after the voids in the anode/cooler (hillocks) region nucleate and grow
to a certain extent, the stresses triggering this void growth is counterbalanced by compressive stresses resulting from mass accumulation in this
side; therefore, no more growth of voids in these regions was observed. Since
the hillocks region is where the atoms diffuse into, the healing of the
previous voids was observed. The void nucleation and growth in the hillocks
regions were not the direct cause of failure of the solder joint because they
were superficial.
Figure 11(a) shows the micrograph of solder joint A after 911 h of current
stressing. The image was taken right after polishing following scanning
electron microscopy and nanoindentation testing, hence hillocks and voids
near the anode side were polished away. The voids near the Ni UBM–
solder joint interface were clearly the dominant damage mechanism.
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Damage Mechanics of Micro/Power Electronics Solder Joints
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Figure 11. Secondary scanning electron micrographs of module M34, solder joint A: (a) after
911 h and (b) failed after 960 h.
The micrograph after the failure indicates that the direct cause of failure
was the severe void growth in the UBM–solder interface region as shown in
Figure 11(b). It is noteworthy that module M34, solder joint A was the only
solder joint to be found with void nucleation in the hillocks region among all
the modules we tested. Yet, these voids disappeared once we polished away
a couple of microns from the exposed surface. Void nucleation and growth
in the region near the Ni UBM–solder interface was also found in solder
joint B of M41 and solder joint B of M56. But they were much less severe
compared to solder joint A in module M34 because the direction of
thermomigration is opposite to that of electromigration in solder joint B.
Of all the solder joints that were tested, only three solder joints had Mode 2
void nucleation and growth, indicating that void nucleation in the region
near the UBM–solder interface is less favorable than the interface itself.
INFLUENCE OF PRE-EXISTING VOIDS
ON VOID NUCLEATION AND GROWTH
Some solder joints we tested, had pre-existing voids. These pre-existing
voids are produced during the manufacturing process. Some of these preexisting voids lead to Mode 3 void growth where the growth of pre-existing
voids causes the ultimate failure of the test module. According to our
experimental results, whether these pre-existing voids would grow or not
depends on their location: if the pre-existing voids are located in the region
near the Ni UBM–solder interface where atoms diffuse out due to the
combined effects of thermomigration and electromigration, they are likely to
grow; if the voids are not located in the UBM–solder interface region, they
are very unlikely to grow. This observation is best presented in Figure 12.
As shown in Figure 12(a), there were several pre-existing voids on the crosssectioned surface of solder joint A of module M56. One small void with an
irregular shape was located in the region near the UBM–solder interface;
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Figure 12. Secondary scanning electron micrographs of module M56 solder A: (a) initially;
(b) at 269 h (after re-polishing); (c) at 932 h; and (d) at 1267 h.
and several others were located near the Cu–solder interface, two of them
with a round shape and others with an irregular shape. It is clearly shown in
Figure 12(b)–(d) that only the pre-existing void in the region near the UBM–
solder interface grew dramatically to form a big crack in that area. On the
other hand, other bigger voids near the Cu pad–solder joint interface did not
grow very much, no matter what their initial shapes were, although they
did change their shape a little bit possibly due to the local stress buildup
and local surface diffusion. This observation agrees with Lee et al.’s (2001)
solder joint electromigration experiment. Figure 12(c) and (d) shows that
besides severe void growth in the region near the UBM–solder joint
interface, two hillocks gradually formed and a depression area was formed
between these two hillocks.
This observation indicates that the diffusion process was not homogeneous within the solder joint. Careful examination of the phase structure
reveals that the Pb-rich phase in the depression region was not equiaxially
shaped and had a preferred orientation (close to the direction of current
flow and thermal gradient) compared to that in the hillock regions as
shown in Figure 13. This preferred Pb-phase orientation was formed during
manufacturing and was preserved during current stressing. According to
Kwok and Ho (1988), the effective boundary diffusion coefficient, Da,
equals Dgb/d, where is the grain boundary width, Dgb is the grain
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Damage Mechanics of Micro/Power Electronics Solder Joints
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Figure 13. Backscatter scanning electron micrographs of M56 solder A: (a) initially and
(b) after 269 h.
boundary diffusivity, and d is the average grain size. Although the Pb-phase
size is not the actual grain size, there ought to be a linear relationship
between this phase size and grain size; the larger the phase size, the larger the
grain size. The oriented nonequiaxed phase structure indicates an oriented
nonequiaxed grain structure, which leads to the difference of average phase
size in different directions. This means that the effective diffusivity may not
be isotropic in this region, and therefore the diffusivity in the whole solder
joint is inhomogeneous. The observation suggests that the microstructure
of eutectic Sn–Pb solder joint affects its diffusion property and therefore, the
failure process under current stressing.
Figure 14 shows another example of the growth of pre-existing voids. The
pre-existing voids in solder joint A of module M41 were located very near to
the Ni UBM–solder interface and were created during initial manufacturing
as shown in Figure 14(a). The pre-existing voids grew rapidly toward the
UBM–solder interface and led to the ultimate failure of the module as
shown in Figures 14(b)–(d). New void nucleation at the UBM–solder
interface was also observed in addition to the growth of pre-existing voids
during current stressing as shown in Figure 14(c). Instead of observing
hillock buildup near the Cu pad–solder interface region, crack initiation was
observed as shown in Figure 14(c) and (d), and finally interconnected to
form a diagonal crack across the solder joint and a horizontal crack parallel
to the Cu–solder interface. This observation reveals the complexity of the
stress condition in solder joint during current stressing although solder joint
A of module M41 was the only solder joint in which we observed this
phenomenon.
A different type of pre-existing void was observed in solder joints A and B
of module M52, where all the pre-existing voids were distributed in the
Pb-rich phase, as shown in Figure 15(a). These pre-existing voids were
created during manufacturing itself. The reason for these voids being only in
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Figure 14. Secondary scanning electron micrographs of module M41 solder A: (a) initially;
(b) at 37.5 h (after re-polishing); (c) at 60.5 h; and (d) failure after 61 h.
Figure 15. Secondary scanning electron micrographs of module M52 solder A: (a) initially;
(b) at 66 h; (c) at 590 h; and (d) at 914 h.
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Damage Mechanics of Micro/Power Electronics Solder Joints
57
the Pb-rich phase is not clear. Some of the pre-existing voids were found to
grow after 66 h of current stressing as shown in Figure 15(b) and the growth
of these pre-existing voids seemed to be restricted within the Pb-rich
phase. This observation indicates that atoms in the Pb-rich phase diffused
underneath the surface of solder joint under the combined effect of
electromigration and thermomigration. Some new void nucleation at the
Ni UBM–solder interface was also observed despite the existence of preexisting voids. The pre-existing voids seemed to cease to grow after the
voids occupied the whole area of the former Pb phase and did not expand
into the Sn-rich phase after a certain time of current stressing as shown in
Figure 15(c) and (d). In the mean time, the newly nucleated voids at the
interface between the Ni UBM and solder joint continued to grow. After
914 h of current stressing, severe void growth and depression near the Ni
UBM–solder interface and hillock buildup near the Cu pad–solder joint
were observed as shown in Figure 15(d).
Among the modules tested, some never experienced void nucleation
and growth after an extensive time (3000 h) of current stressing as shown in
Table 2. Module M7 was subjected to low-frequency PDC stressing at
different current levels from 3 to 7 A with a duty factor of 0.96%. Although
the peak current density in the solder joints were extremely high, the low
duty factor prevented the void nucleation from being observed before the Al
trace failed as explained in the previous section.
Modules M8, M15, and M26 were all subjected to a dc current stressing
of 0.5 A. A relatively low current level leads to a relatively low current
density in the solder joints as well as minimal joule heating within the Al
trace. Therefore, both the electromigration- and thermomigration-induced
damage were much less severe than what solder joints in other modules
experienced, where a higher level of current density was applied. The current
density calculated based on the estimated cross-sectional area in the
solder joints of modules M8 and M26 range from 0.57 to 0.75 104 A/cm2.
Pb-phase growth was clearly observed in the solder joints in both the
modules, for example as shown in Figure 16; and both the modules were
eventually destroyed during re-polishing after nanoindentation tests.
The Pb-phase coarsening within a relatively short period of time
indicates that electromigration and thermomigration were still operative
in these solder joints during current stressing. The authors think that
lower current density and lower stressing temperature lead to a longer
incubation time for void nucleation. Therefore, the voids in these solder
joints did not have enough time to nucleate to an observable size before the
modules failed due to mechanical polishing. On the other hand, when
the current density and stressing temperature is really low, the effect of
electromigration may become almost invisible; even the modules will be
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Figure 16. Backscatter scanning electron micrographs module M8 solder A: (a) initially and
(b) at 149 h.
Figure 17. Backscattered scanning electron micrographs of module M15 solder A: (a) at
224 h (after re-polishing) and (b) at 3156 h.
stressed for an extremely long period of time. This was the case in M15,
where the estimated current density was 0.4 104 A/cm2 and the stressing
temperature was only 40 C. Figure 17 shows only minimum microstructural
change in the solder joint A of M15 after an extensive 3000 h of current
stressing and no void nucleation was found. This indicates the possibility
that there exists a threshold current density under which no electromigration
failure would occur, as the critical current density value found by Blech
(1976) in his electromigration experiments of thin pure metal film under
current stressing.
TIME TO FAILURE ANALYSIS
As discussed in the previous section, only the type 3 failure is caused by
void nucleation and growth, as a result of electromigration and thermomigration. Figure 18 shows the time to failure (TTF) versus current density
in solder joint A. In this joint, electromigration and thermomigration forces
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59
Damage Mechanics of Micro/Power Electronics Solder Joints
M06
M14
M34
M41
M42
M51
M56
M52 not fail yet
2000
TTF (h)
1500
1000
500
0
0.4
0.6
0.8
1.0
1.2
2
Current density in solder joint A (A/cm )
Figure 18. Time to failure (TTF) vs current density in the solder joint.
are in the same direction. As a result, it is responsible for the eventual failure
of the module. The modules listed in Figure 18 were either subjected to
electromigration and thermomigration failure (Type 3 failure) or were
imminent to fail in this mode. It is clearly evident that TTF decreases
dramatically as the current density increases but with two exceptions:
modules M52 and M56 (which clearly did not confirm this tendency and
will be discussed in a later part). The current density is not the only variable
that effects the TTF; other variables such as localized temperature and
temperature gradient are also influential.
The most commonly used method for predicting the mean time to failure
(MTTF) of metal interconnects (thin films) for semiconductor devices
subjected to electromigration failure is Black’s (1967) law,
MTTF ¼
A Ea =kT
e
jn
ð1Þ
where j is the current density, n is the current density exponent, which
Black found to be 2, Ea is the pseudoactivation energy, k is Boltzmann’s
constant, T is absolute temperature, and A is a constant (Black, 1967, 1969).
Since Black’s law describes MTTF as only a function of temperature and
current density, it cannot predict the variation in MTTF with the many
other variables know to affect the lifetime as noted by Gleixner and Nix
(1999), such as the microstructure of the interconnects, the line dimensions
and geometry of a particular alloy and its compositions, and the condition
of surrounding interfaces (Attardo and Rosenbergg, 1970; Agarwala et al.,
1972; Blech, 1976; Korhonen et al., 1993; Gleixner and Nix, 1999; Lloyd,
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60
H. YE
ET AL.
1999; Ye, 2003a). The n ¼ 2 behavior as proposed by Black is supported by
many experimental and theoretical studies as the consequence of the
counterdiffusional hydrostatic stress gradient generated during electromigration (Blech, 1976; Kirchheim, 1992; Korhonen et al., 1993; Clement and
Thompson, 1995). Besides its theoretical limitations, Black’s equation is
simple and effective and hence it is still widely used for pure metal thin film
electromigration TTF predictions. Black’s equation is recently used in the
failure analysis of solder joints under current stressing by Brandenburg
and Yeh (1998) and Lee et al. (2001). Yet it is clear from Equation (1) that
Black’s law does not take into account thermomigration or thermal gradient
in the solder joint. Thermal gradient in thin films is usually very small
due to the fact that Cu thin film is a very good conductor and the thermal
resistance is very small. On the other hand, in a microelectronics package,
solder joint thermal resistance at the interfaces is very large, due to adhesion
between different materials at these interfaces. As a result of a large thermal
gradient, thermomigration is a very dominant force, which is completely
ignored by Black’s equation. In spite of this shortcoming, we tried to see
if Black’s equation can also be used for systems where thermomigration is
significant.
In this study, the TTF of solder joint under current stressing is compared
to the Black’s equation. Constants ‘A’ and pseudoactivation energy Ea in
Black’s equation (1) are obtained from our test data by curve fitting. Hence,
thermomigration effects are included in these constants. Ea is referred to as
the pseudoactivation energy, because to be able to fit Black’s exponential
equation to any test data, where temperature boundary conditions are
different, this parameter must be obtained from the test data by curve
fitting. Therefore, Black’s so-called ‘law’, is just a convenient polynomial to
fit rather than an actual material behavior law. The actual activation energy
of the material is a temperature-dependent variable and does not change
depending on the test conditions, therefore Ea is referred to as pseudo.
A nonlinear regression procedure is employed to determine the relationship between TTF and current density and temperature based on Black’s
law. The TTF data from the modules that exhibited Type 3 failure are used
for the regression process, except in M56. The current density exponent is
assumed to be 2, as proposed by Black, since we do not have enough TTF
data points to determine it. As the measured stressing temperature on each
module was changing during current stressing, an average value was used
for the purpose of regression. In some modules, stressing temperature was
estimated since no temperature was measured during stressing. The thermal
gradient within the solder joint is not directly accounted for because it is
not needed in Black’s equation; yet as shown by a coupled thermal–electric
finite element simulation in an earlier paper by Ye et al. (2003c), higher
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61
Damage Mechanics of Micro/Power Electronics Solder Joints
temperature on the die side leads to a significant temperature gradient
within the solder joint. The TTF data used for regression are listed in
Table 3. Let X ¼ j, Y ¼ T, Z ¼ TTF, a ¼ A, b ¼ Ea =k. The Black’s equation
to be fit is then Z ¼ ða=X2 Þ expðb=Y Þ, where j is current density, T is absolute
temperature, Ea is activation energy of failure process, and k is Boltzmann’s
constant. The regression results are shown in Figure 19 and listed in Table 4.
Curve fitting our test data results to Black’s equation yields,
TTF ¼
4:69 105
expð5920:2=T Þ
j2
ð2Þ
where TTF is in hours, j is in 104 A/cm2, and T is in Kelvin. The pseudoactivation energy is calculated to be b k ¼ 5920:2 8:62 105 ¼ 0:51eV,
with a 90% confidence limit of 0.47–0.61 eV. This activation energy is lower
than 0.8 eV reported by Brandenburg and Yeh (1998) from their MTTF
experiments on flip chip solder joints. They also found the current density
exponent to be 1.8 instead of 2 as proposed by Black.
The predicted TTF by the regression is listed in Table 3 to compare to
the actual TTF in the experiments. It shows that the TTF predicted by
the regression model matches well with those data used for regression. The
regression model predicts that the TTF for M15 is 48,033 h; this prediction
is reasonable compared to our experimental observation, where only slight
microstructural change was observed on this module after over 3000 h of
current stressing. But TTFs of M52 and M56 clearly do not obey this
regression model. In both the cases, the actual TTF is over 3 times longer
than that predicted by the regression model. The authors think this
observation is related to the void growth mechanism modes in these two
Table 3. TTF regression based on Black’s law.
Current
density
Module
Temperature
number (104 A/cm2)
(K)
TTF
test
(h)
TTF
predicted by Regression Residual
regression (h) residual (h)
(%)
6
14
34
41
42
51
1.13
1.2
0.62
0.96
0.72
0.64
413a
428a
373
423
393
403
61
26
960
61
256
323
61.74
33.13
953.98
60.95
315.40
274.69
52b
56b
15b
0.71
0.68
0.4
383
383
313
>2254
1868
>4200
480.65
524.0
48,033
a
0.74
7.13
6.022
0.05
59.40
48.31
1.2
27.4
0.6
0.08
23.2
15.0
Temperature of this module is estimated.
Module not used for regression.
b
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90.00%
confidence
limit
43.99
79.48
20.34
45.91
872.22 1035.73
39.39
82.51
267.74 363.07
214.49 334.88
435.96 525.34
460.55 587.45
16,650 79,417
62
H. YE
ET AL.
Figure 19. TTF vs current density and temperature.
Table 4. TTF regression results.
Parameters
a
b
Value
Standard
error
t-value
4.6916e05
5920.2
6.9821e05
560.89
0.67195
10.555
90.00% confidence
limits
0.000102
4724.4
0.000196
7115.9
P > |t|
0.53843
0.00046
modules. The failure mechanism for all the modules that match the
regression model is that nucleated void or pre-existing voids severely grow at
the interface between the Ni UBM and the solder joint interface, which leads
to the ultimate failure. In the case of M52, the growth of pre-existing voids
within the Pb-rich phase in solder joint A clearly delayed the void growth
at the UBM–solder interface as shown in Figure 15. For M56, the growth of
pre-existing voids in the region near the UBM–solder interface efficiently
eliminated the void growth at the UBM–solder interface. As shown in
Figure 12, the void growth at the Ni UBM–solder interface in solder joint A
was gentle even when very severe void was formed in the region near the
UBM–solder interface after 1267 h of current stressing. As aforementioned,
the UBM–solder interface is the most favorable site for void nucleation and
growth; therefore, the void nucleation and growth on this site are the fastest
ones. The explanation for the TTF exceptions of M52 and M56 is thus
simple: if the growth of pre-existing voids within the Pb-rich phase of solder
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63
Damage Mechanics of Micro/Power Electronics Solder Joints
o
o
o
o
o
o
o
o
Figure 20. Solder joint with or without thermal gradient.
delays the void growth at the UBM–solder interface due to a favorable
stress field, the failure process will be delayed, as is the case of M52; if the
major void growth is not at the UBM–solder interface, the void growth
process is much slower than those at the interface and therefore leads to a
much longer TTF.
More importantly, Black’s model does not include the effect of
thermomigration on the lifetimes of solder joints under current stressing.
For instance, consider two solder joints as shown in Figure 20, which have
the same average temperature due to joule heating under the same current
density; however, the temperature is uniform in the left solder joint and
there is a temperature difference of 20 C in the right solder joint as shown in
Figure 20. Black’s model would predict the same TTF for both solder joints,
which is not correct. As we already know, the thermal gradient in the second
solder joint is high enough (2000 C/cm) to trigger thermomigration, which
would significantly reduce the lifetime of the solder joint and move the void
nucleation site from cathode to anode, if the anode is in the warmer side.
This further indicates that the application of Black’s law in predicting the
failure of flip chip solder joints needs great scrutiny.
This observation indicates that using Black’s law to predict the failure of
flip chip solder joints is not reliable because of its nature. It ignores thermal
gradient, initial defects, microstructural characteristics as well as boundary
conditions.
EFFECTS OF NI BARRIER LAYER ON COPPER PLATE
In the test vehicle modules that were used in this project, were two
different types of Cu plates (these are the copper pads on the PCB) surface
treatments: one type was plated Ni barrier layer and the other one was
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H. YE
ET AL.
Figure 21. Backscatter scanning electron micrographs of module M14, solder joint A:
(a) initially and (b) after 16 h of stressing.
Figure 22. Backscatter scanning electron micrographs of module M56, solder joint A:
(a) initially and (b) after 1267 h of stressing.
without it. The Ni barrier layer provided a diffusion barrier between the
solder joint and its substrate.
Figure 21 shows that, without the Ni barrier, the solder (mostly Sn)
diffused into the Cu plate during current stressing; on the other hand, the Ni
barrier totally blocked any solder from diffusing into its substrate, as shown
in Figure 22. Other than this difference, the authors did not find any
evidence that the Ni barrier layer altered the damage mechanics of the solder
joint under current stressing. As the Ni barrier layer is located on the side
into which atoms diffuse, due to the combined effects of the electromigration and thermomigration forces, its existence would only affect the
formation of hillocks and the local stress state. The failure of the module is
controlled by a mechanism of void formation and growth instead of hillock
growth. Therefore, the Ni barrier layer does not have a direct impact on the
damage mechanics of the solder joints under current stressing. Yet, it should
be indicated that this is only true for the boundary conditions and current
direction we used in this experiment. A generalization would require further
investigation.
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Damage Mechanics of Micro/Power Electronics Solder Joints
65
CONCLUSIONS
The experimental damage mechanics of flip chip solder joints under
high current density was investigated on 20 flip chip modules over 3000 h of
testing. Three different failure modes were observed. Type 1 and Type 2
failure modes resulted from excessive thermal resistance in the Al trace or
the solder joint interfaces. Both Type 1 and Type 2 failure modes took place
when there was a manufacturing defect at the solder joint interface or
when we reduced the thickness of the Al trace significantly during sample
preparation by mistake. When the sample was in reasonable good shape at
the beginning of the experiment, the failure was caused by the combined
effect of electromigration and thermomigration, where void nucleation
and growth are the lead causes of the ultimate failure of the module.
In all modules, with no exception, thermomigration forces dominated the
electromigration forces. The void nucleation site and the failure site were
determined by thermomigration but not electromigration. In solder joint A,
thermomigration forces which act from the warmer side to the cooler side
and electromigration forces which act from the cathode side to the anode
side were in the same direction. For solder joint B, thermomigration and
electromigration forces are in opposite directions. The interface between the
Ni UBM–solder joint is found to be the favorite site of void nucleation.
The effect of pre-existing voids on the failure process of a solder joint is
found to be dependent on their location. The fact that Black’s law does
not consider the influence of temperature gradient, microstructure, and
diffusion boundary conditions on MTTF makes it unreliable for predicting
the lifetime of solder joints.
ACKNOWLEDGMENTS
This project was sponsored by the US Navy, Office of Naval Research,
Advanced Electrical Power Systems Program under the direction of
Mr Terry Ericsen. The help received from Mr Terry Ericsen is gratefully
acknowledged. Flip chip test vehicles used in this study were provided by
Motorola Corp. The help received from Dr Darrel Frear and Jong-Kai Lin
of Motorola is appreciated.
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