DFY Fundamentals

DFY Fundamentals
Mark Rencher
President
Pivotal Enterprises
Wescon 2005 – DFY Basics
Yield
• DFY predicts
product yield for
wafer probe and
final test
• Identifies defects
causing yield
loss
Wescon 2005 – DFY Basics
Defect Types
• Random
• Systematic
• Parametric
Wescon 2005 – DFY Basics
Random Defect Type
Random
• Foreign particle
causing defect
• Short
• Contact failure
• Break (open)
• Pin hole
Wescon 2005 – DFY Basics
Source: Predictions Software
Random Defect Detection
Critical Area Analysis
Source: Predictions Software
Wescon 2005 – DFY Basics
Systematic Defect
• Resolution Enhancement Technology (RET)
related
• Edge Place Error (EPE) defines error tolerance
Source: Intel
Wescon 2005 – DFY Basics
Systematic Defect Detection
• Edge Placement Error Tolerance
– RET model adjust design shape to meet EPE
• Visual Inspection
• Functional test failure (should be 1, but is 0)
Wescon 2005 – DFY Basics
Parametric Defect
• Variation in measured
performance
• Analog device and
interconnect mis-match
• Logic Timing (best case,
worst case)
• High Speed Interconnect
– ? Resistance due to
change in width
– ? Capacitance due to
change in spacing
– ? Material due to process
variation
Wescon 2005 – DFY Basics
Parametric Defect Detection
• Simulate Input
Parameter Variation
(Process, Voltage, Temp, Analog
and Interconnect)
• Use Design of
Experiments to reduce
the number of
simulations
• Determine Output
Sensitivity to Inputs
Wescon 2005 – DFY Basics
Taiwan 2004
Taiwan Semiconductor Industry
100
96
93
90
90
% capacity
85
80
80
70
70
Absolute Yield
% yield
60
Random
50
40
30
Parametric
20
10
Systematic
150-180nm
250nm
130nm
350nm
90nm
500nm+
0
500nm+
350nm
250nm
150-180nm
130nm
90nm
Source: I.T.R.D Co. Ltd. Taiwan, R.O.C
Wescon 2005 – DFY Basics
Design Yield Improvement
Yield Improvement Method
% Yield Improvement
Random Defect/critical area, contact doubling
5-20%
Parametric Defect
8-10%
Feature Defect/decreasing edge placement error
Total
1-3%
14-33%
Source: Philips
Wescon 2005 – DFY Basics
Design Yield Improvement
- Random Defect -
source: Infineon
Wescon 2005 – DFY Basics
EDA Challenges
•
•
•
•
Timing Driven RET using EPE
Classify defect types that link to equipment
Statistical timing models
Fab parameter ownership
Wescon 2005 – DFY Basics
Conclusions
• Three DFY defect types
– Random, Systematic, Parametric
•
•
•
•
Predict wafer probe and final test
Determine design sensitivity to defects
Reduce design defect sensitivity
DFY yield impact
Yield Improvement Method
% Yield Improvement
Random Defect/critical area, contact doubling
5-20%
Parametric Defect
8-10%
Feature Defect/decreasing edge placement error
Total
Wescon 2005 – DFY Basics
1-3%
14-33%