SDR in Terrestrial Systems – Visions, Applications

E-Gruppen, IDA
Center for Software Defined Radio, Aalborg University
Teknologisk Institut & IEEE Denmark-Section
SDR in Terrestrial Systems –
Visions, Applications and Challenges
SDR Building Blocks and Some Challenges
in Flexible Use of Frequency Resources
John Aa. Sørensen, Assoc. Prof.
Copenhagen University College of Engineering
Overview
- Software Defined Radio, ”Setting a Stage”.
Example: Commerial Platform for SDR.
- SDR building blocks.
- Shared Frequency Resource Systems, e.g. IEEE 802.22
(Cognitive Radio).
- What fundamental functions are needed?
- References and Resources.
SDR
”Setting a Stage”
Highly Programmable Platform for the handset market.
BitWave Release September 2008.
BW1102 Soft Transceiver 700 MHz to 3.8 GHz.
Supports most wireless standard commercial protocols,
addresses the needs of handsets, femtocells, datacards
and other mobile wireless devices.
This is a package of IP and not a single component.
www.bitwavesemiconductor.com (Lowell, MA, US)
Ref. Russell J Cyr, CMO & Co-founder, BitWave Semiconductor
Wireless Connectivity Made Simple
September 2008
©2008 BitWave Semiconductor Inc.
Wireless: Multi-Mode, Multi Band Future
How can we bridge the gap?
With
Programmable
Technologies!
©2008 BitWave Semiconductor Inc.
BitWave’s Softransceiver Platform
Frequency: from 700 MHz to 3.8 GHz
Modes:
GSM, EDGE, WCDMA, HSDPA
υ
HSUPA ,CDMA2K, 1XRTT, EVDO, iDEN,
DECT, GPS, Bluetooth, WiFi, WiMax,
DVB-H, etc.
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11Patent
PatentGranted
Granted2008
2008
66Additional
Patents
Filed
Additional Patents FiledtotoDate
Date
~~100
Claims
100 Claims
6
A Platform for use in Multiple
designs
Lowers product development costs and
supply chain costs, decreases time-tomarket, improves time to revenue
Lowers BoM cost for handset and femtocell
Enables Multiple products, multiple markets
with a single RFIC platform single integrated
transceiver RFIC
Reduces the cost of developing handset
variants, saving : $1-2M per variant.
Superior Performance with
Flexibility
Power, performance and cost all equal to or
better than single function ASICs
Tunable performance - optimization
Reconfigurable in real time
Digital CMOS implementation
Software control and digital interfaces
Programmable for different
frequencies and wireless standards
Faster time-to-market, de-risks product
development, better reliability
©2008 BitWave Semiconductor Inc.
BW1102 Softransceiver RFIC Block Diagram
Switch
LNA
Notch
Filter
CNTL
CNTL
CNTL
Mixer
ABB
VGA
filter
ADC
CNTL
CNTL
Rx DIGITAL PROCESSING
Decimate, Filter, DDC, DCO,
I/Q Balance, RSSI, AGC
LO
8051
Rx Synth
CNTL
GPIO
FEM
& PA
Ctrl
BBCLK
Tx Synth
(TPM)
Temp
Sensor
DCXO
Finite
State
Machine
CNTL
R B
x W
S
C I
t
r D
l
i
g
T R
x F
RAM
Control Block
CNTL
Switch
Peak
Det
CNTL
RF
VGA
LO
Mixer
CNTL
CNTL
BB
VGA
Low
Pass
Filter
BB
Interface
CNTL
DAC
Tx DIGITAL PROCESSING
Upsample, Filter, DCO, I/Q
Rev. F6
7
©2008 BitWave Semiconductor Inc.
BWS Value Proposition for Constituents
Consumers
Carriers
8
Demand voice, data, multimulti-media and ubiquitous global
coverage ,i.e., transparent delivery of high value services
Want to Increase ARPU through new services
Emerging carriers are utilizing new bands (700 MHz) and
new protocols (WiMax
(WiMax and WiFi VoIP)
VoIP)
Proliferation of usage bands and protocols
Device OEMs Need to deliver new multimode, flexible handsets quickly
that deliver new high value services transparently
Baseband
Semiconductor Suppliers
Having difficulty dealing with a growing multitude of
chip variants and the complexity of multiple chips per
radio design
©2008 BitWave Semiconductor Inc.
BWS Advantage
Accelerating Time to Market for the OEM
RFIC Transceiver Design Today
Custom ASIC Design
• 2 years
• 60 person-years / $15-20m
System Spec Analysis – 2 months
Functional Block Design – 1 year
Layout and Verification – 3 months
Tapeout – 2 months
Debug / Characterization
– 5 months
Transceiver Design Using BitWave
Softransceiver Configuration Development
• 6 months
• 2.5 person-years / $500k
System Spec Analysis – 2 months
Software Coding – 2.5 months
Test and Characterization – 1.5 months
Softransceiver Chip + Mode files
= Greatly Improved Time to Revenue
9
©2008 BitWave Semiconductor Inc.
Mobile Device Designs for
Multiple Bands and Protocols
A Better Way
“Diverging Applications driving need for
as many as 8 radios and 11 antennas”
*
How it’s done
today
* Sudhir Dixit, Research Fellow, Nokia Research Center
Helsinki, Finland, July 2006
©2008 BitWave Semiconductor Inc.
BW1102 Softransceiver Functionality
Applications
–
υ
Femtocells, Handset,
Laptops and Gaming
Devices
8 Tunable
RF Inputs
Ref Output
1.2 VDC
1.5 VDC
1.8 VDC
3.3 VDC
GPIO VDC
LVDS VDC
υ
–
υ
Ref Input
Loop Filter 1
Loop Filter 2
5 Tunable
RF Outputs
BWS
Interface
υ
7x7 PBGA, 144 Balls, 0.5 Spacing
Environmental
–
11
3G Dig RF v3.09
BWSI 12 Bit parallel interface with SPI control
Mechanical
–
υ
8 RF Inputs
5 RF Outputs
12 GPIO for control
1 PA Power Detect
1 PA Ramp DAC
Baseband Interfaces
–
–
υ
GSM, GPRS, EDGE, WCDMA, HSPA, 1xRTT,
CDMA2K, EVDO, DECT, 802.11b/g, 802.16d/e,
GPS, other
FEM Interfaces
–
–
–
–
–
12 GPIO
1 PA Det.
1 RAMP DAC
700 MHz to 3.8 GHz, continuous coverage
Protocols
–
υ
Single Receiver and Single Transmitter
Frequency
–
υ
DigRF
3.09
Interface
Architecture
-30°°C to +85°°C
©2008 BitWave Semiconductor Inc.
Typical Customization Parameters
Mode
Mode Performance
Performance is
is Optimized
Optimized
per
per Application
Application per
per Standard
Standard per
per Baseband
Baseband
υ
RECEIVER
–
–
–
–
–
–
υ
Receiver Type
Center Frequency
Receiver Gain
Analog Domain Filtering
Sampling Rate
Digital Domain Filtering
υ
–
–
–
–
–
–
Transmitter Type
Digital Domain Filtering
DAC Sampling Rate
Analog Domain Filtering
Center Frequency
Transmitter Gain
SYSTEM
–
–
–
–
–
12
TRANSMITTER
Baseband Interface
Finite State Sequencing and Timing
Tx Power Calibration Algorithm
DCO & I/Q Balance Algorithm
RF Front End Control
©2008 BitWave Semiconductor Inc.
System Model for Using the Softransceiver
13
©2008 BitWave Semiconductor Inc.
SDR Building Blocks
SDR Building Blocks
Zero Intermediate Freq.
SDR Building Blocks
SDR Building Blocks
SDR Building Blocks
Tuneable architectures offers value in the complete device value chain:
- Value to end user, bc. more applications.
- Value to carrier, bc. fragmented freq. spectrum
can be supported.
- Value to handset OEM, bc. support of multiple
product families, using one radio.
SDR Building Blocks
The analog part and A/D is a major challenge:
- filters
- power amplifiers and
- antennas must
all be reconfigurable.
SDR Building Blocks
SDR Building Blocks
Ex. of RF Performances of Misc. Protocols
Noise Figure:
SNRout − SNRin
IIP3 ( Third order Intercept Point ):
The point at which the power in the third-order product and the
fundamental tone intersect, when the amplifier is assumed to be
linear. Predict low level intermodulation effects.
Different Performance Envelopes
for Different Protocols
Power amplifier nonlinearities
Effective Number of Bits
Design Considerations and Tradeoff´s
Low IF
Zero IF
IEEE 802.22 Cognitive Radio Wireless Regional
Area Network Standard
FCC 2002
IEEE 802.22 Cognitive Radio Wireless Regional
Area Network Standard
Approx. 30 Km
Range.
Broad band access
BS (base Station)
and
CPE (customers
premises equipment) max. 255.
IEEE 802.22 Cognitive Radio Wireless Regional
Area Network Standard
Minimum
downstream:
1.5 Mbit/sec.
UP: 384 kbit/sec.
allowing for videoconferencing.
Using OFDM.
IEEE 802.22 Cognitive Radio Wireless Regional
Area Network Standard
Use
Geolocation/database
of licensed TX´s
and
Spectrum sensing.
IEEE 802.22 Cognitive Radio Wireless Regional
Area Network Standard
Use
Geolocation/database
of licensed TX´s
and
Spectrum sensing.
Analysis and
Decisions.
IEEE 802.22 Cognitive Radio Wireless Regional
Area Network Standard
Use
Geolocation/database
of licensed TX´s
and
Spectrum sensing.
Analysis and
Decisions.
Control
IEEE 802.22 Cognitive Radio Wireless Regional
Area Network Standard
Spectrum Sensing Function
Geolocation
IEEE 802.22 Cognitive Radio Wireless Regional
Area Network Standard
IEEE 802.22 Cognitive Radio Wireless Regional
Area Network Standard
For one BS.
Superframe control header
IEEE 802.22 Cognitive Radio Wireless Regional
Ran Area Network Standard
gi
Data transmission.
Co
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exi
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d th
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bea
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i
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Downstream:
Consecutive
MAC frames.
CBP:
Coexistence Beacon
Protocol, coordination of several 802.22
nodes.
Upstream:
Sharing among
CPE; using
demand-assigned multiple
access
(DAMA).
Spectrum Sensing
Sensing antenna 10 m above the ground
- omnidirectional
- digital TV receiver sensitivity -116 dBm
- analog TV receiver sensitivity - 94 dBm
- wireless microphones rec. sensitivity – 107 dBm
Channel detection time is 2 sec.
Prob. of detection 0.9.
Prob. of false alarm 0.1.
Sensing both at BS and CPE. Final decision in BS.
If the WRAN operation on channel N creates interference
to an incumbent operation, the following is carried out.
The SM (Spectrum Manager) have the following options:
1. Reduce the EIRP of the CPE (Customers Prem. Eq).
(EIRP: Effective Isotropic Radiated Power)
2. If the reduction renders the service unstable, disallow
the service.
3. Reduce the EIRP of the BS, to eliminate the interference.
4. In many cases initiate a channel move.
Dynamic Spectrum Sharing
Haykin, 2005
Examples of Challenges in Cognitive Networks
Start/stop primary
users.
Start/stop secondary
users.
Examples of Challenges in Cognitive Networks
What is a spectral hole, and
what methods for identification?
Multidimensional:
frequency, time & space.
Examples of Challenges in Cognitive Networks
Mixture of continuous
dynamics and discrete
events.
Examples of Challenges in Cognitive Networks
Guarantee QoS of the
secondary user despite the changing
environment and securing the primary user
quality.
Examples of Challenges in Cognitive Networks
How to continuously
verify the correct function
of the system, and avoid
misuse?
References
[1] Joseph Mitola III; “Cognitive Radio, an Integrated Agent Architecture for
Software Defined Radio”, Ph.D. Dissertation, KTH, 8 May 2000.
[2] Center for Software Defined Radio, Aalborg University, www.csdr.dk
[3] Mehmood-Ur-Rehman Awan, Muhammad Mahtab Alam; “Design &
Implementation of FPGA-based Multi-standard Software Radio Receiver”;
MSc Thesis, Department of Electronic Systems, Aalborg University 2007.
[4] fredric j harris; ”Multirate Signal Processing for Communications”
Prentice Hall PTR, 2004.
[5] John A. Kilpatrick; Russell J. Cyr; Erik L. Org; Geoffrey Dawe
“New SDR Architecture Enables Ubiquitous Connectivity”
RF Design, January 2006.
[6] Erik L. Org et al.; “Design Tradeoffs in Making a Tuneable Transceiver
Architecture for Multi-Band and Multi-Mode Handsets”
SDR Forum Technical Conference 2007, 5 pages.
[7] Andreas F. Molisch; “Wireless Communications”
John Wiley and Sons, 2005.
References
[8] Carl R. Stevenson et al; “IEEE 802.22: The First Cognitive Radio Wireless
Regional Area Network Standard”
IEEE Communications Magazine, January 2009, Pages 130 - 138.
[9] Simon Haykin; “Cognitive Radio: Brain-Empowered Wireless Communications” IEEE Journal on Selected Areas in Communications;
Vol. 23, No. 2, February 2005, 201-220.
[10] Rahul Tandra; “What is a Spectrum Hole and What Does it Take to Recognize One? Proc. of the IEEE, Vol. 97, No. 5, May 2009, 824-848.
[11] Andreas F. Molisch et al.; “Propagation Issues for Cognitive Radio”,
Proc. of the IEEE, Vol. 97, No. 5, May 2009, 787-804.
[12] Peyman Setoodeh et al.; “Robust Transient Power Control for Cognitive
Radio”; Proc. of the IEEE, Vol. 97, No. 5, May 2009, pages 915-939.
[13] Jun Ma et al.; “Signal Processing in Cognitive Radio”
Proc. of the IEEE, Vol. 97, No. 5, May 2009, pages 805 - 823.
References
[14] Peyman Setoodeh et al.; “Robust Transmit Power Control for Cognitive
Radio”, Proc. of the IEEE, Vol. 97, No. 5, May 2009, pages 915-939.
[15] Spectrum Policy Task Force, ET Docket No. 02- 135
Federal Communications Commission, 2002
Thanks