FEATURES 10, 12, 16- and 20-slot VME subrack High speed VME

Transcription

FEATURES 10, 12, 16- and 20-slot VME subrack High speed VME
CCV
10/12/16 OR 20-SLOT INDUSTRIAL VME SUBRACK
FEATURES
z
10, 12, 16- and 20-slot VME subrack
z
High speed VME bus
z
P1 + P2 with automatic chaining
z
Power supply: 600W (85 to 264 Vac)
z
Powerful fan with thermal control
z
Exchange visualization BARGRAPH
z
Power supply control
z
ACFAIL and SYSRESET control
z
Other configurations possible
z
Neat finish with PCBs set-back
trademarks and logos are registered
DESCRIPTION
The CCV 10/ 12/16/20-seriesVME subracks are especially designed for industrial
applications.
Some of the many features proposed by ADAS racks are:
z
z
z
z
z
z
z
ACFAIL, SYSRESET, SYSFAIL electronic control.
Power supply control in the VME operational tolerance.
Silicium sensor for thermal control and speed variable regular fan’s.
Exchange visualization bargraph on VME.
High speed bus with automatic chaining (no strap).
Power supplies with automatic selection of primary tension in accordance to all current
standards.
Setting-back of the boards
The subracks of the CCV 10/ 12/16/20-series can be configured in close accordance with
"customer" applications thanks to a wide choice of personalization.
9 rue Georges Besse – BP 47 – 78330 FONTENAY LE FLEURY – FRANCE
Tél.:(33) 1 30 58 90 09 - http://www.adas.fr - [email protected]
CCV
SPECIFICATIONS
TYPE
BACK PLANE
- Type
- Number of slots
- PCB depth
- VME bus
VENTILATION RACK
POWER SUPPLY
- Power
- Voltages
- AC FAIL and SYSRESET
- Protection
MEDIAS
FRONT PANEL
- On/Off
- Reset
- Bus occupation
- Mains indicator
- Altuglas door
REAR PANEL
PHYSICAL CHARACTERISTICS
- Dimensions version rack (W x H x D)
- Dimensions version table top case (W x H
x D)
- Color
ENVIRONMENT
- Operating temperature
- Storage temperature
- Relative humidity
EUROPEAN NORMS
(t = 25°C)
INDUSTRIAL SUBRACK VME 10 / 12 / 16 / 20 SLOTS
PCBs set-back 60mm
10, 12, 16 or 20 slots
160 mm
P1 + P2 High speed, with automatic chaining and active
adaptation
3 ventilator fans of 125 2 with filter
Speed variable regulator FANs f(t)
600W
5V / 12 0A ; 12V / 10A
Yes, VME standard
Thermal, surge, short circuit ...
Consult us for integration medias :
- Hard disk
- Floppy
- DAT
- CD ROM, ...
3 position key switch:
OFF/ON/RESET LOCK
Yes with anti-bounce
By BARGRAPH 0 Þ 100 % (10 points)
Power ON indication by LED
Temperature in the operational range < 50°C
Bus fail (SYSRESET/SYSFAIL)
Hinged
Fixed plate for mounting of panel 6U
Hinged door allowing access to power supplies
19" x 9 units x 480mm
550 x 440 x 560mm
Grey - RAL 7032
- 20 °C to + 70°C
- 25 °C to + 85 °C
90 % (without condensation)
EMC - EN 61326 - EN 55011 Class A
CE Compliance
ROHS - 2002/95/EC
HOW TO ORDER?
CCV **
N° OF SLOTS
10
12
16
20
Option Table top case CCV **/C
ACCESSORIES
11
24/20
TRACEABILITY FORM
DOCUMENT FOLLOW-UP
Title:
CCV
Titre :
English documentation
(Document creation - Création du document)
Edition: 1
Written
by
D. PIMONT
Revised
by
Ph. DUTIN
Approved by
Ph. DUTIN
on
on
on
Warning: Unless otherwise stated, this revision
overwrites the previous one which must be destroyed,
along with any copies given to your collaborators.
20/12/91
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20/12/91
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20/12/91
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Avertissement : En l’absence d’indication contraire, cette nouvelle
édition annule et remplace l’édition précédente qui doit être détruite,
ainsi que les copies faites à vos collaborateurs.
Edition
Nature of the modifications (key words)
Written
Revised/Approved
Edition
Nature des évolutions (mots clés)
Rédigé
Revu/Approuvé
Bilingual documentation & update
5
6
Documentation bilingue & Mise à jour
by
D. PIMONT
by
Ph. DUTIN
on
99/05
on
99/05
Rev. A
Visa
Documentation update
by
D. PIMONT
by
Ph. DUTIN
Mise à jour de la documentation
on
20/01
on
20/01
Rev. A
Visa
Documentation update
Mise à jour de la documentation
by
D. PIMONT
by
Ph. DUTIN
on
20/26
on
20/26
7
Visa
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Rev. A
Visa
Wiring drawing update
Mise à jour des plans de câblage
by
D. PIMONT
by
Ph. DUTIN
on
21/13
on
21/13
8
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Rev. A
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by
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by
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on
24/20
on
24/20
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Rev. A
DOCUMENT ARCHIVED
DOCUMENT ARCHIVE
Visa
No
Yes
Visa
on
Δ ed. .. [ ] = Document input/output (Entrée/sortie modification de la documentation)
# ed. .. [ ] = Board new function input/output (Entrée/sortie nouvelle fonctionnalité du produit)
DSQ - 4.5.a - Indice F - 98/41
T.S.V.P.
CCV - Rev. A - Edition 9 – 24/20
1
NOTES :
CCV - Rev. A - Edition 9 – 24/20
2
CCV
SUMMARY
Chapter A Presentation............................................. 4
Chapter B VME standard........................................... 5
Chapter C VME bus ................................................... 6
Chapter D Power supply ........................................... 7
Chapter E Fan cooling............................................... 8
Chapter F Front panel ............................................... 9
Chapter G Medias ...................................................... 9
Chapter H Physical representation ........................ 10
H.1.
Dimensions ...........................................................................................10
H.2.
Connection............................................................................................10
H.3.
Protection..............................................................................................10
Appendix ................................................................... 11
VME INIT CIRCUIT ................................................................................................11
WIRING DRAWING .................................................................................................11
CCV - Rev. A - Edition 9 – 24/20
3
Chapter A
Presentation
Δ# ed. 5 [
The series CCV VME racks have been designed for
industrial environments.
Of smart presentation, they combine aesthetic appearance
and functionality.
A table-mounted enclosure version can also be provided.
Locating the PCBs laid back inside the rack prevents the
connectors from being ripped off and nuisance actions on
the PCB front panel buttons.
The altuglass door enables the VME board leds to be
displayed.
A front panel bar graph displays the VME bus occupation
rate.
The three-position key-operated On/Off enables the system
to be switched on and the reset to be disabled.
>>>Note:
The series CCV include versions 10, 12, 16, 20 slots that are all based
on the same concept of where a unique documentation for the totality of
the series.
Version CCV have the internal cabling (as well as necessary
mechanical adaptations) to the integration of media, suitable definition
during the order.
Δ# ed. 5 ]
CCV - Rev. A - Edition 9 – 24/20
4
Chapter B
VME standard
Δ# ed. 8 [
In order to get a full understanding of all the functionalities of the VME
bus, we strongly recommend the reader to refer to the standards edited
by the VITA.
A document which should be consulted for a better understanding of
problems which may arise and for an overview of the VME resources is
given here enclosed.
Δ# ed. 8 ]
CCV - Rev. A - Edition 9 – 24/20
5
Chapter C
VME bus
Δ # ed. 3, 4, 5 & 8 [
The series CCV frame includes a VME backplane featuring both a
10, 12, 16 or 20 slots P1 + P2 bus built around a very high technology
(8 layers).
The BGs and IACKs are electronically chained.
Backplane characteristics
Specifications”.
are
here-enclosed
in
“the
VMEbus
A VME INIT circuit is able to:
generate a SYSRESET to the placement under tension or
under the action of the reset in FRONT panel
take into account SYSFAIL generated by cards and to
indicate it on the FRONT panel
present stemming ACFAIL the feeding
generate a signal BUSY image of the occupation of the
VME.
Δ # ed. 3, 4, 5 & 8 ]
CCV - Rev. A - Edition 9 – 24/20
6
CONFORMS TO :
ANSI/IEEE STD1014-1987
IEC 821 and 297
BUS VME
DAISY-CHAIN AUTOMATIQUE
Automatic active daisy-chain switches are
implemented on the motherboard to simplify
the installation and removal of boards within
the system. All daisy-chain signals of the
VMEbus specification are supported by this
new feature, which means that no jumper
setting are necessary. This is useful when
system configurations are changing, the
motherboard allow the specially dedigned
power supply to be directly connected
without the need for cable harness. Power
for all the different modules in the system is
distributed via motherboard.
Le codage par cavalier du “Daisy-chain” est
remplacé par une logique directement
implémentée sur le bus. Cette nouvelle
fonction simplifie l’installation et le
changement de cartes au niveau d’un
système. Tous les signaux de “Daisy-chain”
établis selon la spécification VMEbus sont
supportés par cette fonction et, de cette
manière, il n’est plus nécessaire de
configurer les cavalier. Ceci est très utile
lors de changement de la configuration de
systèmes. La carte-mère accepte, par
l’intermédiaire d’une paire de connecteurs,
d’être directement reliée à une alimentation
qui a été spécialement développée pour cet
usage. La tresse de câble est supprimée.
Toutes les valeurs de tensions nécessaires
pour les différents modules sont distribuées
par l’intermédiaire de la carte-mère.
FEATURES
SPECIFICATIONS
q
q
8-fold multilayer
all signal lines in the internal layers
q
q
q
q
q
q
reliable decoupling of all bus lines
inside onboard terminators
Automatic Daisy-Chain
All I/O lines are provided with ground
trough holes for shielding
Optimised ground shift
Blocking capacitor for each slot
q
q
q
q
q
q
Circuit-imprimé multicouches 8 couches
Toutes les lignes de signaux sont dans les
couches intérieures
Découplage fiable des lignes de signaux
Terminaison active « onboard »
« Daisy-Chain » automatique
Toutes les lignes E/S sont blindées au moyen
de surfaces reliées au GND
« GND-shift » optimisé
Capacité de blocage pour chaque slot
q
q
DESCRIPTION
DATAS / DONNEES
DESCRIPTION
Bandwith
50 MHz
Fréquence
Termination
Terminaison
Basic current cons.
Passif “Onboard »
20 mA – 1,5A
Signal impedance
50 Ohms 5 %
Impédance
Resistance of Signal lines
1 Ohm
Résistance de ligne
Construction
8-layers / 8 couches
Construction
Power supply
120A / 200A 5VDC
Alimentation
Connectors
DIN 41612 C classe II
Connecteurs
actif
passif
Consommation de base
J1/P1 PIN ASSIGNMENTS
(B)
Mnemonic
signal
(C)
Mnemonic
signal
D00
D01
D02
D03
D04
D05
D06
D07
BBSY*
BCLR*
ACFAIL*
BG0IN*
BG0OUT*
BG1IN*
BG1OUT*
BG2IN*
D08
D09
D10
D11
D12
D13
D14
D15
9
10
11
12
13
14
15
16
GND
SYSCLK
GND
DS1*
DS0*
WRITE*
GND
DTACK*
BG2OUT*
BG3IN*
BG3OUT*
BR0*
BR1*
BR2*
BR3*
AM0
GND
SYSFAIL*
BERR*
SYSRESET*
LWORD*
AM5
A23
A22
17
18
19
20
21
22
23
24
GND
AS*
GND
IACK*
IACKIN*
IACKOUT*
AM4
A07
AM1
AM2
AM3
GND
SERCLK (1)
SERDAT*(1)
GND
IRQ7*
A21
A20
A19
A18
A17
A16
A15
A14
25
26
27
28
29
30
31
32
A06
A05
A04
A03
A02
A01
-12V/DC
+ 5V/DC
IRQ6*
IRQ5*
IRQ4*
IRQ3*
IRQ2*
IRQ1*
+5V STDBY
+ 5V
A13
A12
A11
A10
A09
A08
+12V/DC
+ 5V/DC
PIN
NUMBER
1
2
3
4
5
6
7
8
(A)
Mnemonic
signal
J2/P2 PIN ASSIGNMENTS
(B)
Mnemonic
signal
(C)
Mnemonic
signal
PIN
NUMBER
(A)
Mnemonic
signal
1
2
3
4
5
6
7
8
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
+ 5 VDC
GND
RESERVED
A24
A25
A26
A27
A28
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
9
10
11
12
13
14
15
16
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
A29
A30
A31
GND
+ 5 VDC
D16
D17
D18
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
17
18
19
20
21
22
23
24
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
D19
D20
D21
D22
D23
GND
D24
D25
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
25
26
27
28
29
30
31
32
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
D26
D27
D28
D29
D30
D31
GND
+ 5 VDC
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
User Defined
SIGNAL IDENTIFICATION
SIGNAL MNEMONIC
A01-A15
A16-A23
A24-A31
ACFAIL*
AM0-AM5
AS*
BBSY*
BCLR*
BERR*
BG0IN* - BG3IN*
BG0OUT* - BG3OUT*
SIGNAL NAME AND DESCRIPTION
Address bus (bits 1-15). Three-state driven address lines that
are used to broadcast a short, standard, or extended address
Address bus (bits 16-23). Three-state driven address lines that
are used in conjunction with A01-A15 to broadcast a standard or
an extended address.
Address bus (bits 24-31). Three-state driven address lines that
are used in conjunction with A01-A23 to broadcast an extended
address.
AC failure. An open-collector driven signal that indicates when the
AC input to the power supply is no longer being provided or that
the required AC input voltage levels are not being met.
Address modifier (bits 0-5). Three-state driven lines that are
used to broadcast information such as address size, cycle type, or
master identification, or a combination of these.
Address Strobe. A three-state driven signal that indicates when a
valid address has been placed on the address bus.
Bus busy. An open-collector driven signal that is driven low by the
requester that is associated with the current master, to indicate
that its master is using the DTB. When the requester releases this
line, the resultant rising edge causes the arbiter to sample the bus
grant lines and grant the bus to the highest priority requester.
Bus clear. A totem-pole driven signal, generated by an arbiter to
indicate when there is a higher priority request for the bus. This
signal requests the current master to release the DTB.
Bus error. An open-collector driven signals generated by a slave
or bus timer. This signal indicates to the master that the data
transfer was not completed.
Bus grant (0-3)in. Totem-pole driven signals generated by the
arbiter. The bus grant in and the bus grant out signals form bus
grant daisy-chains. The bus grant in signal indicates to the board
receiving if that it has been granted use of the DTB.
Bus grant (0-3)out. Totem-pole driven signals generated by
requesters. The bus grant out signal indicates to the next board in
the daisy-chain that it may use the DTB.
SIGNAL IDENTIFICATION
SIGNAL MNEMONIC
RESERVED
SERCLK
SERDAT*
SYSCLK
SYSFAIL*
SYSRESET*
WRITE*
+ 5V STDBY
+ 5V
+ 12V
- 12V
SIGNAL NAME AND DESCRIPTION
Reserved. A signal line reserved for future enhancements.
Serial Clock. A totem-pole driven signal that is used to
synchronize the data transmission on the VMSbus.
Serial Data. An open-collector driven signal that is used for
VMSbus data transmission
System clock. A totem-pole driven signal that provides a constant
16MHz clock signal that is independent of any other bus timing.
System fail. An open-collector driven signal that indicates when a
failure has occurred in the system. This signal can be generated
by any board in the system.
System reset. An open-collector driven signal, which when low,
causes the system to be reset
Write. A three-state driven signal generated by the master to
indicate whether the data transfer cycle is a read or a write. A high
level indicates a read operation; a low level indicates a write
operation.
+ 5V dc standby. This line supplies + 5V dc to devices requiring
battery backup.
+ 5V dc power. Used by system logic circuits.
+ 12V dc power. Used by system logic circuits.
- 12V dc power. Used by system logic circuits.
Chapter D
Power supply
Δ# ed. 5 [
The series CCV VME racks includes a 600W power supply.
The standard version is powered from a 110/220V, auto-ranging, 50Hz 400Hz power supply.
For the characteristics of the power supply, please refer to the following
documents.
>>>Note:
The VME frame is fitted with an analog electronics system for testing
power supply conformity:
When the PSU front panel LED is green, the + 5V ; + 12V
and - 12V power supplies are within the VME standard
tolerances.
a red LED indicates a power supply error (missing or off
tolerances).
Δ# ed. 5 ]
CCV - Rev. A - Edition 9 – 24/20
7
ALPHA
400 to 1000W Modular Output
♦ 1 to 14 outputs
♦ Standard or Configurable
♦ No Minimum Load
♦ Rapid Connection
♦ Wide Range Input
♦ EN61000-3-2 Compliant
♦ Class B Conducted
♦ Low Leakage Medical Versions
Typical Applications
Computer Peripherals, Telecoms, Industrial Equipment, Office Automation, Instrumentation, Test &
Measurement, OEM Applications etc.
INPUT
Input Voltage
AC Input: 85 – 264VAC, 160 – 358VDC (Alpha 400/600)
AC Input: 90 – 264VAC, 120 – 360VDC (Alpha 1000)
Power Factor
Typically > 0.95¹
Inrush Current
< 50A
Fuse
Internal fuse (no user access)
Input Frequency
47 to 63Hz
Isolation
Input to Output 3kVRMS
Leakage Current
<1.1mA 260VAC 50Hz²
Input to Ground 1.5kVRMS
OUTPUT
Efficiency
Typically 75% (configuration and input dependant)
Hold Up
15mS minimum at full rated output
Switching Frequency
PFC converter 100KHz for Alpha 400 & 1000, 200KHz for Alpha 600.
Output converter 200kHz
Thermal Protection
On converter. Cycle on/off to reset
Isolation
Output to output 500VDC
See Output Module Table for detailed performance specifications.
SAFETY APPROVALS
UL1950, CSA22.2 No. 950, EN60950, IEC60950, CE marked for LVD.
Type Approved for IEC 61010-1, EN61010-1 and EN60601-1. (Alpha 1000 May 2000).
14/11/00 – Issue 4
ENVIRONMENT
Operational
Storage
Temperature
-20°C Start Up to +70°C¹
-40°C – 85°C
Humidity
5 – 95% RH non condensing
5 – 95% RH non condensing
Shock
3000 bumps, 10G (16mS) half sine
Vibration
10 – 200Hz, 1.5G
Altitude
3300 metres
MTBF
Demonstrated 483,000hrs
Temperature Coefficient
0.02% per °C
Note 1
EMC
Conducted
Radiated
WARRANTY
3 Years
IMMUNITY
EN61000
Alpha 400 & 600 derate each output by 2.5% per °C from 50°C to 70°C
Alpha 1000 max temperature is 65°C and derate at 2.5% per °C from 45°C to 65°C
EN 55022 Class B, FCC Class B, (Class A Alpha 1000)
EN 55022 Class A, FCC Class A
-4-2
-4-3
-4-4
-4-5
-4-6
-4-11
ESD
RF
Fast Transient
Surges
RF Common Mode
Voltage Dips
Level 4
Level 3
Level 4
Level 3
Level 3
Compliant
COMMON ALPHA CONFIGURATIONS
Part Number
Max.
Power
CA400 5A
CA400 5S
CA400 12F
CA400 24G
CA400 5A 12C 12C
CA400 5A 12/12E 24N
CA600 5APP 5APP
CA600 24G
CA600 5A 12C 12C
CA600 5A 3.3Q 12C 12C
CA600 5A 24D 12/12E
CA1000 B/S 5A 12F 12F
CA1000 12C 5A 3.3R 12F
300W
400W
396W
400W
400W
400W
600W
600W
600W
600W
600W
1000W
1000W
O/P 1
Volts
5V
5V
12V
24V
5V
5V
5V
24V
5V
5V
5V
5V
5V
Amps
60A
80A
33A
16.6A
60A
60A
120A
25A
60A
60A
60A
60A
60A
O/P 2
O/P 3
O/P 4
Volts
Amps
Volts
Amps
Volts
Amps
12V
12V
16A
8A
12V
12V
16A
8A
24V
5A
12V
3.3V
24V
12V
3.3V
16A
25A
8A
33A
60A
12V
12V
12V
12V
12V
16A
16A
6A
20A
20A
12V
12V
12A
6A
12V
16A
You can configure your own combination of outputs by using the tables on the following
pages or visit http://www.lambda-gb.com/clips.htm and try our Rapid Selector online to
instantly configure an Alpha of your choice.
14/11/00 – Issue 4
DIMENSIONS
Alpha 400
Alpha 600
14/11/00 – Issue 4
Chapter E
Fan cooling
Three fans
125.
The system of ventilation of the racks CCV is to electronic
regulation.
Two circuit PWM regulates the speed of ventilators according to
the ambient temperature. So, the temperature is much more
stable than in frames not possessing this function what is
favorable for the analogical boards for example.
Both systems are independent and a sensor is mainly associated
to the slots of left (for board CPUs).
CCV - Rev. A - Edition 9 – 24/20
8
Chapter F
Front panel
Δ# ed. 5 [
The FRONT panel includes:
A three-position A/M/LOCK switch
A two-colour status LED power supply unit
A two-colour system status LED
A two-colour temperature control LED
A 10-position bar-graph for the VME bus
Two media-access LEDs (if included)
Δ# ed. 5 ]
Chapter G
Medias
The series CCV can receive media to make thus a complete system on
the VME.
Media can be situated in FRONT panel for CCVs 10, 12 and 16 slots.
A cassette is available in FAR for 20 slots.
The integration of media is in option and many variant can be available
in function of numerous technological evolution in this area.
CCV - Rev. A - Edition 9 – 24/20
9
Δ# ed. 5 [
Chapter H
Physical representation
H.1. Dimensions
Rack version:
L x H x W = 19" x 9U x 480 mm
Enclosure version:
L x H x W = 550 x 440 x 560 mm
H.2. Connection
AC version
: Through a 2-pole plug + earth connection
Two grounding terminals (through the provided captive bars)
=
Earth connection
H.3. Protection
AC version
: One 5/20 time-delay fuse, 4A
Δ# ed. 5 ]
CCV - Rev. A - Edition 9 – 24/20
10
Appendix
VME INIT CIRCUIT
WIRING DRAWING
CCV - Rev. A - Edition 9 – 24/20
11