3D PLUS technology and offer

Transcription

By Dr Pascal Couderc,
3D PLUS
408, Rue Hélène Boucher 78532 BUC – France
Phone: + 33 1 30 83 26 50
Email : www.3d-plus.com
TM
P.COUDERC
All Rights Reserved © 3D PLUS 2012
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Outline
-
Introduction
3D PLUS technology
Product examples
Conclusions
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Introduction
- Spin off from Thales (1996)
- Located in Buc (France ) , South of Paris
- From September 2011, 3D PLUS is a 100% subsidiary of
HEICO company
- Strong R&D from the 3D PLUS launching
- Active patenting policy
- Space certifications from CNES, ESA, NASA, JPL,JAXA,
CAST etc… ( more than 70 000 modules in space
including ROSETTA mission cameras )
- Exportation: 90%
- Workforce : 150
- R&D : 11 including 5 PhD
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3D PLUS technology
4 ) – Layers Stacking
FLOW 2 process
5 ) – Cube Molding
1 ) - Flex Design
7 ) – Cube Plating ( Ni + Au )
2 ) – Components attachment
3 ) - Circuit Test & Screening
P.COUDERC
8 ) – Circuit interconnection by
laser grooving
6 ) – Cube Sawing
9 ) – Cube Test & Screening
4
WDoDTM technology
WDoD ™(1) initial criteria





Use of multi sourcing wafers
Stacking of 5 to 10 levels per mm
Size: 200µm around the larger Die
Stacking of Known Good Rebuilt Wafer (KGRW)
Possibility of several dice of different dimensions of
the same level
 Parallel processing/Panelization from A to Z
 Possibility to stack PCB levels ( flow 2) and rebuilt
wafers in order to optimize performances and costs
(1) Wirefree Die on Die – Trade Mark from 3D PLUS
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WDoDTM technology
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WDoDTM technology
Dielectric passivation layer
2D routing:
RDL
Si
Metal track
Molding resin
Al Pads
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WDoDTM technology
Single unit
300 mm wafer
2 layers RDL with ground plane
Via interconnect at Al pad level
RDL cross section
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WDoDTM technology
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WDoDTM technology
Laser patterning
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WDoDTM technology
PoP and WDoD package relative sizes
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Product example 1 : Leadless pacemaker
•The module has 5 layers
stacked using 3D PLUS
WDoDTM process.
•The layers are stacked at
wafer level. 2 layers have
known good passive (30) and
active components (3) and
are reconstituted wafers
using fan out WLP
technology eWLB.
• RDL pitch is 50µm. The 3
other layers are PCB
based(mixed flow2 and
WDoD)
 Dimensions :
 2.3 x 5.2 x 7.3 mm

(courtesy of SORIN CRM)
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Product Example 2 :Embedded programmable
module
•
Same footprint as a single SPARTAN 6
CSG484
•
The two dimensional area gain on a
board is about 58 %
Embedded decoupling capacitors
SPI
Bank5
Bank4
6
CMT
JTAG
Bank0
64Mb
104MHz
NOR
Spartan 6
FPGA
Bank1
8Mx16 166MHz
mDDR
4 GTPs
Bank3
8Mx16 166MHz
mDDR
Bank2
•
64
60
36
167 caps
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Product Example 2 : Embedded programmable
module
• MODULE DIMENSIONS : 19 x19 x 3 mm
• BALLING : 484 SAC305 balls
• SAME BALL OUT THAN FPGA COMPONENT
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Conclusions-Offer
• With 3D PLUS technologies patented portfio , we can design,
manufacture and performed electrical tests on 3D modules
• We have a large portfolio of standard 3D modules
• We can also develop and manufacture 3D modules for
specific customers applications
• Our technologies are good alternatives to flex-folded, TSV,
PoP , Chip-On-Chip technologies.
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Questions?
Ultra Dense 3-D Micro system with WDoD
Thank you for your attention
www.3d-plus.com
P.COUDERC
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3D PLUS technology and offer

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