68HC11 Reset, Stack, JSR, Interrupts

68HC11
Reset,
Stack,
JSR,
Interrupts
M68HC11E - 79
RESET
M68HC11E - 67
Memory
Jump Subroutine
PC -> (SP)
(SP) -> PC
M68HC11E - 67
6.5.4.1 Branches
These instructions allow the CPU to make decisions based on the
contents of the condition code bits. All decision blocks in a flow chart
would correspond to one of the conditional branch instructions
The limited range of branches (–128/+127 locations) is more than
adequate for most (but not all) situations. In cases where this range is
too short, a jump instruction must be used. For every branch, there is a
branch for the opposite condition; thus, it is simple to replace a branch
having an out-of-range destination with a sequence consisting of the
opposite branch around a jump to the out-of-range destination
1:
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*
File: count_b_slow.asm
*
Author: Tom Dickens
*
Date: 6/6/1997
*
Processor Type: 68HC11E1
*
*
Purpose:
To output an 8-bit binary count on the
*
B port of the HC11.
*
=0000C100 ORG
$C100
; start of EEPROM
C100 7F 1004
clr
$1004
; Clears port B to $00
C103 7C 1004 Main
inc
$1004
; Adds 1 to port B
C106 CE 4000
ldx
#$4000 ; Setup the delay timing
C109 09
Delay dex
;X=X-1
C10A 26 FD
bne
Delay ; if X != 0, loop
C10C 20 F5
bra
Main
; Creates an infinite loop
* end-of-file
The CPU in a microcontroller
sequentially executes instructions. In
many applications, it is necessary to
execute sets of instructions in response
to requests from various peripheral
devices.
These requests are often
asynchronous to the execution of the
main program. Interrupts provide
a way to temporarily suspend normal
program execution so the CPU can
be freed to service these requests.
After an interrupt has been serviced,
the main program resumes as if there
had been no interruption.
M68HC11E - 67
M68HC11E - 67
M68HC11RM
M68HC11RM
M68HC11RM
What is a vector? - a two byte location in memory that holds an address
where a program will go to
What is the Power-On-Reset Vector? - the two byte location that holds
the address to be loaded into the Program Counter when Power-OnReset occurs
What does a reset do? - A reset immediately stops execution of the
current instruction and forces the program counter to a known starting
address
When a reset condition is recognized, the internal registers and control
bits are forced to an initial state - Normal Mode Vector $FFFE, FFFF
The M68HC11 Family of MCUs (microcontroller units) has a special
bootstrap mode that allows a user-defined program to be loaded into
the internal random-access memory (RAM) by way of the serial
communications interface (SCI); the M68HC11 then executes this
loaded program.
Stack Pointer has 16 bits can be loaded any address in memory space
Stack is a data structure that grows downward from high memory to
low memory
When a new byte is pushed onto the stack, the SP is decremented
When a byte is pulled from the stack, the SP is incremented
At any given time, the SP holds the address of the next free location in the
stack
A Jump Subroutine leaves the current list of program instructions and
begins executing the instructions of the subroutine. The JSR instruction
pushes the PC value (next instruction after JSR) onto the stack
The Return from Subroutine instruction restores the original PC value by
popping the address from the stack to return program control back to the
original program
The RTS (return subroutine) instruction pulls the previously stacked return
address from the stack and loads it into the program counter
When an interrupt is recognized, the current instruction finishes normally
first
In the 68HC11, when an interrupt is recognized, all of the CPU registers
are pushed onto the stack
When an interrupt is recognized, context is saved and execution continues
at the address specified by the vector for the interrupt
The TSX instruction can be used to obtain calling arguments from the parent
program by loading data from the stack
After the TSX instruction, the index register X points at the last value that
was stored on the stack
After the TSX instruction, the X register points to the return address on the
stack
The TSX instruction loads the index register X with one plus the contents of
the stack pointer
TXS instruction loads the stack pointer with the contents of the index
register X minus one.