Dale Pollek – CEO/Founder
Transcription
Dale Pollek – CEO/Founder
Dale Pollek – CEO/Founder “DFY Addresses PV’s before going to layout” DFM/DFY Panel Session Wescon, April 13, 2005 ©2005, ChipMD, Inc., All rights reserved exclusively for Wescon 2005 attendees No part to be duplicated without written permission from ChipMD, Inc. 1 Early Yield is Key to Success Yield Selling $’s/chip Optimize before layout DFY Optimized 1st Silicon Typical 1st Silicon Volume Shipment Re-spin #2 Re-spin #1 Time to volume ©2005, ChipMD, Inc., All rights reserved exclusively for Wescon 2005 attendees No part to be duplicated without written permission from ChipMD, Inc. 2 DFY Design Needs Ò Fully mfg aware design Statistical device model simulation based analysis Ò Sensitivity driven based diagnoses Process variations – global & local Operating conditions Design parameters themselves Ò Automated meeting of constraints Ò User guided/interactive (no “black boxes”) Ò Multi-dimensional deterministic optimization ©2005, ChipMD, Inc., All rights reserved exclusively for Wescon 2005 attendees No part to be duplicated without written permission from ChipMD, Inc. 3 Today’s DFY Design Problems Ò Designers must address process variations Global/local process variations & all operating conditions Mismatch has been a problem for decades Ò Design must ensure all specs are met How find the worst case conditions? Are they always at same “corners”? Ò Complexity & sensitivity of topology Design yield is directly related to each topology & usage Ò Simulation is time and cost intensive Accuracy can increase with extra simulation But designer can get overwhelmed with extra data Ò How know when all specs are met? When can design be confident design is ready for tapeout? ©2005, ChipMD, Inc., All rights reserved exclusively for Wescon 2005 attendees No part to be duplicated without written permission from ChipMD, Inc. 4 Nominal/Corner Design Risks Assumed Results Actual Results Performance Corner Optimized Design Minimum Specification Initial Design at Nominal Process And process corners Min Corner Optimized Specification Failures Process Parameter ©2005, ChipMD, Inc., All rights reserved exclusively for Wescon 2005 attendees No part to be duplicated without written permission from ChipMD, Inc. Max 5 Need to Cover Entire Process Desired yield optimized result Performance Corner Optimized Design Minimum Specification Initial Design at Nominal Process Min Corner Optimized Specification Failures Process Parameter ©2005, ChipMD, Inc., All rights reserved exclusively for Wescon 2005 attendees No part to be duplicated without written permission from ChipMD, Inc. Max 6 Worst Case Yield Verification Ò Where are the design specific worst-case conditions? 80% 100% @ = @ 80% Yield = ©2005, ChipMD, Inc., All rights reserved exclusively for Wescon 2005 attendees No part to be duplicated without written permission from ChipMD, Inc. 0% Yield 7 DFY Design Insight & Impact ÒDiagnose & optimize over full process ©2005, ChipMD, Inc., All rights reserved exclusively for Wescon 2005 attendees No part to be duplicated without written permission from ChipMD, Inc. 8 DFY Design Insight & Impact ÒDiagnose & optimize over full process ÒAcross all operating conditions ©2005, ChipMD, Inc., All rights reserved exclusively for Wescon 2005 attendees No part to be duplicated without written permission from ChipMD, Inc. 9 DFY Design Insight & Impact ÒDiagnose & optimize over full process ÒAcross all operating conditions ÒMulti-dimensional performance analysis and optimization ©2005, ChipMD, Inc., All rights reserved exclusively for Wescon 2005 attendees No part to be duplicated without written permission from ChipMD, Inc. 10 DFY Design Insight & Impact ÒDiagnose & optimize over full process ÒAcross all operating conditions ÒMulti-dimensional performance analysis and optimization ÒPre-silicon yield characterization, optimization and verification ©2005, ChipMD, Inc., All rights reserved exclusively for Wescon 2005 attendees No part to be duplicated without written permission from ChipMD, Inc. 11 DFY = Better Results Sooner Ò Maximize Yield Prior to Layout ©2005, ChipMD, Inc., All rights reserved exclusively for Wescon 2005 attendees No part to be duplicated without written permission from ChipMD, Inc. 12
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