docDr. Josef Meiler EVG Sales Director Europe
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Dr. Josef Meiler EVG Sales Director Europe
Dr. Josef Meiler EVG Sales Director Europe LED Fab Development Worldwide Year Year Volume VolumeFabs Fabs Capacity Capacity(200mm (200mmeq. eq.w/m) w/m) 2001 2001 34 34 42.219 42.219 2007 2007 59 59 107.288 107.288 2011 2011 105 105 >375.000 >375.000 Europe/Mid.East 11 22 S. Korea 44 China America 33 33 33 66 44 15 15 36 36 Taiwan 13 13 22 22 38 38 Source: SEMI July/2010 88 99 Japan 77 99 12 12 S.E. Asia 00 00 33 Chip-Designs for GaN-based LEDs Lateral Chip Design Vertical Thin Film Design Flip Chip Design Thin Film Flip Chip Design Improving the White LED Efficiency ηηinternal internal GaN growth substrates Substrate pre-structuring Engineered substrates ηηextraction extraction Patterned sapphire substrates Photonic crystals µ-cone etching ηηconversion conversion Phosphor efficiency Phosphor placement ηηpackaging packaging Thermal conductivity Light extraction efficiency Power losses ηηEQE EQE Improving the LED Efficiency Main factors for efficiency gain: Design improvements (p-contacts & quantum wells) Enhanced chip layout Patterned sapphire substrates Photonic crystals Wafer bonding Wafer level packaging adapted from S. Nakamura / UCSB EVG Solutions for HB LED Manufacturing LED process flow Substrate Substrate MOCVD MOCVD growth growth Growth Growth Templates Templates LED LEDwafer wafer Processing Processing LED LED dies dieson on wafer wafer LED LED dies dies packaged packaged LED LED Light Light Extraction Extraction Packaging Packaging EVG EVGoffers offers lithography lithographyand and wafer bonding wafer bonding solutions solutions throughout throughoutthe the whole whole manufacturing manufacturing chain chain EVG Solutions for HB-LEDs Patterned Sapphire Substrates (PSS) Growth Templates AlN / GaN growth templates Optical Lithography LED wafer Processing Wafer bonding Bowed / warped and thin wafer processing Light Extraction NIL for Photonic Crystals Spray coating for phosphor deposition Wafer Level Packaging Packaging Lens molding for Wafer Level Optics Patterned Sapphire Substrates (PSS) Clear trend is visible to move from couple of micron-sized features to submicron features, called nano patterned sapphire substrates (NPSS) Improved GaN quality with higher efficiency Increased light extraction efficiency Faster etching Faster coalescence for following epitaxial growth step Adapted H. Kuo, NCTU EVG solutions for HB-LEDs Patterned Sapphire Substrates (PSS) Growth Templates Engineered Substrates Optical Lithography LED wafer Processing Wafer bonding Bowed / warped and thin wafer processing Light Extraction NIL for Photonic Crystals Spray coating for phosphor deposition Wafer Level Packaging Packaging Lens molding for Wafer Level Optics Engineered Substrates Sapphire feature around 16% lattice mismatch (RT) Sapphire prices expected to increase by ~40% in 2011 Highly lattice matched substrates for epitaxial growth of GaN with low defect density Courtesy of Soitec Î Increased throughput Î Higher internal quantum efficiency Î Improved yield and lower binning Courtesy of J. Bowers / UCSB Engineered Substrates Direct wafer bonding for manufacturing of engineered substrates: Activation effect lasts Alignment accuracy: 50µm (SEMI standard wafers) couple of hours Applications Substrates manufacturing (SOI, GOI, SSOI, sapphire to sapphire etc.) MEMS (e.g. 3D assembly, packaging) 3D interconnects CMOS image sensors Alignment accuracy: <1µm EVG Solutions for HB-LEDs Patterned Sapphire Substrates (PSS) Growth Templates AlN / GaN growth templates Optical Lithography LED wafer Processing Wafer bonding Bowed / warped and thin wafer processing Light Extraction NIL for Photonic Crystals Spray coating for phosphor deposition Wafer Level Packaging Packaging Lens molding for Wafer Level Optics Proximity Lithography Attractive Cost-Of-Ownership and low CapEx High throughput High overlay accuracy for multiple mask processing (front- to frontside, front- to backside) High print resolution for homogenous current distribution Advanced handling and processing of bowed / warped wafers Fast changeover times for multiple substrate sizes EVG®620 HBL Automated Mask Aligner for HB-LED fabrication EVG®620HBL Mask Aligner EVG620HBL is a dedicated, fully automated mask aligner system for high volume manufacturing of High-Brightness LEDs Supporting wafer sizes up to 150 mm Automated processing of up to 125 wafers Up to 220 wafers per hour in first print mode with highest throughput design* Up to 165 wafers per hour throughput including automatic alignment* High-contrast illumination mode for optimum alignment results High power light source (1kW lamp) *5 cassette continuous operation equivalent, optimized process parameters Source: EVG EVG solutions for HB-LEDs Patterned Sapphire Substrates (PSS) Growth Templates AlN / GaN growth templates Optical Lithography LED wafer Processing Wafer bonding Bowed / warped and thin wafer processing Light Extraction NIL for Photonic Crystals Spray coating for phosphor deposition Wafer Level Packaging Packaging Lens molding for Wafer Level Optics Vertical Thin Film Design – Fabrication Process 1. Epitaxy and high-reflectivity pcontact deposition 3. Substrate removal 2. Wafer bonding 4. Surface structuring (roughening or NIL) Vertical Thin Film Design Advantages of vertical thin film design: High light extraction efficiency Low forward bias Easy scalability of LED chip size at a constant efficiency Lambertian far field radiation pattern Good heat conduction to submount/package Schematic vertical thin film design layout: n‐GaN MQW p‐GaN mirror layer solder metal oxide layer carrier Vertical Thin Film Design – Bonding Requirements Requirements for metal bonding layer / bonding process: Mechanical stability during temperature cycling of HB-LED operation High electrical conductivity for low ohmic losses Efficient heat conduction from the HB-LED active region Low bonding temperature for low GaN strain incorporation Various metal bonding types and techniques: Thermo compression, Eutectic and Transient Liquid Phase bonding Low temperature bonding with plasma activation SEM cross section of GaAs/InP wafers pair bonded with Au:Sn eutectic EVG560 HBL: HB-LED Wafer Bonding System • Multi-substrate wafer bonding for highest throughput up to 160 bonds/h (2” wafer equiv.) • Automatic handling of bowed and warped wafers • Low temperature metal bonding • Eutectic, Transient-Liquid Phase and Thermo-compression bonding • Integrated pre-processing modules • Modular design with swap-in modules • Up to four process modules • Easy switch between wafer sizes • Cassette-to-cassette operation EVG®560 HBL Automated Wafer Bonding System for HB-LED fabrication presented at Semicon West 2010, Dr. Thomas Uhrmann, [email protected] EVG solutions for HB-LEDs Patterned Sapphire Substrates (PSS) Growth Templates AlN / GaN growth templates Optical Lithography LED wafer Processing Wafer bonding Bowed / warped and thin wafer processing Light Extraction NIL for Photonic Crystals Spray coating for phosphor deposition Wafer Level Packaging Packaging Lens molding for Wafer Level Optics Temporary Bonding and Debonding EVG850TB Field of application for TB/DB in HB-LED manufacturing: Thin wafer processing for wafer level packaging Thin wafer processing for chip manufacturing Metallic carrier EVG850TBL EVG850DB EVG Solutions for HB-LEDs Patterned Sapphire Substrates (PSS) Growth Templates AlN / GaN growth templates Optical Lithography LED wafer Processing Wafer bonding Bowed / warped and thin wafer processing Light Extraction NIL for Photonic Crystals Spray coating for phosphor deposition Wafer Level Packaging Packaging Lens molding for Wafer Level Optics Photonic Crystals made by UV-NIL UV - Nanoimprint Lithography (UV- NIL, UV Molding) System parameters: Room temperature Contact force ~ 1-100N UV-light (350-450nm) Achieved resolution: < 15nm Substrates: 10 – 300 mm Technology summary of EVG TSV Processing Lithography RDL Stud/Pillar Phosphor Coating Solder Bump Courtesy of Semitool & Rohm and Haas NanoSpray Coating/Passivation & Lithography for Cu Plating EVG150 EVG150, IQ Aligner, and HERCULES Alignment Inspection - EVG40NT Thin Wafer Handling Wafer Bonding UV Thermo-comp. EVG150 UV Imprint Lithography Fusion EVG850 TB/DB EVG150 and IQ Aligner EVG500 SERIES, EVG850, and GEMINI EV Group www.EVGroup.com
