VISHAY IRFP2 datasheet

Transcription

VISHAY IRFP2 datasheet
IRFP264N, SiHFP264N
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
•
•
•
•
•
•
•
•
250
RDS(on) (Ω)
VGS = 10 V
0.060
Qg (Max.) (nC)
210
Qgs (nC)
34
Qgd (nC)
94
Configuration
Single
D
TO-247
Advanced Process Technology
Dynamic dV/dt Rating
175 °C Operating Temperature
Fast Switching
Fully Avalanche Rated
Ease of Paralleling
Simple Drive Requirements
Lead (Pb)-free Available
Available
RoHS*
COMPLIANT
DESCRIPTION
Fifth generation Power MOSFETs from Vishay utilize
advanced processing techniques to achieve extremely low
on-resistance per silicon area. This benefit, combined with
the fast switching speed and ruggedized device design that
Power MOSFETs are well know for, provides the designer
with an ectremely efficient and reliable device for use in a
wide variety of applications.
The TO-247 package is preferred for commercial-industrial
applications where higher power levels preclude the use of
TO-220 devices. The TO-247 is similar but superior to the
earlier TO-218 package because of its isolated mounting
hole.
G
S
D
G
S
N-Channel MOSFET
ORDERING INFORMATION
Package
TO-247
IRFP264NPbF
SiHFP264N-E3
IRFP264N
SiHFP264N
Lead (Pb)-free
SnPb
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Currenta
Linear Derating Factor
Single Pulse Avalanche Energyb
Repetitive Avalanche Currenta
Repetitive Avalanche Energya
Maximum Power Dissipation
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque
SYMBOL
VDS
VGS
VGS at 10 V
TC = 25 °C
TC = 100 °C
ID
IDM
TC = 25 °C
for 10 s
6-32 or M3 screw
EAS
IAR
EAR
PD
dV/dt
TJ, Tstg
LIMIT
250
± 20
44
31
170
2.6
520
25
38
380
8.7
- 55 to + 175
300d
10
1.1
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
lbf · in
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting TJ = 25 °C, L = 1.7 mH, RG = 25 Ω, IAS = 25 A, VGS = 10 V (see fig. 12).
c. ISD ≤ 25 A, dI/dt ≤ 500 A/µs, VDD ≤ VDS, TJ ≤ 175 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91216
S-81274-Rev. A, 16-Jun-08
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IRFP264N, SiHFP264N
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
40
Case-to-Sink, Flat, Greased Surface
RthCS
0.24
-
Maximum Junction-to-Case (Drain)
RthJC
-
0.39
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
VDS
VGS = 0 V, ID = 250 µA
250
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.30
-
V/°C
VGS(th)
VDS = VGS, ID = 250 µA
2.0
-
4.0
V
Gate-Source Leakage
IGSS
VGS = ± 20 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 250 V, VGS = 0 V
-
-
25
VDS = 200 V, VGS = 0 V, TJ = 150 °C
-
-
250
Gate-Source Threshold Voltage
Drain-Source On-State Resistance
Forward Transconductance
RDS(on)
gfs
ID = 25 Ab
VGS = 10 V
VDS = 25 V, ID = 25 Ab
µA
-
-
0.060
Ω
29
-
-
S
-
3860
-
-
480
-
-
110
-
-
-
210
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
-
-
34
Gate-Drain Charge
Qgd
-
-
94
Turn-On Delay Time
td(on)
-
17
-
tr
-
62
-
-
52
-
-
53
-
-
5.0
-
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
td(off)
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
VGS = 10 V
ID = 25 A, VDS = 200 V,
see fig. 6 and 13
VDD = 30 V, ID = 25 A ,
RG = 1.8 Ω, VGS = 10 V, see fig. 10b
tf
LD
LS
Between lead,
6 mm (0.25") from
package and center of
die contact
D
pF
nC
ns
nH
G
-
13
-
-
-
44
-
-
170
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Currenta
Body Diode Voltage
IS
ISM
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = 25 A, VGS = 0
S
Vb
TJ = 25 °C, IF = 25 A, dI/dt = 100 A/µsb
-
-
1.3
V
-
270
400
ns
-
2.7
4.1
µC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
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Document Number: 91216
S-81274-Rev. A, 16-Jun-08
IRFP264N, SiHFP264N
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
I D , Drain-to-Source Current (A)
100
10
4.5V
1
10
TJ = 175 ° C
10
1
4.0
100
V DS = 50V
20μs PULSE WIDTH
5.0
6.0
7.0
8.0
9.0
VDS , Drain-to-Source Voltage (V)
VGS , Gate-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
Fig. 3 - Typical Transfer Characteristics
4.0
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
I D , Drain-to-Source Current (A)
100
20μs PULSE WIDTH
TJ = 25 °C
1
0.1
1000
TJ = 25 ° C
100
4.5V
10
20μs PULSE WIDTH
TJ = 175 ° C
1
1
10
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TOP
10.0
ID = 42A
3.0
2.0
1.0
0.0
-60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
VDS , Drain-to-Source Voltage (V)
TJ , Junction Temperature ( °C)
Fig. 2 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91216
S-81274-Rev. A, 16-Jun-08
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IRFP264N, SiHFP264N
Vishay Siliconix
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance(pF)
6000
1000
ISD , Reverse Drain Current (A)
8000
100
Ciss
4000
Coss
2000
Crss
0
1
10
100
1000
V GS = 0 V
0.4
0.6
0.8
1.0
1.2
VSD ,Source-to-Drain Voltage (V)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
ID, Drain-to-Source Current (A)
VGS , Gate-to-Source Voltage (V)
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
80
120
160
200
QG , Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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TJ = 25 ° C
OPERATION IN THIS AREA
LIMITED BY R DS(on)
VDS = 200V
VDS = 125V
VDS = 50V
40
1
1000
ID = 25A
0
10
0.1
0.2
VDS, Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
20
TJ = 175 ° C
100
100μsec
10
1msec
1
0.1
10msec
Tc = 25°C
Tj = 175°C
Single Pulse
1
10
100
1000
10000
VDS , Drain-toSource Voltage (V)
Fig. 8 - Maximum Safe Operating Area
Document Number: 91216
S-81274-Rev. A, 16-Jun-08
IRFP264N, SiHFP264N
Vishay Siliconix
RD
VDS
50
VGS
D.U.T.
RG
+
- VDD
ID , Drain Current (A)
40
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
30
Fig. 10a - Switching Time Test Circuit
20
VDS
90 %
10
0
25
50
75
100
125
150
175
10 %
VGS
TC , Case Temperature ( °C)
td(on)
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
Fig. 9 - Maximum Drain Current vs. Case Temperature
Thermal Response (Z thJC )
1
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
PDM
0.01
t1
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.001
0.00001
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS
15 V
tp
L
VDS
D.U.T
RG
IAS
20 V
tp
Driver
+
A
- VDD
IAS
0.01 Ω
Fig. 12a - Unclamped Inductive Test Circuit
Document Number: 91216
S-81274-Rev. A, 16-Jun-08
Fig. 12b - Unclamped Inductive Waveforms
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IRFP264N, SiHFP264N
Vishay Siliconix
EAS , Single Pulse Avalanche Energy (mJ)
1000
ID
10A
18A
25A
TOP
800
BOTTOM
600
400
200
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( °C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
VGS
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
Document Number: 91216
S-81274-Rev. A, 16-Jun-08
IRFP264N, SiHFP264N
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
•
•
•
•
RG
dV/dt controlled by R G
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test
Driver gate drive
P.W.
+
Period
D=
+
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
VDD
Body diode forward drop
Inductor current
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?91216.
Document Number: 91216
S-81274-Rev. A, 16-Jun-08
www.vishay.com
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Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
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Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
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