Predicting the Performance of Sort Tooling to 40 Gb/s

Transcription

Predicting the Performance of Sort Tooling to 40 Gb/s
Predicting the Performance
of Sort Tooling to 40 Gb/s
Brett Grossman
Signal Integrity Staff Engineer
Intel Corporation
Hillsboro, OR
[email protected]
Bryan Boots
Application Engineer
Ansoft Corporation
Boulder, CO
[email protected]
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Outline
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Background
Problem Statement
Model creation process
Model correlation
Sensitivity analysis
Summary
Acknowledgements
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Telecom Datarate Trend
45
OC-768
40
IO Data Rate (Gbps)
35
30
25
20
•Sonet
•Sonet==Synchronous
SynchronousOptical
OpticalNetwork,
Network,
•OC
Carrier
•OC==Optical
OpticalCarrier
•OC-xxx
•OC-xxx==Data
Datarate
rate➨➨‘xxx’
‘xxx’* *51.84
51.84Mbps
Mbps
15
OC-192
10
5
0
Firewire
USB
OC-48
Serial ATA
Infiniband
Serial ATA
USB2
Year
Time
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What is 40 Gb/s?
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PMD devices
– PMD – Physical Media Dependent
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40 Gb/s devices characterized by:
– Very small risetime (~10ps)
– Very small amplitude (~10mV)
– Very small die size (~1.0 mm)
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40 Gb/s - another view
Equivalent to transmitting more than 7 CD-ROM’s of data
every second
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40 Gb/s – yet, another view
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Probe Technology Continuum
10% of Probe
Technologies
# of technologies
90% of Probe
Technologies
DC
50 GHz
110 GHz
•
> 90% of probe technologies currently address 10% of this
spectrum
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Illustration based on response to RFI submitted to 35 probe
technology companies
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Probe Evaluation
• Test vehicle designed
– For the typical battery
of tests
• Lifetime
• Cres
• …
• But, high frequency
performance was
critical
Top view of evaluation vehicle
How could we evaluate the impact of design
trade-offs on high frequency performance?
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Problem Statement
• Need to quantify performance tradeoffs
– Performance = ƒ(suppliers experience)
• Desired robust process where some
iterations could be ‘virtual’
• Current tools/methods had not
demonstrated capability to support this
complexity
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Model Topology
Instrument
coax
Center line
coax
Connector
Mechanical
Assembly
Flex
PCB
Probecard cross section
Probe
DUT
• Complex signal path topology
– Multiple substrates (cable, PCB, PI flex)
– Multiple guide structures (Coax, CPW, microstrip)
• Physically small, Electrically large features
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Model Creation
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Two high speed
channels selected
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Signal paths
segmented into 3
logical blocks
Layout for flex component
1. Flex block
2. Coax block
3. Transition block
High speed channels on flex
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Model Creation (flex block)
GDS
• Need to translate
directly from
physical layout
HFSS
GDS
Boolean
HFSS
GDS
LinkCAD
HFSS
GDS
Ansoft
Designer
AnsoftLinks
HFSS
Other names and brands may be claimed as the property of others
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Model Creation (coax block)
• Model for connector and coax built from coax
structure and data sheet parameters
• Model parameters (blue) fit to measurements (red)
Coax model
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Model Creation (transition block)
• The transition
elements were
created manually
in HFSS
• The individual
elements are
assembled for
simulation
Merged model
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Model Correlation
Thru measurement (red) to model (blue)
correlation shown from 0.05-40.05 GHz
Channel #1
Channel #2
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Sensitivity Analysis
– Microstrip vs. CPW length
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Sensitivity Analysis
• Impact on insertion loss
Offset
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Sensitivity Analysis
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Summary
• HFSS Learning curve, creating a robust
modeling ‘process’
• Ended up successfully modeling the path
based on physical geometry
• Can continue to use this model for what-if
type analysis to assess design trade-offs
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Acknowledgements
• The authors would like to thank Marc
Berube for his continued support of this
work.
• We would also like to thank Cascade
Microtech for their contributions and open
discussions.
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References
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Ansoft – www.ansoft.com
Cascade Microtech – www.cmicro.com
Boolean - www.xs4all.nl/~kholwerd/bool.html
LinkCAD – www.linkcad.com
Intel – www.intel.com , developer.intel.com
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