MAX220–MAX249 - Instituto Politécnico de Setúbal
Transcription
MAX220–MAX249 - Instituto Politécnico de Setúbal
Instituto Politécnico de Setúbal Escola Superior de Tecnologia de Setúbal Controlo de um sistema articulado com dois graus de liberdade Pedro Silva Nº: 4064 Luís Rita Nº: 3468 Projecto final para obtenção do grau de Bacharel em Engenharia de Electrónica e Computadores Outubro de 2003 Escola Superior de Tecnologia de Setúbal Instituto Politécnico de Setúbal Projecto Final de Curso I Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Projecto Final realizado sob a orientação do Professor António Abreu Departamento de Engenharia Electrotécnica Escola Superior de Tecnologia de Setúbal Instituto Politécnico de Setúbal II Escola Superior de Tecnologia de Setúbal Projecto Final de Curso RESUMO Este trabalho tem como objectivo a construção e controlo de um sistema com 2 graus de liberdade: azimute e elevação. O controlo incide sobre 2 motores passo-a-passo, e a informação na qual se baseia o controlo é a luminosidade proveniente de quatro sensores. Assim, o sistema procura e segue fontes de luminosidade. PALAVRAS CHAVE • Sensor • Conversor • Controlo • Motor passo-a-passo Instituto Politécnico de Setúbal III Escola Superior de Tecnologia de Setúbal Projecto Final de Curso ABSTRACT The objective of this is the construction and control of a system with two degrees of freedom: azimuth and elevation. The control goes straight to two engines step by step, and is based on the brightness of four sensors. So, the system searches for and follows the source of the brightness. KEYWORDS • Sensor • Converter • Control • Engine step by step Instituto Politécnico de Setúbal IV Escola Superior de Tecnologia de Setúbal Projecto Final de Curso AGRADECIMENTOS Desejamos prestar os nossos agradecimentos ao nosso orientador Prof. António Abreu, por se ter empenhado na orientação deste projecto muito para além do que era a sua obrigação. Desejamos também expressar os nossos agradecimentos ao Sr. Luís Manuel Jesus da Silva e ao Sr. Manuel Moita Rita, por todo o apoio técnico que nos prestaram e pelas proveitosas trocas de ideias que tiveram connosco. Um agradecimento muito especial para as nossas famílias, que tiveram sempre ao nosso lado nos momentos de maiores dificuldades. Finalmente, desejamos agradecer à ESTS pelos meios que colocou à nossa disposição, que tornaram possível a conclusão deste projecto. Instituto Politécnico de Setúbal V Escola Superior de Tecnologia de Setúbal Projecto Final de Curso ÍNDICE GERAL Página 1 – INTRODUÇÃO ...........................................................................................................1 1.1 – Descrição do Trabalho..........................................................................................1 1.2 – Organização do Projecto.......................................................................................2 2 – DIAGRAMA DE BLOCOS IMPLEMENTADO .......................................................3 3 – SENSORES .................................................................................................................5 3.1 – Fotodíodo..............................................................................................................5 3.2 – Fototransístor ........................................................................................................7 3.3 – LDR (light dependent resistor) ............................................................................9 3.4 – Disposição dos Sensores.....................................................................................12 3.5 – Opções Tomadas ................................................................................................17 3.5.1 – Três sensores ...............................................................................................17 3.5.2 – Cinco sensores.............................................................................................18 3.5.3 – Quatro sensores ...........................................................................................18 4 – CONTROLO DO SISTEMA ....................................................................................21 4.1 – Controlo ON/OFF...............................................................................................21 5 – ADC...........................................................................................................................23 5.1 MX7828.................................................................................................................23 6 – MOTORES PASSO-A-PASSO.................................................................................24 6.1 – Descrição do Motor Passo-a-Passo ....................................................................24 6.2 – O Meio Passo......................................................................................................24 6.3 – Princípio de Funcionamento ...............................................................................25 7 – DRIVERS ..................................................................................................................29 7.1 – SAA1042 ............................................................................................................29 7.2 – Esquema Eléctrico do Driver..............................................................................30 8 – SISTEMA ARTICULADO .......................................................................................32 9 – COMPORTAMENTO DA CABEÇA EM RELAÇÃO AO ESTÍMULO ................35 9.1 – Um Eixo de Cada Vez Contra Dois Eixos em Simultâneo ................................35 9.2 - Descrição do Funcionamento do Sistema ...........................................................37 9.3 - Inicialização do Sistema......................................................................................38 10 – SOFTWARE DE APLICAÇÃO .............................................................................42 11 – TESTES PRÁTICOS...............................................................................................44 12 – APLICAÇÕES ........................................................................................................47 13 – MELHORAMENTOS FUTUROS..........................................................................48 14 – CONCLUSÕES .......................................................................................................49 15 – REFERÊNCIAS BIBLIOGRÁFICAS ....................................................................50 ANEXOS Instituto Politécnico de Setúbal VI Escola Superior de Tecnologia de Setúbal Projecto Final de Curso ÍNDICE DE FIGURAS Página Figura 1.1 – Sistema articulado a controlar. ......................................................................1 Figura 2.1– Diagrama de blocos do sistema implementado. .............................................3 Figura 3. 1 – Configuração básica de polarização.............................................................5 Figura 3. 2 – Corrente inversa em função da luz, retirada da referência [3]. ....................6 Figura 3. 3 – Símbolo do Fotodíodo..................................................................................6 Figura 3. 4 – Curva Característica do Fotodíodo, de [3]. ..................................................7 Figura 3. 5 - Circuito exemplo do fototransístor, de [3]....................................................8 Figura 3. 6 – Símbolo do fototransístor. ............................................................................8 Figura 3. 7 – Curva Característica do fototransístor, de [3]. .............................................9 Figura 3. 8 – Símbolo da LDR. .......................................................................................10 Figura 3. 9 – Medição experimental da variação da tensão aos terminais da LDR em função da variação da luz ambiente.........................................................................11 Figura 3. 10 – Esquema eléctrico utilizado para medir a variação de luminosidade apresentada na figura 3.9. ........................................................................................12 Figura 3. 11 – Disposição dos três sensores. ...................................................................13 Figura 3. 12 – Captura de luz. .........................................................................................13 Figura 3. 13 – Situação de luz focada..............................................................................14 Figura 3. 14 – Disposição de quatro sensores no sistema de rotação. .............................14 Figura 3. 15 – A cabeça segue a luz no sentido do sensor que está a captar maior luminosidade............................................................................................................15 Figura 3. 16 – Situação de luz focada..............................................................................15 Figura 3. 17 – Disposição dos cinco sensores. ................................................................16 Figura 3. 18 – Movimento lateral. ...................................................................................16 Figura 3. 19 – Situação de luz focada..............................................................................17 Figura 3. 20 - Exemplo a com três sensores. ...................................................................17 Figura 3. 21 – Configuração de quatro sensores escolhida. ............................................19 Figura 3. 22 – Protecção da luz lateral. ...........................................................................20 Figura 3. 23 – Luz ambiente em função da luz máxima. ................................................20 Figura 4.1 – Esquema dos sensores em actuação. ...........................................................21 Figura 4. 2 – Resultado do controlo em função da entrada. ............................................22 Figura 5. 1 – Sinais de Controlo do ADC. ......................................................................23 Figura 6. 1 – Configuração de um motor passo-a-passo e disposição do rotor em função da polaridade da alimentação do estator, retirada de [2]. ........................................26 Figura 6. 2 – Modelo de um motor passo-a-passo com 6 fios.........................................27 Figura 7. 1 – Esquema típico do SAA1042. ....................................................................29 Figura 7. 2 – Esquema eléctrico dos drivers do motor passo-a-passo.............................30 Figura 8. 1 – Sistema de contactos deslizantes................................................................32 Figura 8. 2 – Desmultiplicação de força..........................................................................34 Instituto Politécnico de Setúbal VII Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Figura 9. 1– Caminho percorrido pela cabeça analisando um eixo de cada vez. ............35 Figura 9. 2 – Caminho percorrido pela cabeça analisando os dois eixos em simultâneo. .................................................................................................................................36 Figura 9. 3 – Placa de circuito impresso do controlo do sistema. ...................................37 Figura 9. 4 – Cabeça na posição inicial (0°)....................................................................38 Figura 9. 5 – Posição limite em elevação (180° ou -180°). .............................................39 Figura 9. 6 – Posição de 45°. ...........................................................................................40 Figura 9. 7 – Posição de -45°...........................................................................................41 Figura 10. 1 – Menu Principal da aplicação desenvolvida. .............................................42 Figura 10. 2 – Gráfico em tempo real dos valores lidos..................................................43 Figura 11. 1 – Gráfico da resposta com um eixo de cada vez. ........................................44 Figura 11. 2 – Gráfico da resposta com os dois eixos em simultâneo.............................45 Figura 11. 3 – Gráfico da resposta do sistema em três situações idênticas. ....................46 Instituto Politécnico de Setúbal VIII Escola Superior de Tecnologia de Setúbal Projecto Final de Curso ÍNDICE DE TABELAS Página Tabela 6. 1 – Sequência de passos de um motor passo-a-passo......................................28 Tabela 7. 1 – Lista de entradas e saídas do Driver. .........................................................31 Instituto Politécnico de Setúbal IX Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 1 – INTRODUÇÃO 1.1 – Descrição do Trabalho Este projecto tem como finalidade a construção e o controlo de um sistema articulado semelhante a uma cabeça, i.e., com uma parte fixa (o ombro) e uma parte móvel com dois graus de liberdade: azimute e elevação (cabeça 1 ), como se pode ver na figura 1.1, de modo a que a cabeça aponte para a zona que corresponda ao valor máximo de uma variável, neste caso, a luminosidade. Figura 1.1 – Sistema articulado a controlar. Para isso foi desenhado um protótipo com base nos suportes para câmaras de vídeo em aplicações de vigilância. A escolha dos sensores, conversor e microcontrolador a utilizar foi uma tarefa relativamente cuidadosa, pois dos componentes escolhidos dependem muitos factores. O desenvolvimento do sistema prosseguiu com o estabelecimento do comportamento da cabeça em função da informação de luminosidade, bem como o melhoramento global, por via experimental. Todos os estudos e resultados obtidos durante este projecto podem ainda ser analisados através da seguinte página: http://ltodi.est.ips.pt/aabreu/cabeca.html. 1 Faltando somente a inclinação para que seja semelhante a uma cabeça Instituto Politécnico de Setúbal 1 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 1.2 – Organização do Projecto Este projecto encontra-se organizado em 15 capítulos. Assim, neste primeiro capítulo é feita uma breve introdução do projecto, bem como a forma como este documento se encontra organizado. No capítulo 2 é descrito o diagrama de blocos implementado, para se ter uma melhor visualização dos blocos constituintes do projecto. No capítulo 3 apresentam-se os tipos de sensores que reagem à luminosidade, e o porquê da utilização das LDRs. É ainda feito um estudo das possíveis disposições dos sensores, bem como do número de sensores necessários. No capítulo 4 é abordada a forma como o sistema é controlado, enquanto que no capítulo 5 é descrita como é realizada a conversão analógico – digital. Por outro lado, no capítulo 6 é feito um estudo sobre mo tores passo-a-passo, assim como uma caracterização mais pormenorizada dos motores utilizados. No capítulo 7 é apresentada a forma como foram construídos os drivers para controlar os motores. No capítulo 8 são apresentados os factores tidos em conta aquando da realização do sistema articulado, enquanto que no capítulo 9 é caracterizado o comportamento da cabeça em relação ao estímulo, bem como a comparação do funcionamento da mesma quando o controlo incide num eixo de cada vez e nos dois eixos ao mesmo tempo. No capítulo 10 é mostrado como funciona uma pequena aplicação de visualização das variáveis do sistema, e no capítulo 11 são feitos os testes práticos do comportamento da cabeça em relação a vários estímulos, utilizando para tal o software de aplicação. No capítulo 12 apresentam-se algumas aplicações deste projecto, enquanto que no capítulo 13 apontam-se alguns melhoramentos possíveis. Por fim nos capítulos 14 e 15 são apresentadas as conclusões de projecto, bem como algumas referências bibliográficas. Instituto Politécnico de Setúbal 2 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 2 – DIAGRAMA DE BLOCOS IMPLEMENTADO O diagrama apresentado na figura 2.1 específica todos os blocos constituintes do projecto, assim como as ligações entre cada um deles. Figura 2.1– Diagrama de blocos do sistema implementado. O bloco “Sensores” diz respeito ao conjunto de Sensores, tendo como função captar a luminosidade ambiente. Esta luminosidade que é enviada para o bloco “ADC”, sob a forma de tensão. O bloco “ADC” é constituído por uma conversor analógico/digital que recebe os valores provenientes do bloco “Sensores”. Sempre que o bloco “Microcontrolador” o entenda, o “ADC” converte os valores, e envia-os para o mesmo, para que possam ser processados. O bloco “Microcontrolador” controla ainda 2 drivers, para os motores. Este bloco, sempre que necessário, faz um pedido ao bloco “ADC” para que este converta os Instituto Politécnico de Setúbal 3 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso valores dos sensores, e depois de processar a informação, envia as ordens de comando para o bloco “Motores”, através dos drivers. O bloco “Motores” é constituído por dois motores passo-a-passo, e tem como única função provocar o movimento do sistema articulado, para que este siga o foco de luz. Após esta breve introdução, é apresentado um estudo mais aprofundado de como estes blocos interagem entre si, assim como a sua constituição. Instituto Politécnico de Setúbal 4 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 3 – SENSORES Para a escolha dos sensores de luminosidade a utilizar foi realizado um estudo sobre três tipos de sensores: fotodíodos, fototransístores e LDRs 2 . 3.1 – Fotodíodo É um dispositivo semicondutor de junção P-N, construído de forma especial, de modo a possibilitar a utilização da luz como factor determinante no controlo de corrente eléctrica. A sua configuração básica de polarização é apresentada na figura 3.1. De notar que este se encontra polarizado inversamente. A aplicação de luz na junção P-N provoca uma transferência de energia das ondas de luz incidentes (na forma de fotões) para a estrutura atómica, aumentando com isto, o número de portadores minoritários e consequentemente o nível de corrente inversa. Uma vantagem importante neste dispositivo é o de a corrente inversa variar proporcionalmente com a luminosidade, como se pode constatar na figura 3.2. Figura 3. 1 – Configuração básica de polarização. 2 Resistência dependente da luz Instituto Politécnico de Setúbal 5 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Figura 3. 2 – Corrente inversa em função da luz, retirada da referência [3]. Símbolo: Figura 3. 3 – Símbolo do Fotodíodo. Constituição física: É composto por duas pastilhas de silício como num díodo semicondutor normal. A diferença está no tamanho das pastilhas que são maiores que a dos díodos convencionais, além de existir uma “janela”, que possibilita a incidência dos raios luminosos na junção. Características: • Corrente inversa e o fluxo luminoso possuem relação quase linear. • Resposta (velocidade) é muito mais rápida que a LDR. • Sensível a luz visível, infravermelho e ultravioleta. Instituto Politécnico de Setúbal 6 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Curva Característica: Figura 3. 4 – Curva Característica do Fotodíodo, de [3]. Aplicações: • Medir a intensidade luminosa (fotografia); • Detecção de sinais luminosos de alta- frequência. 3.2 – Fototransístor O fototransístor é um dispositivo que funciona baseado no fenómeno da fotocondutividade. Como nas outras células fotocondutoras, a incidência de luz (fotões) provoca o surgimento de buracos na vizinhança da junção base-colector. Esta tensão fa z com que os buracos se “movam” para o emissor, enquanto os electrões passam do emissor para a base. Isto provocará um aumento da corrente de base, o que por consequência implicará um aumento da corrente de colector ß vezes (Ic = ß . IB), sendo este aumento proporcional à intensidade de luz incidente. Como a base está normalmente desligada, a corrente que circula por ela dependerá apenas da luz incidente. Assim, na ausência de luz, a corrente de base será zero e o fototransístor está ao corte, resultando na tensão do colector igual à tensão de polarização Vcc, como se ilustra na figura 3.5. Quando há luz incidindo sobre o fototransístor, a tensão no colector irá diminuir devido ao aumento da corrente. Instituto Politécnico de Setúbal 7 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Na escolha de um fototransístor para uma dada aplicação, precisamos de observar a sua sensibilidade à frequência da radiação utilizada (tipo de luz), a corrente que ele fornece e a tensão máxima que pode ser aplicada entre o colector e o emissor. Figura 3. 5 - Circuito exemplo do fototransístor, de [3]. Símbolo: Figura 3. 6 – Símbolo do fototransístor. Ligação: O terminal de base poderá ou não estar electricamente ligado. Nas aplicações normais, os fototransístores são utilizados com a base livre (NC). A corrente que circula entre o colector e o emissor depende da luz e é então aproveitada para controlo de um circuito. Instituto Politécnico de Setúbal 8 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Curva Característica: Figura 3. 7 – Curva Característica do fototransístor, de [3]. Aplicações: • Equipamentos de controlo de luz • Leitura de cartões • Acopladores ópticos 3.3 – LDR (light dependent resistor) Existem substâncias que alteram a sua resistência em função da quantidade de luz que recebem. Os fotões de luz visível que a substância recebe retiram os electrões das órbitas, aumentando assim o número de electrões livres e facilitando a condução de corrente. O sulfato de cádmio (Cds) é uma das substâncias utilizadas para o fabrico de Ldrs. Instituto Politécnico de Setúbal 9 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Símbolo: Figura 3. 8 – Símbolo da LDR. Características: • Não são componentes polarizados. • Dissipam calor como as resistências. • A capacidade é directamente proporcional à área de sensibilidade, ou seja, quanto maior for a superfície de incidência da luz, mais sensível é a LDR, e por outro lado possibilita o controlo de correntes mais intensas por parte desta. • A resistência da LDR varia com a luz do seguinte modo: 1MΩ<R(ambiente escuro)<10MΩ e 75Ω<R(ambiente iluminado)< 500Ω • Resposta espectral: o A sensibilidade da LDR é maior para comprimentos de onda que reproduzem a cor vermelha, tendendo um pouco para a laranja (6800 Angstron); o É sensível a comprimentos de onda que o olho humano não percebe, como o infravermelho (7000 a 7500 Angstron) • Resposta de actuação: o A LDR é um dispositivo lento. Estando todo iluminado, aquando da retirada da fonte de luz e em comparação com o fotodíodo/fototransístor, denota-se uma demora até que a sua resistência volte ao valor máximo. Assim sendo, a sua aplicação não é viável, por exemplo, em leitura de código de barras. No entanto, pode aplicar-se em brinquedos, detectores de nível de iluminação, Instituto Politécnico de Setúbal 10 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso sensores de luz ambiente, etc., visto não ser necessária uma verificação rápida da variação da resistência com a luz. Portanto, após um estudo teórico e alguns testes experimentais, o sensor escolhido para leitura da quantidade de luz foi a LDR. As razões principais da desta escolha têm por base as seguintes características das LDR: são sensores que têm um tempo de resposta aceitável à detecção de luz, na ordem dos 33ms, como se pode ver na figura 3.9; e não variam de uma forma brusca com a variação de luz, ao contrário dos fotodíodos e dos fototransístores. Figura 3. 9 – Medição experimental da variação da tensão aos terminais da LDR em função da variação da luz ambiente. Instituto Politécnico de Setúbal 11 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Para se chegar ao resultado da figura foi implementado o circuito da figura 3.10. Figura 3. 10 – Esquema eléctrico utilizado para medir a variação de luminosidade apresentada na figura 3.9. Este funciona como um divisor de tensão, em que a tensão de saída varia directamente com a variação da resistência na LDR. Vo = R1 Vi R1 + LDR 3.4 – Disposição dos Sensores O número mínimo de sensores para que a cabeça consiga seguir um foco de luz, num espaço a 2 dimensões 3 , é três, com a disposição apresentada na figura 3.11. Contudo, esta opção introduz uma maior complexidade ao nível do controlo, pois não se pode associar a cada sensor uma direcção. θ , Elevação – ϕ Instituto Politécnico de Setúbal 3 Azimu te – 12 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Figura 3. 11 – Disposição dos três sensores. Quando é detectada luz pelo grupo de sensores, a informação é processada resultando um movimento composto, i.e., movimento nos 2 eixos, tal como se ilustra na figura 3.12. Relativamente a essa figura há que referir que a cor dos círculos representa a luminosidade que cada sensor recebe, ou seja, quanto mais claro for círculo, maior luminosidade está a receber o sensor. Figura 3. 12 – Captura de luz. Nesta disposição considera-se que a cabeça está a apontar para o foco de luz quando todos os sensores medirem a mesma luminosidade, tal como se ilustra na figura 3.13. Instituto Politécnico de Setúbal 13 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Figura 3. 13 – Situação de luz focada. Por outro lado, a utilização de 4 sensores permite associar os dois sentidos dos dois eixos de rotação ( ϕ e θ ) a cada sensor, de acordo com o ilustrado na figura 3.14. Figura 3. 14 – Disposição de quatro sensores no sistema de rotação. Para o seguimento do foco de luz, os sensores são analisados dois a dois, avaliando-se os semi-eixos em que os movimentos devem ser feitos. Por exemplo, a diferença entre os sensores de topo e de baixo, permite determinar qual o sentido de movimento a realizar no eixo ϕ . Instituto Politécnico de Setúbal 14 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Figura 3. 15 – A cabeça segue a luz no sentido do sensor que está a captar maior luminosidade. Para se poder dizer que a posição do foco de luz está devidamente determinada, todos os sensores devem receber a mesma intensidade de luz, ver figura 3.16. Figura 3. 16 – Situação de luz focada. No caso de serem utilizados cinco sensores, a disposição a realizar seria a que se apresenta na figura 3.17. Instituto Politécnico de Setúbal 15 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Figura 3. 17 – Disposição dos cinco sensores. Os quatro sensores dispostos em quadrado correspondem a cada uma das direcções possíveis de movimento, tal como no caso anterior. O sensor que captar maior luminosidade determina qual o sentido e direcção em que a cabeça se deve mover (ver figura 3.18). Figura 3. 18 – Movimento lateral. Neste caso, o sensor do meio permitiria o reconhecimento da cabeça focada, ou seja, quando o sensor do meio apresenta o maior valor, então a cabeça está focada (ver figura 3.19). O quinto sensor, como se verá, para além de ser redundante piora o desempenho do sistema, como tal é dispensado. Instituto Politécnico de Setúbal 16 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Figura 3. 19 – Situação de luz focada. 3.5 – Opções Tomadas 3.5.1 – Três sensores Como já foi referido, o uso de três sensores complica o processo de controlo do sistema, assim apesar de não ter sido testado na prática foi realizado o seguinte estudo teórico: Considere-se a seguinte situação: Figura 3. 20 - Exemplo a com três sensores. O movimento deve ser proporcional a: cos( −30) = 0,89 → no eixo φ sen( −30) = −0,5 → no eixo ϕ Instituto Politécnico de Setúbal 17 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Agora, há que transformar 0,89 e -0,5 em quantidades inteiras. Primeiro vai-se convencionar que basta trabalhar com uma casa decimal. Seja: m = min(| 0,87 |; | −0,5 |) = 0,5 0,87 0,87 = = 1,74; m 0,5 0.5 0.5 = =1 m 0,5 Como é que se anda 1,74 unidades no eixo ? e 1 no eixo ϕ ? Tem que se definir a precisão que se quer. Para isso pode-se definir os seguintes pares de movimento: (1,1), (2,3), (3,5), (4,7); Caso se continuasse obter-se- ia uma maior precisão, mas o movimento seria maior. O movimento (3,5) talvez seja um bom ponto de equilíbrio. 3.5.2 – Cinco sensores Foi inicialmente testado o funcionamento da cabeça com cinco sensores. Contudo chegou-se à conclusão de que esta disposição tinha o inconveniente de não reagir a pequenos movimentos do foco, ou seja, enquanto o sensor do meio retornar o maior valor, a cabeça não se mexe, pois é considerada focada podendo esse sensor captar mais luminosidade. 3.5.3 – Quatro sensores Assim, e para eliminar os problemas surgidos nas configurações já apresentadas, a escolha recaiu na configuração com quatro sensores, como se pode ver na figura 3.20. Instituto Politécnico de Setúbal 18 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso . Figura 3. 21 – Configuração de quatro sensores escolhida. Foi também colocada a hipótese da utilização de um sensor na parte traseira da cabeça, para apanhar fontes de luz que aparecessem na posição diametralmente oposta à dos sensores (i.e., na nuca). Esta opção apresenta a desvantagem de necessitar de mais 1 sensor. Com efeito quando passa algum tempo sem que a cabeça capte luz que não seja a ambiente, esta executa uma procura sistemática, prescutando todo o espaço envolvente. Outra opção tomada relativamente aos sensores teve a ver com o ângulo de captura das LDR, que é muito grande. Para isso foram colocadas umas protecções em todos os sensores, tal como se apresenta na figura 3.21, para que a luz vinda lateralmente não seja captada. Deste modo, cada sensor indica a presença de fontes de luz que estejam na direcção do seu eixo longitudinal. Instituto Politécnico de Setúbal 19 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Figura 3. 22 – Protecção da luz lateral. Uma das contrariedades na realização do trabalho foi a existência de luz ambiente forte. Quando a luz ambiente é muito forte, é necessário que o foco de luz seja ainda mais forte para que seja reconhecido como tal. Para além disso, quanto mais perto o nível da luz ambiente estiver do nível de saturação da LDR, mais difícil, se não mesmo impossível, é a detecção e seguimento do foco (ver figura 3.22). Figura 3. 23 – Luz ambiente em função da luz máxima. Portanto temos: O domínio da variável luminosidade captada pelo sensor, que se determina subtraindo o nível de luz ambiente da luz máxima captada, deve ser tão grande quanto possível, isto é, a luz ambiente deve ser baixa e o foco deve emitir luz forte. Instituto Politécnico de Setúbal 20 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 4 – CONTROLO DO SISTEMA 4.1 – Controlo ON/OFF Para o controlo do sistema em causa foi utilizado um controlo ON/OFF, ou seja, são lidos os valores provenientes dos sensores (figura 4.1), e é feita uma subtracção. Se o valor da subtracção for superior a um dado valor (Sensibilidade), então o motor que comanda a elevação move-se um passo (ON) no sentido indicado pelo sinal da subtracção. Caso contrário, o sistema não mexe (OFF). O valor de sensibilidade é ajustado experimentalmente. Figura 4.1 – Esquema dos sensores em actuação. Com vista a resumir o texto, só se faz a explicação do cálculo do movimento para o eixo ϕ , ou seja, só se considera os sensores 1 e 2, de acordo com a figura 4.1. Os cálculos para o restante eixo são semelhantes. Considere-se que: ∆S = Sensor1 − Sensor 2 E que o comportamento do sistema é dado por: ∆S < Sensibilid ade ⇒ OFF ∆S ≥ Sensibilid ade ⇒ ON O que controla o sentido de rotação, cima ou baixo, é o sinal de ∆S . Instituto Politécnico de Setúbal 21 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Assim: ∆S < 0 ⇒ Cima ∆S > 0 ⇒ Baixo Como conclusão pode dizer-se que: Figura 4. 2 – Resultado do controlo em função da entrada. OFF ⇒ 0 resposta = ON ∧ Cima ⇒ 1 ON ∧ Baixo ⇒ −1 Instituto Politécnico de Setúbal 22 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 5 – ADC 5.1 MX7828 Para transformar os valores de tensão provenientes das LDR em informação digital, é necessária a utilização de um conversor analógico para digital. Assim e após um estudo de mercado, foi escolhido o ADC MX7828, cujo datasheet se encontra no anexo A.3, dado ter uma velocidade de conversão elevada, na ordem dos 2,5µs por canal, e por ter 8 canais, o que é importante quando se usam muitos sensores. É um ADC de 8 bits com interface paralelo. Este ADC possui 4 sinais de controlo para fazer-se a conversão de analógico para digital: o /CS (chip-select), /RD (read), RDY (ready) e /INT (interrupt output). Como se pode comprovar pela figura 4.1, todos os sinais são inicialmente colocados a 1, em seguida são colocados a 0 os sinais /CS, /RD pelo micro, e RDY e /INT pelo ADC. A informação convertida fica disponível nos pinos correspondentes. Por último, e para se poder realizar mais uma conversão, os sinais /RD, /INT, RDY e /CS são colocados a 1. O intervalo de tempo entre as activações de /CS e /RD não é tomado em consideração porque é muito pequeno, o que é garantido pelo tempo que demoram as instruções do microcontrolador. Figura 5. 1 – Sinais de Controlo do ADC. Instituto Politécnico de Setúbal 23 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 6 – MOTORES PASSO-A-PASSO 6.1 – Descrição do Motor Passo-a-Passo Num motor passo-a-passo, como o próprio nome indica, o veio move-se uma quantidade discreta, denominada passo, em resposta à aplicação de um sinal eléctrico entre dois dos seus terminais. A velocidade com que o veio se move é função da taxa a que se sucedem os passos. Assim, um motor passo-a-passo é um dispositivo síncrono. Enquanto a diferença de potencial estiver aplicada nesses terminais, o veio do motor está parado, fazendo uma força que se opõe a qualquer movimento imposto exteriormente. Por outro lado, quando se remove a tensão entre os dois terminais, o veio fica livre, deixando de fazer essa força, pelo que passa a ser fácil rodar o veio. Um motor passo-a-passo dispõe no seu interior de diversos enrolamentos ou bobinas. A quantidade de movimento angular num motor passo-a-passo ou o tamanho do passo, é fixa e depende da configuração dos enrolamentos existentes. Nos dois motores passo-a-passo utilizados no projecto, o que controla o azimute tem um passo de 4,5° e o que controla a elevação tem um passo de 1,82°. Em azimute são necessários 198 passos para se dar uma volta completa, enquanto que no eixo da elevação o motor apenas necessita de dar 80 passos. Azimute 360 ÷ 80 = 4,5° / passo Elevação 360 ÷ 198 = 1,82° / passo 6.2 – O Meio Passo O meio passo é conseguindo alimentando um enrolamento de cada vez em alternância com a alimentação de ambos os enrolamentos. O meio passo tem o inconveniente de que, por um lado tem-se que o torque varia de meio passo em meio passo, dado que numas posições é alimentado um enrolamento e nas restantes são alimentados dois enrolamentos, o que faz com que a força realizada não seja sempre a mesma, mas por outro lado o meio passo tem a vantagem de permitir um controlo mais Instituto Politécnico de Setúbal 24 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso fino, e, como tal, mais preciso. Como o principal objectivo do projecto é a precisão na posição e não a força, decidiu-se utilizar o meio passo. 6.3 – Princípio de Funcionamento Um motor é constituído por um rotor, que é a parte móvel, e por um estator, que é a parte fixa. O veio do motor está acoplado ao rotor. A figura 6.1 a) pode ser entendida como uma aproximação ao interior de um motor passo-a-passo. Considere-se um motor com dois enrolamentos. Logo que seja aplicada uma diferença de potencial aos terminais do motor, segundo a polaridade indicada na figura 6.1 b) e cuja grandeza não é importante, a passagem da corrente eléctrica cria nas bobinas um campo magnético cuja polaridade é também apresentada na figura 6.1 b). Dado que pólos diferentes atraem-se, então o veio do motor é levado para a posição indicada, que é a única onde a distância entre os pólos opostos do rotor e do estator é menor neste caso. Se a polaridade aos terminais do motor for invertida, como evidenciado na figura 6.1 c), então o veio roda em sentido contrário ao da figura 6.1 b), pois pólos iguais repelem-se. Contudo, após a rotação do rotor, essa força vai-se transformar em força de atracção. Instituto Politécnico de Setúbal 25 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Figura 6. 1 – Configuração de um motor passo-a-passo e disposição do rotor em função da polaridade da alimentação do estator, retirada de [2]. Existem vários tipos de motores passo-a-passo. Relativamente à constituição do rotor, existem motores de relutância variável e de magneto permanente. Quanto à configuração interna, existem os unipolares e os bipolares. Os motores utilizados no projecto são motores passo-a-passo unipolares com cinco fios, apresentando uma configuração idêntica à da figura 6.2; contudo, os terminais Power1 e Power2 estão ligados interiormente entre si, ao contrário do que acontece nos motores com seis fios. Instituto Politécnico de Setúbal 26 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Figura 6. 2 – Modelo de um motor passo-a-passo com 6 fios. Os motores passo-a-passo podem funcionar em passo simples, em passo simples com duas fases e em meio passo como se ilustra na tabela 6.1. Instituto Politécnico de Setúbal 27 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Tabela de sequência de passos Sequência Nome Descrição 1a 2b 1b 2a 0 0 0 1 0 0 1 0 0 1 0 0 Cada enrolamento é alimentado de Passo Simples cada vez, conseguindo-se um menor consumo de corrente. 1 0 0 0 Os enrolamentos são alimentados 0 0 1 1 0 1 1 0 1 1 0 0 1 0 0 1 Passo Simples dois a dois, daí o nome “Duas Fases”. Assim temos um com comportamento igual ao passo Duas Fases simples, mas com mais força. O consumo de corrente é maio r 0 0 0 1 0 0 1 1 0 0 1 0 0 1 1 0 0 1 0 0 Funciona a partir das duas formas Meio Passo anteriores, e obtêm-se uma precisão maior. É de notar que a 1 1 0 0 sequência é constituída por oito 1 0 0 0 passos. 1 0 0 1 Tabela 6. 1 – Sequência de passos de um motor passo-a-passo. Instituto Politécnico de Setúbal 28 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 7 – DRIVERS 7.1 – SAA1042 O SAA1042 é um driver para motores passo-a-passo. Este circuito integrado possui 3 estados de entrada, 2 estados de saída e uma secção de lógica; suporta até 500mA, funciona com comandos CW/CCW, com meio passo ou passo completo. Para isso foi utilizado o CI SAA1042, (ver anexo A.4) de forma a permitir um controlo de direcção e velocidade com apenas dois pinos para cada motor (Clock e CW/CCW), ver figura 7.1. A sua utilização é vantajosa se tivermos em consideração o número de portos disponíveis pelo microcontrolador AT89C51 (ver anexo A.1), caso contrário eram necessários 8 pinos. Figura 7. 1 – Es quema típico do SAA1042. Outra vantagem prende-se com o facto de se trabalhar em meio passo, o que aumenta a precisão em 100%. Contudo, este CI é limitado ao nível da corrente disponibilizada para o motor. Assim fo i utilizado um circuito simples com transístores de potência, de modo a permitir maiores consumos no motor a partir da fonte de alimentação. Neste caso, o sinal gerado pelo CI é apenas de controlo. Instituto Politécnico de Setúbal 29 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Um problema que se coloca é devido à elevada corrente que o motor necessita para trabalhar correctamente, na ordem de 1A/1,5A. O regulador normalmente utilizado, e facilmente adquirível no mercado, é o 7805C, cujo datasheet se encontra no anexo A.5, que suporta uma corrente máxima de 1,2A. Na impossibilidade prática de se encontrar outra solução optou-se pelo uso de dois desses reguladores em paralelo, sendo necessário proceder à escolha de dois reguladores o mais iguais entre si, de uma forma experimental, para que a distribuição da corrente pelos dois fosse semelhante. Devido aos valores de corrente que percorrem os reguladores serem muito próximos do valor máximo, optou-se por se utilizar dissipadores como forma de facilitar a dissipação do calor gerado por efeito de Joule e assim aumentar o seu tempo de vida. 7.2 – Esquema Eléctrico do Driver Figura 7. 2 – Esquema eléctrico dos drivers do motor passo-a-passo. Instituto Politécnico de Setúbal 30 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso A tabela 7.1 mostra a lista de entradas e saídas do esquema da figura 7.2. Tabela de Entradas/Saídas Pino Nome U9.1 GND U9.2 +5V Descrição Massa do sistema. +5 Volt, sai directamente dos reguladores para alimentar o motor. U9.3 VI U10.1 Dir_x Alimentação do sistema. Sinal proveniente do microcontrolador que define a direcção de rotação. U10.2 Freq_x Sinal proveniente do microcontrolador que controla a velocidade de rotação. Enrolamento do motor. Quando o transístor Q8 U10.3 L4 recebe um sinal do SAA1042, este pino fica ligado á massa. Enrolamento do motor. Quando o transístor Q7 U11.1 L3 recebe um sinal do SAA1042, este pino fica ligado á massa. Enrolamento do motor. Quando o transístor Q5 U11.2 L2 recebe um sinal do SAA1042, este pino fica ligado á massa. Enrolamento do motor. Quando o transístor Q6 U11.3 L1 recebe um sinal do SAA1042, este pino fica ligado á massa. Tabela 7. 1 – Lista de entradas e saídas do Driver. Instituto Politécnico de Setúbal 31 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 8 – SISTEMA ARTICULADO O suporte utilizado para dar forma à cabeça foi desenhado tendo em conta os suportes para vídeo vigilância, ver desenho no anexo G. O tamanho deste foi bastante influenciado pelo tamanho dos motores passo-apasso disponíveis. Um dos factores que foi tido em conta no projecto do suporte foi não haver limitação na rotação da cabeça em azimute. Para isso foi utilizado um sistema de transmissão da alimentação eléctrica através de contactos deslizantes (ver anexo C.3), como se ilustra na figura 8.1. Figura 8. 1 – Sistema de contactos deslizantes. Instituto Politécnico de Setúbal 32 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso São utilizados contactos em cobre que apresentam uma resistência muito pequena, praticamente nula, quando comparados com escovas de carvão, como chegou a ser testado. Estas últimas possuíam uma resistência de 30O em repouso e em movimento chegavam a valores na ordem dos 400O a 1KO, considerados inviáveis. A sua utilização requeria que a fonte de alimentação debitasse uma tensão na ordem dos 10 a 11 Volt. Por outro lado, tinha-se o inconveniente de que a tensão que alimentava o circuito não era estável, mas oscilante entre 3,5 e 5 Volt, consoante a resistência da escova de carvão nessa altura. Como os motores passo-a-passo utilizados não são iguais, necessitam de um número diferente de passos para percorrerem 360º (198 passos em elevação e 80 passos em azimute). Assim, foi implementado um sistema de desmultiplicação de forças usando dois carretos de dimensões diferentes unidos por uma correia, para que o número de passos em elevação fosse mais ou menos o mesmo que em azimute, como se pode ver na figura 8.2. Tendo o carreto acoplado ao motor um diâmetro de 41 milímetros e o do eixo 16 milímetros consegue-se um factor multiplicativo (F_Mul) de: F _ Mul = 16 = 0,39 41 O que aplicado ao número de passos necessários passa a ser: Passos = 198 × 0,39 ≈ 77 Instituto Politécnico de Setúbal 33 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Figura 8. 2 – Desmultiplicação de força. Instituto Politécnico de Setúbal 34 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 9 – COMPORTAMENTO DA CABEÇA EM RELAÇÃO AO ESTÍMULO Para controlar a cabeça em resposta à luz foi utilizado o microcontrolador AT89C51, cujo datasheet se encontra no anexo A.1. Este microcontrolador tem internamente 4 Kbytes de memória flash, 128*8 Bytes de RAM interna, 32 linhas de Entrada/Saída programáveis e 2 contadores de 16 bits. 9.1 – Um Eixo de Cada Vez Contra Dois Eixos em Simultâneo A operação de seguimento da luz por parte da cabeça, não é uma operação muito complexa, tendo sido pensada de modo a ser a mais precisa e rápida possível. Inicialmente utilizou-se uma forma de controlo que trabalha um eixo de cada vez, (ver figura 9.1), ou seja, só depois de alinhar em elevação e que se passa para o alinhamento em azimute. Caminho Percorrido 16 15 14 13 12 Azimute - Nº Passos 11 10 9 8 Caminho 1 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Elevação - Nº Passos Figura 9. 1– Caminho percorrido pela cabeça analisando um eixo de cada vez. Instituto Politécnico de Setúbal 35 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Esta abordagem apresenta 2 defeitos: – O tempo total para o alinhamento corresponde à soma dos tempos para o alinhamento em cada eixo. – Quando está a alinhar em elevação não capta movimentos em azimute Para eliminar estes defeitos, foi utilizado outro método, alinhando-se os 2 eixos em simultâneo (ver figura 9.2). Caminho Percorrido 16 15 14 13 12 Azimute - Nº Passos 11 10 9 8 Caminho2 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Elevação - Nº Passos Figura 9. 2 – Caminho percorrido pela cabeça analisando os dois eixos em simultâneo. Resultados: – Diminuição do tempo de focagem. – Capta todos os movimentos do foco em todos os instantes. Instituto Politécnico de Setúbal 36 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 9.2 - Descrição do Funcionamento do Sistema O controlo da cabeça com base nos pares de sensores cima/baixo e esquerda/direita, separadamente, é do tio ON/OFF. Assim, o microcontrolador recebe os valores dos sensores através do ADC e realiza as subtracções como está descrito no capítulo CONTROLO DO SISTEMA. Depois de realizada esta operação o microcontrolador provoca o movimento dos motores, ficando o foco mais perto do centro dos sensores. Para isso foi implementado o circuito eléctrico apresentado no anexo B.2, assim como a respectiva placa de circuito impresso (ver anexo C.2), como se ilustra na figura 9.3. Figura 9. 3 – Placa de circuito impresso do controlo do sistema. Instituto Politécnico de Setúbal 37 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 9.3 - Inicialização do Sistema Sempre que o sistema é ligado é necessário que o grupo de sensores esteja virado para cima (posição inicial - 0°, ver figura 9.4), para que o sistema possa saber a posição exacta da cabeça a qualquer instante. Este aspecto é importante, pois só assim se pode limitar a rotação em elevação, entre 180° e -180°, na figura 9.5 apresenta-se a cabeça com orientação -180°. Caso a cabeça continuasse a rodar, o conjunto de fios que se vê do lado esquerdo enrolar-se- iam em torno do eixo metálico. É também importante saber a posição da cabeça por causa dos sensores que controlam o azimute, o sentido que estes comandam deve ser trocado quando se passa de um ângulo positivo para um negativo. Caso esta troca não aconteça, verifica-se que a cabeça tem um comportamento normal quando está a trabalhar em ângulos positivos, mas quando entra nos ângulos negativos, em vez de seguir a luz, afasta-se dela, no eixo da azimute. Figura 9. 4 – Cabeça na posição inicial (0°). Instituto Politécnico de Setúbal 38 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Figura 9. 5 – Posição limite em elevação (180° ou -180°). Após os sensores estarem na posição de 0°, e o sistema ter sido inicializado, inicia-se o reconhecimento da quantidade de luz ambiente. Este reconhecimento acontece da seguinte forma: a cabeça desloca-se 45° em elevação, como se ilustra na figura 9.6, em seguida dá uma volta de 360° em azimute, e depois volta à posição 0° em elevação, durante estes movimentos, os valores dos sensores são guardados, o valor mais elevado é considerado o valor de luz ambiente. Só depois de o sistema ter realizado este reconhecimento da quantidade de luz ambiente é que se pode dizer que a cabeça está em condições de seguir um foco de luz. No caso de o sistema não detectar um foco de luz num período de 10 segundos, é realizada uma pesquisa com vista à procurar fontes de luz que possam ter surgido na zona de sombra dos sensores. Antes de a executar, a cabeça é colocada na posição 45° (ver figura 9.6) ou -45° (ver figura 9.7), dependendo se esta se encontra no lado positivo ou no lado negativo do eixo da elevação. Esta pesquisa consiste numa rotação de 360° em azimute, durante a qual os valores dos sensores e respectiva posição são guardados. Instituto Politécnico de Setúbal 39 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Assim que a volta de pesquisa acabe, a cabeça, caso tenha encontrado alguma luminosidade maior, desloca-se para o local onde essa se encontra. Figura 9. 6 – Posição de 45°. Instituto Politécnico de Setúbal 40 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Figura 9. 7 – Posição de -45°. Instituto Politécnico de Setúbal 41 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 10 – SOFTWARE DE APLICAÇÃO Tendo em vista o controlo da cabeça através de um computador, ou apenas para uma melhor visualização das variáveis envolvidas no processo, foi desenvolvida uma aplicação em Visual Basic, cujo o código se apresenta no anexo E. Esta aplicação é constituída basicamente por duas janelas apresentadas nas figuras 10.1 e 10.2. A primeira permite iniciar e parar o processo, alterar valores de referência, sensibilidade e visualizar os valores provenientes dos sensores. A outra tem como única função permitir ao utilizador a visualização de um gráfico em tempo real e a informação do desvio da cabeça em relação ao ponto de maior luminosidade. Figura 10. 1 – Menu Principal da aplicação desenvolvida. Instituto Politécnico de Setúbal 42 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Figura 10. 2 – Gráfico em tempo real dos valores lidos. Instituto Politécnico de Setúbal 43 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 11 – TESTES PRÁTICOS Foram realizados alguns testes de forma a se poder avaliar o comportamento da cabeça em função da luz recebida. O primeiro teste é relativo ao tempo necessário para que a cabeça ficasse focada. A figura 11.1, é relativa à estabilização de um eixo de cada vez ao passo que a figura 11.2 é relativa à estabilização dos dois eixos em simultâneo. Constata-se que, como previamente mencionado, o sistema com estabilização em dois eixos em simultâneo é mais eficiente. Captura de Luz 25 20 15 10 Diferença da Luz 5 0 0 5 10 15 20 25 30 35 40 45 50 55 60 65 Vertival 70 Horizontal -5 -10 -15 -20 -25 -30 Amostra Figura 11. 1 – Gráfico da resposta com um eixo de cada vez. Na figura 11.1 pode-se ver que o número de amostras necessário para que a luz se considere focada é aproximadamente 45, sendo necessárias cerca de 15 para estabilização no eixo ϕ e 30 para estabilização no eixo ?. Tendo-se 20 amostras por segundo, pode-se dizer que o sistema demora 2,25s a orientar-se para a luz. Instituto Politécnico de Setúbal 44 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Captura de Luz 30 25 20 15 Diferença da Luz 10 5 Elevação 0 0 5 10 15 20 25 30 35 40 45 50 55 60 65 Azimute 70 -5 -10 -15 -20 -25 -30 Amostra Figura 11. 2 – Gráfico da resposta com os dois eixos em simultâneo. Na figura 11.2 pode-se ver que o número de amostras necessário para que a luz se considere focada é aproximadamente 27. Tal como anteriormente, assumindo 20 amostras por segundo, verifica-se que são necessários 1,4s para se obter a focagem. A experiência cujo o resultado se apresenta na figura 11.2 foi repetida diversas vezes, para verificar se a cabeça tinha sempre o mesmo comportamento. Partindo sempre do mesmo sítio e respondendo a um estímulo que se encontrava sempre no mesmo lugar, verificou-se que a cabeça tem sempre o mesmo comportamento (ver figura 11.3). Instituto Politécnico de Setúbal 45 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso Captura de Luz 25 20 15 10 Diferença da Luz 5 Elevação1 Azimute1 Elevação2 0 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 Azimute2 Elevação3 Azimute3 -5 -10 -15 -20 -25 Amostra Figura 11. 3 – Gráfico da resposta do sistema em três situações idênticas. Instituto Politécnico de Setúbal 46 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 12 – APLICAÇÕES O sistema desenvolvido pode ser aplicado em algumas situações práticas. Pode-se utilizar em células fotovoltaicas ou painéis de aquecimento de água, com orientação solar e assim ter-se um maior aproveitamento da energia solar. Em sistemas de vigilância, trocando o tipo de sensores a utilizar para sensores PIR, pode-se aplicar em sistemas de detecção e seguimento de pessoas. Instituto Politécnico de Setúbal 47 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 13 – MELHORAMENTOS FUTUROS Um dos aspectos que podem ser melhorados diz respeito ao valor de referência. Com efeito, quando a cabeça começa a funcionar realiza uma volta para determinar a luminosidade ambiente; a partir daí este valor permanece inalterado. Passa-se a ter um problema pois a luz ambiente varia bastante durante o dia. Analise-se o seguinte caso: a cabeça começa a funcionar às 9h numa sala de aula com três janelas viradas para o nascente. O valor de referência obtido é 214. Passada uma hora foi notado que a cabeça não respondia apenas ao foco de luz mas também respondia à luz exterior. Uma das possibilidades para a resolução deste problema é fazer-se uma pesquisa automática que procura o local de maior luminosidade. Caso este valor seja maior que a referência, esta é actualizada por este valor. É assim conseguida uma referência dinâmica ao longo do tempo. È também possível a utilização de mais sensores pois existem disponíveis oito canais de conversão analógico/digital. Um melhoramento interessante está na remoção da limitação de rotação no eixo de elevação. Instituto Politécnico de Setúbal 48 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 14 – CONCLUSÕES Este trabalho permitiu conhecer o funcionamento dos sensores de luz existentes no mercado. Foi escolhida a LDR pois o seu comportamento é muito bom para o tipo de sistema desenvolvido, pois, apesar de se considerar lento em relação a outros estudados tem uma gama de variação maior. Inicialmente o trabalho foi realizado com a utilização de cinco sensores, contudo e após a realização de alguns testes, foi notada claramente a vantagem de se trabalhar com quatro sensores pois conseguia-se “apanhar” muito melhor pequenos movimentos do foco de luz. A luz ambiente foi um dos factores que influenciou o desempenho do sistema. Com efeito, a sua intensidade varia de local para local, assim como de hora para hora. No que diz respeito aos motores passo-a-passo foi aproveitada a possibilidade da utilização do meio passo para aumentar a precisão da cabeça. Outro factor que teve de ser levado em consideração foi a velocidade máxima de funcionamento dos motores. O facto de o sistema poder rodar em azimute sem constrangimentos, recorrendo a contactos deslizantes, é uma característica positiva do trabalho. Foram testadas escovas de carvão e de cobre, tendo-se observado os efeitos produzidos pelo movimento na condutividade do carvão (aumento da resistência). As escovas de cobre apresentam um bom contacto eléctrico, mas o atrito pode provocar desaparecimento das pistas no longo prazo. Foram testados dois métodos de seguimento da luz: alinhando um eixo de cada vez e alinhando os dois eixos em simultâneo. Apesar de os dois serem eficazes o segundo é superior, daí a escolha ter recaído sobre este. Instituto Politécnico de Setúbal 49 Escola Superior de Tecnologia de Setúbal Projecto Final de Curso 15 – REFERÊNCIAS BIBLIOGRÁFICAS [1] A série MCS51 de Microcontroladores de oito bits da Intel, António Abreu, Escola Superior de Tecnologia de Setúbal, Setembro, 1998 [2] Motores passo-a-passo, António Abreu, Escola Superior de Tecnologia de Setúbal, Setembro, 1998 [3] Dispositivos Electrónicos e Teoria de Circuitos, Sexta Edição, Robert L. Boylrstad e Louis Nashelsky, LTC Editora, 1996 [4] http://209.41.165.153/stepper/Tutorials/UniTutor.htm [5] http://www.cefetpr.br/deptos/daelt/eletronica/disp_optoelet.pdf [6] http://www.imagingpg.com/products/products.asp?cat=30#88 [7] http://www.arquimedes.net/sens/sensor_de_luz_2.htm [8] Electronic Devices And Circuits, First Edition, Michael Hassul e Don Zimmerman, Prentice Hall, 1997 Instituto Politécnico de Setúbal 50 ANEXOS ÍNDICE ANEXO A – Datasheets ANEXO A.1 – AT89C51 ANEXO A.2 – MAX233A ANEXO A.3 – MX7828 ANEXO A.4 – SAA1042 ANEXO A.5 – 7805 ANEXO A.6 – BD243 ANEXO B – Esquemático ANEXO B.1 – Drivers ANEXO B.2 – Principal ANEXO C – PCB ANEXO C.1 – Drivers ANEXO C.2 – Principal ANEXO C.3 – Pistas para os contactos deslizantes ANEXO D – Programa do Microcontrolador ANEXO D.1 – Sem Ligação ao PC ANEXO D.2 – Com ligação ao PC ANEXO E – Programa em Visual Basic ANEXO F – Lista de material ANEXO G – Desenho em Mechanical ANEXO A – Datasheets ANEXO A.1 – AT89C51 Features • Compatible with MCS-51™ Products • 4K Bytes of In-System Reprogrammable Flash Memory • • • • • • • • – Endurance: 1,000 Write/Erase Cycles Fully Static Operation: 0 Hz to 24 MHz Three-level Program Memory Lock 128 x 8-bit Internal RAM 32 Programmable I/O Lines Two 16-bit Timer/Counters Six Interrupt Sources Programmable Serial Channel Low-power Idle and Power-down Modes Description The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications. P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD) P3.0 (TXD) P3.1 (INT0) P3.2 (INT1) P3.3 (T0) P3.4 (T1) P3.5 (WR) P3.6 (RD) P3.7 XTAL2 XTAL1 GND 44 43 42 41 40 39 38 37 36 35 34 P1.4 P1.3 P1.2 P1.1 (T2 EX) P1.0 (T2) NC VCC P0.0 (AD0) P0.1 (AD1) P0.2 (AD2) P0.3 (AD3) PQFP/TQFP VCC P0.0 (AD0) P0.1 (AD1) P0.2 (AD2) P0.3 (AD3) P0.4 (AD4) P0.5 (AD5) P0.6 (AD6) P0.7 (AD7) EA/VPP ALE/PROG PSEN P2.7 (A15) P2.6 (A14) P2.5 (A13) P2.4 (A12) P2.3 (A11) P2.2 (A10) P2.1 (A9) P2.0 (A8) P1.5 P1.6 P1.7 RST (RXD) P3.0 NC (TXD) P3.1 (INT0) P3.2 (INT1) P3.3 (T0) P3.4 (T1) P3.5 6 5 4 3 2 1 44 43 42 41 40 P1.4 P1.3 P1.2 P1.1 P1.0 NC VCC P0.0 (AD0) P0.1 (AD1) P0.2 (AD2) P0.3 (AD3) PLCC 7 8 9 10 11 12 13 14 15 16 17 39 38 37 36 35 34 33 32 31 30 29 18 19 20 21 22 23 24 25 26 27 28 12 13 14 15 16 17 18 19 20 21 22 PO.4 (AD4) P0.5 (AD5) P0.6 (AD6) P0.7 (AD7) EA/VPP NC ALE/PROG PSEN P2.7 (A15) P2.6 (A14) P2.5 (A13) 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 (WR)P3.6 (RD) P3.7 XTAL2 XTAL1 GND NC (A8) P2.0 (A9) P2.1 (A10) P2.2 (A11) P2.3 (A12) P2.4 33 32 31 30 29 28 27 26 25 24 23 1 2 3 4 5 6 7 8 9 10 11 (WR)P3.6 (RD) P3.7 XTAL2 XTAL1 GND GND (A8) P2.0 (A9) P2.1 (A10) P2.2 (A11) P2.3 (A12) P2.4 P1.5 P1.6 P1.7 RST (RXD) P3.0 NC (TXD) P3.1 (INT0) P3.2 (INT1) P3.3 (T0) P3.4 (T1) P3.5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 AT89C51 Not Recommended for New Designs. Use AT89S51. PDIP Pin Configurations 8-bit Microcontroller with 4K Bytes Flash PO.4 (AD4) P0.5 (AD5) P0.6 (AD6) P0.7 (AD7) EA/VPP NC ALE/PROG PSEN P2.7 (A15) P2.6 (A14) P2.5 (A13) Rev. 0265G–02/00 1 Block Diagram P0.0 - P0.7 P2.0 - P2.7 PORT 0 DRIVERS PORT 2 DRIVERS VCC GND RAM ADDR. REGISTER B REGISTER PORT 0 LATCH RAM PORT 2 LATCH FLASH STACK POINTER ACC BUFFER TMP1 TMP2 PROGRAM ADDRESS REGISTER PC INCREMENTER ALU INTERRUPT, SERIAL PORT, AND TIMER BLOCKS PROGRAM COUNTER PSW PSEN ALE/PROG EA / VPP TIMING AND CONTROL INSTRUCTION REGISTER DPTR RST PORT 1 LATCH PORT 3 LATCH PORT 1 DRIVERS PORT 3 DRIVERS OSC P1.0 - P1.7 2 AT89C51 P3.0 - P3.7 AT89C51 The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application, it uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification. Port 3 Pin Description VCC Supply voltage. GND Ground. Port 3 is an 8-bit bi-directional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the AT89C51 as listed below: Port 0 Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs. Port Pin Alternate Functions P3.0 RXD (serial input port) P3.1 TXD (serial output port) Port 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups. P3.2 INT0 (external interrupt 0) P3.3 INT1 (external interrupt 1) P3.4 T0 (timer 0 external input) Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pullups are required during program verification. P3.5 T1 (timer 1 external input) P3.6 WR (external data memory write strobe) P3.7 RD (external data memory read strobe) Port 1 Port 1 is an 8-bit bi-directional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 1 also receives the low-order address bytes during Flash programming and verification. Port 2 Port 2 is an 8-bit bi-directional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 also receives some control signals for Flash programming and verification. RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. ALE/PROG Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE 3 pulse is skipped during each access to external Data Memory. unconnected while XTAL1 is driven as shown in Figure 2. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode. Idle Mode PSEN In idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. Program Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory. EA/VPP External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to V C C for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP. Figure 1. Oscillator Connections C2 XTAL2 XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit. C1 XTAL1 XTAL2 Output from the inverting oscillator amplifier. GND Oscillator Characteristics XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left Note: C1, C2 = 30 pF ± 10 pF for Crystals = 40 pF ± 10 pF for Ceramic Resonators Status of External Pins During Idle and Power-down Modes Mode Program Memory ALE PSEN PORT0 PORT1 PORT2 PORT3 Idle Internal 1 1 Data Data Data Data Idle External 1 1 Float Data Address Data Power-down Internal 0 0 Data Data Data Data Power-down External 0 0 Float Data Data Data 4 AT89C51 AT89C51 Figure 2. External Clock Drive Configuration ters retain their values until the power-down mode is terminated. The only exit from power-down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. Program Memory Lock Bits On the chip are three lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed in the table below. Power-down Mode In the power-down mode, the oscillator is stopped, and the instruction that invokes power-down is the last instruction executed. The on-chip RAM and Special Function Regis- When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement with the current logic level at that pin in order for the device to function properly. Lock Bit Protection Modes Program Lock Bits LB1 LB2 LB3 Protection Type 1 U U U No program lock features 2 P U U MOVC instructions executed from external program memory are disabled from fetching code bytes from internal memory, EA is sampled and latched on reset, and further programming of the Flash is disabled 3 P P U Same as mode 2, also verify is disabled 4 P P P Same as mode 3, also external execution is disabled 5 Programming the Flash The AT89C51 is normally shipped with the on-chip Flash memory array in the erased state (that is, contents = FFH) and ready to be programmed. The programming interface accepts either a high-voltage (12-volt) or a low-voltage (V CC ) program enable signal. The low-voltage programming mode provides a convenient way to program the AT89C51 inside the user’s system, while the high-voltage programming mode is compatible with conventional thirdparty Flash or EPROM programmers. The AT89C51 is shipped with either the high-voltage or low-voltage programming mode enabled. The respective top-side marking and device signature codes are listed in the following table. VPP = 12V VPP = 5V Top-side Mark AT89C51 xxxx yyww AT89C51 xxxx-5 yyww Signature (030H) = 1EH (031H) = 51H (032H) =F FH (030H) = 1EH (031H) = 51H (032H) = 05H The AT89C51 code memory array is programmed byte-bybyte in either programming mode. To program any nonblank byte in the on-chip Flash Memory, the entire memory must be erased using the Chip Erase Mode. Programming Algorithm: Before programming the AT89C51, the address, data and control signals should be set up according to the Flash programming mode table and Figure 3 and Figure 4. To program the AT89C51, take the following steps. 1. Input the desired memory location on the address lines. 2. Input the appropriate data byte on the data lines. 3. Activate the correct combination of control signals. 4. Raise EA/VPP to 12V for the high-voltage programming mode. 5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write cycle is self-timed and typically takes no more than 1.5 ms. Repeat steps 1 through 5, changing the address 6 AT89C51 and data for the entire array or until the end of the object file is reached. Data Polling: The AT89C51 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written datum on PO.7. Once the write cycle has been completed, true data are valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated. Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY. Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled. Chip Erase: The entire Flash array is erased electrically by using the proper combination of control signals and by holding ALE/PROG low for 10 ms. The code array is written with all “1”s. The chip erase operation must be executed before the code memory can be re-programmed. Reading the Signature Bytes: The signature bytes are read by the same procedure as a normal verification of locations 030H, 031H, and 032H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned are as follows. (030H) = 1EH indicates manufactured by Atmel (031H) = 51H indicates 89C51 (032H) = FFH indicates 12V programming (032H) = 05H indicates 5V programming Programming Interface Every code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is selftimed and once initiated, will automatically time itself to completion. All major programming vendors offer worldwide support for the Atmel microcontroller series. Please contact your local programming vendor for the appropriate software revision. AT89C51 Flash Programming Modes RST PSEN EA/VPP P2.6 P2.7 P3.6 P3.7 Write Code Data H L H/12V L H H H Read Code Data H L H L L H H Bit - 1 H L H/12V H H H H Bit - 2 H L H/12V H H L L Bit - 3 H L H/12V H L H L Chip Erase H L H/12V H L L L Read Signature Byte H L H L L L L Mode Write Lock Note: ALE/PROG H (1) H 1. Chip Erase requires a 10 ms PROG pulse. Figure 3. Programming the Flash Figure 4. Verifying the Flash +5V +5V AT89C51 A0 - A7 ADDR. OOOOH/OFFFH A8 - A11 P1 P2.0 - P2.3 AT89C51 VCC P0 PGM DATA A0 - A7 ADDR. OOOOH/0FFFH P2.7 P2.0 - P2.3 P0 P2.6 ALE PROG P3.6 SEE FLASH PROGRAMMING MODES TABLE P2.7 EA VIH/VPP 3-24 MHz PGM DATA (USE 10K PULLUPS) ALE P3.6 VIH P3.7 P3.7 XTAL2 VCC A8 - A11 P2.6 SEE FLASH PROGRAMMING MODES TABLE P1 XTAL2 EA XTAL1 RST 3-24 MHz XTAL1 GND RST PSEN VIH GND VIH PSEN 7 Flash Programming and Verification Waveforms - High-voltage Mode (VPP = 12V) PROGRAMMING ADDRESS P1.0 - P1.7 P2.0 - P2.3 VERIFICATION ADDRESS tAVQV PORT 0 DATA IN tDVGL tAVGL tGHDX DATA OUT tGHAX ALE/PROG tSHGL tGLGH VPP tGHSL LOGIC 1 LOGIC 0 EA/VPP tEHSH tEHQZ tELQV P2.7 (ENABLE) tGHBL P3.4 (RDY/BSY) BUSY READY tWC Flash Programming and Verification Waveforms - Low-voltage Mode (VPP = 5V) PROGRAMMING ADDRESS P1.0 - P1.7 P2.0 - P2.3 VERIFICATION ADDRESS tAVQV PORT 0 DATA IN tDVGL tAVGL tGHDX DATA OUT tGHAX ALE/PROG tSHGL tGLGH LOGIC 1 LOGIC 0 EA/VPP tEHSH tEHQZ tELQV P2.7 (ENABLE) tGHBL P3.4 (RDY/BSY) BUSY tWC 8 AT89C51 READY AT89C51 Flash Programming and Verification Characteristics TA = 0°C to 70°C, VCC = 5.0 ± 10% Symbol VPP (1) Parameter Min Max Units Programming Enable Voltage 11.5 12.5 V 1.0 mA 24 MHz IPP(1) Programming Enable Current 1/tCLCL Oscillator Frequency tAVGL Address Setup to PROG Low 48tCLCL tGHAX Address Hold after PROG 48tCLCL tDVGL Data Setup to PROG Low 48tCLCL tGHDX Data Hold after PROG 48tCLCL tEHSH P2.7 (ENABLE) High to VPP 48tCLCL tSHGL VPP Setup to PROG Low 10 µs tGHSL(1) VPP Hold after PROG 10 µs tGLGH PROG Width tAVQV Address to Data Valid 48tCLCL tELQV ENABLE Low to Data Valid 48tCLCL tEHQZ Data Float after ENABLE tGHBL PROG High to BUSY Low tWC Note: Byte Write Cycle Time 1. Only used in 12-volt programming mode. 3 1 0 110 µs 48tCLCL 1.0 µs 2.0 ms 9 Absolute Maximum Ratings* Operating Temperature.................................. -55°C to +125°C *NOTICE: Storage Temperature ..................................... -65°C to +150°C Voltage on Any Pin with Respect to Ground .....................................-1.0V to +7.0V Maximum Operating Voltage ............................................ 6.6V Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC Output Current...................................................... 15.0 mA DC Characteristics TA = -40°C to 85°C, VCC = 5.0V ± 20% (unless otherwise noted) Symbol Parameter Condition Min Max Units VIL Input Low-voltage (Except EA) -0.5 0.2 VCC - 0.1 V VIL1 Input Low-voltage (EA) -0.5 0.2 VCC - 0.3 V VIH Input High-voltage 0.2 VCC + 0.9 VCC + 0.5 V VIH1 Input High-voltage 0.7 VCC VCC + 0.5 V IOL = 1.6 mA 0.45 V IOL = 3.2 mA 0.45 V VOL Output Low-voltage (Except XTAL1, RST) (XTAL1, RST) (1) (Ports 1,2,3) (1) VOL1 Output Low-voltage (Port 0, ALE, PSEN) VOH Output High-voltage (Ports 1,2,3, ALE, PSEN) IOH = -60 µA, VCC = 5V ± 10% 2.4 V IOH = -25 µA 0.75 VCC V IOH = -10 µA 0.9 VCC V 2.4 V IOH = -300 µA 0.75 VCC V IOH = -80 µA 0.9 VCC V IOH = -800 µA, VCC = 5V ± 10% VOH1 Output High-voltage (Port 0 in External Bus Mode) IIL Logical 0 Input Current (Ports 1,2,3) VIN = 0.45V -50 µA ITL Logical 1 to 0 Transition Current (Ports 1,2,3) VIN = 2V, VCC = 5V ± 10% -650 µA ILI Input Leakage Current (Port 0, EA) 0.45 < VIN < VCC ±10 µA RRST Reset Pull-down Resistor 300 KΩ CIO Pin Capacitance Test Freq. = 1 MHz, TA = 25°C 10 pF Active Mode, 12 MHz 20 mA Idle Mode, 12 MHz 5 mA VCC = 6V 100 µA VCC = 3V 40 µA 50 Power Supply Current ICC Power-down Mode(2) Notes: 10 1. Under steady state (non-transient) conditions, IOL must be externally limited as follows: Maximum IOL per port pin: 10 mA Maximum IOL per 8-bit port: Port 0: 26 mA Ports 1, 2, 3: 15 mA Maximum total IOL for all output pins: 71 mA If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions. 2. Minimum VCC for Power-down is 2V. AT89C51 AT89C51 AC Characteristics Under operating conditions, load capacitance for Port 0, ALE/PROG, and PSEN = 100 pF; load capacitance for all other outputs = 80 pF. External Program and Data Memory Characteristics 12 MHz Oscillator Min Max 16 to 24 MHz Oscillator Symbol Parameter Min Max Units 1/tCLCL Oscillator Frequency 0 24 MHz tLHLL ALE Pulse Width 127 2tCLCL-40 ns tAVLL Address Valid to ALE Low 43 tCLCL-13 ns tLLAX Address Hold after ALE Low 48 tCLCL-20 ns tLLIV ALE Low to Valid Instruction In tLLPL ALE Low to PSEN Low 43 tCLCL-13 ns tPLPH PSEN Pulse Width 205 3tCLCL-20 ns tPLIV PSEN Low to Valid Instruction In tPXIX Input Instruction Hold after PSEN tPXIZ Input Instruction Float after PSEN tPXAV PSEN to Address Valid tAVIV Address to Valid Instruction In 312 5tCLCL-55 ns tPLAZ PSEN Low to Address Float 10 10 ns tRLRH RD Pulse Width 400 6tCLCL-100 ns tWLWH WR Pulse Width 400 6tCLCL-100 ns tRLDV RD Low to Valid Data In tRHDX Data Hold after RD tRHDZ Data Float after RD 97 2tCLCL-28 ns tLLDV ALE Low to Valid Data In 517 8tCLCL-150 ns tAVDV Address to Valid Data In 585 9tCLCL-165 ns tLLWL ALE Low to RD or WR Low 200 3tCLCL+50 ns tAVWL Address to RD or WR Low 203 4tCLCL-75 ns tQVWX Data Valid to WR Transition 23 tCLCL-20 ns tQVWH Data Valid to WR High 433 7tCLCL-120 ns tWHQX Data Hold after WR 33 tCLCL-20 ns tRLAZ RD Low to Address Float tWHLH RD or WR High to ALE High 233 4tCLCL-65 145 0 3tCLCL-45 0 59 75 tCLCL-8 0 5tCLCL-90 3tCLCL-50 0 43 123 tCLCL-20 ns ns 0 300 ns ns tCLCL-10 252 ns ns ns 0 ns tCLCL+25 ns 11 External Program Memory Read Cycle tLHLL ALE tAVLL tLLIV tLLPL tPLIV PSEN tPXAV tPLAZ tPXIZ tLLAX tPXIX A0 - A7 PORT 0 tPLPH INSTR IN A0 - A7 tAVIV PORT 2 A8 - A15 A8 - A15 External Data Memory Read Cycle tLHLL ALE tWHLH PSEN tLLDV tRLRH tLLWL RD tLLAX tAVLL PORT 0 tRLDV tRLAZ A0 - A7 FROM RI OR DPL tRHDZ tRHDX DATA IN A0 - A7 FROM PCL INSTR IN tAVWL tAVDV PORT 2 12 P2.0 - P2.7 OR A8 - A15 FROM DPH AT89C51 A8 - A15 FROM PCH AT89C51 External Data Memory Write Cycle tLHLL ALE tWHLH PSEN tLLWL WR tAVLL tLLAX tQVWX A0 - A7 FROM RI OR DPL PORT 0 tWLWH tQVWH DATA OUT tWHQX A0 - A7 FROM PCL INSTR IN tAVWL PORT 2 P2.0 - P2.7 OR A8 - A15 FROM DPH A8 - A15 FROM PCH External Clock Drive Waveforms tCHCX VCC - 0.5V tCHCX tCLCH tCHCL 0.7 VCC 0.2 VCC - 0.1V 0.45V tCLCX tCLCL External Clock Drive Symbol Parameter 1/tCLCL Oscillator Frequency tCLCL Clock Period tCHCX Min Max Units 0 24 MHz 41.6 ns High Time 15 ns tCLCX Low Time 15 ns tCLCH Rise Time 20 ns tCHCL Fall Time 20 ns 13 Serial Port Timing: Shift Register Mode Test Conditions (VCC = 5.0 V ± 20%; Load Capacitance = 80 pF) 12 MHz Osc Variable Oscillator Max Min Units Symbol Parameter Min Max tXLXL Serial Port Clock Cycle Time 1.0 12tCLCL µs tQVXH Output Data Setup to Clock Rising Edge 700 10tCLCL-133 ns tXHQX Output Data Hold after Clock Rising Edge 50 2tCLCL-117 ns tXHDX Input Data Hold after Clock Rising Edge 0 0 ns tXHDV Clock Rising Edge to Input Data Valid 700 10tCLCL-133 ns Shift Register Mode Timing Waveforms INSTRUCTION ALE 0 1 2 3 4 5 6 7 8 tXLXL CLOCK tQVXH WRITE TO SBUF tXHQX 0 1 tXHDV OUTPUT DATA CLEAR RI VALID 2 3 4 5 6 tXHDX VALID SET TI VALID VALID VALID VALID VALID AC Testing Input/Output Waveforms(1) Note: 14 Float Waveforms(1) V LOAD+ 0.2 VCC + 0.9V TEST POINTS 0.45V VALID SET RI INPUT DATA VCC - 0.5V 7 AT89C51 V LOAD - Note: V OL - 0.1V V OL + 0.1V Timing Reference Points V LOAD 0.2 VCC - 0.1V 1. AC Inputs during testing are driven at VCC - 0.5V for a logic 1 and 0.45V for a logic 0. Timing measurements are made at VIH min. for a logic 1 and VIL max. for a logic 0. 0.1V 0.1V 1. For timing purposes, a port pin is no longer floating when a 100 mV change from load voltage occurs. A port pin begins to float when 100 mV change from the loaded VOH/VOL level occurs. AT89C51 Ordering Information Speed (MHz) Power Supply Ordering Code Package 12 5V ± 20% AT89C51-12AC 44A Commercial AT89C51-12JC 44J (0° C to 70° C) AT89C51-12PC 40P6 AT89C51-12QC 44Q AT89C51-12AI 44A Industrial AT89C51-12JI 44J (-40° C to 85° C) AT89C51-12PI 40P6 AT89C51-12QI 44Q AT89C51-16AC 44A Commercial AT89C51-16JC 44J (0° C to 70° C) AT89C51-16PC 40P6 AT89C51-16QC 44Q AT89C51-16AI 44A Industrial AT89C51-16JI 44J (-40° C to 85° C) AT89C51-16PI 40P6 AT89C51-16QI 44Q AT89C51-20AC 44A Commercial AT89C51-20JC 44J (0° C to 70° C) AT89C51-20PC 40P6 AT89C51-20QC 44Q AT89C51-20AI 44A Industrial AT89C51-20JI 44J (-40° C to 85° C) AT89C51-20PI 40P6 AT89C51-20QI 44Q AT89C51-24AC 44A Commercial AT89C51-24JC 44J (0° C to 70° C) AT89C51-24PC 40P6 AT89C51-24QC 44Q AT89C51-24AI 44A Industrial AT89C51-24JI 44J (-40° C to 85° C) AT89C51-24PI 40P6 AT89C51-24QI 44Q 16 20 24 5V ± 20% 5V ± 20% 5V ± 20% Operation Range Package Type 44A 44-lead, Thin Plastic Gull Wing Quad Flatpack (TQFP) 44J 44-lead, Plastic J-leaded Chip Carrier (PLCC) 40P6 40-lead, 0.600” Wide, Plastic Dual Inline Package (PDIP) 44Q 44-lead, Plastic Gull Wing Quad Flatpack (PQFP) 15 Packaging Information 44A, 44-lead, Thin (1.0 mm) Plastic Gull Wing Quad Flatpack (TQFP) Dimensions in Millimeters and (Inches)* 44J, 44-lead, Plastic J-leaded Chip Carrier (PLCC) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-018 AC JEDEC STANDARD MS-026 ACB 12.21(0.478) SQ 11.75(0.458) PIN 1 ID 0.45(0.018) 0.30(0.012) 0.80(0.031) BSC .045(1.14) X 45° .045(1.14) X 30° - 45° PIN NO. 1 IDENTIFY .630(16.0) .590(15.0) .656(16.7) SQ .650(16.5) .032(.813) .026(.660) .695(17.7) SQ .685(17.4) .050(1.27) TYP .500(12.7) REF SQ 10.10(0.394) SQ 9.90(0.386) .021(.533) .013(.330) .043(1.09) .020(.508) .120(3.05) .090(2.29) .180(4.57) .165(4.19) 1.20(0.047) MAX 0 7 0.20(.008) 0.09(.003) .012(.305) .008(.203) .022(.559) X 45° MAX (3X) 0.75(0.030) 0.45(0.018) 0.15(0.006) 0.05(0.002) Controlling dimension: millimeters 40P6, 40-lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) Dimensions in Inches and (Millimeters) 2.07(52.6) 2.04(51.8) 44Q, 44-lead, Plastic Quad Flat Package (PQFP) Dimensions in Millimeters and (Inches)* JEDEC STANDARD MS-022 AB 13.45 (0.525) SQ 12.95 (0.506) PIN 1 PIN 1 ID .566(14.4) .530(13.5) 0.50 (0.020) 0.35 (0.014) 0.80 (0.031) BSC .090(2.29) MAX 1.900(48.26) REF .220(5.59) MAX .005(.127) MIN SEATING PLANE .065(1.65) .015(.381) .022(.559) .014(.356) .161(4.09) .125(3.18) .110(2.79) .090(2.29) .012(.305) .008(.203) .065(1.65) .041(1.04) 10.10 (0.394) SQ 9.90 (0.386) .630(16.0) .590(15.0) 2.45 (0.096) MAX 0 REF 15 .690(17.5) .610(15.5) 0.17 (0.007) 0.13 (0.005) 0 7 1.03 (0.041) 0.78 (0.030) Controlling dimension: millimeters 16 AT89C51 0.25 (0.010) MAX Atmel Headquarters Atmel Operations Corporate Headquarters Atmel Colorado Springs 2325 Orchard Parkway San Jose, CA 95131 TEL (408) 441-0311 FAX (408) 487-2600 Europe 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TEL (719) 576-3300 FAX (719) 540-1759 Atmel Rousset Atmel U.K., Ltd. Coliseum Business Centre Riverside Way Camberley, Surrey GU15 3YL England TEL (44) 1276-686-677 FAX (44) 1276-686-697 Zone Industrielle 13106 Rousset Cedex France TEL (33) 4-4253-6000 FAX (33) 4-4253-6001 Asia Atmel Asia, Ltd. Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimhatsui East Kowloon Hong Kong TEL (852) 2721-9778 FAX (852) 2722-1369 Japan Atmel Japan K.K. 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan TEL (81) 3-3523-3551 FAX (81) 3-3523-7581 Fax-on-Demand North America: 1-(800) 292-8635 International: 1-(408) 441-0732 e-mail [email protected] Web Site http://www.atmel.com BBS 1-(408) 436-4309 © Atmel Corporation 2000. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life suppor t devices or systems. Marks bearing ® and/or ™ are registered trademarks and trademarks of Atmel Corporation. Terms and product names in this document may be trademarks of others. Printed on recycled paper. 0265G–02/00/xM ANEXO A.2 – MAX233A 19-4323; Rev 11; 2/03 +5V-Powered, Multichannel RS-232 Drivers/Receivers ____________________________Features Superior to Bipolar ♦ Operate from Single +5V Power Supply (+5V and +12V—MAX231/MAX239) ♦ Low-Power Receive Mode in Shutdown (MAX223/MAX242) ♦ Meet All EIA/TIA-232E and V.28 Specifications ♦ Multiple Drivers and Receivers ♦ 3-State Driver and Receiver Outputs ♦ Open-Line Detection (MAX243) Ordering Information ________________________Applications PART MAX220CPE MAX220CSE MAX220CWE MAX220C/D MAX220EPE MAX220ESE MAX220EWE MAX220EJE MAX220MJE Portable Computers Low-Power Modems Interface Translation Battery-Powered RS-232 Systems Multidrop RS-232 Networks TEMP RANGE 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -55°C to +125°C PIN-PACKAGE 16 Plastic DIP 16 Narrow SO 16 Wide SO Dice* 16 Plastic DIP 16 Narrow SO 16 Wide SO 16 CERDIP 16 CERDIP Ordering Information continued at end of data sheet. *Contact factory for dice specifications. Selection Table Part Number MAX220 MAX222 MAX223 (MAX213) MAX225 MAX230 (MAX200) MAX231 (MAX201) MAX232 (MAX202) MAX232A MAX233 (MAX203) MAX233A MAX234 (MAX204) MAX235 (MAX205) MAX236 (MAX206) MAX237 (MAX207) MAX238 (MAX208) MAX239 (MAX209) MAX240 MAX241 (MAX211) MAX242 MAX243 MAX244 MAX245 MAX246 MAX247 MAX248 MAX249 Power Supply (V) +5 +5 +5 +5 +5 +5 and +7.5 to +13.2 +5 +5 +5 +5 +5 +5 +5 +5 +5 +5 and +7.5 to +13.2 +5 +5 +5 +5 +5 +5 +5 +5 +5 +5 No. of RS-232 Drivers/Rx 2/2 2/2 4/5 5/5 5/0 2/2 No. of Ext. Caps 4 4 4 0 4 2 Nominal Cap. Value (µF) 0.1 0.1 1.0 (0.1) — 1.0 (0.1) 1.0 (0.1) SHDN & ThreeState No Yes Yes Yes Yes No Rx Active in SHDN — — ✔ ✔ — — Data Rate (kbps) 120 200 120 120 120 120 2/2 2/2 2/2 2/2 4/0 5/5 4/3 5/3 4/4 3/5 4 4 0 0 4 0 4 4 4 2 1.0 (0.1) 0.1 — — 1.0 (0.1) — 1.0 (0.1) 1.0 (0.1) 1.0 (0.1) 1.0 (0.1) No No No No No Yes Yes No No No — — — — — — — — — — 120 (64) 200 120 200 120 120 120 120 120 120 5/5 4/5 2/2 2/2 8/10 8/10 8/10 8/9 8/8 6/10 4 4 4 4 4 0 0 0 4 4 1.0 1.0 (0.1) 0.1 0.1 1.0 — — — 1.0 1.0 Yes Yes Yes No No Yes Yes Yes Yes Yes — — ✔ — — ✔ ✔ ✔ ✔ ✔ 120 120 200 200 120 120 120 120 120 120 Features Ultra-low-power, industry-standard pinout Low-power shutdown MAX241 and receivers active in shutdown Available in SO 5 drivers with shutdown Standard +5/+12V or battery supplies; same functions as MAX232 Industry standard Higher slew rate, small caps No external caps No external caps, high slew rate Replaces 1488 No external caps Shutdown, three state Complements IBM PC serial port Replaces 1488 and 1489 Standard +5/+12V or battery supplies; single-package solution for IBM PC serial port DIP or flatpack package Complete IBM PC serial port Separate shutdown and enable Open-line detection simplifies cabling High slew rate High slew rate, int. caps, two shutdown modes High slew rate, int. caps, three shutdown modes High slew rate, int. caps, nine operating modes High slew rate, selective half-chip enables Available in quad flatpack package ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX220–MAX249 General Description The MAX220–MAX249 family of line drivers/receivers is intended for all EIA/TIA-232E and V.28/V.24 communications interfaces, particularly applications where ±12V is not available. These parts are especially useful in battery-powered systems, since their low-power shutdown mode reduces power dissipation to less than 5µW. The MAX225, MAX233, MAX235, and MAX245/MAX246/MAX247 use no external components and are recommended for applications where printed circuit board space is critical. MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers ABSOLUTE MAXIMUM RATINGS—MAX220/222/232A/233A/242/243 20-Pin Plastic DIP (derate 8.00mW/°C above +70°C) ..440mW 16-Pin Narrow SO (derate 8.70mW/°C above +70°C) ...696mW 16-Pin Wide SO (derate 9.52mW/°C above +70°C)......762mW 18-Pin Wide SO (derate 9.52mW/°C above +70°C)......762mW 20-Pin Wide SO (derate 10.00mW/°C above +70°C)....800mW 20-Pin SSOP (derate 8.00mW/°C above +70°C) ..........640mW 16-Pin CERDIP (derate 10.00mW/°C above +70°C).....800mW 18-Pin CERDIP (derate 10.53mW/°C above +70°C).....842mW Operating Temperature Ranges MAX2_ _AC_ _, MAX2_ _C_ _ .............................0°C to +70°C MAX2_ _AE_ _, MAX2_ _E_ _ ..........................-40°C to +85°C MAX2_ _AM_ _, MAX2_ _M_ _ .......................-55°C to +125°C Storage Temperature Range .............................-65°C to +160°C Lead Temperature (soldering, 10s) .................................+300°C Supply Voltage (VCC) ...............................................-0.3V to +6V Input Voltages TIN..............................................................-0.3V to (VCC - 0.3V) RIN (Except MAX220) ........................................................±30V RIN (MAX220).....................................................................±25V TOUT (Except MAX220) (Note 1) .......................................±15V TOUT (MAX220)...............................................................±13.2V Output Voltages TOUT ...................................................................................±15V ROUT .........................................................-0.3V to (VCC + 0.3V) Driver/Receiver Output Short Circuited to GND.........Continuous Continuous Power Dissipation (TA = +70°C) 16-Pin Plastic DIP (derate 10.53mW/°C above +70°C)....842mW 18-Pin Plastic DIP (derate 11.11mW/°C above +70°C)....889mW Note 1: Input voltage measured with TOUT in high-impedance state, SHDN or VCC = 0V. Note 2: For the MAX220, V+ and V- can have a maximum magnitude of 7V, but their absolute difference cannot exceed 13V. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS—MAX220/222/232A/233A/242/243 (VCC = +5V ±10%, C1–C4 = 0.1µF‚ MAX220, C1 = 0.047µF, C2–C4 = 0.33µF, TA = TMIN to TMAX‚ unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS RS-232 TRANSMITTERS Output Voltage Swing All transmitter outputs loaded with 3kΩ to GND ±5 Input Logic Threshold Low Input Logic Threshold High Logic Pull-Up/lnput Current Output Leakage Current ±8 1.4 All devices except MAX220 MAX220: VCC = 5.0V 2 V 0.8 1.4 V 2.4 All except MAX220, normal operation 5 40 SHDN = 0V, MAX222/242, shutdown, MAX220 ±0.01 ±1 VCC = 5.5V, SHDN = 0V, VOUT = ±15V, MAX222/242 ±0.01 ±10 VCC = SHDN = 0V, VOUT = ±15V ±0.01 ±10 200 116 Data Rate V µA µA kbps Transmitter Output Resistance VCC = V+ = V- = 0V, VOUT = ±2V 300 10M Ω Output Short-Circuit Current VOUT = 0V ±7 ±22 mA RS-232 RECEIVERS RS-232 Input Voltage Operating Range ±30 RS-232 Input Threshold Low VCC = 5V RS-232 Input Threshold High VCC = 5V RS-232 Input Hysteresis All except MAX243 R2IN 0.8 MAX243 R2IN (Note 2) -3 1.8 2.4 MAX243 R2IN (Note 2) -0.5 -0.1 0.5 1 RS-232 Input Resistance 2 1 3 TTL/CMOS Output Voltage High IOUT = -1.0mA TTL/CMOS Output Short-Circuit Current 0.2 MAX243 IOUT = 3.2mA V All except MAX243 R2IN All except MAX243, VCC = 5V, no hysteresis in shdn. TTL/CMOS Output Voltage Low 1.3 V V V 5 7 kΩ 0.2 0.4 V 3.5 VCC - 0.2 Sourcing VOUT = GND -2 -10 Shrinking VOUT = VCC 10 30 _______________________________________________________________________________________ V mA +5V-Powered, Multichannel RS-232 Drivers/Receivers (VCC = +5V ±10%, C1–C4 = 0.1µF‚ MAX220, C1 = 0.047µF, C2–C4 = 0.33µF, TA = TMIN to TMAX‚ unless otherwise noted.) PARAMETER CONDITIONS TTL/CMOS Output Leakage Current SHDN = VCC or EN = VCC (SHDN = 0V for MAX222), 0V ≤ VOUT ≤ VCC EN Input Threshold Low MAX242 EN Input Threshold High MAX242 2.0 Operating Supply Voltage 3kΩ load both inputs MAX220 UNITS ±0.05 ±10 µA 1.4 0.8 V 1.4 5.5 MAX222/232A/233A/242/243 4 10 MAX220 12 MAX222/232A/233A/242/243 15 TA = +25°C 0.1 10 TA = 0°C to +70°C 2 50 TA = -40°C to +85°C 2 50 TA = -55°C to +125°C 35 100 SHDN Input Leakage Current MAX222/242 SHDN Threshold Low MAX222/242 SHDN Threshold High MAX222/242 CL = 50pF to 2500pF, MAX222/232A/233A/242/243 RL = 3kΩ to 7kΩ, VCC = 5V, TA = +25°C, measured from +3V MAX220 to -3V or -3V to +3V MAX222/232A/233A/242/243 tPHLT MAX220 tPLHT V 2 MAX222/242 Transmitter Propagation Delay TLL to RS-232 (Normal Operation), Figure 1 MAX 0.5 Shutdown Supply Current Transition Slew Rate TYP 4.5 No load VCC Supply Current (SHDN = VCC), Figures 5, 6, 11, 19 MIN 1.4 MAX222/232A/233A/242/243 mA µA ±1 µA 0.8 V 2.0 1.4 V 6 12 30 1.5 3 30 1.3 3.5 V/µs 4 10 1.5 3.5 µs 5 10 MAX222/232A/233A/242/243 0.5 1 MAX220 0.6 3 MAX222/232A/233A/242/243 0.6 1 MAX220 0.8 3 tPHLS MAX242 0.5 10 tPLHS MAX242 2.5 10 Receiver-Output Enable Time, Figure 3 tER MAX242 125 500 ns Receiver-Output Disable Time, Figure 3 tDR MAX242 160 500 ns Transmitter-Output Enable Time (SHDN Goes High), Figure 4 tET MAX222/242, 0.1µF caps (includes charge-pump start-up) 250 µs Transmitter-Output Disable Time (SHDN Goes Low), Figure 4 tDT MAX222/242, 0.1µF caps 600 ns Transmitter + to - Propagation Delay Difference (Normal Operation) tPHLT - tPLHT MAX222/232A/233A/242/243 300 MAX220 2000 Receiver + to - Propagation Delay Difference (Normal Operation) tPHLR - tPLHR MAX222/232A/233A/242/243 100 MAX220 225 Receiver Propagation Delay RS-232 to TLL (Normal Operation), Figure 2 Receiver Propagation Delay RS-232 to TLL (Shutdown), Figure 2 tPHLR tPLHR MAX220 V µs µs ns ns Note 3: MAX243 R2OUT is guaranteed to be low when R2IN is ≥ 0V or is floating. _______________________________________________________________________________________ 3 MAX220–MAX249 ELECTRICAL CHARACTERISTICS—MAX220/222/232A/233A/242/243 (continued) __________________________________________Typical Operating Characteristics MAX220/MAX222/MAX232A/MAX233A/MAX242/MAX243 VCC = ±5V NO LOAD ON TRANSMITTER OUTPUTS (EXCEPT MAX220, MAX233A) 2 0 0.1µF V- LOADED, NO LOAD ON V+ -2 1µF 0.1µF -4 ALL CAPS 1µF 9 VCC = +5.25V 8 ALL CAPS 0.1µF 7 1µF CAPS V+ V+, V- VOLTAGE (V) EITHER V+ OR V- LOADED 4 +10V MAX220-02 6 OUTPUT LOAD CURRENT FLOWS FROM V+ TO V- 10 OUTPUT CURRENT (mA) 1µF 8 11 MAX220-01 10 MAX222/MAX242 ON-TIME EXITING SHUTDOWN VCC = +4.75V +5V +5V V+ 0.1µF CAPS SHDN 0V 0V 1µF CAPS 6 -6 V+ LOADED, NO LOAD ON V- -10 0 5 10 15 LOAD CURRENT (mA) 4 0.1µF CAPS 5 -8 20 25 V- V- -10V 4 0 10 20 30 40 50 60 500µs/div DATA RATE (kbits/sec) _______________________________________________________________________________________ MAX220-03 AVAILABLE OUTPUT CURRENT vs. DATA RATE OUTPUT VOLTAGE vs. LOAD CURRENT OUTPUT VOLTAGE (V) MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers +5V-Powered, Multichannel RS-232 Drivers/Receivers 20-Pin Wide SO (derate 10 00mW/°C above +70°C).......800mW 24-Pin Wide SO (derate 11.76mW/°C above +70°C).......941mW 28-Pin Wide SO (derate 12.50mW/°C above +70°C) .............1W 44-Pin Plastic FP (derate 11.11mW/°C above +70°C) .....889mW 14-Pin CERDIP (derate 9.09mW/°C above +70°C) ..........727mW 16-Pin CERDIP (derate 10.00mW/°C above +70°C) ........800mW 20-Pin CERDIP (derate 11.11mW/°C above +70°C) ........889mW 24-Pin Narrow CERDIP (derate 12.50mW/°C above +70°C) ..............1W 24-Pin Sidebraze (derate 20.0mW/°C above +70°C)..........1.6W 28-Pin SSOP (derate 9.52mW/°C above +70°C).............762mW Operating Temperature Ranges MAX2 _ _ C _ _......................................................0°C to +70°C MAX2 _ _ E _ _ ...................................................-40°C to +85°C MAX2 _ _ M _ _ ...............................................-55°C to +125°C Storage Temperature Range .............................-65°C to +160°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS—MAX223/MAX230–MAX241 (MAX223/230/232/234/236/237/238/240/241, VCC = +5V ±10; MAX233/MAX235, VCC = 5V ±5%‚ C1–C4 = 1.0µF; MAX231/MAX239, VCC = 5V ±10%; V+ = 7.5V to 13.2V; TA = TMIN to TMAX; unless otherwise noted.) PARAMETER Output Voltage Swing CONDITIONS All transmitter outputs loaded with 3kΩ to ground MIN TYP ±5.0 ±7.3 MAX232/233 VCC Power-Supply Current No load, TA = +25°C V+ Power-Supply Current MAX223/230/234–238/240/241 10 7 15 0.4 1 MAX231 1.8 5 MAX239 5 15 MAX223 15 50 MAX230/235/236/240/241 1 10 TA = +25°C Input Logic Threshold Low TIN; EN, SHDN (MAX233); EN, SHDN (MAX230/235–241) 0.8 TIN 2.0 Input Logic Threshold High EN, SHDN (MAX223); EN, SHDN (MAX230/235/236/240/241) 2.4 Logic Pull-Up Current TIN = 0V mA mA µA V V 1.5 -30 UNITS V 5 MAX231/239 Shutdown Supply Current Receiver Input Voltage Operating Range MAX 200 µA 30 V _______________________________________________________________________________________ 5 MAX220–MAX249 ABSOLUTE MAXIMUM RATINGS—MAX223/MAX230–MAX241 VCC ...........................................................................-0.3V to +6V V+ ................................................................(VCC - 0.3V) to +14V V- ............................................................................+0.3V to -14V Input Voltages TIN ............................................................-0.3V to (VCC + 0.3V) RIN......................................................................................±30V Output Voltages TOUT ...................................................(V+ + 0.3V) to (V- - 0.3V) ROUT .........................................................-0.3V to (VCC + 0.3V) Short-Circuit Duration, TOUT ......................................Continuous Continuous Power Dissipation (TA = +70°C) 14-Pin Plastic DIP (derate 10.00mW/°C above +70°C)....800mW 16-Pin Plastic DIP (derate 10.53mW/°C above +70°C)....842mW 20-Pin Plastic DIP (derate 11.11mW/°C above +70°C)....889mW 24-Pin Narrow Plastic DIP (derate 13.33mW/°C above +70°C) ..........1.07W 24-Pin Plastic DIP (derate 9.09mW/°C above +70°C)......500mW 16-Pin Wide SO (derate 9.52mW/°C above +70°C).........762mW MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers ELECTRICAL CHARACTERISTICS—MAX223/MAX230–MAX241 (continued) (MAX223/230/232/234/236/237/238/240/241, VCC = +5V ±10; MAX233/MAX235, VCC = 5V ±5%‚ C1–C4 = 1.0µF; MAX231/MAX239, VCC = 5V ±10%; V+ = 7.5V to 13.2V; TA = TMIN to TMAX; unless otherwise noted.) PARAMETER RS-232 Input Threshold Low RS-232 Input Threshold High CONDITIONS TA = +25°C, VCC = 5V TA = +25°C, VCC = 5V Normal operation SHDN = 5V (MAX223) SHDN = 0V (MAX235/236/240/241) MIN TYP 0.8 1.2 0.6 Normal operation SHDN = 5V (MAX223) SHDN = 0V (MAX235/236/240/241) 1.5 1.7 1.5 2.4 0.2 0.5 1.0 V 3 5 7 kΩ 0.4 V 3.5 VCC - 0.4 RS-232 Input Resistance TA = +25°C, VCC = 5V TTL/CMOS Output Voltage Low IOUT = 1.6mA (MAX231/232/233, IOUT = 3.2mA) TTL/CMOS Output Voltage High IOUT = -1mA TTL/CMOS Output Leakage Current 0V ≤ ROUT ≤ VCC; EN = 0V (MAX223); EN = VCC (MAX235–241 ) Receiver Output Enable Time Normal operation MAX223 600 MAX235/236/239/240/241 400 Receiver Output Disable Time Normal operation MAX223 900 MAX235/236/239/240/241 250 Propagation Delay Normal operation RS-232 IN to TTL/CMOS OUT, SHDN = 0V CL = 150pF (MAX223) Transmitter Output Short-Circuit Current 6 2.4 V Shutdown (MAX223) SHDN = 0V, EN = 5V (R4IN‚ R5IN) VCC = 5V, no hysteresis in shutdown Transmitter Output Resistance UNITS V Shutdown (MAX223) SHDN = 0V, EN = 5V (R4IN, R5IN) RS-232 Input Hysteresis Transition Region Slew Rate MAX 0.05 ±10 ns 0.5 10 4 40 tPLHS 6 40 5.1 30 3 µA ns tPHLS MAX223/MAX230/MAX234–241, TA = +25°C, VCC = 5V, RL = 3kΩ to 7kΩ‚ CL = 50pF to 2500pF, measured from +3V to -3V or -3V to +3V µs V/µs MAX231/MAX232/MAX233, TA = +25°C, VCC = 5V, RL = 3kΩ to 7kΩ, CL = 50pF to 2500pF, measured from +3V to -3V or -3V to +3V VCC = V+ = V- = 0V, VOUT = ±2V V 4 30 Ω 300 ±10 _______________________________________________________________________________________ mA mA +5V-Powered, Multichannel RS-232 Drivers/Receivers TRANSMITTER OUTPUT VOLTAGE (VOH) vs. LOAD CAPACITANCE AT DIFFERENT DATA RATES 2 TRANSMITTERS LOADED 7.2 7.0 6.5 4.5 6.6 TA = +25°C VCC = +5V 3 TRANSMITTERS LOADED RL = 3kΩ C1–C4 = 1µF 6.4 6.2 6.0 0 500 1000 1500 8.0 7.0 3 TRANSMITTERS LOADED 4 TRANSMITTERS LOADED 6.0 5.0 4.0 0 2500 2000 500 1000 1500 2000 2500 LOAD CAPACITANCE (pF) TRANSMITTER OUTPUT VOLTAGE (VOL) vs. VCC TRANSMITTER OUTPUT VOLTAGE (VOL) vs. LOAD CAPACITANCE AT DIFFERENT DATA RATES TRANSMITTER OUTPUT VOLTAGE (V+, V-) vs. LOAD CURRENT TA = +25°C VCC = +5V 3 TRANSMITTERS LOADED RL = 3kΩ C1–C4 = 1µF -6.2 -6.4 VOL (V) -6.6 -7.5 1 TRANSMITTER LOADED 2 TRANSMITTERS LOADED 10 8 6 -7.0 TA = +25°C VCC = +5V C1–C4 = 1µF V- LOADED, V+ AND VNO LOAD EQUALLY ON V+ LOADED 4 160kbits/sec 80kbits/sec 20Kkbits/sec -6.8 MAX220-09 -6.0 MAX220-08 TA = +25°C C1–C4 = 1µF TRANSMITTER LOADS = 3kΩ || 2500pF 2 V+, V- (V) -7.0 0 -2 V+ LOADED, NO LOAD ON V- -4 -7.2 3 TRANSMITTERS LOADED -6 -7.4 -8 5.0 VCC (V) 5.5 ALL TRANSMITTERS UNLOADED -10 -7.6 -9.0 4.5 2 TRANSMITTERS LOADED 9.0 LOAD CAPACITANCE (pF) 4 TRANSMITTERS LOADED -8.5 SLEW RATE (V/µs) 160kbits/sec 80kbits/sec 20kbits/sec VCC (V) -6.5 -8.0 TA = +25°C VCC = +5V LOADED, RL = 3kΩ C1–C4 = 1µF 10.0 6.8 5.5 5.0 -6.0 VOL (V) VOH (V) 3 TRANSMITTERS LOADED TA = +25°C C1–C4 = 1µF TRANSMITTER 4 TRANSMITTERS LOADS = 3kΩ || 2500pF LOADED 7.5 1 TRANSMITTER LOADED 11.0 7.0 1 TRANSMITTER LOADED MAX220-07 VOH (V) 8.0 12.0 MAX220-05 7.4 MAX220-04 8.5 TRANSMITTER SLEW RATE vs. LOAD CAPACITANCE MAX220-06 TRANSMITTER OUTPUT VOLTAGE (VOH) vs. VCC 0 500 1000 1500 0 2500 2000 5 10 15 20 25 30 35 40 45 50 CURRENT (mA) LOAD CAPACITANCE (pF) V+, V- WHEN EXITING SHUTDOWN (1µF CAPACITORS) MAX220-13 V+ O V- SHDN* 500ms/div *SHUTDOWN POLARITY IS REVERSED FOR NON MAX241 PARTS _______________________________________________________________________________________ 7 MAX220–MAX249 __________________________________________Typical Operating Characteristics MAX223/MAX230–MAX241 MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers ABSOLUTE MAXIMUM RATINGS—MAX225/MAX244–MAX249 Supply Voltage (VCC) ...............................................-0.3V to +6V Input Voltages TIN‚ ENA, ENB, ENR, ENT, ENRA, ENRB, ENTA, ENTB..................................-0.3V to (VCC + 0.3V) RIN .....................................................................................±25V TOUT (Note 3).....................................................................±15V ROUT ........................................................-0.3V to (VCC + 0.3V) Short Circuit (one output at a time) TOUT to GND ............................................................Continuous ROUT to GND............................................................Continuous Continuous Power Dissipation (TA = +70°C) 28-Pin Wide SO (derate 12.50mW/°C above +70°C) .............1W 40-Pin Plastic DIP (derate 11.11mW/°C above +70°C) ...611mW 44-Pin PLCC (derate 13.33mW/°C above +70°C) ...........1.07W Operating Temperature Ranges MAX225C_ _, MAX24_C_ _ ..................................0°C to +70°C MAX225E_ _, MAX24_E_ _ ...............................-40°C to +85°C Storage Temperature Range .............................-65°C to +160°C Lead Temperature (soldering,10s) ..................................+300°C Note 4: Input voltage measured with transmitter output in a high-impedance state, shutdown, or VCC = 0V. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS—MAX225/MAX244–MAX249 (MAX225, VCC = 5.0V ±5%; MAX244–MAX249, VCC = +5.0V ±10%, external capacitors C1–C4 = 1µF; TA = TMIN to TMAX; unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS 1.4 0.8 V 2 1.4 RS-232 TRANSMITTERS Input Logic Threshold Low Input Logic Threshold High Normal operation Logic Pull-Up/lnput Current Tables 1a–1d Data Rate Tables 1a–1d, normal operation Output Voltage Swing All transmitter outputs loaded with 3kΩ to GND Output Leakage Current (Shutdown) Tables 1a–1d Shutdown ±5 V 10 50 ±0.01 ±1 120 64 ±7.5 µA kbps V ENA, ENB, ENT, ENTA, ENTB = VCC, VOUT = ±15V ±0.01 ±25 VCC = 0V, VOUT = ±15V ±0.01 ±25 µA Transmitter Output Resistance VCC = V+ = V- = 0V, VOUT = ±2V (Note 4) 300 10M Ω Output Short-Circuit Current VOUT = 0V ±7 ±30 mA RS-232 RECEIVERS RS-232 Input Voltage Operating Range ±25 RS-232 Input Threshold Low VCC = 5V RS-232 Input Threshold High VCC = 5V RS-232 Input Hysteresis VCC = 5V RS-232 Input Resistance 1.3 2.4 0.2 0.5 1.0 V 3 5 7 kΩ 0.2 0.4 V IOUT = 3.2mA TTL/CMOS Output Voltage High IOUT = -1.0mA 3.5 VCC - 0.2 Sourcing VOUT = GND -2 -10 Shrinking VOUT = VCC 10 30 TTL/CMOS Output Leakage Current Normal operation, outputs disabled, Tables 1a–1d, 0V ≤ VOUT ≤ VCC, ENR_ = VCC V 1.8 TTL/CMOS Output Voltage Low TTL/CMOS Output Short-Circuit Current 8 0.8 V ±0.05 _______________________________________________________________________________________ V V mA ±0.10 µA +5V-Powered, Multichannel RS-232 Drivers/Receivers (MAX225, VCC = 5.0V ±5%; MAX244–MAX249, VCC = +5.0V ±10%, external capacitors C1–C4 = 1µF; TA = TMIN to TMAX; unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS POWER SUPPLY AND CONTROL LOGIC Operating Supply Voltage No load VCC Supply Current (Normal Operation) Shutdown Supply Current 3kΩ loads on all outputs MAX225 4.75 5.25 MAX244–MAX249 4.5 5.5 MAX225 10 20 MAX244–MAX249 11 30 MAX225 40 MAX244–MAX249 57 TA = +25°C 8 TA = TMIN to TMAX 50 Leakage current Control Input 25 ±1 Threshold low 1.4 Threshold high 0.8 2.4 1.4 5 10 30 V mA µA µA V AC CHARACTERISTICS Transition Slew Rate CL = 50pF to 2500pF, RL = 3kΩ to 7kΩ, VCC = 5V, TA = +25°C, measured from +3V to -3V or -3V to +3V V/µs Transmitter Propagation Delay TLL to RS-232 (Normal Operation), Figure 1 tPHLT 1.3 3.5 tPLHT 1.5 3.5 Receiver Propagation Delay TLL to RS-232 (Normal Operation), Figure 2 tPHLR 0.6 1.5 tPLHR 0.6 1.5 Receiver Propagation Delay TLL to RS-232 (Low-Power Mode), Figure 2 tPHLS 0.6 10 tPLHS 3.0 10 Transmitter + to - Propagation Delay Difference (Normal Operation) tPHLT - tPLHT 350 ns Receiver + to - Propagation Delay Difference (Normal Operation) tPHLR - tPLHR 350 ns µs µs µs Receiver-Output Enable Time, Figure 3 tER 100 500 ns Receiver-Output Disable Time, Figure 3 tDR 100 500 ns Transmitter Enable Time Transmitter Disable Time, Figure 4 tET tDT MAX246–MAX249 (excludes charge-pump startup) 5 µs MAX225/MAX245–MAX249 (includes charge-pump startup) 10 ms 100 ns Note 5: The 300Ω minimum specification complies with EIA/TIA-232E, but the actual resistance when in shutdown mode or VCC = 0V is 10MΩ as is implied by the leakage specification. _______________________________________________________________________________________ 9 MAX220–MAX249 ELECTRICAL CHARACTERISTICS—MAX225/MAX244–MAX249 (continued) __________________________________________Typical Operating Characteristics MAX225/MAX244–MAX249 8 V+ AND V- LOADED EXTERNAL POWER SUPPLY 1µF CAPACITORS 12 10 40kb/s DATA RATE 8 TRANSMITTERS LOADED WITH 3kΩ 8 6 4 VCC = 5V EXTERNAL CHARGE PUMP 1µF CAPACITORS 8 TRANSMITTERS DRIVING 5kΩ AND 2000pF AT 20kbits/sec 2 0 -2 EITHER V+ OR V- LOADED 2 3 LOAD CAPACITANCE (nF) 4 5 40kb/sec 7.0 60kb/sec 6.0 V+ AND V- LOADED 100kb/sec 200kb/sec 5.5 -8 1 20kb/sec 7.5 V- LOADED V+ LOADED -10 0 8.0 6.5 -4 -6 2 VCC = 5V WITH ALL TRANSMITTERS DRIVEN LOADED WITH 5kΩ 10kb/sec 8.5 V+, V (V) OUTPUT VOLTAGE (V) 6 14 9.0 MAX220-11 VCC = 5V 4 10 10 MAX220-10 18 16 TRANSMITTER OUTPUT VOLTAGE (V+, V-) vs. LOAD CAPACITANCE AT DIFFERENT DATA RATES OUTPUT VOLTAGE vs. LOAD CURRENT FOR V+ AND V- MAX220-12 TRANSMITTER SLEW RATE vs. LOAD CAPACITANCE TRANSMITTER SLEW RATE (V/µs) MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers ALL CAPACITIORS 1µF 5.0 0 5 10 15 20 25 LOAD CURRENT (mA) 30 35 0 1 2 3 LOAD CAPACITANCE (nF) ______________________________________________________________________________________ 4 5 +5V-Powered, Multichannel RS-232 Drivers/Receivers MAX220–MAX249 +3V 0V* +3V 50% 50% 50% 50% INPUT INPUT 0V VCC OUTPUT V+ 0V V- OUTPUT GND tPLHR tPLHS tPHLR tPHLS tPHLT tPLHT *EXCEPT FOR R2 ON THE MAX243 WHERE -3V IS USED. Figure 1. Transmitter Propagation-Delay Timing Figure 2. Receiver Propagation-Delay Timing EN RX OUT RX IN 1kΩ RX VCC - 2V SHDN +3V a) TEST CIRCUIT 0V 150pF EN INPUT OUTPUT DISABLE TIME (tDT) +3V 0V V+ +5V EN OUTPUT ENABLE TIME (tER) 0V -5V +3.5V V- RECEIVER OUTPUTS +0.8V a) TIMING DIAGRAM b) ENABLE TIMING +3V EN INPUT EN 0V 1 OR 0 TX OUTPUT DISABLE TIME (tDR) VOH RECEIVER OUTPUTS VOL 3kΩ 50pF VOH - 0.5V VCC - 2V VOL + 0.5V b) TEST CIRCUIT c) DISABLE TIMING Figure 3. Receiver-Output Enable and Disable Timing Figure 4. Transmitter-Output Disable Timing ______________________________________________________________________________________ 11 MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers Table 1a. MAX245 Control Pin Configurations ENT ENR 0 0 Normal Operation 0 1 1 0 1 1 OPERATION STATUS TRANSMITTERS RECEIVERS All Active All Active Normal Operation All Active All 3-State Shutdown All 3-State All Low-Power Receive Mode Shutdown All 3-State All 3-State Table 1b. MAX245 Control Pin Configurations TRANSMITTERS RECEIVERS OPERATION STATUS TA1–TA4 TB1–TB4 0 Normal Operation All Active All Active All Active All Active 0 1 Normal Operation All Active All Active RA1–RA4 3-State, RA5 Active RB1–RB4 3-State, RB5 Active 1 0 Shutdown All 3-State All 3-State All Low-Power Receive Mode All Low-Power Receive Mode 1 1 Shutdown All 3-State All 3-State RA1–RA4 3-State, RA5 Low-Power Receive Mode RB1–RB4 3-State, RB5 Low-Power Receive Mode ENT ENR 0 RA1–RA5 RB1–RB5 Table 1c. MAX246 Control Pin Configurations 12 ENA ENB 0 0 0 OPERATION STATUS TRANSMITTERS RECEIVERS TA1–TA4 TB1–TB4 RA1–RA5 Normal Operation All Active All Active All Active All Active 1 Normal Operation All Active All 3-State All Active RB1–RB4 3-State, RB5 Active 1 0 Shutdown All 3-State All Active RA1–RA4 3-State, RA5 Active All Active 1 1 Shutdown All 3-State All 3-State RA1–RA4 3-State, RA5 Low-Power Receive Mode RB1–RB4 3-State, RA5 Low-Power Receive Mode ______________________________________________________________________________________ RB1–RB5 +5V-Powered, Multichannel RS-232 Drivers/Receivers TRANSMITTERS ENTA ENTB ENRA ENRB OPERATION STATUS RECEIVERS MAX247 TA1–TA4 TB1–TB4 RA1–RA4 RB1–RB5 MAX248 TA1–TA4 TB1–TB4 RA1–RA4 RB1–RB4 TA1–TA3 TB1–TB3 0 0 0 0 Normal Operation MAX249 All Active All Active All Active RA1–RA5 All Active RB1–RB5 0 0 0 1 Normal Operation All Active All Active All Active All 3-State, except RB5 stays active on MAX247 0 0 1 0 Normal Operation All Active All Active All 3-State All Active 0 0 1 1 Normal Operation All Active All Active All 3-State All 3-State, except RB5 stays active on MAX247 0 1 0 0 Normal Operation All Active All 3-State All Active All Active 0 1 0 1 Normal Operation All Active All 3-State All Active All 3-State, except RB5 stays active on MAX247 0 1 1 0 Normal Operation All Active All 3-State All 3-State All Active 0 1 1 1 Normal Operation All Active All 3-State All 3-State All 3-State, except RB5 stays active on MAX247 1 0 0 0 Normal Operation All 3-State All Active All Active All Active 1 0 0 1 Normal Operation All 3-State All Active All Active All 3-State, except RB5 stays active on MAX247 1 0 1 0 Normal Operation All 3-State All Active All 3-State All Active 1 0 1 1 Normal Operation All 3-State All Active All 3-State All 3-State, except RB5 stays active on MAX247 1 1 0 0 Shutdown All 3-State All 3-State Low-Power Receive Mode Low-Power Receive Mode 1 1 0 1 Shutdown All 3-State All 3-State Low-Power Receive Mode All 3-State, except RB5 stays active on MAX247 1 1 1 0 Shutdown All 3-State All 3-State All 3-State Low-Power Receive Mode 1 1 1 1 Shutdown All 3-State All 3-State All 3-State All 3-State, except RB5 stays active on MAX247 ______________________________________________________________________________________ 13 MAX220–MAX249 Table 1d. MAX247/MAX248/MAX249 Control Pin Configurations MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers _______________Detailed Description The MAX220–MAX249 contain four sections: dual charge-pump DC-DC voltage converters, RS-232 drivers, RS-232 receivers, and receiver and transmitter enable control inputs. Dual Charge-Pump Voltage Converter The MAX220–MAX249 have two internal charge-pumps that convert +5V to ±10V (unloaded) for RS-232 driver operation. The first converter uses capacitor C1 to double the +5V input to +10V on C3 at the V+ output. The second converter uses capacitor C2 to invert +10V to -10V on C4 at the V- output. A small amount of power may be drawn from the +10V (V+) and -10V (V-) outputs to power external circuitry (see the Typical Operating Characteristics section), except on the MAX225 and MAX245–MAX247, where these pins are not available. V+ and V- are not regulated, so the output voltage drops with increasing load current. Do not load V+ and V- to a point that violates the minimum ±5V EIA/TIA-232E driver output voltage when sourcing current from V+ and V- to external circuitry. When using the shutdown feature in the MAX222, MAX225, MAX230, MAX235, MAX236, MAX240, MAX241, and MAX245–MAX249, avoid using V+ and Vto power external circuitry. When these parts are shut down, V- falls to 0V, and V+ falls to +5V. For applications where a +10V external supply is applied to the V+ pin (instead of using the internal charge pump to generate +10V), the C1 capacitor must not be installed and the SHDN pin must be tied to VCC. This is because V+ is internally connected to VCC in shutdown mode. RS-232 Drivers The typical driver output voltage swing is ±8V when loaded with a nominal 5kΩ RS-232 receiver and VCC = +5V. Output swing is guaranteed to meet the EIA/TIA232E and V.28 specification, which calls for ±5V minimum driver output levels under worst-case conditions. These include a minimum 3kΩ load, VCC = +4.5V, and maximum operating temperature. Unloaded driver output voltage ranges from (V+ -1.3V) to (V- +0.5V). Input thresholds are both TTL and CMOS compatible. The inputs of unused drivers can be left unconnected since 400kΩ input pull-up resistors to VCC are built in (except for the MAX220). The pull-up resistors force the outputs of unused drivers low because all drivers invert. The internal input pull-up resistors typically source 12µA, except in shutdown mode where the pull-ups are disabled. Driver outputs turn off and enter a high-impedance state—where leakage current is typically microamperes (maximum 25µA)—when in shutdown 14 mode, in three-state mode, or when device power is removed. Outputs can be driven to ±15V. The powersupply current typically drops to 8µA in shutdown mode. The MAX220 does not have pull-up resistors to force the outputs of the unused drivers low. Connect unused inputs to GND or VCC. The MAX239 has a receiver three-state control line, and the MAX223, MAX225, MAX235, MAX236, MAX240, and MAX241 have both a receiver three-state control line and a low-power shutdown control. Table 2 shows the effects of the shutdown control and receiver threestate control on the receiver outputs. The receiver TTL/CMOS outputs are in a high-impedance, three-state mode whenever the three-state enable line is high (for the MAX225/MAX235/MAX236/MAX239– MAX241), and are also high-impedance whenever the shutdown control line is high. When in low-power shutdown mode, the driver outputs are turned off and their leakage current is less than 1µA with the driver output pulled to ground. The driver output leakage remains less than 1µA, even if the transmitter output is backdriven between 0V and (VCC + 6V). Below -0.5V, the transmitter is diode clamped to ground with 1kΩ series impedance. The transmitter is also zener clamped to approximately V CC + 6V, with a series impedance of 1kΩ. The driver output slew rate is limited to less than 30V/µs as required by the EIA/TIA-232E and V.28 specifications. Typical slew rates are 24V/µs unloaded and 10V/µs loaded with 3Ω and 2500pF. RS-232 Receivers EIA/TIA-232E and V.28 specifications define a voltage level greater than 3V as a logic 0, so all receivers invert. Input thresholds are set at 0.8V and 2.4V, so receivers respond to TTL level inputs as well as EIA/TIA-232E and V.28 levels. The receiver inputs withstand an input overvoltage up to ±25V and provide input terminating resistors with Table 2. Three-State Control of Receivers PART SHDN SHDN EN(R) RECEIVERS X Low High EN __ High Impedance Active High Impedance MAX223 __ Low High High MAX225 __ __ __ Low High High Impedance Active MAX235 MAX236 MAX240 Low Low High __ __ Low High X High Impedance Active High Impedance ______________________________________________________________________________________ +5V-Powered, Multichannel RS-232 Drivers/Receivers The receiver input hysteresis is typically 0.5V with a guaranteed minimum of 0.2V. This produces clear output transitions with slow-moving input signals, even with moderate amounts of noise and ringing. The receiver propagation delay is typically 600ns and is independent of input swing direction. Low-Power Receive Mode The low-power receive-mode feature of the MAX223, MAX242, and MAX245–MAX249 puts the IC into shutdown mode but still allows it to receive information. This is important for applications where systems are periodically awakened to look for activity. Using low-power receive mode, the system can still receive a signal that will activate it on command and prepare it for communication at faster data rates. This operation conserves system power. Negative Threshold—MAX243 The MAX243 is pin compatible with the MAX232A, differing only in that RS-232 cable fault protection is removed on one of the two receiver inputs. This means that control lines such as CTS and RTS can either be driven or left floating without interrupting communication. Different cables are not needed to interface with different pieces of equipment. The input threshold of the receiver without cable fault protection is -0.8V rather than +1.4V. Its output goes positive only if the input is connected to a control line that is actively driven negative. If not driven, it defaults to the 0 or “OK to send” state. Normally‚ the MAX243’s other receiver (+1.4V threshold) is used for the data line (TD or RD)‚ while the negative threshold receiver is connected to the control line (DTR‚ DTS‚ CTS‚ RTS, etc.). Other members of the RS-232 family implement the optional cable fault protection as specified by EIA/TIA232E specifications. This means a receiver output goes high whenever its input is driven negative‚ left floating‚ or shorted to ground. The high output tells the serial communications IC to stop sending data. To avoid this‚ the control lines must either be driven or connected with jumpers to an appropriate positive voltage level. Shutdown—MAX222–MAX242 On the MAX222‚ MAX235‚ MAX236‚ MAX240‚ and MAX241‚ all receivers are disabled during shutdown. On the MAX223 and MAX242‚ two receivers continue to operate in a reduced power mode when the chip is in shutdown. Under these conditions‚ the propagation delay increases to about 2.5µs for a high-to-low input transition. When in shutdown, the receiver acts as a CMOS inverter with no hysteresis. The MAX223 and MAX242 also have a receiver output enable input (EN for the MAX242 and EN for the MAX223) that allows receiver output control independent of SHDN (SHDN for MAX241). With all other devices‚ SHDN (SHDN for MAX241) also disables the receiver outputs. The MAX225 provides five transmitters and five receivers‚ while the MAX245 provides ten receivers and eight transmitters. Both devices have separate receiver and transmitter-enable controls. The charge pumps turn off and the devices shut down when a logic high is applied to the ENT input. In this state, the supply current drops to less than 25µA and the receivers continue to operate in a low-power receive mode. Driver outputs enter a high-impedance state (three-state mode). On the MAX225‚ all five receivers are controlled by the ENR input. On the MAX245‚ eight of the receiver outputs are controlled by the ENR input‚ while the remaining two receivers (RA5 and RB5) are always active. RA1–RA4 and RB1–RB4 are put in a three-state mode when ENR is a logic high. Receiver and Transmitter Enable Control Inputs The MAX225 and MAX245–MAX249 feature transmitter and receiver enable controls. The receivers have three modes of operation: full-speed receive (normal active)‚ three-state (disabled)‚ and lowpower receive (enabled receivers continue to function at lower data rates). The receiver enable inputs control the full-speed receive and three-state modes. The transmitters have two modes of operation: full-speed transmit (normal active) and three-state (disabled). The transmitter enable inputs also control the shutdown mode. The device enters shutdown mode when all transmitters are disabled. Enabled receivers function in the low-power receive mode when in shutdown. ______________________________________________________________________________________ 15 MAX220–MAX249 nominal 5kΩ values. The receivers implement Type 1 interpretation of the fault conditions of V.28 and EIA/TIA-232E. MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers Tables 1a–1d define the control states. The MAX244 has no control pins and is not included in these tables. The MAX246 has ten receivers and eight drivers with two control pins, each controlling one side of the device. A logic high at the A-side control input (ENA) causes the four A-side receivers and drivers to go into a three-state mode. Similarly, the B-side control input (ENB) causes the four B-side drivers and receivers to go into a three-state mode. As in the MAX245, one Aside and one B-side receiver (RA5 and RB5) remain active at all times. The entire device is put into shutdown mode when both the A and B sides are disabled (ENA = ENB = +5V). The MAX247 provides nine receivers and eight drivers with four control pins. The ENRA and ENRB receiver enable inputs each control four receiver outputs. The ENTA and ENTB transmitter enable inputs each control four drivers. The ninth receiver (RB5) is always active. The device enters shutdown mode with a logic high on both ENTA and ENTB. The MAX248 provides eight receivers and eight drivers with four control pins. The ENRA and ENRB receiver enable inputs each control four receiver outputs. The ENTA and ENTB transmitter enable inputs control four drivers each. This part does not have an always-active receiver. The device enters shutdown mode and transmitters go into a three-state mode with a logic high on both ENTA and ENTB. 16 The MAX249 provides ten receivers and six drivers with four control pins. The ENRA and ENRB receiver enable inputs each control five receiver outputs. The ENTA and ENTB transmitter enable inputs control three drivers each. There is no always-active receiver. The device enters shutdown mode and transmitters go into a three-state mode with a logic high on both ENTA and ENTB. In shutdown mode, active receivers operate in a low-power receive mode at data rates up to 20kbits/sec. __________Applications Information Figures 5 through 25 show pin configurations and typical operating circuits. In applications that are sensitive to power-supply noise, VCC should be decoupled to ground with a capacitor of the same value as C1 and C2 connected as close as possible to the device. ______________________________________________________________________________________ +5V-Powered, Multichannel RS-232 Drivers/Receivers MAX220–MAX249 +5V INPUT C3 TOP VIEW C5 C1+ 1 16 VCC V+ 2 15 GND C1- 3 14 T1OUT MAX220 MAX232 MAX232A C2+ 4 C2- 5 1 C1 C2 13 R1IN 11 T1IN T2OUT 7 TTL/CMOS INPUTS 10 T2IN 9 R2IN 8 R2OUT DIP/SO DEVICE MAX220 MAX232 MAX232A -10V C4 T1OUT 14 RS-232 OUTPUTS 400kΩ 10 T2IN T2OUT 7 R1IN 13 TTL/CMOS OUTPUTS C5 4.7 1.0 0.1 6 V- +5V 12 R1OUT CAPACITANCE (µF) C1 C2 C3 C4 4.7 4.7 10 10 1.0 1.0 1.0 1.0 0.1 0.1 0.1 0.1 V+ 2 +10V 3 C14 C2+ +10V TO -10V 5 C2- VOLTAGE INVERTER +5V 400kΩ 11 T1IN 12 R1OUT V- 6 16 VCC +5V TO +10V VOLTAGE DOUBLER C1+ RS-232 INPUTS 5kΩ R2IN 8 9 R2OUT 5kΩ GND 15 Figure 5. MAX220/MAX232/MAX232A Pin Configuration and Typical Operating Circuit +5V INPUT C3 ALL CAPACITORS = 0.1µF TOP VIEW C5 17 VCC 3 +10V C1+ +5V TO +10V V+ 4 C1- VOLTAGE DOUBLER 5 C2+ 7 -10V +10V TO -10V V6 C2C4 VOLTAGE INVERTER 2 (N.C.) EN 1 (N.C.) EN 1 C1+ 2 19 VCC C1+ 2 17 VCC V+ 3 18 GND V+ 3 16 GND C1- 4 17 T1OUT C1- 4 15 T1OUT C2+ 5 14 R1IN C2- 6 C2+ 5 C2- 6 18 SHDN MAX222 MAX242 13 R1OUT V- 7 12 T1IN T2OUT 8 11 T2IN R2IN 9 10 R2OUT DIP/SO MAX222 MAX242 C2 +5V 400kΩ 12 T1IN 16 N.C. 15 R1IN V- 7 T2OUT C1 20 SHDN 14 R1OUT 8 13 N.C. R2IN 9 12 T1IN R2OUT 10 11 T2IN TTL/CMOS INPUTS (EXCEPT MAX220) T1OUT 15 +5V 400kΩ 11 T2IN T2OUT 8 13 R1OUT R1IN 14 TTL/CMOS OUTPUTS SSOP RS-232 INPUTS 5kΩ R2IN 9 10 R2OUT 1 (N.C.) EN ( ) ARE FOR MAX222 ONLY. PIN NUMBERS IN TYPICAL OPERATING CIRCUIT ARE FOR DIP/SO PACKAGES ONLY. RS-232 OUTPUTS (EXCEPT MAX220) 5kΩ SHDN GND 18 16 Figure 6. MAX222/MAX242 Pin Configurations and Typical Operating Circuit ______________________________________________________________________________________ 17 MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers +5V TOP VIEW 0.1 +5V 28 VCC 27 VCC 400kΩ T1IN 3 ENR 1 28 VCC ENR 2 27 VCC T1IN 3 26 ENT T2IN 4 25 T3IN R1OUT 5 MAX225 24 T4IN R2OUT 6 23 T5IN R3OUT 7 22 R4OUT R3IN 8 21 R5OUT R2IN 9 20 R5IN R1IN 10 19 R4IN T1OUT 11 18 T3OUT T2OUT 12 17 T4OUT GND 13 16 T5OUT GND 14 15 T5OUT SO T1OUT +5V 11 400kΩ T2IN 4 T2OUT +5V 12 400kΩ T3IN 25 T3OUT +5V 18 400kΩ T4IN 24 T4OUT +5V 17 400kΩ T5OUT T5IN 23 ENT 26 T5OUT R1OUT 5 R1IN 16 15 10 5kΩ R2OUT 6 R2IN 9 5kΩ R3OUT 7 MAX225 FUNCTIONAL DESCRIPTION 5 RECEIVERS 5 TRANSMITTERS 2 CONTROL PINS 1 RECEIVER ENABLE (ENR) 1 TRANSMITTER ENABLE (ENT) R3IN 5kΩ R4OUT 22 R4IN R5OUT R5IN 5kΩ 1 2 ENR ENR GND 13 GND 14 Figure 7. MAX225 Pin Configuration and Typical Operating Circuit 18 19 5kΩ 21 PINS (ENR, GND, VCC, T5OUT) ARE INTERNALLY CONNECTED. CONNECT EITHER OR BOTH EXTERNALLY. T5OUT IS A SINGLE DRIVER. 8 ______________________________________________________________________________________ 20 +5V-Powered, Multichannel RS-232 Drivers/Receivers MAX220–MAX249 +5V INPUT TOP VIEW 1.0µF 12 11 VCC +5V TO +10V VOLTAGE DOUBLER C1+ 1.0µF 14 C115 C2+ 1.0µF 16 C2- 1.0µF V+ +10V TO -10V VOLTAGE INVERTER V- 13 17 1.0µF +5V 400kΩ 7 T1IN T3OUT 1 28 T4OUT T1OUT 2 27 R3IN T2OUT 3 25 SHDN (SHDN) R2OUT 5 T2IN 6 24 EN (EN) MAX223 MAX241 T1IN 7 400kΩ 6 T2IN GND 10 19 R5OUT* VCC 11 18 R5IN* C1+ 12 17 V- V+ 13 16 C2- C1- 14 15 C2+ Wide SO/ SSOP RS-232 OUTPUTS T3 T3OUT 1 +5V 400kΩ 21 T4IN 20 T3IN T2OUT 3 400kΩ 20 T3IN 23 R4IN* R1IN 9 T2 +5V TTL/CMOS INPUTS 22 R4OUT* R1OUT 8 T1OUT 2 +5V 26 R3OUT R2IN 4 T1 21 T4IN 8 R1OUT T4 T4OUT 28 R1 R1IN 9 5kΩ 5 R2OUT R2 R2IN 4 5kΩ LOGIC OUTPUTS 26 R3OUT R3 R3IN 27 5kΩ 22 R4OUT R4 R4IN RS-232 INPUTS 23 5kΩ 19 R5OUT R5 *R4 AND R5 IN MAX223 REMAIN ACTIVE IN SHUTDOWN NOTE: PIN LABELS IN ( ) ARE FOR MAX241 24 EN (EN) GND R5IN 18 5kΩ SHDN 25 (SHDN) 10 Figure 8. MAX223/MAX241 Pin Configuration and Typical Operating Circuit ______________________________________________________________________________________ 19 MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers +5V INPUT 1.0µF TOP VIEW 1.0µF T3OUT 20 T4OUT 1 T1OUT 2 19 T5IN T2OUT 3 18 N.C. T2IN 4 1.0µF MAX230 11 +10V TO -10V C2+ 12 C2- VOLTAGE INVERTER 15 T4IN VCC 7 14 T3IN C1+ 13 V- 8 V+ 9 12 C2- C1- 10 11 C2+ 13 1.0µF 400kΩ 5 T1IN T1OUT 2 T1 +5V 16 T5OUT GND 6 V- 1.0µF +5V 17 SHDN T1IN 5 7 VCC V+ 9 +5V TO +10V VOLTAGE DOUBLER 8 C1+ 10 C1- 400kΩ 4 T2IN T2OUT 3 T2 +5V 400kΩ TTL/CMOS INPUTS 14 T3IN T3OUT 1 T3 RS-232 OUTPUTS +5V 400kΩ 15 T4IN T4OUT 20 T4 +5V 400kΩ DIP/SO 19 T5IN T5OUT 16 T5 N.C. x 18 17 GND SHDN 6 Figure 9. MAX230 Pin Configuration and Typical Operating Circuit +5V INPUT TOP VIEW +7.5V TO +12V 1.0µF 13 (15) 1 2 1.0µF C+ 1 CV- 2 3 T2OUT 4 14 V+ C+ 1 16 V+ 13 VCC C- 2 15 VCC V- 3 12 GND MAX231 R2IN 5 11 T1OUT T2OUT 4 9 R1OUT T2IN 7 8 T1IN R2OUT 6 8 10 T1IN N.C. 8 9 N.C. DIP SO V- T1IN T1OUT 11 T1 C2 1.0µF (13) RS-232 OUTPUTS (11) 7 T2IN 9 R1OUT T2OUT 4 T2 R1IN 10 R1 TTL/CMOS OUTPUTS 5kΩ 6 R2OUT R2IN 5 R2 (12) RS-232 INPUTS GND 12 (14) Figure 10. MAX231 Pin Configurations and Typical Operating Circuit 20 (16) 400kΩ 5kΩ PIN NUMBERS IN ( ) ARE FOR SO PACKAGE 14 3 +5V TTL/CMOS INPUTS 11 R1OUT T2IN 7 V+ 400kΩ (10) 12 R1IN R2IN 5 10 R1IN R2OUT 6 13 T1OUT C1- VCC +12V TO -12V VOLTAGE CONVERTER +5V 14 GND MAX231 C1+ ______________________________________________________________________________________ +5V-Powered, Multichannel RS-232 Drivers/Receivers MAX220–MAX249 +5V INPUT 1.0µF TOP VIEW 7 VCC +5V 400kΩ T2IN 1 T1IN 2 19 R2IN R1OUT 3 GND 6 17 V- MAX233 MAX233A (V+) C1+ 14 V+ (C1-) GND 9 12 V- (C2+) (V-) CS- 10 RS-232 OUTPUTS 400kΩ 1 T2IN 3 R1OUT T2OUT 18 R1IN 4 11 C2+ (C2-) DIP/SO 5kΩ TTL/CMOS OUTPUTS 20 R2OUT 13 C1- (C1+) 8 +5V 16 C215 C2+ VCC 7 T1OUT 5 T1IN TTL/CMOS INPUTS 18 T2OUT R1IN 4 T1OUT 5 2 20 R2OUT 8 (13) DO NOT MAKE CONNECTIONS TO 13 (14) THESE PINS 12 (10) INTERNAL -10 17 POWER SUPPLY INTERNAL +10V POWER SUPPLY RS-232 OUTPUTS R2IN 19 5kΩ C2+ 11 (12) C1+ C1- C2+ V- C2- V14 (8) V+ C2GND 15 16 10 (11) GND 6 9 ( ) ARE FOR SO PACKAGE ONLY. Figure 11. MAX233/MAX233A Pin Configuration and Typical Operating Circuit +5V INPUT 1.0µF TOP VIEW 7 1.0µF 9 10 1.0µF T1OUT 1 16 T3OUT T2OUT 2 C1C2+ 11 C2- 12 V- VCC 6 11 C2- C1+ 7 10 C2+ 9 V+ 8 4 T1IN 13 T3IN GND 5 C1- +10V TO -10V VOLTAGE INVERTER 1.0µF 8 V+ V- 12 1.0µF 400kΩ 14 T4IN MAX234 6 VCC +5V TO +10V VOLTAGE DOUBLER +5V 15 T4OUT T2IN 3 T1IN 4 C1+ T1 T1OUT 1 +5V 400kΩ 3 T2IN T2 T2OUT 3 +5V TTL/CMOS INPUTS RS-232 OUTPUTS 400kΩ 13 T3IN T3 T3OUT 16 +5V DIP/SO 400kΩ 14 T4IN T4 T4OUT 15 GND 5 Figure 12. MAX234 Pin Configuration and Typical Operating Circuit ______________________________________________________________________________________ 21 MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers +5V INPUT TOP VIEW 1.0µF 12 +5V VCC 400kΩ 8 T1IN T1 T1OUT 3 T2 T2OUT 4 +5V 400kΩ 7 T2IN +5V 400kΩ TTL/CMOS INPUTS T4OUT 1 24 R3IN T3OUT 2 23 R3OUT T1OUT 3 22 T5IN T2OUT 4 21 SHDN R2IN 5 MAX235 R2OUT 6 15 T3IN T3OUT 2 T3 +5V 400kΩ 16 T4IN 22 T5IN T4OUT 1 T4 +5V 20 EN 400kΩ T5OUT 19 T5 19 T5OUT T2IN 7 18 R4IN T1IN 8 17 R4OUT R1OUT 9 16 T4IN R1IN 10 15 T3IN GND 11 14 R5OUT VCC 12 13 R5IN DIP 9 R1OUT R1IN 10 T1 5kΩ 6 R2OUT R2IN 5 R2 5kΩ TTL/CMOS OUTPUTS 23 R3OUT R3IN 24 R3 5kΩ 17 R4OUT R4IN 18 R4 5kΩ 14 R5OUT R5IN 13 R5 5kΩ 20 EN SHDN 21 GND 11 Figure 13. MAX235 Pin Configuration and Typical Operating Circuit 22 RS-232 OUTPUTS ______________________________________________________________________________________ RS-232 INPUTS +5V-Powered, Multichannel RS-232 Drivers/Receivers MAX220–MAX249 TOP VIEW +5V INPUT 1.0µF 9 10 1.0µF 12 13 1.0µF 1.0µF VCC +5V TO +10V VOLTAGE DOUBLER C1+ C1- V+ C2+ V- +10V TO -10V VOLTAGE INVERTER 14 C2- 11 15 1.0µF +5V 400kΩ 7 T1IN T3OUT 1 24 T4OUT T1OUT 2 23 R2IN T2OUT 3 22 R2OUT R1IN 4 21 SHDN R1OUT 5 MAX236 +5V 400kΩ 6 T2IN TTL/CMOS INPUTS 19 T4IN T1IN 7 18 T3IN GND 8 17 R3OUT VCC 9 16 R3IN C1+ 10 15 V- V+ 11 14 C2- C1- 12 13 C2+ T2OUT T2 3 RS-232 OUTPUTS +5V 400kΩ 20 EN T2IN 6 T1OUT 2 T1 18 T3IN T3OUT 1 T3 +5V 400kΩ 19 T4IN 5 R1OUT T4OUT 24 T4 R1IN 4 R1 5kΩ DIP/SO TTL/CMOS OUTPUTS 22 R2OUT R2IN R2 23 RS-232 INPUTS 5kΩ 17 R3OUT R3IN R3 16 5kΩ 20 EN SHDN 21 GND 8 Figure 14. MAX236 Pin Configuration and Typical Operating Circuit ______________________________________________________________________________________ 23 MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers TOP VIEW +5V INPUT 1.0µF 10 1.0µF 12 13 1.0µF 14 1.0µF 9 VCC +5V TO +10V VOLTAGE DOUBLER C1+ C1C2+ V+ V- +10V TO -10V VOLTAGE INVERTER C2- 11 15 1.0µF +5V 400kΩ T3OUT 1 24 T4OUT T1OUT 2 23 R2IN T2OUT 3 22 R2OUT R1IN 4 R1OUT 5 7 T1IN 400kΩ 6 T2IN 21 T5IN MAX237 T2IN 6 +5V 20 T5OUT 19 T4IN T1IN 7 18 T3IN GND 8 17 R3OUT VCC 9 16 R3IN C1+ 10 15 V- V+ 11 14 C2- C1- 12 13 C2+ T1OUT 2 T1 +5V T2OUT T2 3 400kΩ TTL/CMOS INPUTS 18 T3IN +5V T3OUT 1 T3 RS-232 OUTPUTS 400kΩ 19 T4IN +5V T4OUT 24 T4 400kΩ 21 T5IN DIP/SO 5 R1OUT T5OUT 20 T5 R1 R1IN 4 5kΩ TTL/CMOS OUTPUTS 22 R2OUT R2 R2IN 23 5kΩ 17 R3OUT R3 R3IN 5kΩ GND 8 Figure 15. MAX237 Pin Configuration and Typical Operating Circuit 24 ______________________________________________________________________________________ 16 RS-232 INPUTS +5V-Powered, Multichannel RS-232 Drivers/Receivers MAX220–MAX249 TOP VIEW +5V INPUT 1.0µF 1.0µF 9 10 1.0µF 12 13 1.0µF 14 VCC +5V TO +10V VOLTAGE DOUBLER C1+ C1- V+ C2+ V- +10V TO -10V VOLTAGE INVERTER C2- 11 15 1.0µF +5V 400kΩ T2OUT 1 24 T3OUT T1OUT 2 23 R3IN R2IN 3 T1OUT 2 T1 +5V 400kΩ 22 R3OUT R2OUT 4 T1IN 5 5 T1IN 18 T2IN 21 T4IN MAX238 20 T4OUT R1OUT 6 19 T3IN R1IN 7 18 T2IN GND 8 17 R4OUT VCC 9 16 R4IN C1+ 10 15 V- V+ 11 14 C2- C1- 12 13 C2+ T2OUT T2 1 +5V TTL/CMOS INPUTS RS-232 OUTPUTS 400kΩ 19 T3IN T3OUT 24 T3 +5V 400kΩ 21 T4IN 6 R1OUT T4OUT 20 T4 R1 R1IN 7 5kΩ DIP/SO 4 R2OUT R2 TTL/CMOS OUTPUTS R2IN 3 RS-232 INPUTS 5kΩ 22 R3OUT R3 R3IN 23 5kΩ 17 R4OUT R4 R4IN 16 5kΩ GND 8 Figure 16. MAX238 Pin Configuration and Typical Operating Circuit ______________________________________________________________________________________ 25 MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers TOP VIEW 7.5V TO 13.2V INPUT +5V INPUT 1.0µF 4 6 1.0µF 7 5 VCC C1+ V+ V- +10V TO -10V VOLTAGE INVERTER C1- 8 1.0µF +5V 400kΩ 24 T1IN R1OUT 1 24 T1IN R1IN 2 23 T2IN GND 3 22 R2OUT T1OUT 19 T1 +5V 400kΩ VCC 4 V+ 5 TTL/CMOS INPUTS 23 T2IN 19 T1OUT C- 7 18 R3IN V- 8 17 R3OUT R5IN 9 16 T3IN R5OUT 10 15 N.C. R4OUT 11 14 EN RS-232 OUTPUTS 400kΩ 20 T2OUT C+ 6 20 +5V 21 R2IN MAX239 T2OUT T2 16 T3IN 1 R1OUT T3OUT 13 T3 R1 R1IN 2 5kΩ 22 R2OUT R2 13 T3OUT R4IN 12 R2IN 21 5kΩ DIP/SO TTL/CMOS OUTPUTS 17 R3OUT R3 R3IN 18 5kΩ 11 R4OUT R4 R4IN 12 5kΩ 10 R5OUT R5 R5IN 5kΩ 14 EN N.C. GND 3 Figure 17. MAX239 Pin Configuration and Typical Operating Circuit 26 ______________________________________________________________________________________ 9 15 RS-232 INPUTS +5V-Powered, Multichannel RS-232 Drivers/Receivers MAX220–MAX249 +5V INPUT 1.0µF TOP VIEW 25 19 VCC +5V TO +10V VOLTAGE DOUBLER C1+ 1.0µF 27 C128 C2+ 1.0µF 29 C2- 1.0µF V+ +5V TO -10V VOLTAGE INVERTER V- 26 30 1.0µF +5V 400kΩ 15 T1IN T1 +5V 400kΩ N.C. R2IN N.C. T2OUT T1OUT T3OUT T4OUT R3IN R3OUT T5IN N.C. 14 T2IN T2 +5V 11 10 9 8 7 6 5 4 3 2 1 TTL/CMOS INPUTS T3 12 13 14 15 16 17 18 19 20 21 22 MAX240 44 43 42 41 40 39 38 37 36 35 34 N.C. SHDN EN T5OUT R4IN R4OUT T4IN T3IN R5OUT R5IN N.C. +5V 2 T5IN 16 R1OUT N.C. N.C. C1+ V+ C1C2+ C2 VN.C. N.C. N.C. 8 T3OUT 6 RS-232 OUTPUTS 400kΩ 38 T4IN T4 T4OUT 5 400kΩ T5 R1 T5OUT 41 R1IN 17 5kΩ 13 R2OUT R2 23 24 25 26 27 28 29 30 31 32 33 N.C. R2OUT T2IN T1IN R1OUT R1IN GND VCC N.C. N.C. N.C. T2OUT 400kΩ 37 T3IN +5V T1OUT 7 R2IN 10 5kΩ TTL/CMOS OUTPUTS 3 R3OUT R3 R3IN 4 5kΩ RS-232 INPUTS Plastic FP 39 R4OUT R4 R4IN 40 5kΩ 36 R5OUT R5 R5IN 35 5kΩ 42 EN GND SHDN 43 18 Figure 18. MAX240 Pin Configuration and Typical Operating Circuit ______________________________________________________________________________________ 27 MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers +5V INPUT TOP VIEW 0.1µF 1 C1+ 1 16 VCC V+ 2 15 GND C1- 3 14 T1OUT C2+ 4 MAX243 0.1µF 3 C14 C2+ 0.1µF 5 C2- 11 T1IN T2OUT 7 10 T2IN 9 V+ +10V TO -10V VOLTAGE INVERTER V- 2 +10V 6 -10V 0.1µF 400kΩ 13 R1IN V- 6 R2IN 8 16 VCC +5V TO +10V VOLTAGE DOUBLER +5V T1OUT 14 11 T1IN 12 R1OUT C2- 5 C1+ ALL CAPACITORS = 0.1µF 0.1µF +5V TTL/CMOS INPUTS RS-232 OUTPUTS 400kΩ T2OUT 7 10 T2IN R2OUT DIP/SO 12 R1OUT R1IN 13 TTL/CMOS OUTPUTS 9 R2OUT RECEIVER INPUT ≤ -3 V OPEN ≥ +3V R1 OUTPUT HIGH HIGH LOW R2 OUTPUT HIGH LOW LOW R2IN 8 5kΩ GND 15 Figure 19. MAX243 Pin Configuration and Typical Operating Circuit 28 RS-232 INPUTS 5kΩ ______________________________________________________________________________________ +5V-Powered, Multichannel RS-232 Drivers/Receivers MAX220–MAX249 +5V TOP VIEW 1µF 1µF 20 VCC +5V TO +10V VOLTAGE DOUBLER 1µF RB5IN TB4OUT TB3OUT TB2OUT TB1OUT TA1OUT TA2OUT TA4OUT TA3OUT RA4IN RA5IN 21 1µF 6 5 4 3 2 1 44 43 42 41 40 C1+ 23 C124 C2+ 25 C2- 22 V+ 26 V- 1µF +10V TO -10V VOLTAGE INVERTER 2 TA1OUT +5V +5V TB1OUT 44 400kΩ RA3IN 7 39 RB4IN RA2IN 8 38 RB3IN RA1IN 9 37 RB2IN RA1OUT 10 36 RB1IN RA2OUT 11 35 RB1OUT RA3OUT 12 RA4OUT 13 33 RB3OUT RA5OUT 14 32 RB4OUT MAX244 34 RB2OUT 31 RB5OUT 16 30 TB1IN TA3IN 17 29 TB2IN TB3IN TB4IN V- C2- C2+ V+ C1- VCC 19 20 21 22 23 24 25 26 27 28 C1+ 18 GND 15 TA4IN TA1IN TA2IN PLCC 15 TA1IN 2 TA2OUT TB1IN 30 +5V +5V 16 TA2IN TB2IN 29 3 TA3OUT +5V +5V TB3OUT 42 400kΩ 17 TA3IN TB3IN 28 4 TA4OUT +5V +5V TB4OUT 41 400kΩ 18 TA4IN TB4IN 27 9 RA1IN RB1IN 36 5kΩ 5kΩ 10 RA1OUT RB1OUT 35 8 RA2IN MAX249 FUNCTIONAL DESCRIPTION 10 RECEIVERS 5 A-SIDE RECEIVER 5 B-SIDE RECEIVER 8 TRANSMITTERS 4 A-SIDE TRANSMITTERS 4 B-SIDE TRANSMITTERS NO CONTROL PINS TB2OUT 43 400kΩ RB2IN 37 5kΩ 5kΩ 11 RA2OUT RB2OUT 34 7 RA3IN RB3IN 38 5kΩ 5kΩ 12 RA3OUT RB3OUT 33 6 RA4IN RB4IN 39 5kΩ 5kΩ 13 RA4OUT RB4OUT 32 5 RA5IN RB5IN 40 5kΩ 5kΩ 14 RA5OUT GND 19 RB5OUT 31 Figure 20. MAX244 Pin Configuration and Typical Operating Circuit ______________________________________________________________________________________ 29 MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers +5V TOP VIEW 1µF 40 VCC ENR 40 1 VCC TA1IN 2 39 ENT TA2IN 3 38 TB1IN TA3IN 4 37 TB2IN TA4IN 5 36 TB3IN RA5OUT 6 35 TB4IN RA4OUT 7 34 RB5OUT MAX245 RA3OUT 8 33 RB4OUT RA2OUT 9 32 RB3OUT RA1OUT 10 31 RB2OUT RA1IN 11 30 RB1OUT RA2IN 12 29 RB1IN RA3IN 13 28 RB2IN RA4IN 14 27 RB3IN RA5IN 15 26 RB4IN TA1OUT 16 25 RB5IN TA2OUT 17 24 TB1OUT TA3OUT 18 23 TB2OUT TA4OUT GND 19 22 TB3OUT 20 21 TB4OUT 16 TA1OUT +5V +5V 2 TA1IN TB1IN 38 17 TA2OUT +5V +5V 3 TA2IN TB2IN 37 18 TA3OUT +5V +5V TB3OUT 22 400kΩ 4 TA3IN TB3IN 36 19 TA4OUT +5V +5V TB4OUT 21 400kΩ 5 TA4IN TB4IN 35 1 ENR ENT 39 11 RA1IN RB1IN 29 5kΩ 5kΩ 10 RA1OUT RB1OUT 30 12 RA2IN RB2IN 28 5kΩ 5kΩ RB2OUT 31 13 RA3IN RB3IN 27 5kΩ MAX245 FUNCTIONAL DESCRIPTION 10 RECEIVERS 5 A-SIDE RECEIVERS (RA5 ALWAYS ACTIVE) 5 B-SIDE RECEIVERS (RB5 ALWAYS ACTIVE) 8 TRANSMITTTERS 4 A-SIDE TRANSMITTERS 2 CONTROL PINS 1 RECEIVER ENABLE (ENR) 1 TRANSMITTER ENABLE (ENT) TB2OUT 23 400kΩ 9 RA2OUT DIP TB1OUT 24 400kΩ 5kΩ 8 RA3OUT RB3OUT 32 14 RA4IN RB4IN 26 5kΩ 5kΩ 7 RA4OUT RB4OUT 33 15 RA5IN RB5IN 25 5kΩ 5kΩ 6 RA5OUT RB5OUT 34 GND 20 Figure 21. MAX245 Pin Configuration and Typical Operating Circuit 30 ______________________________________________________________________________________ +5V-Powered, Multichannel RS-232 Drivers/Receivers MAX220–MAX249 +5V TOP VIEW 1µF ENA 1 40 VCC TA1IN 2 39 ENB TA2IN 3 38 TB1IN TA3IN 4 37 TB2IN TA4IN 5 36 TB3IN RA5OUT 6 35 TB4IN RA4OUT 7 34 RB5OUT RA3OUT 8 33 RB4OUT MAX246 RA2OUT 9 32 RB3OUT RA1OUT 10 31 RB2OUT RA1IN 11 30 RB1OUT RA2IN 12 29 RB1IN RA3IN 13 28 RB2IN RA4IN 14 27 RB3IN RA5IN 15 26 RB4IN TA1OUT 16 25 RB5IN TA2OUT 17 24 TB1OUT TA3OUT 18 23 TB2OUT TA4OUT 19 22 TB3OUT GND 20 21 TB4OUT DIP 40 VCC +5V +5V 16 TA1OUT TB1OUT 24 400kΩ 2 TA1IN TB1IN 38 +5V +5V 17 TA2OUT TB2OUT 23 400kΩ 3 TA2IN TB2IN 37 +5V +5V 18 TA3OUT TB3OUT 22 400kΩ 4 TA3IN TB3IN 36 +5V +5V TB4OUT 21 19 TA4OUT 400kΩ 5 TA4IN TB4IN 35 1 ENA ENB 39 RB1IN 29 11 RA1IN 5kΩ 5kΩ 10 RA1OUT RB1OUT 30 12 RA2IN RB2IN 28 5kΩ 5kΩ 9 RA2OUT RB2OUT 31 13 RA3IN MAX246 FUNCTIONAL DESCRIPTION 10 RECEIVERS 5 A-SIDE RECEIVERS (RA5 ALWAYS ACTIVE) 5 B-SIDE RECEIVERS (RB5 ALWAYS ACTIVE) 8 TRANSMITTERS 4 A-SIDE TRANSMITTERS 4 B-SIDE TRANSMITTERS 2 CONTROL PINS ENABLE A-SIDE (ENA) ENABLE B-SIDE (ENB) RB3IN 27 5kΩ 5kΩ 8 RA3OUT RB3OUT 32 14 RA4IN RB4IN 26 5kΩ 5kΩ 7 RA4OUT RB4OUT 33 15 RA5IN RB5IN 25 5kΩ 6 RA5OUT 5kΩ RB5OUT 34 GND 20 Figure 22. MAX246 Pin Configuration and Typical Operating Circuit ______________________________________________________________________________________ 31 MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers +5V TOP VIEW 1µF 40 VCC +5V +5V 1 ENTA ENTA 1 40 VCC TA1IN 2 39 ENTB TA2IN 3 38 TB1IN TA3IN 4 37 TB2IN TA4IN 5 36 TB3IN RB5OUT 6 35 TB4IN RA4OUT 7 34 RB4OUT RA3OUT 8 33 RB3OUT MAX247 RA2OUT 9 32 RB2OUT RA1OUT 10 31 RB1OUT ENRA 11 30 ENRB RA1IN 12 29 RB1IN RA2IN 13 28 RB2IN RA3IN 14 27 RB3IN RA4IN 15 26 RB4IN TA1OUT 16 25 RB5IN TA2OUT 17 24 TB1OUT TA3OUT 18 23 TB2OUT TA4OUT 19 22 TB3OUT GND 20 21 TB4OUT ENTB 39 TB1OUT 24 16 TA1OUT 400kΩ 2 TA1IN TB1IN 38 +5V +5V 17 TA2OUT TB2OUT 23 400kΩ 3 TA2IN TB2IN 37 +5V +5V 18 TA3OUT TB3OUT 22 400kΩ 4 TA3IN TB3IN 36 +5V +5V TB4OUT 21 19 TA4OUT 400kΩ 5 TA4IN TB4IN 35 6 RB5OUT RB5IN 25 5kΩ 12 RA1IN RB1IN 29 5kΩ 5kΩ 10 RA1OUT RB1OUT 31 13 RA2IN RB2IN 28 DIP 5kΩ MAX247 FUNCTIONAL DESCRIPTION 9 RECEIVERS 4 A-SIDE RECEIVERS 5 B-SIDE RECEIVERS (RB5 ALWAYS ACTIVE) 8 TRANSMITTERS 4 A-SIDE TRANSMITTERS 4 B-SIDE TRANSMITTERS 4 CONTROL PINS ENABLE RECEIVER A-SIDE (ENRA) ENABLE RECEIVER B-SIDE (ENRB) ENABLE RECEIVER A-SIDE (ENTA) ENABLE RECEIVERr B-SIDE (ENTB) 5kΩ 9 RA2OUT RB2OUT 32 14 RA3IN RB3IN 27 5kΩ 5kΩ 8 RA3OUT RB3OUT 33 15 RA4IN RB4IN 26 5kΩ 5kΩ 7 RA4OUT RB4OUT 34 11 ENRA ENRB 30 GND 20 Figure 23. MAX247 Pin Configuration and Typical Operating Circuit 32 ______________________________________________________________________________________ +5V-Powered, Multichannel RS-232 Drivers/Receivers MAX220–MAX249 TOP VIEW +5V 1µF 1µF 20 4 3 2 1 44 43 42 41 40 1µF RB4IN TA4OUT TB1OUT TB3OUT TA1OUT TB2OUT TA2OUT 5 TA4OUT 6 TA3OUT RA3IN RA4IN 21 1µF C1+ 23 C124 C2+ 25 C2- VCC +5V TO +10V VOLTAGE DOUBLER V+ V- +5V 1 TA1OUT 39 RB3IN RA1IN 8 38 RB2IN ENRA 9 37 RB1IN RA1OUT 10 36 ENRB RA2OUT 11 35 RB1OUT RA3OUT 12 RA4OUT 13 33 RB3OUT TA1IN 14 32 RB4OUT TA2IN 15 31 TB1IN TA3IN 16 30 TB2IN 34 RB2OUT 29 TB3IN TB4IN ENTB V- C2- C2+ V+ C1- VCC 19 20 21 22 23 24 25 26 27 28 C1+ 18 GND 17 ENTA TA4IN MAX248 PLCC TB1OUT 44 400kΩ 14 TA1IN TB1IN 31 +5V +5V 2 TA2OUT TB2OUT 43 400kΩ 15 TA2IN TB2IN 30 +5V +5V 3 TA3OUT TB3OUT 42 400kΩ 16 TA3IN TB3IN 29 +5V +5V TB4OUT 41 4 TA4OUT 400kΩ 17 TA4IN TB4IN 28 8 RA1IN RB1IN 37 5kΩ MAX248 FUNCTIONAL DESCRIPTION 8 RECEIVERS 4 A-SIDE RECEIVERS 4 B-SIDE RECEIVERS 8 TRANSMITTERS 4 A-SIDE TRANSMITTERS 4 B-SIDE TRANSMITTERS 4 CONTROL PINS ENABLE RECEIVER A-SIDE (ENRA) ENABLE RECEIVER B-SIDE (ENRB) ENABLE RECEIVER A-SIDE (ENTA) ENABLE RECEIVER B-SIDE (ENTB) 1µF ENTB 27 +5V 7 26 +10V TO -10V VOLTAGE INVERTER 18 ENTA RA2IN 22 5kΩ 10 RA1OUT RB1OUT 35 7 RA2IN RB2IN 38 5kΩ 5kΩ 11 RA2OUT RB2OUT 34 6 RA3IN RB3IN 39 5kΩ 5kΩ 12 RA3OUT RB3OUT 33 5 RA4IN RB4IN 40 5kΩ 5kΩ 13 RA4OUT 9 ENRA RB4OUT 32 ENRB 36 GND 19 Figure 24. MAX248 Pin Configuration and Typical Operating Circuit ______________________________________________________________________________________ 33 MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers +5V TOP VIEW 1µF 1µF 20 2 1 44 43 42 41 40 RB5IN 3 1µF RB4IN TB3OUT TB2OUT TB1OUT 4 TA1OUT 5 TA3OUT RA5IN 6 TA2OUT RA3IN RA4IN 21 1µF VCC +5V TO +10V VOLTAGE DOUBLER C1+ 23 C124 C2+ 25 C2- V+ V- +5V TB1OUT 44 1 TA1OUT 39 RB3IN RA1IN 8 38 RB2IN ENRA 9 37 RB1IN RA1OUT 10 36 ENRB RA2OUT 11 35 RB1OUT RA3OUT 12 RA4OUT 13 33 RB3OUT RA5OUT 14 32 RB4OUT MAX249 34 RB2OUT TA1IN 15 31 RB5OUT TA2IN 16 30 TB1IN 29 TB2IN TB3IN ENTB V- C2- C1- C2+ V+ VCC 19 20 21 22 23 24 25 26 27 28 C1+ 18 GND 17 ENTA TA3IN PLCC 400kΩ 15 TA1IN TB1IN 30 +5V +5V 2 TA2OUT TB2OUT 43 400kΩ 16 TA2IN TB2IN 29 +5V +5V 3 TA3OUT TB3OUT 42 400kΩ 17 TA3IN TB3IN 28 8 RA1IN RB1IN 37 5kΩ 5kΩ 10 RA1OUT RB1OUT 35 7 RA2IN RB2IN 38 5kΩ MAX249 FUNCTIONAL DESCRIPTION 10 RECEIVERS 5 A-SIDE RECEIVERS 5 B-SIDE RECEIVERS 6 TRANSMITTERS 3 A-SIDE TRANSMITTERS 3 B-SIDE TRANSMITTERS 4 CONTROL PINS ENABLE RECEIVER A-SIDE (ENRA) ENABLE RECEIVER B-SIDE (ENRB) ENABLE RECEIVER A-SIDE (ENTA) ENABLE RECEIVER B-SIDE (ENTB) 5kΩ 11 RA2OUT RB2OUT 34 6 RA3IN RB3IN 39 5kΩ 5kΩ 12 RA3OUT RB3OUT 33 5 RA4IN RB4IN 40 5kΩ 5kΩ 13 RA4OUT RB4OUT 32 4 RA5IN RB5IN 41 5kΩ 5kΩ 14 RA5OUT RB5OUT 31 9 ENRA ENRB 36 GND 19 Figure 25. MAX249 Pin Configuration and Typical Operating Circuit 34 1µF ENTB 27 +5V 7 26 +10V TO -10V VOLTAGE INVERTER 18 ENTA RA2IN 22 ______________________________________________________________________________________ +5V-Powered, Multichannel RS-232 Drivers/Receivers MAX222CPN PART TEMP RANGE 0°C to +70°C 18 Plastic DIP PIN-PACKAGE PART MAX232AC/D TEMP RANGE 0°C to +70°C PIN-PACKAGE Dice* MAX222CWN 0°C to +70°C 18 Wide SO MAX232AEPE -40°C to +85°C 16 Plastic DIP MAX222C/D 0°C to +70°C Dice* MAX232AESE -40°C to +85°C 16 Narrow SO MAX222EPN -40°C to +85°C 18 Plastic DIP MAX232AEWE -40°C to +85°C 16 Wide SO MAX222EWN -40°C to +85°C 18 Wide SO MAX232AEJE -40°C to +85°C 16 CERDIP MAX222EJN -40°C to +85°C 18 CERDIP MAX232AMJE -55°C to +125°C 16 CERDIP MAX222MJN -55°C to +125°C 18 CERDIP MAX232AMLP -55°C to +125°C 20 LCC MAX223CAI 0°C to +70°C 28 SSOP MAX233CPP 0°C to +70°C 20 Plastic DIP MAX223CWI 0°C to +70°C 28 Wide SO MAX233EPP -40°C to +85°C 20 Plastic DIP MAX223C/D 0°C to +70°C Dice* MAX233ACPP 0°C to +70°C 20 Plastic DIP MAX223EAI -40°C to +85°C 28 SSOP MAX233ACWP 0°C to +70°C 20 Wide SO MAX223EWI -40°C to +85°C 28 Wide SO MAX233AEPP -40°C to +85°C 20 Plastic DIP MAX225CWI 0°C to +70°C 28 Wide SO MAX233AEWP -40°C to +85°C 20 Wide SO MAX225EWI -40°C to +85°C 28 Wide SO MAX234CPE 0°C to +70°C 16 Plastic DIP MAX230CPP 0°C to +70°C 20 Plastic DIP MAX234CWE 0°C to +70°C 16 Wide SO MAX230CWP 0°C to +70°C 20 Wide SO MAX234C/D 0°C to +70°C Dice* MAX230C/D 0°C to +70°C Dice* MAX234EPE -40°C to +85°C 16 Plastic DIP MAX230EPP -40°C to +85°C 20 Plastic DIP MAX234EWE -40°C to +85°C 16 Wide SO -40°C to +85°C 16 CERDIP 16 CERDIP MAX230EWP -40°C to +85°C 20 Wide SO MAX234EJE MAX230EJP -40°C to +85°C 20 CERDIP MAX234MJE -55°C to +125°C MAX230MJP -55°C to +125°C 20 CERDIP MAX235CPG 0°C to +70°C 24 Wide Plastic DIP MAX231CPD 0°C to +70°C 14 Plastic DIP MAX235EPG -40°C to +85°C 24 Wide Plastic DIP MAX231CWE 0°C to +70°C 16 Wide SO MAX235EDG -40°C to +85°C 24 Ceramic SB 0°C to +70°C 14 CERDIP MAX235MDG -55°C to +125°C 24 Ceramic SB MAX231C/D 0°C to +70°C Dice* MAX236CNG 0°C to +70°C 24 Narrow Plastic DIP MAX231EPD -40°C to +85°C 14 Plastic DIP MAX236CWG 0°C to +70°C 24 Wide SO MAX231EWE -40°C to +85°C 16 Wide SO MAX236C/D 0°C to +70°C Dice* MAX231EJD -40°C to +85°C 14 CERDIP MAX236ENG -40°C to +85°C 24 Narrow Plastic DIP 14 CERDIP MAX236EWG -40°C to +85°C 24 Wide SO MAX231CJD MAX231MJD -55°C to +125°C MAX232CPE 0°C to +70°C 16 Plastic DIP MAX236ERG -40°C to +85°C 24 Narrow CERDIP MAX232CSE 0°C to +70°C 16 Narrow SO MAX236MRG -55°C to +125°C 24 Narrow CERDIP MAX232CWE 0°C to +70°C 16 Wide SO MAX237CNG 0°C to +70°C 24 Narrow Plastic DIP MAX232C/D 0°C to +70°C Dice* MAX237CWG 0°C to +70°C 24 Wide SO MAX232EPE -40°C to +85°C 16 Plastic DIP MAX237C/D 0°C to +70°C Dice* MAX232ESE -40°C to +85°C 16 Narrow SO MAX237ENG -40°C to +85°C 24 Narrow Plastic DIP MAX232EWE -40°C to +85°C 16 Wide SO MAX237EWG -40°C to +85°C 24 Wide SO MAX232EJE -40°C to +85°C 16 CERDIP MAX237ERG -40°C to +85°C 24 Narrow CERDIP MAX232MJE -55°C to +125°C 16 CERDIP MAX237MRG -55°C to +125°C 24 Narrow CERDIP MAX232MLP -55°C to +125°C 20 LCC MAX238CNG 0°C to +70°C 24 Narrow Plastic DIP MAX232ACPE 0°C to +70°C 16 Plastic DIP MAX238CWG 0°C to +70°C 24 Wide SO MAX232ACSE 0°C to +70°C 16 Narrow SO MAX238C/D 0°C to +70°C Dice* MAX232ACWE 0°C to +70°C 16 Wide SO MAX238ENG -40°C to +85°C 24 Narrow Plastic DIP * Contact factory for dice specifications. ______________________________________________________________________________________ 35 MAX220–MAX249 ___________________________________________Ordering Information (continued) MAX220–MAX249 +5V-Powered, Multichannel RS-232 Drivers/Receivers ___________________________________________Ordering Information (continued) MAX238EWG PART -40°C to +85°C TEMP RANGE 24 Wide SO PIN-PACKAGE PART MAX243CPE TEMP RANGE 0°C to +70°C PIN-PACKAGE 16 Plastic DIP MAX238ERG -40°C to +85°C 24 Narrow CERDIP MAX243CSE 0°C to +70°C 16 Narrow SO MAX238MRG -55°C to +125°C 24 Narrow CERDIP MAX243CWE 0°C to +70°C 16 Wide SO MAX239CNG 0°C to +70°C 24 Narrow Plastic DIP MAX243C/D 0°C to +70°C Dice* MAX239CWG 0°C to +70°C 24 Wide SO MAX243EPE -40°C to +85°C 16 Plastic DIP MAX239C/D 0°C to +70°C Dice* MAX243ESE -40°C to +85°C 16 Narrow SO MAX239ENG -40°C to +85°C 24 Narrow Plastic DIP MAX243EWE -40°C to +85°C 16 Wide SO MAX239EWG -40°C to +85°C 24 Wide SO MAX243EJE -40°C to +85°C 16 CERDIP MAX239ERG -40°C to +85°C 24 Narrow CERDIP MAX243MJE -55°C to +125°C 16 CERDIP MAX239MRG -55°C to +125°C 24 Narrow CERDIP MAX244CQH 0°C to +70°C 44 PLCC MAX240CMH 0°C to +70°C 44 Plastic FP MAX244C/D 0°C to +70°C Dice* MAX240C/D 0°C to +70°C Dice* MAX244EQH -40°C to +85°C MAX241CAI 0°C to +70°C 28 SSOP MAX245CPL 0°C to +70°C 40 Plastic DIP 0°C to +70°C 28 Wide SO MAX245C/D 0°C to +70°C Dice* MAX241C/D 0°C to +70°C Dice* MAX245EPL -40°C to +85°C 40 Plastic DIP MAX241EAI -40°C to +85°C 28 SSOP MAX246CPL 0°C to +70°C 40 Plastic DIP MAX241EWI -40°C to +85°C 28 Wide SO MAX246C/D 0°C to +70°C Dice* 20 SSOP MAX246EPL -40°C to +85°C 40 Plastic DIP 0°C to +70°C 40 Plastic DIP Dice* MAX241CWI MAX242CAP 0°C to +70°C 44 PLCC MAX242CPN 0°C to +70°C 18 Plastic DIP MAX247CPL MAX242CWN 0°C to +70°C 18 Wide SO MAX247C/D 0°C to +70°C MAX242C/D 0°C to +70°C Dice* MAX247EPL -40°C to +85°C MAX242EPN -40°C to +85°C 18 Plastic DIP MAX248CQH 0°C to +70°C 44 PLCC MAX242EWN -40°C to +85°C 18 Wide SO MAX248C/D 0°C to +70°C Dice* 40 Plastic DIP MAX242EJN -40°C to +85°C 18 CERDIP MAX248EQH -40°C to +85°C 44 PLCC MAX242MJN -55°C to +125°C 18 CERDIP MAX249CQH 0°C to +70°C 44 PLCC MAX249EQH -40°C to +85°C 44 PLCC * Contact factory for dice specifications. Package Information For the latest package outline information, go to www.maxim-ic.com/packages. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 36 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 © 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. ANEXO A.3 – MX7828 19-0255; Rev 2; 4/94 CMOS, High-Speed, 8-Bit ADCs with Multiplexer ________________________Applications Digital Signal Processing High-Speed Data Acquisition Telecommunications High-Speed Servo Control Audio Instrumentation ____________________________Features ♦ One-Chip Data Acquisition System ♦ Four or Eight Analog Input Channels ♦ 2.5µs per Channel Conversion Time ♦ Internal 2.5V Reference (MAX154/MAX158 only) ♦ Built-In Track/Hold Function ♦ 1/2LSB Error Specification ♦ Single +5V Supply Operation ♦ No External Clock ♦ New Space-Saving SSOP Package ______________Ordering Information TEMP. RANGE PART PIN-PACKAGE ERROR (LSB) MX7824LN 0°C to +70°C 24 Narrow Plastic DIP ±1/2 MX7824KN 0°C to +70°C 24 Narrow Plastic DIP ±1 MX7824LCWG 0°C to +70°C 24 Wide SO ±1/2 MX7824KCWG 0°C to +70°C 24 Wide SO MX7824LCAG 0°C to +70°C 24 SSOP MX7824KCAG 0°C to +70°C 24 SSOP Ordering Information continued on last page. ±1 ±1/2 ±1 __________________________________________________________Pin Configurations TOP VIEW AIN4 1 24 VDD AIN3 2 23 NC AIN2 3 22 A0 AIN1 4 TP (REF OUT) 5 21 A1 MAX154 MX7824 20 DB7 AIN6 1 28 AIN7 AIN5 2 27 AIN8 AIN4 3 26 VDD AIN3 4 25 A0 AIN2 5 AIN1 6 MAX158 MX7828 24 A1 23 A2 19 DB6 TP (REF OUT) 7 22 DB7 18 DB5 DB0 8 21 DB6 DB2 8 17 DB4 DB1 9 20 DB5 DB3 9 16 CS DB2 10 19 DB4 RD 10 15 RDY DB3 11 18 CS INT 11 14 VREF+ RD 12 17 RDY 13 VREF- INT 13 16 VREF+ GND 14 15 VREF- DB0 6 DB1 7 GND 12 DIP/SO/SSOP DIP/SO/SSOP ( ) ARE FOR MAX154/MAX158 ONLY. ________________________________________________________________ Maxim Integrated Products Call toll free 1-800-998-8800 for free samples or literature. 1 MX7824/MX7828 _______________General Description The MAX154/MAX158 and MX7824/MX7828 are highspeed, multi-channel analog-to-digital converters (ADCs). The MAX154 and MX7824 have four analog input channels, while the MAX158 and MX7828 have eight channels. Conversion time for all devices is 2.5µs. The MAX154/MAX158 also feature a 2.5V on-chip reference, forming a complete high-speed data acquisition system. All four converters include a built-in track/hold, eliminating the need for an external track/hold with many input signals. The analog input range is 0V to +5V, although the ADC operates from a single +5V supply. Microprocessor interfaces are simplified by the ADC’s ability to appear as a memory location or I/O port without the need for external logic. The data outputs use latched, three-state buffer circuitry to allow direct connection to a microprocessor data bus or system input port. The MX7824 and MX7828 are pin compatible with Analog Devices’ AD7824 and AD7828. The MAX154 and MAX158, which feature internal references, are also compatible with these products. MX7824/MX7828 CMOS, High-Speed, 8-Bit ADCs with Multiplexer ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD to GND ........................................0V, +10V Voltage at Any Other Pins......................GND - 0.3V, VDD + 0.3V Output Current (REF OUT)..................................................30mA Power Dissipation (any package) to +75°C ....................450mW Derate above +25°C by ..............................................6mW/°C Operating Temperature Ranges MX7824, MX7828 KN/LN/KCW_/LCW_ ............................................0°C to +70°C BQ/CQ .............................................................-40°C to +85°C TQ/UQ............................................................-55°C to +125°C Storage Temperature Range .............................-65°C to +160°C Lead Temperature (soldering, 10sec) .............................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = +5V, VREF+ = +5V, VREF- = GND, Mode 0, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ACCURACY Resolution 8 Bits MAX15_A, MX782_L/C/U MAX15_B, MX782_K/B/T Total Unadjusted Error (Note 1) No Missing Codes Resolution ±1/2 ±1 LSB ±1/4 LSB 8 Bits Channel to Channel Mismatch REFERENCE INPUT Reference Resistance 1 4 kΩ VREF+ Input Voltage Range VREF- VDD V VREF- Input Voltage Range GND VREF+ V REFERENCE OUTPUT—MAX154/MAX158 Only (Note 2) Output Voltage 2.50 2.53 V Load Regulation REF OUT IL = 0mA to 10mA, TA = +25°C -6 -10 mV Power-Supply Sensitivity VDD ±5%, TA = +25°C ±1 ±3 mV MAX15_C 40 70 MAX15_E 40 70 MAX15_M 60 100 Temperature Drift (Note 3) Output Noise TA = +25°C 2.47 eN 200 Capacitive Load ppm/°C µV/rms 0.01 µF ANALOG INPUT Analog Input Voltage Range AINR Analog Input Capacitance CAIN Analog Input Current IAIN VREF- VREF+ 45 Any channel, AIN = 0V to 5V Slew Rate, Tracking SR –—– –—– LOGIC INPUTS ( RD , CS , A0, A1, A2) 0.7 V pF ±3 µA 0.157 V/µs Input High Voltage VINH Input Low Voltage VINL 0.8 V Input High Current IINH 1 µA Input Low Current IINL -1 µA Input Capacitance (Note 4) CIN 8 pF 2 2.4 V 5 _______________________________________________________________________________________ CMOS, High-Speed, 8-Bit ADCs with Multiplexer MX7824/MX7828 ELECTRICAL CHARACTERISTICS (VDD = +5V, VREF+ = +5V, VREF- = GND, Mode 0, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN VOH — –—– DB0–DB7, INT; IOUT = -360µA 4.0 VOL — –—– DB0–DB7, INT; RDY TYP MAX UNITS LOGIC OUTPUTS Output High Voltage Output Low Voltage Three-State Output Current Output Capacitance (Note 4) V IOUT = 1.6mA 0.4 IOUT = 2.6mA 0.4 DB0–DB7, RDY; VOUT = 0V to VDD COUT 5 V ±3 µA 8 pF POWER SUPPLY Supply Voltage VDD Supply Current IDD 5V ±5% for specified performance –—– –—– CS = RD = 2.4V PSS VDD = ±5% 4.75 Power Dissipation Power-Supply Sensitivity Note 1: Note 2: Note 3: Note 4: 5.25 V 15 mA 25 75 mW ±1/16 ±1/4 LSB Total unadjusted error includes offset, full-scale, and linearity errors. Specified with no external load unless otherwise noted. Temperature drift is defined as change in output voltage from +25°C to TMIN or TMAX divided by (25 - TMIN) or (TMAX - 25). Guaranteed by design. TIMING CHARACTERISTICS (Note 5) (VDD = +5V, VREF+ = +5V, VREF- = GND, Mode 0, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SYMBOL TA = +25°C CONDITIONS MIN –—– –—– CS to RD Setup Time –—– –—– CS to RD Hold Time Multiplexer Address Setup Time Multiplexer Address Hold Time –—– CS to RDY Delay Conversion Time (Mode 0) –—– Data Access Time After RD Data Access Time — –—– After INT, Mode 0 –—– — –—– RD to INT Delay (Mode 1) Data Hold Time Delay Time Between Conversions –—– RD Pulse Width (Mode 1) TYP MAX MAX15_ _C/E MX782_K/L/B/C MIN MAX MAX15_ _M MX782_T/U MIN UNITS MAX tCSS 0 0 0 ns tCSH 0 0 0 ns tAS 0 0 0 ns 30 tAH 40 ns 40 2.0 85 60 2.4 110 60 2.8 120 ns µs ns (Note 6) 20 50 60 70 ns CL = 50pF 40 75 100 100 ns 60 70 70 ns CL = 50pF, RL = 5kΩ tACC2 tINTH tDH 35 30 1.6 tRDY tCRD tACC1 (Note 6) (Note 7) tP 500 tRD 60 500 600 80 600 500 80 ns 400 ns Note 5: All input control signals are specified with tR = tF = 20ns (10% to 90% of +5V) and timed from a 1.6V voltage level. Note 6: Measured with load circuits of Figure 1 and defined as the time required for an output to cross 0.8V or 2.4V. Note 7: Defined as the time required for the data lines to change 0.5V when loaded with the circuits of Figure 2. _______________________________________________________________________________________ 3 __________________________________________Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) OUTPUT CURRENT vs. TEMPERATURE VDD = 5V 2.500 2.490 LINEARITY ERROR (LSB) 16 OUTPUT CURRENT (mA) 2.510 2.0 MX7824/28-2 20 MX7824/28-1 2.520 ACCURACY vs. DELAY BETWEEN CONVERSIONS (tp) ISOURCE VOUT = 2.4V 12 8 ISINK VOUT = 0.4V 4 0 50 -100 150 100 0.5 -50 0 50 300 150 100 400 500 ACCURACY vs. VREF (VREF = VREF+ - VREF-) 600 700 8 IDD – SUPPLY CURRENT (mA) MX7824/28-4 VDD = 5V 1.5 1.0 0.5 0 7 VDD = 5.25V 6 5 VDD = 5V 4 VDD = 4.75V 3 2 0 1 2 3 4 5 -100 VREF (V) -50 0 50 100 150 AMBIENT TEMPERATURE (°C) +5V +5V 3k DBN DBN 100pF 100pF DGND DGND b. High-Z to VOL Figure 1. Load Circuits for Data-Access Time Test 4 3k DBN DBN a. High-Z to VOH 900 POWER-SUPPLY CURRENT vs. TEMPERATURE (NOT INCLUDING REFERENCE LADDER) 2.0 3k 800 tp (ns) AMBIENT TEMPERATURE (°C) AMBIENT TEMPERATURE (°C) LINEARITY ERROR (LSB) 1.0 MX7824/28-5 -50 VDD = 5V VREF = 5V 1.5 0 0 2.480 MX7824/28-3 REFERENCE TEMPERATURE DRIFT (MAX154/MAX158 ONLY) REF OUT VOLTAGE (V) MX7824/MX7828 CMOS, High-Speed, 8-Bit ADCs with Multiplexer 3k 10pF 10pF DGND a. VOH to High-Z DGND b. VOL to High-Z Figure 2. Load Circuits for Data-Hold Time Test _______________________________________________________________________________________ CMOS, High-Speed, 8-Bit ADCs with Multiplexer PIN PIN NAME FUNCTION MAX154 MX7824 NAME FUNCTION MAX158 MX7828 1 AIN4 Analog Input Channel 4 1 AIN6 Analog Input Channel 6 2 AIN3 Analog Input Channel 3 2 AIN5 Analog Input Channel 5 3 AIN2 Analog Input Channel 2 3 AIN4 Analog Input Channel 4 4 AIN1 Analog Input Channel 1 4 AIN3 Analog Input Channel 3 5 REF OUT TP Reference Output (2.5V) for MAX154. Test point for MX7824. Do not connect. 5 AIN2 Analog Input Channel 2 6 AIN1 Analog Input Channel 1 6 DBO Three-State Data Output, bit 0 (LSB) 7 DB1 Three-State Data Output, bit 1 7 REF OUT TP 8 DB2 Three-State Data Output, bit 2 8 DB0 Three-State Data Output, bit 0 (LSB) 9 DB3 Three-State Data Output, bit 3 –—– Read Input. RD controls conversions and data access. See Digital Interface section. Interrupt Output. INT going low indicates the completion of a conversion. See Digital Interface section. 9 DB1 Three-State Data Output, bit 1 10 DB2 Three-State Data Output, bit 2 11 DB3 12 –—– RD Three-State Data Output, bit 3 –—– Read Input. RD controls conversions and data access. See Digital Interface section. Ground Lower Limit of Reference Span. Sets the zero-code voltage. Range: GND to VREF+. Upper Limit of Reference Span. Sets the full-scale input voltage. Range: VREF- to VDD. 13 INT Interrupt Output. INT going low indicates the completion of a conversion. See Digital Interface section. 14 GND 15 VREF- Ready Output. Open-drain output with no active pull-up device. Goes low –—– when CS goes low and high impedance at the end of a conversion. –—– Chip-Select Input. CS must be low for the device to be selected. 16 VREF+ 17 RDY 18 –—– CS 10 –—– RD 11 INT 12 GND 13 VREF- 14 VREF+ 15 RDY Reference Output (2.5V) for MAX158. Test point for MX7828. Do not connect. Ground Lower Limit of Reference Span. Sets the zero-code voltage. Range: GND to VREF+. Upper Limit of Reference Span. Sets the full-scale input voltage. Range: VREF- to VDD. Ready Output. Open-drain output with no active pull-up device. Goes low –—– when CS goes low and high impedance at the end of a conversion. –—– Chip-Select Input. CS must be low for the device to be selected. 16 –—– CS 17 DB4 Three-State Data Output, bit 4 18 DB5 Three-State Data Output, bit 5 19 DB6 Three-State Data Output, bit 6 19 DB4 Three-State Data Output, bit 4 20 DB7 Three-State Data Output, bit 7 (MSB) 20 DB5 Three-State Data Output, bit 5 21 A1 Channel Address 1 Input 21 DB6 Three-State Data Output, bit 6 22 A0 Channel Address 0 Input 22 DB7 Three-State Data Output, bit 7 (MSB) 23 NC No Connect 23 A2 Channel Address 2 Input 24 VDD Power-Supply Voltage, +5V 24 A1 Channel Address 1 Input 25 A0 Channel Address 0 Input 26 VDD Power-Supply Voltage, +5V 27 AIN8 Analog Input Channel 8 28 AIN7 Analog Input Channel 7 _______________________________________________________________________________________ 5 MX7824/MX7828 _____________________________________________________________Pin Descriptions MX7824/MX7828 CMOS, High-Speed, 8-Bit ADCs with Multiplexer _______________Detailed Description ___________________Digital Interface Converter Operation The MAX154/MAX158 and MX7824/MX7828 use only Chip Select (CS) and Read (RD) as control inputs. A READ operation, taking CS and RD low, latches the multiplexer address inputs and starts a conversion (Table 1). The MAX154/MAX158 and MX7824/MX7828 use what is commonly called a “half-flash” conversion technique (Figure 3). Two 4-bit flash ADC sections are used to achieve an 8-bit result. Using 15 comparators, the upper 4-bit MS (most significant) flash ADC compares the unknown input voltage to the reference ladder and provides the upper four data bits. An internal DAC uses the MS bits to generate an analog signal from the first flash conversion. A residue voltage representing the difference between the unknown input and the DAC voltage is then compared to the reference ladder by 15 LS (least significant) flash comparators to obtain the lower four output bits. Table 1. Truth Table for Input Channel Selection MAX154/MX7824 A1 A0 0 0 1 1 0 1 0 1 Operating Sequence The operating sequence is shown in Figure 4. A conversion is initiated by a falling edge of RD and CS. The comparator inputs track the analog input voltage for approximately 1µs. After this first cycle, the MS flash result is latched into the output buffers and the LS conversion begins. INT goes low approximately 600ns later, indicating the end of the conversion, and that the lower four bits are latched into the output buffers. The data can then be accessed using the CS and RD inputs. AIN1 REF OUT** 0 0 0 0 0 0 1 1 0 1 0 1 AIN1 AIN2 AIN3 AIN4 1 1 1 1 0 0 1 1 0 1 0 1 AIN5 AIN6 AIN7 AIN8 DB7 DB6 4-BIT FLASH ADC (4MSB) VREF- VREF+ 16 2.5V REF *MAX154/MX7824 – 4-Channel Mux MAX158/MX7828 – 8-Channel Mux ** REF OUT on MAX154/MAX158 only DB5 DB4 THREESTATE DRIVERS 4-BIT DAC MUX* AIN8 A1 A2 DB3 DB2 DB1 4-BIT FLASH ADC (4LSB) ADDRESS LATCH DECODE A0 DB0 TIMING AND CONTROL CIRCUITRY RDY CS INT RD Figure 3. Functional Diagram 6 SELECTED CHANNEL There are two interface modes, which are determined by the length of the RD input. Mode 0, implemented by keeping RD low until the conversion ends, is designed for microprocessors that can be forced into a WAIT state. In this mode, a conversion is started with a READ operation (taking CS and RD low), and data is read when the conversion ends. Mode 1, on the other hand, VREF+ AIN4 MAX158/MX7828 A2 A1 A0 _______________________________________________________________________________________ CMOS, High-Speed, 8-Bit ADCs with Multiplexer 500ns 1000ns SETUP TIME REQUIRED BY THE INTERNAL COMPARATORS PRIOR TO STARTING CONVERSION 600ns VIN IS SAMPLED AND THE FOUR MSBs ARE LATCHED VIN IS TRACKED BY INTERNAL COMPARATORS There are two status outputs: Interrupt (INT) and Ready (RDY). RDY, an open-drain output (no internal pull-up device), is connected to the processor’s READY/WAIT input. RDY goes low on the falling edge of CS and goes high impedance at the end of the conversion, when the conversion result appears on the data outputs. If the RDY output is not required, its external pull-up resistor can be omitted. INT goes low when the conversion is complete and returns high on the rising edge of CS or RD. Interface Mode 1 Figure 4. Operating Sequence does not require microprocessor WAIT states. A READ operation simultaneously initiates a conversion and reads the previous conversion result. Interface Mode 0 Figure 5 shows the timing diagram for Mode 0 operation. This is used with microprocessors that have WAIT state capability, whereby a READ instruction is extended to accommodate slow-memory devices. Taking CS and RD low latches the analog multiplexer address and starts a conversion. Data outputs DB0–DB7 remain in the high-impedance condition until the conversion is complete. Mode 1 is designed for applications where the microprocessor is not forced into a WAIT state. Taking CS and RD low latches the multiplexer address and starts a conversion (Figure 6). Data from the previous conversion is immediately read from the outputs (DB0–DB7). INT goes high at the rising edge of CS or RD and goes low at the end of the conversion. A second READ operation is required to read the result of this conversion. The second READ latches a new multiplexer address and starts another conversion. A delay of 2.5µs must be allowed between READ operations. RDY goes low on the falling edge of CS and goes high impedance at the rising edge of CS. If RDY is not needed, its external pull-up resistor can be omitted. CS tCSH tCSS tCSS RD tP tAS tAS ANALOG CHANNEL ADDRESS ADDR VALID ADDR VALID tAH RDY tRDY INT tINTH tCRD tACC2 HIGH IMPEDANCE DATA tDH DATA VALID Figure 5. Mode 0 Timing Diagram _______________________________________________________________________________________ 7 MX7824/MX7828 RD INT GOING LOW INDICATES THAT CONVERSION IS COMPLETE AND THAT DATA CAN BE READ MX7824/MX7828 CMOS, High-Speed, 8-Bit ADCs with Multiplexer CS tRD tCSS tCSH tCSS tCSH tRD RD tP tAS tAS ANALOG CHANNEL ADDRESS ADDR VALID ADDR VALID tAH tAH RDY tRDY tRDY tCRD tINTH INT tACCI tINTH tDH tDH tACCI OLD DATA DATA NEW DATA Figure 6. Mode 1 Timing Diagram _____________Analog Considerations OUTPUT CODE Reference and Input The VREF+ and VREF- inputs of the converter define the zero and the full-scale of the ADC. In other words, the voltage at VREF- is equal to the input voltage that produces an output code of all zeros, and the voltage at VREF+ is equal to input voltage that produces an output code of all ones (Figure 7). Figure 8 shows some possible reference configurations. For the MAX154/MAX158, a 0.01µF bypass capacitor to GND should be used to reduce the highfrequency output impedance of the internal reference. Larger capacitors should not be used, as this degrades the stability of the reference buffer. The 2.5V reference output is with respect to the GND pin. FULL-SCALE TRANSITION 11111111 11111110 11111101 1LSB = F8 = VREF+ - VREF256 256 00000011 00000010 VREF+ 00000001 Bypassing A 47µF electrolytic and 0.1µF ceramic capacitor should be used to bypass the VDD pin to GND. These capacitors must have minimum lead length, since excess lead length may contribute to conversion errors and instability. If the reference inputs are driven by long lines, they should be bypassed to GND with 0.1µF capacitors at the reference input pins. 8 00000000 VREF- 1 2 3 FS AIN INPUT VOLTAGE (IN TERMS OF LSBs) Figure 7. Transfer Function _______________________________________________________________________________________ FS–1LSB CMOS, High-Speed, 8-Bit ADCs with Multiplexer VIN AINx(-) GND VDD +5V REF OUT 0.1µF 47µF Input Current MAX154 MAX158 VREF+ 0.01µF VREF- Figure 8a. Internal Reference (MAX154/MAX158 only) AINx(+) VIN AINx(-) GND VDD +5V 0.1µF 2.5V 47µF MX584 MX7824 MX7828 VREF+ VREF- Figure 8b. External Reference +2.5V Full-Scale AINx(+) VIN AINx(-) GND Input Filtering MAX154 MAX158 VREF+ MX7824 MX7828 VDD +5V 0.1µF 47µF The converters’ analog inputs behave somewhat differently from conventional ADCs. The sampled data comparators take varying amounts of current from the input, depending on the cycle they are in. The equivalent circuit of the converter is shown in Figure 9a. When the conversion starts, AIN(n) is connected to the MS and LS comparators. Thus, AIN(n) is connected to thirty-one 1pF capacitors. To acquire the input signal in approximately 1µs, the input capacitors must charge to the input voltage through the on-resistance of the multiplexer (about 600Ω) and the comparator’s analog switches (2kΩ to 5kΩ per comparator). In addition, about 12pF of stray capacitance must be charged. The input can be modeled as an equivalent RC network shown in Figure 9b. As RS (source impedance) increases, the capacitors take longer to charge. Since the length of the input acquisition time is internally set, large source resistances (greater than 100Ω) will cause settling errors. The output impedance of an opamp is its open-loop output impedance divided by the loop gain at the frequency of interest. It is important that the amplifier driving the converter input have sufficient loop gain at approximately 1MHz to maintain low output impedance. VREF- Figure 8c. Power Supply as Reference The transients in the analog input caused by the sampled data comparators do not degrade the converter’s performance, since the ADC does not “look” at the input when these transients occur. The comparator’s outputs track the input during the first 1µs of the conversion, and are then latched. Therefore, at least 1µs will be provided to charge the ADC’s input capacitance. It is not necessary to filter these transients with an external capacitor on the AIN terminals. Sinusoidal Inputs * Current path must still exist from VIN(-) to Ground AINx(+) VIN GND VDD +5V 0.1µF VREF+ 47µF 2.5V VREF- AINx(-) * MAX154 MAX158 MX7824 MX7828 The MAX154/MAX158 and MX7824/MX7828 can measure input signals with slew rates as high as 157mV/µs to the rated specifications. This means that the analog input frequency can be as high as 10kHz without the aid of an external track/hold. The maximum sampling rate is limited by the conversion time (typical tCRD = 2µs) plus the time required between conversions (tp = 500ns). It is calculated as: fMAX = 1 1 = = 400kHz tCRD + tp (2.0 + 0.5) µs Figure 8d. Inputs Not Referenced to GND _______________________________________________________________________________________ 9 MX7824/MX7828 AINx(+) MX7824/MX7828 CMOS, High-Speed, 8-Bit ADCs with Multiplexer fMAX permits a maximum sampling rate of 50kHz per channel when using the MAX158/MX7828 and 100kHz per channel when using the MAX154/MX7824. These rates are well above the Nyquist requirement of 20kHz sampling rate for a 10kHz input bandwidth. Bipolar Input Operation The circuit in Figure 10a can be used for bipolar input operation. The input voltage is scaled by an amplifier so that only positive voltages appear at the ADC’s inputs. An external reference should be used for the MX7824/ MX7828, but is not needed with the MAX154/MAX158. The analog input range is ±4V and the output code is complementary offset binary. The ideal input/output characteristic is shown in Figure 10b. 3.57k 11.5Ω VIN 0.01µF CS AIN1 10.0k MAX154 MAX158 16.2k RDY RD 0.01µF VREF+ INT REF OUT +5V VDD DB0–DB7 VREF47µF 0.1µF RS AIN1 VIN CS 2pF RON RMUX CS 12pF GND ONLY CHANNEL 1 SHOWN 1pF 1pF • • • 15 LSB COMPARATORS TO LS LADDER Figure 10a. Bipolar ±4V Input Operation RON 1pF 1pF • • • 16 MSB COMPARATORS TO MS LADDER FS = 8V 1LSB = FS / 256 11111111 11111110 11111101 Figure 9a. Equivalent Input Circuit 10000010 10000001 +FS 2 10000000 01111111 RS VIN AIN1 B MUX 600Ω CS1 2pF 01111110 RON 350Ω CS2 2pF -FS + 1LSB 2 00000010 00000001 32pF 00000000 0V AIN INPUT VOLTAGE (LSBs) Figure 9b. RC Network Model 10 Figure 10b. Transfer Function for ±4V Input Operation ______________________________________________________________________________________ CMOS, High-Speed, 8-Bit ADCs with Multiplexer ADDRESS BUS VDD A0 EN MREQ ADDRESS DECODE A0 A1 A2* BANDPASS FILTER 1 6 BANDPASS FILTER 2 5 AIN2 AIN1 5V ZBO MX7824/MX7828 +5V 26 A15 MAX154 MAX158 RDY MX7824 MX7828 RD CS 5k WAIT RD 18 RD 12 MAX158 MX7828 AMP DB0–DB7 BANDPASS FILTER 7 28 A2 BANDPASS FILTER 8 +5V DATA AIN7 DB0–DB7 DATA BUS D0–D7 SPEECH INPUT CS 27 AIN8 16 VREF+ VREF15 A1 A0 23 24 25 GND 14 *A2 ON MAX158/MX7828 ONLY. Figure 12. Speech Analysis Using Real-Time Filtering Figure 11. Simple Mode 0 Interface SAMPLE PULSE +5V 24 VDD 16 CS 4 AIN1 3 AIN2 2 1 14 13 12 AIN3 AIN4 +15V 18 VDD 10 RD INT 11 15 VREF 4 WR MAX154 MX7824 VOUT A 2 MX7226 DB0–DB7 VOUT B 1 VOUT C DB0–DB7 VREF+ VOUT D VREF- A1 A0 GND 21 16 A1 22 17 A0 DGND AGND 20 19 6 5 VSS 3 A0 A1 Figure 13. 4-Channel Fast Sample and Infinite Hold ______________________________________________________________________________________ 11 MX7824/MX7828 CMOS, High-Speed, 8-Bit ADCs with Multiplexer _Ordering Information (continued) PART TEMP. RANGE PIN-PACKAGE MX7824LEAG -40°C to +85°C 24 SSOP ERROR (LSB) MX7824KEAG -40°C to +85°C 24 SSOP -40°C to +85°C 24 CERDIP ±1/2 MX7824BQ MX7824UQ MX7824TQ -40°C to +85°C -55°C to +125°C -55°C to +125°C 24 CERDIP 24 CERDIP 24 CERDIP ±1 ±1/2 ±1 MX7828LN MX7828KN MX7828LCWI 0°C to +70°C 0°C to +70°C 0°C to +70°C 28 Plastic DIP 28 Plastic DIP 28 Wide SO ±1/2 ±1 ±1/2 MX7828KCWI 0°C to +70°C 28 Wide SO MX7828LCAI 0°C to +70°C 28 SSOP ±1/2 MX7828KCAI 0°C to +70°C 28 SSOP ±1 MX7828LP 0°C to +70°C 28 PLCC ±1/2 0°C to +70°C 28 PLCC ±1 -40°C to +85°C 28 SSOP ±1/2 MX7828KP AIN4 AIN6 AIN8 (N.C.) (AIN2) (AIN4) AIN3 AIN5 AIN7 (N.C.) (AIN1) (AIN3) ±1/2 MX7824CQ MX7828LEAI ___________________Chip Topography VDD A0 ±1 ±1 MX7828KEAI -40°C to +85°C 28 SSOP MX7828CQ -40°C to +85°C 28 CERDIP ±1/2 ±1 MX7828BQ -40°C to +85°C 28 CERDIP ±1 MX7828UQ -55°C to +125°C 28 CERDIP ±1/2 MX7828TQ -55°C to +125°C 28 CERDIP ±1 A1 A2 (N.C.) AIN2 (N.C.) AIN1 (N.C.) TP (REF OUT) 0.127" (3.228mm) DB7 DB0 DB6 DB1 DB5 DB2 DB4 DB3 CS A0 GND VREF+ INT VREF- ADY 0.124" (3.150mm) ( ) ARE FOR MAX154/MX7824 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 © 1995 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. ANEXO A.4 – SAA1042 Order this document by SAA1042/D The SAA1042 drives a two–phase stepper motor in the bipolar mode. The device contains three input stages, a logic section and two output stages. The IC is contained in a 16 pin dual–in–line heat tab plastic package for improved heatsinking capability. The center four ground pins are connected to the copper alloy heat tab and improve thermal conduction from the die to the circuit board. • Drive Stages Designed for Motors: 6.0 V and 12 V: SAA1042V • • • • • • • STEPPER MOTOR DRIVER SEMICONDUCTOR TECHNICAL DATA 500 mA/Coil Drive Capability Built–In Clamp Diodes for Overvoltage Suppression Wide Logic Supply Voltage Range Accepts Commands for CW/CCW and Half/Full Step Operation Inputs Compatible with Popular Logic Families: MOS, TTL, DTL Set Input Defined Output State Drive Stage Bias Adaptable to Motor Power Dissipation for Optimum Efficiency 16 1 V SUFFIX PLASTIC PACKAGE CASE 648C PIN CONNECTIONS L2 1 16 L3 VD 2 15 VM L1 3 14 L4 4 13 5 12 Set/ Driver Bias Clock 6 11 VCC 7 10 CW/CCW Full/Half Step 8 9 Figure 1. Representative Block Diagram VZ VCC VM 15 11 Gnd VD 2 3 7 L1 Clock Driver M 1 10 CW/CCW L2 Gnd Gnd (Top View) Logic 16 L3 8 Full/ Half Step Driver 14 L4 ORDERING INFORMATION 9 Gnd 6 Driver Bias RB Set Device Operating Temperature Range Package SAA1042V TJ = – 30° to +125°C Plastic DIP A Motorola, Inc. 1996 MOTOROLA ANALOG IC DEVICE DATA Rev 2 1 SAA1042 MAXIMUM RATINGS (TA = 25°C, unless otherwise noted.) Symbol SAA1042V Unit Clamping Voltage (Pins 1, 3, 14, 16) Rating Vclamp 20 V Over Voltage (VOV = Vclamp – VM) VOV 6.0 V Supply Voltage VCC 20 V Switching or Motor Current/Coil Input Voltage (Pins 7, 8, 10) IM 500 mA Vin clock Vin Full/Half Vin CW/CCW VCC V PD θJA θJC 2.0 80 15 W °C/W TJ –30 to +125 °C Tstg –65 to +150 °C Power Dissipation (Note 1) Thermal Resistance, Junction–to–Air Thermal Resistance, Junction–to–Case Operating Junction Temperature Range Storage Temperature Range NOTE: 1. The power dissipation (PD) of the circuit is given by the supply voltage (VM and VCC) and the motor current (IM), and can be determined from Figures 3 and 5. PD = Pdrive – Plogic. ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise noted.) Characteristics Pin(s) Symbol VCC Min Typ Max Unit Supply Current 11 ICC 5.0 V 20 V — — — — 3.5 8.5 mA Motor Supply Current (IPin 6 = –400 µA, Pins 1, 3, 14, 16 Open) VM = 6.0 V VM = 12 V VM = 24 V 15 IM Input Voltage, High State 7, 8, 10 Input Voltage, Low State Input Reverse Current, High State (Vin = VCC) 7, 8, 10 Input Forward Current, Low State (Vin = Gnd) mA 5.0 V 5.0 V 5.0 V — — — 25 30 40 — — — VIH 5.0 V 10 V 15 V 20 V 2.0 7.0 10 14 — — — — — — — — VIL 5.0 V 10 V 15 V 20 V — — — — — — — — 0.8 1.5 2.5 3.5 IIR 5.0 V 10 V 15 V 20 V — — — — — — — — 2.0 2.0 3.0 5.0 IIF 5.0 V 10 V 15 V 20 V –10 –25 –40 –50 — — — — — — — — VOH 5.0 – 20 V — — VM – 2.0 VM – 1.2 — — — — 0.7 0.2 — — V µA Output Voltage, High State (VM = 12 V) Iout = –500 mA Iout = –50 mA Output Voltage, Low State Iout = 500 mA Iout = 50 mA 1, 3, 14, 16 Output Leakage Current, Pin 6 = Open (VM = VD = Vclamp max) 1, 3, 14, 16 IDR 5.0 – 20 V –100 — — µA Clamp Diode Forward Voltage (Drop at IM = 500 mA) 2 — — 2.5 3.5 V Clock Frequency 7 VF fc 5.0 – 20 V 0 — 50 kHz Clock Pulse Width 7 tw 5.0 – 20 V 10 — — µs Set Pulse Width 6 ts — 10 — — µs Set Control Voltage, High State Set Control Voltage, Low State 6 — — VM — — — — 0.5 V 2 VOL 5.0 – 20 V V MOTOROLA ANALOG IC DEVICE DATA SAA1042 INPUT/OUTPUT FUNCTIONS Clock — (Pin 7) This input is active on the positive edge of the clock pulse and accepts Logic ‘1’ input levels dependent on the supply voltage and includes hysteresis for noise immunity. CW/CCW — (Pin 10) This input determines the motor’s rotational direction. When the input is held low, (OV, see the electrical characteristics) the motor’s direction is nominally clockwise (CW). When the input is in the high state, Logic ‘1’, the motor direction is nominally counter clockwise (CCW), depending on the motor connections. Full/Half Step — (Pin 8) This input determines the angular rotation of the motor for each clock pulse. In the low state, the motor will make a full step for each applied clock pulse, while in the high state, the motor will make half a step. VD — (Pin 2) This pin is used to protect the outputs (1, 3,14, 16) where large positive spikes occur due to switching the motor coils. The maximum allowable voltage on these pins is the clamp voltage (Vclamp). Motor performance is improved if a zener diode is connected between Pin 2 and 15, as shown in Figure 1. The following conditions have to be considered when selecting the zener diode: Vclamp = VM + 6.0 V VZ = Vclamp – VM – VF where: VF = clamp diodes forward voltage drop VF = (see Figure 4) Vclamp: ≤ 20 V for SAA1042V ≤ 30 V for Vclamp: SAA1042AV Pins 2 and 15 can be linked, in this case VZ = 0 V. Set/Bias Input — (Pin 6) This input has two functions: 1) The resistor RB adapts the drivers to the motor current. 2) A pulse via the resistor RB sets the outputs (1, 3, 14, 16) to a defined state. The resistor RB can be determined from the graph of Figure 2 according to the motor current and voltage. Smaller values of RB will increase the power dissipation of the circuit and larger values of RB may increase the saturation voltage of the driver transistors. When the “set” function is not used, terminal A of the resistor RB must be grounded. When the set function is used, terminal A has to be connected to an open–collector (buffer) circuit. Figure 7 shows this configuration. The buffer circuit (off–state) has to sustain the motor voltage (VM). When a MOTOROLA ANALOG IC DEVICE DATA pulse is applied via the buffer and the bias resistor (RB), the motor driver transistors are turned off during the pulse and after the pulse has ended, the outputs will be in defined states. Figure 6 shows the Timing Diagram. Figure 7 illustrates a typical application in which the SAA1042 drives a 12 V stepper motor with a current consumption of 200 mA/coil. A bias resistor (RB) of 56 kΩ is chosen according to Figure 2. The maximum voltage permitted at the output pin is VM + 6.0 V (see Maximum Ratings table), in this application VM = 12 V, therefore the maximum voltage is 18 V. The outputs are protected by the internal diodes and an external zener connected between Pins 2 and 15. From Figure 4, it can be seen that the voltage drop across the internal diodes is about 1.7 V at 200 mA. This results in a zener voltage between Pins 2 and 15 of: VZ = 6.0 V – 1.7 V = 4.3 V. To allow for production tolerances and a safety margin, a 3.9 V zener has been chosen for this example. The clock is derived from the line frequency which is phase–locked by the MC14046B and the MC14024. The voltage on the clock input is normally low (Logic ‘0’). The motor steps on the positive going transition of the clock pulse. The Logic ‘0’ applied to the Full/Half input (Pin 8) operates the motor in Full Step mode. A Logic ‘1’ at this input will result in Half Step mode. The logic level state on the CW/CCW input (Pin 10), and the connection of the motor coils to the outputs determines the rotational direction of the motor. These two inputs should be biased to a Logic ‘0’ or ‘1’ and not left floating. In the event of non–use, they should be tied to ground or the logic supply line, VCC. The output drivers can be set to a fixed operating point by use of the Set input and a bias resistor, RB. A positive pulse to this input turns the drivers off and sets the logic state of the outputs. After the negative going transition of the Set pulse, and until the first positive going transition of the clock, the outputs will be: L1 = L3 = high and L2 = L4 = low, (see Figure 6). The Set input can be driven by a MC14007B or a transistor whose collector resistor is RB. If the input is not used, the bottom of RB must be grounded. The total power dissipation of the circuit can be determined from Figures 3 and 5: PD = 0.9 W + 0.08 W = 0.98 W. The junction temperature can then be computed using Figure 8. 3 SAA1042 Figure 2. Bias Resistor RB versus Motor Current Figure 3. Drive Stage Power Dissipation 500 DRIVE STAGE POWER DISSIPATION (W) R B BIAS RESISTOR (k Ω ) 300 200 VM = 12 V 100 70 VM = 24 V 50 VM = 6.0 V 30 20 10 0 20 30 40 50 60 80 100 200 5.0 4.0 3.0 VM = 24 V VM = 12 V VM = 6.0 V 2.0 1.0 0.7 0.5 0.3 0.2 0.1 300 400 500 20 0 MOTOR CURRENT/COIL (mA) Figure 4. Clamp Diode Forward Current versus Forward Voltage 30 50 70 100 200 MOTOR CURRENT/COIL (mA) 300 400 500 Figure 5. Power Dissipation versus Logic Supply Voltage 500 500 PD , POWER DISSIPATION (mV) FORWARD CURRENT (mA) 300 400 200 300 100 200 100 70 50 30 20 10 0 0 1.0 2.0 3.0 4.0 5.0 0 5.0 VF , FORWARD VOLTAGE (V) 10 15 20 25 VCC , SUPPLY VOLTAGE (V) Figure 6. Timing Diagram Full Step Motor Drive Mode. Full/Half Step Input = 0 Clock Set CW/CCW L1 L2 L3 L4 Don’t Care High Output Impedance Half Step Motor Drive Mode. Full/Half Step Input = 1 Clock Set CW/CCW L1 L2 L3 L4 4 MOTOROLA ANALOG IC DEVICE DATA SAA1042 Figure 7. Typical Application Selectable Step Rates with the Time Base Derived from the Line Frequency 220 k 14 16 MC14046B 14 50 Hz 0.1 µF Phase Comp 1 5 4 VCO 2 3 9 11 6 MC14024 15 220 V 1 7 3 2 4.7 nF Steps/Sec 12.5 100 9 200 7 12 11 15 8 Full Half 25 4 5 6 11 82 k 8.2 µF 12 V 12 V VZ = 3.9 V 12 V 50 Clock 7 SAA1042 12 V 2 3 1 M 16 400 CW CCW 800 10 9 120 k 14 6 RB 56 k f0 = 1400 Hz Set Input 3 Set 5 MC14007 100 5.0 JUNCTION–TO–AIR (° C/W) R θJA , THERMAL RESISTANCE Printed circuit board heatsink example 80 L RθJA 60 4.0 2.0 oz Copper L 3.0 mm Graph represents symmetrical layout 3.0 40 2.0 1.0 PD(max) for TA = 70°C 20 0 0 MOTOROLA ANALOG IC DEVICE DATA 10 30 20 L, LENGTH OF COPPER (mm) 40 50 0 PD(max), MAXIMUM POWER DISSIPATION (W) Figure 8. Thermal Resistance and Maximum Power Dissipation versus P.C.B. Copper Length 5 SAA1042 OUTLINE DIMENSIONS V SUFFIX PLASTIC PACKAGE CASE 648C–03 ISSUE C NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. INTERNAL LEAD CONNECTION BETWEEN 4 AND 5, 12 AND 13. –A– 16 9 1 8 –B– L NOTE 5 C –T– M N SEATING PLANE F E J G D 16 PL 0.13 (0.005) 16 PL 0.13 (0.005) T A M M T B DIM A B C D E F G J K L M N INCHES MIN MAX 0.740 0.840 0.240 0.260 0.145 0.185 0.015 0.021 0.050 BSC 0.040 0.70 0.100 BSC 0.008 0.015 0.115 0.135 0.300 BSC 0_ 10_ 0.015 0.040 MILLIMETERS MIN MAX 18.80 21.34 6.10 6.60 3.69 4.69 0.38 0.53 1.27 BSC 1.02 1.78 2.54 BSC 0.20 0.38 2.92 3.43 7.62 BSC 0_ 10_ 0.39 1.01 S S Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315 MFAX: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 6 ◊ *SAA1042/D* MOTOROLA ANALOG IC DEVICE DATA SAA1042/D ANEXO A.5 – 7805 LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) 3-TERMINAL 1A POSITIVE VOLTAGE REGULATORS TO-220 The LM78XX series of three-terminal positive regulators are available in the TO-220/D-PAK package and with several fixed output voltages, making them useful in a wide range of applications. Each type employs internal current limiting, thermal shut-down and safe area protection, making it essentially indestructible. If adequate heat sinking is provided, they can deliver over 1A output current. Although designed primarily as fixed voltage regulators, these devices can be used with external components to obtain adjustable voltages and currents. D-PAK 1 FEATURES • • • • • 1: Input 2: GND 3: Output Output Current up to 1A Output Voltages of 5, 6, 8, 9, 10, 11, 12, 15, 18, 24V Thermal Overload Protection Short Circuit Protection Output Transistor SOA Protection ORDERING INFORMATION Device Output Voltage Tolerance KA78XXCT ± 4% KA78XXAT ± 2% KA78XXIT KA78XXR Packag e TO-220 ± 2% KA78XXIR ± 4% 0 ~ +125 °C -40 ~ +125 °C ± 4% KA78XXAR Operating Temperature D-PAK 0 ~ +125 °C -40 ~ +125 °C BLOCK DIAGRAM Rev. B 1999 Fairchild Semiconductor Corporation LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) ABSOLUTE MAXIMUM RATINGS (TA = +25°C, unless otherwise specified) Characteristic Symbol Value Unit VI VI 35 40 V V Input Voltage (for VO = 5V to 18V) (for VO = 24V) Thermal Resistance Junction-Cases RθJC 5 °C/W Thermal Resistance Junction-Air RθJA 65 Operating Temperature Range KA78XX/A/R/RA KA78XXI/RI TOPR 0 ~ +125 -40 ~ +125 °C/W °C °C Storage Temperature Range TSTG -65 ~ +150 °C LM7805/I/R/RI ELECTRICAL CHARACTERISTICS (Refer to test circuit, TMIN < TJ < TMAX, IO = 500mA, VI = 10V, CI= 0.33µF, CO= 0.1µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage Line Regulation Load Regulation Quiescent Current Quiescent Current Change Output Voltage Drift VO ∆VO ∆VO IQ ∆IQ ∆VO/∆T VN 5.0mA ≤ IO ≤1.0A, PO ≤ 15W VI = 7V to 20V VI = 8V to 20V VO = 7V to 25V TJ=+25°C VI = 8V to 12V TJ=+25°C 4.0 100 50 1.6 50 IO = 5.0mA to1.5A 9 100 9 100 IO =250mA to 750mA 4 50 4 50 5.0 8 5.0 8 TJ =+25 °C IO = 5mA to 1.0A VI= 7V to 25V 0.03 0.5 VI= 8V to 25V IO= 5mA 0.3 -0.8 Short Circuit Current ISC Peak Current IPK VO 4.75 5.0 5.25 100 RO RR V 1.6 Output Resistance Ripple Rejection Dropout Voltage Unit 4.75 5.0 5.25 4.0 f = 10Hz to 100Khz, TA=+25 °C f = 120Hz VO = 8 to 18V IO = 1A, TJ =+25 °C f = 1KHz Output Noise Voltage LM7805I LM7805 Min Typ Max Min Typ Max 4.8 5.0 5.2 4.8 5.0 5.2 0.03 0.5 0.3 1.3 73 mV mA mA 1.3 42 62 mV 62 -0.8 mV/ °C 42 µV/Vo 73 dB 2 2 V 15 15 VI = 35V, TA =+25 °C 230 230 mΩ mA TJ =+25 °C 2.2 2.2 A * TMIN <TJ <TMAX LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C LM78XX/R: TMIN= 0 °C, TMAX= +125 °C * Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7806/I/R/RI ELECTRICAL CHARACTERISTICS (Refer to test circuit, TMIN <TJ <TMAX, IO=500mA, VI= 11V CI= 0.33µF, CO= 0.1µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage VO Line Regulation ∆VO Load Regulation ∆VO Quiescent Current Quiescent Current Change Output Voltage Drift Output Noise Voltage Ripple Rejection Dropout Voltage IQ ∆IQ ∆VO/∆T VN RR 5.0mA ≤ IO ≤1.0A, PD ≤ 15W VI = 8.0V to 21V VI = 9.0V to 21V VI = 8V to 25V TJ=+25 °C VI = 9V to 13V IO =5mA to 1.5A TJ=+25 °C IO =250mA to750A Min 5.75 Min 5.75 LM7806 Typ Max 6.0 6.25 Unit V 5.7 5.7 TJ =+25 °C IO = 5mA to 1A VI = 8V to 25V 6.0 6.3 5 1.5 9 3 5.0 120 60 120 60 8 6.0 6.3 5 1.5 9 3 5.0 120 60 120 60 8 0.5 VI = 9V to 25V IO = 5mA f = 10Hz to 100Khz, TA =+25 °C f = 120Hz VI = 9V to 19V LM7806I Typ Max 6.0 6.25 0.5 1.3 mV mV mA mA 1.3 59 -0.8 -0.8 mV/ °C 45 45 µV/VO 75 dB 75 59 Output Resistance RD IO = 1A, TJ =+25 °C f = 1KHz Short Circuit Current ISC VI= 35V, TA=+25°C 250 250 mΩ mA Peak Current IPK TJ =+25 °C 2.2 2.2 A VD 2 2 V 19 19 * T MIN <TJ <TMAX LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C LM78XX/R: TMIN= 0 °C, TMAX= +125 °C * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7808/I/R/RI ELECTRICAL CHARACTERISTICS (Refer to test Circuit, TMIN <TJ< TMAX, IO = 500mA, VI = 14V, CI = 0.33µF, CO= 0.1µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage VO Line Regulation ∆VO Load Regulation ∆VO Quiescent Current Quiescent Current Change Output Voltage Drift Output Noise Voltage Ripple Rejection Dropout Voltage IQ ∆IQ ∆VO/∆T VN 5.0mA ≤ IO ≤ 1.0A, PO ≤ 15W VI = 10.5V to 23V VI = 11.5V to 23V TJ =+ 25°C VI = 10.5V to 25V VI = 11.5V to 17V I = 5.0mA to 1.5A TJ = +25°C O IO= 250mA to 750mA LM7808I Min Typ Max 7.7 8.0 8.3 Min 7.7 LM7808 Typ Max 8.0 8.3 Unit V 7.6 7.6 8.0 8.4 8.0 8.4 TJ =+25 °C IO = 5mA to 1.0A VI = 10.5A to 25V 5.0 2.0 10 5.0 5.0 160 80 160 80 8 5.0 2.0 10 5.0 5.0 160 80 160 80 8 mA 0.05 0.5 0.05 0.5 0.5 1.0 mA VI = 11.5V to 25V IO = 5mA 0.5 -0.8 1.0 f = 10Hz to 100Khz, TA =+25 °C RR f = 120Hz, VI= 11.5V to 21.5 VD 52 56 73 56 mV mV -0.8 mV/ °C 52 µV/Vo 73 dB 2 V RO IO = 1A, TJ=+25 °C f = 1KHz 2 Output Resistance 17 17 Short Circuit Current ISC VI= 35V, TA =+25 °C 230 230 mΩ mA Peak Current IPK TJ =+25 °C 2.2 2.2 A * T MIN <TJ <TMAX LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C LM78XX/R: TMIN= 0 °C, TMAX= +125 °C * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7809/I/R/RI ELECTRICAL CHARACTERISTICS (Refer to test circuit. TMIN < TJ <TMAX, IO= 500mA, VI= 15V, CI = 0.33µF, CO = 0.1µF. unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage VO Line Regulation ∆VO Load Regulation ∆VO Quiescent Current Quiescent Current Change Output Voltage Drift Output Noise Voltage Ripple Rejection Dropout Voltage IQ ∆IQ ∆VO/∆T VN RR 5.0mA ≤ IO ≤1.0A, PD ≤15W VI= 11.5V to 24V VI = 12.5V to 24V VI = 11.5V to 25V TJ=+25 °C VI = 12V to 25v IO = 5mA to 1.5A TJ=+25 °C IO = 250mA to 750mA LM7809I LM7809 Min Typ Max Min Typ Max 8.65 9.35 8.65 9 9.35 8.6 9 9.4 6 2 12 4 5.0 180 90 180 90 8 V 8.6 TJ=+25 °C IO = 5mA to 1.0A VI = 11.5V to 26V 9 9.4 6 2 12 4 5.0 180 90 180 90 8 0.5 VI = 12.5V to 26V IO = 5mA f = 10Hz to 100Khz, TA =+25 °C f = 120Hz VI = 13V to 23V 9 Unit 0.5 1.3 mV mV mA mA 1.3 56 -1 -1 mV/ °C 58 58 µV/VO 71 dB 71 56 2 V RO IO = 1A, TJ=+25 °C f = 1KHz 2 Output Resistance 17 17 Short Circuit Current ISC VI= 35V, TA =+25 °C 250 250 mΩ mA Peak Current IPK TJ= +25 °C 2.2 2.2 A VD * T MIN <TJ <TMAX LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C LM78XX/R: TMIN= 0 °C, TMAX= +125 °C * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7810/I/R/RI ELECTRICAL CHARACTERISTICS (Refer to test circuit, TMIN <TJ <TMAX, IO= 500mA, VI =16V, CI = 0.33µF, CO= 0.1µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage VO Line Regulation ∆VO Load Regulation ∆VO Quiescent Current IQ Quiescent Current Change Output Voltage Drift Output Noise Voltage Ripple Rejection Dropout Voltage ∆IQ ∆VO/∆T VN RR 5.0mA ≤ IO≤1.0A, PD ≤15W VI = 12.5V to 25V VI= 13.5V to 25V VI = 12.5V to 25V TJ =+25°C VI = 13V to 25V I = 5mA to 1.5A TJ =+25°C O IO = 250mA to 750mA LM7810I Min Typ Max 9.6 10 10.4 Unit V 9.5 9.5 TJ =+25 °C IO = 5mA to 1.0A VI = 12.5V to 29V 10 10.5 10 3 12 4 5.1 200 100 200 400 8 10 10.5 10 3 12 4 5.1 200 100 200 400 8 mA 0.5 1.0 mA 0.5 VI = 13.5V to 29V IO = 5mA f = 10Hz to 100Khz, TA =+25 °C f = 120Hz VI = 13V to 23V LM7810 Min Typ Max 9.6 10 10.4 mV mV 1.0 56 -1 -1 mV/ °C 58 58 µV/Vo 71 dB 71 56 Output Resistance RO IO = 1A, TJ=+25 °C f = 1KHz 17 17 Short Circuit Current ISC VI = 35V, TA=+25 °C 250 250 mΩ mA Peak Current IPK TJ =+25 °C 2.2 2.2 A VD 2 2 V * T MIN <TJ <TMAX LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C LM78XX/R: TMIN= 0 °C, TMAX= +125 °C * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7811/I/R/RI ELECTRICAL CHARACTERISTICS (Refer to test circuit, TMIN<TJ<TMAX, IO = 500mA, VI=18V, CI=0.33µF, CO = 0.IµF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage VO Line Regulation ∆VO Load Regulation ∆VO Quiescent Current IQ Quiescent Current Change Output Voltage Drift Output Noise Voltage Ripple Rejection Dropout Voltage ∆IQ ∆VO/∆T VN RR 5.0mA ≤ IO ≤1.0A, PD ≤15W VI = 13.5V to 26V VI= 14.5V to 26V V = 13.5V to 25V TJ =+25°C I VI = 14V to 21V I = 5.0mA to 1.5A TJ =+25°C O IO = 250mA to 750mA LM7811I Min Typ Max 10.6 11 11.4 Unit V 10.5 10.5 TJ =+25 °C IO = 5mA to 1.0A VI = 13.5V to 29V 11 11.5 10 3.0 12 4 5.1 220 110 220 110 8 11 11.5 10 3 12 4 5.1 220 110 220 110 8 mA 0.5 1.0 mA 0.5 VI = 14.5V to 29V IO = 5mA f = 10Hz to 100Khz, TA =+25 °C f = 120Hz VI = 14V to 24V LM7811 Min Typ Max 10.6 11 11.4 mV mV 1.0 55 -1 -1 mV/ °C 70 70 µV/VO 71 dB 71 55 2 V RO IO = 1A, TJ=+25 °C f = 1KHz 2 Output Resistance 18 18 Short Circuit Current ISC VI = 35V, TA=+25 °C 250 250 mΩ mA Peak Current IPK TJ =+25 °C 2.2 2.2 A VD * T MIN <TJ <TMAX LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C LM78XX/R: TMIN= 0 °C, TMAX= +125 °C * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7812/I/R/RI ELECTRICAL CHARACTERISTICS (Refer to test circuit, TMIN <TJ <TMAX, IO=500mA, VI=19V, CI= 0.33µF, CO= 0.1.µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage VO Line Regulation ∆VO Load Regulation ∆VO Quiescent Current IQ Quiescent Current Change Output Voltage Drift Output Noise Voltage Ripple Rejection Dropout Voltage ∆IQ ∆VO/∆T VN RR 5.0mA ≤ IO≤1.0A, PD≤15W VI = 14.5V to 27V VI= 15.5V to 27V VI = 14.5V to 30V TJ =+25°C VI = 16V to 22V I = 5mA to 1.5A TJ =+25°C O IO = 250mA to 750mA LM7812I Min Typ Max 11.5 12 12.5 f = 10Hz to 100Khz, TA =+25 °C f = 120Hz VI = 15V to 25V Unit V 11.4 11.4 TJ =+25 °C IO = 5mA to 1.0A VI = 14.5V to 30V VI = 15V to 30V IO = 5mA LM7812 Min Typ Max 11.5 12 12.5 12 12.6 12 12.6 10 3.0 11 5.0 5.1 240 120 240 120 8 10 3.0 11 5.0 5.1 240 120 240 120 8 mA 0.1 0.5 0.1 0.5 0.5 1.0 mA mV mV 1.0 0.5 55 -1 -1 76 76 mV/ °C mV/VO 71 dB 71 55 Output Resistance RO IO = 1A, TJ=+25 °C f = 1KHz 18 18 Short Circuit Current ISC VI = 35V, TA=+25 °C 230 230 mΩ mA Peak Current IPK TJ = +25 °C 2.2 2.2 A VD 2 2 V T MIN <TJ <TMAX LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C LM78XX/R: TMIN= 0 °C, TMAX= +125 °C * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7815/I/R/RI ELECTRICAL CHARACTERISTICS (Refer to test circuit, TMIN<TJ<TMAX, IO =500mA, VI =23V, CI =0.33µF, CO =0.1µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage VO Line Regulation ∆VO Load Regulation ∆VO Quiescent Current IQ Quiescent Current Change Output Voltage Drift Output Noise Voltage Ripple Rejection Dropout Voltage ∆IQ ∆VO/∆T VN RR LM7815I Min Typ Max 14.4 15 15.6 5.0mA ≤ IO≤1.0A, PD≤15W 14.2 VI = 17.5V to 30V 5 VI= 18.5V to 30V VI = 17.5V to 30V TJ =+25°C VI = 20V to 26V IO = 5mA to 1.5A TJ =+25°C IO = 250mA to 750mA TJ =+25 °C IO = 5mA to 1.0A VI = 17.5V to 30V LM7815 Typ Max 15 15.6 Unit V 15 11 3 12 4 5.2 15.75 14.25 300 150 300 150 8 15 15.75 11 3 12 4 5.2 300 150 300 150 8 0.5 VI = 18.5V to 30V IO = 5mA f = 10Hz to 100Khz, TA =+25 °C f = 120Hz VI = 18.5V to 28.5V Min 14.4 0.5 1.0 mV mV mA mA 1.0 54 -1 -1 mV/ °C 90 90 µV/VO 70 dB 70 54 2 V RO IO = 1A, TJ=+25 °C f = 1KHz 2 Output Resistance 19 19 Short Circuit Current ISC VI = 35V, TA=+25 °C 250 250 mΩ mA Peak Current IPK TJ =+25 °C 2.2 2.2 A VD * T MIN <TJ <TMAX LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C LM78XX/R: TMIN= 0 °C, TMAX= +125 °C * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7818/I/R/RI ELECTRICAL CHARACTERISTICS (Refer to test circuit, TMIN<TJ<TMAX, IO =500mA, VI =27V, CI =0.33µF, CO =0.1µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage VO Line Regulation ∆VO Load Regulation ∆VO Quiescent Current IQ Quiescent Current Change Output Voltage Drift Output Noise Voltage Ripple Rejection Dropout Voltage ∆IQ ∆VO/∆T VN RR 5.0mA ≤ IO ≤1.0A, PD ≤15W VI = 21V to 33V VI= 22V to 33V VI = 21V to 33V TJ =+25°C VI = 24V to 30V IO = 5mA to 1.5A TJ =+25°C IO = 250mA to 750mA LM7818I Min Typ Max 17.3 18 18.7 Unit V 17.1 17.1 TJ =+25 °C IO = 5mA to 1.0A VI = 21V to 33V 18 18.9 15 5 15 5.0 5.2 360 180 360 180 8 18 18.9 15 5 15 5.0 5.2 360 180 360 180 8 mA 0.5 1 mA 0.5 VI = 22V to 33V IO = 5mA f = 10Hz to 100Khz, TA =+25 °C f = 120Hz VI = 22V to 32V LM7818 Min Typ Max 17.3 18 18.7 mV mV 1.0 53 -1 -1 mV/ °C 110 110 µV/VO 69 dB 69 53 2 V RO IO = 1A, TJ=+25 °C f = 1KHz 2 Output Resistance 22 22 Short Circuit Current ISC VI = 35V, TA=+25 °C 250 250 mΩ mA Peak Current IPK TJ =+25 °C 2.2 2.2 A VD * T MIN <TJ <TMAX LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C LM78XX/R: TMIN= 0 °C, TMAX= +125 °C * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7824/I/R/RI ELECTRICAL CHARACTERISTICS (Refer to test circuit, TMIN<TJ<TMAX, IO = 500mA, VI = 33V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage VO Line Regulation ∆VO Load Regulation ∆VO Quiescent Current IQ Quiescent Current Change Output Voltage Drift Output Noise Voltage Ripple Rejection Dropout Voltage ∆IQ ∆VO/∆T VN RR 5.0mA ≤ IO ≤ 1.0A, PD ≤ 15W VI = 27V to 38V VI= 28V to 38V VI = 27V to 38V TJ =+25°C VI = 30V to 36V I = 5mA to 1.5A TJ =+25°C O IO = 250mA to 750mA LM7824I Min Typ Max 23 24 25 LM7824 Min Typ Max 23 24 25 Unit V 22.8 22.8 24 25.25 24 25.2 17 6 15 5.0 5.2 480 240 480 240 8 17 6 15 5.0 5.2 480 240 480 240 8 mA 0.1 0.5 0.1 0.5 0.5 1 mA VI = 28V to 38V IO = 5mA 0.5 -1.5 1 f = 10Hz to 100KHz, TA =+25 °C f = 120Hz VI = 28V to 38V 160 TJ =+25 °C IO = 5mA to 1.0A VI = 27V to 38V 50 67 50 mV mV -1.5 mV/ °C 60 µV/VO 67 dB 2 V RO IO = 1A, TJ=+25 °C f = 1KHz 2 Output Resistance 28 28 Short Circuit Current ISC VI = 35V, TA=+25 °C 230 230 mΩ mA Peak Current IPK TJ =+25 °C 2.2 2.2 A VD * T MIN <TJ <TMAX LM78XXI/RI: TMIN= - 40 °C, TMAX = +125 °C LM78XX/R: TMIN= 0 °C, TMAX= +125 °C * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7805A/RA ELECTRICAL CHARACTERISTICS (Refer to the test circuits. TJ = 0 to +I25 °C, IO = 1A, V I = 10V, C I= 0.33µF, C O= 0.1µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage Line Regulation VO ∆VO IO = 5mA to 1A, PD ≤ 5W VI = 7.5 to 20V VI = 7.5 to 25V IO = 500mA VI = 8V to 12V TJ =+25 °C Load Regulation ∆VO Quiescent Current IQ Quiescent Current Change ∆IQ VI= 7.3V to 25V VI= 8V to 12V TJ =+25 °C IO = 5mA to 1.5A IO = 5mA to 1A IO = 250 to 750mA TJ =+25 °C IO = 5mA to 1A VI = 8 V to 25V, IO = 500mA Min Typ Max 4.9 5 5.1 4.8 5 5.2 5 50 3 50 5 1.5 9 50 25 100 9 4 5.0 100 50 6 mA 0.5 0.8 mA VI = 7.5V to 20V, TJ =+25 °C Output Voltage Drift Output Noise Voltage Ripple Rejection ∆V/∆T VN RR IO = 5mA f = 10Hz to 100KHz TA =+25 °C f = 120Hz, IO = 500mA VI = 8V to 18V Unit V V V 0.8 -0.8 mV/ °C 10 µV/VO 68 dB 2 V RO IO = 1A, TJ =+25 °C f = 1KHz 17 Short Circuit Current ISC VI= 35V, TA =+25 °C 250 mΩ mA Peak Current IPK TJ= +25 °C 2.2 A Dropout Voltage VD Output Resistance *Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7806A/RA ELECTRICAL CHARACTERISTICS (Refer to the test circuits. TJ = 0 to+150 °C, IO = 1A, V I = 11V, C I= 0.33µF, C O= 0.1µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage Line Regulation VO ∆VO IO = 5mA to 1A, PD ≤ 15W VI = 8.6 to 21V VI= 8.6 to 25V IO = 500mA VI= 9V to 13V TJ =+25 °C Load Regulation ∆VO Quiescent Current IQ Quiescent Current Change Output Voltage Drift VI= 8.3V to 21V VI= 9V to 13V TJ =+25 °C IO = 5mA to 1.5A IO = 5mA to 1A IO = 250 to 750mA ∆IQ TJ =+25 °C IO = 5mA to 1A VI = 9V to 25V, IO = 500mA ∆V/∆T VI= 8.5V to 21V, TJ =+25 °C IO = 5mA Output Noise Voltage VN Ripple Rejection RR f = 10Hz to 100KHz TA =+25 °C f = 120Hz, IO = 500mA VI = 9V to 19V Min Typ Max 5.58 6 6.12 Unit 5.76 6 6.24 5 60 3 60 5 60 1.5 30 9 100 4 5.0 4.3 100 50 6 mA 0.5 0.8 mA V mV mV 0.8 -0.8 mV/ °C 10 µ V/VO 65 dB Dropout Voltage VD V RO IO = 1A, TJ =+25 °C f = 1KHz 2 Output Resistance 17 Short Circuit Current ISC VI= 35V, TA =+25 °C 250 mΩ mA Peak Current IPK TJ=+25 °C 2.2 A * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7808A/RA ELECTRICAL CHARACTERISTICS (Refer to the test circuits. TJ = 0 to+150 °C, IO = 1A, V I = 14V, C I = 0.33µF, C O=0.1µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage Line Regulation VO ∆VO IO = 5mA to 1A, PD ≤15W VI = 8.6 to 21V VI= 10.6 to 25V IO = 500mA VI= 11to 17V TJ =+25 °C Load Regulation ∆VO Quiescent Current IQ Quiescent Current Change ∆IQ VI= 10.4V to 23V VI= 11V to 17V TJ =+25 °C IO = 5mA to 1.5A IO = 5mA to 1A IO = 250 to 750mA TJ =+25 °C IO = 5mA to 1A VI = 11V to 25V, IO = 500mA Min Typ Max 7.84 8 8.16 7.7 8 8.3 6 80 3 80 6 2 80 40 12 100 12 5 5.0 100 50 6 mA 0.5 0.8 mA VI= 10.6V to 23V, TJ =+25 °C Output Voltage Drift ∆V/∆T Output Noise Voltage VN Ripple Rejection RR IO = 5mA f = 10Hz to 100KHz TA =+25 °C f = 120Hz, IO = 500mA VI = 11.5V to 21.5V Unit V mV mV 0.8 -0.8 mV /°C 10 µV/VO 62 dB IO = 1A, TJ =+25 °C f = 1KHz 2 V 18 ISC VI= 35V, TA =+25°C 250 mΩ mA IPK TJ=+25 °C 2.2 A Dropout Voltage VD Output Resistance RO Short Circuit Current Peak Current * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7809A/RA ELECTRICAL CHARACTERISTICS (Refer to the test circuits. TJ = 0 to +125 °C, IO = 1A, V I = 15V, C I = 0.33µF, C O = 0.1µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage Line Regulation VO ∆VO IO = 5mA to 1A, PD ≤15W VI = 11.2 to 24V VI= 11.7 to 25V IO = 500mA VI= 12.5 to 19V TJ =+25 °C Load Regulation ∆VO Quiescent Current IQ Quiescent Current Change Output Voltage Drift ∆IQ ∆V/∆T Output Noise Voltage VN Ripple Rejection RR Min Typ Max 8.82 9.0 9.18 8.65 9.0 9.35 6 90 4 45 VI= 11.5V to 24V 6 90 VI= 12.5V to 19V 2 45 12 100 12 5 5.0 100 50 6.0 TJ =+25 °C IO = 5mA to 1.0A IO = 5mA to 1.0A IO = 250 to 750mA TJ =+25 °C VI = 11.7V to 25V, TJ=+25 °C VI = 12V to 25V, IO = 500mA 0.8 IO = 5mA to 1.0A 0.5 IO = 5mA f = 10Hz to 100KHz TA =+25 °C f = 120Hz, IO = 500mA VI = 12V to 22V 0.8 Unit V mV mV mA mA -1.0 mV/ °C 10 µV/VO 62 dB Dropout Voltage VD V RO IO = 1A, TJ =+25 °C f = 1KHz 2.0 Output Resistance 17 Short Circuit Current ISC VI= 35V, TA =+25 °C 250 mΩ mA Peak Current IPK TJ=+25 °C 2.2 A * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7810A/RA ELECTRICAL CHARACTERISTICS (Refer to the test circuits. TJ = 0 to+125 °C, IO = 1A, V I = 16V, C I = 0.33µF, CO = 0.1µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage Line Regulation VO ∆VO IO = 5mA to 1A, PD ≤ 15W VI =12.8 to 25V VI= 12.8 to 26V IO = 500mA VI= 13to 20V TJ =+25 °C Load Regulation Quiescent Current Quiescent Current Change Output Voltage Drift ∆VO IQ ∆IQ ∆V/∆T Output Noise Voltage VN Ripple Rejection RR VI= 12.5V to 25V VI= 13V to 20V TJ =+25 °C IO = 5mA to 1.5A IO = 5mA to 1.0A IO = 250 to 750mA TJ =+25 °C Min Typ Max 9.8 10 10.2 9.6 10 10.4 8 100 4 50 8 3 100 50 12 100 12 5 5.0 100 50 6.0 VI = 13V to 26V, TJ=+25 °C VI = 12.8V to 25V, IO = 500mA 0.5 IO = 5mA to 1.0A 0.5 0.8 IO = 5mA f = 10Hz to 100KHz TA =+25 °C f = 120Hz, IO = 500mA VI = 14V to 24V -1.0 Unit V mV mV mA mA mV °C 10 µV/VO 62 dB Dropout Voltage VD V RO IO = 1A, TJ =+25 °C f = 1KHz 2.0 Output Resistance 17 Short Circuit Current ISC VI= 35V, TA =+25 °C 250 mΩ mA Peak Current IPK TJ=+25 °C 2.2 A * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7811A/RA ELECTRICAL CHARACTERISTICS (Refer to the test circuits. TJ = 0 to +125 °C, IO = 1A, V I = 18V, C I = 0.33µF, C O = 0.1µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage Line Regulation VO ∆VO IO = 5mA to 1A, PD ≤15W VI = 13.8 to 26V VI= 12.8 to 26V IO = 500mA VI= 15 to 21V TJ =+25 °C Load Regulation ∆VO Quiescent Current IQ Quiescent Current Change Output Voltage Drift ∆IQ ∆VO/∆T Output Noise Voltage VN Ripple Rejection RR VI= 13.5V to 26V VI= 15V to 21V TJ =+25 °C IO = 5mA to 1.5A IO = 5mA to 1.0A IO = 250 to 750mA TJ =+25 °C Min Typ Max 10.8 11.0 11.2 10.6 11.0 11.4 10 110 4 55 10 3 110 55 12 100 12 5 5.1 100 50 6.0 VI = 13.8V to 26V, TJ=+25 °C VI = 14V to 27V, IO = 500mA 0.8 IO = 5mA to 1.0A IO = 5mA 0.5 f = 10Hz to 100KHz TA =+25 °C f = 120Hz, IO = 500mA VI = 14V to 24V 0.8 Unit V mV mV mA mA -1.0 mV /°C 10 µV/VO 61 dB Dropout Voltage VD V RO IO = 1A, TJ =+25 °C f = 1KHz 2.0 Output Resistance 18 Short Circuit Current ISC VI= 35V, TA =+25 °C 250 mΩ mA Peak Current IPK TJ=+25 °C 2.2 A * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7812A/RA ELECTRICAL CHARACTERISTICS (Refer to the test circuits. TJ = 0 to +125 °C, IO = 1A, V I = 19V, C I = 0.33µF, C O= 0.1µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage Line Regulation VO ∆VO IO = 5mA to 1A, PD ≤15W VI = 14.8 to 27V VI= 14.8 to 30V IO = 500mA VI= 16 to 22V TJ =+25°C Load Regulation ∆VO Quiescent Current IQ Quiescent Current Change Output Voltage Drift ∆IQ ∆VO/∆T Output Noise Voltage VN Ripple Rejection RR VI= 14.5V to 27V VI= 16V to 22V TJ =+25°C IO = 5mA to 1.5A IO = 5mA to 1.0A IO = 250 to 750mA TJ =+25 °C Min Typ Max 11.75 12 12.25 11.5 12 12.5 10 120 4 120 10 3 120 60 12 100 12 5 5.1 100 50 6.0 VI = 15V to 30V, TJ=+25 °C VI = 14V to 27V, IO = 500mA 0.5 IO = 5mA to 1.0A IO = 5mA 0.8 f = 10Hz to 100KHz TA =+25 °C f = 120Hz, IO = 500mA VI = 14V to 24V 0.8 Unit V mV mV mA mA -1.0 mV/ °C 10 µV/VO 60 dB Dropout Voltage VD V RO IO = 1A, TJ =+25 °C f = 1KHz 2.0 Output Resistance 18 Short Circuit Current ISC VI= 35V, TA =+25 °C 250 mΩ mA Peak Current IPK TJ=+25 °C 2.2 A * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7815A/RA ELECTRICAL CHARACTERISTICS (Refer to the test circuits. TJ = 0 to +150 °C, IO =1A, V I=23V, C I = 0.33µF, C O=0.1µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage Line Regulation VO ∆VO IO = 5mA to 1A, PD ≤15W VI = 17.7 to 30V VI= 17.9 to 30V IO = 500mA VI= 20 to 26V TJ =+25 °C Load Regulation ∆VO Quiescent Current IQ Quiescent Current Change Output Voltage Drift ∆IQ ∆VO/∆T Output Noise Voltage VN Ripple Rejection RR VI= 17.5V to 30V VI= 20V to 26V TJ =+25 °C IO = 5mA to 1.5A IO = 5mA to 1.0A IO = 250 to 750mA TJ =+25 °C Min Typ Max 14.7 15 15.3 14.4 15 15.6 10 150 5 150 11 3 150 75 12 100 12 5 5.2 100 50 6.0 VI = 17.5V to 30V, TJ =+25 °C VI = 17.5V to 30V, IO = 500mA 0.5 IO = 5mA to 1.0A IO = 5mA 0.8 f = 10Hz to 100KHz TA =+25 °C f = 120Hz, IO = 500mA VI = 18.5V to 28.5V 0.8 Unit V mV mV mA mA -1.0 mV/ °C 10 µV/VO 58 dB Dropout Voltage VD V RO IO = 1A, TJ =+25 °C f = 1KHz 2.0 Output Resistance 19 Short Circuit Current ISC VI= 35V, TA =+25 °C 250 mΩ mA Peak Current IPK TJ=+25 °C 2.2 A * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7818A/RA ELECTRICAL CHARACTERISTICS (Refer to the test circuits. TJ = 0 to +150 °C, IO=1A, V I = 27V, C I= 0.33µF, C O = 0.1µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage Line Regulation VO ∆VO IO = 5mA to 1A, PD ≤15W VI = 21 to 33V VI= 21 to 33V IO = 500mA VI= 21 to 33V TJ =+25 °C Load Regulation ∆VO Quiescent Current IQ Quiescent Current Change Output Voltage Drift ∆IQ ∆VO/∆T Output Noise Voltage VN Ripple Rejection RR Dropout Voltage VD Output Resistance RO Short Circuit Current Peak Current Min Typ Max 17.64 18 18.36 17.3 18 18.7 15 180 5 180 VI= 20.6V to 33V 15 180 VI= 24V to 30V 5 90 15 100 15 7 5.2 100 50 6.0 TJ =+25 °C IO = 5mA to 1.5A IO = 5mA to 1.0A IO = 250 to 750mA TJ =+25 °C VI = 21V to 33V, TJ=+25 °C VI = 21V to 33V, IO = 500mA 0.5 IO = 5mA to 1.0A IO = 5mA 0.8 f = 10Hz to 100KHz TA =+25 °C f = 120Hz, IO = 500mA VI = 18.5V to 28.5V 0.8 Unit V mV mV mA mA -1.0 mV/ °C 10 µV/VO 57 dB IO = 1A, TJ =+25 °C f = 1KHz 2.0 V 19 ISC VI= 35V, TA =+25 °C 250 mΩ mA IPK TJ=+25 °C 2.2 A * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) LM7824A/RA ELECTRICAL CHARACTERISTICS (Refer to the test circuits. TJ = 0 to +150 °C, IO =1A, V I = 33V, C I= 0.33µF, C O=0.1µF, unless otherwise specified) Characteristic Symbol Test Conditions TJ =+25 °C Output Voltage Line Regulation VO ∆VO IO = 5mA to 1A, PD ≤15W VI = 27.3 to 38V VI= 27 to 38V IO = 500mA VI= 21 to 33V o TJ =+25 C Load Regulation Quiescent Current Quiescent Current Change Output Voltage Drift ∆VO IQ ∆IQ ∆VO/∆T Output Noise Voltage VN Ripple Rejection RR VI= 26.7V to 38V VI= 30V to 36V TJ =+25 °C IO = 5mA to 1.5A IO = 5mA to 1.0A IO = 250 to 750mA TJ =+25 °C Min Typ Max 23.5 24 24.5 23 24 25 18 240 6 240 18 6 240 120 15 100 15 7 5.2 100 50 6.0 VI = 27.3V to 38V, TJ =+25 °C VI = 27.3V to 38V, IO = 500mA 0.5 IO = 5mA to 1.0A IO = 5mA 0.8 f = 10Hz to 100KHz TA = 25 °C f = 120Hz, IO = 500mA VI = 18.5V to 28.5V 0.8 Unit V mV mV mA mA -1.5 mV/ °C 10 µV/VO 54 dB Dropout Voltage VD V RO IO = 1A, TJ =+25°C f = 1KHz 2.0 Output Resistance 20 Short Circuit Current ISC VI= 35V, TA =+25 °C 250 mΩ mA Peak Current IPK TJ=+25 °C 2.2 A * Load and line regulation are specified at constant, junction temperature. Change in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) TYPICAL PERFORMANCE CHARACTERISTICS Fig. 1 Quiescent Current Fig. 3 Output Voltage Fig. 2 Peak Output Current Fig. 4 Quiescent Current LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) TYPICAL APPLICATIONS Fig. 5 DC Parameters Fig. 6 Load Regulation Fig. 7 Ripple Rejection TYPICAL APPLICATIONS (Continued) LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) Fig. 8 Fixed Output Regulator Fig. 9 Constant Current Regulator Notes: (1) To specify an output voltage. substitute voltage value for "XX." A common ground is required between the input and the Output voltage. The input voltage must remain typically 2.0V above the output voltage even during the low point on the input ripple voltage. (2) CI is required if regulator is located an appreciable distance from power Supply filter. (3) CO improves stability and transient response. Fig. 10 Circuit for Increasing Output Voltage IRI ≥ 5 IQ VO = VXX (1+R2/R1)+IQR2 Fig. 11 Adjustable Output Regulator (7 to 30V) LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) TYPICAL APPLICATIONS (Continued) Fig. 12 High Current Voltage Regulator Fig. 13 High Output Current with Short Circuit Protection Fig. 14 Tracking Voltage Regulator Fig. 15 Split Power Supply ( ± 15V-1A) LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) TYPICAL APPLICATIONS (Continued) Fig. 16 Negative Output Voltage Circuit Fig. 17 switching Regulator LM78XX (KA78XX, MC78XX) FIXED VOLTAGE REGULATOR (POSITIVE) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ CoolFET™ CROSSVOLT™ E2CMOSTM FACT™ FACT Quiet Series™ FAST® FASTr™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 TinyLogic™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. ANEXO B – Esquemático ANEXO B.1 – Drivers 2 1 B L3 L2 L1 GND +5V V B 3 Dir_x Freq_x L4 4 BORN-3 BORN-3 BORN-3 U11 1 2 3 U10 1 2 3 1 2 3 U9 U14 7805 VIN +5V GND U15 VIN D1 Q5 7805 +5V GND D04AZ3_3 150 bd243 Q6 bd243 R4 Q7 150 U4 saa1042 1 L2 L3 16 2 VD VM15 3 14 L1 L4 R5 150 R6 R1 1k R7 150 6 11 VCC 10 7 SET 8 CLK CW/CCW 9 F/H GND bd243 Q8 bd243 A A Escola Superior de Tecnologia Setubal Page Size: B Luis Rita Pedro Silva Revision: 4 3 2 - 6 de Outubro de 2003 1 Pagina 1 de 1 ANEXO B.2 – Principal 4 3 2 1 FONTE 7805 U21 VIN +5V GND C3 1u B B C6 47u U17 MX7828 AIN6 AIN7 AIN5 AIN8 AIN4 VDD AIN3 A0 AIN2 A1 AIN1 A2 TP DB7 DB0 DB6 BD1 DB5 DB2 DB4 DB3 /CS /RD RDY /INT VREF+ GND VREF- 89C51 P1.0 VCC P1.1 P0.0 P1.2 P0.1 P1.3 P0.2 P1.4 P0.3 P1.5 P0.4 P1.6 P0.5 P1.7 P0.6 RST P0.7 RXD-P3.0 /EA-VPP TXD-P3.1 ALE-/PROG P3.2 PSEN P3.3 P2.7 P3.4 P2.6 P3.5 P2.5 P3.6 P2.4 P3.7 P2.3 XTAL2 P2.2 XTAL1 P2.1 GND P2.0 C7 100n MAX233 U2 T2IN R2OUT T1IN R2IN R1OUT T2OUT R1IN VT1OUT C2GND C2+ VCC V+ C1C1+ GND VCSC2+ U13 C2 botao U38 2 470 U34 D16 U27 ldr R6 R7 R8 10k 10k 10k C5 33p SERIE1 SERIE2 D18 led 2 2 ldr 11M C4 33p 1 10k U28 1 R5 ldr 2 2 10k ldr U29 1 10k R4 U30 1 R3 ldr 2 10k ldr 2 R2 U31 1 10k 2 A ldr U32 1 2 R1 1 1 ldr U33 4 Dir_2 Freq_2 Dir_1 Freq_1 R9 D17 220 R10 led led 220 R11 D19 A led 220 R12 220 R13 Escola Superior de Tecnologia Setubal Page Size: B Luis Rita Pedro Silva Revision: 4 3 2 - 6 de Outubro de 2003 1 Pagina 1 de 1 ANEXO C – PCB ANEXO C.1 – Drivers ANEXO C.2 – Principal ANEXO C.3 – Pistas para os contactos deslizantes ANEXO D – Programa do Microcontrolador ANEXO D.1 – Sem Ligação ao PC $mod51 org 0000h ljmp inicio ;******************************************************************************* ********************************************* configuracoes: mov pcon, #80h ;configuracao porta serie mov tmod, #021h mov scon, #050h ;modo 0 mov ie, #00h setb tr1 ;Inicia o TIMER 1 mov th1, #00FDH ;Valor Baud Rate=19200 bps mov p1,#0ffh mov p2,#0ffh mov p0,#0ffh mov 40h,#00h mov 41h,#5Ah mov 42h,#00h mov 43h,#5Ah mov 47h,#00h mov 50h,#00h mov 49h,#00h mov 44h,#00h ;referencia ret ;******************************************************************************* ********************************************* referencia: ; procedimento que faz com que após se dar o reset a cabeça dê uma volta completa ; no eixo da azimute em busca do maior valor de luz. esse valor vai ser considerado como mov r5, #14H MOV R6, #0FFH ; a referência e a cabeça só irá responder para valores de luz acima desse valor. essa volta MOV R7, #8CH ; de 360 graus é feita com a cabeça na posição de 45graus, pois é nesta posição que a c1: : cabeça tem um raio de acção maior acall cima acall conversao acall maior mov a,44h clr c subb a, 39h jnc ref1 mov 44h, 39h ref1: acall delay acall delay acall delay acall delay acall delay djnz r5,c1 C2: acall esquerda1 acall conversao acall maior mov a,44h clr c subb a, 39h jnc ref2 mov 44h, 39h ref2: acall delay acall delay acall delay acall delay acall delay djnz r6, c2 C3: acall esquerda1 acall conversao acall maior mov a,44h clr c subb a, 39h jnc ref3 mov 44h, 39h ref3: acall delay acall delay acall delay acall delay acall delay djnz r7, c3 ret ;******************************************************************************* ********************************************* inicial: ; procedimento que coloca a cabeça na posição 0graus após esta ter feito a busca da mov r5, #14h ; referência c6: acall baixo acall delay acall delay acall delay acall delay acall delay djnz r5,c6 ret ;******************************************************************************* ********************************************* delay: ; atraso para ser usado sempre que necessário, neste caso nos sinais de controle do mov r1,#0FFh ciclo1: ; motor, nos sinais de conversão do ADC, etc... mov r2,#0Ah ciclo2: djnz r2,ciclo2 djnz r1,ciclo1 ret ;******************************************************************************* ********************************************* envia_porta: ; procedimento que permite enviar o que quer que seja para o exterior, através da mov sbuf, a ; porta série, utilizando o protocolo RS-232 envia_porta2: jnb ti,envia_porta2 clr ti ret ;******************************************************************************* ********************************************* recebe_porta: ; procedimento que permite receber o que quer que seja para do exterior, através da mov a, sbuf ; porta série, utilizando o protocolo RS-232 recebe_porta2: jnb ri,recebe_porta2 clr ri ret ;******************************************************************************* ********************************************* canal0: o canal do ADC que se pretende ; procedimentos que servem para seleccionar qual clr p2.4 clr p2.5 clr p2.6 ret canal1: setb p2.4 clr p2.5 clr p2.6 ret canal2: clr p2.4 setb p2.5 clr p2.6 ret canal3: setb p2.4 setb p2.5 clr p2.6 ret canal4: ; utilizar clr p2.4 clr p2.5 setb p2.6 ret canal5: setb p2.4 clr p2.5 setb p2.6 ret canal6: clr p2.4 setb p2.5 setb p2.6 ret canal7: setb p2.4 setb p2.5 setb p2.6 ret ;******************************************************************************* ********************************************* converter: ; procedimento que permite fazer a conversão dos sinais analógicos que vêm das LDR´s clr p2.0 nop clr p2.1 ; em valores digitais nop clr p2.3 nop mov a,p0 setb p2.1 setb p2.3 setb p2.2 setb p2.0 ret ;******************************************************************************* ********************************************* cima: ; procedimento que faz com que a cabeça se movimente para cima no eixo da elevação clr p1.1 clr p1.0 nop nop setb p1.0 nop nop clr p1.0 acall incremento ret ;******************************************************************************* ********************************************* baixo: ; procedimento que faz com que a cabeça se movimente para baixo no eixo da elevação setb p1.1 clr p1.0 nop nop setb p1.0 nop nop clr p1.0 acall decremento ret ;******************************************************************************* ********************************************* direita: ; procedimento que faz com que a cabeça se mova para a direita no eixo da azimute mov a,41h sensor que no lado positivo ; se a cabeça se encontrar no lado negativo, o CLR C subb a, 43h a esquerda jc esquerda1 CJNE A,#00H,VAI mov a, 40h CLR C subb a, 42h jc esquerda1 VAI: jmp direita1 ; era para se mover para a direita agora é para RET ;******************************************************************************* ********************************************* DIREITA1: clr p1.3 clr p1.2 nop nop nop setb p1.2 nop nop nop clr p1.2 ret ;******************************************************************************* ********************************************* esquerda: ; procedimento que faz com que a cabeça se mova para a esquerda no eixo da azimute mov a,41h sensor que no lado positivo ; se a cabeça se encontrar no lado negativo, o CLR C subb a, 43h a direita jc direita1 CJNE A,#00H,VEM mov a, 40h ; era para se mover para a esquerda agora é para CLR C subb a, 42h jc direita1 VEM: jmp esquerda1 RET ;******************************************************************************* ********************************************* ESQUERDA1: setb p1.3 clr p1.2 nop nop nop setb p1.2 nop nop nop clr p1.2 ret ;******************************************************************************* ********************************************* conversao: ; procedimento que converte os valores analógicos das LDR´s para digitais, posções de memória do micro acall canal0 acall converter mov 30H,a ; até um máximo de 8 canais e os guarda em acall canal1 acall converter mov 31H,a acall canal2 acall converter mov 32H,a acall canal3 acall converter mov 33H,a acall canal4 acall converter mov 34H,a acall canal5 acall converter mov 35H,a acall canal6 acall converter mov 36H,a acall canal7 acall converter mov 37H,a ret ;******************************************************************************* ********************************************* maior: está a captar mais luz e ; procedimento que determina qual o sensor que mov a,30h mov r1,31h clr c subb a,r1 jc um mov 38h,#0d mov a,30h mov 39h,a jmp dois um: mov 38h,#1d mov 39h,r1 dois: mov a,32h mov r1,39h clr c subb a,r1 jc tres mov 38h,#2d mov a,32h mov 39h,a tres: mov a,33h mov r1,39h clr c subb a,r1 jc quatro mov 38h,#3d mov a,33h ; guarda esse valor numa posição de memória mov 39h,a quatro: mov a,34h mov r1,39h clr c subb a,r1 jc cinco mov 38h,#4d mov a,34h mov 39h,a cinco: mov a,35h mov r1,39h clr c subb a,r1 jc seis mov 38h,#5d mov a,35h mov 39h,a seis: mov a,36h mov r1,39h clr c subb a,r1 jc sete mov 38h,#6d mov a,36h mov 39h,a sete: nop ret ;******************************************************************************* ********************************************* incremento: memória sempre que a cabeça ; procedimento que incrementa uma posição de MOV a, 41h cjne a,#0ffh,zero ; se mova para cima, para depois se conseguir saber se esta se encontra no lado positivo mov 41h,#00h 90) inc 40h ; (maior que 90) ou no lado negativo (menor que jmp fim zero: inc 41h fim: nop ret ;******************************************************************************* ********************************************* decremento: memória sempre que a cabeça ; procedimento que decrementa uma posição de mov a,41h cjne a,#00h,igu ; se move para baixo, para depois se conseguir saber se esta se encontra no lado positivo mov 41h,#0ffh 90) DEC 40h jmp fim2 ; (maior que 90) ou no lado negativo (menor que igu: DEC 41h fim2: nop ret ;******************************************************************************* ********************************************* procura: ; procedimento que faz com que a cabeça após 9,55s sem captar nenhum valor de luz mov 48h, 44h MOV R6, #0FFH ; acima da referência, executa uma volta de 360graus em procura de um valor de luz MOV R7, #8CH ; superior á referência C8: inc 50h acall esquerda1 acall conversao acall maior mov a,48h clr c subb a, 39h jnc ref6 mov 48h,39h mov 49h,50h ref6: acall delay acall delay acall delay acall delay acall delay djnz r6, c8 C9: inc 50h acall esquerda1 acall conversao acall maior mov a,48h clr c subb a, 39h jnc ref5 mov 48h, 39h mov 49h, 50h ref5: acall delay acall delay acall delay acall delay acall delay djnz r7, c9 ret ;******************************************************************************* ********************************************* certa: 45 graus ou de -45graus ; procedimento que coloca a cabeça na posição de mov a, #59h ; dependendo do lado onde esta se encontra, antes de esta executar o procedimento clr c subb a, 41h jnc certa3 certa1: mov a, #77h clr c subb a, 41h jnc certa5 mov a, 41h mov 51h, #77h clr c subb a, 51h mov r5, a certa2: acall baixo acall delay ; de procura de luz acall delay acall delay acall delay acall delay djnz r5,certa2 mov 41h, #78h ljmp certa9 certa5: mov r7, a certa6: acall cima acall delay acall delay acall delay acall delay acall delay djnz r7,certa6 mov 41h, #78h ljmp certa9 certa3: mov a, #45h clr c subb a, 41h jnc certa7 mov a, 41h mov 51h, #45h clr c subb a, 51h mov r6, a certa4: acall baixo acall delay acall delay acall delay acall delay acall delay djnz r6,certa4 mov 41h, #46h ljmp certa9 certa7: mov r7, a certa8: acall cima acall delay acall delay acall delay acall delay acall delay djnz r7,certa8 mov 41h, #46h certa9: nop ret ;******************************************************************************* ********************************************* inicio: ; Programa Principal: acall configuracoes ; é feita a conversão dos valores das LDR´s e depois de acordo com esses valores acall referencia acall inicial á cabeça para onde esta se deve mover. ; o microcontrolador vai dar a indicação ; ou seja, se a diferença de valores entre os dois pares de sensores fôr menor que 5 inicio1: ; a cabeça está centrada, se fôr superior a 5 o micro vai dar indicação para a cabeça mov 47h, #00h mov 50h,#00h ; se mover na direcção ou nas direcções do sensor do par de sensores que tiver a inicio4: ; captar maior valor de luz. acall conversao acall maior nao captar um valor de luz superior á nop ; por outro lado, sempre que a cabeça sendo incrementada, para que depois o ; referência uma posição de memória vai mov a, 39h clr c executar o movimento de procura de luz subb a, 44h jc inicio5 quat: mov a, 30h clr c subb a, 34h jc quat1 mov 52h, #5d clr c subb a, 52h jc lado jnc ci quat1: mov a, 34h clr c subb a, 30h mov 52h, #5d subb a, 52h jc lado jnc ba lado: mov a, 33h clr c subb a, 31h ; micro dê indicação á cabeça para esta jc quat3 mov 52h, #5d clr c subb a, 52h jc inicio1 jnc dir quat3: mov a, 31h clr c subb a, 33h mov 52h, #5d clr c jc inicio1 jnc esq ci: mov a, 39h clr c subb a, 44h jc inicio2 mov a,#174d clr c subb a, 41h jc inicio1 acall cima acall delay acall delay acall delay acall delay acall delay ljmp lado inicio5: ljmp inicio2 ba: mov a, 39h clr c subb a, 44h jc inicio2 mov a,#5d clr c subb a, 41h jnc inicio6 acall baixo acall delay acall delay acall delay acall delay acall delay ljmp lado inicio6: ljmp inicio1 dir: mov a, 39h clr c subb a, 44h jc inicio2 acall direita acall delay acall delay acall delay acall delay acall delay ljmp inicio1 esq: mov a, 39h clr c subb a, 44h jc inicio2 acall esquerda acall delay acall delay acall delay acall delay acall delay ljmp inicio1 inicio2: inc 47h acall delay acall delay acall delay acall delay acall delay acall delay mov a, #250d clr c subb a, 47h jc inicio3 ljmp inicio4 inicio3: acall delay acall delay acall delay acall delay acall delay mov 49h,#00h acall certa acall procura mov a, #01h clr c subb a, 49h jc inicio9 ljmp inicio1 inicio9: mov r6, 49h C10: acall esquerda1 acall delay acall delay acall delay acall delay djnz r6, c10 ljmp inicio1 end ANEXO D.2 – Com ligação ao PC $mod51 org 0000h ljmp inicio ;***************************************************************************** configuracoes: mov pcon, #80h mov tmod, #021h mov scon, #050h mov ie, #00h setb tr1 mov th1, #00FDH ;configuracao porta serie SMOD-1 para 19200 bps ;modo 0 ;Inicia o TIMER 1 ;Valor Baud Rate=19200 bps mov p1,#0ffh ret delay: um: mov p2,#0ffh mov p0,#0ffh mov r1,39h mov r2,#0Ah ;//////////////////////////////////////////////////////////////// dois: djnz r2,dois djnz r1,um ret envia_porta: mov sbuf, a ;enviar para a porta serie envia_porta2: jnb ti,envia_porta2 clr ti ret recebe_porta: mov a, sbuf recebe_porta2: ret jnb ri,recebe_porta2 clr ri ;canais do ADC ;receber da porta serie canal0: ret canal1: ret canal3: ret canal4: ret clr p2.4 clr p2.5 clr p2.6 setb p2.4 clr p2.5 clr p2.6 setb p2.4 setb p2.5 clr p2.6 clr p2.4 clr p2.5 setb p2.6 ;realização da conversão converter: clr p2.0 nop clr p2.1 nop clr p2.3 nop mov a,p0 setb setb setb setb p2.1 p2.3 p2.2 p2.0 ret ;movimentos cima: clr p1.1 clr p1.0 acall delay setb p1.0 acall delay clr p1.0 ret baixo: setb p1.1 clr p1.0 acall delay setb p1.0 acall delay clr p1.0 ret direita: ret clr p1.3 clr p1.2 acall delay setb p1.2 acall delay clr p1.2 esquerda: setb p1.3 clr p1.2 acall delay setb p1.2 acall delay clr p1.2 ret ;conversão dos quatro canais utilizados conversao: acall canal0 acall converter mov 30H,a acall canal1 acall converter mov 31H,a acall canal3 acall converter mov 33H,a acall canal4 acall converter mov 34H,a ret ; enviar para o PC os valores envdados: mov a,30h acall envia_porta mov a,31h acall envia_porta mov a,33h acall envia_porta mov a,34h acall envia_porta ret ;***************************************************************************** inicio: acall configuracoes acall recebe_porta inicio1: acall conversao acall envdados acall recebe_porta CJNE a,#'1',ci ljmp inicio1 ;movimento em elevaçao ci: cjne a,#'2',ba acall delay acall cima ljmp segundo ba: cjne a,#'3',dir acall delay acall baixo ljmp segundo ;movimento em azimute segundo: acall recebe_porta CJNE a,#'1',ci ljmp inicio1 dir: cjne a,#'4',esq acall delay acall direita ljmp inicio1 esq: cjne a,#'5',inicio1 acall delay acall esquerda ljmp inicio1 end ANEXO E – Programa em Visual Basic Form1 - 1 Dim Dim Dim Dim Dim Dim Dim Dim Dim Dim Dim Dim recebeu As Boolean max As Variant indice As Variant buffer() As Byte inicio As Boolean resposta As Byte espera As Boolean fimciclo As Boolean reaccao As Integer ficheiro As Variant referencia As Integer velocidade As Integer Private Sub Command1_Click() Dim Dim Dim Dim Dim um As Integer dois As Integer tres As Integer quatro As Integer canaux As Integer Dim enviar As Variant Dim posicaoY As Integer posicaoY = 80 ' abrir ou criar caso não exista i ficheiro dados.txt Open "C:\DADOS.txt" For Output Shared As #1 fimciclo = False ' informação para o micro começar a enviar os dados MSComm1.Output = "i" Do ' teste para sair do programa If fimciclo Then Exit Do End If ' fazer uma espera para que os motores possam responder atempadamente Timer1.Interval = velocidade Timer1.Enabled = True espera = False Do If espera = True Then Exit Do End If DoEvents Loop Form1 - 2 inicio = True Do If recebeu = True Then recebeu = False ' Mostrar valores recebidos Text1.Text Text2.Text Text3.Text Text4.Text = = = = buffer(0) buffer(2) buffer(4) buffer(6) um = buffer(0) dois = buffer(2) tres = buffer(4) quatro = buffer(6) ' Calculo da diferenca dos pares de valores Text7.Text = um - quatro Text8.Text = dois - tres ' guardar para ficheiro o valor das subtracções Write #1, um - quatro; dois - tres If um < referencia Then um = referencia End If If dois < referencia Then dois = referencia End If If tres < referencia Then tres = referencia End If If quatro < referencia Then quatro = referencia End If ' calculo do caracter a enviar para o micro fazer actuar os motores If Abs(um - quatro) > reaccao Then If um < quatro Then posicaoY = posicaoY + 1 enviar = "3" GoTo segundo Else Form1 - 3 posicaoY = posicaoY - 1 enviar = "2" GoTo segundo End If End If enviar = "1" End If segundo: Text9.Text = posicaoY ' Testar se estamos nos limites da elevação If posicaoY < 1 Then enviar = "1" posicaoY = posicaoY + 1 End If If posicaoY > 159 Then enviar = "1" posicaoY = posicaoY - 1 End If If posicaoY < 80 Then canaux = dois dois = tres tres = canaux End If If Abs(dois - tres) > reaccao Then If dois < tres Then If enviar = "1" Then MSComm1.Output = "5" Exit Do End If If enviar = "2" Then MSComm1.Output = "9" Exit Do End If If enviar = "3" Then MSComm1.Output = "8" Exit Do End If Else If enviar = "1" Then MSComm1.Output = "4" Exit Do End If Form1 - 4 If enviar = "2" Then MSComm1.Output = "6" Exit Do End If If enviar = "3" Then MSComm1.Output = "7" Exit Do End If End If End If If enviar <> "1" Then Form2.Timer1.Interval = 1 Form2.Timer1.Enabled = True End If MSComm1.Output = enviar Exit Do DoEvents Loop DoEvents Loop Close #1 End Sub Private Sub Command2_Click() ' parar a execução do programa fimciclo = True End Sub Private Sub Command3_Click() ' Sair do programa End End Sub Private Sub Command4_Click() ' mudar do form 1 para o form 2 Form2.Show Form1.Hide Form1 - 5 End Sub Private Sub Form_Load() ' Abrir a porta serie e inicializar variaveis MSComm1.PortOpen = True inicio = False Text5.Text = reaccao Text6.Text = referencia VScroll1.Value = 5 VScroll2.Value = 200 VScroll3.Value = 50 End Sub Private Sub MSComm1_OnComm() Dim sMessage As String ' guardar o que vem da porta serie para a variavel buffer() Select Case MSComm1.CommEvent Case comEvReceive buffer() = MSComm1.Input recebeu = True End Select 'SetStatus (sMessage), False End Sub Private Sub Timer1_Timer() ' esperar pelo timer espera = True End Sub Private Sub VScroll1_Change() ' Actualizar o valor da sensibilidade reaccao = VScroll1.Value Text5.Text = reaccao End Sub Private Sub VScroll2_Change() ' Actualizar o valor de referencia referencia = VScroll2.Value Text6.Text = referencia End Sub Private Sub VScroll3_Change() ' Actualizar a frequencia de trabalho Form1 - 6 velocidade = VScroll3.Value Text10.Text = velocidade End Sub Private Sub Form_Resize() ' Para não se alterar o tamanho da janela do programa Form2.Height = 9200 Form2.Width = 11500 End Sub Form2 - 1 Dim Dim Dim Dim y_seguinte1, y_seguinte2 As Long y_actual1, y_actual2 As Long num As Integer escala As Integer Private Sub escalatensao() escala = Combo2.Text lblV1.Caption = 1 * escala lblV2.Caption = 2 * escala lblV3.Caption = 3 * escala lblV4.Caption = 4 * escala lblV5.Caption = 5 * escala lblV6.Caption = 6 * escala lblV7.Caption = 7 * escala lblV8.Caption = 8 * escala lblV9.Caption = 9 * escala lblV10.Caption = 10 * escala lblV_1.Caption = -1 * escala lblV_2.Caption = -2 * escala lblV_3.Caption = -3 * escala lblV_4.Caption = -4 * escala lblV_5.Caption = -5 * escala lblV_6.Caption = -6 * escala lblV_7.Caption = -7 * escala lblV_8.Caption = -8 * escala lblV_9.Caption = -9 * escala lblV_10.Caption = -10 * escala End Sub Private Sub Combo1_Click() num = 0 y_actual1 = 4826 y_actual2 = 4826 Cls End Sub Private Sub Combo2_Click() num = 0 y_actual1 = 4826 y_actual2 = 4826 Cls escalatensao End Sub Private Sub Form_Load() ' Inicialização das variaveis Form2 - 2 num = 0 y_actual1 = 4826 y_actual2 = 4826 Combo1.AddItem "1" Combo1.AddItem "2" Combo1.AddItem "5" Combo1.AddItem "10" Combo1.AddItem "15" Combo1.AddItem "20" Combo1.AddItem "30" Combo1.AddItem "40" Combo1.Text = 10 Combo2.AddItem "1" Combo2.AddItem "2" Combo2.AddItem "5" Combo2.AddItem "10" Combo2.Text = 5 escalatensao End Sub Private Sub Dim vert As Dim hori As Dim color1, poevalor() Integer Integer color2, grossura1, grossura2 As Integer 'ler valores do form1 para mostrar no grafico vert = Form1.Text7.Text hori = Form1.Text8.Text 'definir grossura da linha grossura1 = 2 grossura2 = 2 If vert < -10 * escala - 5 Then vert = -10 * escala - 5 grossura1 = 1 End If If vert > 10 * escala + 5 Then vert = 10 * escala + 5 grossura1 = 1 End If If hori < -10 * escala - 5 Then hori = -10 * escala - 5 grossura2 = 1 End If If hori > 10 * escala + 5 Then hori = 10 * escala + 5 grossura2 = 1 End If Form2 - 3 y_seguinte1 = 4826 - vert * 268 / escala y_seguinte2 = 4826 - hori * 268 / escala If num >= 40 * Combo1.Text Then num = 0 Cls End If If Abs((4826 - y_actual1) / (268 / escala)) < Form1.Text5 And Abs(vert) < Fo rm1.Text5 Then color1 = 12 Else color1 = 4 End If If Abs((4826 - y_actual2) / (268 / escala)) < Form1.Text5 And Abs(hori) < Fo rm1.Text5 Then color2 = 9 Else color2 = 1 End If DrawWidth = grossura1 Line (1200 + 240 / Combo1.Text * num, y_actual1)-(1200 + 240 / Combo1.Text * (num + 1), y_seguinte1), QBColor(color1) y_actual1 = y_seguinte1 DrawWidth = grossura2 Line (1200 + 240 / Combo1.Text * num, y_actual2)-(1200 + 240 / Combo1.Text * (num + 1), y_seguinte2), QBColor(color2) y_actual2 = y_seguinte2 num = num + 1 End Sub Private Sub Command1_Click() ' sai do form2 para o from1 Form1.Show Form2.Hide End Sub Private Sub Form_Resize() ' Serve para não se alterar o tamanho da janela do programa Form2.Height = 9200 Form2.Width = 11500 Form2 - 4 End Sub Private Sub Timer1_Timer() 'actualiza o grafico poevalor End Sub ANEXO F – Lista de material LISTA DE MATERIAL Quantidade 2 1 1 2 8 5 8 1 8 1 1 1 1 2 1 2 8 5 1 1 2 1 2 4 1 Referência /Descrição Valor AT89C51 MX7828 MAX233A SAA1042 BD248 7805 Resistência 10KOhm Resistência 1KOhm Resistência 150 Ohm Resistência 470 Ohm Condensador 47µF Condensador 1µF Condensador 100nF Condensador 33pF Cristal 11MHz Zener 3,9 V Born ligação de 3 entradas Dissipador Botão de pressão Suporte físico Contactos deslizantes Cabo com ligação à porta série Motor passo-a-passo unipolar LDRs Bola de plástico ANEXO G – Desenho em Mechanical