Ampli Norton - Philippe Roux
Transcription
Ampli Norton - Philippe Roux
AMPLIFICATEUR OPERATIONNEL DE TYPE " NORTON " ( LM3900 de National Semiconductor ) 1 Le circuit intégré LM3900 dont la documentation est donnée en annexe comporte quatre amplificateurs différentiels de transconductance dont la tension de sortie est proportionnelle à la différence des courants appliqués aux deux entrées. On se propose d’analyser le fonctionnement d’un amplificateur de ce type. 1°PARTIE : ÉTUDE DE L'AMPLIFICATEUR DIFFÉRENTIEL DE COURANT La tension d’alimentation VCC est fixée à 30 V et la température à 25°C où |VBE | = 0,6 V pour tous les transistors. On considère l'étage amplificateur représenté figure 1 où le transistor T1 (gain en courant !n de 100) est chargé par un générateur de courant idéal IC1 = 150 µA et excité par un générateur de courant : IB1 = IC1 / !n pour que le transistor soit polarisé dans sa zone linéaire. +V CC 1) Pour une variation faible du courant de base ib1 autour de sa valeur de repos IB1, déterminer en tenant compte de la résistance interne rce1 (500 K! ) du transistor T1 : IC1 T1 a) Le gain en tension A1 = v2 / v1 du montage. IB1 v1 v2 b) Les résistances d'entrée Re1et de sortie Rs1. Faire l’A.N. Figure 1 On réalise un amplificateur différentiel de courant en associant au transistor amplificateur T1, deux transistors rigoureusement identiques T2 et T3 (!n = 100) formant un miroir de courant simple selon la figure 2. +V CC IC1 I B1 = B1 IC 1 "n T1 IC3 I1 B2 ! T3 IC2 I2 v1 v2 T2 VBE3 VBE2 Figure 2 : amplificateur différentiel de courant. 1 Philippe ROUX © 2009 http://rouxphi3.perso.cegetel.net 1 2) Calculer l’expression du courant IC1 de T1 en fonction des courants continus d’entrées I1 et I2 et du gain en courant !n des transistors. On applique respectivement sur les entrées B1 et B2 des petites variations de courant i1 et i2 autour des valeurs de repos I1 et I2. 3) A l’aide du schéma équivalent aux petites variations et aux fréquences moyennes (négliger la résistance rce de T2 et T3 devant rbe), montrer que la tension de sortie v2 est sensiblement proportionnelle à la différence (i2-i1). Déterminer le coefficient de transconductance Rm de cet amplificateur différentiel de courant. 2° PARTIE : RÉALISATION ET ÉTUDE DE L'AMPLIFICATEUR OPERATIONNEL Le montage précédent possède un grand gain en tension mais sa résistance de sortie est trop grande. Afin de diminuer celle-ci, on associe au transistor T1, le montage donné en figure 3. Les transistors T4 et T5 sont polarisés par des générateurs de courant continus idéaux I4 et I5 (on a toujours IC1 = 150 µA). Le transistor PNP possède un gain en courant faible ! p = 5 (du aux procédures d’intégration). +V CC I4 T5 IC1 T4 B1 T1 IC3 I1 B2 T3 I2 v1 v2 I5 vs T2 Figure 3 1) Etablir la relation liant les courants I4 et I5 au courant IC1 et au gain en courant !p de T4 et !n de T5; On donne I5 = 1,2 mA, calculer I4. En déduire la valeur des résistances d'entrées rbe4 et rbe5 de T4 et T5. 2) Dessiner le schéma aux petites variations équivalent au montage T4 et T5 de la figure 3, chaque transistor étant remplacé par son schéma en « ! ib » (on négligera seulement la résistance rce de T4 et on prendra pour T5 : rce = 50 K"). 3) Calculer la résistance d’entrée Re4 du montage constitué par T4 et T5, vue par le transistor T1 entre C1 et la masse. Donner son expression approchée et faire l’application numérique. Le gain en tension A1 est-il modifié ? 4) En déduire l’expression du gain en tension A2 = vs / v2 puis calculer A3 = vs / v1. 2 5) En utilisant la méthode de l’ohmmètre, déterminer la résistance de sortie Rs du montage complet entre la sortie et la masse. Donner son expression approchée et faire l’A.N. 6) Etablir la relation liant la tension de sortie vs aux courant d'entrées i1 et i2. 3° PARTIE : UTILISATION On réalise un amplificateur de tension en utilisant cet amplificateur opérationnel « Norton » dans le montage de la figure 4. Les courants I1 et I2 définis sur la figure 2, sont fournis respectivement par les résistances R1 et R2. 1) Dessiner le schéma en continu du montage de la figure 5 en mettant en évidence les courants I1 et I2 . 2) En utilisant les résultats de la 1° partie, montrer que la tension continue de sortie VS est proche de VCC / 2. 3) Dessiner le schéma du montage de la figure 4 pour les petites variations. On supposera que C1 et C2 ont une impédance négligeable à la fréquence d’utilisation. 4) En utilisant les propriétés de l’amplificateur « Norton », calculer en régime des petits signaux, le gain en tension A = vs / ve du montage de la figure 5 (les résistances d’entrées en B1 et B2 sont supposées suffisamment faibles devant les autres résistances). C2 +V CC = 30 V R R 47 K! 47 K! R2 C1 100 K! 1 M! B2 Norton R3 B1 ve R1 1 M! Figure 4 3 vs CORRECTION 2 1°PARTIE : ÉTUDE DE L'AMPLIFICATEUR DIFFÉRENTIEL DE COURANT 1. Schéma aux petites variations : v1 vbe1rbe1 v2 ib1 rce1 gm1vbe1 a) Le gain en tension du montage : A1 = Transconductance de T1 : gm1 = b) Résistance d’entrée Re1!= "n v2 = "gm1rce1 = "3000 (1) v1 I C1 = 6mS . UT UT = 16, 7K# I C1 Rs1 = rce1 = 500K" (2) ! 2. Expression du courant IC1 de T1 en fonction des courants continus d’entrées I1 et I2 et du gain ! en courant !n des transistors. ! +V CC IC1 IC1 B1 " n IC3 I1 ! B2 T3 IC2 I2 T1 v1 v2 T2 V BE3 VBE2 ! ! Les transistors T2 et T3 ont la même tension VBE. V V I C 2 = I SBC exp( BE 2 ) I C 3 = I SBC exp( BE 3 ) soit : IC2 = IC3 et IB2 = IB3 UT UT I 1 I 2 = I C 2 + I B2 + I B3 = I C 2 + 2 C 2 IC2 = IC 3 = I2 2 "n 1+ "n ! "n I C1 I C1 = "n (I1 # I 2 ) (3) I B1 = = I1 # I 2 $ I1 # I 2 "n 2 + "n ! 2 ! Philippe ROUX © 2009 ! http://rouxphi3.perso.cegetel.net 4 3. Schéma équivalent du montage. B2 B3 C2 vbe2 vbe3 i2 B1 C3 rbe 2 C1 rbe1 vbe1 i1 gm2vbe2 v2 rce1 gm1vbe1 gm3vbe3 ! Nœud B2 : i2 " gm2 v be2 " 2vbe2 =0 rbe soit : vbe2 = vbe3 = i2 2 gm2 + rbe (4) D’autre part : vbe1 = rbe1 (i1 " gm 3vbe3 ) (5) ! v2 = "gm1vbe1rce1 (6) ! ! # & % ( i2 ! En exploitant les relations (4) et 5) : v2 = "gm1rbe1rce1%(i1 " gm 3 )( 2 ( % gm2 + %$ rbe (' Les transconductances gm2 et gm3 sont égales (IC2 = IC3) et d’autre part : gm2 >> 2 . rbe ! v2 " #gm1rbe1rce1 [i1 # i2 ] = Rm [i2 # i1 ] (7) Transrésistance de l’amplificateur : Rm = "n rce1 = 50M# (8) ! ! 2° PARTIE : RÉALISATION ET ÉTUDE DE L'AMPLIFICATEUR OPERATIONNEL ! 1) Relation liant les courants I4 et I5 au courant IC1 et au gain en courant !p de T4 et !n de T5. + V CC I4 "n I 4 # (" p +1)I C1 ! IC1 T4 T5 (" n + 1)[ I4 # ( " p + 1)IC1 ] ! ! "p " p I C1 ! ! ! 1,2 mA I5 ! Courants dans les transistors T et T . 4 5 Expression du courant I5 : I 5 = " p I C1!+ ("n +1)[ I 4 # ("n +1)I C1 ] 5 ! I4 = I 5 + I C1 ["n (" p +1) +1] ("n +1) (9) Application numérique : ! I4 rbe4 IC5 rbe5 904 µA 167 ! 450 µA 5,55 k! 2) Schéma aux petites variations équivalent au montage T4, T5. ! pib4 ib4 rbe4 ib4 ib5 v2 rce rbe5 vs ! nib5 3) Expression de la tension v2. v2 = rbe4 ib4 + rbe5ib5 + rce [ib 4 + "nib5 ] (10) Avec : ib5 = (" p +1)ib4 v Résistance d’entrée : Re4 = 2 = rbe4 + (" p +1)rbe5 + rce [1+ "n (" p +1)] ib 4 ! ! Re4 " rce [#n (# p +1)] = 30M$ (11) ! Le gain A1 qui devient : A1 = "gm1 (rce1 // Re4 ) n’est pas modifié en effet : Re4 >> rce1. 4) Gain en tension A2. ! ! vs = rceib4 [1+ "n (" p +1)] ! On en déduit alors : A2 = v2 = Re4 ib 4 vs = 1 (12) v2 Aussi le gain en tension global est inchangé : A3= A1. ! ! 5) Résistance de sortie Rs du montage. La méthode de l’ohmmètre impose d’annuler l’excitation des entrées soit i1 et i2 nuls. Dans ces conditions le transistor T1 est seulement simulé par sa résistance interne rce1. Le schéma d’analyse est le suivant : ! pib4 ib4 rbe4 rce1 ib4 i’ i ib5 rce rbe5 ! nib5 6 u u u = rce // i" i i" = #ib 4 [1+ $n ($ p +1)] u = "rbe5ib5 " (rce1 + rbe4 )ib 4 Rs = ! ! ! Rs = rce // rce1 + rbe4 + rbe5 (" p +1) [1+ " (" n p +1)] # rce1 = 833$ (13) "n (" p +1) 6) Relation liant la tension de sortie vs aux courant d'entrées i1 et i2 : vs = Rm (i2 " i1 ) (14) ! 3° PARTIE : UTILISATION ! 1. Schéma en continu du montage. +VCC = 30 V R 47 K! R 47 K! R2 1 M! I2 B2 Norton B1 Vs I1 R1 1 M! 2. Tension de sortie Vs en régime continu. Transformation du montage constitué par VCC, R et R, à l’aide de Thévenin : R/2 R2 1 M! I2 B2 +VCC /2 Norton B1 VBE2 VBE1 Vs I1 R1 1 M! On peut négliger la résistance de Thévenin R/2 devant R2. 7 ! VCC "VBE 2 I2 = 2 (15) Vs = R1 I1 +VBE1 (16) R2 Compte tenu des propriétés de l’entrée B1 : I1 = I 2 + I B1 où IB1 représente le courant de base de T1 (IB1 = 1,5 µA). : Sachant que R1 =R2 ! V V Vs = CC + R1 I!B1 + (VBE1 "VBE 2 ) # CC + R1 I B1 = 16, 5V 2 2 Vs est sensiblement égale à VCC/2. 3. Schéma du!montage pour les petites variations. 100 K! i2 B2 Norton R3 B1 R2 1 M! ve vs i1 R1 1 M! ve sachant que R2 >> résistance d’entrée en B2. R3 v Courant i1 : i1 = s R1 ! la relation (14) : vs = Rm ( ve " vs ) Avec R3 R1 v Rm R1 A! = s= ve R3 (R1 + Rm ) v R A = s " 1 = 10 Sachant que ! : Rm >>R1 ve R3 4. Courant i2 : i2 = ! ! 8 LM2900/LM3900/LM3301 Quad Amplifiers General Description Features The LM2900 series consists of four independent, dual input, internally compensated amplifiers which were designed specifically to operate off of a single power supply voltage and to provide a large output voltage swing. These amplifiers make use of a current mirror to achieve the non-inverting input function. Application areas include: ac amplifiers, RC active filters, low frequency triangle, squarewave and pulse waveform generation circuits, tachometers and low speed, high voltage digital logic gates. Y Y Y Y Y Y Y Y Wide single supply voltage 4 VDC to 32 VDC g 2 VDC to g 16 VDC Range or dual supplies Supply current drain independent of supply voltage Low input biasing current 30 nA High open-loop gain 70 dB Wide bandwidth 2.5 MHz (unity gain) a Large output voltage swing (V b 1) Vp-p Internally frequency compensated for unity gain Output short-circuit protection Schematic and Connection Diagrams Dual-In-Line and S.O. TL/H/7936 – 2 Top View TL/H/7936 – 1 C1995 National Semiconductor Corporation TL/H/7936 Order Number LM2900N, LM3900M, LM3900N or LM3301N See NS Package Number M14A or N14A RRD-B30M115/Printed in U. S. A. LM2900/LM3900/LM3301 Quad Amplifiers February 1995 Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. LM2900/LM3900 LM3301 Supply Voltage 32 VDC 28 VDC g 16 VDC g 14 VDC Power Dissipation (TA e 25§ C) (Note 1) Molded DIP 1080 mW 1080 mW S.O. Package 765 mW a b Input Currents, IIN or IIN 20 mADC 20 mADC Output Short-Circuit DurationÐOne Amplifier Continuous Continuous TA e 25§ C (See Application Hints) b 40§ C to a 85§ C Operating Temperature Range b 40§ C to a 85§ C LM2900 LM3900 0§ C to a 70§ C b 65§ C to a 150§ C b 65§ C to a 150§ C Storage Temperature Range 260§ C Lead Temperature (Soldering, 10 sec.) 260§ C Soldering Information Dual-In-Line Package Soldering (10 sec.) 260§ C 260§ C Small Outline Package Vapor Phase (60 sec.) 215§ C 215§ C Infrared (15 sec.) 220§ C 220§ C See AN-450 ‘‘Surface Mounting Methods and Their Effect on Product Reliability’’ for other methods of soldering surface mount devices. ESD tolerance (Note 7) 2000V 2000V Electrical Characteristics TA e 25§ C, V a e 15 VDC, unless otherwise stated LM2900 Parameter Open Loop Voltage Gain Voltage Gain LM3900 LM3301 Conditions Units Over Temp. DVO e 10 VDC Inverting Input Min Typ Max Min Typ Max Min Typ Max 1.2 2.8 2.8 2.8 1.2 1.2 V/mV Input Resistance 1 1 1 Output Resistance 8 8 9 kX 2.5 2.5 2.5 MHz Unity Gain Bandwidth Inverting Input Input Bias Current Inverting Input, V Inverting Input Slew Rate Positive Output Swing Negative Output Swing 0.5 20 Supply Current RL e % On All Amplifiers 6.2 Output Voltage Swing RL e 2k, a V e 15.0 VDC VOUT High a Output Source Current Sink Capability ISINK 30 b IIN e 0, IIN a e 0 a V e Absolute Maximum Ratings 200 30 200 10 6.2 0.2 300 0.5 20 10 13.5 0.09 30 0.5 20 13.5 b IIN e 10 mA, a IIN e 0 VOUT Low VOUT High e 5 VDC MX nA V/ms 6.2 10 0.09 0.2 mADC 13.5 0.09 0.2 VDC b IIN e 0, a IIN e 0 RL e % , 29.5 (Note 2) b VOL e 1V, IIN e 5 mA 29.5 6 18 6 10 5 18 0.5 1.3 0.5 1.3 0.5 1.3 5 2 26.0 5 5 mADC Electrical Characteristics (Note 6), V a e 15 VDC, unless otherwise stated (Continued) LM2900 Parameter LM3900 LM3301 Conditions Power Supply Rejection TA e 25§ C, f e 100 Hz Mirror Gain @ @ 20 mA (Note 3) 200 mA (Note 3) 20 mA to 200 mA (Note 3) Units Min Typ 0.90 0.90 1.0 1.0 Max Min Typ 1.1 1.1 0.90 0.90 1.0 1.0 70 Max Min 1.1 1.1 0.90 0.90 70 Typ Max 70 1 1 dB 1.10 1.10 mA/mA DMirror Gain @ 2 5 2 5 2 5 % Mirror Current (Note 4) 10 500 10 500 10 500 mADC Negative Input Current TA e 25§ C (Note 5) 1.0 1.0 Input Bias Current Inverting Input 300 300 1.0 mADC nA Note 1: For operating at high temperatures, the device must be derated based on a 125§ C maximum junction temperature and a thermal resistance of 92§ C/W which applies for the device soldered in a printed circuit board, operating in a still air ambient. Thermal resistance for the S.O. package is 131§ C/W. Note 2: The output current sink capability can be increased for large signal conditions by overdriving the inverting input. This is shown in the section on Typical Characteristics. Note 3: This spec indicates the current gain of the current mirror which is used as the non-inverting input. Note 4: Input VBE match between the non-inverting and the inverting inputs occurs for a mirror current (non-inverting input current) of approximately 10 mA. This is therefore a typical design center for many of the application circuits. Note 5: Clamp transistors are included on the IC to prevent the input voltages from swinging below ground more than approximately b 0.3 VDC. The negative input currents which may result from large signal overdrive with capacitance input coupling need to be externally limited to values of approximately 1 mA. Negative input currents in excess of 4 mA will cause the output voltage to drop to a low voltage. This maximum current applies to any one of the input terminals. If more than one of the input terminals are simultaneously driven negative smaller maximum currents are allowed. Common-mode current biasing can be used to prevent negative input voltages; see for example, the ‘‘Differentiator Circuit’’ in the applications section. Note 6: These specs apply for b 40§ C s TA s a 85§ C, unless otherwise stated. Note 7: Human body model, 1.5 kX in series with 100 pF. Application Hints Unintentional signal coupling from the output to the non-inverting input can cause oscillations. This is likely only in breadboard hook-ups with long component leads and can be prevented by a more careful lead dress or by locating the non-inverting input biasing resistor close to the IC. A quick check of this condition is to bypass the non-inverting input to ground with a capacitor. High impedance biasing resistors used in the non-inverting input circuit make this input lead highly susceptible to unintentional AC signal pickup. Operation of this amplifier can be best understood by noticing that input currents are differenced at the inverting-input terminal and this difference current then flows through the external feedback resistor to produce the output voltage. Common-mode current biasing is generally useful to allow operating with signal levels near ground or even negative as this maintains the inputs biased at a VBE. Internal clamp transistors (see note 5) catch-negative input voltages at approximately b0.3 VDC but the magnitude of current flow has to be limited by the external input network. For operation at high temperature, this limit should be approximately 100 mA. This new ‘‘Norton’’ current-differencing amplifier can be used in most of the applications of a standard IC op amp. Performance as a DC amplifier using only a single supply is not as precise as a standard IC op amp operating with split supplies but is adequate in many less critical applications. New functions are made possible with this amplifier which are useful in single power supply systems. For example, biasing can be designed separately from the AC gain as was shown in the ‘‘inverting amplifier,’’ the ‘‘difference integrator’’ allows controlling the charging and the discharging of the integrating capacitor with positive voltages, and the ‘‘frequency doubling tachometer’’ provides a simple circuit which reduces the ripple voltage on a tachometer output DC voltage. When driving either input from a low-impedance source, a limiting resistor should be placed in series with the input lead to limit the peak input current. Currents as large as 20 mA will not damage the device, but the current mirror on the non-inverting input will saturate and cause a loss of mirror gain at mA current levelsÐespecially at high operating temperatures. Precautions should be taken to insure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards in a test socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit. Output short circuits either to ground or to the positive power supply should be of short time duration. Units can be destroyed, not as a result of the short circuit current causing metal fusing, but rather due to the large increase in IC chip dissipation which will cause eventual failure due to excessive junction temperatures. For example, when operating from a well-regulated a 5 VDC power supply at TA e 25§ C with a 100 kX shunt-feedback resistor (from the output to the inverting input) a short directly to the power supply will not cause catastrophic failure but the current magnitude will be approximately 50 mA and the junction temperature will be above TJ max. Larger feedback resistors will reduce the current, 11 MX provides approximately 30 mA, an open circuit provides 1.3 mA, and a direct connection from the output to the non-inverting input will result in catastrophic faila ure when the output is shorted to V as this then places the base-emitter junction of the input transistor directly across the power supply. Short-circuits to ground will have magnitudes of approximately 30 mA and will not cause catastrophic failure at TA e 25§ C. 3 Typical Performance Characteristics Open Loop Gain Voltage Gain Voltage Gain Input Current Supply Current Large Signal Frequency Response Output Sink Current Output Class-A Bias Current Output Source Current Supply Rejection Mirror Gain Maximum Mirror Current TL/H/7936 – 9 4 Typical Applications (V a e 15 VDC) Inverting Amplifier Triangle/Square Generator a VODC e V 2 AV j b R2 R1 TL/H/7936– 3 TL/H/7936 – 4 Frequency-Doubling Tachometer Low VIN b VOUT Voltage Regulator TL/H/7936 – 5 TL/H/7936 – 6 Non-Inverting Amplifier Negative Supply Biasing a VODC e AV j V 2 VODC e R2 R1 AV j TL/H/7936 – 7 5 R2 b V R3 R2 R1 TL/H/7936 – 8 Typical Applications (V a e 15 VDC) (Continued) Low-Drift Ramp and Hold Circuit TL/H/7936 – 10 Bi-Quad Active Filter (2nd Degree State-Variable Network) Q e 50 fO e 1 kHz TL/H/7936 – 11 6 Typical Applications (V a e 15 VDC) (Continued) Voltage-Controlled Current Source (Transconductance Amplifier) TL/H/7936 – 12 Hi VIN , Lo (VIN b VO) Self-Regulator Q1 & Q2 absorb Hi VIN TL/H/7936 – 13 Ground-Referencing a Differential Input Signal TL/H/7936 – 14 7 Typical Applications (V a e 15 VDC) (Continued) Voltage Regulator Fixed Current Sources (VO e VZ a VBE) TL/H/7936–15 I2 e Voltage-Controlled Current Sink (Transconductance Amplifier) R1 I1 R2 TL/H/7936 – 16 Buffer Amplifier VIN t VBE TL/H/7936 – 18 TL/H/7936 – 17 Tachometer VODC e A fIN TL/H/7936 – 19 8 *Allows VO to go to zero. Typical Applications (V a e 15 VDC) (Continued) Low-Voltage Comparator Power Comparator No negative voltage limit if properly biased. TL/H/7936 – 21 TL/H/7936 – 20 Comparator Schmitt-Trigger TL/H/7936 – 22 TL/H/7936 – 23 Square-Wave Oscillator Pulse Generator TL/H/7936 – 24 TL/H/7936 – 25 Frequency Differencing Tachometer VODC e A (f1 b f2) TL/H/7936 – 26 9 Typical Applications (V a e 15 VDC) (Continued) Frequency Averaging Tachometer VODC e A (f1 a f2) TL/H/7936 – 27 Squaring Amplifier (W/Hysteresis) Bi-Stable Multivibrator TL/H/7936 – 29 TL/H/7936–28 Differentiator (Common-Mode Biasing Keeps Input at a VBE) ‘‘OR’’ Gate feAaBaC TL/H/7936 – 31 AV e 1 2 TL/H/7936 – 30 ‘‘AND’’ Gate Difference Integrator feA#B#C TL/H/7936–32 TL/H/7936 – 33 10 Typical Applications (V a e 15 VDC) (Continued) Low Pass Active Filter fO e 1 kHz TL/H/7936 – 34 Staircase Generator VBE Biasing AV j b R2 R1 TL/H/7936 – 35 TL/H/7936 – 36 Bandpass Active Filter fo e 1 kHz Q e 25 TL/H/7936 – 37 11 Typical Applications (V a e 15 VDC) (Continued) Low-Frequency Mixer TL/H/7936 – 38 Free-Running Staircase Generator/Pulse Counter TL/H/7936 – 39 12 Typical Applications (V a e 15 VDC) (Continued) Supplying IIN with Aux. Amp (to Allow Hi-Z Feedback Networks) TL/H/7936 – 40 One-Shot Multivibrator PW j 2 c 106C *Speeds recovery. TL/H/7936 – 41 Non-Inverting DC Gain to (0,0) TL/H/7936 – 42 13 Typical Applications (V a e 15 VDC) (Continued) Channel Selection by DC Control (or Audio Mixer) TL/H/7936 – 43 14 Typical Applications (V a e 15 VDC) (Continued) Power Amplifier TL/H/7936 – 44 One-Shot with DC Input Comparator a Trips at VIN j 0.8 V VIN must fall 0.8 V a prior to t2 TL/H/7936 – 45 High Pass Active Filter TL/H/7936 – 46 15 Typical Applications (V a e 15 VDC) (Continued) Sample-Hold and Compare with New a VIN TL/H/7936 – 47 Sawtooth Generator TL/H/7936 – 48 16 Typical Applications (V a e 15 VDC) (Continued) Phase-Locked Loop TL/H/7936 – 49 Boosting to 300 mA Loads TL/H/7936 – 50 17 Split-Supply Applications (V a e a 15 VDC & Vb e b15 VDC) Non-Inverting DC Gain TL/H/7936 – 51 AC Amplifier TL/H/7936 – 52 18