BU3 Block Diagram

1
2
3
PCB STACK UP
4
5
6
7
8
BU3 Block Diagram
LAYER 1 : TOP
LAYER 2 : GND1
LAYER 3 : IN1
PENRYN-SFF
LAYER 4 : GND
A
Micro-FCBGA956/10W
LAYER 5 : VCC
FSB
LAYER 6 : IN2
LAYER 7 : GND2
A
P3,4
FSB(667/800/1066MHZ)
DDR SYSTEM MEMORY
LAYER 8 : BOT
DDRIII-SODIMM1
DDRIII-SODIMM2
P16
FSB
PCI-E
USB-3
INT_LVDS
Graphics Interfaces
Dual Channel DDR III
800/1066 MHZ
CANTIGA-SFF
NB
P5,6,7,8,9,10,11
DMI
LCD/CCD Con. P17
INT_CRT
CRT Con.
P17
PCI-Ex16
USB-5
DMI(x2/x4)
Main SATA - HDD
SATA
DMI
P22
B
HDMI/USB Con.
P18
SATA 0
B
11.6" SATA HDD
PCI-E
P22
SATA
P22
Bluetooth Con.
USB
3G
USB-6
Intel I/O Controller Hub 9
(ICH9M-SFF)
USB 2.0 (Port0~9)
USB-2
CK505
PCIE-3
SATA 1
SATA - ODD
PCI-Express
POWER SYSTEM
ISL88731
ISL6237
RT8152B
TPS51116REGR
UP6111AQDD
RT9205
ISL6263A
Sim Con.
USB-7
P20
P20
SB
P21
P12, 13, 14, 15
USB-9
USB SW
PCIE-6
P18
P2
P24
P25
P26
P27
P28
P29
P30
WiFi or WiMAX
USB-10
P20
C
VCC_CORE
PCIE-5
Atheros
10/100 Lan
C
RTC
P23
Azalia
+1.8V
BATTERY
IHDA
LPC
P12
+1.05V
LPC
+1.5VSUS
+1.5V
LAN CON.&Audio&Card Reader&USB*2/B
EC
P26
+3VPCU
+3V_S5
+3VSUS
+3V
+5VPCU
+5V
+SMDDR_VTERM
+SMDDR_VREF
P22
USB-1
MIC JACK
FAN
HP/SPDIF
TP/LED/Hall Sensor Con.
P3
Port-A
USB-0
USB*2 Con.
LAN Con.
D
Port-B
Audio Codec
SPK Con.
Card Reader
USB-4
Power /B
Con.
P21
P19
K/B Con.
SPI Flash
P21
G-Sensor
P22
P19
P21
D
Kill SW
P21
Quanta Computer Inc.
PROJECT : BU3
Size
Document Number
Date:
Monday, August 10, 2009
Rev
D3B
Block Diagram
1
2
3
4
5
6
7
Sheet
8
1
of
34
1
2
3
4
+3V
CLOCK GEN
L24
5
6
7
8
0.25A +3V_VDD_CK_VDD
(20mils)
PBY160808T-301Y-N_6
C353
0.1u/10V_4
A
C270
C371
0.1u/10V_4
0.1u/10V_4
C372
C263
0.1u/10V_4
10u/6.3V_8
+3V
R140
2.2K_4
H_STP_PCI#
R139
2.2K_4
H_STP_CPU#
A
F3B
U18
9
4
23
16
46
62
VDD_PCI
VDD_REF
VDD_PLL3
VDD_48
VDD_SRC
VDD_CPU
C368
0.1u/10V_4
L19
PBY160808T-301Y-N_6
0.25A
(20mils)
+1.05V_CK_VDD_IO
C258
C357
C364
C352
C358
C355
C367
10u/6.3V_8
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
R189
[20] PCLK_DEBUG
B
33_4
T88
PCLK_591
CLK_PCI_ICH
[22] PCLK_591
[13] CLK_PCI_ICH
[14]
[3]
[3]
[3]
[14]
EMI RESERVE
CLK_PCI_ICH
33_4
33_4
R333
R327
33_4
2.2K_4
R341
R340
10K_4
33_4
8
10
11
12
13
14
FSA_R
17
64
5
*33p/50V_4
CLK_ICH_14M
C277
*33p/50V_4
33p/50V_4
FSC_R
SRC-6
SRC-6#
CR#_F/SRC-7
CR#_E/SRC-7#
FSA/USB48
FSB/TEST_MODE
FSC/TEST_SEL/REF
SRC-10
SRC-10#
CR#_H/SRC-11
CR#_G/SRC-11#
SDATA
SCLK
CK_PWRGD/PD#
2
3
Y5
14.318MHZ
SRC-9
SRC-9#
RESET#
6
7
CG_XOUT
CG_XIN
1
*33p/50V_4
PCI_STOP#/SRC-5
CPU_STOP#/SRC5-5#
XOUT
XIN
GND1
C374
C
RP17
4
2
3 *short_4P2R
1
CLK_CPU_BCLK [3]
CLK_CPU_BCLK# [3]
To CPU BCLK
58
57
CLK_MCH_BCLK_R
CLK_MCH_BCLK#_R
RP15
4
2
3 *short_4P2R
1
CLK_MCH_BCLK [5]
CLK_MCH_BCLK# [5]
To NB HPLL_CLK
20
21
DOT96_SSC_R
DOT96_SSC#_R
RP16
2
4
1 *short_4P2R
3
MCH_DREFCLK [6]
MCH_DREFCLK# [6]
To NB DPLL_REF_CLK
24
25
DREF_SSCLK_R
DREF_SSCLK#_R
RP14
2
4
1 *short_4P2R
3
DREF_SSCLK [6]
DREF_SSCLK# [6]
To NB DPLL_REF_SSCLK
28
29
CLK_PCIE_SATA_R
CLK_PCIE_SATA#_R
RP13
2
4
1 *short_4P2R
3
CLK_PCIE_SATA [12]
CLK_PCIE_SATA# [12]
To ICH9 SATA_CLK
31
32
CLK_PCIE_ICH_R
CLK_PCIE_ICH#_R
RP12
2
4
1 *short_4P2R
3
CLK_PCIE_ICH [13]
CLK_PCIE_ICH# [13]
To ICH9 DMI_CLK
34
35
CLK_PCIE_MINI1_R
CLK_PCIE_MINI1#_R
RP11
2
4
1 *short_4P2R
3
CLK_PCIE_MINI1 [20]
CLK_PCIE_MINI1# [20]
To Mini Card 1
45
44
H_STP_PCI#
H_STP_CPU#
H_STP_PCI# [14]
H_STP_CPU# [14]
From SB CLK
48
47
CLK_PCIE_3G_R
CLK_PCIE_3G#_R
CLK_PCIE_3G [20]
CLK_PCIE_3G# [20]
To 3G Card
51
50
CLK_CR#_F
CLK_CR#_E
54
53
CLK_SRC8
CLK_SRC8#
37
38
CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R
RP10
2
4
1 *short_4P2R
3
CLK_PCIE_LAN [23]
CLK_PCIE_LAN# [23]
To PCIE LAN
41
42
MCH_3GPLL_R
MCH_3GPLL#_R
RP9
2
4
1 *short_4P2R
3
CLK_MCH_3GPLL [6]
CLK_MCH_3GPLL# [6]
To NB PEG_CLK
40
39
CLK_3GPLLREQ#_R
CLK_CR#_G
CLK_3GPLLREQ#
From NB CLKREQ#
RP21
3 *3G@0X2
1
4
2
B1A
T78
T77
T85
T81
R300
B1A
D3A
B
F3B
475/F_4
[6]
T76
63
CLK_PWRGD
[14]
To ICH9 CK_PWRGD
65
ICS9LPRS365BKLFT INS109622231
2
C370
SRC-4
SRC-4#
SRC-8/CPU_ITP
SRC-8#/CPU_ITP#
CGDAT_SMB
CGCLK_SMB
C373
CLK_ICH_48M
CR#_C/SRC-3
CR#_D/SRC-3#
CR#_A/PCI-0
CR_B/PCI-1
TME/PCI-2
SRC5_EN/PCI-3
27M_SEL/PCI-4
ITP_EN/PCIF-5#
55
D3A
SRC-1/SE1
SRC-1#/SE2
SRC-2/SATA
SRC-2#/SATA#
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
*33p/50V_4
C275
QFN64
SRC-0/DOT96
SRC-0#/DOT96#
CLK_CPU_BCLK_R
CLK_CPU_BCLK#_R
74
73
72
71
70
69
68
67
66
C276
CLK_ICH_48M
CPU_MCH_BSEL0
CPU_MCH_BSEL1
CPU_MCH_BSEL2
CLK_ICH_14M
CLK_ICH_48M
CPU_MCH_BSEL0
CPU_MCH_BSEL1
CPU_MCH_BSEL2
CLK_ICH_14M
R338
R339
VDD_IO1
VDD_IO2
VDD_IO3
VDD_IO4
VDD_IO5
VDD_IO6
15
18
22
26
30
36
49
59
1
PCLK0
PCLK1
PCLK2
PCLK3
PCLK_591_R
CLK_PCI_ICH_R
CK505
CPU-1
CPU-1#
61
60
74
73
72
71
70
69
68
67
66
+1.05V
PCLK_591
19
27
33
43
52
56
CPU-0
CPU-0#
33p/50V_4
C
BSEL Frequency Select Table
Clock Gen Strap
Clock Gen I2C
+3V
FSB
FSA
CPU
SRC
PCI
1
0
1
100
100
33
0
0
1
133
100
33
0
1
1
166
100
33
0
1
0
200
100
33
0
0
0
266
100
33
1
0
0
333
100
33
1
1
0
400
100
33
1
1
1
RSVD
100
33
SLG8SP513
PULL HIGH
PCI2/TME
NO OVERCLOCKING
PULL DOWN
R349
PIN11
PIN12
PCI-3
(default)
2
FSC
NORMAL RUN
PIN44/45 IS SRC5
PIN44/45 IS
PCI_STOP/CPU_STOP
(default)
(default)
[14,23] SDATA
(default)
3
Q29
PIN13
PCI-4/27M_SEL
PIN 24/25 IS 27MHz
PIN 21/20
IS SRC/DOT
PIN14
PCIF-5/ITP_EN
PIN 53/54 IS CPUITP
PIN 53/54 IS SRC
10K_4
1
CGDAT_SMB
CGDAT_SMB [16,20]
ME2N7002E
+3V
SMbus address D2
2
R344
+1.05V
R328
R334
D
+1.05V
*1K_4
R331
1K_4
[14,23] SCLK
MCH_BSEL0
[6]
3
10K_4
1
Q30
CGCLK_SMB
*1K_4
R326
*1K_4
*1K_4
CPU_MCH_BSEL1
CPU_MCH_BSEL2
R329
1K_4
R348
1K_4
MCH_BSEL1
MCH_BSEL2
+3V
R187
10K_4
+3V
R185
*10K_4
+3V
R182
*10K_4
[6]
[6]
PCLK2
R188
*10K_4
[16,20]
PCLK3
R337
10K_4
PCLK_591_R
R184
10K_4
CLK_PCI_ICH_R
R183
10K_4
D
PROJECT : BU3
Quanta Computer Inc.
Size
Custom
NB7
Document Number
2
3
4
5
6
7
Rev
D3B
CLOCK GEN_9LPRS365BKLFT
Date: Monday, August 10, 2009
1
CGCLK_SMB
ME2N7002E
*1K_4
R330
R355
CPU_MCH_BSEL0
Sheet
2
8
of
34
2
H_A#[3..16]
[5] H_A#[17..35]
7
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#[17..35]
R1
R5
U1
P4
W5
[12] H_A20M#
[12] H_FERR#
[12] H_IGNNE#
F8
C9
C5
E5
H_STPCLK#
H_INTR
H_NMI
H_SMI#
B
LOCK#
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#
A20M#
FERR#
IGNNE#
BR0#
IERR#
INIT#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
M4
J5
L5
H_ADS# [5]
H_BNR# [5]
H_BPRI# [5]
N5
F38
J1
H_DEFER# [5]
H_DRDY# [5]
H_DBSY# [5]
M2
B40
D8
H_BR0# [5]
H_IERR#
8
Layout Note:
Place Resistor close to CPU.
R274
56_4
+1.05V
H_LOCK# [5]
H_RESET#
H_RESET# [5]
H_RS#0 [5]
H_RS#1 [5]
H_RS#2 [5]
H_TRDY# [5]
H2
F2
[5] H_DSTBN#0
[5] H_DSTBP#0
[5] H_DINV#0
H_HIT# [5]
H_HITM# [5]
AY8
BA7
BA5
AY2
AV10
AV2
AV4
AW7
AU1
AW5
AV8
J7
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5
ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_DBRESET#
D38
BB34
BD34
H_PROCHOT#_D
H_THERMDA
H_THERMDC
B10
H_PM_THRMTRIP#
[5] H_D#[16..31]
PROCHOT#
THERMDA
THERMDC
THERMTRIP#
STPCLK#
LINT0
LINT1
SMI#
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
R265
[5] H_DSTBN#1
[5] H_DSTBP#1
[5] H_DINV#1
1K/F_4
R276
R273
C336
BCLK[0]
BCLK[1]
RSVD01
RSVD02
RSVD03
RSVD04
RSVD05
RSVD06
RSVD07
A35
C35
T73
*0.1u/10V_4
2K/F_4
CLK_CPU_BCLK [2]
CLK_CPU_BCLK# [2]
P44
V40
V44
AB44
R41
W41
N43
U41
AA41
AB40
AD40
AC41
AA43
Y40
Y44
T44
U43
W43
R43
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
V_CPU_GTLREF AW43
CPU_TEST1
E37
CPU_TEST2
D40
CPU_TEST3
C43
CPU_TEST4
AE41
CPU_TEST5
AY10
CPU_TEST6
AC43
*1K_4
*1K_4
R267
H CLK
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
T4
T72
H_D#[32..47] [5]
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
AP44
AR43
AH40
AF40
AJ43
AG41
AF44
AH44
AM44
AN43
AM40
AK40
AG43
AP40
AN41
AL41
AK44
AL43
AJ41
A
H_DSTBN#2 [5]
H_DSTBP#2 [5]
H_DINV#2 [5]
H_D#[48..63]
+1.05V
ITP_DBRESET# [14]
F40
G43
E43
J43
H40
H44
G39
E41
L41
K44
N41
T40
M40
G41
M44
L43
K40
J41
P40
H_D#[16..31]
T1
T2
T5
T8
T7
T6
THERMAL
H_D#[32..47]
U14B
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_INIT# [12]
N1
G5
K2
H4
K4
L1
H_D#[0..15]
[5] H_D#[0..15]
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
A37
C37
B38
[2] CPU_MCH_BSEL0
[2] CPU_MCH_BSEL1
[2] CPU_MCH_BSEL2
RESERVED
V2
Y2
AG5
AL5
J9
F4
H8
DEFER#
DRDY#
DBSY#
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
ICH
C7
D4
F10
ADS#
BNR#
BPRI#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
DATA GROUP 1
AN1
AK4
AG1
AT4
AK2
AT2
AH2
AF4
AJ5
AH4
AM4
AP4
AR5
AJ1
AL1
AM2
AU5
AP2
AR1
AN5
A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
ADDR GROUP 1
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
P2
V4
W1
T4
AA1
AB4
T2
AC5
AD2
AD4
AA5
AE5
AB2
AC1
Y4
DATA GROUP 2
H_REQ#[0..4]
[5] H_ADSTB#1
[12]
[12]
[12]
[12]
6
DATA GROUP 3
[5] H_ADSTB#0
[5] H_REQ#[0..4]
5
DATA GROUP 0
A
4
U14A
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
CONTROL
[5] H_A#[3..16]
ADDR GROUP 0
CPU
3
XDP/ITP SIGNALS
1
MISC
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
BSEL[0]
BSEL[1]
BSEL[2]
AV38
AT44
AV40
AU41
AW41
AR41
BA37
BB38
AY36
AT40
BC35
BC39
BA41
BB40
BA35
AU43
AY40
AY38
BC37
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
AE43
AD44
AE1
AF2
COMP0
COMP1
COMP2
COMP3
H_D#[48..63] [5]
H_DSTBN#3 [5]
H_DSTBP#3 [5]
H_DINV#3 [5]
G7
B8
C41
E7
D10
BD10
R269
R272
R270
R268
27.4/F_6
54.9/F_4
27.4/F_6
54.9/F_4
Layout note:
comp0,2: Zo=27.4ohm, L<0.5"
comp1,3: Zo=55ohm, L<0.5"
H_DPRSTP# [6,12,26]
H_DPSLP# [12]
H_DPWR# [5]
H_PWRGOOD [12]
H_CPUSLP# [5]
T3
H_PSI#
B
Penryn_SFF_1p0
Layout Note:
Place voltage divider
within 0.5" of GTLREF pin
Penryn_SFF_1p0
Thermal Trip
CPU Thermal Monitor
+3V
+3V
30mA(20mils)
F3B
+3V
+1.05V
R12
2
+1.05V
LM86VCC
*short_6
3
3
[22] 2ND_MBCLK
C34
0.1u/10V_4
C27
*100p/50V_4
Q7
1
R13
R15
R18
10K_4
10K_4
10K_4
ME2N7002E
R34
D4
*10K_4
*BAS316
+3V
U2
H_THERMDA
Q8
1
ME2N7002E
Q15
2
2
[6,14,26] DELAY_VR_PWRGOOD
+1.05V
3
[22] 2ND_MBDATA
R33
R35
R29
1K_4
100K_4
56.2/F_4
Q14
1
ME2N7002E
SMB_MBCLK
8
SMB_MBDATA
7
THERM_ALERT#_T
6
H_PM_THRMTRIP#
1
MMBT3904-7-F
3
D3
[14] THERM_ALERT#
*BAS316
R19
+3V
Voltage Level shift
10K_4
*0_4
PM_THRMTRIP# [6,12]
3
No use Thermal trip CPU side still PU 56ohm.
Use Thermal trip can share PU at SB side
C69
*1u/16V_6
R24
+3V
DXP
ALERT#
DXN
OVERT#
GND
Q11
MMBT3904-7-F
1THER_SHDN#
+3V
*1K_4
2
1
C1
[22] FANSIG
2.2u/6.3V_6
Q13
R277
*2.2k_4
H_PROCHOT#_EC [22]
51/F_4
ITP_TDI
R266
*51/F_4
ITP_TDO
R264
51/F_4
ITP_TMS
R4
51/F_4
ITP_BPM#5
R263
51/F_4
*0_4
1
Q1
40mils
*0.01u/16V_4
ITP_TCK
R257
51/F_4
ITP_TRST#
3
ME2N7002E
CPUFANON#
1
4
[22] VFAN
VIN
VO
GND
/FON GND
GND
VSET GND
3
5
6
7
8
TH_FAN_POWER
C330
C331
10u/6.3V_8
0.01u/25V_4
G995P1U
No use PROCHOT CPU side still PU 56ohm.
Use PROCHOT to optional receiver CPU side PU
68ohm and through isolat 2.2K ohm to receiver side
D
CN15
U1
2
THERM_ALERT#_T
R32
[26] H_PROCHOT#
R262
C329
3mA(25mils)
2
H_PROCHOT#_D
C
H_THERMDC
10K_4
+3V
*MMBT3904-7-F
3
2200p/50V_6
5
R254
R278
68_4
3
+1.05V
+5V
D
C44
MSOP8 LM95245 : AL095245000
+1.05V
R31
2
ADDRESS: 98H
XDP
+1.05V
1
330_4
CPU FAN CTRL
Processor Hot
VCC
SDA
LM95245CIMM NOPB
SYS_SHDN# [25]
SYS_SHDN#
R27
4
2
2
C
SCLK
1
2
3
H_RESET#
R25
*51/F_4
+1.05V
85205-0300L
PROJECT : BU3
Quanta Computer Inc.
Layout Note:
Place Resistor close to CPU
with Stub length <200mils.
FANPWR = 1.6*VSET
Size
Custom
NB7
Document Number
1
2
3
4
5
6
7
Rev
D3B
Penryn (HOST BUS)
Date: Monday, August 10, 2009
Sheet
8
3
of
34
1
3
4
5
7
8
+1.05V
+VCC_CORE
U14C
B
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
AB28
AD30
AD28
Y26
AB26
AD26
AF30
AF28
AH30
AH28
AF26
AH26
AK30
AK28
AM30
AM28
AP30
AP28
AK26
AM26
AP26
AT30
AT28
AV30
AV28
AY30
AY28
AT26
AV26
AY26
BB30
BB28
BD30
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
U14F
+1.05V
4.5A (VCC PLANE)
J11
E11
G11
J37
K38
L37
N37
P38
R37
U37
V38
W37
AA37
AB38
AC37
AE37
VCCP_001
VCCP_002
VCCP_003
VCCP_004
VCCP_005
VCCP_006
VCCP_007
VCCP_008
VCCP_009
VCCP_010
VCCP_011
VCCP_012
VCCP_013
VCCP_014
VCCP_015
VCCP_016
F3B
+ C342
*220u/2.5V_3528
+1.5V
+VCCA_PROC
BD8
BC7
BB10
BB8
BC5
BB4
AY4
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VCCSENSE
VSSSENSE
F3B
0.13A (20mils)
B34
D34
VCCA[01]
VCCA[02]
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
R279
+VCC_CORE
[26]
[26]
[26]
[26]
[26]
[26]
[26]
*short_6
C343
C344
0.01u/25V_4
10u/6.3V_8
R256
100/F_4
BD12
VCCSENSE
[26]
BC13
VSSSENSE
[26]
Penryn_SFF_1p0
R255
100/F_4
+VCC_CORE
+ C101
330u/2.5V_7343
U14E
18A (VCC PLANE)
1
F32
G33
H32
J33
K32
L33
M32
N33
P32
R33
T32
U33
V32
W33
Y32
AA33
AB32
AC33
AD32
AE33
AF32
AG33
AH32
AJ33
AK32
AL33
AM32
AN33
AP32
AR33
AT34
AT32
AU33
AV32
AY32
BB32
BD32
B28
B30
B26
D28
D30
F30
F28
H30
H28
D26
F26
H26
K30
K28
M30
M28
K26
M26
P30
P28
T30
T28
V30
V28
P26
T26
V26
Y30
Y28
AB30
A
C
6
+VCC_CORE
+VCC_CORE
2
CPU
2
C40
C17
C23
C61
C41
C42
C25
C60
C24
C14
C62
C20
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
+VCC_CORE
C31
C46
C32
C67
C65
C78
C72
C30
C12
C73
C29
C15
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
C19
C71
C45
C76
C13
C47
C21
C68
C74
C77
C66
C16
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
+VCC_CORE
+1.05V
BD28
BB26
BD26
B22
B24
D22
D24
F24
F22
H24
H22
K24
K22
M24
M22
P24
P22
T24
T22
V24
V22
Y24
Y22
AB24
AB22
AD24
AD22
AF24
AF22
AH24
AH22
AK24
AK22
AM24
AM22
AP24
AP22
AT24
AT22
AV24
AV22
AY24
AY22
BB24
BB22
BD24
BD22
B16
B18
B20
D16
D18
F18
F16
H18
H16
D20
F20
H20
K18
K16
M18
M16
K20
M20
P18
P16
T18
T16
V18
V16
P20
T20
V20
Y18
Y16
AB18
AB16
AD18
AD16
Y20
AB20
AD20
AF18
AF16
AH18
AH16
AF20
AH20
AK18
AK16
AM18
AM16
AP18
AP16
AK20
AM20
AP20
AT18
AT16
AV18
AV16
AY18
AY16
AT20
AV20
AY20
BB18
BB16
BD18
BD16
BB20
BD20
AM14
AP14
AT14
AV14
AY14
BB14
BD14
AF38
AG37
AJ37
AK38
+1.05V
D
C75
C36
C52
C26
C18
C70
C64
C63
C22
C43
C28
C48
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
VCC_101
VCC_102
VCC_103
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
VCC_110
VCC_111
VCC_112
VCC_113
VCC_114
VCC_115
VCC_116
VCC_117
VCC_118
VCC_119
VCC_120
VCC_121
VCC_122
VCC_123
VCC_124
VCC_125
VCC_126
VCC_127
VCC_128
VCC_129
VCC_130
VCC_131
VCC_132
VCC_133
VCC_134
VCC_135
VCC_136
VCC_137
VCC_138
VCC_139
VCC_140
VCC_141
VCC_142
VCC_143
VCC_144
VCC_145
VCC_146
VCC_147
VCC_148
VCC_149
VCC_150
VCC_151
VCC_152
VCC_153
VCC_154
VCC_155
VCC_156
VCC_157
VCC_158
VCC_159
VCC_160
VCC_161
VCC_162
VCC_163
VCC_164
VCC_165
VCC_166
VCC_167
VCC_168
VCC_169
VCC_170
VCC_171
VCC_172
VCC_173
VCC_174
VCC_175
VCC_176
VCC_177
VCC_178
VCC_179
VCC_180
VCC_181
VCC_182
VCC_183
VCC_184
VCC_185
VCC_186
VCC_187
VCC_188
VCC_189
VCC_190
VCC_191
VCC_192
VCC_193
VCC_194
VCC_195
VCC_196
VCC_197
VCC_198
VCC_199
VCC_200
VCC_201
VCC_202
VCC_203
VCC_204
VCC_205
VCC_206
VCC_207
VCC_208
VCC_209
VCC_210
VCC_211
VCC_212
VCC_213
VCC_214
VCC_215
VCC_216
VCC_217
VCC_218
VCC_219
VCC_220
VCCP_017
VCCP_018
VCCP_019
VCCP_020
VCCP_021
VCCP_022
VCCP_023
VCCP_024
VCCP_025
VCCP_026
VCCP_027
VCCP_028
VCCP_029
VCCP_030
VCCP_031
VCCP_032
VCCP_033
VCCP_034
VCCP_035
VCCP_036
VCCP_037
VCCP_038
VCCP_039
VCCP_040
VCCP_041
VCCP_042
VCCP_043
VCCP_044
VCCP_045
VCCP_046
VCCP_047
VCCP_048
VCCP_049
VCCP_050
VCCP_051
VCCP_052
VCCP_053
VCCP_054
VCCP_055
VCCP_056
VCCP_057
VCCP_058
VCCP_059
VCCP_060
VCCP_061
VCCP_062
VCCP_063
VCCP_064
VCCP_065
VCCP_066
VCCP_067
VCCP_068
VCCP_069
VCCP_070
VCCP_071
VCCP_072
VCCP_073
VCCP_074
VCCP_075
VCCP_076
VCCP_077
VCCP_078
VCCP_079
VCCP_080
VCCP_081
VCCP_082
VCCP_083
VCCP_084
VCCP_085
VCCP_086
VCCP_087
VCCP_088
VCCP_089
VCCP_090
VCCP_091
VCCP_092
VCCP_093
VCCP_094
VCCP_095
VCCP_096
VCCP_097
VCCP_098
VCCP_099
VCCP_100
VCCP_101
VCCP_102
VCCP_103
VCCP_104
VCCP_105
VCCP_106
VCCP_107
VCCP_108
VCCP_109
VCCP_110
VCCP_111
VCCP_112
VCCP_113
VCCP_114
VCCP_115
VCCP_116
VCCP_117
VCCP_118
VCCP_119
VCCP_120
VCCP_121
VCCP_122
VCCP_123
VCCP_124
VCCP_125
VCCP_126
VCCP_127
VCCP_128
VCCP_129
VCCP_130
VCCP_131
VCCP_132
VCCP_133
VCCP_134
VCCP_135
VCCP_136
VCCP_137
VCCP_138
VCCP_139
VCCP_140
VCCP_141
VCCP_142
VCCP_143
VCCP_144
VCCP_145
G25
G23
G21
J25
J23
J21
L25
L23
L21
N25
N23
N21
R25
R23
R21
U25
U23
U21
W25
W23
W21
AA25
AA23
AA21
AC25
AC23
AC21
AE25
AE23
AE21
AG25
AG23
AG21
AJ25
AJ23
AJ21
AL25
AL23
AL21
AN25
AN23
AN21
AR25
AR23
AR21
AU25
AU23
AU21
AW25
AW23
AW21
BA25
BA23
BA21
BC25
BC23
BC21
C17
C19
E19
E17
G19
G17
J19
J17
L19
L17
N19
N17
R19
R17
U19
U17
W19
W17
AA19
AA17
AC19
AC17
AE19
AE17
AG19
AG17
AJ19
AJ17
AL19
AL17
AN19
AN17
AR19
AR17
AU19
AU17
AW19
AW17
BA19
BA17
BC19
BC17
C11
C15
E15
G15
H10
M12
J15
L15
N15
M10
T12
R15
U15
W15
T10
Y12
AD12
AL37
AN37
AP38
B32
C33
D32
E35
E33
F34
G35
F36
H36
J35
L35
N35
K36
R35
U35
P36
V36
W35
AA35
AC35
AB36
AE35
AG35
AJ35
AF36
AL35
AN35
AK36
AP36
B12
B14
C13
D12
D14
E13
F14
F12
G13
H14
H12
J13
K14
K12
L13
L11
M14
N13
N11
K10
P14
P12
R13
R11
T14
U13
U11
V14
V12
W13
W11
P10
V10
Y14
AA13
AA11
AB14
AB12
AC13
AC11
AD14
AB10
AE13
AE11
AF14
AF12
AG13
AG11
AH14
AJ13
AJ11
AF10
AK14
AK12
AL13
AL11
AN13
AN11
AP12
AR13
AR11
AK10
AP10
AU13
AU11
L9
L7
N9
N7
R9
R7
U9
U7
W9
W7
AA9
AA7
AC9
AC7
AE9
AE7
AG9
AG7
AJ9
AJ7
AL9
AL7
AN9
AN7
AR9
AR7
A33
A13
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
U14D
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
VSS_361
VSS_362
VSS_363
VSS_364
VSS_365
VSS_366
VSS_367
VSS_368
VSS_369
VSS_370
VSS_371
VSS_372
VSS_373
VSS_374
VSS_375
VSS_376
VSS_377
VSS_378
VSS_379
VSS_380
VSS_381
VSS_382
VSS_383
VSS_384
VSS_385
VSS_386
VSS_387
VSS_388
VSS_389
VSS_390
VSS_391
VSS_392
VSS_393
VSS_394
VSS_395
AA15
AC15
Y10
AD10
AH12
AE15
AG15
AJ15
AH10
AM12
AL15
AN15
AR15
AM10
AT12
AV12
AW13
AW11
AY12
AU15
AW15
AT10
BA13
BA11
BB12
BC11
BA15
BC15
B6
D6
E9
F6
G9
H6
K8
K6
M8
M6
P8
P6
T8
T6
V8
V6
U5
Y8
Y6
AB8
AB6
AD8
AD6
AF8
AF6
AH8
AH6
AK8
AK6
AM8
AM6
AP8
AP6
AT8
AT6
AU9
AV6
AU7
AW9
AY6
BA9
BB6
BC9
BD6
B4
C3
E3
G3
J3
L3
N3
R3
U3
W3
AA3
AC3
AE3
AG3
AJ3
AL3
AN3
AR3
AU3
AW3
BA3
BC3
D2
E1
G1
AW1
BA1
BB2
A41
A39
A29
A27
A31
A25
A23
A21
A19
A17
A11
A15
A7
A5
A9
BD4
B42
F44
D44
D42
F42
H42
K42
M42
P42
T42
V42
Y42
AB42
AD42
AF42
AH42
AK42
AM42
AP42
AY44
AV44
AT42
AV42
AY42
BA43
BB42
C39
E39
G37
H38
J39
L39
M38
N39
R39
T38
U39
W39
Y38
AA39
AC39
AD38
AE39
AG39
AH38
AJ39
AL39
AM38
AN39
AR39
AR37
AT38
AU39
AU37
AW39
AW37
BA39
BC41
BD40
BD38
B36
H34
D36
K34
M34
M36
P34
T34
V34
T36
Y34
AB34
AD34
Y36
AD36
AF34
AH34
AH36
AK34
AM34
AP34
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
AM36
AR35
AU35
AV34
AW35
AW33
AY34
AT36
AV36
BA33
BC33
BB36
BD36
C27
C29
C31
E29
E27
G29
G27
E31
G31
J29
J27
L29
L27
N29
N27
J31
L31
N31
R29
R27
U29
U27
R31
U31
W29
W27
W31
AA29
AA27
AC29
AC27
AA31
AC31
AE29
AE27
AG29
AG27
AJ29
AJ27
AE31
AG31
AJ31
AL29
AL27
AN29
AN27
AL31
AN31
AR29
AR27
AR31
AU29
AU27
AW29
AW27
AU31
AW31
BA29
BA27
BC29
BC27
BA31
BC31
C21
C23
C25
E25
E23
E21
A
B
Penryn_SFF_1p0
C
Penryn_SFF_1p0
D
Penryn_SFF_1p0
PROJECT : BU3
Quanta Computer Inc.
Size
Custom
NB7
Document Number
1
2
3
4
5
6
7
Rev
D3B
Penryn (POWER/NC)
Date: Monday, August 10, 2009
Sheet
8
4
of
34
1
2
3
4
5
6
GS45
H_A#[3..35]
U15A
H_D#[0..63]
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
A
+1.05V_VCCP_GMCH
R50
221/F_4
H_SWING
R53
C132
100/F_4
0.1u/10V_4
B
Layout Note:
H_RCOMP trace should be
10-mil wide with 20-mil spacing.
R47
24.9/F_4
H_RCOMP
C
H_SWING
H_RCOMP
+1.05V_VCCP_GMCH
R63
1K/F_4
J7
H6
L11
J3
H4
G3
K10
K12
L1
M10
M6
N11
L7
K6
M4
K4
P6
W9
V6
V2
P10
W7
N9
P4
U9
V4
U1
W3
V10
U7
W11
U11
AC11
AC9
Y4
Y10
AB6
AA9
AB10
AA1
AC3
AC7
AD12
AB4
Y6
AD10
AA11
AB2
AD4
AE7
AD2
AD6
AE3
AG9
AG7
AE11
AK6
AF6
AJ9
AH6
AF12
AH4
AJ7
AE9
B6
D4
J11
G9
[3] H_RESET#
[3] H_CPUSLP#
H_AVREF
L17
K18
F3B
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_SWING
H_RCOMP
H_CPURST#
H_CPUSLP#
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
HOST
[3] H_D#[0..63]
7
L15
B14
C15
D12
F14
G17
B12
J15
D16
C17
D14
K16
F16
B16
C21
D18
J19
J21
B18
D22
G19
J17
L21
L19
G21
D20
K22
F18
K20
F20
F22
B20
A19
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_A#[3..35]
[3]
A
B
F10
A15
C19
C9
B8
C11
E5
D6
AH10
AJ11
G11
H2
C7
F8
A11
D8
H_ADS# [3]
H_ADSTB#0 [3]
H_ADSTB#1 [3]
H_BNR# [3]
H_BPRI# [3]
H_BR0# [3]
H_DEFER# [3]
H_DBSY# [3]
CLK_MCH_BCLK [2]
CLK_MCH_BCLK# [2]
H_DPWR# [3]
H_DRDY# [3]
H_HIT# [3]
H_HITM# [3]
H_LOCK# [3]
H_TRDY# [3]
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
L9
N7
AA7
AG3
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
K2
N3
AA3
AF4
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
[3]
[3]
[3]
[3]
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
L3
M2
Y2
AF2
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
[3]
[3]
[3]
[3]
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
J13
L13
C13
G13
G15
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
F4
F2
G7
H_RS#0 [3]
H_RS#1 [3]
H_RS#2 [3]
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
8
[3]
[3]
[3]
[3]
C
H_RS#_0
H_RS#_1
H_RS#_2
[3]
[3]
[3]
[3]
[3]
H_AVREF
H_DVREF
CANTIGASFF_1p0
R67
R68
2K/F_4
*short_4
D
D
H_DVREF
PROJECT : BU3
Quanta Computer Inc.
Size
Custom
NB7
Document Number
Date: Monday, August 10, 2009
1
2
3
4
5
6
7
Rev
D3B
GANTIGA HOST(1/6)
Sheet
5
of
8
34
1
2
3
4
5
6
7
8
RSVD17
A
AW42
BB20
BE19
BF20
BF18
RSVD22
RSVD23
RSVD24
RSVD25
ME_JTAG_TCK
ME_JTAG_TDI
ME_JTAG_TDO
ME_JTAG_TMS
SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1
SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1
SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#
CLK
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK
PEG_CLK#
Layout Note:
Location of all MCH_CFG strap
resistors needs to be close to
minmize stub.
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
T10
T16
[11] MCH_CFG19
[11] MCH_CFG20
PM_EXTTS#0
PM_EXTTS#1
R65
R280
100_4 RSTIN#_MCH
*0_4
DMI
BC35
BE33
BE37
BC37
M_CKE0 [16]
M_CKE1 [16]
M_CKE2 [16]
M_CKE3 [16]
BK18
BK16
BE23
BC19
M_CS#0 [16]
M_CS#1 [16]
M_CS#2 [16]
M_CS#3 [16]
BJ17
BJ19
BC17
BE17
M_ODT0
M_ODT1
M_ODT2
M_ODT3
BL25
BK26
SMRCOMPP
SMRCOMPN
BK32
BL31
SM_RCOMP_VOH
SM_RCOMP_VOL
[16]
[16]
[16]
[16]
U15C
+1.05V_VCC_PEG
[17] INT_LVDS_PWM
[17] INT_LVDS_BLON
L_CTRL_DATA
[16]
[16]
[16]
[16]
[17] LCD_DDCCLK
[17] LCD_DDCDAT
close to chipset
[17] INT_LVDS_DIGON
INT_TXLCLKOUT-
SMDDR_VREF
SM_PWROK
SM_REXT
B42
D42
B50
D50
AG55
AL49
AH54
AL47
DMI_MRX_ITX_N0 [13]
DMI_MRX_ITX_N1 [13]
DMI_MRX_ITX_N2 [13]
DMI_MRX_ITX_N3 [13]
AG53
AK50
AH52
AL45
DMI_MRX_ITX_P0
DMI_MRX_ITX_P1
DMI_MRX_ITX_P2
DMI_MRX_ITX_P3
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3
AF50
AH50
AJ45
AG45
DMI_MTX_IRX_P0 [13]
DMI_MTX_IRX_P1 [13]
DMI_MTX_IRX_P2 [13]
DMI_MTX_IRX_P3 [13]
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
[17] INT_TXLOUT0+
[17] INT_TXLOUT1+
[17] INT_TXLOUT2+
T19
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#
TSATN#
HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC
B36
F50
H46
P44
K46
D46
B46
D44
B44
G45
F46
G41
C45
INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+
INT_TXLOUT3+
F44
G47
F40
A45
L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3
D40
C41
G43
B48
[13]
[13]
[13]
[13]
INT_TV_COMP
INT_TV_Y/G
INT_TV_C/R
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3
J27
E27
G27
TVA_DAC
TVB_DAC
TVC_DAC
F26
TVA_RTN
B34
D34
[17] CRT_BLUE
[17] CRT_GREEN
[17] CRT_RED
CRT_BLUE
J29
CRT_GREEN
G29
CRT_RED
F30
TV_DCONSEL_0
TV_DCONSEL_1
GFX_VR_EN [30]
[17] CRT_DDCCLK
[17] CRT_DDCDAT
[17] CRT_HSYNC
[17] CRT_VSYNC
MCH_CLVREF
R281
30.1/F_4
R282
30.1/F_4
CRT_DDCCLK
CRT_DDCDAT
HSYNC
CRT_IREF
VSYNC
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
CRT_BLUE
CRT_GREEN
CRT_RED
E29
G39
PEG_COMPI
PEG_COMPO
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
B40
A41
F42
D48
GPU_VID0 [30]
GPU_VID1 [30]
GPU_VID2 [30]
GPU_VID3 [30]
GPU_VID4 [30]
AK52
AK54
AW40
AL53
AL55
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L37
J37
L35
INT_TXLOUT0INT_TXLOUT1INT_TXLOUT2INT_TXLOUT3-
[13]
[13]
[13]
[13]
AG49
AJ49
AJ47
AG47
G33
G37
F38
F36
G35
[17] INT_TXLOUT0[17] INT_TXLOUT1[17] INT_TXLOUT2T20
BOI
MCH_DREFCLK [2]
MCH_DREFCLK# [2]
DREF_SSCLK [2]
DREF_SSCLK# [2]
CLK_MCH_3GPLL [2]
CLK_MCH_3GPLL# [2]
D38
C37
K38
INT_TXLCLKOUT+
[16]
R49
P50
INT_TXLCLKOUTINT_TXLCLKOUT+
[17] INT_TXLCLKOUT[17] INT_TXLCLKOUT+
*100p/50V_4
DDR3_DRAMRST#
LVDS_IBG
T21
C350
BC51
AY37
BH20
BA37
L_CTRL_CLK
D3B
GFX_VR_EN
HDA
C
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC
A7
A49
A52
A54
B54
D55
G55
BE55
BH55
BK55
BK54
BL54
BL52
BL49
BL7
BL4
BL2
BK2
BK1
BH1
BE1
G1
PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
CRT_IRTN
D36
C35
J33
D32
G31
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC
VGA
[14] PM_SYNC#
[3,12,26] H_DPRSTP#
[16] PM_EXTTS#0
[16] PM_EXTTS#1
DELAY_VR_PWRGOOD
[13] PCI_PLTRST#
[3,12] PM_THRMTRIP#
[14,26] DPRSLPVR
PM
[3,14,26]
J35
F6
J39
L39
AY39
BB18
K28
K36
GRAPHICS VID
T11
T12
[11] MCH_CFG16
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
ME
T9
[11] MCH_CFG12
[11] MCH_CFG13
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
BA31
BC25
BC33
BB24
[16]
[16]
[16]
[16]
TV
T13
[11] MCH_CFG9
[11] MCH_CFG10
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
CFG
MCH_CFG3
MCH_CFG4
MCH_CFG5
MCH_CFG6
MCH_CFG7
MCH_CFG8
MCH_CFG9
MCH_CFG10
MCH_CFG11
MCH_CFG12
MCH_CFG13
MCH_CFG14
MCH_CFG15
MCH_CFG16
MCH_CFG17
MCH_CFG18
MCH_CFG19
MCH_CFG20
T15
T14
[11] MCH_CFG5
[11] MCH_CFG6
[11] MCH_CFG7
B
K26
G23
G25
J25
L25
L27
F24
D24
D26
J23
B26
A23
C23
B24
B22
K24
C25
L23
L33
K32
K34
MISC
[2] MCH_BSEL0
[2] MCH_BSEL1
[2] MCH_BSEL2
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
LVDS
AN45
AP44
AT44
AN47
T22
T18
T17
T23
RSVD20
SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1
BB32
BA25
BA33
BA23
GRAPHICS
J9
RSVD14
RSVD15
SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1
PCI-EXPRESS
C27
D30
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD
J43
L43
J41
L41
AN11
AM10
AK10
AL11
F12
DDR CLK/ CONTROL/COMPENSATION
U15B
CL_CLK0 [14]
CL_DATA0 [14]
MPWROK [14,22]
ICH_CL_RST0# [14]
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
U45
T44
PEG_COMP
R110
A
49.9/F_4
D52
G49
K54
H50
M52
N49
P54
V46
Y50
V52
W49
AB54
AD46
AC55
AE49
AF54
E51
F48
J55
J49
M54
M50
P52
U47
AA49
V54
V50
AB52
AC47
AC53
AD50
AF52
F3B
PEG_RXP3
L47
F52
P46
H54
L55
T46
R53
U49
T54
Y46
AB46
W53
Y54
AC49
AF46
AD54
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
J47
F54
N47
H52
L53
R47
R55
T50
T52
W47
AA47
W55
Y52
AB50
AE47
AD52
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
R134
C238
C235
C240
C241
C237
C236
C239
C242
HDMI Port B
*short_4
PORT-B_HPD#
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[18]
TMDSB_DATA2# [18]
TMDSB_DATA1# [18]
TMDSB_DATA0# [18]
TMDSB_CLK# [18]
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
B
TMDSB_DATA2 [18]
TMDSB_DATA1 [18]
TMDSB_DATA0 [18]
TMDSB_CLK [18]
CANTIGASFF_1p0
F34
F32
B38
A37
C31
K42
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLK_3GPLLREQ#
D10
TSATN#
C29
B30
D28
A27
B28
ICH_AZ_HDMI_SDIN1_R
DDPC_CTRLCLK [11]
DDPC_CTRLDATA [11]
SDVO_CTRLCLK [18]
SDVO_CTRLDATA [18]
CLK_3GPLLREQ# [2]
MCH_ICH_SYNC#
[14]
SDVO=>Port B
DDPC=>Port C
C
ICH_AZ_HDMI_BITCLK
[12]
ICH_AZ_HDMI_RST#
[12]
R283
HM@33_4
ICH_AZ_HDMI_SDIN1
[12]
ICH_AZ_HDMI_SDOUT
[12]
ICH_AZ_HDMI_SYNC
[12]
CANTIGASFF_1p0
+1.05V
Check list note : CL_REF=0.35V
SM_VREF.Default use voltage divider for poor layout cause +SMDDR_VREF not
meet spec.And Intel circuit PU/PD is 1K,But Check list PU/PD is 10K.
R127
R123
1K/F_4
(15mils)
*0_6
+SMDDR_VREF
+1.05V
(20mils)
MCH_CLVREF
SMDDR_VREF
TSATN#
R125
10K/F_4
CRT setting
<Checklist ver0.8>
If TSATN# is not used, then it must be terminated
with a 56-Ω pull-up resistor to VCCP.
R57
CRT_BLUE
CRT_GREEN
CRT_RED
R74
R78
R80
150/F_4
150/F_4
150/F_4
CRT_IREF
R98
1K/F_4
LVDS setting
+3V
56_4
+1.5VSUS_GMCH
+3V
C243
R128
0.1u/10V_4
511/F_6
R120
PM_EXTTS#0
PM_EXTTS#1
CLK_3GPLLREQ#
SM_REXT
10K/F_4
R113
R103
R94
R79
L_CTRL_CLK
L_CTRL_DATA
10K_4
10K_4
10K_4
499/F_4
INT_TV_COMP R96
INT_TV_Y/G
R83
INT_TV_C/R
R95
R290
R287
10K_4
10K_4
75/F_4
75/F_4
75/F_4
LVDS_IBG
2.37K/F_4
R119
D
D
+1.5VSUS_GMCH
+1.5VSUS_GMCH
R90
1K/F_4
SM_RCOMP_VOH
+3VPCU
B1A
R101
C195
C204
3.01K/F_4
0.01u/25V_4
2.2u/6.3V_6
U22
F3B
80.6/F_4
[22,27] HWPG_1.5V
R378
5
SMRCOMPP
R100
SM_PWROK only for DDR3.(DDR2 PD only)
*short_4
4
SM_RCOMP_VOL
R115
DDR3_POWER_OK
R116
12K/F_4
SM_PWROK
1
80.6/F_4
R104
C198
C196
1K/F_4
0.01u/25V_4
2.2u/6.3V_6
3
SMRCOMPN
2
PROJECT : BU3
Quanta Computer Inc.
R117
TC7SH08FU(F)
10K/F_6
Size
Custom
NB7
Document Number
2
3
4
5
6
7
Rev
D3B
GANTIGA VGA/DMI(2/6)
Date: Monday, August 10, 2009
1
Sheet
8
6
of
34
1
2
3
4
5
6
7
8
A
A
C
BH22
BK20
BL15
M_A_RAS#
M_A_CAS#
M_A_W E#
AT50
BB50
BB46
BE39
BB12
BE7
AV10
AR9
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
AR47
BA45
BE45
BC41
BC13
BB10
BA7
AN7
AR49
AW45
BC45
BA41
BA13
BA11
BA9
AN9
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14
BC23
BF22
BE31
BC31
BH26
BJ35
BB34
BH32
BB26
BF32
BA21
BG25
BH34
BH18
BE25
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
U15E
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_A_BS#0 [16]
M_A_BS#1 [16]
M_A_BS#2 [16]
M_A_RAS# [16]
M_A_CAS# [16]
M_A_W E# [16]
M_A_DM[7:0] [16]
M_A_DQS[7:0]
M_A_DQS#[7:0]
[16]
[16]
M_A_A[14:0] [16]
AP54
AM52
AR55
AV54
AM54
AN53
AT52
AU53
AW53
AY52
BB52
BC53
AV52
AW55
BD52
BC55
BF54
BE51
BH48
BK48
BE53
BH52
BK46
BJ47
BL45
BJ45
BL41
BH44
BH46
BK44
BK40
BJ39
BK10
BH10
BK6
BH6
BJ9
BL11
BG5
BJ5
BG3
BF4
BD4
BA3
BE5
BF2
BB4
AY4
BA1
AP2
AU1
AT2
AT4
AV4
AU3
AR3
AN1
AP4
AL3
AJ1
AK4
AM4
AH2
AK2
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
CANTIGASFF_1p0
BJ13
BK12
BK38
M_B_BS#0
M_B_BS#1
M_B_BS#2
SB_RAS#
SB_CAS#
SB_WE#
BE21
BH14
BK14
M_B_RAS#
M_B_CAS#
M_B_W E#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
AP52
AY54
BJ49
BJ43
BH12
BD2
AY2
AJ3
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
AR53
BA53
BH50
BK42
BH8
BB2
AV2
AM2
AT54
BB54
BJ51
BH42
BK8
BC3
AW3
AN3
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
BJ15
BJ33
BH24
BA17
BF36
BH36
BF34
BK34
BJ37
BH40
BH16
BK36
BH38
BJ11
BL37
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
SB_BS_0
SB_BS_1
SB_BS_2
B
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
M_A_BS#0
M_A_BS#1
M_A_BS#2
MEMORY
A
SA_RAS#
SA_CAS#
SA_WE#
BC21
BJ21
BJ41
SYSTEM
SA_BS_0
SA_BS_1
SA_BS_2
MEMORY
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
CANTIGASFF_1p0
SYSTEM
AP46
AU47
AT46
AU49
AR45
AN49
AV50
AP50
AW47
BD50
AW49
BA49
BC49
AV46
BA47
AY50
BF46
BC47
BF50
BF48
BC43
BE49
BA43
BE47
BF42
BC39
BF44
BF40
BB40
BE43
BF38
BE41
BA15
BE11
BE15
BF14
BB14
BC15
BE13
BF16
BF10
BC11
BF8
BG7
BC7
BC9
BD6
BF12
AV6
BB6
AW7
AY6
AT10
AW11
AU11
AW9
AR11
AT6
AP6
AL7
AR7
AT12
AM6
AU7
DDR
B
[16] M_B_DQ[63:0]
U15D
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
DDR
[16] M_A_DQ[63:0]
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14
M_B_BS#0 [16]
M_B_BS#1 [16]
M_B_BS#2 [16]
M_B_RAS# [16]
M_B_CAS# [16]
M_B_W E# [16]
M_B_DM[7:0] [16]
B
M_B_DQS[7:0]
M_B_DQS#[7:0]
[16]
[16]
M_B_A[14:0] [16]
C
D
D
PROJECT : BU3
Quanta Computer Inc.
Size
Custom
NB7
Document Number
1
2
3
4
5
6
7
Rev
D3B
GANTIGA DDRII(3/6)
Date: Monday, August 10, 2009
Sheet
7
8
of
34
5
4
3
DDR3-800 3.1625A
DDR3-1066 4.14A
(Shape or 200mils)
2
UMA 9.6A
(Plane or shape)
U15G
+1.05VGFX_CORE_INT
Ivcc internal VGA 2.2A
(Shape or 120mils)
+1.5VSUS_GMCH
VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
C165
C143
C137
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
AT38
AR38
AN38
AM38
AL38
AG38
AE38
AA38
Y38
W38
U38
T38
R38
AT37
AR37
AN37
AM37
AL37
AJ37
AH37
AG37
AE37
AD37
AC37
AA37
Y37
W37
U37
T37
R37
AT35
AR35
U35
AT34
AR34
U34
T34
R34
+1.05VGFX_CORE_INT
CANTIGASFF_1p0
R61
10/F_6
VCC_AXG_SENSE
VSS_AXG_SENSE
[30] VCC_AXG_SENSE
[30] VSS_AXG_SENSE
W32
AG31
AE31
AD31
AC31
AA31
Y31
W31
AH29
AG29
AE29
AD29
AC29
AA29
Y29
W29
AH28
AG28
AE28
AA28
AH27
AG27
AE27
AD27
AC27
AA27
Y27
W27
AH25
AD25
AC25
W25
AJ24
AH24
AG24
AE24
AD24
AC24
AA24
Y24
W24
AM22
AL22
AJ22
AH22
AG22
AE22
AD22
AC22
AA22
AM21
AL21
AJ21
AH21
AD21
AC21
AA21
Y21
W21
AM16
AL16
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42
VCC_AXG_43
VCC_AXG_44
VCC_AXG_45
VCC_AXG_46
VCC_AXG_47
VCC_AXG_48
VCC_AXG_49
VCC_AXG_50
VCC_AXG_51
VCC_AXG_52
VCC_AXG_53
VCC_AXG_54
VCC_AXG_55
VCC_AXG_56
VCC_AXG_57
VCC_AXG_58
VCC_AXG_59
VCC_AXG_60
VCC_AXG_61
AG13
AE13
VCC_AXG_SENSE
VSS_AXG_SENSE
VCC_AXG_62
VCC_AXG_63
VCC_AXG_64
VCC_AXG_65
VCC_AXG_66
VCC_AXG_67
VCC_AXG_68
VCC_AXG_69
VCC_AXG_70
VCC_AXG_71
VCC_AXG_72
VCC_AXG_73
VCC_AXG_74
VCC_AXG_75
VCC_AXG_76
VCC_AXG_77
VCC_AXG_78
VCC_AXG_79
VCC_AXG_80
+1.05V
R293
T32
U31
T31
R31
U29
T29
R29
U28
U27
T27
R27
U25
T25
R25
U24
U22
T22
R22
U21
T21
R21
AM19
AL19
AH19
AG19
AE19
AD19
AC19
W19
U19
AM18
AL18
AJ18
AH18
AG18
AE18
AD18
AC18
AA18
Y18
W18
U18
T18
R18
C209
C205
C208
C192
0.1u/10V_4
0.22u/10V_4
0.22u/10V_4
10u/6.3V_8
+
*short_1206
D
C189
220u/2.5V_3528
Layout Note:
Inside GMCH cavity.
+1.5VSUS_GMCH
+1.5VSUS
F3B
R82
C176
C175
C173
0.1u/10V_4
10u/6.3V_8
10u/6.3V_8
0_1206
C154
+
*220u/2.5V_3528
C
E3A
+1.05V
+1.05VGFX_CORE_INT
R66
40@0_1206
R58
AJ16
AH16
AD16
AC16
AA16
U16
T16
R16
AM15
AL15
AJ15
AH15
AG15
AE15
AA15
Y15
W15
U15
T15
40@0_1206
C172
C169
C160
C159
C180
C184
0.47u/6.3V_4
1u/10V_6
10u/6.3V_8
10u/6.3V_8
0.1u/10V_4
0.1u/10V_4
+1.05VGFX_CORE_INT
BOM Note:
for reader stand by
GS40 used 40@
GS45 used 45@
F3B
+ C151
+ C158
220u/2.5V_3528
40@220u/2.5V_3528
B
Close to GMCH
VCC SM LF
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
+1.05VGFX_CORE_INT
+1.05V_VCC_GMCH
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC GFX
VCC_35
VCC_36
+VCC_SM_BF24
+VCC_SM_BL19
+VCC_SM_BB16
POWER
VCC CORE
0.1u/10V_4
VCC GFX NCTF
0.1u/10V_4
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC GFX
B
Y34
W34
AM32
AL32
AJ32
AH32
AE32
AD32
AA32
AM31
AL31
AJ31
AH31
AM29
AL29
AM28
AL28
AJ28
AM27
AL27
AM25
AL25
AJ25
AM24
N36
0.1u/10V_4
+VCC_SM_BC29
VCC NCTF
AC34
AA34
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
C223
C210
POWER
C
AJ40
AH40
AG40
AE40
AD40
AC40
AA40
Y40
AN35
AM35
AJ35
AH35
AD35
AC35
W35
AM34
AL34
AJ34
AH34
AG34
AE34
AD34
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
C226
BB36
BE35
AW34
AW32
BK30
BH30
BF30
BD30
BB30
AW30
BL29
BJ29
BG29
BE29
BC29
BA29
AY29
BK28
BH28
BF28
BD28
BB28
BL27
BJ27
BG27
BE27
BC27
BA27
AY27
AW26
BF24
BL19
BB16
VCC SM
+VCC_SM_BB36
+VCC_SM_BE35
+1.05V_VCC_GMCH
AT41
AR41
AN41
AJ41
AH41
AD41
AC41
Y41
W41
AT40
AM40
AL40
F3B
+1.05V_VCC_GMCH
U15F
D
1
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
AU45
BF52
BB38
BA19
BE9
AU9
AL9
VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7
C119
C120
C121
C156
C202
C231
C229
0.1u/10V_4
0.1u/10V_4
0.22u/10V_4
0.22u/10V_4
0.47u/6.3V_4
1u/10V_6
1u/10V_6
A
A
R39
10/F_6
CANTIGASFF_1p0
PROJECT : BU3
Quanta Computer Inc.
UMA: Places R721, R726 to 10 ohm.
Size
Custom
NB7
Document Number
5
4
3
2
Rev
D3B
GANTIGA VCC/NCTF(4/6)
Date: Monday, August 10, 2009
1
Sheet
8
of
34
5
4
3
2
C2A
1
+3V_A_CRT_DAC
U23
[19,22,27,28,29,31]
+3V
+3V_A_CRT_DAC
C2A
L7
1
MAINON
+5VPCU
BLM18PG181SN1D_6
2
VO
4
GND
3
+3V_A_CRT_DAC
C389
SHDN
VIN
73mA(20mils)
SET
5
+1.05V_VCCP_GMCH
+1.05V
852mA(50mils)
*G913C
R41
*short_8
10u/6.3V_8
+1.05V
D
L17
10uh_8
C182
C191
0.1u/10V_4
0.01u/25V_4
C145
C115
C122
C138
0.47u/6.3V_4
2.2u/6.3V_6
4.7u/6.3V_6
4.7u/6.3V_6
+ C113
F3B
*220u/2.5V_3528
D
+1.05VM_DPLLA
+3V
C224
79mA(20mils)
U15H
0.1u/10V_4
C2A
5mA(10mils)
+1.05V
C190
0.1u/10V_4
0.01u/25V_4
C227
L31
M33
0.1u/10V_4
64mA(20mils)
F3B
L49
24mA(20mils)
+1.05VM_HPLL
AF10
139.2mA(20mils)
4.7u/6.3V_6
0.1u/10V_4
L4
BLM18PG181SN1D_6
VCCA_MPLL
1000p/50V_4
U43
U41
V44
+1.5V
+1.05VM_MPLL
+1.8VSUS_TXLVDS
414uA(10mils)
+1.5V_VCCA_PEG_BG
C131
AJ43
R49
0.1u/10V_4
C215
VCCA_LVDS1
VCCA_LVDS2
VSSA_LVDS
VCCA_PEG_BG
+1.05VM_PEGPLL
*0.5/F_4
C108
0.1u/10V_4
AG43
+1.05VM_MPLL_RC
*22u/6.3V_8
+1.05V
720mA(40mils)
*short_8+1.05VM_A_SM
R59
F3B
C135
C153
C162
C164
*100u/6.3V_3528
10u/6.3V_8
4.7u/6.3V_6
1u/6.3V_4
+
F3B
+1.05V
R112
AW24
AU24
AW22
AU22
AU21
AW20
AU19
AW18
AU18
AW16
AU16
AT16
AR16
AU15
AT15
AR15
AW14
26mA(20mils)
*short_6+1.05VM_A_SM_CK
C211
C181
C174
10u/6.3V_8
*2.2u/6.3V_6
0.1u/10V_4
AT24
AR24
AT22
AR22
AT21
AR21
AT19
AR19
AT18
AR18
B
AU27
AU28
AU29
AU31
AT31
AR31
AT29
AR29
AT28
AR28
AT27
AR27
+1.05V
L5
BLM18PG181SN1D_6
157.2mA(20mils)
+1.05VM_MCH_PLL2
C118
+1.05V
+1.05VM_PEGPLL
0.1u/10V_4
L10
BLM18PG181SN1D_6
R126
C218
1/F_4
0.1u/10V_4
VCCA_PEG_PLL
VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
VCCA_SM_6
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9
VCCA_SM_10
VCCA_SM_11
VCCA_SM_12
VCCA_SM_13
VCCA_SM_14
VCCA_SM_15
VCCA_SM_16
VCCA_SM_17
F3B
30mA(20mils)
M46
L45
*short_6+1.8VSUS_DLVDS
R111
A
VCC_HDA
VCCD_QDAC
VCCD_TVDAC
[email protected]/10V_4
L8
2.7mA(15mils)
K30
+1.5V_QDAC
A31
C194
C193
0.01u/25V_4
0.1u/10V_4
R284
*short_6
F3B
N34
C346
C347
0.01u/25V_4
0.1u/10V_4
C
35mA(15mils)
N32
+1.05V
+1.05VM_AXF
R62
*short_8
F3B
C150
C144
1u/6.3V_4
*10u/6.3V_6
+1.5VSUS_GMCH
1uh_8
DDR3-800 143.75mA
DDR3-1066 149.5mA
(20mils)
R71
C152
1/F_4
0.1u/10V_4
C148
+1.5VSUS_SMCK_RC
VCCA_SM_CK_4
VCCA_SM_CK_3
VCCA_SM_CK_2
VCCA_SM_CK_1
VCCA_SM_CK_NCTF_1
VCCA_SM_CK_NCTF_2
VCCA_SM_CK_NCTF_3
VCCA_SM_CK_NCTF_4
VCCA_SM_CK_NCTF_5
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_7
VCCA_SM_CK_NCTF_8
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
M25
N24
M23
10u/6.3V_8
VCCD_PEG_PLL
+1.05V
+1.8V
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
L9
80mA(20mils)
BK24
BL23
BJ23
BK22
+1.8VSUS_TXLVDS
D18
B
0.1uh_8
C203
C206
1000p/50V_4
VCC_HV_1
VCC_HV_2
VCCD_HPLL
CANTIGASFF_1p0
FOR IHDMI HDA I/F only
C199
324mA(30mils)
VCC_TX_LVDS
C220
HM@0_6
L6
VCCA_SM_NCTF_1
VCCA_SM_NCTF_2
VCCA_SM_NCTF_3
VCCA_SM_NCTF_4
VCCA_SM_NCTF_5
VCCA_SM_NCTF_6
VCCA_SM_NCTF_7
VCCA_SM_NCTF_8
VCCA_SM_NCTF_9
VCCA_SM_NCTF_10
VCCD_LVDS_1
VCCD_LVDS_2
R105
+1.5VSUS_VCC_SM_CK
DMI
AE43
+1.5V_VCC_HDA
BLM18PG181SN1D_6
10u/6.3V_8
T41
105.3mA(20mils)
C33
A33
CH751H-40PT
+3V_VCC_HV
R286
10_4
R288
*short_6
C349
+1.05V_SD
+3V
F3B
0.1u/10V_4
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
AB44
Y44
AC43
AA43
+1.05V_VCC_PEG
1.782A(100mils)
AM44
AN43
AL43
+1.05V_VCC_DMI
R131
+1.05V_VCC_PEG
456mA(30mils)
VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
R130
C216
+1.05V
*short_8
F3B
C222
C244
4.7u/6.3V_6
10u/6.3V_8
+ C247
*short_8
*220u/2.5V_3528
F3B
0.1u/10V_4
VTTLF
AH12
50mA(20mils)
+1.8V
+1.5V
POWER
LVDS
+1.05VM_PEGPLL_RC
0.1u/10V_4
+1.5V_TVDAC
C246
10u/6.3V_8
*short_6
+1.5V
VCCA_TV_DAC
100mA(20mils)
C214
C
VCCA_HPLL
C171
0.01u/25V_4
50mA(15mils)
TV
C139
VCCA_DPLLB
D TV/CRT HDA
C116
AE1
AXF
*short_6
VCCA_DPLLA
SM CK
R48
J45
64mA(20mils)
R91
F3B
C177
HV
+1.05V
VCCA_DAC_BG
VSSA_DAC_BG
PEG
220u/2.5V_3528
VCCA_CRT_DAC
VTT
C183
22u/6.3V_8
A PEG A LVDS
+ C232
C187
CRT
+1.05VM_DPLLB
R13
T12
R11
T10
R9
T8
R7
T6
R5
T4
R3
T2
R1
A SM
10uh_8
PLL
J31
L18
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
+3V_TV_DAC
2
220u/2.5V_3528
1
+ C228
VTTLF1
VTTLF2
VTTLF3
K14
Y12
P2
+VTTLF_CAP1
+VTTLF_CAP2
+VTTLF_CAP3
C117
C146
C142
0.47u/6.3V_4
0.47u/6.3V_4
0.47u/6.3V_4
A
1u/6.3V_4
PROJECT : BU3
Quanta Computer Inc.
Size
Custom
NB7
Document Number
Date: Monday, August 10, 2009
5
4
3
2
Rev
D3B
GANTIGA POWER(5/6)
1
Sheet
9
of
34
5
4
3
2
1
U15J
U15I
C
B
A
VSS
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
C43
A43
BD42
H42
BG41
AY41
AU41
AM41
AL41
AG41
AE41
AA41
R41
M41
E41
BD40
AU40
AR40
AN40
W40
U40
T40
R40
K40
H40
BL39
BG39
BA39
E39
C39
A39
BD38
AU38
H38
BG37
AU37
M37
E37
BD36
AW36
H36
BL35
BG35
AY35
AU35
AL35
AG35
AE35
AA35
Y35
M35
E35
A35
BD34
AU34
AN34
H34
BL33
BG33
AY33
E33
BD32
AU32
AN32
AG32
AC32
Y32
H32
B32
BJ31
BG31
AY31
AN31
M31
E31
N30
H30
AN29
AJ29
M29
A29
AW28
AN28
AD28
AC28
Y28
W28
H28
F28
AN27
AJ27
M27
BF26
BD26
N26
H26
BJ25
AY25
AU25
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS
CANTIGASFF_1p0
VSS NCTF
D
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS SCB
BA55
AU55
AN55
AJ55
AE55
AA55
U55
N55
BD54
BG53
AJ53
AE53
AA53
U53
N53
J53
G53
E53
K52
BG51
BA51
AW51
AU51
AR51
AN51
AL51
AJ51
AG51
AE51
AC51
AA51
W51
U51
R51
N51
L51
J51
G51
C51
BK50
AM50
K50
BG49
E49
C49
BD48
BB48
AY48
AV48
AT48
AP48
AM48
AK48
AH48
AF48
AD48
AB48
Y48
V48
T48
P48
M48
K48
H48
BL47
BG47
E47
C47
A47
BD46
AY46
AM46
AK46
AH46
BG45
AE45
AC45
AA45
W45
R45
N45
E45
BD44
BB44
AV44
AK44
AH44
AF44
AD44
K44
H44
BL43
BG43
AY43
AR43
W43
R43
M43
E43
AN25
AG25
AE25
AA25
Y25
E25
A25
BD24
AN24
AL24
H24
BG23
AY23
E23
BD22
BB22
AN22
Y22
W22
H22
BL21
BG21
AY21
AN21
AG21
AE21
M21
E21
A21
BD20
H20
BG19
AY19
M19
E19
BD18
N18
H18
BL17
BG17
AY17
M17
E17
A17
BD16
AN16
AG16
AE16
Y16
W16
N16
H16
BG15
AY15
AN15
AD15
AC15
R15
M15
E15
BD14
H14
BL13
BG13
AY13
AU13
AR13
AJ13
AC13
AA13
W13
U13
M13
E13
A13
BD12
AV12
AP12
AM12
AK12
AB12
V12
P12
H12
BG11
AG11
E11
BD10
AY10
AP10
H10
BL9
BG9
E9
A9
BD8
BB8
AY8
AV8
AT8
AP8
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
AM8
AK8
AH8
AF8
AD8
AB8
Y8
V8
P8
M8
K8
H8
BJ7
E7
BF6
BC5
BA5
AW5
AU5
AR5
AN5
AL5
AJ5
AG5
AE5
AC5
AA5
W5
U5
N5
L5
J5
G5
C5
BH4
BE3
U3
E3
BC1
AW1
AR1
AL1
AG1
AC1
W1
N1
J1
AU43
BB42
AW38
BA35
L29
N28
N22
N20
N14
AL13
B10
AN13
VSS_359
VSS_360
VSS_361
VSS_362
N42
N40
N38
M39
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5
VSS_SCB_6
VSS_SCB_7
D
C
AJ38
AH38
AD38
AC38
T35
R35
AT32
AR32
U32
R32
T28
R28
AT25
AR25
T24
R24
AN19
AJ19
AA19
Y19
T19
R19
AN18
B
BL55
BL1
A55
D1
B55
B2
A4
A
PROJECT : BU3
Quanta Computer Inc.
CANTIGASFF_1p0
Size
Custom
NB7
Document Number
5
4
3
2
Rev
D3B
GANTIGA VSS(6/6)
Date: Monday, August 10, 2009
Sheet
1
10
of
34
5
4
3
2
1
North Bridge Strap Pin Configuration Table
(See DG 2.0 P306 Table 187)
(See NB EDS 1.0 P187 Table 74)
Pin Name
Strap description
Configuration
PU<4.02K> PD <2.21K>
Note
D
D
C
CFG[2:0]
FSB Frequency Select
CFG[4:3]
Reserved
CFG5
DMI X2 Select
0 = DMI X2
1 = DMI X4(Default)
[6] MCH_CFG5
CFG6
iTPM Host Interface
0 = iTPM Host Interface is enabled
1 = iTPM Host Interface is disabled(Default)
[6] MCH_CFG6
CFG7
ME TLS Confidentiality
0 = AMT Firmware will use TLS cipher suite with no confidentiality
1 = AMT Firmware will use TLS cipher suite with confidentiality(Default)
[6] MCH_CFG7
CFG8
Reserved
CFG9
PCI Express Graphics
Lane Reversal
0 = Reverse Lanes
1 = Normal operation(Default)
[6] MCH_CFG9
CFG10
PCIE Loopback enable
0 = Enabled
1 = Disabled (Default)
[6] MCH_CFG10
CFG11
Reserved
CFG12
ALLZ
0 = ALLZ mode enable
1 = disable(Default)
[6] MCH_CFG12
CFG13
XOR
0 = XOR mode enable
1 = disable(Default)
[6] MCH_CFG13
CFG[15:14]
Reserved
CFG16
FSB Dynamic ODT
0 = Dynamic ODT disable
1 = Dynamic ODT Enable(Default)
[6] MCH_CFG16
CFG[18:17]
Reserved
CFG19
DMI Lane Reversal
0 = Normal (Default)
1 = Lanes Reversed
[6] MCH_CFG19
Digital Display Port
(SDVO/DP/iHDMI)
Concurrent with PCIE
0 = Only Digital Display port (SDVO/DP/iHDMI) or PCIE is
operational (Default)
1 = Digital Display port (SDVO/DP/iHDMI) and PCIE are operating
simultaneously via PEG port
[6] MCH_CFG20
SDVO_CTRLDATA
SDVO Present
0 = No SDVO/HDMI/DP Device Present(Default)
1 = SDVO/HDMI/DP Device present
L_DDC_DATA
Local Flat Panel(LFP) Present
0 = LFP Disable(Default)
1 = LFP Card Present;PCIE disable
DDPC_CTRLDATA
Digital Display Present
0 = Digital display(HDMI/DP) device absent(Default)
1 = Digital display(HDMI/DP) device present
B
CFG20
[000]= FSB 1066MHz
[010] = FSB 800MHz
[011] = FSB 667MHz
PAGE
Net Name
*2.2K_4
R70
*2.2K/F_4
R72
*2.2K/F_4
R73
*2.2K_4
R75
*2.2K/F_4
R64
*2.2K/F_4
R77
*2.2K/F_4
R81
*2.2K_4
R93
*4.02K/F_4
C
+3V
R92
*4.02K/F_4
+3V
Strap on P18
SDVO_CTRLDATA
Strap on P17
INT_LVDS_EDIDDATA
[6] DDPC_CTRLDATA
[6] DDPC_CTRLCLK
PU & PD
R97
B
Enable iTPM Table
A
See Page 2 FSB selection table
R109
*1.5K/F_4
+3V
R114
*1.5K/F_4
+3V
NOTE
11
MCH_CFG_6
PD 10K to GND
NB Strap pin
13
SPI_MOSI
PU 20K to +3V_S5
SB Strap pin
14
CLGPIO5
PU 10K to +3V_S5
SB Strap pin
A
Quanta Computer Inc.
PROJECT : BU3
Size
Document Number
Rev
D3B
NB (7/7)- STRAP PIN
Date:
5
4
3
2
Monday, August 10, 2009
Sheet
1
11
of
34
1
2
3
4
RTC CRYSTAL
ICH_RTCRST#
ICH_SRTCRST#
ICH_INTRUDER#
G24
C24
C23
RTCRST#
SRTCRST#
INTRUDER#
E25
D25
10M_6
G22
ICH_RTCX2
D14
A
32.768KHZ
RESET JUMP
[13] ACZ_SYNC
An RC delay circuit with a time delay in the range
of 18 ms to 25 ms should be provided
+VCCRTC
R186
20K_6
C272
G1
1u/6.3V_4
*SHORT_ PAD
D13
C13
A13
LAN_TXD0
LAN_TXD1
LAN_TXD2
ICH_GPIO56
D15
GPIO56
GLAN_COMP
H22
H21
GLAN_COMPI
GLAN_COMPO
ACZ_BIT_CLK
ACZ_SYNC
AE7
AB7
ACZ_RST#
AA7
AB6
AE6
AC6
AA5
ICH_SATA_LED#
ACZ_SDOUT
AD8
AB8
[14,20] CPUSB#
PCIe Straight(default)
1
T55
AC9
[21] SATA_LED#
20K_6
B
ICH_SRTCRST#
C268
G2
1u/6.3V_4
*SHORT_ PAD
AC7
PCIe Lane Reversed
0
H3
J3
K5
L3
LAD0
LAD1
LAD2
LAD3
FWH4/LFRAME#
J2
LFRAME# [20,22]
A20GATE
A20M#
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
T56
T60
+VCCRTC
R181
8
H_FERR#_R
CPUPWRGD
AE22
H_PWRGOOD
IGNNE#
AD23
H_IGNNE#
INIT#
INTR
RCIN#
AE21
AD24
L1
NMI
SMI#
AD21
AC21
H_NMI [3]
H_SMI# [3]
AC25
H_STPCLK# [3]
TP11
AE14
AD14
AC15
AD15
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA_RXN1_C
SATA_RXP1_C
SATA_TXN1_C
SATA_TXP1_C
AD13
AC13
AA14
AB14
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATALED#
+VCCRTC
GATEA20 [22]
H_A20M# [3]
AD25
THRMTRIP#
SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C
T96
LDRQ#1 [20]
AE23
AE24
STPCLK#
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34
GATEA20
+1.05V_ICH_IO
FERR#
DPRSTP#
DPSLP#
HDA_RST#
HDA_SDOUT
PAD
N3
AB23
[20,22]
[20,22]
[20,22]
[20,22]
H_DPRSTP#
H_DPSLP#
HDA_BIT_CLK
HDA_SYNC
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
H1
J1
R163
AC22
SATA_RXN4_C
SATA_RXP4_C
SATA_TXN4_C
SATA_TXP4_C
T92
T93
T48
T47
AC11
AD11
AB10
AA10
SATA_RXN5_C
SATA_RXP5_C
SATA_TXN5_C
SATA_TXP5_C
T51
T50
T53
T54
SATA_CLKN
SATA_CLKP
AC16
AB16
AD10
AE10
R318
*56_4
56_4
H_FERR#
A
[3]
[3]
[3]
+1.05V_ICH_IO
R159
56_4
54.9/F_4
R158
*0_4
PM_THRMTRIP# [3,6]
T35
AD12
AE12
AB12
AA12
SATARBIAS#
SATARBIAS
R169
*56_4
56_4
H_INIT# [3]
H_INTR [3]
RCIN# [22]
H_THERMTRIP_R
AC23
R174
H_DPRSTP# [3,6,26]
H_DPSLP# [3]
R316
RCIN#
CLK_PCIE_SATA# [2]
CLK_PCIE_SATA [2]
SATABIAS
R359
B
24.9/F_4
Place within 500mils of ICH9 ball
ICH9MSFF REV 1.0
+3V_S5
R195
1M_4
ICH_INTRUDER#
R168
332K/F_4
ICH_INTVRMEN
R214
10K_4
ICH_GPIO56
R162
24.9/F_4
+1.5V_PCIE_ICH
GLAN_COMP
(DG 1.0 Table-292)
Internal VRM enabled for
VccSus1_05, VccSus1_5,
VccCL1_5, VccLAN1_05 and
VccCL1_05.
C
7
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
LDRQ0#
LDRQ1#/GPIO23
GLAN_CLK
A14
D12
B14
[21] ACZ_SDIN0_AUDIO
[6] ICH_AZ_HDMI_SDIN1
ICH_RTCRST#
INTVRMEN
LAN100_SLP
LAN / GLAN
CPU
ICH_INTVRMEN
R311
32.768KHZ
RTC
LPC
RTCX1
RTCX2
Y4
3
4
15p/50V_4
F25
G25
IHDA
ICH_RTCX1
ICH_RTCX1
ICH_RTCX2
SATA
15p/50V_4
C359
6
U20A
2
1
C365
5
24.9 Ohm pull up to 1.5V for
GLAN_COMPI/O is required, no
matter intel LAN is used or not.
[19]
[19]
[19]
[19]
SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0
[19]
[19]
[19]
[19]
SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1
C2A
C289
C285
C282
C288
0.01u/25V_4
0.01u/25V_4
0.01u/25V_4
0.01u/25V_4
SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C
C294
C300
C297
C301
*0.01u/25V_4
*0.01u/25V_4
*0.01u/25V_4
*0.01u/25V_4
SATA_RXN1_C
SATA_RXP1_C
SATA_TXN1_C
SATA_TXP1_C
R385
R386
*0_4
*0_4
ACZ_SYNC
R229
HM@33_4
R230
33_4
ICH_AZ_HDMI_SYNC
ACZ_BIT_CLK
R244
ICH_AZ_HDMI_BITCLK
[6]
*10p/50V_4
ACZ_RST#
BK1005HM121-T(300MA,120)
C324
R375
8.2K_4
RCIN#
R249
10K_4
USBP11- [13]
USBP11+ [13]
ACZ_SYNC_AUDIO
C
[6]
[21]
+3VPCU
HM@33_4
C321
GATEA20
RTC BATTERY
HD Audio Interface
R241
+3V
BIT_CLK_AUDIO
R238
HM@33_4
R239
33_4
ICH_AZ_HDMI_RST#
ACZ_RST#_AUDIO
+VCCRTC
(20mils)
D14
[6]
(30mils)
CH500H-40PT
(20mils)
[21]
D12
R_3VRTC
CH500H-40PT
[21]
C286
22p/50V_4
R222
F3B
ACZ_SDOUT
R223
HM@33_4
ICH_AZ_HDMI_SDOUT
33_4
ACZ_SDOUT_AUDIO
1u/10V_6
[6]
R216
[21]
1K_4
RTC_N02
(20mils)
1
3
R220
2K/F_4
R221
(20mils)
2K/F_4
+5VPCU
Q21
Sampled
Configuration
HDA_DOCK_EN/
GPIO33
Flash Descriptor Security
Override Strap
PWROK
0 = The Flash Descriptor Security will be overridden.
1 = The security measures defined
in the Flash Descriptor will be in effect
SATALED#
PCI Express Lane Reversal
(Lanes 1-4)
PWROK
XOR Chain Entrance
PWROK
MMBT3904-7-F
R237
6.8K/F_4
PU/PD
(20mils)
1
Strap description
Pin Name
CN10
RTC_N03
R228
15K/F_4
This strap should only be enabled in manufacturing
environments using an external pull-up resistor.
D
AAA-BAT-046-K03
2
D
2
South Bridge Strap Pin (1/3)
XOR Chain Entrance /PCI Express*
Port Config 1 bit 1(Port 1-4)
HDA_SDOUT
1
PWROK
2
Internal PU
ICH_TP3
HDA_SDOUT
0
0
RSVD
0
1
Enter XOR Chain
1
0
Normal opration(Default)
1
1
Set PCIE port config bit 1
Description
3
[14] ICH_TP3
ICH_TP3
R196
PROJECT : BU3
Quanta Computer Inc.
*1K_4
+1.5V_HDA_IO_ICH
R224
*1K_4
ACZ_SDOUT
Size
Custom
NB7
Document Number
4
5
6
7
Rev
D3B
ICH9-M CPU/SATA/IDE(1/4)
Date: Monday, August 10, 2009
Sheet
8
12
of
34
1
2
3
4
5
6
7
8
ICH9
INTA#_R
INTB#_R
INTC#_R
INTD#_R
B
REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
C/BE0#
C/BE1#
C/BE2#
C/BE3#
G4
E1
A9
E12
B11
C10
D6
C6
REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
T71
B1A
T83
T84
T34
T33
B1A
T79
T80
T24
T26
T46
T94
T63
D3A
B1A
D10
A5
E6
C9
3G CARD
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
C3
B1
T3
A7
D4
C5
H5
A6
A2
B8
IRDY#
PCI_PAR
PCI_RST#_G
DEVSEL#
PERR#
LOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#
A21
B5
T1
PCI_PLTRST#
CLK_PCI_ICH
[20]
[20]
[20]
[20]
PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3
C386
C382
1
1
T70
T66
2
2
*[email protected]/10V_4
*[email protected]/10V_4
T82
T86
T32
T37
B1A
Place TX DC blocking caps close ICH9.
LAN
CLK_PCI_ICH
T69
[2]
WLAN
[23]
[23]
[23]
[23]
PCIE_RXN5
PCIE_RXP5
PCIE_TXN5
PCIE_TXP5
[20]
[20]
[20]
[20]
PCIE_RXN6
PCIE_RXP6
PCIE_TXN6
PCIE_TXP6
C362
C363
C360
C361
1
1
1
1
2
2
2
2
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
T87
T30
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
INTE#
INTF#
INTG#
INTH#
G3
G1
F3
H4
PCIE_RXN1_C
PCIE_RXP1_C
PCIE_TXN1_C
PCIE_TXP1_C
T25
T24
R24
R23
PERN1
PERP1
PETN1
PETP1
PCIE_RXN2_C
PCIE_RXP2_C
PCIE_TXN2_C
PCIE_TXP2_C
P25
P24
P21
P22
PERN2
PERP2
PETN2
PETP2
PCIE_TXN3_C
PCIE_TXP3_C
N23
N24
M21
M22
PERN3
PERP3
PETN3
PETP3
PCIE_RXN4_C
PCIE_RXP4_C
PCIE_TXN4_C
PCIE_TXP4_C
M25
M24
L24
L23
PCIE_TXN5_C
PCIE_TXP5_C
K24
K25
K21
K22
PCIE_TXN6_C
PCIE_TXP6_C
H24
H25
J24
J23
SPI_CS1#
E24
E23
F23
SPI_MOSI
USBOC0#
USBOC1#
USBOC2#
USBOC3#
USBOC4#
USBOC5#
USBOC6#
USBOC7#
USBOC8#
USBOC9#
USBOC10#
USBOC11#
[21,22] USBOC0#
[21,22] USBOC1#
ICH9MSFF REV 1.0
[18,22] USBOC9#
PERN5
PERP5
PETN5
PETP5
2
V25
V24
U24
U23
DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_MRX_ITX_N0
DMI_MRX_ITX_P0
[6]
[6]
[6]
[6]
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
W23
W24
V21
V22
DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_MRX_ITX_N1
DMI_MRX_ITX_P1
[6]
[6]
[6]
[6]
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
Y24
Y25
Y21
Y22
DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_MRX_ITX_N2
DMI_MRX_ITX_P2
[6]
[6]
[6]
[6]
AB24
AB25
AA23
AA24
DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_MRX_ITX_N3
DMI_MRX_ITX_P3
[6]
[6]
[6]
[6]
T21
T22
CLK_PCIE_ICH# [2]
CLK_PCIE_ICH [2]
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
USBP0N
USBP0P
USBP1N
USBP1P
SPI_CLK
USBP2N
SPI_CS0#
USBP2P
SPI_CS1#/GPIO58/CLGPIO6 USBP3N
USBP3P
SPI_MOSI
USBP4N
SPI_MISO
USBP4P
USBP5N
OC0#/GPIO59
USBP5P
OC1#/GPIO40
USBP6N
OC2#/GPIO41
USBP6P
OC3#/GPIO42
USBP7N
OC4#/GPIO43
USBP7P
OC5#/GPIO29
USBP8N
OC6#/GPIO30
USBP8P
OC7#/GPIO31
USBP9N
OC8#/GPIO44
USBP9P
OC9#/GPIO45
USBP10N
OC10#/GPIO46
USBP10P
OC11#/GPIO47
USBP11N
USBP11P
USBRBIAS
USBRBIAS#
USB
AE5
AD5
PCI_PLTRST# [6]
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
P4
N4
N1
P5
P1
P2
M3
M2
P3
R1
R4
R2
USBRBIAS
PCI_PLTRST#
PERN4
PERP4
PETN4
PETP4
F22
G23
T28
PCI-Express
PCI
Interrupt I/F
F1
F5
F2
C7
A
U20D
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
Direct Media Interface
U20B
A11
B12
A10
C12
A8
A12
E10
C11
B9
D8
A4
E8
A3
D9
C8
C2
D7
B3
D11
B6
D5
D3
F4
E3
E4
B2
C4
C1
D1
E2
J4
H2
SPI
A
AB21
AB22
AE2
AD1
AD3
AD4
AC2
AC3
AC5
AB4
AB2
AB1
AA3
AA2
Y1
Y2
W2
W3
V1
V2
Y5
Y4
U3
U2
V4
V5
DMI_COMP
USBP5USBP5+
USBP7-_R
USBP7+_R
USBP8USBP8+
R165 24.9/F_4
1
2
USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
T100
T99
USBP6USBP6+
[21]
[21]
[21]
[21]
[21]
[21]
[17]
[17]
[21]
[21]
Place within 500mils of ICH9
+1.5V_PCIE_ICH
USB
USB
BT
CCD
B
Cardreader for 13"
F3B
[20]
[20]
R388
R389
3G
T97
T95
USBP9- [18]
USBP9+ [18]
USBP10- [20]
USBP10+ [20]
USBP11- [12]
USBP11+ [12]
*3G@0_4
*3G@0_4
B1A D3A
USBP7- [20]
USBP7+ [20]
SIM
USB&SLEEP CHARAGE
WLAN
C2A
USB-ODD
ICH9MSFF REV 1.0
R226
22.6/F_4
1
+3V_S5
C303
5
0.1u/10V_4
2
4
PLTRST# [20,21,22,23]
1
R202
3
R201
U12
100K_4
C
*100K_6
C
TC7SH08FU(F)
South Bridge Strap Pin (2/3)
Pin Name
PCI PULL-UP
Sampled
Strap description
PCI Express Port
Config 1 bit 0 (Port 1-4)
HDA_SYNC
PWROK
Configuration
R231
*1K_4
ACZ_SYNC
REQ3#
[12]
+3V
GNT2# / GPIO53
PWROK
0 = Setting bit 2
1 = Default
GNT1# / GPIO51
ESI Strap(Server Only)
PWROK
0 = DMI for ESI-compatible
1 = Default
PWROK
Top-Block Swap Override
SPI_MOSI
Integrated TPM Enable
CLPWROK
GNT0#
Boot BIOS Selection 0
PWROK
GNT2#
0 = "top-block swap" mode
1 = Default
R370
0
SPI_CS1# /
GPIO58 / CLGPIO6
Boot BIOS Selection 1
CLPWROK
1
1
0
5
4
3
2
1
REQ2#
REQ1#
REQ0#
IRDY#
+3V_S5
RP5
*1K_4
+3V_S5
5
4
3
2
1
GNT3#
R218
*1K_4
SPI_MOSI
R314
*20K_4
GNT0#
R246
*1K_4
DEVSEL#
PERR#
LOCK#
+3V_S5
RP20
5
4
3
2
1
USBOC10#
USBOC11#
USBOC8#
USBOC9#
SERR#
STOP#
TRDY#
FRAME#
8
6
4
2
7
5
3
1
D
10KX4
8.2KX8
+3V
RP19
INTF#
INTE#
INTH#
INTG#
SPI(Default)
+3V
SPI_CS1#
R164
*1K_4
6
7
8
9
10
5
4
3
2
1
PROJECT : BU3
Quanta Computer Inc.
INTC#_R
INTA#_R
INTB#_R
INTD#_R
Size
Custom
8.2KX8
NB7
Document Number
2
3
4
5
6
7
Rev
D3B
ICH9-M (USB/PCIE/DMI)
Date: Monday, August 10, 2009
1
USBOC3#
USBOC1#
USBOC2#
USBOC0#
10KX8
6
7
8
9
10
Boot Location
PCI
USBOC7# 6
USBOC4# 7
USBOC5# 8
USBOC6# 9
10
+3V
RP18
+3V
0 = INT TPM disable(Default)
1 = INT TPM enable
SPI_CS#1
6
7
8
9
10
8.2KX8
D
PCI_GNT#0
+3V
RP4
+1.5V_HDA_IO_ICH
0 = Default
1 = Setting bit 0
PCI Express Port
Config 2 bit 2 (Port 5-6)
GNT3# / GPIO55
USBOC# PULL-UP
PU/PD
Sheet
8
13
of
34
1
2
3
4
5
6
7
8
+3V_S5
10K_4
USB_BUS_SW3
R354
10K_4
SMB_CLK_ME
R346
10K_4
SMB_DATA_ME
R353
10K_4
RI#
[2,23] SCLK
[2,23] SDATA
[18] USB_BUS_SW3
USB_BUS_SW3
SMB_CLK_ME
SMB_DATA_ME
A
R332
10K_4
T59
ITP_DBRESET#
R197
10K_4
SMB_ALERT#
R200
10K_4
PCIE_WAKE#
R368
8.2K_4
PM_BATLOW#
R376
*10K_4
DNBSWON#
R194
*10K_4
USB_BUS_SW1
U20C
C18 SMBCLK
C15 SMBDATA
B21 LINKALERT#/GPIO60/CLGPIO4
E18 SMLINK0
A24 SMLINK1
[3] ITP_DBRESET#
SMB
R171
RI#
C20
RSV_LPCPD#
ITP_DBRESET#
T5
C25
[2] H_STP_PCI#
[2] H_STP_CPU#
R363
10K_4
USB_BUS_SW0
R210
*10K_4
HDPACT
B1A
10K_4
SMBALERT#/GPIO11
H_STP_PCI#
H_STP_CPU#
B15
A20
STP_PCI#/GPIO15
STP_CPU#/GPIO25
M5
CLKRUN#/GPIO32
CLKRUN#
[22] CLKRUN#
PCIE_WAKE#
SERIRQ
THERM_ALERT#
[20,23] PCIE_WAKE#
[20,22] SERIRQ
[3] THERM_ALERT#
C21
L4
AD20
SCI#
KBSMI#_ICH
*10K_4
R356
*10K_4
R371
B
8.2K_4
SCI#
BOARD_ID1
[22] SCI#
H_STP_PCI#
T45
[18] USB_BUS_SW2
H_STP_CPU#
BOARD_ID0
BOARD_ID6
T40
T98
CLKRUN#
BOARD_ID4
[18] BOARD_ID4
R372
10K_4
SERIRQ
R178
8.2K_4
THERM_ALERT#
R347
10K_4
KBSMI#_ICH
R336
*10K_4
SCI#
R374
10K_4
ICH_GPIO35
R190
*10K_4
MCH_ICH_SYNC#
R179
10K_4
ICH_GPIO37
R51
10K_4
HDPLOC
R352
10K_4
ICH_GPIO38
R351
*short_4PM_LAN_ENABLE_R
ICH_GPIO35
ICH_GPIO38
HDPLOC
BOARD_ID7
DMI_TERM_SEL
CLGPIO5
[19] HDPLOC
T89
PCBEEP
MCH_ICH_SYNC#
[21] PCBEEP
[6] MCH_ICH_SYNC#
[12] ICH_TP3
W AKE#
SERIRQ
THRM#
B24
VRMPW RGD
A19
TP12
AE16
AE18
AD18
B25
C14
D20
AE17
K3
AC8
AC19
D17
E20
M4
AB18
AC18
AB19
AC20
A16
+3V
GPIO1
GPIO6
GPIO7
GPIO8
GPIO12
GPIO13
GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5
K4
AB20
C19
AB17
AC17
AD17
T39
T43
T90
CLK14
CLK48
SPKR
MCH_SYNC#
TP3
TP8
TP9
TP10
AE19
AA18
AE20
AA20
BOARD_ID3
BOARD_ID2
BOARD_ID9
ICH_GPIO37
K1
AB5
CLK_ICH_14M
CLK_ICH_48M
ICH_SUSCLK
SUSCLK
R3
SLP_S3#
SLP_S4#
SLP_S5#
D18
B20
D16
S4_STATE#/GPIO26
E14
PW ROK
D23
ICH_PWRGD
PMSYNC#/GPIO0
A23
T41
R366
SUS_STAT#/LPCPD#
SYS_RESET#
SMB_ALERT#
VR_PWRGD_CLKEN
R382
RI#
L2
[6] PM_SYNC#
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37
Clocks
SDATA
SYS GPIO
Power MGT
SCLK
2.2K_4
MISC
GPIO
Controller Link
2.2K_4
R369
SATA
GPIO
ICH9
R358
T52
DPRSLPVR
C16
PM_BATLOW#
PW RBTN#
U4
LAN_RST#
D22
PM_LAN_ENABLE_R
RSMRST#
D19
PM_RSMRST#_R
U1
CLPW ROK
T4
SLP_M#
B23
CL_CLK0
CL_CLK1
C22
A18
CL_DATA0
CL_DATA1
E22
B18
CL_VREF0
CL_VREF1
F21
A17
CL_RST0#
CL_RST1#
C17
B17
MEM_LED/GPIO24
GPIO10/SUS_PW R_ACK
GPIO14/AC_PRESENT
W OL_EN/GPIO9
A22
E16
A15
D21
A
T64
T42
M1
CK_PW RGD
CLK_ICH_14M [2]
CLK_ICH_48M [2]
SUSB# [22]
SUSC# [22]
BATLOW #
DPRSLPVR/GPIO16
T91
DPRSLPVR [6,26]
DNBSWON# [22]
R350
*0_4
PM_RSMRST#_R
CLK_PWRGD [2]
MPWROK
MPWROK [6,22]
T29
CL_CLK0 [6]
CL_CLK1 [20]
CL_DATA0 [6]
CL_DATA1 [20]
B
CL_VREF0_SB
CL_VREF1_SB
ICH_CL_RST0#
ICH_CL_RST1#
USB_BUS_SW1
HDPACT
USB_BUS_SW0
HDPINT
[6]
[20]
USB_BUS_SW1 [18]
HDPACT [19]
USB_BUS_SW0 [18]
HDPINT [19]
ICH9MSFF REV 1.0
F3B
C2A
R156
*3.24K/F_6
3.24K/F_6
*453/F_4
R391
*10K_4
0.1u/10V_4
C
R166
47K_4
PM_RSMRST#_R
10
3
1
453/F_4
10
C260
0.1u/10V_4
BOARD_ID9
BOARD_ID3
CPUSB#
U11
CPUSB# [12,20]
1
VR_PWRGD_CK410# 2
3
[26] VR_PWRGD_CK410#
R192
*10K_4
R180
*GS@10K_4
R392
10K_4
R177
10K_4
5
4
VR_PWRGD_CLKEN
74LVC1G04GW
3
CPUSB#
ID3
H
L
D13
BAV99
3
L
H
W/ 3G
W/O 3G
R215
2.2K_4
H
L
1
W/ HDMI
W/O HDMI
South Bridge Strap Pin (3/3)
D11
BAV99
2
W/ G-SENSOR
W/O G-SENSOR
ID4
4.7K_4
1
100K_4
ID9
+3V_S5
R170
R198
Board ID
RSMRST# [22]
MMBT3906_NL
2
*0.47u_10V_4
R160
BOARD_ID4
1
100K_4
C378
2
*10K_4
R362
1
R361
2
R345
R173
GS@10K_4
*0_4
Q19
CL_VREF0_SB
1
CL_VREF1_SB
1
CLGPIO5
2
2
2
HDPINT
R191
10K_4
R167
+3V
+3V
C278
R365
2
R360
*10K_4
1
R343
*10K_4
E3A+3V
+3V
1
1
1
C
C2A
+3V
+3V
2
+3V_S5
2
+3V_S5
2
+3V_S5
+3V_S5
Pin Name
Strap description
Sampled
Configuration
FOR
FOR
PU/PD
11"
13"
H
L
C326
0.1u/10V_4
D
D
Reserved
PWROK
DELAY_VR_PWRGOOD 1
[3,6,26] DELAY_VR_PWRGOOD
No Reboot
PWROK
R245
*1K_4
ICH_PWRGD
4
MPWROK
PCBEEP
PROJECT : BU3
Quanta Computer Inc.
2
+3V
3
PCBEEP
0 = Default
1 = No Reboot mode
5
GPIO20
U13
R242
TC7SH08FU(F)
GPIO49
DMI Termination
Voltage
PWROK
0 = for desktop applications
1 = for mobile applications
Internal PU
R243
DMI_TERM_SEL
R172
100K_4
10K_4
Size
Custom
*1K_4
NB7
Document Number
Date: Monday, August 10, 2009
1
2
3
4
5
6
7
Rev
D3B
ICH9-M (PM,GPIO,SMB)
Sheet
14
8
of
34
1
2
3
4
5
6
7
F3B
D17
1
CH751H-40PT
2mA
(15mils)
+5V_ICH_V5REF_SUS
VCC1_5_B[01]
VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
1
D3A
+1.05V
+1.05V
C295
0.022u/16V_4
16
+1.5V
23mA (15mils)
+1.5V_ICH_VCCDMIPLL
C266
0.01u/25V_4
L16
1uh_8
C265
10u/6.3V_8
+1.05V
48mA (15mils)
F3B
+1.05V_ICH_DMI
R155
*short_6
R342
1
C269
C273
10u/6.3V_8
VCCA3GP
V18
VCC3_3[02]
(15mils) +3V_DMI_ICH
(15mils) +3V_SATA_ICH
C309
(20mils)
0.1u/10V_4
+3V_VCCPCORE_ICH
(20mils)
+3V_PCI_ICH
AE9
R175
1
*100u/6.3V_3528
2
+
1
2
U15
V15
C299
0.1u/10V_4
F3B
*short_8 +1.5V_USB_ICH
11mA (15mils)
1
2
R377
C305
0.1u/10V_4
(30mils)
2
VCC1_5_A[13]
VCC1_5_A[14]
U8
C304
0.1u/10V_4
VCCLAN1_05_INT_ICH
19mA (15mils)
23mA (15mils)
+1.5V
1uh_8 +1.5V_ICH_GLANPLL_R_L
L13
VCC1_5_A[11]
VCC1_5_A[12]
G11
H11
G12
H13
J17
VCCUSBPLL
VCC1_5_A[15]
VCC1_5_A[16]
C281
+1.5V_PCIE_ICH
C262
10u/6.3V_8 2.2u/6.3V_6
H19
J18
K16
VCCCL1_5
VCCCL3_3[1]
VCCCL3_3[2]
1
*short_6
2
R357
*short_6
+1.5VSUS
T62
T57
H16
TP_VCCSUS1.5_1
T44
V7
TP_VCCSUS1.5_2
T58
1
TP_VCCSUS1.05_1
TP_VCCSUS1.05_2
G14
G15
H14
*short_6
2
11mA (15mils)
F3B
R373
R211
W8
C377
0.1u/10V_4
C381
0.1u/10V_4
+3V_S5
F3B
(15mils)
+3V_S5_ICH
+1.5V
212mA (40mils)
for VCCSUS3_3
*short_6
C298
0.1u/10V_4
J7
J8
K7
K8
L7
L8
M7
M8
N7
N8
P7
P8
F3B
(20mils)
+V3_S5_USB_ICH
G18
TP_VCCCL1.05
H17
+VCCCL1_5
J14
K14
+3V_ICH
R213
R225
C312
0.022u/16V_4
C306
0.1u/10V_4
*short_8
C313
0.1u/10V_4
T49
*short_6 +3V
C290
1u/6.3V_4
F3B
VCCLAN3_3[1]
VCCLAN3_3[2]
VCCGLAN1_5[1]
VCCGLAN1_5[2]
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
A1
A25
AE1
AE25
PROJECT : BU3
Quanta Computer Inc.
Size
Custom
*short_6+3.3V_GLAN_ICH
NB7
2
B
C
Document Number
3
4
5
6
7
Rev
D3B
ICH9-M (POWER,GND)
Date: Monday, August 10, 2009
1
A
VCCGLAN3_3
ICH9MSFF REV 1.0
1mA (15mils)
R199
U5
U10
W11
U14
W16
U21
U22
U25
V3
V8
V19
V23
W1
W4
W5
W7
W9
W15
W19
W21
W22
W25
Y3
Y23
AA1
AA4
AA6
AA8
AA11
AA13
AA15
AA16
AA17
AA19
AA21
AA22
AA25
AB3
AB9
AB11
AB13
AB15
AC24
AC1
AC4
AC10
AC12
AC14
AD2
AD6
AD9
AD16
AD19
AD22
AE3
AE4
AE11
AE13
AE15
V17
AE8
V9
J16
D
F3B
+3V
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
ICH9MSFF REV 1.0
VCCGLANPLL
80mA (15mils)
C279
10u/6.3V_8
VCCCL1_05
R240
*0_8
B4
B7
B10
B13
B16
B19
B22
D2
D24
E5
E7
E9
E11
E13
E15
E17
E19
E21
F24
G2
G5
G10
G13
G16
G19
G21
H10
H12
H18
H23
J5
J9
J10
J11
J12
J13
J15
J21
J22
J25
K2
K9
K10
K11
K12
K13
K15
K17
K23
L5
L9
L10
L16
L17
L21
L22
L25
M9
M10
M12
M13
M14
M16
M17
M23
N2
N5
N9
N10
N12
N13
N14
N16
N17
N21
N22
N25
P9
P10
P12
P13
P14
P16
P17
P23
R5
R7
R8
R9
R10
R16
R17
R19
R21
R22
R25
T2
T8
T10
T11
T12
T13
T14
T15
T16
T23
GLAN POWER
D
+1.5VSUS_VCCSUSHDA
T7
H15
VCCLAN1_05[1]
VCCLAN1_05[2]
1
C293
0.1u/10V_4
G9
H9
V11
U11
T9
U9
2
1
(20mils)
2
VCC1_5_A[10]
USB CORE
+3V
C302
1 0.1u/10V_4
W18
VCC1_5_A[08]
VCC1_5_A[09]
VCCPUSB
(30mils)
VCCSUS3_3[05]
VCCSUS3_3[06]
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
*short_6
2
VCCSUS3_3[04]
VCC1_5_A[07]
V10
1
VCCSUS3_3[01]
VCCSUS3_3[02]
VCCSUS3_3[03]
C
W10
+1.5V_HDA_IO_ICH
1
ATX
C307
0.1u/10V_4
VCC1_5_A[04]
VCC1_5_A[05]
VCC1_5_A[06]
+1.5V_HDA_IO_ICH
1
VCCSUS1_5[1]
*short_6
R212
C291
0.1u/10V_4
308mA
(20mils)
for
VCC3_3
2
VCCSUS1_05[1]
VCCSUS1_05[2]
VCCSUS1_5[2]
U12
V12
W12
2
VCCSUSHDA
VCCPSUS
2
1
VCC1_5_A[01]
VCC1_5_A[02]
VCC1_5_A[03]
C287
0.1u/10V_4
(30mils)
1
VCCSATAPLL
ARX
U13
V13
W13
AD7
2
W17
*short_6
C271
0.1u/10V_4
R217
C320
*0.1u/10V_4
11mA (15mils)
VCCHDA
(30mils)
C311
0.1u/10V_4
1
G8
H7
H8
2
VCC3_3[06]
VCC3_3[07]
VCC3_3[08]
1
C280
0.1u/10V_4
PCI
C259
10u/6.3V_8
1
2
+1.5V_APLL_ICH
AA9
V14
W14
1
+1.5V_SATA_ICH
*short_8
R161
10uh_8
1
VCCP_CORE
L15
2
47mA (15mils)
2
10uH+-20%_100mA
F3B
+1.5V
2
VCC3_3[03]
VCC3_3[04]
VCC3_3[05]
B
+3V
F3B
2
VCC3_3[01]
+1.05V_ICH_IO
C375
4.7u/6.3V_6
2
V16
U16
C376
0.1u/10V_4
2
F3B
V_CPU_IO[1]
V_CPU_IO[2]
1
0.646A (40mils)
BLM21P221SGPT_8
2mA (15mils)
1
+1.5V_PCIE_ICH
T17
U17
1
1u/6.3V_4
P19
2
VCC_DMI[1]
VCC_DMI[2]
*short_6
2
VCCDMIPLL
FB_330ohm+-25%_100mHz_
1.5A_0.09 ohm DC
+1.05V
+1.05V_ICH_IO
C284
L14
*CH751H-40PT
R387
1
16
C310
0.1u/10V_4
+1.5V
+1.5V
D21
2
2
1
C296
0.022u/16V_4
2
1
R252
10_6
V5REF_SUS
L11
L12
L13
L14
L15
M11
M15
N11
N15
P11
P15
R11
R12
R13
R14
R15
2 *short_1206
1
1
C315
1u/10V_6
2
2
+3V_S5
2
J19
K18
K19
L18
L19
M18
M19
N18
N19
P18
R18
T18
T19
U18
U19
2mA (15mils)
+5V_ICH_V5REF_RUN
1
2
+5V_S5
A
CH751H-40PT
VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
V5REF
2
U7
100/F_6
VCCRTC
2
G7
1
C274
0.1u/10V_4
CORE
1
2
C283
0.1u/10V_4
D16
1
2
2
1
G17
R227
1
+1.05V_ICH R251 1
U20F
B1A
U20E
1.634A (80mils)
+VCCRTC
2
+3V
1
+5V
8
Sheet
15
8
of
34
1
2
3
DDRIII
4
5
6
TERMINATOR DECOUPLING CAPACITOR
8
9.12A(VCC plane from source)
+3V
SMDDR_VREF_DIMM
7
+SMDDR_VTERM
+SMDDR_VTERM
C49
C33
C35
C37
C38
C39
C112
C248
C54
C55
C157
C125
C141
C126
C136
C163
10u/6.3V_8
10u/6.3V_8
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
0.1u/10V_4
2.2u/6.3V_6
2.2u/6.3V_6
0.1u/10V_4
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
C161
C140
C133
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
Close to DIMM0
+1.5VSUS
+1.5VSUS
Close to DIMM0
+1.5VSUS
A
+SMDDR_VTERM
+1.5VSUS
+3V
SMDDR_VREF_DIMM
A
F3B
C147
C134
F3B
C168
+ C186
C51
C56
C57
C58
C59
C249
C110
C53
C50
10u/6.3V_8
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
0.1u/10V_4
2.2u/6.3V_6
2.2u/6.3V_6
0.1u/10V_4
+ C149
10u/6.3V_8
10u/6.3V_8
10u/6.3V_8
*220u/2.5V_3528
SMDDR_VREF_DIMM
+1.5VSUS
75
81
87
93
99
105
111
117
123
1
199
B
M_A_DQ0
M_A_DQ5
M_A_DQ3
M_A_DQ6
M_A_DM0
5
7
15
17
11
M_A_DQ10
M_A_DQ8
M_A_DQ9
M_A_DQ12
M_A_DQS#1
M_A_DQS1
21
23
33
35
27
29
M_A_DQ23
M_A_DQ18
M_A_DQ22
M_A_DQ16
M_A_DQS#2
M_A_DQS2
39
41
51
53
45
47
M_A_DQ24
M_A_DQ31
M_A_DQ28
M_A_DQ25
M_A_DM3
57
59
67
69
63
M_CKE0
[6] M_CKE0
73
M_A_BS#2
M_A_BS#0
[7] M_A_BS#2
[7] M_A_BS#0
[6] M_CLK_DDR0
[6] M_CLK_DDR#0
[6] M_CS#1
[7] M_A_WE#
[7] M_A_CAS#
C
79
109
M_A_A12
M_A_A9
M_A_A8
M_A_A5
M_A_A3
M_A_A1
M_A_A10
M_A_A13
83
85
89
91
95
97
107
119
M_CLK_DDR0
M_CLK_DDR#0
101
103
M_CS#1
121
M_A_WE#
M_A_CAS#
113
115
M_A_DQ32
M_A_DQ37
M_A_DQ36
M_A_DQ35
M_A_DQS#4
M_A_DQS4
129
131
141
143
135
137
M_A_DQ41
M_A_DQ40
M_A_DQ42
M_A_DQ43
M_A_DM5
147
149
157
159
153
M_A_DQ49
M_A_DQ55
M_A_DQ51
M_A_DQ54
M_A_DQS#6
M_A_DQS6
163
165
175
177
169
171
M_A_DQ63
M_A_DQ56
M_A_DQ59
M_A_DQ61
M_A_DM7
181
183
191
193
187
PM_EXTTS#0
[6] PM_EXTTS#0
R16
R17
10K_4
10K_4
+SMDDR_VTERM
198
197
201
77
125
203
3
9
13
19
25
31
37
43
49
55
61
65
71
127
133
139
145
151
155
161
167
173
179
185
189
195
D
CN20
+1.5VSUS
VDD1
VDD3
VDD5
VDD7
VDD9
VDD11
VDD13
VDD15
VDD17
VREF_DQ
VDD(SPD)
VDD2
VDD4
VDD6
VDD8
VDD10
VDD12
VDD14
VDD16
VDD18
VREF_CA
DQ0
DQ1
DQ2
DQ3
DM0
DQ4
DQ5
DQ6
DQ7
DQS#0
DQS0
DQ8
DQ9
DQ10
DQ11
DQS#1
DQS1
DQ12
DQ13
DQ14
DQ15
DM1
DQ16
DQ17
DQ18
DQ19
DQS#2
DQS2
DQ20
DQ21
DQ22
DQ23
DM2
DQ24
DQ25
DQ26
DQ27
DM3
DQ28
DQ29
DQ30
DQ31
DQS#3
DQS3
CKE0
CKE1
BA2
BA0
A12/BC#
A9
A8
A5
A3
A1
A10/AP
A13
CK0
CK0#
CS1#
WE#
CAS#
DQ32
DQ33
DQ34
DQ35
DQS#4
DQS4
DQ40
DQ41
DQ42
DQ43
DM5
BA1
A14
A11
A7
A6
A4
A2
A0
RESET#
DDR3 SDRAM
SO-DIMM (204P)
+3V
M_A_DM[0..7] [7]
M_A_DQ[0..63] [7]
M_A_DQS[0..7] [7]
M_A_DQS#[0..7] [7]
M_A_A[14:0] [7]
Close to DIMM1
DQ48
DQ49
DQ50
DQ51
DQS#6
DQS6
DQ56
DQ57
DQ58
DQ59
DM7
EVENT#
CK1
CK1#
CS#0
RAS#
ODT0
ODT1
DQ36
DQ37
DQ38
DQ39
DM4
DQ44
DQ45
DQ46
DQ47
DQS#5
DQS5
DQ52
DQ53
DQ54
DQ55
DM6
DQ60
DQ61
DQ62
DQ63
DQS#7
DQS7
SA0
SA1
SDA
SCL
NC1
NCTEST
A15
NC2
VTT1
VSS2
VSS4
VSS5
VSS7
VSS9
VSS11
VSS13
VSS15
VSS18
VSS20
VSS22
VSS23
VSS25
VSS27
VSS29
VSS32
VSS34
VSS36
VSS37
VSS39
VSS41
VSS44
VSS46
VSS48
VSS49
VSS51
VTT2
VSS1
VSS3
VSS6
VSS8
VSS10
VSS12
VSS14
VSS16
VSS17
VSS19
VSS21
VSS24
VSS26
VSS28
VSS30
VSS31
VSS33
VSS35
VSS38
VSS40
VSS42
VSS43
VSS45
VSS47
VSS50
VSS52
Close to DIMM0
SMDDR_VREF_DIMM
4
6
16
18
10
12
M_A_DQ4
M_A_DQ7
M_A_DQ1
M_A_DQ2
M_A_DQS#0
M_A_DQS0
22
24
34
36
28
M_A_DQ15
M_A_DQ13
M_A_DQ14
M_A_DQ11
M_A_DM1
40
42
50
52
46
M_A_DQ17
M_A_DQ21
M_A_DQ20
M_A_DQ19
M_A_DM2
56
58
68
70
62
64
M_A_DQ26
M_A_DQ29
M_A_DQ27
M_A_DQ30
M_A_DQS#3
M_A_DQS3
74
M_CKE1
108
M_A_BS#1
80
84
86
90
92
96
98
M_A_A14
M_A_A11
M_A_A7
M_A_A6
M_A_A4
M_A_A2
M_A_A0
+3V
M_B_DM[0..7] [7]
M_B_DQ[0..63] [7]
M_B_DQS[0..7] [7]
M_B_DQS#[0..7] [7]
M_B_A[14:0] [7]
76
82
88
94
100
106
112
118
124
126
M_CKE1 [6]
[7] M_B_BS#2
[7] M_B_BS#0
DDR3_DRAMRST#
30
102
104
M_CLK_DDR1
M_CLK_DDR#1
114
M_CS#0
110
M_A_RAS#
116
120
M_ODT0
M_ODT1
130
132
140
142
136
M_A_DQ34
M_A_DQ39
M_A_DQ33
M_A_DQ38
M_A_DM4
146
148
158
160
152
154
M_A_DQ47
M_A_DQ45
M_A_DQ44
M_A_DQ46
M_A_DQS#5
M_A_DQS5
164
166
174
176
170
M_A_DQ50
M_A_DQ53
M_A_DQ48
M_A_DQ52
M_A_DM6
180
182
192
194
186
188
M_A_DQ57
M_A_DQ60
M_A_DQ62
M_A_DQ58
M_A_DQS#7
M_A_DQS7
200
202
CGDAT_SMB
CGCLK_SMB
M_CLK_DDR1 [6]
M_CLK_DDR#1 [6]
[6] M_CLK_DDR2
[6] M_CLK_DDR#2
M_CS#0 [6]
[6] M_CS#3
M_A_RAS# [7]
[7] M_B_WE#
[7] M_B_CAS#
M_ODT0 [6]
M_ODT1 [6]
[6] PM_EXTTS#1
CGDAT_SMB [2,20]
CGCLK_SMB [2,20]
+3V
+SMDDR_VTERM
78
122
+1.5VSUS
75
81
87
93
99
105
111
117
123
1
199
[6] M_CKE2
M_A_BS#1 [7]
SMDDR_VREF_DIMM
Close to DIMM1
M_B_DQ0
M_B_DQ1
M_B_DQ7
M_B_DQ6
M_B_DM0
5
7
15
17
11
M_B_DQ13
M_B_DQ9
M_B_DQ11
M_B_DQ10
M_B_DQS#1
M_B_DQS1
21
23
33
35
27
29
M_B_DQ16
M_B_DQ21
M_B_DQ22
M_B_DQ19
M_B_DQS#2
M_B_DQS2
39
41
51
53
45
47
M_B_DQ24
M_B_DQ29
M_B_DQ26
M_B_DQ27
M_B_DM3
57
59
67
69
63
M_CKE2
73
M_B_BS#2
M_B_BS#0
79
109
M_B_A12
M_B_A9
M_B_A8
M_B_A5
M_B_A3
M_B_A1
M_B_A10
M_B_A13
83
85
89
91
95
97
107
119
M_CLK_DDR2
M_CLK_DDR#2
101
103
M_CS#3
121
M_B_WE#
M_B_CAS#
113
115
M_B_DQ32
M_B_DQ37
M_B_DQ34
M_B_DQ35
M_B_DQS#4
M_B_DQS4
129
131
141
143
135
137
M_B_DQ41
M_B_DQ40
M_B_DQ43
M_B_DQ47
M_B_DM5
147
149
157
159
153
M_B_DQ53
M_B_DQ52
M_B_DQ51
M_B_DQ49
M_B_DQS#6
M_B_DQS6
163
165
175
177
169
171
M_B_DQ56
M_B_DQ57
M_B_DQ60
M_B_DQ62
M_B_DM7
181
183
191
193
187
PM_EXTTS#1
R22
R23
+SMDDR_VTERM
198
10K_4
10K_4
197
201
77
125
204
203
2
8
14
20
26
32
38
44
48
54
60
66
72
128
134
138
144
150
156
162
168
172
178
184
190
196
3
9
13
19
25
31
37
43
49
55
61
65
71
127
133
139
145
151
155
161
167
173
179
185
189
195
DDRRK-20401-TP4B
CN19
+1.5VSUS
VDD1
VDD3
VDD5
VDD7
VDD9
VDD11
VDD13
VDD15
VDD17
VREF_DQ
VDD(SPD)
VDD2
VDD4
VDD6
VDD8
VDD10
VDD12
VDD14
VDD16
VDD18
VREF_CA
DQ0
DQ1
DQ2
DQ3
DM0
DQ4
DQ5
DQ6
DQ7
DQS#0
DQS0
DQ8
DQ9
DQ10
DQ11
DQS#1
DQS1
DQ12
DQ13
DQ14
DQ15
DM1
DQ16
DQ17
DQ18
DQ19
DQS#2
DQS2
DQ20
DQ21
DQ22
DQ23
DM2
DQ24
DQ25
DQ26
DQ27
DM3
DQ28
DQ29
DQ30
DQ31
DQS#3
DQS3
CKE0
CKE1
BA2
BA0
BA1
A14
A11
A7
A6
A4
A2
A0
A12/BC#
A9
A8
A5
A3
A1
A10/AP
A13
CK0
CK0#
CS1#
WE#
CAS#
DQ32
DQ33
DQ34
DQ35
DQS#4
DQS4
DQ40
DQ41
DQ42
DQ43
DM5
RESET#
DDR3 SDRAM
SO-DIMM (204P)
Close to DIMM1
*220u/2.5V_3528
CK1
CK1#
CS#0
RAS#
ODT0
ODT1
DQ36
DQ37
DQ38
DQ39
DM4
DQ44
DQ45
DQ46
DQ47
DQS#5
DQS5
DQ48
DQ49
DQ50
DQ51
DQS#6
DQS6
DQ52
DQ53
DQ54
DQ55
DM6
DQ56
DQ57
DQ58
DQ59
DM7
DQ60
DQ61
DQ62
DQ63
DQS#7
DQS7
EVENT#
SA0
SA1
SDA
SCL
NC1
NCTEST
A15
NC2
VTT1
VTT2
VSS2
VSS4
VSS5
VSS7
VSS9
VSS11
VSS13
VSS15
VSS18
VSS20
VSS22
VSS23
VSS25
VSS27
VSS29
VSS32
VSS34
VSS36
VSS37
VSS39
VSS41
VSS44
VSS46
VSS48
VSS49
VSS51
VSS1
VSS3
VSS6
VSS8
VSS10
VSS12
VSS14
VSS16
VSS17
VSS19
VSS21
VSS24
VSS26
VSS28
VSS30
VSS31
VSS33
VSS35
VSS38
VSS40
VSS42
VSS43
VSS45
VSS47
VSS50
VSS52
SMDDR_VREF_DIMM
76
82
88
94
100
106
112
118
124
126
4
6
16
18
10
12
M_B_DQ4
M_B_DQ5
M_B_DQ3
M_B_DQ2
M_B_DQS#0
M_B_DQS0
22
24
34
36
28
M_B_DQ12
M_B_DQ8
M_B_DQ14
M_B_DQ15
M_B_DM1
40
42
50
52
46
M_B_DQ20
M_B_DQ17
M_B_DQ18
M_B_DQ23
M_B_DM2
56
58
68
70
62
64
M_B_DQ28
M_B_DQ25
M_B_DQ30
M_B_DQ31
M_B_DQS#3
M_B_DQS3
74
M_CKE3
108
M_B_BS#1
80
84
86
90
92
96
98
M_B_A14
M_B_A11
M_B_A7
M_B_A6
M_B_A4
M_B_A2
M_B_A0
30
DDR3_DRAMRST#
102
104
M_CLK_DDR3
M_CLK_DDR#3
114
M_CS#2
110
M_B_RAS#
116
120
M_ODT2
M_ODT3
130
132
140
142
136
M_B_DQ36
M_B_DQ33
M_B_DQ38
M_B_DQ39
M_B_DM4
146
148
158
160
152
154
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ42
M_B_DQS#5
M_B_DQS5
164
166
174
176
170
M_B_DQ50
M_B_DQ48
M_B_DQ54
M_B_DQ55
M_B_DM6
180
182
192
194
186
188
M_B_DQ59
M_B_DQ61
M_B_DQ58
M_B_DQ63
M_B_DQS#7
M_B_DQS7
200
202
CGDAT_SMB
CGCLK_SMB
78
122
B
M_CKE3 [6]
M_B_BS#1 [7]
DDR3_DRAMRST#
[6]
M_CLK_DDR3 [6]
M_CLK_DDR#3 [6]
M_CS#2 [6]
M_B_RAS# [7]
M_ODT2 [6]
M_ODT3 [6]
C
+SMDDR_VTERM
SMDDR_VREF_DIMM
F3B
204
R138
2
8
14
20
26
32
38
44
48
54
60
66
72
128
134
138
144
150
156
162
168
172
178
184
190
196
R136
*10K_4
*short_6
+1.5VSUS
D
PROJECT : BU3
Quanta Computer Inc.
DDR-STD.
DIMM1
Size
Custom
NB7
Document Number
2
3
4
5
6
7
Rev
D3B
DDR2 SODIMMS: A/B CHANNEL
Date: Monday, August 10, 2009
1
+SMDDR_VREF
*10K_4
0.32uA(20mils)
DDRSK-20401-TP4B
DDR-REV.
DIMM0
R46
Sheet
8
16
of
34
5
4
3
2
CN1
LCDVCC
+3V
CCD_POWER
MIC_GND
INT_MIC_R
[21] MIC_GND
[21] INT_MIC_R
VIN
D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
VIN
LCDVCC
USBP3-_LCD
USBP3+_LCD
+
C332
C3
C2
10u/25V_1210
1000p/50V_4
0.1u/25V_6
LCD_DDCCLK
LCD_DDCDAT
[6] LCD_DDCCLK
[6] LCD_DDCDAT
INT_TXLCLKOUTINT_TXLCLKOUT+
[6] INT_TXLCLKOUT[6] INT_TXLCLKOUT+
INT_TXLOUT2INT_TXLOUT2+
[6] INT_TXLOUT2[6] INT_TXLOUT2+
+3V
R259
R258
2.2K_4
LCD_DDCDAT
LCD_DDCCLK
2.2K_4
INT_TXLOUT1INT_TXLOUT1+
[6] INT_TXLOUT1[6] INT_TXLOUT1+
INT_TXLOUT0INT_TXLOUT0+
[6] INT_TXLOUT0[6] INT_TXLOUT0+
NB Strap
INT_LVDS_EDIDDATA
LVDS_VADJ
DISPON
HALL SENSOR&BACK LIGHT SWITCH
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
+3V
R14
1K_4
DISPON [22]
DISPON
D2
D
BAS316
F3B
D1
LID591# [21,22]
RSX101M-30
INT_LVDS_BLON [6]
R11
3
0.3A (20mils)
34
34
33
33
32
32
31
31
100K_4
2
EC_FPBACK# [22]
Q12
1
LCD Panel Module
1
DTC144EUA
GS13307-11230-7F
F3B
R3
0_4
U25
*PI5A3157CE
C
1
[6] INT_LVDS_PWM
[22] CONTRAST
B1
S
2
GND
3
B0
R2
6
VCC
5
A
4
BLPWM_SEL [22]
+3V
input S
output A
S
INT_LVDS_PWM
H
CRT CON.
S
C
LVDS_VADJ
CONTRAST
*0_4
C7
L
CN16
(20mil)
+5V
1
3
5
7
9
11
13
15
0.1u/10V_4
CRT_VSYNC
CRT_HSYNC
[6] CRT_VSYNC
[6] CRT_HSYNC
GREEN_L
CCD
2
4
6
8
10
12
14
16
+3V
CRT_DDCDAT
CRT_DDCCLK
CRT_DDCDAT
CRT_DDCCLK
[6]
[6]
RED_L
BULE_L
0.2A(20mils)
RP1
L1
1 0X2
3
2
4
+5V
USBP3+ [13]
USBP3- [13]
R1
CCD_POWER
*short_8
C6
2*WCM2012-90_C
3
1
4
+
USBP3+_LCD
USBP3-_LCD
10u/6.3V_8
88107-16001
C5
*1000p/50V_4
C4
*0.1u/10V_4
+3V
R260
2.2K_4
CRT_DDCCLK
R261
2.2K_4
CRT_DDCDAT
E3A
B
LCD POWER SWITCH
[6] CRT_RED
+10V
[6] CRT_GREEN
+3V
[6] CRT_BLUE
Q4
LCDONG 2
AO3404
1
3
C11
100K_4
LCDVCC1 L2
LCDVCC
F3B
GREEN_L
0_6
BULE_L
C400
C399
C398
C401
C402
C403
*4.7p/50V_4
*4.7p/50V_4
*4.7p/50V_4
*4.7p/50V_4
*4.7p/50V_4
*4.7p/50V_4
R5
C9
C10
C8
22_8
0.1u/10V_4
0.01u/25V_4
10u/6.3V_8
Q6
3
ME2N7002E
CRT CON. co-lay
3
1
LCDDISCHG
E3A
1
R10
0_6
R394
*short_6
2
A
R393
0.01u/25V_4
2
[6] INT_LVDS_DIGON
RED_L
1.5A(65mils)
330K_6
+3VPCU
Q5
0_6
3
R8
R9
B
R390
LCDON#
PDTC143TT
Q3
2
A
ME2N7002E
1
100K_4
Quanta Computer Inc.
PROJECT : BU3
Size
Document Number
Rev
D3B
LCD/LED Panel/CCD
Date:
5
4
3
2
Monday, August 10, 2009
Sheet
1
17
of
34
5
4
3
2
1
HDMI IC
+3V
B1A
NB Strap
SDVO_CTRLDATA
R315
R313
1.5K/F_4
1.5K/F_4
SDVO_CTRLCLK
SDVO_CTRLDATA
D
D
B1A
HDMI HPD
+3V
R301
20K_4
PORT-B_HPD#
PORT-B_HPD# [6]
C
C
USB SW
+3V_S5
USB_SW+
C2A
CN11
+3V
+5VPCU
2A (80mils)
(30mils) +5V
BUSBP9BUSBP9+
[13,22] USBOC9#
[22] USB_SLEEP_EN#
[14] BOARD_ID4
B
[6] SDVO_CTRLDATA
[6] SDVO_CTRLCLK
PORT-B_HPD#
SDVO_CTRLDATA
SDVO_CTRLCLK
[6] TMDSB_CLK#
[6] TMDSB_CLK
TMDSB_CLK#
TMDSB_CLK
[6] TMDSB_DATA0#
[6] TMDSB_DATA0
TMDSB_DATA0#
TMDSB_DATA0
[6] TMDSB_DATA2#
[6] TMDSB_DATA2
TMDSB_DATA2#
TMDSB_DATA2
[6] TMDSB_DATA1#
[6] TMDSB_DATA1
TMDSB_DATA1#
TMDSB_DATA1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
[13] USBP9+
USB_SW-
2
USBP9+
USBP9-
[13] USBP9-
10
C380
9
USB_BUS_SW0
D+
8
BUSBP9+
D-
7
BUSBP9-
6
14
USB_BUS_SW1
1D-
S
3
2D+
4
2D-
5
15
GND
GND
OE
GND
*0.1u/10V_4
USB_BUS_SW0 [14]
USB_BUS_SW1 [14]
13
12
11
F3B
U21
TS3USB221DRCR
1 1D+
VCC
GND
GND
GND
HDMI CON.
+3V_S5
R367
*10K_4
USB_BUS_SW0
R193
10K_4
USB_BUS_SW1
Default Mount
B
+5VPCU
+5VPCU
U19
14
USB_SW+
2
USB_SW-
5
EMI
R321
75K/F_4
R322
43K_4
R324
51K_4
R325
51K_4
7
3
1B
2A
2B
9
3A
4B
11
12
4A
3B
88511-3201
USB_BUS_SW3
GND
1A
C379
0.1u/10V_4
[14] USB_BUS_SW3
VCC
+5VPCU
6
8
R364
1
1OE
3OE
10
USB_BUS_SW2
100_4
4
2OE
4OE
13
USB_BUS_SW2 [14]
SN74CBT3125CPWR
A
S
OE#
Function
X
H
Disconnect
OE#
Function
OE#
1OE#
2OE#
3OE#
4OE#
L
L
D=1D
H
Disconnect
Mode3 High
High
Low
Low
H
L
D=2D
L
A port= B port
Mode4 Low
Low
High
High
A
Quanta Computer Inc.
PROJECT : BU3
Size
Document Number
Rev
D3B
HDMI/USB SW/EMI
Date:
5
4
3
2
Monday, August 10, 2009
Sheet
1
18
of
34
5
4
3
2
1
G-sensor
SATA ODD
+3V_HDP
U4
C2A
6
+3V_HDP
U7
CN7
[9,22,27,28,29,31]
1
GND
RXP
1
MAINON
+5VPCU
2
SATA_TXP1 [12]
3
SATA_TXN1 [12]
SHDN
2
C170
VO
C185
*[email protected]/10V_4
5
SATA_RXN1 [12]
TXP
6
SATA_RXP1 [12]
GND
7
R118
8
DP
VIN
SET
5
R42
GS@G913C
*GS@0_4
10
9
GND
D
*GS@MMA73XXL
1.6A(100mils)
+5V_ODD
10
+5V
5
1
8
11
12
14
NC
NC
NC
NC
NC
g-select
0g-Detect
*1K_4
9
+5V
AXSTST
13
Self Test
[email protected]/10V_4
TXN
ACCELX
ACCELY
ACCELZ
2
3
4
Xout
Yout
Zout
SLEEP#
*GS@10u/6.3V_8
4
GND
Vdd
7
4
GND
3
RXN
D
C123
C225
C217
C212
C221
C200
*0.1u/10V_4
*0.1u/10V_4
*0.1u/10V_4
*0.1u/10V_4
*10u/6.3V_8
R289
*short_6
R285
*short_8
+5V
FS (Full Scale) selection
0
+ C345
FS
*88513-1041
*100u/6.3V_3528
1
2g Full-Scale
PD (Power Down) selection
C155
1
GS@10u/6.3V_8
PD
Normal Mode
U5
2
12
+3V_HDP
0
+3V_HDP
0.0015A(20mils)
6g Full-Scale
Voutx
Vouty
Voutz
C124
9
10
11
[email protected]/10V_4
Power-down mode
6
13
1
Main SATA HDD
Vdd
Vdd
3
5
7
ACCELX
ACCELY
ACCELZ
AXSTST
FS
Reserve
Reserve
Reserve
ST
FS
4
8
PD
GND
GND
NC
NC
NC
14
15
16
R69
*GS@10K_4
R60
GS@0_4
GS@TSH35TR
HDPPD selection
0
1
HDPPD
Normal Mode
Power-down mode
C
C
CN18
GND23
GND1
RXP
RXN
GND2
TXN
TXP
GND3
23
1
2
3
4
5
6
7
F3B
SATA_TXP0_R
SATA_TXN0_R
RP8
SATA_RXN0_R
SATA_RXP0_R
RP7
2
4
1 *short_4P2R SATA_TXP0
SATA_TXN0
3
2
4
1 *short_4P2R SATA_RXN0
SATA_RXP0
3
0.013A(20mils)
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
GND24
24
13@C166AN-12205-L
+3.3VSATA1
R275
C340
C341
*10u/6.3V_8
*0.1u/10V_4
*0_8
+3V
C167
C166
C129
GS@1u/6.3V_4
[email protected]/10V_4
[email protected]/10V_4
[14] HDPACT
Close to Pin 7 and Pin 16
HDPLOC
[14] HDPLOC
[14] HDPINT
R89
R54
0.94A(80mils)
HDPLOC
R271
*short_8
C339
C337
0.1u/10V_4
0.1u/10V_4
10u/6.3V_8
18
17
15
2
HDPACT
GND
HD_PINT
11
10
9
14
5
VCC
VCC
ACCELX
ACCELY
ACCELZ
AXSTST
HDPACT
HDPPD
HDPINT
HDPLOC
VSS
+3V_HDP
HDPSCL
HDPSDA
RESET
MODE
Reserved
Reserved
Reserved
Reserved
Reserved
1
20
KXP84_SCL
KXP84_SDA
3
8
G-RESET#
R85
R88
[email protected]_4
[email protected]_4
4
6
12
13
XIN_G
XOUT_G
R86
R87
[email protected]_4
[email protected]_4
19
HDPACT
ADDRESS: 32H
+5V
+ C335
C338
GS@1K_4
*GS@0_4
ACCELY
ACCELX
ACCELZ
AXSTST
U6
GS@R5F211B4D34SP#W4(3B25H)
Close Chipset
+5V_HDD1
16
7
+3V_HDP
(20mils)
3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
RSVD
GND
12V
12V
12V
B1A
+3V_HDP
*100u/6.3V_3528
R52
R55
*GS@47K/F_6
GS@47K/F_6
+3V_HDP
B
B
U8
Vcc
Reset#
GND
3
1
2
Close Chipset
G-RESET#
ACCELX
ACCELY
*GS@G691L308T73UF
ACCELZ
Main SATA HDD (For 11.6")
C128
C127
C130
[email protected]/10V_4
[email protected]/10V_4
[email protected]/10V_4
CN5
GND
TXN
TXP
GND
DP
+5V
+5V
2
SATA_TXP0
SATA_TXP0 [12]
3
SATA_TXN0
SATA_TXN0 [12]
XIN_G
C178
1
RXN
+3V_HDP
1
R56
4
*GS@22p/50V_4
Y2
R84
*GS@8MHZ
5
SATA_RXN0
6
SATA_RXP0
SATA_RXN0 [12]
SATA_RXP0 [12]
1
Q16
[email protected]_4
XOUT_G
3
[22] 3ND_MBDATA
7
[email protected]_4
2
RXP
2
GND
C179
*GS@22p/50V_4
KXP84_SDA
GS@ME2N7002E
8
9
+3V_HDP
0.94A(80mils)
+5V_HDD1
10
A
2
A
*11@88513-1041
3
[22] 3ND_MBCLK
Q17
1
KXP84_SCL
GS@ME2N7002E
CO-LAYOUT With MAIN SATA HDD
Quanta Computer Inc.
PROJECT : BU3
Size
Document Number
Rev
D3B
HDD/ODD/G-sensor
Date:
5
4
3
2
Sheet
Monday, August 10, 2009
1
19
of
34
5
4
3
2
MINI Card Slot#1
(WLAN)
+1.5V WIMAX_P
0.5A(30mils)
F3B
[14,22] SERIRQ
[12] LDRQ#1
[2] PCLK_DEBUG
*0_4
*0_4
R209
*0_4
SERIRQ_debug
LDRQ#1__debug
PLTRST#_debug
PCLK_DEBUG_R
C2A
WIMAX_P
*0_4
*0_4
*0_4
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
CL_RST#1_WLAN
PLTRST#_PCIE
CL_CLK1_WLAN
[13] PCIE_RXP6
[13] PCIE_RXN6
+3V_S5
[2] CLK_PCIE_MINI1
[2] CLK_PCIE_MINI1#
1
3
R250
4.7K_4
AO3413
To BT
WCS_CLK
WCS_DAT
[21] WCS_CLK
[21] WCS_DAT
R204
R205
*short_4
*short_4
WCS_CLKR
WCS_DATR
WLAN_WAKE#
2
Q22
3
[14,23] PCIE_WAKE#
3
15
13
11
9
7
5
3
1
NC
C-Link_RST
C-Link_DAT
C-Link_CLK
GND
NC
NC
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
NC
NC
+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
NC
NC
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND
GND
REFCLK+
REFCLKGND
CLKREQ#
BT_CHCLK
BT_DATA
WAKE#
80052-1021
NC
NC
NC
NC
NC
+1.5V
GND
+3.3V
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
C319
C325
0.1u/10V_4
0.1u/10V_4
10u/6.3V_8
+1.5V
B1A
D
WiMAX_LED# [21]
USBP10+ [13]
USBP10- [13]
+3V_S5
PLTRST#
RF_EN
2
WIMAX_P
R208
C317
C316
0.01u/25V_4
0.1u/10V_4
10u/6.3V_8
RF_EN [22]
LFRAME#_PCIE R236
R235
LAD3_PCIE
LAD2_PCIE
R234
LAD1_PCIE
R233
R232
LAD0_PCIE
16
14
12
10
8
6
4
2
0.33A(30mils)
F3B *0_4
*0_4
*0_4
*0_4
*0_4
WIMAX_P
LFRAME# [12,22]
LAD3 [12,22]
LAD2 [12,22]
LAD1 [12,22]
LAD0 [12,22]
RP6
4.7KX2
Q24
ME2N7002E
3
[2,16] CGDAT_SMB
ME2N7002E
B1A
C323
WL_SMDATA
WL_SMCLK
1
Q20
Q23
2
C292
0.1u/10V_4
4
2
+3V_S5
C318
0.1u/10V_4
3
1
R207
R219
R203
[13] PCIE_TXP6
[13] PCIE_TXN6
Intel module use S5 power for +3.3V
Other module keep +3V for +3.3V
C322
CN22
[14] ICH_CL_RST1#
[14] CL_DATA1
[14] CL_CLK1
D
R335
R206
WIMAX_P
2
*100K_4
54
53
R379
+3V_S5
2.75A(120mils)
54
53
D3A B1A
PLTRST#
1
WL_SMDATA
1
R247
10K_4
*0_4
WIMAX_P
WMAX_P [22]
C
2
1
DTC144EUA
Q25
ME2N7002E
3
[2,16] CGCLK_SMB
R248
B1A
MINI Card Slot#2
3G
F3B
+3V_S5
+3V_3G
+1.5V_3G
C
WL_SMCLK
1
*0_4
+3V_3G
+3V_3G
C2A
+3V_S5
2.75A(120mils)
C267
C264
C327
C328
[email protected]/25V_4
[email protected]/10V_4
[email protected]/10V_4
3G@10u/6.3V_8
CN21
3G@AO1313
R253
[email protected]_4
2
Q27
B1A
3
[13] PCIE_TXP3
[13] PCIE_TXN3
Q26
2
3G_P [22]
3G@DTC144EUA
[13] PCIE_RXP3
[13] PCIE_RXN3
1
B
[2] CLK_PCIE_3G
[2] CLK_PCIE_3G#
D3A
PCIE_WAKE# 3
1
*3G@ME2N7002E
2
Q31
+3V_3G
B1A
3G_WAKE#
R381
15
13
11
9
7
5
3
1
NC
C-Link_RST
C-Link_DAT
C-Link_CLK
GND
+3.3V
+3.3V
CPEE#
GND
PETp0
PETn0
GND
GND
PERp0
RERn0
GND
MMC_DAT
MMC_CMD
GND
REFCLK+
REFCLKGND
CLKREQ#
BT_CHCLK
BT_DATA
WAKE#
3G@80052-1021
+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
CPUSB#
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
RESET#
W_DISABLE#
GND
UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V
54
53
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
3
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
3G_LED# [21]
CPUSB# [12,14]
USBP6+ [13]
USBP6- [13]
D3A
B1A
+1.5V
+1.5V_3G
0.5A(30mils)
B
PLTRST#
3G_EN
PLTRST# [13,21,22,23]
3G_EN [22]
R380
*3G@0_8
+1.5V_3G
UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR
C383
C384
C385
*[email protected]/25V_4
*[email protected]/10V_4
*3G@10u/6.3V_8
C308
*3G@100p/50V_4
54
53
1
*3G@10K_4
BOI
C2A CN8
1
2
3
4
5
6
7
8
9
10
1411
1312
A
SIM CARD CO-LAY
UIM_CLK
UIM_DATA
UIM_RST
UIM_VPP
UIM_PWR
C314
[email protected]/10V_4
USBP7+ [13]
USBP7- [13]
A
3G@88511-120N
Quanta Computer Inc.
PROJECT : BU3
Size
Document Number
Rev
D3B
MINI CARD/TMA
Date:
5
4
3
2
Monday, August 10, 2009
Sheet
1
20
of
34
5
4
INT KeyBoard
3
2
1
Power board
USB&FPC&CARDERAD CONNECTOR
B1A
C2A
+3VPCU
PWR/B_LED#_Q
CP2
CP1
CP4
CP5
C
MX0
MX5
MX6
MX1
8 *220pX4
6
4
2
7
5
3
1
MY7
MY13
MY12
MY15
8 *220pX4
6
4
2
7
5
3
1
MY3
MY5
MY14
MY6
8 *220pX4
6
4
2
7
5
3
1
MY2
MY1
MY0
MY4
8 *220pX4
6
4
2
7
5
3
1
MY17
MY16 [22]
MY17 [22]
K_LED_P
MY2
MY1
MY0
MY4
MY3
MY5
MY14
MY6
MY7
MY13
MY8
MY9
MY10
MY11
MY12
MY15
MX7
MX2
MX3
MX4
MX0
MX5
MX6
MX1
K_LED_P
CAPSLED
FN_F10
NUMLED
MY2 [22]
MY1 [22]
MY0 [22]
MY4 [22]
MY3 [22]
MY5 [22]
MY14 [22]
MY6 [22]
MY7 [22]
MY13 [22]
MY8 [22]
MY9 [22]
MY10 [22]
MY11 [22]
MY12 [22]
MY15 [22]
MX7 [22]
MX2 [22]
MX3 [22]
MX4 [22]
MX0 [22]
MX5 [22]
MX6 [22]
MX1 [22]
CAPSLED [22]
FN_F10 [22]
NUMLED [22]
35
196130-340201
F3B
R6
0_4
ACZ_SDIN0_AUDIO [12]
ACZ_SDOUT_AUDIO [12]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
[22] PWR/B_LED#
BIT_CLK_AUDIO
*ME2N7002E
[12]
Bluetooth
MIC_GND [17]
INT_MIC_R [17]
PCBEEP [14]
AMP_MUTE# [22]
USBOC#0_1 [13,22]
+3VPCU
[22] NBSWON#
+3V
MY16
*100p/50V_4
R7
150_4
CN2
(10mils)
1
2
3
4
PWR/B_LED#_Q
USBP1+ [13]
USBP1- [13]
88513-044N
0.34A (20mils)
USB_EN#0_1 [22]
+3V
*short_4
+1.5V
USBP2+ [13]
USBP2- [13]
WCS_CLK [20]
BT_RESET
BT_RESET [22]
WCS_DAT [20]
+3V
BT_EN [22]
0.18A(20mils)
BT_EN
88266-10001-06
0.61mA (15mils)
LED/TP/Hall Sensor Con.
+5V
1.008A(45mils)
B1A
+5VPCU
3A (140mils)
+5V
CN6
R99
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
MMC_LED#
PLTRST# [13,20,22,23]
USBP4+ [13]
USBP4- [13]
(10mils)
C334
1
2
3
4
5
6
7
8
9
10
D3A
USBP0+ [13]
USBP0- [13]
VDDIO_CODEC R176
D
CN12
MY17
*100p/50V_4
Q2
2
ACZ_SYNC_AUDIO [12]
ACZ_RST#_AUDIO [12]
88511-400N
C333
PWR/B_LED#
12
MX7
MX2
MX3
MX4
8 *220pX4
6
4
2
7
5
3
1
CN9
K_LED_P
MY16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
11
CP3
D
36
MX7
MX6
MX5
MX4
1 10KX8
2
3
4
5
1
RP2
10
9
8
7
6
MX0
MX1
MX3
MX2
3
CN3
K_LED_P
+5V
+3VPCU
+3V
ACIN [22,24]
PWRLED# [22]
SUSLED_EC [22]
BAT_SAT0 [22]
BAT_SAT1 [22]
SATA_LED#_C
*10K_4
SATA_LED#_C
MMBT3906_NL
C
R76
+3V
RF_LED [22]
3G_WIMAX_LED#
MMC_LED#
TPDATA
TPCLK
HDDLED# Q18
10K_4
SATA_LED# [12]
TPDATA
TPCLK
TPDATA [22]
TPCLK [22]
LID591# [17,22]
C213
C219
10p/50V_4
10p/50V_4
88511-180N
HOLE6
6
5
4
7
8
9
HOLE8
6
5
4
7
8
9
HOLE2
6
5
4
7
8
9
HOLE4
6
5
4
7
8
9
E3A
HOLE1
6
5
4
7
8
9
HOLE3
7
8
9
6
5
4
B1A
HOLE5
7
8
9
6
5
4
3G_WIMAX_LED#
D19
3G@BAS316 3G_LED#
D20
BAS316
3G_LED# [20]
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
7
8
9
HOLE7
6
5
4
10
F3B
CPU FAN
C2A
10
HOLE
WiMAX_LED#
WiMAX_LED# [20]
h-c197d142p2-8
h-c197d142p2-8
h-c197d142p2-8
*H-C276D98P2-8
*H-C276D98P2-8
*H-TC276BC236D98P2-8
*HG-TC240BO236X433D87P2
*O-BU3-2-PTH
B
B
F3B
*H-C154D91P2
*H-C154D91P2
*H-C154D91P2
HOLE13
*H-C154D91P2
HOLE14
E3A
+1.5VSUS
1
HOLE12
1
HOLE9
1
1
HOLE10
1
HOLE11
EMI
1
E3A
*H-C154D91P2
*H-C154D91P2
C397
C396
C395
C394
C393
C392
C391
C390
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
*0.1u/10V_4
*0.1u/10V_4
*0.1u/10V_4
*0.1u/10V_4
A
A
Quanta Computer Inc.
PROJECT : BU3
Size
Document Number
Rev
D3B
KB/TP/PB/LEB/CON/HOL
Date:
5
4
3
2
Monday, August 10, 2009
Sheet
1
21
of
34
5
4
3
2
1
SM BUS PU
EC
D3A
D22
+3VPCU
*VPORT 0603 220K-V05
0.01A(20mils)
+3VPCU
+3VPCU
+3V
BLM18AG601SN1D_6 +A3VPCU
L11
C188
0.1u/10V_4
10u/6.3V_8
8769AGND
C233
C252
C253
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4 U9
D9
[14] SCI#
BAS316
SCI#_uR 29
6
[17] EC_FPBACK#
C197
124
*10p/50V_4
[13,20,21,23]
7
PLTRST#
USB_EN#0_1
[21] USB_EN#0_1
[14,20]
125
SERIRQ
BAT_SAT1
[21] BAT_SAT1
C
+5V
R150
R149
TPCLK
10K_4
10K_4 TPDATA
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
54
55
56
57
58
59
60
61
[21]
[21]
[21]
[21]
[21]
[21]
[21]
[21]
[21]
[21]
[21]
[21]
[21]
[21]
[21]
[21]
[21]
[21]
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33
HWPG
TPCLK
TPDATA
[21] TPCLK
[21] TPDATA
F3B
9
[21]
[21]
[21]
[21]
[21]
[21]
[21]
[21]
[24] MBCLK
[24] MBDATA
[3] 2ND_MBCLK
[3] 2ND_MBDATA
[19] 3ND_MBCLK
[19] 3ND_MBDATA
[20] 3G_EN
B
123
[21] FN_F10
[17] BLPWM_SEL
R144
20M_6
70
69
67
68
119
120
24
28
72
71
10
11
12
13
8768_32KX1
77
8768_32KX2
79
KBRST
C2A
32.768KHZ
D/A
GPIO41(VBAT)
LPCPD/GPIO10
GPIO
GPIO42/TCK
GPIO43/TMS
wake-up
GPIO44/TDI
capability
GPIO50/TDO
CIRTX2/GPIO52/RDY
LRESET
PWUREQ/GPIO67
SERIRQ
no wake-up GPO82/TRIS
capability GPO84/BADDR0
SMI/GPIO65
SOUT_CR/GPO83/BADDR1
SIN_CR/CIRRX/GPIO87
SER
GPIO06
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
KBSOUT0/JENK
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KB
KBSOUT4/JEN0
KBSOUT5/TDO
KBSOUT6/RDY
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
KBSOUT16/GPIO60
KBSOUT17/GPIO57
SCL1/GPIO17
SDA1/GPIO22
SCL2/GPIO73
SDA2/GPIO74
SCL3/GPIO23
SDA3/GPIO31
SCL4/GPO47
SDA4/GPIO53
32KX2
100K/F_4
+3VPCU
MTEMP [24]
ICMNT [24]
ACSET_EC [24]
NBSWON#
H_PROCHOT#_EC
USBOC9# [13,18]
NBSWON# [21]
SUSB# [14]
101
105
106
107
80
111
113
93
32
118
62
65
22
16
81
66
BADDR1-0
VFAN [3]
SUSLED_EC
BAT_SAT0
Index
Data
00
XOR TREE TEST MODE
01
CORE DEFINED
10
2Eh
2Fh
11
164Eh
164Fh
SHBM=0: Enable shared memory with host BIOS
[21]
BAT_SAT0 [21]
17
20
21
25
27
110
112
I/O Address
F3B
[3]
RF_LED [21]
AMP_MUTE# [21]
ID [24]
D/C# [24]
DISPON [17]
BADDR0
BADDR0
R124
*10K_4
BADDR1
BT_EN
R129
10K_4
SHBM
RF_EN
R142
10K_4
Disabled ('1') if using FWH device on LPC.
Enabled ('0') if using SPI flash for both system BIOS and EC firmware
BADDR0
BT_EN
BT_EN [21]
USB_SLEEP_EN#
LID591# [17,21]
CONTRAST
USBOC#0_1
ID
[18]
[17]
USBOC#0_1
6
5
SUSON [27,31]
MAINON [9,19,27,28,29,31]
PWR/B_LED# [21]
PWRLED# [21]
PWR/B_LED#
PWRLED#
+3VPCU
U10
2ND_MBCLK
2ND_MBDATA
[13,21]
7
SCL
SDA
A0
A1
A2
WP
VCC
GND
1
2
3
C
0.003A(20mils)
8
4
C261
AF24BC08-SI-TE1(DCEF)
TA1/GPIO56
TB1/GPIO14
TA2/GPIO20
TB2/GPIO01
TA3/GPIO51
TB3/GPIO36
TIMER
SPI
FIR
CIR
SPI_DI/GPIO77
SPI_DO/GPO76/SHBM
SPI_SCK/GPIO75
GPIO81
IRRX1/GPIO72/SIN2
IRRX2_IRSL0/GPIO70
IRTX/GPIO71/SOUT2
CIRRXM/GPIO46/TRST
GPIO34/CIRRXL
CIRTX1/GPIO16
CIRTX2/GPIO30
F_SDI/F_SDIO1
F_SDO/SDIO0
F_CS0
F_SCK
FIU
PSCLK1/GPIO37
PSDAT1/GPIO35
PSCLK2/GPIO26
PSDAT2/GPIO27
PSCLK3/GPIO25
PSDAT3/GPIO12
32KX1/32KCLKIN
A_PWM/GPIO15
B_PWM/GPIO21
C_PWM/GPIO13
D_PWM/GPIO32
PWM
E_PWM/GPIO45
F_PWM/GPIO40/CLKIN48
G_PWM/GPIO66
H_PWM/GPIO33
SMB
PS/2
CLKOUT/GPIO55
VCC_POR
33K/F_4
L12
C255
DA0/GPI94
DA1/GPI95
DA2/GPI96
DA3/GPI97
LDRQ/GPIO24
R153
Y3
4
3
LPC
ECSCI/GPIO54
WPCE775CA0DG
1
2
AVCC
GA20
0_6
C257
VCORF
*22_4
CLKRUN/GPIO11
AGND
[12] RCIN#
122
R135
ICMNT
ACSET_EC
VREF
31
63
117
64
26
15
84
RF_EN
83
82
91 DNBSWON#_uR
75
73
74
23
14
114
109
86
87
90
92
0.1u/10V_4
3G_P [20]
FANSIG [3]
WMAX_P [20]
ACIN [21,24]
S5_ON [25]
VRON [26]
ADDRESS: A0H
Pin 117
AMD PWM 1.2V
INTEL WiMAX_P
SPI FLASH
BT_RESET [21]
RF_EN [20]
D10
BAS316
RSMRST#
DNBSWON#
+3VPCU
[14]
MPWROK
NUMLED [21]
CAPSLED [21]
SPI_SDI_uR
R294
33_4
SPI_SDI
2
SPI_SDO_uR
R291
33_4
SPI_SDO
5
SPI_SCK_uR
R292
33_4
SPI_SCK
6
SPI_CS0#_uR
SPI_SDI_uR
SPI_SDO_uR
SPI_CS0#_uR
SPI_SCK_uR
LAN_P [23]
85
VCC_POR#
R143
104
VREF_uR
R133
4.7K_4
SO
10K_4
VDD
SI
1
R295
+3VPCU
30
0.025A(20mils)
U16
RSMRST# [14]
SUSC# [14]
MPWROK [6,14]
HOLD
SCK
WP
CE
VSS
8
7
C351
3
0.1u/10V_4
4
W25X16AVSSIG
B
C2A
INTERNAL KEYBOARD STRIP SET
+3VPCU
0_4 +A3VPCU
+3VPCU
MY0
R132
10K_4
44
121
C2A
97
98
99
100
108
96
95
94
4.7K_4
4.7K_4
4.7K_4
4.7K_4
4.7K_4
4.7K_4
I/O Base Address
VCORF_uR
[12] GATEA20
103
[14] CLKRUN#
AD0/GPI90
AD1/GPI91
AD2/GPI92
AD3/GPI93
AD4/GPIO05
AD5/GPIO04
AD6/GPIO03
AD7/GPIO07
A/D
GND1
GND2
GND3
GND4
GND5
GND6
R108
8
H=1.6mm
LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK
5
18
45
78
89
116
PCLK_591
PCLK_591
3
126
127
128
1
2
R148
R147
R146
R152
R122
R121
D
R393 must close to C315 and
close to EC Pin100/102.
Routing 20/10/20
4
C234
0.1u/10V_4
VDD
C207
102
C201
10u/6.3V_8
19
46
76
88
115
C251
0.1u/10V_4
10u/6.3V_8
MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA
3ND_MBCLK
3ND_MBDATA
*short_6
C245
C348
[12,20] LFRAME#
[12,20] LAD0
[12,20] LAD1
[12,20] LAD2
[12,20] LAD3
[2] PCLK_591
R102
0.03A(30mils)
VCC1
VCC2
VCC3
VCC4
VCC5
D
+3V_VDD_EC
+3V
HWPG
R107
C230
15p/50V_4
15p/50V_4
10K_4
1u/10V_6
8769AGND
8769AGND
[25] SYS_HWPG
[28] HWPG_1.05V
[29] HWPG_1.8V
[6,27] HWPG_1.5V
D8
BAS316
D7
BAS316
D6
BAS316
D5
BAS316
HWPG
LED
DNBSWON#_uR
C250
*0.47u/10V_4
+3VPCU
A
ACSET_EC
NBSWON#
close to u9
SW1
*SHORT_ PAD
PWRLED#
R145
10K_4
R137
*10K_4
R141
R106
10K_4
10K_4
+3VPCU
PWR/B_LED#
R151
10K_4
R154
*10K_4
A
ICMNT
SMBUS Table
SMBUS
1
2
3
Devices
Address
Battery
CPU Thermal Sensor1
98H
EC EEPROM
A0H
3D Sensor
40H
C254
C256
*10u/6.3V_8
*10u/6.3V_8
[13,21]
[13,21]
USBOC0#
USBOC1#
[21] USB_EN#0
[21] USB_EN#1
8769AGND
USBOC#0_1
USBOC#0_1
USB_EN#0_1
USB_EN#0_1
BAT_SAT0
BAT_SAT1
Quanta Computer Inc.
PROJECT : BU3
Size
Document Number
Rev
D3B
EC-WPCE775CA0DG
Date:
5
4
3
2
Monday, August 10, 2009
Sheet
1
22
of
34
5
4
3
Atheros Lan
2
Decoupling CAP
1
Close to U3
DVDDL
+2.5V_LAN_R
AVDDL12_R
C93
C79
C82
C88
C83
C92
C86
C89
C84
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
*1u/6.3V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
*0.1u/10V_4
D
D
(20mils)
U3
40
41
[2] CLK_PCIE_LAN#
[2] CLK_PCIE_LAN
TWSI_SDA
TWSI_SCL
SDATA_LAN
SCLK_LAN
P L T R S T #
[13,20,21,22]
PLTRST#
[14,20] PCIE_WAKE#
R38
2
3
4
12
TX_N
TX_P
RX_N
RX_P
DVDDL
DVDDL
DVDD_REG
DVDD_REG
REFCLKN
REFCLKP
PERSTn
Atheros
WAKEn
RBIAS
XTLI
10
XTLI
XTLO
9
XTLO
7
VDD3V
AR8132
33p/50V_4
49
DVDDL
C96
1
2
5
VDD3V/CTRL12
C114
10u/6.3V_8
C111
1u/6.3V_4
LX/VDD18O
C103
0.1u/10V_4
LAN_VDD33
R43
C94
+2.5V_LAN
AVDD_REG
VDD11_REG
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL
11
8
16
22
36
39
42
AVDDL_LAN
SENSITIVE PIN!
PER FAE SUGGESTION,
RESERVE ONE BEAD FOR EMI.
SEL_25MHz
GND1
*4.7K_4
1u/6.3V_4
VDD17
6
NC
NC
NC
NC
TRXN[1]
TRXP[1]
TRXN[0]
TRXP[0]
24
23
21
20
18
17
14
13
0.262A(30mils)
Close to Pin45,46
15
19
25
25MHz
R40
28
32
45
46
VDDHO
AVDDH
AVDDH
SMDATA
SMCLK
TESTMODE
NO CONN
Y1
LX
VDD33
TWSI_DATA
TWSI_CLK
34
35
SEL_25MHz
1
33
31
RBIAS
33p/50V_4
C106
30
29
PCIE_WAKE#
2.37K/F_4
C
C107
37
38
44
43
+2.5V_LAN_R
AVDDL12_R R45
0_6
+3V_S5
1u/6.3V_4
(15mils)
+2.5V_LAN
R30
0_6
0_6
C98
0.1u/10V_4
C99
1u/6.3V_4
AVDDL12
Close to Pin11
C102
C97
0.1u/10V_4
*1000p/50V_4
C
Close to Pin8
LAN_AVDDL
R36
C91
0_6
0.1u/10V_4
LAN_VDD33
AVDD_CEN
2
4
0.1u/10V_4 PCIE_RXN5_C
0.1u/10V_4 PCIE_RXP5_C
RP3
*4.7KX2
TX1N
TX1P
TX0N
TX0P
Q9
*ME2N7002E
3
[2,14] SDATA
47
48
26
27
R37
4.7K_4
R28
*4.7K_4
SDATA_LAN
1
R26
0_4
LAN_VDD33
2
LED_ACTn
LED_LINK10/100n
NC
CLKREQn
1
3
C85
C87
PCIE_RXN5
PCIE_RXP5
PCIE_TXN5
PCIE_TXP5
2
[13]
[13]
[13]
[13]
Q10
*ME2N7002E
3
[2,14] SCLK
SCLK_LAN
1
AR8132-AL1E-R
R20
0_4
B
B
C2A
+3V_S5
Close to U3
+3V_S5
*0.1u/10V_4
*0.1u/10V_4
(60mils)
AVDD_CEN
R384
C2A
AVDD_CEN
TX1P
TX1N
C100
49.9X2
49.9X2
0.1u/10V_4
Pin5
Close to U3 pin30
When moun EEPROM
TWSI_SCL PU 4.7K_6
R383
*4.7K_4
*3.01K/F_4
CN4
RN1
A
C387
*0.01u/25V_4
LX/VDD18O
3
10u/6.3V_8
+3V_S5
TX0P
TX0N
VDD3V/CTRL12
Q32
2
7
1
2
3
4
5
6
8
88513-064N
LAN_P [22]
*DTC144EUA
1
C80
C109
0.1u/10V_4
3
*AO3413
*0.01u/25V_4
4.7uh_C
C105
RN2
1
3
C81
1
3
2
4
TWSI_SDA
TWSI_SCL
(30mils)
2
4
TX0P
TX0N
R21
*0_6
TX1P
TX1N
L3
1
Q33
C388
2
E E P R O M
LAN CONNECTOR
PLACE NEAR LAN IC SIDE
LAN_VDD33
A
C104
0.1u/10V_4
C95
C90
0.1u/10V_4
0.1u/10V_4
Pin15
+2.5V_LAN
R44
Quanta Computer Inc.
0_6
PROJECT : BU3
Size
Document Number
Rev
D3B
Atheros Lan
Date:
5
4
3
2
Monday, August 10, 2009
Sheet
1
23
of
34
4
C2A
PCN1
D3A
VA
PF2
BUS-7A-1206
JACK 1
2
1
3
PL2
HI0805R800R-00_8
0.01_3720
PR81
PD4
PDS1040S-13
1
3
1
2
PQ21
AP4435GM
R1
VA2
2
1
2
3
2
PC56
0.1u/50V_6
PC1
0.1u/50V_6
PC74
0.1u/50V_6
PD6
P4SMAJ20A
PR89
220K/F_6
PQ19
AP4435GM
VIN
8
7
6
5
1
2
3
PC25
0.1u/50V_6
4
PL1
HI0805R800R-00_8
3
1
2
1
PC70
2200p/50V_6
BAT-V
8
7
6
5
PR22
4
5
33K_6
2
4
D
D
PD7
1N4148WS
PR93
220K/F_6
1
6
2
5
3
CSIN_1
PQ3
2N7002K
CSIP_1
B1A
[22] ACSET_EC
PC37
1u/16V_6
PR35
10K_6
PR73
10/F_6
ACIN
[21,22] ACIN
PR74
10/F_6
PR78
4.7_6
PC66
0.1u/50V_6
MBDATA
MBCLK
11
9
VN
CH4
6
VP
5
CH3
4
MBDATA
10
PC63
0.1u/50V_6
PC32
2200p/50V_6
21
VDDP
26
VCC
27
CSSN
PR75
2.7_6
BOOT
25
SDA
UGATE
24
SCL
PHASE
23
LGATE
20
PGND
19
VDDSMB
PC64
0.1u/50V_8
PC62
10u/25V_1206
C
4
PQ2
AO4468
0.01_3720
PR71
PL9
PCMC063T-6R8MN
1
BAT-V
2
5
6
7
8
CH1
2
PD5
RB500V-40
3
2
1
PU2
CM1293A-04SO
PC68
1u/16V_6
CSIN
NC
GND
GND
GND
GND
CSSP
+3VPCU
PC82
0.1u/50V_6
1
33
32
31
30
28
CSIP
C
1
VIN
C2A
PR102
10K/F_6
ID
2
[22] D/C#
+3VPCU
PR88
82.5K/F_6
10u/6.3V_8
4
PQ22
IMD2AT108
F3B
PC39
PR27
10K_6
1
PC9
PC2
0.1u/50V_6
2200p/50V_6
5
6
7
8
PC19
0.1u/50V_6
3
20288-044L
3
CH2
13
MBCLK
Add ESD diode base on EC FAE suggestion
ACOK
PC67
0.1u/50V_6
PR79
49.9/F_6
DCIN
+3VPCU
PR84
22K/F_6
B
PR2
*100K_4
DCIN
2
3
VREF
4
ICOMP
7
HI0805R800R-00_8
PC18
10
47p/50V_6
PR13
100_4
BTJ-09HT0B
PR12
100_4
47p/50V_6
PD1
16
VBF
15
GND
29
BAT-V
B
PR94
10/F_6
PR98
0_4
GND
PR99
100_4
BAT-V
PU3
ISL88731
ICMNT [22]
PC79
0.01u/50V_6
MTEMP [22]
*SW1010CPT
1
1
PR17
PD3
*100K/F_6
*ZD3.6V
PC69
*1u/16V_6
2
PC20
.01u/50V_6
PC73
0.01u/50V_6
PC83
10u/25V_1206
PC76
*0.01u/50V_6
A
PR16
0_4
2
2
PR28
*100K/F_6
MBCLK [22]
PD2
*ZD3.6V
A
PC57
10u/25V_1206
0.1u/50V_6
MBDATA [22]
MBCLK
PC6
10u/25V_1206
PR96
2.21K/F_6
+3VPCU
PC4
PC3
12
PL6
TEMP_MBAT
NC
BAT-V
2
ID [22]
17 CSON
NC
VCOMP
14
1
6
PC61
2200p/50V_6
NC
ICM
100p/50V_6
HI0805R800R-00_8
PL7
PC5
2200p/50V_6
CSOP_1
BAT-V
8
MBAT+
ID
1
9
8
7
6
5
4
3
2
1
CSOP_1
PC60
0.01u/50V_6
PC75
0.1u/50V_6
NC
11
1
10
PF1
BUS-10A-1206
2
11
5
C2A
CN14
18 CSOP
ACIN
PC17
F3B
PQ1
AO4710
PR92
10/F_6
CSOP
CSON
PR1
10K_6
2.2/F_6
4
C2A
22
PR77
82.5K/F_6
6251ACSET
PR8
3
2
1
TEMP_MBAT
+3VPCU
Quanta Computer Inc.
PROJECT : BU3
Size
Document Number
Rev
D3B
CHARGER (ISL88731)
Date:
5
4
3
2
Sheet
Monday, August 10, 2009
1
24
of
34
5
4
3
2
1
PR125 0_4
1
2
[3] SYS_SHDN#
VIN
C2A
C2A
VIN
VIN
D
D
2
PC99
0.1u/50V_6
1
PR120
1
2
3
PR140
1/F_6
2
1
1
LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF
REFIN2
ILIM2
OUT2
SKIP#
PGOOD2
EN2
DH2
LX2
4
3V_LX
PC105
0.1u/50V_6
VL
*0_6
REF
PR60
0_4
PC108
1u/16V_6
PR133
1
0_4
2
1
PR141
*0_4
SKIP
PR136
1
B1A
2
SYS_HWPG [22]
0_4
B
MAIND [27,31]
VIN
+3V_S5
+10V
+5V_S5
PR67
1M_6
Modified on 04/16
PR68
22_8
+3VPCU
F3B
PR61
22_8
PR143
1M_6
PC150
*2200p/50V_4
S5D
4
2
3
3
3
3
PC151
*2200p/50V_4
PQ32
AO4468
S5D
3
5
6
7
8
PC149
*2200p/50V_4
+5VPCU
F3B
Modified on 04/16
F3B
PQ29
2N7002K
F3B
PQ28
AO3404
PR64
100K/F_4
PQ16
DTC144EU
2
PQ12
DMN601K-7
1
3
2
1
2
PQ17
DMN601K-7
PQ31
DMN601K-7
+5V_S5
+3V_S5
1
1
A
2
PR65
1M_6
1
2
1
MAIND
PC147
*2200p/50V_4
2
[22] S5_ON
1
4
1
PR138
L(ripple current)
=(19-3.3)*3.3/(2.2u*500k*19)
~2.479A Let Iocp = 9.5A
( 9.5 - 2.479 / 2 ) * 14.2mohm = ( R * 5uA ) / 10
R(Ilim) = 235Kohm
+3VPCU
PQ27
AO4468
+3VPCU
DDPWRGD_R
+3VPCU OCP:4.5A 500K
+5VPCU
PC148
*2200p/50V_4
10K/F_6
AO4710 Rdson=11.8~14.2mOhm
PC109
0.1u/50V_6
MAIND
MAIND
PR59
PC110
150U/6.3_3528
PR131
*0_6
2
PR58
0_6
Let Iocp = 10A
( 10 - 4.187 / 2 ) * 14.2mohm = ( R * 5uA ) / 10
R(Ilim) = 225Kohm
F3B
2
*0_4
2
0_4
PC106
0.1u/50V_6
2
22_8
L(ripple current)
=(19-5)*5/(2.2u*400k*19)
~4.187A
PC120
*680p/50V_6
1
PR137
1
PR132
PR139
1/F_6
+
PR135
0_6
3
AO4710 Rdson=11.8~14.2mOhm
PD10
CHN217
1
C
PQ35
AO4710
3V_DL
3
+10V
+3VPCU
PR145
*4.7_6
SKIP
DDPWRGD_R
3V5V_EN
1
2
PC111
0.1u/50V_6
2
PR142
PL13
2R2uH/8A_7X7X3
3
2
1
PU7
ISL6237
PR128
196K/F_6
2
REFIN2
1
32
31
30
29
28
27
26
25
0.1u/50V_6
PC54
10u/25V_1206
B
8
7
6
5
4
3
2
1
PC107
0.1u/50V_6
PC119
*680p/50V_6
PR130
0_4
C2A
OCP : 9.5A
5
6
7
8
PC116
150U/6.3_3528
5V_LX
5V_DL
4
PQ34
AO4710
BYP
OUT1
FB1
ILIM1
PGOOD1
EN1
DH1
LX1
PAD
PAD
BST1
DL1
PVCC
NC
GND
PGND
DL2
BST2
1
PR144
*4.7_6
2
PC115
9
10
11
2
12
196K/F_6 DDPWRGD_R 13
3V5V_EN
14
5V_DH
15
16
37
36
PAD
PAD
PAD
PR129
*0_4
+
1
PR134
8
7
6
5
2
+5VPCU
+5VPCU
35
34
33
C
C2A
1
2
3
PL14
2R2uH/8A_7X7X3
f : 500k Hz
Modified on 04/08
C2A
17
18
19
20
21
22
23
24
4
PQ30
AO4468
C2A
*0_6
+3VPCU
ESR : 25mΩ
PQ33
AO4468
3V_DH 4
+5VPCU
PR119
200K/F_4
Total capacitor : 150 uF
5
6 3
7 2
8 1
8
7
6
5
3V5V_EN
(Peak 7.733A,AVG 5.801A)
PC102
0.1u/50V_6
REF
1
OCP: 10A
PC55
PC117
2200p/50V_6 10u/25V_1206
5
6
7
8
PC103
1u/6.3V_4
PC118
0.1u/50V_6
PR121 PR124
0_4
*0_4
PC101
1u/16V_6
2
PR118
100K/F_4
2
PC113
PC114
PC112
0.1u/50V_6
2200p/50V_6 10u/25V_1206
f : 400k Hz
1
PR57
0_4
PR126
39K/F_4
ESR : 25mΩ
1
Total capacitor : 160uF
PC100
4.7u/6.3V_6
2
2
1
1
PD9
ZD5.6V
Peak 8.521A,AVG 6.391A
2
VL
2
1
VL
2.567A
3
2
1
A
0.002A
Modified on 04/08
Quanta Computer Inc.
+3V
+5V
3.21A
3.014A
PROJECT : BU3
Size
Document Number
Rev
D3B
SYSTEM 5V/3V (ISL6237)
Date:
5
4
3
2
Monday, August 10, 2009
Sheet
1
25
of
34
5
4
3
D3A
2
1
31
+1.05V
PR149
*10K/F_4
PR87
PR148
*Short_4
VR_PWRGD_CK410#
0_4
PR83
499/F_4
+3V
PR43
10K/F_4
PR41
*Short_4
VID 1.0V
DPRSLPVR [6,14]
D
PC38
[14]
H_DPRSTP# [3,6,12]
PR45
+3V
*Short_4
PR39
1.91K/F_4
31
VID3
32
VID4
33
VID5
34
VID6
35
VR_ON
DPRSTP#
36
37
38
CLK_EN#
39
3V3
40
PGOOD
GND_PAD
0_4
1
FDE
VID2
30
PR86
PR80
*0_4
*6.81K/F_4
2
PMON
VID1
29
PR76
147K/F_4
3
RBIAS
VID0
28
4
VR_TT#
VCCP
27
5
NTC
LGATE
26
H_VID4
PR37
*0_4
H_VID5
PR38
*0_4
H_VID6
470K/NTC_4
Pin 41 is GND Pin
PC13
10u/25V_1206
8.06K/F_4
6
SOFT
7
220p/50V_4
82p/50V_4
332K/F_4 PC23 120p/50V_4
25
OCSET
PHASE
24
8
VW
UGATE
23
9
COMP
BOOT
22
NC
21
PC27
1
1
0.22u/25V_6
Peak 18A,AVG 15A
Total capacitor : 440uF
PR21
ESR : 4.5mΩ
f : 300k Hz
2.2/F_6
PQ18
AOL1448
4
10
FB
PC10
VDD
PC22 1
PR5
*Short_4
+
+
+
1
2
3
10/F_6
+5V
PR26
*2.2/F_6
For 1.5uF 0801
B
2 1u/10V_6
PC28
220u/2V_7343
PC14
1000p/50V_4
PR15
10/F_6
PC15
0.1u/50V_6
PC31
*2200p/50V_6
VIN
C2A
PC7
PC29
220u/2V_7343
PC46
*220u/2V_7343
B1A
6261AVSUM
1000p/50V_4
PR10
*Short_4
20
VIN
VSS
19
18
VSUM
17
VO
16
6261AVSUM
DROOP
DFB
15
RTN
14
13
6261AVO
For 1.5uF 0801
6261ADFB
B
+VCC_CORE
1uH
PQ20
AOL1718
4
PR19
6261ADROOP
PC24 1200p/50V_4
VSEN
VDIFF
11
1.5K/F_4
12
B1A
OCP: 20A
PL8
For 1.5uF 0801
1.62K/F_4
PC59
0.1u/50V_6
VSSP
PR23
6.81K/F_4
PC26 1000p/50V_4
PR20
PC12
10u/25V_1206
ISL6261A QFN 40 6X6
C
2
PC33
2.2u/6.3V_6
2
1
1_8
1
PR85
C2A
PR18
+3VPCU
+5V
PR30
PC30 1000p/50V_4
PC122 220p/50V_4
PC121
PC21
PR24
H_VID3
*0_4
2
15n/25V_4
PR25
*0_4
PR34
1
PC34
PR40
2
10n/25V_6
+3VPCU
1
4.02K/F_4
H_VID2
VIN
*10K/F_4
PC35
H_VID1
*0_4
2
B1A
*0_4
PR146
PR31
6261AVO
For 1.5uF 0801
PR147
*0.1u/50V_6
PR72
*0_4
PR32
5
+3VPCU
[3] H_PROCHOT#
0_8
H_VID0 [4]
1
5 2
3
C
PR42
H_VID1 [4]
PU1
2
PC65
DPRSLPVR
DPRSLPVR
PR29
H_VID3 [4]
H_VID2 [4]
41
+5V_S5
H_VID0
H_VID4 [4]
D3A
For ISL6261 mount PR113 0_0402
*0_4
VRON [22]
H_VID6 [4]
1u/16V_6
H_VID5 [4]
[3,6,14] DELAY_VR_PWRGOOD
D
PR33
PR11 7.68K/F_4
330p/50V_4
PC16
0.1u/25V_4
PR14
PR9
*Short_4
*Short_4
VCCSENSE [4]
PC8
0.047u/25V_4
PR7
3.24K/F_4
PR70
*3.57K/F_4
PR69
10K/NTC_6
6261AVO
PR6
VSSSENSE [4]
Rfset(Kohm) = ( period(us) - 0.29) * 2.33
Period(us) = Rfset(Kohm) / 2.33 +0.29 = 3.213 * 10^ -6 s
Frequency = 1 / (3.213 * 10^ -6) = 311K
0_4
For 1.5uF 0801
PR3
1K/F_4
L(ripple current)
=(19-1)*1/(1.0u*311k*19)
~3.05A
6261ADFB
PC11
330p/50V_4
B1A
PC58
0.22u/25V_8
PR4
3.09K/F_4
Rocset = ( Ioc * Rdroop) / 10uA
Rdroop = 4mV/A
Ioc = Rocset * 10uA / Rdroop = 20.15A
A
A
6261ADROOP
For 1.5uF 0801
Quanta Computer Inc.
PROJECT : BU3
Size
Document Number
Rev
D3B
POWER_CPU CORE (RT8152B)
Date:
5
4
3
2
Monday, August 10, 2009
Sheet
1
26
of
34
5
4
3
2
1
PC84
10u/10V_8
2A
PR100
+SMDDR_VTERM
C2A
0_6
PC77 0.1u/50V_6
VIN
1.8V_H
PC45
10u/10V_8
PC86
10u/10V_8
1.8V_LX
D
Modified on 04/08
D
1
2
3
VTTSNS
CS_GND
17
3
GND
CS
16
4
MODE
V5IN
15
V5FILT
14
PGOOD
13
PR82 5.62K/F_6
B1A
PR46
*0_6
PR90
100K/F_6
PR47
10K/F_4
1
2
3
PC71
1u/6.3V_4
S3_1.8V PR97
0_4
VIN
Total capacitor : 440uF
ESR : 10.5mΩ
For RT8207 400KHZ
f : 400k Hz
OCP: 14.6A
SUSON [22,31]
MAINON [9,19,22,28,29,31]
AO4710 Rdson=3.4 ~ 4.3mOhm
Vout = (PR104/PR103) X 0.75 + 0.75
+1.5VSUS
F3B
MAIND [25,31]
PC152
*2200p/50V_4
Vtrip(mV)=RILIM*10uA
(10u*PR82)/Rdson+Delta_I/2=Iocp
Let Iocp = 14.6A
(Iocp - Delta_I / 2) * Rdson / 10u
PR82 = 5.78Kohm
5
6
7
8
MAIND
MAIND 4
PR49
+1.5VSUS
S5_1.8V
S3_1.8V
0_4
PC40
*0.1u/50V_6
Added on 04/08
PC42
*0.1u/50V_6
A
3
2
1
A
PQ26
AO4468
DIS_MODE
B
L(ripple current)
=(19-1.5)*1.5/(1.5u*400k*19)
~2.303A
10.2K/F_4
PR50
*0_6
C
Peak 12.2A,AVG 10A
+3VPCU
+5VPCU
PR48
PC80
10u/10V_8
PC36
*2200p/50V_6
HWPG_1.5V [6,22]
S5_1.8V PR95
Edited for DDR3
PC78
PC41
220u/2.5V_3528 220u/2.5V_3528
1
2
PC72
1u/6.3V_4
5.1/F_6
2
1
PR44
OCP: 14.4A
*2.2/F_6
+5VPCU
PR91
620K/F_4
0_4
B
+
PR36
PQ4
AOL1718
4
NC
S5
S3
12.2A
FOR DDR II
PR101
0_4
C2A
+
12
7
PC85
0.033u/50V_6
8
NC
Del PR23 0_6 2009/03/02
11
COMP
VDDQSET
TPS51116REGR
PU4
6
PL10
1.5UH +-20% 13A_10x10x4
5
2
VTTREF
5
19
DRVL
20
LL
21
DRVH
22
VBST
23
VLDOIN
24
18
10
+5VPCU
PGND
5
PC43
PC44
PC81
2200p/50V_6
10u/25V_1206
10u/25V_1206
+1.5VSUS
VTTGND
VDDQSNS
C
PQ5
AOL1448
4
1
9
DIS_MODE
+SMDDR_VREF
VTT
GND
25
1.8V_L
Quanta Computer Inc.
PROJECT : BU3
+1.5V
Size
Document Number
Rev
D3B
DDR 1.8V(TPS51116)
Date:
5
4
3
2
Monday, August 10, 2009
Sheet
1
27
of
34
5
4
3
2
1
C2A
VIN
+5VPCU
10_6
PR110
1M_6
1
PC89
+3V
PC93
*0.1u/50V_6
15
EN/DEM
16
1
PR104
10K/F_6
14
1
12
VOUT
PHASE
11
OC
10
PU5
UP6111AQDD
PGOOD
GND
NC
VDDP
9
LGATE
8
PGND
7
TPAD
17
4.7u/6.3V_6
3
2
1
PC49
0.1u/50V_6
PC48
10u/25V_1206
PC92
0.1u/50V_6
UGATE-1V
C2A OCP:
PL11
2R2uH/8A_7X7X3
PHASE-1V
PR105
4.7K/F_6
PQ9
FDMC8296
+1.05V
D3A
C2A
1.05V
+
PR53
PR106
2.2/F_6
4
PC91
*33p/50V_6
R1
PC88
220u/2.5V_3528
Rds*OCP=RILIM*20uA
C
B1A
LGATE-1V
4.02K/F_6
PC47
2200p/50V_6
E3A
NC
10A
PC87
10u/10V_8
R2
PR103
10K/F_6
2
1
2
*1000p/50V_6
UGATE
FB
5
1u/16V_6
TON
3
6
PC94
13
VDD
4
PC95
BOOT
2
C
[22] HWPG_1.05V
2
4
PR107
0_6
0_6
PC50
PC90
3
2
1
PR111
MAINON
D
PQ8
FDMC8884
*0.1u/50V_6
PR109
*10K/F_6
[9,19,22,27,29,31]
E3A
PD8
RB500V-40
5
D
5
PR56
0.01u/50V_6
VOUT=(1+R1/R2)*0.75
1V_FB
(Peak 21.199A,AVG 8A)
B
FDMC8296 Rdson= 8 mOhm
TON=3.85p*RTON*Vout/(Vin-0.5)
TOFF = (Vin / Vout -1)* Ton
TON = 2.185* 10^ -7
TOFF = 3.736 * 10 ^ -6
Frequency = 1 / (Ton + Toff) ~ 253K
B
Total capacitor : 230 uF
ESR : 21mΩ
L(ripple current)
=(19-1.05)*1.05/(2.2u*253k*19)
~1.78A
f : 253k Hz
OCP :10A
Let Iocp = 10A
Iocp - Iripple / 2 = RILIM * 20u /Rdson
10 - 1.78 / 2 = RILIM * 20u / 8mohm
RILIM = 3.644Kohm
A
A
Quanta Computer Inc.
PROJECT : BU3
Size
Document Number
Rev
D3B
VCCP 1.05V(UP6111AQDD)
Date:
5
4
3
2
Monday, August 10, 2009
Sheet
1
28
of
34
5
4
3
2
1
D
D
1
+3V_S5
PR127
100K_4
2
+5V_S5
PC96
.1u/50V_6
VPP PGOOD
1
2
VEN
6
3
8
9
VIN
GND
GND
SHORT 0 0603
MAINON
+3V_S5
PC51
10u/10V_8
PC98
PC104
.1u/50V_6
*.1u/50V_6
VO
HWPG_1.8V [22]
C
+1.8V
0.12A
ADJ
[9,19,22,27,28,31]
NC
5
PR123
43K/F_4
7
PS1
C
PU6
RT9025-25PSP
4
PC97
10u/10V_8
0.8V
PR122
34K/F_6
Vout =0.8(1+R1/R2)
=1.8V
B
B
A
A
Quanta Computer Inc.
PROJECT : BU3
Size
Document Number
Rev
D3B
VCCP 1.05V(UP6111AQDD)
Date:
5
4
3
2
Monday, August 10, 2009
Sheet
1
29
of
34
A
B
C
D
E
+3VPCU
+3VPCU
E3A
4
4
PR150
*45@0_6
GPU_VID4
PR151
*45@0_6
GPU_VID3
PR152
*45@0_6
GPU_VID2
PR153
*45@0_6
GPU_VID1
PR154
*45@0_6
GPU_VID0
+3V
45@0_4
1 GFX_VR_EN
1
PR155
2
PC123
*[email protected]/50V_6
PC131
PC132 45@180p/50V_4
25
VID2
23
VID0
PU8
+5V_S5
PC129
22
PVCC
1
Total capacitor : 220uF
4
21 ISL6263A_LGATE
LGATE
Peak 8A,AVG 6A
6
COMP
PC125
45@2200p/50V_6
PL15
45@1UH 20%11A
VDIFF
UGATE
VSEN
BOOT
45@0_1206
PR184
45@0_1206
+1.05VGFX_CORE_INT
E3A PQ37
18 ISL6263A_UGATE
17
45@FDMC8296
1
1
PR164
*[email protected]_6
2
4
F3B
+
[email protected]/25V_6
3
2
1
2
VDD
PR163 45@1/F_6
PR166
45@10/F_6
16
VSS
15
VIN
VSUM
14
13
12
VO
DFB
DROOP
11
10
RTN
PC134
45@560p/50V_4
9
PR165
[email protected]/F_4
PR183
19 ISL6263A_PHASE
PHASE
PC133
8
OCP: 11A
F3B
[email protected]/F_4
7
PC126
PC127
PC128
[email protected]/[email protected]/25V_8 [email protected]/50V_6
20
PGND
FB
ESR : 21mΩ
f : 293k Hz
2
[email protected]/6.3V_6
VW
1
PQ36
45@FDMC8884
2
SOFT
3
VIN
5
26
27
VID3
VID4
28
VR_ON
PMON
29
30
31
32
[6]
45@1000p/50V_4
5
PR162
[6]
GPU_VID0
E3A
45@ISL6263A
4
[6]
GPU_VID1
1
45@374K/F_6
PR160
[email protected]/F_6
[6]
GPU_VID2
24
VID1
OCSET
[6]
GPU_VID3
5
PR161
2
[email protected]/16V_4
+1.05VGFX_CORE_INT
3
RBIAS
GPU_VID4
3
2
1
PR159
[email protected]/F_6
PC130
45@68p/50V_4
AF_EN
1
PC124
2
1
PGOOD
PR158
45@150K/F_4
3
FDE
PAD
33
PR157
45@10K_4
2
2
PR156
[email protected]/F_4
PC137
*45@2200p/50V_6
+5V_S5
PC135
PC136
[email protected]/50V_645@220u/2.5V_3528
PC138
PC139
45@1u/6.3V_4
F3B
45@1000p/50V_4
PR167
[email protected]/F_4
PC140
45@1000p/50V_4
PR169
*45@10/F_4
PC141
45@1000p/50V_4
VIN
PC142
45@330P/50V_4
2
+1.05VGFX_CORE_INT
1
2
2
PR168
45@10/F_6
PC143
[email protected]/50V_6
PR171
PR172
ISL6263A_VSUM
PR170
45@1K/F_4
45@0_4
[email protected]/F_4
PR173
[email protected]/F_4
[8] VCC_AXG_SENSE
PR174
45@0_4
E3B
[8] VSS_AXG_SENSE
PC144
[email protected]/50V_6
PR175
[email protected]/F_4
1
Parallel
PR177
45@10K _6 NTC
2
PR176
*45@10/F_4
PR178
45@0_8
PC145
*[email protected]/10V_4
PC146
[email protected]/10V_4
VIN
+1.05VGFX_CORE_INT
PR179
45@1M_6
PR180
45@22_8
GFX_VR_EN_G
3
PR181
45@1M_62
PQ39
45@DMN601K-7
1
PQ38
45@DTC144EU
1
Quanta Computer Inc.
2
PR182
45@100K_4
1
2
1
[6] GFX_VR_EN
GFX_VR_EN
L(ripple current)
=(19-1.05)*1.05/(1.0u*293k*19)
~3.86A
Rocset = ( Ioc * Rdroop) / 10uA
Rdroop =7mV/A Rocset = 8.06K
Ioc = Rocset * 10uA / Rdroop =11.5A
3
1
Rfset = 1 / (( T - 0.29*10^-6 ) * 47)
Rfset = 6.81K, T = 3.414 * 10^-6 s
F = 1/ T = 293KHz
PROJECT : BU3
Size
Document Number
Rev
D3B
1.05V_GFX (ISL6263A)
Date:
A
B
C
D
Monday, August 10, 2009
Sheet
E
30
of
34
5
4
3
2
1
D
D
VIN
+1.5VSUS
PR116
1M_6
+10V
B1A
PR55
*22_8
PR66
*1M_6
3
3
3
SUS_ON_G
PR117
1M_6
2
2
2
[22,27] SUSON
VIN
C
PQ15
*DMN601K-7
+3V
PR115
1M_6
+1.05V
+5V
PR108
22_8
PC53
*2200p/50V_4
1
1
PQ11
*DMN601K-7
1
PR113
100K/F_4
PQ25
DTC144EU
PR63
22_8
+1.5V
PR52
*22_8
+SMDDR_VTERM
PR54
*22_8
+10V
PR51
*22_8
C
PR62
1M_6
3
3
3
3
MAIND [25,27]
3
3
MAIND
3
MAINON_ON_G
2
PQ10
*DMN601K-7
2
PQ6
*DMN601K-7
PQ13
DMN601K-7
PC52
*2200p/50V_4
1
2
PQ7
*DMN601K-7
1
2
PQ14
DMN601K-7
1
2
PQ23
DMN601K-7
1
PQ24
DTC144EU
2
1
PR112
100K/F_4
PR114
1M_6
2
1
MAINON
1
[9,19,22,27,28,29]
B
B
A
A
Quanta Computer Inc.
PROJECT : BU3
Size
Document Number
Rev
D3B
Discharge/1.5/2.5V
Date:
5
4
3
2
Sheet
Monday, August 10, 2009
1
31
of
34
5
4
3
2
1
BU3
MODEL
Model
REV
B1B
BU3 MB
D
C
C2A
B
D3A
A
DOC NO. 204
5
CHANGE LIST
PAGE 2: add RP21 value 3G@0X2 ,add net name CLK_PCIE_3G to 3G Card pin13 & CLK_PCIE_3G# to 3G Card pin11
PAGE 13: Add net name PCIE_RXN3,PCIE_RXP3,PCIE_TXN3,PCIE_TXP3 to 3G connector
PAGE 13: Add C386,C382 both value [email protected]/10V_4
PAGE 13: del USB5-,USB5+ net
PAGE 13: add USB7-,USB7+ net to sim connector
PAGE 18: del HDMI function U17,R298,R299,R303,R305,R307,R309,R320,R323,R308,R306,R304,R310,R319,R317,R302,R297,R296,R312,R157
PAGE 18: del HDMI function C365,C369,C356,C354,Q28,RN,4,RN5,RNN6,RN3,L20.L21.L22.L23,Q28
PAGE 20: change Q20 PIN 2 net neme +3V_S5 to WIMAX_P
PAGE 20: change Q22,Q27 PIN 1 net neme +3V_S5 to +3VPCU
PAGE 20: Add R380 value 0_8 between net +1.5V and net +1.5V_3G.
PAGE 20: Add C383 value 0.01V/25_4,C384 value 0.1/10V_4,C385 value 10u/3.6V_8 between net +1.5V_3G and GND
PAGE 20: change R253,R250 power source +3V_S5 to +3VPCU
PAGE 20: Connect CN21 PIN 48,PIN 28,PIN 6 to +1.5V_3G
PAGE 20: Add CN23 value 3G@88266-10001-06 for co-lay SIM card
PAGE 20: CN21 Connect PIN 33 to PCIE_TXP3,Connect PIN 31 to PCIE_TXN3,Connect PIN 25 to RCIE_RXP3,Connect PIN 23 to PCIE_RXN3
PAGE 20: Add Q31 value 3G@ME2N7002E,R296 value 3G@10K_4 for PCIE_WAKE to CN21 PIN 1
PAGE 18: Change CN11 pin define to PORT-B_HPD#
PAGE 21: Change CN6 footprint and pin define
PAGE 2: Change CLOCK GEN SRC6 net CLK_PCIE_3G and CLK_PCIE_3G# for 3G card
PAGE 2: Change CLOCK GEN SRC4 net CLK_PCIE_MINI1 and CLK_PCIE_MINI1# for mini card 1
PAGE 20: Change D15 to R297 value 0805 ohm
PAGE 21: Remove CN13
PAGE 7: Change R116 value to 12.1K ohm, Add U17 for DDR3_POWER_OK
PAGE 25: Change PR134 value to 169K ohm, change PR128 value to 174K phm . NC PR141
PAGE 26: Change PR25 value to 8.06k ohm ,change PR20 value to 1.5K ohm ,change PR4 value to 3.09K ohm ,change PR7 value to 3.24k ohm.
PAGE 27: Change PR82 value to 5.9k ohm
PAGE 27: Change PR105 value 9.31K ohm , NC PC91
PAGE 27: NC PR66,PQ15
PAGE 20: Change CN22 footprint to minipci-80019-1021-52p-ruv-v ,chabge CN23 footprint to minipci-80052-1021-52p-ldv-v
PAGE 21: Change HOLE 4 module
PAGE 6: Change R116 value 12.1K/F_4 , add R378 & U22 for DDR3_POWER_OK
PAGE 6: Change CN6 pin define.
PAGE 27: Change PR82 value to 5.62K ohm
PAGE 2: Swap vertical RP11,RP21
PAGE 15 : Change R227 value to 100/F_6
PAGE 19 : Change U6 value to GS@R5F211B4D31SP#W4(0217H)
PAGE 14 : Add R382 to +3V_S5 for ICHP SCI#
PAGE 17 : Change T79,T80,T82,T84,T83,T86, footprint to TP3050
PAGE 20 : Add D19,D20 for 3G_LED# & WiMAX_LED# between CN6 PIN 8 3G_WIMAX_LED#
PAGE 21 : Change CN9 PIN 33 DEFINE for MMC_LED#,change CN6 footprint 18pin
PAGE 22 : Add R135 for battery state issue.
PAGE 23 : Add Q33 Q32 C388 R383 R384 for LAN_P soft start, change CN4 pin define.
PAGE 20 : change CN21 CN22 footprint
PAGE 20 : remove CN13 and change CN8 connector module
PAGE 14 : R191 always pull high for HDMI & USB BOI-FUNCTION
PAGE 18 : Change CN11 PIN11 net to BOARD_ID4
PAGE 28 : remove PL5 ,remove JP3, short by trace.
PAGE 27 : remove PL4 ,remove JP2&JP1 , short by trace.
PAGE 25 : remove PL12 &PL15,remove JP5 & JP4, short by trace.
PAGE 24 : remove PL3 ,short by trace.
PAGE 26 : PC8 change to CH3474K1B04 CAP CHIP 0.047U 25V(+-10% X7R 0402)
PAGE 21 : Change CN9 PIN 24 net to 1.5V
PAGE 22 : Add R135 for battery leakage current
PAGE 26 : Add PU1 PIN8 & PIN9 PC121,PC122 CAP CHIP 220P 50V(+-10%,X7R,0402) to GND SINGAL
PAGE 9 : Add C389 value 10u/6.3V_8, and change C187 value to 22u/6.3V_8 for CRT power noise issue,(reserve U23)
PAGE 24 : Change PU3 Part number to AL088731001
PAGE 22 : Change C255 and C257 value to 15p/50V_4
PAGE 14 : Change R156 Part Number to CS23243F930
PAGE 12 : Add R385 ,R386 for USB-ODD CO-LAY.(reserve)
PAGE 24 : Change PD4 Footprint to d-5_375-3_975 for OPEN issue
PAGE 21 : Change CN2 PIN1 NET from +5VPCU to +3VPCU
PAGE 20 : Change R379 value to 100K_4 for WIFI INTEL module issue
PAGE 13 : Add R388,R389 for reserve gemalto 3G sim card
PAGE 18 : Reserve D21 and R387 to keep voltage 0.4 V
PROJECT MODEL :
PART NUMBER:
BU3
31BU3MB0000
4
FROM
To
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
D
C
B
A
APPROVED BY:
Mosy Li
DATE:
DRAWING BY:
Mosy Li
REVISON:
3
PAGE
2
Quanta Computer Inc.
2009/04/27
1B
PROJECT : BU3
Size
Document Number
Date:
Monday, August 10, 2009
Rev
D3B
Change list
1
Sheet
31
of
33
5
4
3
2
1
BU3
MODEL
Model
REV
D3A
BU3 MB
D
E3A
F3A
C
CHANGE LIST
PAGE 26: Add PR146,PR147,PR148 value 0_4 ,PR149 value 10K/F_4 for power suggest
PAGE 22: Add D22 for ESD/EOS suggestion
- Power pin EOS
PAGE 22: C386,C382,RP21不
不不不
PAGE 02: change C373,C374 value to 33p/50V_4 for XTAL report
PAGE 20: reserve Q31,R381,R380,C383,C384,C385
PAGE 17: reserve CRT FILTER R390,R393,R394,C398,C399,C400,C401,C402,C403 for EMI requirement.
PAGE 21: add C390,C391,C392,C393,C394,C395,C396,C397 for EMI requirement .
PAGE 30: add 1.05v_GFX SCHEMATIC for reader stand by function (GS45 only)
PAGE 28: change PQ8 and PQ9 value and footprint .
PAGE 17: Add R3,R2 BOI-OPTION for GS40.
PAGE 17: Add R392 ,R391 for Board ID3
PAGE 21: Add HOLE 9,HOLE 11, HOLE 10.
PAGE (12) :Change R244 to bead 120ohm, C324 to 22PF for EMI requirement.
PAGE (24) : Add PR88, PR35 for Adapter Voltage monitor
PAGE (17) : Reserve U25 for LVDS_VADJ option (support XP function key).
PAGE (25) : Reserve PC147,PC148,PC149,PC150,PC151,PC152 for power soft start
PAGE (21) : Change CN9 connector pin define to 40 pin
PAGE (17) : Change D1 footprint
PAGE (18) : Change HDMI CN11 connector PIN DEFINE
PAGE (22) : R176,RP7,RP8,L2,R138,R161,R377,R199,R251,R351,R213,R225,R211,R373,R357,R240,R212,R217,R175,R342,R155,R48,R59,R112,R111,R130,R131,R288,R284,R62,R91,R41,R134 replace by short pad
PAGE (22) : R378,R68,R279,R12,RP17,RP15,RP16,RP14,RP13,RP12,RP11,RP10,RP9,R293,R8 replace by short pad
PAGE (22) : Change CN9 pin define. 40PINS
PAGE (30) : Change PL15 from 2.2uH to 1uH , PC145 change to unmounted , PR167 change to 1.54K , PC136 should be mounted for 3D hang up issue.
PAGE (09) : reserve C186,C149,C269,C247,C113,C342,C154,C135 for cost down
PAGE
FROM
To
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
1B
D
C
B
B
A
A
DOC NO. 204
5
PROJECT MODEL :
PART NUMBER:
BU3
31BU3MB0000
4
APPROVED BY:
Mosy Li
DATE:
DRAWING BY:
Mosy Li
REVISON:
3
2
Quanta Computer Inc.
2009/04/27
1B
PROJECT : BU3
Size
Document Number
Date:
Monday, August 10, 2009
Rev
D3B
Change list
1
Sheet
32
of
33
5
4
Power Tree
Table
D
1
System
Charger
ISL88731
P.24
AC
DC
2
ISL6261A
P.26
3
2
VCC_CORE +-3%
VRON enable
(Peak 18A,AVG 13.5A)
6
2N7002K
P.25
OCP 18A
+5V_S5 +-5%
S5_ON enable
(Peak 0.002A,AVG 0.001A)
D
7
AO4468
P.25
+5VPCU +-5%
AC/DC Insert enable
(Peak 8.52A,AVG 6.391A)
3
ISL6237
P.25
8
AO3404
P.25
(Peak 7.733A,AVG 5.8A) OCP 7A
4
UPI6111A
P.28
4
ISL6263A
P.30
+1.05V +-5%
MAINON enable
(Peak 21A,AVG 8A)
9
AO4468
P.25
(Peak 4.019A,AVG 3.014A)
+3V +-5%
MAINON enable
C
(Peak 3.423A,AVG 2.567A)
+3V_S5 +-5%
S5_ON enable
+1.8V +-5%
MAINON enable
10
RT9025
P.29
(Peak 4.28A,AVG 3.21A)
(Peak 0.12A,AVG 0.09A)
OCP 10A
+1.05VGFX_CORE_INT
GFX_VR_EN enable
(Peak 8A,AVG 6A)
+5V +-5%
MAINON enable
OCP 8A
+3VPCU +-5%
AC/DC Insert enable
C
B
1
+-3%
B
OCP 11A
+SMDDR_VTERM
MAINON enable
5
TPS51116
+SMDDR_VREF
SUSON enable
P.27
+1.5VSUS +-3%
SUSON enable
A
(Peak 16.324A,AVG 12.243A)
OCP 14.4A
13
AO4468
P.27
+1.5V
MAINON enable
A
(Peak 2.901A,AVG 2.176A)
Quanta Computer Inc.
PROJECT : BU3
Size
Document Number
Rev
D3B
Power Tree Table
Date:
5
4
3
2
Monday, August 10, 2009
Sheet
1
34
of
34