drc pc55

Transcription

drc pc55

5
4
3
2
1
BOM
ZRQ_GDDR3 SHB ULT SYSTEM BLOCK DIAGRAM
Dual Channel DDR III
1066/1333/1600 MHZ
DDR3L-SODIMM
Memory Down
Haswell ULT 15W
PCI-E x4
MCP 1168pins TX/RX
P13
D
2Rx16
P14
PCIE-5
P20,P21
D
IMC
DC+GT3
Max. 4G
VRAM
GV2-DDR3
GPU
N14P-GV2
N14P-GE2
N14P-GT2
01
IV@
: iGPU
EV@ : Optimus
SW@ : With DP switch
NSW@ : W/O DP switch
TPL@ : Touch screen
KBL@ : Keyboard backlight
TPM@ : TPM
SATA - HDD
P27
MINI CARD
mSATA SSD
Display
CLK
40 mm X 24 mm
SATA0
X'TAL 27MHz
P15~P19
EDP
SATA
eDP
SATA1
eDP Conn.
P24
DDI2-Lane0~1
P26
DDI2-Lane2~3
USB3-2/USB2-1
DP Switch
HD3SS2521
Mini DP Conn. P23
P23
DP
DDI1
Integrated PCH
USB2-4
USB2 IO
HDMI Conn.
P25
USB3-1
P31
USB3.0/2.0
USB2-2
CCD(Camera)
USB2-0
USB Charger
SLG55584A
P23
C
USB2.0
USB2-5
Touch Screen(option)
USB3 Port
MB side
P31
P31
C
CLK
P23
PCI-E x1
PCIE-3
USB2 IO
X'TAL
32.768KHz
USB2-6
I/O Board Conn.
P31
PCIE-4
X'TAL 24MHz
P8
Int. MIC
IHDA
RJ45
P27
Cardreader
CONN. 2in 1
SPI ROM
SPI
P29
P8
EC
ALC3225
AUDIO CODEC
P30
RTL8411AAR
/RTL8411BAR
10/100/1G P28
X'TAL 25MHz
P2~P13
LPC
DMIC Array
P26
CLK
RTC
BATTERY
Azalia
B
MINI CARD
WLAN+BT
USB2-3
I/O board
TPM(option)
IT8587
P30
P33
BQ24737A
Batery Charger
P27
TPS51216
P34
TPS51225
+3V/+5V
ALC1001
AMP P30
Combo HP
Speaker*2
Speaker*2
P30
P30
P30
K/B Con.
P32
OCH1691WAD
Image Sensor
HALL SENSOR
P24
P32
Fan Driver
TPS51211
(PWM Type)
P32
+1.05V_S5/+1.05V
B
Thermal Protection
P39
Discharger
P37
TPS54318
P35
TPS51622
+VCCIN
+1.35V_SUS
+1.5V
P39
UP1642
P38
+VGPU_CORE
P40
TPS51211
+1.5V_GFX/1.05V_GFX/3V_GFX
P36
P41
A
A
Quanta Computer Inc.
PROJECT : ZRQ
Size
Document Number
Rev
3A
Block Diagram
Date:
5
4
3
2
Sheet
Friday, April 12, 2013
1
1
of
47
5
4
3
2
1
02
Haswell ULT (DISPLAY,eDP)
HSW_ULT_DDR3L
U42A
HDMI
23
23
23
23
23
23
23
23
Mini DP
C54
C55
B58
C58
B55
A55
A57
B57
INT_HDMITX2N
INT_HDMITX2P
INT_HDMITX1N
INT_HDMITX1P
INT_HDMITX0N
INT_HDMITX0P
INT_HDMICLKINT_HDMICLK+
C51
C50
C53
B54
C49
B50
A53
B53
DP2_TXN0
DP2_TXP0
DP2_TXN1
DP2_TXP1
DP2_TXN2
DP2_TXP2
DP2_TXN3
DP2_TXP3
DDI1_TXN0
DDI1_TXP0
DDI1_TXN1
DDI1_TXP1
DDI1_TXN2
DDI1_TXP2
DDI1_TXN3
DDI1_TXP3
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
DDI
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
EDP
DDI2_TXN0
DDI2_TXP0
DDI2_TXN1
DDI2_TXP1
DDI2_TXN2
DDI2_TXP2
DDI2_TXN3
DDI2_TXP3
EDP_AUXN
EDP_AUXP
EDP_RCOMP
EDP_DISP_UTIL
C45
B46
A47
B47
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
24
24
24
24
C47
C46
A49
B49
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
24
24
24
24
A45 EDP_AUXN
B45 EDP_AUXP
EDP_AUXN
EDP_AUXP
D20 EDP_RCOMP R149
A43 DP_UTIL
R561
R562
eDP Panel
25
25
25
25
25
25
25
25
D
D
24
24
24.9/F_4
PCH_BRIGHT
*0_4
+VCCIOA_OUT
eDP_RCOMP
Trace length < 100 mils
Trace width = 20 mils
Trace spacing = 25 mils
*0_4
1 OF 19
C
C
+3V
HSW_ULT_DDR3L
U42I
24
24
24
PCH_BRIGHT
PCH_BLON
PCH_VDDEN
PCH_BRIGHT
PCH_BLON
PCH_VDDEN
B8
A9
C6
EDP_BKLCTL
EDP_BKLEN
EDP_VDDEN
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
eDP SIDEBAND
B9
C9
D9
D11
HDMI_DDCCLK_SW
25
HDMI_DDCDATA_SW
25
DDPC_CTRLCLK
23
DDPC_CTRLDAT
23
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
DGPU_SELECT#
R160
R635
R623
R617
R601
10K_4
10K_4
10K_4
10K_4
10K_4
TP_INT_PCH
DDPC_CTRLCLK
DDPC_CTRLDAT
R175
R576
R575
TPL@100K_4
2.2K_4
2.2K_4
+3V
TP46
24
B
10
10
10,32
TP_INT_PCH
BOARD_ID4
BOARD_ID1
BOARD_ID2
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PME#
DGPU_SELECT#
BOARD_ID4
BOARD_ID1
BOARD_ID2
U6
P4
N4
N2
AD4
U7
L1
L3
R5
L4
PIRQA/GPIO77
PIRQB/GPIO78
PIRQC/GPIO79
PIRQD/GPIO80
PME
GPIO55
GPIO52
GPIO54
GPIO51
GPIO53
+3V
+3V
+3V
+3V
+3V_S5
PCIE
DDPB_AUXN
DDPC_AUXN
DDPB_AUXP
DDPC_AUXP
DISPLAY
+3V
+3V
+3V
+3V
+3V
DDPB_HPD
DDPC_HPD
EDP_HPD
C5
B6
B5
A6
C8
A8
D6
INT_DP_AUXDN
23
INT_DP_AUXDP
23
INT_HDMI_HPD
DP_HPD_Q
23
EDP_HPD
24
25
DDPB/C_CTRLDATA has an iPD 20K,
When PU at rising edge of
PCH_PWROK, the DDI port will
be detected
B
R806
9 OF 19
100K_4
A
A
PROJECT :ZRQ
Size
Document Number
Rev
3A
Haswell 3/5 (DDI/eDP)
Date:
5
4
3
2
Sheet
2
1
of
47
5
4
Haswell ULT
U42C
14
M_A_DQ[63:0]
M_A_DQ0 AH63
M_A_DQ1 AH62
M_A_DQ2 AK63
M_A_DQ3 AK62
M_A_DQ4 AH61
M_A_DQ5 AH60
M_A_DQ6 AK61
M_A_DQ7 AK60
M_A_DQ8 AM63
M_A_DQ9 AM62
M_A_DQ10 AP63
M_A_DQ11 AP62
M_A_DQ12 AM61
M_A_DQ13 AM60
M_A_DQ14 AP61
M_A_DQ15 AP60
M_A_DQ16 AP58
M_A_DQ17 AR58
M_A_DQ18 AM57
M_A_DQ19 AK57
M_A_DQ20 AL58
M_A_DQ21 AK58
M_A_DQ22 AR57
M_A_DQ23 AN57
M_A_DQ24 AP55
M_A_DQ25 AR55
M_A_DQ26 AM54
M_A_DQ27 AK54
M_A_DQ28 AL55
M_A_DQ29 AK55
M_A_DQ30 AR54
M_A_DQ31 AN54
M_A_DQ32 AY58
M_A_DQ33 AW58
M_A_DQ34 AY56
M_A_DQ35 AW56
M_A_DQ36 AV58
M_A_DQ37 AU58
M_A_DQ38 AV56
M_A_DQ39 AU56
M_A_DQ40 AY54
M_A_DQ41 AW54
M_A_DQ42 AY52
M_A_DQ43 AW52
M_A_DQ44 AV54
M_A_DQ45 AU54
M_A_DQ46 AV52
M_A_DQ47 AU52
M_A_DQ48 AK40
M_A_DQ49 AK42
M_A_DQ50 AM43
M_A_DQ51 AM45
M_A_DQ52 AK45
M_A_DQ53 AK43
M_A_DQ54 AM40
M_A_DQ55 AM42
M_A_DQ56 AM46
M_A_DQ57 AK46
M_A_DQ58 AM49
M_A_DQ59 AK49
M_A_DQ60 AM48
M_A_DQ61 AK48
M_A_DQ62 AM51
M_A_DQ63 AK51
D
C
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
3
(DDR3L)
HSW_ULT_DDR3L
U42D
SA_CLK#0
SA_CLK0
SA_CLK#1
SA_CLK1
SA_CKE0
SA_CKE1
SA_CKE2
SA_CKE3
SA_CS#0
SA_CS#1
SA_ODT0
SA_RAS
SA_WE
SA_CAS
SA_BA0
SA_BA1
SA_BA2
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
DDR CHANNEL A
03
Haswell Processor (DDR3)
HSW_ULT_DDR3L
SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7
SA_DQSP0
SA_DQSP1
SA_DQSP2
SA_DQSP3
SA_DQSP4
SA_DQSP5
SA_DQSP6
SA_DQSP7
SM_VREF_CA
SM_VREF_DQ0
SM_VREF_DQ1
15
AU37
AV37
AW36
AY36
M_A_CLK0#
M_A_CLK0
M_A_CLK1#
M_A_CLK1
AU43
AW43
AY42
AY43
M_A_CKE0
M_A_CKE1
14
14
AP33
AR32
M_A_CS#0
M_A_CS#1
14
14
AP32
14
14
14
14
M_A_RAS#
M_A_WE#
M_A_CAS#
14
14
14
AU35
AV35
AY41
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_A[15:0]
14
14
14
14
AU36 M_A_A0
AY37 M_A_A1
AR38 M_A_A2
AP36 M_A_A3
AU39 M_A_A4
AR36 M_A_A5
AV40 M_A_A6
AW39M_A_A7
AY39 M_A_A8
AU40 M_A_A9
AP35 M_A_A10
AW41M_A_A11
AU41 M_A_A12
AR35 M_A_A13
AV42 M_A_A14
AU42 M_A_A15
AJ61
AN62
AM58
AM55
AV57
AV53
AL43
AL48
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
AJ62
AN61
AN58
AN55
AW57
AW53
AL42
AL49
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
AP49
AR51
AP51
M_B_DQ0 AY31
M_B_DQ1 AW31
M_B_DQ2 AY29
M_B_DQ3 AW29
M_B_DQ4 AV31
M_B_DQ5 AU31
M_B_DQ6 AV29
M_B_DQ7 AU29
M_B_DQ8 AY27
M_B_DQ9 AW27
M_B_DQ10 AY25
M_B_DQ11 AW25
M_B_DQ12 AV27
M_B_DQ13 AU27
M_B_DQ14 AV25
M_B_DQ15 AU25
M_B_DQ16 AM29
M_B_DQ17 AK29
M_B_DQ18 AL28
M_B_DQ19 AK28
M_B_DQ20 AR29
M_B_DQ21 AN29
M_B_DQ22 AR28
M_B_DQ23 AP28
M_B_DQ24 AN26
M_B_DQ25 AR26
M_B_DQ26 AR25
M_B_DQ27 AP25
M_B_DQ28 AK26
M_B_DQ29 AM26
M_B_DQ30 AK25
M_B_DQ31 AL25
M_B_DQ32 AY23
M_B_DQ33 AW23
M_B_DQ34 AY21
M_B_DQ35 AW21
M_B_DQ36 AV23
M_B_DQ37 AU23
M_B_DQ38 AV21
M_B_DQ39 AU21
M_B_DQ40 AY19
M_B_DQ41 AW19
M_B_DQ42 AY17
M_B_DQ43 AW17
M_B_DQ44 AV19
M_B_DQ45 AU19
M_B_DQ46 AV17
M_B_DQ47 AU17
M_B_DQ48 AR21
M_B_DQ49 AR22
M_B_DQ50 AL21
M_B_DQ51 AM22
M_B_DQ52 AN22
M_B_DQ53 AP21
M_B_DQ54 AK21
M_B_DQ55 AK22
M_B_DQ56 AN20
M_B_DQ57 AR20
M_B_DQ58 AK18
M_B_DQ59 AL18
M_B_DQ60 AK20
M_B_DQ61 AM20
M_B_DQ62 AR18
M_B_DQ63 AP18
TP60
AY34
AW34
AU34
M_A_DQS#[7:0]
M_A_DQS[7:0]
M_B_DQ[63:0]
14
14
+VREF_CA_CPU
+VREFDQ_SA_M3
+VREFDQ_SB_M3
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
SB_CK#0
SB_CK0
SB_CK#1
SB_CK1
SB_CKE0
SB_CKE1
SB_CKE2
SB_CKE3
SB_CS#0
SB_CS#1
SB_ODT0
SB_RAS
SB_WE
SB_CAS
SB_BA0
SB_BA1
SB_BA2
DDR CHANNEL B
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7
SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7
AM38
AN38
AK38
AL38
M_B_CLK0#
M_B_CLK0
M_B_CLK1#
M_B_CLK1
AY49
AU50
AW49
AV50
M_B_CKE0
M_B_CKE1
15
15
M_B_CS#0
M_B_CS#1
15
15
AM32
AK32
AL32
M_B_ODT0
15
15
15
15
TP57
AM35
AK35
AM33
M_B_RAS#
M_B_WE#
M_B_CAS#
15
15
15
AL35
AM36
AU49
M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_A[15:0]
15
15
15
15
AP40 M_B_A0
AR40 M_B_A1
AP42 M_B_A2
AR42 M_B_A3
AR45 M_B_A4
AP45 M_B_A5
AW46M_B_A6
AY46 M_B_A7
AY47 M_B_A8
AU46 M_B_A9
AK36 M_B_A10
AV47 M_B_A11
AU47 M_B_A12
AK33 M_B_A13
AR46 M_B_A14
AP46 M_B_A15
C
AW30 M_B_DQS#0
AV26 M_B_DQS#1
AN28 M_B_DQS#2
AN25 M_B_DQS#3
AW22 M_B_DQS#4
AV18 M_B_DQS#5
AN21 M_B_DQS#6
AN18 M_B_DQS#7
AV30
AW26
AM28
AM25
AV22
AW18
AM21
AM18
D
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#[7:0]
15
M_B_DQS[7:0]
15
B
B
3 OF 19
4 OF 19
A
A
PROJECT : ZRQ
Size
Document Number
Date:
Rev
3A
Haswell 2/5 (DDR3 I/F)
5
4
3
2
Sheet
1
3
of
47
5
4
3
2
1
04
Haswell ULT (SIDEBAND)
H_PECI (50ohm)
Route on microstrip only
Spacing >18 mils
Trace Length: 0.4~6.125 iches
D
D
H_PWRGOOD (50ohm)
Trace Length: 1~11.25 inches
CPU_PLTRST# (50ohm)
Trace Length: 10~17 inches
33
33,34,38
TP79
TP25
H_PECI
H_PROCHOT#
H_PROCHOT#
R605
56_4
PROC_DETECT
CATERR#
H_PECI
D61
K61
N62
H_PROCHOT#_R
K63
H_PWRGOOD_R
SM_RCOMP[0:2]
Trace width = 12~15 mils
C
HSW_ULT_DDR3L
U42B
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
CPU_DRAMRST#
DDR_PG_CTRL
C61
AU60
AV60
AU61
AV15
AV61
PROC_DETECT
CATERR
PECI
MISC
JTAG
PROCHOT
THERMAL
PROCPWRGD
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
SM_DRAMRST
SM_PG_CNTL1
PRDY
PREQ
PROC_TCK
PROC_TMS
PROC_TRST
PROC_TDI
PROC_TDO
J62
K62
E60
E61
E59
F63
F62
XDP_PRDY#
XDP_PREQ#
XDP_TCK0
XDP_TMS_CPU
XDP_TRST#
XDP_TDI_CPU
XDP_TDO_CPU
J60
H60
H61
H62
K59
H63
K60
J61
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_BPM#6
XDP_BPM#7
XDP_PRDY#
13
XDP_PREQ#
13
XDP_TCK0
8,13
XDP_TMS_CPU
13
XDP_TRST#
8,13
XDP_TDI_CPU
13
XDP_TDO_CPU
13
TCK,TMS
Trace Length < 9000mils
PWR
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
DDR3L
DSW
XDP_BPM#0
XDP_BPM#1
TP82
TP80
TP23
TP81
TP27
TP24
13
13
BPM#[0:7]
Trace Length 1~6 inches
Length match < 300 mils
C
2 OF 19
B
B
DRAM COMP
XDP PU/PD
DDR3L ODT GENERATION
+1.35V_SUS
+1.05V_VCCST
SM_RCOMP_0
+5V_S5
R691
120/F_4
5
R202
R690
51_4
*51_4
C271
0.1u/10V_4
R306
220K/F_4
SM_RCOMP_2
37
4
DDR_VTTT_PG_CTRL
+1.35V_SUS
NC
1
DRAMRST
2
R695
*SHORT_4
DDR_PG_CTRL
Y
GND
3
74AUP1G07GW
3
PU/PD of CPU
VCC
A
2
100/F_4
U20
51_4
SM_RCOMP_1
XDP_TCK0
XDP_TRST#
R686
R141
1
XDP_TDO_CPU
1
200/F_4
2
R683
+1.35V_SUS
+VCCIO_OUT
2
*62_4
R403
470_4
+1.05V_VCCST
62_4
CPU
CPU_DRAMRST#
R738
66.5/F_4
M_B_ODT0_DIMM
15
R739
66.5/F_4
M_B_ODT1_DIMM
15
DRAM
2
A
R614
Q37
2N7002K
1
R613
1
H_PROCHOT#
*SHORT_4
DDR3_DRAMRST#
14,15
1
R404
R569
10K_4
2
H_PWRGOOD_R
C459
*0.1u/10V_4
PROJECT : ZRQ
Size
Document Number
Rev
3A
Haswell 1/5 (PEG/DMI/FDI)
Date:
5
4
A
3
2
Sheet
1
4
of
47
5
4
3
2
1
VDDQ Output Decoupling Recommendations
VCCST PWRGD
330uFx2
7343
BOT socket side
22uFx11
0805
5 onTOP, 6 on BOT inside socket cavity
10uFx10
0805
5 onTOP, 5 on BOT inside socket cavity
+3V_S5
U38
5
Haswell ULT (POWER)
+1.35V_SUS
VCCST_PWRGD
0_4 VCCST_PWRGD_R
R582
*0_4
4
C259
10u/6.3V_6
C261
10u/6.3V_6
C260
10u/6.3V_6
C225
10u/6.3V_6
C257
2.2u/6.3V_6
C224
2.2u/6.3V_6
+VCCIN
C
38
VCC_SENSE
C256
2.2u/6.3V_6
R566
VRON_CPU R567
R587
*SHORT_4
10K_4
VCC_SENSE_R
ULT_RVSD_65
TP43
TP47
TP50
ULT_RVSD_66
ULT_RVSD_67
ULT_RVSD_68
38
PWR_DEBUG
+1.05V_VCCST
VCCST_PWRGD
VRON_CPU
IMVP_PWRGD
R173
*SHORT_4
R151
150_6
B
PWR_DEBUG_R
ULT_RVSD_69
ULT_RVSD_70
ULT_RVSD_71
ULT_RVSD_72
ULT_RVSD_73
ULT_RVSD_74
ULT_RVSD_75
ULT_RVSD_76
ULT_RVSD_77
ULT_RVSD_78
ULT_RVSD_79
ULT_RVSD_80
ULT_RVSD_81
TP30
TP31
TP26
TP85
TP32
TP49
TP51
TP36
TP39
TP37
TP54
TP35
TP34
+1.05V_VCCST
*SHORT_8
VCC_SENSE
RSVD
VCCIO_OUT
VCCIOA_OUT
RSVD
RSVD
RSVD
L62
N63
L63
B59
F60
C59
VIDALERT
VIDSCLK
VIDSOUT
VCCST_PWRGD
VR_EN
VR_READY
D63
H59
P62
P60
P61
N59
N61
T59
AD60
AD59
AA59
AE60
AC59
AG58
U59
V59
VCCST
VCCST
VCCST
AB57
AD57
AG57
C24
C28
C32
C223
*4.7u/6.3V_6
+VCCIN
HSW ULT POWER
VSS
PWR_DEBUG
VSS
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
AC22
AE22
AE23
+1.05V_VCCST
R190
VCC
RSVD
RSVD
E63
AB23
A59
E20
AD23
AA23
AE59
H_CPU_SVIDART#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
VCCST_PWRGD
VRON_CPU
IMVP_PWRGD
IMVP_PWRGD
13
+1.05V
TP42
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
F59
N58
AC58
ULT_RVSD_63
ULT_RVSD_64
+VCCIO_OUT
+VCCIOA_OUT
*10K_4
10,38
13
+VCCIN
TP28
TP41
100/F_4
300mA
300mA
+1.05V_VCCST
C227
2.2u/6.3V_6
R583
RSVD
RSVD
AH26
AJ31
AJ33
AJ37
AN33
AP43
AR48
AY35
AY40
AY44
AY50
C226
10u/6.3V_6
+
C269
*470u/2V_7343
L59
J58
VCC
VCC
VCC
VCC
VCC
VCC
Y
VCCST_PWRGD_EN
3
GND
D
74AUP1G07GW
3
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
C36
C40
C44
C48
C52
C56
E23
E25
E27
E29
E31
E33
E35
E37
E39
E41
E43
E45
E47
E49
E51
E53
E55
E57
F24
F28
F32
F36
F40
F44
F48
F52
F56
G23
G25
G27
G29
G31
G33
G35
G37
G39
G41
G43
G45
G47
G49
G51
G53
G55
G57
H23
J23
K23
K57
L22
M23
M57
P57
U57
W57
+VCCIN
C190
22u/6.3V_8
C46
22u/6.3V_8
C73
22u/6.3V_8
C561
22u/6.3V_8
C228
22u/6.3V_8
C75
22u/6.3V_8
C210
22u/6.3V_8
C567
22u/6.3V_8
C557
22u/6.3V_8
C201
22u/6.3V_8
C206
22u/6.3V_8
C202
22u/6.3V_8
C562
22u/6.3V_8
C167
22u/6.3V_8
C45
22u/6.3V_8
C169
22u/6.3V_8
C165
22u/6.3V_8
C171
22u/6.3V_8
Reserve from EC
Q60
+VCCIN 32A
2
B-stage DNP
HWPG_1.05V_EC#
33
2N7002K
1
+1.35V_CPU
C258
10u/6.3V_6
ULT_RVSD_61
ULT_RVSD_62
TP29
TP20
2
HWPG_1.05V_EC
HSW_ULT_DDR3L
U42L
+1.35V_CPU 1.4A
1
NC
A
R545
C582
*0.1u/10V_4
+ C537
*470u/2V_7343
VCC
C584
0.1u/10V_4
R551
10K_4
D
05
CRB is via +1.05V PG
+1.05V_VCCST
R579
R544
R580
VCCST_PWRGD_EN
*0_4
*0_4
0_4
HWPG_1.05V_S5
13,33,36
EC_PWROK
7,33
APWORK
7,33
C
+1.05V
+VCCIO_OUT
R536
C204
22u/6.3V_8
C173
22u/6.3V_8
C172
22u/6.3V_8
C170
22u/6.3V_8
C203
22u/6.3V_8
C205
22u/6.3V_8
C548
*22u/6.3V_8
C168
*22u/6.3V_8
C71
*22u/6.3V_8
C542
*22u/6.3V_8
C74
*22u/6.3V_8
C560
*22u/6.3V_8
C580
*4.7u/6.3V_6
Layout note: need routing together
and ALERT need between CLK and DATA.
SVID
+VCCIO_OUT
VCC Output Decoupling Recommendations
470uFx4
7343
TOP socket side
22uFx8
0805
4 on TOP, 4 on BOT near socket edge
22uFx11
0805
TOP, inside socket cavity
10uFx11
0805
BOT, inside socket cavity
*0_8
+1.05V_VCCST
B
R621
*130/F_4
H_CPU_SVIDDAT
R618
130/F_4
R625
Place PU resistor
close to CPU
*SHORT_4
38
38
+1.05V_VCCST +VCCIO_OUT
Place PU resistor
close to CPU
12 OF 19
VR_SVID_DATA
R640
75_4
R633
*75_4
H_CPU_SVIDART#
R630
43_4
VR_SVID_ALERT#
H_CPU_SVIDCLK
R641
*SHORT_4
VR_SVID_CLK
+3V
HWPG_1.05V for DDR=1.5V
38
+3V
R463
*4.7K_4
A
R451
*4.7K_4
A
3
2
*4.7K_4
C487
*1000p/50V_4
R453
*100K/F_4
2
Q45
*MMBT3904-7-F
C485
*1000p/50V_4
1
R454
1
+1.05V
33
3
HWPG_1.05V
Q46
*DTC144EU
PROJECT : ZRQ
10/30 reserve
DDR=1.5V ,This block POP
Size
4
Rev
3A
Haswell 4/5 (POWER)
Date:
5
Document Number
3
2
Sheet
1
5
of
47
5
4
3
Haswell ULT
13
13
13
13
8,13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
AC60
AC62
AC63
AA63
AA60
Y62
Y61
Y60
V62
V61
V60
U60
T63
T62
T61
T60
NOA_STBN_0
NOA_STBN_1
NOA_STBP_0
NOA_STBP_1
AA62
U63
AA61
U62
49.9/F_4 CFG_RCOMP
V63
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
NOA_STBN_0
NOA_STBN_1
NOA_STBP_0
NOA_STBP_1
R177
C
A5
R572
8.2K_4
TD_IREF
E1
D1
J20
H18
B12
06
HSW_ULT_DDR3L
U42S
D
(CFG,RSVD)
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD
RSVD_TP
RSVD_TP
RSVD_TP
RESERVED
RSVD
RSVD
RSVD
PROC_OPI_RCOMP
CFG16
CFG18
CFG17
CFG19
RSVD
RSVD
CFG_RCOMP
VSS
VSS
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
TD_IREF
D
AV63
AU63
C63
C62
B43
A51
B51
L60
N60
W23
Y22
AY15 OPI_COMP1
R700
49.9/F_4
AV62
D58
P22
N21
C
P20
R20
19 OF 19
Processor Strapping
1
CFG0
EAR-STALL/NOT STALL RESET SEQUENCE
AFTER PCU PLL IS LOCKED
CFG1
PCH/ PCH LESS MODE SELECTION
(DEFAULT) NORMAL OPERATION; NO STALL
0
STALL
(DEFAULT) NORMAL OPERATION
PCH-LESS MODE
CFG3
PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)
DISABLED
NO PHYSICAL DISPLAY PORT ATTACHED
TO
EMBEDDED DISPLAY PORT
ENABLED
AN EXTERNAL DISPLAY PORT DEVICE IS
CONNECTED
TO THE EMBEDDED DISPLAY PORT
CFG 8
ALLOW THE USE OF NOA ON LOCKED UNITS
DISABLED(DEFAULT); IN THIS CASE, NOA
WILL BE DISABLED IN LOCKED UNITS AND
ENABLED IN UN-LOCKED UNITS
ENABLED; NOA WILL BE AVAILABLE
REGARDLESS OF THE LOCKING OF THE UNIT
CFG0
R203
*1K_4
CFG1
R184
*1K_4
B
B
CFG9
NO SVID PROTOCOL CAPABLE VR
CONNECTED
VRS SUPPORTING SVID PROTOCOL ARE
PRESENT
NO VR SUPPORTING SVID IS PRESENT. THE
CHIP WILL NOT GENERATE (OR RESPOND TO)
SVID ACTIVITY
POWER FEATURES ACTIVATED
DURING RESET
POWER FEATURES (ESPECIALLY CLOCK
GATINE ARE NOT ACTIVATED
CFG3
CFG8
R192
*1K_4
R171
*1K_4
R172
*1K_4
CFG10 R183
*1K_4
CFG9
A
A
CFG10
SAFE MODE BOOT
PROJECT : ZRQ
Size
Document Number
Rev
3A
Haswell 5/5 (CFG/GND)
Date:
5
4
3
2
Sheet
1
6
of
47
5
4
3
Haswell ULT PCH (PM)
33
R662
PCH_SUSACK#
PCH_SUSPWRACK R658
13
SYS_RESET#
SYS_PWROK
D
EC_PWROK
33
33
PCI_PLTRST#
R719
R659
R274
R277
33
RSMRST#
PCH_SUSPWARN#
33
DNBSWON#
34
ACPRESENT
13,33
SYSTEM POWER MANAGEMENT
0_4 SUSACK#_R
SYS_RESET#
AK2
AC3
AG2
AY7
AB5
AG7
C617
*1u/6.3V_4
0_4
SYS_PWROK_R
*0_4
R705
*0_4 EC_PWROK_R
*0_4
R547
*0_4 APWROK_R
PCI_PLTRST#
R656
R555
R542
R653
PCH_SLP_S0#
07
HSW_ULT_DDR3L
U42H
*0_4
*SHORT_4 PCH_RSMRST#
PCH_SUSPWRACK
*0_4
*SHORT_4 PCH_PWRBTN#
*SHORT_4 PCH_ACPRESENT
PCH_BATLOW#
*SHORT_4 PCH_SLP_S0#_R
PCH_SLP_WLAN#
TP55
AW6
AV4
AL7
AJ8
AN4
AF3
AM5
Deep Sx
SUSACK
SYS_RESET
SYS_PWROK
PCH_PWROK
APWROK
PLTRST +3V_S5
DSW
+3V
+3V_S5
+3V_S5
DSW
RSMRST
SUSWARN/SUSPWRDNACK/GPIO30
DSW
PWRBTN
ACPRESENT/GPIO31 DSW
DSW
BATLOW/GPIO72
+3V_S5
SLP_S0
DSW
SLP_WLAN/GPIO29
DSWVRMEN
DPWROK
WAKE
CLKRUN/GPIO32
SUS_STAT/GPIO61
SUSCLK/GPIO62
SLP_S5/GPIO63
+3V_S5
DSW
DSW
DSW
DSW
DSW
SLP_S4
SLP_S3
SLP_A
SLP_SUS
SLP_LAN
AW7 DSWVREN
AV5 DPWROK_R
R722
AJ5 PCIE_LAN_WAKE#
V5
CLKRUN#
AG4
AE6 PCH_SUSCLK
AP5 PCH_SLP_S5#
AJ6
AT4
AL5
AP4
AJ7
*SHORT_4
DSWVREN
DPWROK
PCIE_LAN_WAKE#
CLKRUN#
LPCPD#
8
33
26,28
D
27,33
27
TP44
PCH_SLP_S5#
SUSC#
SUSB#
PCH_SLP_A#
PCH_SLP_SUS#
PCH_SLP_LAN#
13
SUSC#
13,33
SUSB#
13,33
PCH_SLP_A#
13
PCH_SLP_SUS#
33
TP58
8 OF 19
C
C
Power Sequence
33
R353
*SHORT_4 EC_PWROK_R
EC_PWROK
R543
*0_4
SYS_PWROK_R
RSMRST#
R720
*0_4
DPWROK_R
PCH_PWROK
5,33
R413
APWORK
0_4
APWROK_R
Speed up 250ms to boot up
for EC power on 250 ms
R354
100K_4
R414
10K_4
Non Deep Sx
PCH PM PU/PD
PLTRST# Buffer
Deep Sx Circuit
Non Deep Sx
+3V
+3V
R300
C255
8.2K_4
10K_4
0.1u/10V_4
+3VCC_S5
2
1
4
PCI_PLTRST#
B
R707
R565
R721
10K_4
*10K_4
100K/F_4
PLTRST#
1
3
PCH_RSMRST#
SYS_PWROK
DPWROK_R
*0_6
+3V_S5
13,16,26,27,28,33
C282
*0.33u/10V_6
U19
TC7SH08FU
3
R302
100K_4
2
R176
R644
5
CLKRUN#
SYS_RESET#
Q34
AO3413
B
R242
100K_4
R303
*SHORT_6
PCH_SUSPWRACK
R696
3
+3V_S5
10K_4
SYSPWOK
+3V_S5
+3V_S5
A
*10K_4
*8.2K_4
*10K_4
*10K_4
2
DSW PU
13
SYS_PWROK
SYS_PWROK
EC_PWROK
EC_PWROK
4
1
10K_4
8.2K_4
1K_4
*10K_4
R556
3
R272
R275
R276
R273
5,33
IMVP_PWRGD_3V
+3VPCU
U37
TC7SH08FU
2
Q35
2N7002K
1
R259
R262
R264
R261
*0.1u/10V_4
5
PCH_ACPRESENT
PCH_BATLOW#
PCIE_LAN_WAKE#
PCH_PWRBTN#
PCH_SLP_SUS#
C583
10
A
R550
10K_4
*0_4
PROJECT : ZRQ
Size
Document Number
Rev
3A
LPT 1/6 (DMI/FDI/VGA)
Date:
5
4
3
2
Sheet
7
1
of
47
5
4
3
2
1
RTC Clock 32.768KHz (RTC)
RTC_X1
18p/50V_4
C625
18p/50V_4
RTC_X2
+3V_RTC
D21 +3V_RTC
R373
*SHORT_6
+3V_RTC_2
R754
RTC_RST#
1K_4 +3V_RTC_1
+3V_RTC
20K/F_4
C671
1u/6.3V_4
2
BAT54C
+3V_RTC_[0:2]
R708
1M_4
1
R363
+3V_RTC_0
13
J6
*JUMP
RTC_RST#
RTC_X1
RTC_X2
SM_INTRUDER#
PCH_INTVRMEN
SRTC_RST#
RTC_RST#
1
C676
1u/6.3V_4
1
C670
1u/6.3V_4
2
20K/F_4
HDA_BCLK_R
HDA_SYNC_R
HDA_RST#_R
J5
*JUMP
30
PCH_AZ_CODEC_SDIN0
PCH_AZ_CODEC_RST#
R703
33_4
HDA_RST#_R
PCH_AZ_CODEC_SDOUT
R701
33_4
HDA_SDO_R
R698
33_4
HDA_BCLK_R
PCH_AZ_CODEC_BITCLK
4,13
C639
*10p/50V_4
C
30
R726
PCH_AZ_CODEC_SYNC
C638
33_4
13
13
13
13
XDP_TRST#
XDP_TCK1
XDP_TDI
XDP_TDO
XDP_TMS
4,13
XDP_TCK0
R215
*SHORT_4
HDA_SYNC_R
*10p/50V_4
R652
*SHORT_4
AW8
AV11
AU8
AY10
AU12
AU11
AW10
AV10
AY8
AU62
AE62
XDP_TCK1
AD61
XDP_TDI
PCH_JTAG_TDOAE61
AD62
AL11
AC4
AE63
PCH_JTAGX
AV2
SATA_RN0/PERN6_L3
SATA_RP0/PERP6_L3
SATA_TN0/PETN6_L3
SATA_TP0/PETP6_L3
RTC
HDA_BCLK/I2S0_SCLK
HDA_SYNC/I2S0_SFRM
HDA_RST/I2S_MCLK
AUDIO
HDA_SDI0/I2S0_RXD
HDA_SDI1/I2S1_RXD
HDA_SDO/I2S0_TXD
HDA_DOCK_EN/I2S1_TXD
HDA_DOCK_RST/I2S1_SFRM
I2S1_SCLK
SATA_RN2/PERN6_L1
SATA_RP2/PERP6_L1
SATA_TN2/PETN6_L1
SATA_TP2/PETP6_L1
SATA
SATA_RN3/PERN6_L0
SATA_RP3/PERP6_L0
SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0
+3V
+3V
+3V
+3V
PCH_TRST
PCH_TCK
PCH_TDI
PCH_TDO
PCH_TMS
RSVD
RSVD
JTAGX
RSVD
SATA0GP/GPIO34
SATA1GP/GPIO35
SATA2GP/GPIO36
SATA3GP/GPIO37
SATA_IREF
RSVD
RSVD
SATA_RCOMP
SATALED
JTAG
J5
H5
B15
A15
SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0
J8
H8
A17
B17
27
27
27
27
SATA_RXN1_SSD
SATA_RXP1_SSD
SATA_TXN1_SSD
SATA_TXP1_SSD
J6
H6
B14
C15
HDD
26,27,33
26,27,33
26,27,33
26,27,33
26,27,33
AU14
AW12
AY12
AW11
AV12
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
26
26
26 mSATA
26
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_SI
PCH_SPI_SO
PCH_SPI_IO2
PCH_SPI_IO3
TP19
TP17
TP15
TP13
AA3
Y7
Y4
AC2
AA2
AA4
Y6
AF1
LAD0
LAD1
LAD2
LAD3
LFRAME
LPC
SMBUS
+3V_S5
+3V_S5
+3V_S5
SPI_CLK
SPI_CS0
SPI_CS1
SPI_CS2
SPI_MOSI
SPI_MISO
SPI_IO2
SPI_IO3
SPI
+3V_S5
+3V_S5 SMBALERT/GPIO11
SMBCLK
+3V_S5
SMBDATA
+3V_S5SML0ALERT/GPIO60
+3V_S5
SML0CLK
+3V_S5
SML0DATA
SML1ALERT/PCHHOT/GPIO73
SML1CLK/GPIO75
SML1DATA/GPIO74
CL_CLK
CL_DATA
CL_RST
C-LINK
F5
E5
C17
D17
AN2
AP2
AH1
AL2
AN1
AK1
AU4
AU3
AH3
D
SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB0ALERT#
SMB_ME0_CLK
SMB_ME0_DAT
SMB1ALERT#
SMB_ME1_CLK
SMB_ME1_DAT
SMBALERT#
AF2 CL_CLK
AD2 CL_DAT
AF4 CL_RST#
32
TP87
TP86
TP89
7 OF 19
V1
U1 VGPU_EN
V6
GPIO36
AC1 GPIO37
SYS_COM_REQ
23
VGPU_EN
20,40
TP33
TP88
A12 SATA_IREF
R573
L11
K10
C12 SATA_RCOMP R574
U3 SATA_LED#
R636
+3V
SYS_COM_REQ
R182
*10K_4
VGPU_EN
GPIO36
GPIO37
R629
R168
R655
IV@10K_4
10K_4
10K_4
SMBus
+3V_S5
*SHORT_4 +V1.05S_ASATA3PLL
3.01K/F_4
10K_4
+V1.05S_ASATA3PLL
+3V
SATA_RCOMP
Impedance = 50 ohm
PCH JTAG
R680
R697
R689
10K_4
10K_4
10K_4
SMB0ALERT#
SMB1ALERT#
SMBALERT#
R285
R284
R663
R661
2.2K_4
2.2K_4
2.2K_4
2.2K_4
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
C
5 OF 19
JTAG_TCK,JTAG_TMS
Trace Length < 9000mils
MP remove(Intel)
PCH Quad SPI ROM
(Default for WIN8)
+1.05V_S5
XDP_TMS
XDP_TDI
PCH_JTAG_TDO
PCH_JTAGX
XDP_TCK1
R200
R201
R216
R650
51_4
51_4
51_4
*1K_4
R657
R540
+3V_S5
W25Q32BVSSIG / AKE391P0N00----->4MB
MX25L3206EM2I / AKE39FP0Z02----->4MB
MX25L1606EM2I / AKE38FP0Z01----->2MB
W25Q16BVSSIG / AKE38FP0N01----->2MB
*SHORT_6
*51_4
1
33_4 6
33_4 5
33_4 2
R145
R153
R103
Pin Name
HDA_SDO
INTVRMEN
C162
*22p/50V_4
3.3K is original and for no
support fast read function
ULT Strapping Table
GPIO81(SPKR)
Strap description
+3V_PCH_ME
+3V_PCH_ME
U14
PCH_SPI_CS0#
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO
3
B
HSW_ULT_DDR3L
U42G
SRTC_RST#
2
30
RTCX1
RTCX2
INTRUDER
INTVRMEN
SRTCRST
RTCRST
SATA_RN1/PERN6_L2
SATA_RP1/PERP6_L2
SATA_TN1/PETN6_L2
SATA_TP1/PETP6_L2
HDA_SDO_R
30
AW5
AY5
AU6
AV7
AV6
AU7
R750
CN14
BAT_CONN
HDA30
HSW_ULT_DDR3L
U42E
RTC Circuitry (RTC)
D
+3VPCU
Haswell ULT PCH(LPC,SPI,SMBUS,C-LINK,THERMAL)
R699
10M_4
3
4
Y7
32.768KHZ
08
Haswell ULT PCH (RTC/HDA/SATA/SPI)
2
1
C624
Sampled
No reboot on TCO Timer
expiration
PWROK
Flash Descriptor Security
Override / Intel ME Debug Mode
PWROK
Integrated 1.05V VRM enable
ALWAYS
Configuration
note
VDD
HOLD#
WP#
VSS
ROM-2M_ME
8
*1K_4
R289
4.7K_4
SMBus(PCH)
Q33
R279
4.7K_4
5
7SPI_HOLD_IO3_ME R147
*1K_4
26
3
SMB_PCH_DAT
4
CLK_SDATA
13,14,15,23,32
4
2
C147
0.1u/10V_4
26
R106
+3V_PCH_ME
CE#
SCK
SI
SO
+3V
6
SMB_PCH_CLK
PCH_XDP_WLAN/S5
SPI_WP_IO2_ME
B
1
CLK_SCLK
13,14,15,23,32
DDR_TP/S0
2N7002DW
+3V_PCH_ME
0 = Default enable (iPD 20K)
+3V
1 =Disable No-Reboot mode
0 = Default can program ME (iPD 20K)
R642
HDA_SDO_R
*1K_4
R702
SPKR
*SHORT_4
1 =can't program ME
SPKR
U34
10,30
ME_WR#
PCH_SPI_CS1#
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO
33
C565
1=Should be always pull-up
+3V_RTC
R717
330K_4
PCH_INTVRMEN
R704
R529
R521
R97
1
6
5
2
33_4
33_4
33_4
3
*22p/50V_4
PCH_SPI_CLK_R
PCH_SPI_SI_R
PCH_SPI_SO_R
*330K_4
CE#
SCK
SI
SO
WP#
VDD
HOLD#
VSS
8
7SPI_HOLD_IO3_EC
SMBus(EC)
R534
+3V_S5
*1K_4
4
C95
0.1u/10V_4
ROM-4M_EC
R290
*2.2K_4
R278
*2.2K_4
Q32
GPIO66
Top-Block Swap override
GPIO86
Boot BIOS Strap Bit
0 = Default disable (iPD 20K)
10
1 = Enable TBS function
+3V
0 = Default SPI (iPD 20K)
10
1 =LPC
A
GPIO15
CFG4
DSWVREN
TLS(Transport layer security)
DP presence strap
Deep Sx well on die VR enable
10
1 =Default enable with
confidentiality
0 = Enable an external display
port is connected to the eDP
1 =disable
R136
R195
6,13
7
*1K_4
GPIO66
R577
*1K_4
GPIO86
R129
R94
+3V_PCH_ME
*1K_4
R718
SPI_WP_IO2_EC
19,33
R91
R95
33_4
33_4
SPI_WP_IO2_ME
SPI_WP_IO2_EC
PCH_SPI_IO3
R146
R533
33_4
33_4
SPI_HOLD_IO3_ME
SPI_HOLD_IO3_EC
*1K_4
3
2ND_MBCLK
8.2K_4
CFG4
GPIO15
CFG4
R189
R193
33
*1K_4
33
33
33
1K_4
PCH_SPI_CLK_EC
PCH_SPI_SI_EC
PCH_SPI_SO_EC
SPI_CS0#_UR_ME
R525
R520
R98
33_4
33_4
33_4
PCH_SPI_CLK_R
PCH_SPI_SI_R
PCH_SPI_SO_R
R112
*0_4
PCH_SPI_CS0#
R104
0_4
PCH_SPI_CS1#
reserve for SPI fast read
19,33
6
2ND_MBDATA
R706
4
SMB_ME1_DAT
R280
R282
PCH/S5
0_4 SMB_ME1_CLK
0_4 SMB_ME1_DAT
*330K_4
PROJECT : ZRQ
R109
10K_4
SPI_CS0#_UR_ME
3
Document Number
Rev
3A
LPT 2/6 (SATA/HDA/SPI)
Date:
5
1
A
2ND_MBCLK
2ND_MBDATA
Size
DSWVREN
SMB_ME1_CLK
*2N7002DW
+3V_PCH_ME
330K_4
4
2
EC/S5
DSWVREN
+3V_RTC
*1K_4
PCH_SPI_IO2
GPIO15
+3V_S5
1=Should be always pull-up
R578
GPIO86
+3V
0 = Default enable w/o
confidentiality(iPD 20K)
5
GPIO66
2
Sheet
1
8
of
47
5
4
3
2
1
Haswell ULT PCH (CLOCK)
XTAL24_IN
C590
09
12p/50V_4
3
4
Haswell ULT PCH (PCIE,USB3.0,USB2.0)
HSW_ULT_DDR3L
WLAN
PEG x4
16
16
C592
C593
PEG_TX#0
PEG_TX0
16
16
PEG_RX#1
PEG_RX1
16
16
PEG_TX#1
PEG_TX1
16
16
PEG_RX#2
PEG_RX2
16
16
PEG_TX#2
PEG_TX2
16
16
PEG_RX#3
PEG_RX3
16
16
PEG_TX#3
PEG_TX3
26
26
PCIE_RX3-_WLAN
PCIE_RX3+_WLAN
26
26
PCIE_TX3-_WLAN
PCIE_TX3+_WLAN
[email protected]/10V_4
R_PEG_TX#0 C23
C22
R_PEG_TX0
F8
E8
C572
C573
R_PEG_TX#1
R_PEG_TX1
H10
G10
C597
C598
R_PEG_TX#2 B21
C21
R_PEG_TX2
E6
F6
C574
C575
R_PEG_TX#3
R_PEG_TX3
LAN
PCIE_RX4-_LAN
PCIE_RX4+_LAN
28
28
PCIE_TX4-_LAN
PCIE_TX4+_LAN
B22
A21
G11
F11
C587
C586
0.1u/10V_4
0.1u/10V_4
PCIE_TX3PCIE_TX3+
C
28
28
B23
A23
C29
B30
F13
G13
C589
C588
PCIE_TX4PCIE_TX4+
B29
A29
TP22
TP21
PCIE_RXN1
PCIE_RXP1
G17
F17
TP11
TP9
PCIE_TXN1
PCIE_TXP1
C30
C31
0.1u/10V_4
0.1u/10V_4
F15
G15
B31
A31
R571
R570
+V1.05S_AUSB3PLL
3.01K/F_4 PCIE_RCOMP
*SHORT_4 PCIE_IREF
E15
E13
A27
B27
PERN5_L0
PERP5_L0
DSW
DSW
USB2N0
USB2P0
PETN5_L0
PETP5_L0
DSW
DSW
USB2N1
USB2P1
PERN5_L1
PERP5_L1
DSW
DSW
USB2N2
USB2P2
PETN5_L1
PETP5_L1
DSW
DSW
USB2N3
USB2P3
PERN5_L2
PERP5_L2
DSW
DSW
USB2N4
USB2P4
PETN5_L2
PETP5_L2
DSW
DSW
USB2N5
USB2P5
PERN5_L3
PERP5_L3
DSW
DSW
USB2N6
USB2P6
PETN5_L3
PETP5_L3
DSW
DSW
USB2N7
USB2P7
PERN3
PERP3
PETN3
PETP3
USB3RN1
USB3RP1
PCIE
USB
+3V_S5
+3V_S5
PERN4
PERP4
USB3TN1
USB3TP1
USB3RN2
USB3RP2
PETN4
PETP4
+3V_S5
+3V_S5
USB3TN2
USB3TP2
AN8
AM8
USBP0USBP0+
23
23
mDP Dongle
AR7
AT7
USBP1USBP1+
31
31
MB USB2.0
AR8
AP8
USBP2USBP2+
24
24
CCD
AR10
AT10
USBP3USBP3+
26
26
BT
AM15
AL15
USBP4USBP4+
31
31
MB USB3.0
USBP5USBP5+
24
24
Touch screen
AM13
AN13
AP11
AN11
USBP6USBP6+
AR13 USBP7AP13 USBP7+
G20
H20
31
31
TP63
TP62
USBRBIAS
USBRBIAS
RSVD
RSVD
CR
USB3_RXN0
USB3_RXP0
31
31
C33
B34
USB3_TXN0
USB3_TXP0
31
31
E18
F18
USB3_RXN1
USB3_RXP1
23
23
B33
A33
USB3_TXN1
USB3_TXP1
23
23
PERN2/USB3RN4
PERP2/USB3RP4
PETN2/USB3TN4 +3V_S5
PETP2/USB3TP4 +3V_S5
AJ10
AJ11
AN10
AM10
USBCOMP
XTAL24_OUT
R245
MB USB3.0
26
26
26
CLK_PCIE_WLANN
CLK_PCIE_WLANP
PCIE_CLKREQ_WLAN#
28
28
CLK_PCIE_LANN
28
CLK_PCIE_LANP
CLK_PCIE_LAN_REQ#
16
16
16
CLK_PCIE_VGA#
CLK_PCIE_VGA
CLK_PEGA_REQ#
TP75
TP73
TP84
C43
CLK_PCIE_N0
C42
CLK_PCIE_P0
CLK_PCIE_REQ0# U2
TP106
CLK_PCIE_REQ1#
R639
C41
B42
*SHORT_4
CLK_PCIE_REQ2# AD1
R638
B38
C37
*SHORT_4
CLK_PCIE_REQ3# N1
R651
B41
A41
Y5
A39
B39
*SHORT_4
CLK_PCIE_REQ4# U5
CLK_PCIE_REQ5#
B37
A37
T2
CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
PCIECLKRQ0/GPIO18
+3V
CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
PCIECLKRQ1/GPIO19
+3V
+3V
CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
PCIECLKRQ3/GPIO21
+3V
+3V
CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
PCIECLKRQ5/GPIO23
+3V
+3V_S5
+3V_S5
+3V_S5
+3V_S5
RSVD
RSVD
PCIE_RCOMP
PCIE_IREF
OC0/GPIO40
OC1/GPIO41
OC2/GPIO42
OC3/GPIO43
USB_OC0#
31
MB U3
USB_OC2#
USB_OC3#
31
31
MB U2
DB U2
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
SIGNALS
CLKOUT_LPC_0
CLKOUT_LPC_1
D
12p/50V_4
A25 XTAL24_IN
B25 XTAL24_OUT
K21
M21
C26 ICLK_BIAS
C35
C34
AK8
AL8
R557
3.01K/F_4
+V1.05S_AXCK_LCPLL
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
AN15 CLK_PCH_PCI3
AP15 CLK_PCH_PCI4
TPM@22_4
22_4
22_4
R257
R256
R255
B35
A35
PCLK_TPM
CLK_PCI_LPC
CLK_PCI_EC
27
26
33
CLK_PCIE_XDPN
CLK_PCIE_XDPP
13
13
C
mDP Dongle
6 OF 19
+3V
USB Overcurrent
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
RSVD
RSVD
DIFFCLK_BIASREF
CLKOUT_ITPXDP
CLKOUT_ITPXDP_P
CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
PCIECLKRQ4/GPIO22
+3V_S5
AL3
AT1
AH2
AV3
XTAL24_IN
XTAL24_OUT
CLOCK
CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
PCIECLKRQ2/GPIO20
USBCOMP
Impedance = 50 ohm
22.6/F_4
C591
HSW_ULT_DDR3L
U42F
DB USB2.0
PERN1/USB3RN3
PERP1/USB3RP3
PETN1/USB3TN3 +3V_S5
PETP1/USB3TP3 +3V_S5
Y6
24MHz
1
2
F10
E10
PEG_RX#0
PEG_RX0
LAN WLAN
16
16
D
R558
1M_4
VGA
U42K
CLK_PCIE_REQ0#
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
CLK_PCIE_REQ5#
R637
R645
R654
R612
R634
10K_4
10K_4
10K_4
10K_4
10K_4
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
R563
R564
R258
R271
10K_4
10K_4
10K_4
10K_4
CLK_PCI_EC
CLK_PCI_LPC
PCLK_TPM
RP6
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
10
9
8
7
6
1
2
3
4
5
C266
*18p/50V_4
C267
*18p/50V_4
C268
*18p/50V_4
10K_10P8R
+3V
B
B
11 OF 19
CLK_PCIE_REQ4# R608
R619
10K_4
*1K_4
A
A
PROJECT : ZRQ
Size
Document Number
Rev
3A
LPT 3/6 (PCIE/USB/CLK)
Date:
5
4
3
2
Sheet
1
9
of
47
5
4
3
10
Haswell ULT PCH (GPIO,CPU/MISC,NCTF)
High
Low
8
20
BOARD_ID0
GPIO8
LAN_DISABLE#
GPIO15
SKU_ID0
DGPU_PWROK
GPIO24
WK_GPIO27
GPIO28
ODD_PRSNT#
GPIO8
GPIO15
DGPU_PWROK
TP40
TP48
AG6
GPIO56
AP1
GPIO57
AL4
GPIO58
AT5
GPIO59
AK4
GPIO44
AB6
GPIO47
DGPU_HOLD_RST# U4
Y3
DGPU_PWR_EN
DGPU_PW_CTRL# P3
Y2
MODPHY_EN
AT3
RAM_ID0
AH4
RAM_ID3
AM4
GPIO25
AG5
GPIO45
AG3
GPIO46
TP53
TP93
TP59
TP61
TP56
TP38
16
41
DGPU_HOLD_RST#
DGPU_PWR_EN
11
MODPHY_EN
TP91
TP45
TP52
C
27
DEVSLP0
26
DEVSLP1
8,30
P1
AU2
AM7
AD6
Y1
T3
AD5
AN5
AD7
AN3
RAM_ID1
RAM_ID2
DEVSLP0
BOARD_ID3
DEVSLP1
SKU_ID1
SPKR
SPKR
AM3
AM2
P2
C4
L2
N5
V2
+3V
BMBUSY/GPIO76
+3V_S5
GPIO8
LAN_PHY_PWR_CTRL/GPIO12
GPIO15 +3V_S5
GPIO16 +3V
GPIO17 +3V
GPIO24 +3V_S5
GPIO27 DSW
GPIO28 +3V_S5
GPIO26 +3V_S5
GPIO56 +3V_S5
GPIO57 +3V_S5
GPIO58 +3V_S5
GPIO59 +3V_S5
GPIO44 +3V_S5
GPIO47 +3V_S5
GPIO48 +3V
GPIO49 +3V
GPIO50 +3V
HSIOPC/GPIO71 +3V
GPIO13 +3V_S5
GPIO14 +3V_S5
GPIO25 DSW
GPIO45 +3V_S5
GPIO46 +3V_S5
RAM ID
B
R606
2,32
BOARD_ID0
R626
*10K_4
BOARD_ID1
R607
*10K_4
Vender
BOARD_ID1
10K_4
BOARD_ID2
R603
*10K_4
BOARD_ID2
R602
10K_4
R124
10K_4
BOARD_ID3
R121
*10K_4
BOARD_ID4
R599
*10K_4
2
+3V_S5
R693
R247
R682
R688
+3V
10K_4
R6
L6
N6
L8
R7
L5
N7
K2
J1
K3
J2
G1
K4
G2
J3
J4
F2
F3
G4
F1
E3
F4
D3
E4
C3
E2
GSPI0_CS/GPIO83
GSPI0_CLK/GPIO84
GSPI0_MISO/GPIO85
GSPI0_MOSI/GPIO86
GSPI1_CS/GPIO87
GSPI1_CLK/GPIO88
GSPI1_MISO/GPIO89
GSPI_MOSI/GPIO90
UART0_RXD/GPIO91
UART0_TXD/GPIO92
UART0_RTS/GPIO93
UART0_CTS/GPIO94
UART1_RXD/GPIO0
UART1_TXD/GPIO1
UART1_RST/GPIO2
UART1_CTS/GPIO3
I2C0_SDA/GPIO4
I2C0_SCL/GPIO5
I2C1_SDA/GPIO6
I2C1_SCL/GPIO7
SDIO_CLK/GPIO64
SDIO_CMD/GPIO65
SDIO_D0/GPIO66
SDIO_D1/GPIO67
SDIO_D2/GPIO68
SDIO_D3/GPIO69
10K_4
10K_4
*10K_4
10K_4
10K_4
RAM_ID
Hynix
RAM_ID0
RAM_ID1
RAM_ID2
RAM_ID3
R692
R263
R681
R687
GPIO86
33
27,33
8
High
GPIO66
DGPU_HOLD_RST# R643
10K_4
8
Q PN
Mfr. PN
Freq.
AKD5JGETW04 H5TC4G63AFR-PRBA
0000
+1.05V_VCCST
IMVP_PWRGD_3V
2
high
UMA Only
low
GPU power is control by PCH
GPIO (Discrete, SG or Optimize)
R628
EV@100K_4 DGPU_PW_CTRL#
R162
*10K_4
R627
+3V
IV@1K_4
DGPU_PWROK
Q18
1600MHz
Elpida
0001
AKD5JGST400 EDJ4216EBBG-DJ-F
1333MHz
Elpida
0010
AKD5JGST404 EDJ4216EFBG-GN-F
1600MHz
+3V_S5
FDV301N
B
LAN_DISABLE#
ODD_PRSNT#
GPIO8
+1.05V_VCCST
R260
R679
R250
10K_4
10K_4
*10K_4
R132
1K_4
1K_4
SKU ID
R647
IV@10K_4
SKU_ID0
R646
EV@10K_4
R139
IV@10K_4
SKU_ID1
R143
EV@10K_4
1
Q19
THRMTRIP#
3
MMBT3904-7-F
SYS_SHDN#
NC
BOARD_ID2
Pin8 of SYNAPTICS and ELAN are NC
pin. BIOS maybe will use EEPROM
detection. Default is pull high.
SKU_ID1
SKU_ID0
VGA H/W
Signal
5,38
Setup
Menu
IMVP_PWRGD
2
3
A
Reserved
(Default)
Reserved
(Default)
UMA Only
0
0
UMA
Hidden
UMA boot
VCC
GPIO27 : If not used then use
8.2-kΩ to 10-kΩ pull-down to GND.
5
dGPU Only
0
1
GPU
Hidden
GPU boot
Reserved
Switchable
(Mux)
1
0
UMA+GPU
dGPU/SG
UMA boot
Reserved
Optimize
(Muxless)
1
1
UMA
UMA/SG
UMA boot
C767
0.1u/10V_4
A
GND
Y
R807
10K_4
4
IMVP_PWRGD_3V
A
7
74AUP1G07GW
PROJECT :ZRQ
Size
4
Document Number
Rev
3A
LPT 4/6 (GPIO/MISC)
Date:
5
10K_4
*10K_4
2
Disable on
board memory
R727
R728
+1.05V_VCCST +3V
U55
1
GDDR5
Enable on
board memory
+3VPCU
27,35,39
WK_GPIO27
1
DDR3
BOARD_ID1
BOARD_ID4
10K_4
*100K_4 DGPU_PWR_EN
R648
33
33
R133
Low
BOARD_ID3
R649
D
C
SIO_EXT_SMI#
SIO_EXT_SCI#
CPU thermal trip
*10K_4
10K_4
*10K_4
*10K_4
+3V
BOARD_ID0
49.9/F_4
GPIO83
GPIO84
GPIO85
GPIO86
GPIO87
GPIO88
GPIO89
GPIO90
GPIO91
GPIO92
GPIO93
GPIO94
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
SIO_EXT_SMI#
SIO_EXT_SCI#
GPIO64
GPIO65
GPIO66
GPIO67
GPIO68
GPIO69
BOARD_ID4
R600
R709
SIO_RCIN#
IRQ_SERIRQ
10K_4
*10K_4
*10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10 OF 19
Board ID
2
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
SERIAL IO
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
DEVSLP0 for HDD
DEVSLP1 for mSATA
R624
CPU/
MISC
GPIO
+3V_S5
GPIO9
GPIO10 +3V_S5
+3V
DEVSLP0/GPIO33
SDIO_POWER_EN/GPIO70
+3V
DEVSLP1/GPIO38
+3V
DEVSLP2/GPIO39
+3V
SPKR/GPIO81
D60 THRMTRIP#
V4
SIO_RCIN#
T4
IRQ_SERIRQ
AW15 OPI_COMP2
AF20
AB21
THRMTRIP
RCIN/GPIO82
SERIRQ
PCH_OPI_RCOMP
RSVD
RSVD
+3V
DSW
R159
R169
R611
R187
R135
R131
R206
R150
R207
R152
R208
R205
R597
R594
R209
R590
R588
R210
R589
R595
R592
R585
R586
R584
R134
R130
R128
R581
3
24
IRQ_SERIRQ
DEVSLP0
DEVSLP1
SIO_RCIN#
SIO_EXT_SMI#
SIO_EXT_SCI#
GPIO83
GPIO84
GPIO85
GPIO87
GPIO88
GPIO89
GPIO90
GPIO91
GPIO92
GPIO93
GPIO94
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO64
GPIO65
GPIO67
GPIO68
GPIO69
2
D
+3V
Touch panel
1
No touch panel
GPIO8
HSW_ULT_DDR3L
U42J
3
2
Sheet
1
10
of
47
5
4
3
2
1
11
Haswell ULT PCH (Power)
C577
C163
C175
*1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1u/6.3V_4
1.838A
R179
1.741A
*SHORT_8
+V1.05S_AIDLE
D
+V1.05S_AUSB3PLL
+V1.05S_ASATA3PLL
C181
*1u/6.3V_4
+1.05V_S5
R294
R292
25mA
*0_6
10mA
*0_6
C177
10u/6.3V_6
+1.05V_S5
+V1.05S_APLLOPI
C166
1u/6.3V_4
+3VPCU
*SHORT_8
+VCCPDSW
+V3.3S_VCCPCORE
AC9
AA9
AH10
V8
W9
41mA
R165
VCCSUS3_3
VCCRTC
DCPRTC
SPI
RSVD
VCCAPLL
VCCAPLL
VCCSPI
OPI
+1.05V
+1.05V
C209
WW15 4/10 Intel VCCDSW3
G3 can't boot issue.
Y8
C231
0.1u/10V_4
+VCCRTCEXT
18mA
+V3.3M_PSPI
AG14
AG13
DCPSUS3
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
DCPSUSBYP
DCPSUSBYP
VCCASW
VCCASW
VCCASW
DCPSUS1
DCPSUS1
HDA
VCCHDA
VRM
DCPSUS2
CORE
VCCSUS3_3
VCCSUS3_3
VCCDSW3_3
VCC3_3
VCC3_3
GPIO/LPC
VCCTS1_5
VCC3_3
VCC3_3
J11
H11
H15
AE8
AF22
AG19
AG20
AE9
AF9
AG8
AD10
AD8
1u/6.3V_4
63mA
+3VCC_S5
J18
K19
A20
J17
R21
T21
K18
M20
V21
AE20
AE21
+PCH_VCCDSW
VCCCLK
VCCCLK
VCCACLKPLL
VCCCLK
VCCCLK
VCCCLK
RSVD
RSVD
RSVD
VCCSUS3_3
VCCSUS3_3
SERIAL IO
VCCSDIO
VCCSDIO
DCPSUS4
RSVD
VCC1_05
VCC1_05
USB2
+V1.05S_CORE_PCH
R194
+1.05V_DCPSUS1
C213
1u/6.3V_4
0.658A
R217
R293
*0_6
C221
1u/6.3V_4
+1.05V_S5
C212
1u/6.3V_4
AB8
3mA
AC20
AG16
AG17
1mA
+V1.5S_VCCATS
R111
*SHORT_6
+1.5V
+V3.3S_VCCPTS
R107
*SHORT_6
+3V
C183
1u/6.3V_4
17mA
*0_6
R158
+1.05V_S5
VOUT_01
ON
CT
VBIAS
+1.05V
GND
6
5
2
9
C608
0.047u/25V_4
*SHORT_8
C236
1u/6.3V_4
7
1
2
2
1
VIN_02
8
VCCAPLL power
1
3
VOUT_02
C604
330p/50V_4
2
2
R270
*SHORT_8
*SHORT_8
C602
0.1u/10V_4
+1.05V
+1.05V
+V1.05S_APLLOPI
L21
+V1.05S_AXCK_DCB
L33
2.2uH/210mA_8
C248
*47u/6.3V_8
C619
*47u/6.3V_8
C578
47u/6.3V_8
+1.05V
A
L18
2.2uH/210mA_8
41mA
+V1.05DX_MODPHY
L17
C77
47u/6.3V_8
C595
1u/6.3V_4
C89
47u/6.3V_8
+3V_S5
C79
47u/6.3V_8
31mA
2.2uH/210mA_8
11mA
42mA
R252
C88
47u/6.3V_8
+V1.05S_AXCK_LCPLL
L14
+V1.05S_ASATA3PLL
2.2uH/210mA_8
C158
1u/6.3V_4
C218
1u/6.3V_4
PCH HDA Power
+V1.05S_AUSB3PLL
0.2A
57mA
2.2uH/210mA_8
C579
47u/6.3V_8
+V1.05DX_MODPHY
*SHORT_6 +3V
C194
1u/6.3V_4
B
VIN_01
R560
R559
1
R596
*SHORT_4
2
1
4
C607
0.1u/10V_4
R291
+V1.05S_VCCUSBCORE
+V1.05DX_MODPHY
U40
TPS22965DSGR
PAD
C601
1u/6.3V_4
+5V_S5
R188
*100K_4
C
C217
22u/6.3V_8
C197
1u/6.3V_4
1
2
1
*SHORT_8 +1.05V
C192
10u/6.3V_6
*SHORT_8 +1.05V
0.109A
U8
T9
+1.05V_DCPSUS4
MODPHY_EN
+3V
C233
1u/6.3V_4
+1.05V_S5
10
*0_6
+V1.05M_VCCASW
+V3.3S_VCCSDIO
R185
*100K_4
*SHORT_6 +3V_S5
R204
+PCH_VCCDSW
J15
K14
K16
PCH VCCHSIO Power
R604
100K_4
R220
R174
C237
1u/6.3V_4
13 OF 19
+3V +3V_S5
D
C216
0.1u/10V_4
+1.05V
*SHORT_6 +1.05V
0.47u/25V_6
B
C642
1u/6.3V_4
PCH_VCC_1_1_21
LPT LP POWER
SUS OSCILLATOR
C643
0.1u/10V_4
C208
0.1u/10V_4
+V1.05M_VCCASW
+V1.05S_AXCK_DCB
+V1.05S_AXCK_LCPLL
1u/6.3V_4
AH11
AG10
AE7
USB3
THERMAL SENSOR
C174
22u/6.3V_8
C
C245
RTC
22u/6.3V_8
+3VCC_S5
C238
1u/6.3V_4
C164
+3V_RTC
HSIO
*0_6
Non Deep Sx
+3V
AH14
AH13
0.114A
C270
R253
+3V_S5
J13
+1.05V_DCPSUS3
+V3.3DX_1.5DX_1.8DX_AUDIO
R254*SHORT_6
Y20
AA21
W21
VCCHSIO
VCCHSIO
VCCHSIO
VCC1_05
VCC1_05
VCCUSB3PLL
VCCSATA3PLL
VCCASW
VCCASW
+1.05V_DCPSUS2
Deep Sx
C235
1u/6.3V_4
+VCCPDSW
K9
L10
M9
N8
P9
B18
B11
+V1.05DX_MODPHY
+1.05V
HSW_ULT_DDR3L
U42M
C68
47u/6.3V_8
+V3.3DX_1.5DX_1.8DX_AUDIO
C76
47u/6.3V_8
A
C594
1u/6.3V_4
*SHORT_6
C596
1u/6.3V_4
C234
0.1u/10V_4
PROJECT : ZRQ
Place close to ball
Size
Document Number
Rev
3A
LPT 5/6 (POWER)
Date:
5
4
3
2
Sheet
1
11
of
47
5
4
3
2
1
12
Haswell ULT (GND)
U42N
D
C
B
A11
A14
A18
A24
A28
A32
A36
A40
A44
A48
A52
A56
AA1
AA58
AB10
AB20
AB22
AB7
AC61
AD21
AD3
AD63
AE10
AE5
AE58
AF11
AF12
AF14
AF15
AF17
AF18
AG1
AG11
AG21
AG23
AG60
AG61
AG62
AG63
AH17
AH19
AH20
AH22
AH24
AH28
AH30
AH32
AH34
AH36
AH38
AH40
AH42
AH44
AH49
AH51
AH53
AH55
AH57
AJ13
AJ14
AJ23
AJ25
AJ27
AJ29
HSW_ULT_DDR3L
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U42O
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ35
AJ39
AJ41
AJ43
AJ45
AJ47
AJ50
AJ52
AJ54
AJ56
AJ58
AJ60
AJ63
AK23
AK3
AK52
AL10
AL13
AL17
AL20
AL22
AL23
AL26
AL29
AL31
AL33
AL36
AL39
AL40
AL45
AL46
AL51
AL52
AL54
AL57
AL60
AL61
AM1
AM17
AM23
AM31
AM52
AN17
AN23
AN31
AN32
AN35
AN36
AN39
AN40
AN42
AN43
AN45
AN46
AN48
AN49
AN51
AN52
AN60
AN63
AN7
AP10
AP17
AP20
AP22
AP23
AP26
AP29
AP3
AP31
AP38
AP39
AP48
AP52
AP54
AP57
AR11
AR15
AR17
AR23
AR31
AR33
AR39
AR43
AR49
AR5
AR52
AT13
AT35
AT37
AT40
AT42
AT43
AT46
AT49
AT61
AT62
AT63
AU1
AU16
AU18
AU20
AU22
AU24
AU26
AU28
AU30
AU33
AU51
AU53
AU55
AU57
AU59
AV14
AV16
AV20
AV24
AV28
AV33
AV34
AV36
AV39
AV41
AV43
AV46
AV49
AV51
AV55
HSW_ULT_DDR3L
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
15 OF 19
U42P
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AV59
AV8
AW16
AW24
AW33
AW35
AW37
AW4
AW40
AW42
AW44
AW47
AW50
AW51
AW59
AW60
AY11
AY16
AY18
AY22
AY24
AY26
AY30
AY33
AY4
AY51
AY53
AY57
AY59
AY6
B20
B24
B26
B28
B32
B36
B4
B40
B44
B48
B52
B56
B60
C11
C14
C18
C20
C25
C27
C38
C39
C57
D12
D14
D18
D2
D21
D23
D25
D26
D27
D29
D30
D31
D33
D34
D35
D37
D38
D39
D41
D42
D43
D45
D46
D47
D49
D5
D50
D51
D53
D54
D55
D57
D59
D62
D8
E11
E17
F20
F26
F30
F34
F38
F42
F46
F50
F54
F58
F61
G18
G22
G3
G5
G6
G8
H13
HSW_ULT_DDR3L
HSW_ULT_DDR3L
U42R
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS_SENSE
VSS
16 OF 19
H17
H57
J10
J22
J59
J63
K1
K12
L13
L15
L17
L18
L20
L58
L61
L7
M22
N10
N3
P59
P63
R10
R22
R8
T1
T58
U20
U22
U61
U9
V10
V3
V7
W20
W22
Y10
Y59
Y63
V58
AH46
V23
E62
AH16
D
AT2
AU44
AV44
D15
F22
H22
J21
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
N23
R23
T23
U10
AL1
AM11
AP7
AU10
AU15
AW14
AY14
18 OF 19
C
VSS_SENSE_R
R591
*SHORT_4
R593
100/F_4
VSS_SENSE
38
B
14 OF 19
U42Q
TP97
TP77
A
AY2
AY3
AY60
AY61
AY62
B2
B3
B61
B62
B63
C1
C2
DC_TEST_AY2_AW 2
DC_TEST_AY3_AW 3
TP_DC_TEST_AY60
DC_TEST_AY61_AW 61
DC_TEST_AY62_AW 62
TP_DC_TEST_B2
DC_TEST_A3_B3
DC_TEST_A61_B61
DC_TEST_B62_B63
DC_TEST_C1_C2
HSW_ULT_DDR3L
DAISY_CHAIN_NCTF_AY2
DAISY_CHAIN_NCTF_B2
DAISY_CHAIN_NCTF_B3
DAISY_CHAIN_NCTF_B61
DAISY_CHAIN_NCTF_C1
DAISY_CHAIN_NCTF_C2
DAISY_CHAIN_NCTF_A3
DAISY_CHAIN_NCTF_A4
17 OF 19
DAISY_CHAIN_NCTF_A60
DAISY_CHAIN_NCTF_AV1
DAISY_CHAIN_NCTF_AW1
A3
A4
DC_TEST_A3_B3
TP_DC_TEST_A4
A60
A61
A62
AV1
AW1
AW2
AW3
AW61
AW62
AW63
TP_DC_TEST_A60
DC_TEST_A61_B61
TP_DC_TEST_A62
TP_DC_TEST_AV1
TP_DC_TEST_AW 1
DC_TEST_AY2_AW 2
DC_TEST_AY3_AW 3
DC_TEST_AY61_AW 61
DC_TEST_AY62_AW 62
TP_DC_TEST_AW 63
TP76
TP74
TP78
TP95
TP94
A
TP96
PROJECT : ZRQ
Size
Document Number
Rev
3A
LPT 6/6 (GND)
Date:
5
4
3
2
Sheet
1
12
of
47
5
4
3
2
1
13
+3V_S5
H_SYS_PWROK_XDP
R287
*1K_4
XDP_DBRESET_N
R240
*1K_4
+3V
4
4
D
4
4
6
6
CFG0
CFG1
6
6
CFG2
CFG3
R286
SYS_PWROK
R288
CFG4
CFG5
CFG6
CFG7
CFG6
CFG7
PWR_DEBUG
H_SYS_PWROK_XDP
CLK_SDATA
CLK_SCLK
XDP_TCK1
XDP_TCK0
NOA_STBP_0
NOA_STBN_0
TP123
TP124
TP109
TP110
TP125
TP126
TP111
TP112
TP127
TP128
TP113
TP114
TP129
TP130
TP115
TP116
TP131
TP132
TP117
TP118
VCCST_PWRGD_XDP
NBSWON#
*SHORT_4
8,14,15,23,32
8,14,15,23,32
8
4,8
C
CFG2
CFG3
1K_4
5
7
CFG0
CFG1
CFG4
CFG5
6
6
HWPG_1.05V_S5
TP107
TP108
XDP_BPM#0
XDP_BPM#1
6,8
6
5,33,36
XDP_PREQ_N
XDP_PRDY_N
XDP_PREQ#
XDP_PRDY#
TP135
TP136
TP146
TP145
TP138
TP137
TP119
TP120
TP121
TP122
CFG8
CFG9
CFG10
CFG11
CFG14
CFG15
CK_XDP_P_R
CK_XDP_N_R
CFG12
CFG13
6
6
CFG14
CFG15
6
6
R236
R237
XDP_RST_R_N
R238
XDP_DBRESET_N R239
XDP_TDO
XDP_TRST_N
XDP_TDI
XDP_TMS
TP139
TP140
TP141
TP142
R219
D
6
6
NOA_STBP_1
NOA_STBN_1
CFG12
CFG13
6
6
6
6
CFG10
CFG11
NOA_STBP_1
NOA_STBN_1
TP133
TP134
TP144
TP143
NOA_STBP_0
NOA_STBN_0
CFG8
CFG9
6
6
*SHORT_4
*SHORT_4
CLK_PCIE_XDPP
CLK_PCIE_XDPN
1K_4
*SHORT_4 SYS_RESET#
PLTRST#
*51_4
9
9
7,16,26,27,28,33
+1.05V_S5
C
+3V
C176
0.1u/10V_4
U15
14
B
8
2
XDP_TDO
XDP_TDO
1
APS1
R766
*SHORT_6 APS3
R745
APS7
*SHORT_6
8
APS
5
XDP_TDI
XDP_TDI
4
8
+3VCC_S5
9
XDP_TMS
XDP_TMS
10
CN19
APS1
APS3
*SHORT_6
*SHORT_4
*0_6
*SHORT_4
*SHORT_4
*SHORT_4
*0_6
R761
*SHORT_4
R760
*SHORT_4
R759
*SHORT_4 SYS_RESET#
R758
*SHORT_4
SUSB#
PCH_SLP_S5#
SUSC#
7,33
PCH_SLP_A#
+3VPCU
13
7
1B
2A
2B
B
4
6
XDP_TDI_CPU
4
3A
3B
8
XDP_TMS_CPU
4
3OE
4A
4B
4OE
GND
11
XDP_TRST#
4,8
15
7
*74CBTLV3126
8
NBSWON#
31,33
+1.05V
1
7,33
5
+3V
U56
7
PCH_SLP_S0#
VCCST_PWRGD
2
3
NC
VCC
A
5
C768
0.1u/10V_4
A
GND
Y
R489
10K_4
4
PROJECT :ZRQ
Size
74AUP1G07GW
3
Document Number
Rev
3A
CPU/PCH XDP
Date:
4
XDP_TDO_CPU
2OE
+3VPCU
*ACES_88511-180N
5
3
1OE
DPAD
7
RTC_RST#
SYS_RESET#
12
XDP_TRST_N
7,33
1
APS7
R767
R765
R742
R764
R763
R762
R744
1A
2
A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
VCC
2
Sheet
1
13
of
47
2
3
4
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
BYTE7_56-63
M_A_BS#0
M_A_BS#1
M_A_BS#2
M2
N8
M3
SO-DIMMB SPD Address is 0XA4
SO-DIMMB TS Address is 0X34
3
M_A_BS#[2:0]
A
3
3
3
M_A_CLK0
M_A_CLK0#
M_A_CKE0
3
3
3
3
M_A_CS#0
M_A_RAS#
M_A_CAS#
M_A_WE#
BA0
BA1
BA2
CK
CK
CKE
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
F3
C7
M_A_DQS1
M_A_DQS3
DQSL
DQSU
E7
D3
G3
B7
M_A_ZQ1
L8
DML
DMU
DQSL
DQSU
T2
DDR3_DRAMRST#
RESET
ZQ
2
4,15
M_A_DQS#1
M_A_DQS#3
R402
240/F_4
J1
L1
J9
L9
1
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
J7
K7
K9
M_A_ODT0
U24
VREFCA
VREFDQ
NC#J1
NC#L1
NC#J9
NC#L9
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
E3
F7
F2
F8
H3
H8
G2
H7
M_A_DQ12
M_A_DQ11
M_A_DQ13
M_A_DQ15
M_A_DQ9
M_A_DQ10
M_A_DQ8
M_A_DQ14
D7
C3
C8
C2
A7
A2
B8
A3
M_A_DQ30
M_A_DQ25
M_A_DQ31
M_A_DQ28
M_A_DQ27
M_A_DQ29
M_A_DQ26
M_A_DQ24
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
M8
H1
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
B2
D9
G7
K2
K8
N1
N9
R1
R9
M_A_BS#0
M_A_BS#1
M_A_BS#2
M2
N8
M3
M_A_CLK0
M_A_CLK0#
M_A_CKE0
J7
K7
K9
A1
A8
C1
C9
D2
E9
F1
H2
H9
M_A_ODT0
M_A_CS#0
M_A_RAS#
M_A_CAS#
M_A_WE#
K1
L2
J3
K3
L3
M_A_DQS5
M_A_DQS6
F3
C7
+1.35V_SUS
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
E7
D3
M_A_DQS#5
M_A_DQS#6
DDR3_DRAMRST#
M_A_ZQ2
B1
B9
D1
D8
E2
E8
F9
G1
G9
G3
B7
T2
L8
U25
VREFCA
VREFDQ
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
J1
L1
J9
L9
E3
F7
F2
F8
H3
H8
G2
H7
M_A_DQ41
M_A_DQ42
M_A_DQ40
M_A_DQ46
M_A_DQ44
M_A_DQ43
M_A_DQ45
M_A_DQ47
D7
C3
C8
C2
A7
A2
B8
A3
M_A_DQ55
M_A_DQ52
M_A_DQ49
M_A_DQ51
M_A_DQ48
M_A_DQ53
M_A_DQ54
M_A_DQ50
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
M8
H1
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
B2
D9
G7
K2
K8
N1
N9
R1
R9
M_A_BS#0
M_A_BS#1
M_A_BS#2
M2
N8
M3
M_A_CLK0
M_A_CLK0#
M_A_CKE0
J7
K7
K9
A1
A8
C1
C9
D2
E9
F1
H2
H9
M_A_ODT0
M_A_CS#0
M_A_RAS#
M_A_CAS#
M_A_WE#
K1
L2
J3
K3
L3
M_A_DQS0
M_A_DQS2
F3
C7
+1.35V_SUS
BA0
BA1
BA2
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
CK
CK
CKE
ODT
CS
RAS
CAS
WE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
DQSL
DQSU
DML
DMU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
DQSL
DQSU
RESET
ZQ
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
R367
240/F_4
100-BALL
SDRAM DDR3
RAM _DDR3L
Vendor
8
BYTE4_32-39
BYTE2_16-23
2
M8
H1
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
7
BYTE0_0-7
BYTE6_48-55
1
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
M_A_A[15:0]
6
BYTE5_40-47
BYTE3_24-31
U23
3
5
BYTE1_8-15
NC#J1
NC#L1
NC#J9
NC#L9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
E7
D3
M_A_DQS#0
M_A_DQS#2
DDR3_DRAMRST#
M_A_ZQ3
B1
B9
D1
D8
E2
E8
F9
G1
G9
G3
B7
T2
L8
U26
VREFCA
VREFDQ
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
100-BALL
SDRAM DDR3
RAM _DDR3L
E3
F7
F2
F8
H3
H8
G2
H7
M_A_DQ4
M_A_DQ2
M_A_DQ5
M_A_DQ6
M_A_DQ1
M_A_DQ3
M_A_DQ0
M_A_DQ7
D7
C3
C8
C2
A7
A2
B8
A3
M_A_DQ16
M_A_DQ19
M_A_DQ17
M_A_DQ18
M_A_DQ23
M_A_DQ20
M_A_DQ22
M_A_DQ21
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
M8
H1
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
B2
D9
G7
K2
K8
N1
N9
R1
R9
M_A_BS#0
M_A_BS#1
M_A_BS#2
M2
N8
M3
M_A_CLK0
M_A_CLK0#
M_A_CKE0
J7
K7
K9
A1
A8
C1
C9
D2
E9
F1
H2
H9
M_A_ODT0
M_A_CS#0
M_A_RAS#
M_A_CAS#
M_A_WE#
K1
L2
J3
K3
L3
M_A_DQS4
M_A_DQS7
F3
C7
+1.35V_SUS
BA0
BA1
BA2
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
CK
CK
CKE
ODT
CS
RAS
CAS
WE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
DQSL
DQSU
DML
DMU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
DQSL
DQSU
RESET
ZQ
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
R405
240/F_4
J1
L1
J9
L9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
NC#J1
NC#L1
NC#J9
NC#L9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
E7
D3
M_A_DQS#4
M_A_DQS#7
G3
B7
T2
DDR3_DRAMRST#
L8
M_A_ZQ4
B1
B9
D1
D8
E2
E8
F9
G1
G9
VREFCA
VREFDQ
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
100-BALL
SDRAM DDR3
RAM _DDR3L
E3
F7
F2
F8
H3
H8
G2
H7
M_A_DQ33
M_A_DQ35
M_A_DQ32
M_A_DQ39
M_A_DQ36
M_A_DQ34
M_A_DQ38
M_A_DQ37
D7
C3
C8
C2
A7
A2
B8
A3
M_A_DQ60
M_A_DQ62
M_A_DQ61
M_A_DQ63
M_A_DQ56
M_A_DQ59
M_A_DQ57
M_A_DQ58
+1.35V_SUS
BA0
BA1
BA2
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
CK
CK
CKE
ODT
CS
RAS
CAS
WE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
DQSL
DQSU
DML
DMU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
DQSL
DQSU
RESET
ZQ
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
R369
240/F_4
J1
L1
J9
L9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
2
M_A_DQS#[7:0]
M_A_DQS[7:0]
M_A_DQ[63:0]
1
3
2
3
3
1
1
<DDR>
NC#J1
NC#L1
NC#J9
NC#L9
B2
D9
G7
K2
K8
N1
N9
R1
R9
A
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
100-BALL
SDRAM DDR3
RAM _DDR3L
P/N
Hynix
BYTE1_8-15
BYTE5_40-47
BYTE3_24-31
M_A_BS#0
M_A_BS#1
M_A_BS#2
M2
N8
M3
M_A_RAS#
M_A_CAS#
M_A_WE#
K1
L2
J3
K3
L3
M_A_CS#1
M_A_DQS1
M_A_DQS3
F3
C7
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
E7
D3
DML
DMU
G3
B7
M_A_DQS#1
M_A_DQS#3
DQSL
DQSU
T2
DDR3_DRAMRST#
RESET
L8
ZQ
2
M_A_ZQ5
R775
240/F_4
J1
L1
J9
L9
1
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
J7
K7
K9
M_A_CLK1
M_A_CLK1#
M_A_CKE1
M_A_ODT0
3
VREFCA
VREFDQ
NC#J1
NC#L1
NC#J9
NC#L9
C
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
E3
F7
F2
F8
H3
H8
G2
H7
M_A_DQ11
M_A_DQ12
M_A_DQ15
M_A_DQ13
M_A_DQ14
M_A_DQ8
M_A_DQ10
M_A_DQ9
D7
C3
C8
C2
A7
A2
B8
A3
M_A_DQ25
M_A_DQ30
M_A_DQ28
M_A_DQ31
M_A_DQ29
M_A_DQ26
M_A_DQ24
M_A_DQ27
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
B2
D9
G7
K2
K8
N1
N9
R1
R9
M_A_BS#0
M_A_BS#1
M_A_BS#2
M2
N8
M3
M_A_CLK1
M_A_CLK1#
M_A_CKE1
J7
K7
K9
A1
A8
C1
C9
D2
E9
F1
H2
H9
M_A_ODT0
M_A_CS#1
M_A_RAS#
M_A_CAS#
M_A_WE#
K1
L2
J3
K3
L3
M_A_DQS5
M_A_DQS6
F3
C7
+1.35V_SUS
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
M8
H1
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
E7
D3
M_A_DQS#5
M_A_DQS#6
DDR3_DRAMRST#
M_A_ZQ6
B1
B9
D1
D8
E2
E8
F9
G1
G9
G3
B7
T2
L8
VREFCA
VREFDQ
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
100-BALL
SDRAM DDR3
RAM _DDR3L
M_A_DQ42
M_A_DQ41
M_A_DQ46
M_A_DQ40
M_A_DQ47
M_A_DQ45
M_A_DQ43
M_A_DQ44
D7
C3
C8
C2
A7
A2
B8
A3
M_A_DQ52
M_A_DQ55
M_A_DQ51
M_A_DQ49
M_A_DQ53
M_A_DQ54
M_A_DQ50
M_A_DQ48
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
CK
CK
CKE
ODT
CS
RAS
CAS
WE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
DQSL
DQSU
DML
DMU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
DQSL
DQSU
RESET
ZQ
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
NC#J1
NC#L1
NC#J9
NC#L9
M8
H1
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
B2
D9
G7
K2
K8
N1
N9
R1
R9
M_A_BS#0
M_A_BS#1
M_A_BS#2
M2
N8
M3
M_A_CLK1
M_A_CLK1#
M_A_CKE1
J7
K7
K9
A1
A8
C1
C9
D2
E9
F1
H2
H9
M_A_ODT0
M_A_CS#1
M_A_RAS#
M_A_CAS#
M_A_WE#
K1
L2
J3
K3
L3
M_A_DQS0
M_A_DQS2
F3
C7
+1.35V_SUS
BA0
BA1
BA2
R792
240/F_4
J1
L1
J9
L9
E3
F7
F2
F8
H3
H8
G2
H7
BYTE7_56-63
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
E7
D3
M_A_DQS#0
M_A_DQS#2
DDR3_DRAMRST#
M_A_ZQ7
B1
B9
D1
D8
E2
E8
F9
G1
G9
G3
B7
T2
L8
U49
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
100-BALL
SDRAM DDR3
RAM _DDR3L
E3
F7
F2
F8
H3
H8
G2
H7
M_A_DQ2
M_A_DQ4
M_A_DQ6
M_A_DQ5
M_A_DQ7
M_A_DQ0
M_A_DQ3
M_A_DQ1
D7
C3
C8
C2
A7
A2
B8
A3
M_A_DQ19
M_A_DQ16
M_A_DQ18
M_A_DQ17
M_A_DQ20
M_A_DQ22
M_A_DQ21
M_A_DQ23
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
CK
CK
CKE
ODT
CS
RAS
CAS
WE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
DQSL
DQSU
DML
DMU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
DQSL
DQSU
RESET
ZQ
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
NC#J1
NC#L1
NC#J9
NC#L9
M8
H1
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
B2
D9
G7
K2
K8
N1
N9
R1
R9
M_A_BS#0
M_A_BS#1
M_A_BS#2
M2
N8
M3
M_A_CLK1
M_A_CLK1#
M_A_CKE1
J7
K7
K9
A1
A8
C1
C9
D2
E9
F1
H2
H9
M_A_ODT0
M_A_CS#1
M_A_RAS#
M_A_CAS#
M_A_WE#
K1
L2
J3
K3
L3
M_A_DQS4
M_A_DQS7
F3
C7
+1.35V_SUS
BA0
BA1
BA2
R787
240/F_4
J1
L1
J9
L9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
E7
D3
M_A_DQS#4
M_A_DQS#7
G3
B7
T2
DDR3_DRAMRST#
L8
M_A_ZQ8
B1
B9
D1
D8
E2
E8
F9
G1
G9
VREFCA
VREFDQ
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
100-BALL
SDRAM DDR3
RAM _DDR3
E3
F7
F2
F8
H3
H8
G2
H7
M_A_DQ35
M_A_DQ33
M_A_DQ39
M_A_DQ32
M_A_DQ37
M_A_DQ38
M_A_DQ34
M_A_DQ36
D7
C3
C8
C2
A7
A2
B8
A3
M_A_DQ62
M_A_DQ60
M_A_DQ63
M_A_DQ61
M_A_DQ59
M_A_DQ57
M_A_DQ58
M_A_DQ56
B
+1.35V_SUS
BA0
BA1
BA2
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
CK
CK
CKE
ODT
CS
RAS
CAS
WE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
DQSL
DQSU
DML
DMU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
DQSL
DQSU
RESET
ZQ
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
R793
240/F_4
J1
L1
J9
L9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
2
3
3
3
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
U48
2
SO-DIMMB SPD Address is 0XA4
SO-DIMMB TS Address is 0X34
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
BYTE4_32-39
BYTE2_16-23
U47
1
M8
H1
+SMDDR_VREF_DIMM
+SMDDR_VREF_DQ0
B
BYTE0_0-7
BYTE6_48-55
U46
1
DDR3L 1600Mhz 4Gb
2
DDR3L 1333Mhz 4Gb
AKD5JGST404
1
AKD5JGST400
Elpida
NC#J1
NC#L1
NC#J9
NC#L9
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
C
100-BALL
SDRAM DDR3
RAM _DDR3L
SP : ELPIDA DRAM P/N : AKD5JGST400
HYNIX DRAM P/N : AKD5JGQTW01
M1 solution
+1.35V_SUS
+1.35V_SUS
R391
1.8K/F_4
Place these Caps near Memory Down
Vref_CA
+SMDDR_VREF_DIMM
C411
*10u/6.3V_6
C463
10u/6.3V_6
C350
10u/6.3V_6
C460
*10u/6.3V_6
C666
*10u/6.3V_6
C718
10u/6.3V_6
C699
*10u/6.3V_6
C462
10u/6.3V_6
C357
*10u/6.3V_6
C296
*10u/6.3V_6
C464
10u/6.3V_6
C321
*10u/6.3V_6
C343
10u/6.3V_6
+VREF_CA_CPU
C426
*10u/6.3V_6
R382
*SHORT_6
M3 solution
C695
*1u/6.3V_4
C696
*1u/6.3V_4
C673
1u/6.3V_4
C416
1u/6.3V_4
C378
1u/6.3V_4
C414
1u/6.3V_4
C318
*1u/6.3V_4
C340
1u/6.3V_4
C448
*1u/6.3V_4
C362
*1u/6.3V_4
C338
*1u/6.3V_4
C452
*1u/6.3V_4
C458
*1u/6.3V_4
C439
*1u/6.3V_4
C449
1u/6.3V_4
R387
+3V
2/F_6
2
C421
10u/6.3V_6
1
C461
10u/6.3V_6
C412
0.022u/16V_4
R392
1.8K/F_4
C438
470p/50V_4
R796
*1K_4
SPD_A0
R797
*1K_4
R799
*1K_4
SPD_A1
R801
*1K_4
R803
*1K_4
SPD_A2
R805
*1K_4
1
2
3
SPD_A0
SPD_A1
SPD_A2
R381
24.9/F_4
C441
*1u/6.3V_4
U50
8,13,15,23,32
8,13,15,23,32
C379
1u/6.3V_4
C433
*1u/6.3V_4
C440
*1u/6.3V_4
C413
1u/6.3V_4
C358
1u/6.3V_4
C375
*1u/6.3V_4
C352
*1u/6.3V_4
C363
*1u/6.3V_4
C689
1u/6.3V_4
C710
*1u/6.3V_4
C657
*1u/6.3V_4
C707
1u/6.3V_4
C660
1u/6.3V_4
C709
*1u/6.3V_4
C656
1u/6.3V_4
C694
1u/6.3V_4
R802
R804
CLK_SCLK
CLK_SDATA
+3V
M1 solution
+1.35V_SUS
*0_4 SPD_CLK_SCLK
*0_4 SPD_CLK_SDATA
6
5
R798
7
*1K_4
R800
*1K_4
WP =1 : WRITE DISABLE
SCL
SDA
WP
A0
A1
A2
VCC
GND
+3V
8
4
*M24C02-WMN6TP
C728
*0.1u/10V_4
SPD address:A2
C361
1u/6.3V_4
C455
*1u/6.3V_4
C360
*1u/6.3V_4
C442
*1u/6.3V_4
C447
*1u/6.3V_4
C444
*1u/6.3V_4
C445
*1u/6.3V_4
C453
*1u/6.3V_4
C684
*1u/6.3V_4
C713
*1u/6.3V_4
C427
*1u/6.3V_4
C372
*1u/6.3V_4
C705
*1u/6.3V_4
C342
1u/6.3V_4
C443
1u/6.3V_4
R347
1.8K/F_4
C356
*1u/6.3V_4
R337
*SHORT_6
R345
+SMDDR_VREF_DQ0
5.1/F_6
2
+VREFDQ_SA_M3
Vref_DQ
C373
1u/6.3V_4
C688
1u/6.3V_4
C715
*1u/6.3V_4
C664
*1u/6.3V_4
C429
*1u/6.3V_4
C714
*1u/6.3V_4
C672
*1u/6.3V_4
C711
1u/6.3V_4
C712
*1u/6.3V_4
C674
1u/6.3V_4
C667
*1u/6.3V_4
C468
*1u/6.3V_4
C704
1u/6.3V_4
C432
1u/6.3V_4
C451
*1u/6.3V_4
1
M3 solution
C702
1u/6.3V_4
C347
0.022u/16V_4
R349
1.8K/F_4
C374
470p/50V_4
R335
24.9/F_4
C725
*0.1u/10V_4
C716
*0.1u/10V_4
C717
*0.1u/10V_4
C698
*0.1u/10V_4
C706
*0.1u/10V_4
C708
*0.1u/10V_4
C659
*0.1u/10V_4
C662
*0.1u/10V_4
C669
*0.1u/10V_4
C661
*0.1u/10V_4
C446
*0.1u/10V_4
C349
*0.1u/10V_4
C351
*0.1u/10V_4
C407
*0.1u/10V_4
C425
*0.1u/10V_4
C382
*0.1u/10V_4
C697
*0.1u/10V_4
C677
*0.1u/10V_4
C701
*0.1u/10V_4
C682
*0.1u/10V_4
C678
*0.1u/10V_4
C420
*0.1u/10V_4
C450
*0.1u/10V_4
C700
*0.1u/10V_4
C409
*0.1u/10V_4
C663
*0.1u/10V_4
C658
*0.1u/10V_4
C457
*0.1u/10V_4
C402
*0.1u/10V_4
C456
*0.1u/10V_4
C454
*0.1u/10V_4
C376
*0.1u/10V_4
+DDR_VTT_RUN
+1.35V_SUS
D
D
+SMDDR_VREF_DIMM
C400
0.047u/25V_4
2
2
C703
0.047u/25V_4
1
1
1
C394
0.047u/25V_4
2
1
C398
0.047u/25V_4
2
1
1
C467
0.047u/25V_4
1
1
C726
0.047u/25V_4
C724
0.047u/25V_4
2
C387
0.047u/25V_4
2
C385
0.047u/25V_4
1
1
1
C719
0.047u/25V_4
2
C720
0.047u/25V_4
2
C388
0.047u/25V_4
2
1
C309
10u/6.3V_6
2
C417
1u/6.3V_4
1
C377
1u/6.3V_4
2
C687
1u/6.3V_4
C434
0.047u/25V_4
Place these Caps near Memory Down CA & DQ pin
+SMDDR_VREF_DQ0
C690
1u/6.3V_4
C436
0.047u/25V_4
2
C437
0.047u/25V_4
2
C722
10u/6.3V_6
1
C691
1u/6.3V_4
2
C686
1u/6.3V_4
2
C692
1u/6.3V_4
2
C403
1u/6.3V_4
1
1
+DDR_VTT_RUN
M_A_WE#
M_A_CAS#
M_A_RAS#
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CKE0
M_A_CS#0
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
R374
R768
R364
R776
R779
R375
R361
R370
R780
R784
R383
R379
R388
R397
R401
R399
R400
R783
R772
R384
R378
R398
R396
R371
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
34.8/F_4
M_A_CKE1
M_A_CS#1
R773
R365
34.8/F_4
34.8/F_4
M_A_ODT0
R360
30/F_4
M_A_CLK1
M_A_CLK1#
R746
R753
26.1/F_4
26.1/F_4
M_A_CLK0
M_A_CLK0#
R755
R769
26.1/F_4
26.1/F_4
+DDR_VTT_RUN
C384
0.047u/25V_4
PROJECT : ZRQ
Size
Document Number
Rev
3A
DDR3 MEMORY DOWNx16 A
Date:
1
2
3
4
5
6
7
Sheet
8
14
of
47
M_B_A[15:0]
D
R312
R319
+3V
10K_4
10K_4
8,13,14,23,32
8,13,14,23,32
C
M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_CS#0
M_B_CS#1
M_B_CLK0
M_B_CLK0#
M_B_CLK1
M_B_CLK1#
M_B_CKE0
M_B_CKE1
M_B_CAS#
M_B_RAS#
M_B_WE#
DIMM1_SA0
DIMM1_SA1
CLK_SCLK
CLK_SDATA
4
4
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
116
120
M_B_ODT0_DIMM
M_B_ODT1_DIMM
ODT0
ODT1
11
28
46
63
136
153
170
187
3
M_B_DQS[7:0]
3
M_B_DQS#[7:0]
M_B_DQS1
M_B_DQS3
M_B_DQS5
M_B_DQS7
M_B_DQS0
M_B_DQS2
M_B_DQS4
M_B_DQS6
M_B_DQS#1
M_B_DQS#3
M_B_DQS#5
M_B_DQS#7
M_B_DQS#0
M_B_DQS#2
M_B_DQS#4
M_B_DQS#6
B
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
2
M_B_DQ[63:0]
JDIM5A
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
PC2100 DDR3 SDRAM SO-DIMM
(204P)
3
4
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
R327
+3V
*10K_4
DDR3_DRAMRST#
+SMDDR_VREF_DQ1
+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM
C325
10u/6.3V_6
C320
10u/6.3V_6
+3V
C292
0.1u/10V_4
C327
0.1u/10V_4
EVENT#
RESET#
VREF_DQ
VREF_CA
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VTT1
VTT2
GND
GND
D
C
203
204
+DDR_VTT_RUN
205
206
B
+1.35V_SUS
Vref_DQ
+SMDDR_VREF_DQ1
+SMDDR_VREF_DQ1
+VREFDQ_SB_M3
C323
0.1u/10V_4
NC1
NC2
NCTEST
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
DDR3-DIMM1_H=5.2_STD
C324
0.1u/10V_4
10u/6.3V_6
1
126
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
R308
1.8K/F_4
+ C277
C326
330u/2V_7343
0.1u/10V_4
198
30
C337 *0.1u/10V_4
VDDSPD
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
C313
C297 C302
0.1u/10V_4
2.2u/6.3V_6
R297
M3 solution
*SHORT_6 R305
2.2u/6.3V_6
2/F_6
2
C294
0.1u/10V_4
C319
A
77
122
125
PM_EXTTS#1
4,14
1
C295
10u/6.3V_6
199
+3V
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
M1 solution
+SMDDR_VREF_DIMM
C298
10u/6.3V_6
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2.48A
Place these Caps near SO-DIMM
C293
10u/6.3V_6
15
3
M_B_DQ12
M_B_DQ14
M_B_DQ10
M_B_DQ13
M_B_DQ9
M_B_DQ8
M_B_DQ11
M_B_DQ15
M_B_DQ28
M_B_DQ29
M_B_DQ26
M_B_DQ27
M_B_DQ24
M_B_DQ25
M_B_DQ31
M_B_DQ30
M_B_DQ44
M_B_DQ41
M_B_DQ43
M_B_DQ45
M_B_DQ40
M_B_DQ47
M_B_DQ46
M_B_DQ42
M_B_DQ61
M_B_DQ60
M_B_DQ57
M_B_DQ56
M_B_DQ58
M_B_DQ59
M_B_DQ62
M_B_DQ63
M_B_DQ0
M_B_DQ5
M_B_DQ3
M_B_DQ2
M_B_DQ4
M_B_DQ1
M_B_DQ6
M_B_DQ7
M_B_DQ17
M_B_DQ16
M_B_DQ22
M_B_DQ18
M_B_DQ21
M_B_DQ20
M_B_DQ23
M_B_DQ19
M_B_DQ36
M_B_DQ33
M_B_DQ38
M_B_DQ34
M_B_DQ32
M_B_DQ37
M_B_DQ35
M_B_DQ39
M_B_DQ55
M_B_DQ51
M_B_DQ53
M_B_DQ50
M_B_DQ52
M_B_DQ49
M_B_DQ48
M_B_DQ54
DDR3-DIMM1_H=5.2_STD
+1.35V_SUS
1
PC2100 DDR3 SDRAM SO-DIMM
(204P)
5
C276
0.022u/16V_4
R309
1.8K/F_4
C288
470p/50V_4
R299
24.9/F_4
+DDR_VTT_RUN
C290
2.2u/6.3V_6
C316
0.1u/10V_4
C303
1u/6.3V_4
C304
1u/6.3V_4
C314
1u/6.3V_4
C322
1u/6.3V_4
C331
C289
4.7u/6.3V_6 4.7u/6.3V_6
C299
A
4.7u/6.3V_6
PROJECT : ZRQ
Size
Document Number
Rev
3A
DDRIII SO-DIMM-1
Date:
5
4
3
2
Sheet
1
15
of
47
1
2
C570
C70
C133
C80
C78
place under BGA
8
AG13
AG15
AG16
AG18
AG25
AH15
AH18
AH26
AH27
AJ27
AK27
AL27
AM28
AN28
2500mA
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
PEX_IOVDD_6
[PEG Interface]
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14
PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N
PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N
B
AC6
AJ28
AJ4
AJ5
AL11
C15
D19
D20
D23
D26
H31
T8
V32
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
C
PEX_REFCLK
PEX_REFCLK_N
J8/K8 0.4MM = 16mils
J8
K8
L8
M8
+3V_GFX
16
N14P-GT
U39A
AG19
AG21
AG22
AG24
AH21
AH25
EV@22u/6.3V_8
EV@22u/6.3V_8
EV@10u/6.3V_6
EV@10u/6.3V_6
[email protected]/6.3V_6
EV@1u/6.3V_4
EV@1u/6.3V_4
To be placed no further from the GPU C569
than bewteen BGA and Power supply C98
place near balls
7
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N
VDD33_1
VDD33_2
VDD33_3
VDD33_4
PEX_WAKE
PEX_RST_N
AN12
AM12
AN14
AM14
AP14
AP15
AN15
AM15
AN17
AM17
AP17
AP18
AN18
AM18
AN20
AM20
AP20
AP21
AN21
AM21
AN23
AM23
AP23
AP24
AN24
AM24
AN26
AM26
AP26
AP27
AN27
AM27
PEG_TX0
PEG_TX#0
PEG_TX1
PEG_TX#1
PEG_TX2
PEG_TX#2
PEG_TX3
PEG_TX#3
AK14
AJ14
AH14
AG14
AK15
AJ15
AL16
AK16
AK17
AJ17
AH17
AG17
AK18
AJ18
AL19
AK19
AK20
AJ20
AH20
AG20
AK21
AJ21
AL22
AK22
AK23
AJ23
AH23
AG23
AK24
AJ24
AL25
AK25
R_PEG_RX0
R_PEG_RX#0
R_PEG_RX1
R_PEG_RX#1
R_PEG_RX2
R_PEG_RX#2
R_PEG_RX3
R_PEG_RX#3
PEG_TX0
PEG_TX#0
PEG_TX1
PEG_TX#1
PEG_TX2
PEG_TX#2
PEG_TX3
PEG_TX#3
9
9
9
9
9
+3V_GFX
A
9
R148
EV@10K/F_4
Follow Z09 to isolate CLK_REQ#
1
PEX_CLKREQ#
3
CLK_PEGA_REQ#
R154
C142
C135
C131
C121
C112
C104
C120
C115
PEG_RX0
PEG_RX#0
PEG_RX1
PEG_RX#1
PEG_RX2
PEG_RX#2
PEG_RX3
PEG_RX#3
9
PU at page 9
Q23
EV@2N7002K
*EV@0_4
9
9
B
9
9
9
9
9
9
+3V
C622
7,13,26,27,28,33
AL13
AK13
AJ26
AK26
+3V_GFX
9
9
C
5
EV@22u/6.3V_8
EV@22u/6.3V_8
EV@10u/6.3V_6
EV@10u/6.3V_6
EV@1u/6.3V_4
EV@1u/6.3V_4
C153
C109
C118
C143
C123
+1.05V_GFX
6
CLK_PCIE_VGA
CLK_PCIE_VGA#
PEX_TSTCLK
PEX_TSTCLK#
R114
2
PLTRST#
4
9
9
10
*EV@200/F_4
PEGX_RST#
AK12
PEX_CLKREQ#
AP29
PEX_TERMP
R523
[email protected]/F_4
TESTMODE
R157
EV@10K/F_4
U45
EV@TC7SH08FU
PEGX_RST#
19
R694
EV@100K_4
PCH control PEGX_RST#
0815 change R53 to 1% tolerance
AJ11
AJ12
PEGX_RST#
1
DGPU_HOLD_RST#
3
A
5
2
To be placed no further from the GPU C564
than bewteen BGA and Power supply C563
place under BGA
4
1000mA
+1.05V_GFX
place near balls
3
R710
*EV@0_4
L8/M8 0.4MM = 16mils
PEX_CLKREQ_N
+3V_GFX
C244
C243
C240
C242
C241
D
PEX_TERMP
PLACE CLOSE TO BGA
L8/M8
TESTMODE
EV@1u/6.3V_4
PEX_PLLVDD
PEX_PLL_HVDD
PEX_SVDD_3V3
RSVD R1 and C1 for GV2 co-layout sDDR3
PEX_PLLVDD
R110
AG26
C96
AH12
AG12
C87
EV@1u/6.3V_4
C84
PEX_RST timing
PEX_PLLVDD : 0.3MM = 12mils (150mA)
AK11
R1
EV@0_6
+1.05V_GFX
I/O 3.3V
C1
place near BGA
C72
*EV@GV2@1u/6.3V_4
PEX_RST
place near ball
3.3V_AUX_NC
PLACE CLOSE TO GPU BALLS L8/M8
VDD_SENSE
GND_SENSE
D
P8
C182
C185
C184
L4
+3V_GFX
AH12/AG12 need 210mA of +3V_GFX
Trise >= 1uS
Tfail <=500nS
PLACE NEAR BGA
L5
GPU_VCCP_SENSE
GPU_VSSP_SENSE
EV@N14P
N14P
40
40
8mils width
(0.2MM)
PROJECT : ZRQ
Size
Document Number
Rev
3A
DGPU 1/5 (PEG)
Date:
1
2
3
4
5
6
7
Sheet
16
8
of
47
1
2
3
4
5
6
U39B
21
FBA_CMD[30:0]
A
21
VMA_DM[7..0]
DBI
U30
T31
U29
R34
R33
U32
U33
U28
V28
V29
V30
U34
U31
V34
V33
Y32
AA31
AA29
AA28
AC34
AC33
AA32
AA33
Y28
Y29
W31
Y30
AA34
Y31
Y34
Y33
V31
VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7
P30
F31
F34
M32
AD31
AL29
AM32
AF34
FBA_CMD0 (FBA_CMD25)
FBA_CMD1 (FBA_CMD23) [MEMORY
FBA_CMD2
FBA_CMD3 (FBA_CMD0)
FBA_CMD7
FBA_CMD8 (FBA_CMD1)
FBA_CMD30
FBA_CMD31 (NC)
I/F A]
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
B
21
EDC
21
M31
G31
E33
M33
AE31
AK30
AN33
AF33
VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7
VMA_WDQS[7..0]
M30
H30
E34
M34
AF30
AK31
AM34
AF32
VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7
VMA_RDQS[7..0]
AA27
AA30
AB27
AB33
AC27
AD27
AE27
AF27
AG27
B13
B16
B19
E13
E16
E19
H10
H11
H12
H13
H14
H15
H16
H18
H19
H20
H21
H22
H23
H24
H8
H9
L27
M27
N27
P27
R27
T27
T30
T33
V27
W27
W30
W33
Y27
+1.5V_GFX
Follow DG to place caps
+1.5V_GFX
PLACE CLOSE TO GPU BALLS
C
0.1u x 6
stuff x4
1u x 6
stuff x4
4.7u x 6
stuff x4
C132
C83
C161
C148
C108
C99
*[email protected]/10V_4
C155
EV@1u/6.3V_4
C110
EV@1u/6.3V_4
C63
EV@1u/6.3V_4
C86
EV@1u/6.3V_4
C141
*EV@1u/6.3V_4
C145
*EV@1u/6.3V_4
C107
C55
C130
C62
C57
C85
*[email protected]/6.3V_6
C53
C49
C52
C56
10u x 4
stuff x2
EV@10u/6.3V_6
EV@10u/6.3V_6
*EV@10u/6.3V_6
*EV@10u/6.3V_6
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8
FBVDDQ_9
FBVDDQ_10
FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
FBVDDQ_20
FBVDDQ_21
FBVDDQ_22
FBVDDQ_23
FBVDDQ_24
FBVDDQ_25
FBVDDQ_26
FBVDDQ_27
FBVDDQ_28
FBVDDQ_29
FBVDDQ_30
FBVDDQ_31
FBVDDQ_32
FBVDDQ_33
FBVDDQ_34
FBVDDQ_35
FBVDDQ_36
FBVDDQ_37
FBVDDQ_38
FBVDDQ_39
FBVDDQ_40
FBVDDQ_41
FBVDDQ_42
FBVDDQ_43
FBVDDQ_44
FBA_D00
FBA_D01
FBA_D02
FBA_D03
FBA_D04
FBA_D05
FBA_D06
FBA_D07
FBA_D08
FBA_D09
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_CLK0
FBA_CLK0_N
FBA_CLK1
FBA_CLK1_N
(FBA_DEBUG) FBA_DEBUG0
(NC) FBA_DEBUG1
FB_VREF_NC
FBA_CMD_RFU0
FBA_CMD_RFU1
FBA_WCK01
FBA_WCK01_N
FBA_WCK23
FBA_WCK23_N
FBA_WCK45
FBA_WCK45_N
FBA_WCK67
FBA_WCK67_N
FBA_WCKB01
FBA_WCKB01_N
FBA_WCKB23
FBA_WCKB23_N
FBA_WCKB45
FBA_WCKB45_N
FBA_WCKB67
FBA_WCKB67_N
RSVD
FB_DLL_AVDD
FBA_PLL_AVDD
FBVDDQ_PROBE
GND_PROBE
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
D
C100
8
17
U39C
22
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
TP10
7
FB_CALTERM_GND
EV@22u/6.3V_8
L28
M29
L29
M28
N31
P29
R29
P28
J28
H29
J29
H28
G29
E31
E32
F30
C34
D32
B33
C33
F33
F32
H33
H32
P34
P32
P31
P33
L31
L34
L32
L33
AG28
AF29
AG29
AF28
AD30
AD29
AC29
AD28
AJ29
AK29
AJ30
AK28
AM29
AM31
AN29
AM30
AN31
AN32
AP30
AP32
AM33
AL31
AK33
AK32
AD34
AD32
AC30
AD33
AF31
AG34
AG32
AG33
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63
R30
R31
AB31
AC31
VMA_CLK0
VMA_CLK0#
VMA_CLK1
VMA_CLK1#
22
VMC_DM[7..0]
DBI
22
VMC_WDQS[7..0]
EDC
22
FBA_DEBUG
FBA_DEBUG1
VMC_RDQS[7..0]
VMA_CLK0
VMA_CLK0#
VMA_CLK1
VMA_CLK1#
15mils width
R28
AC28
H26
FBC_CMD[30:0]
R81
R101
D13
E14
F14
A12
B12
C14
B14
G15
F15
E15
D15
A14
D14
A15
B15
C17
D18
E18
F18
A20
B20
C18
B18
G18
G17
F17
D16
A18
D17
A17
B17
E17
VMC_DM0
VMC_DM1
VMC_DM2
VMC_DM3
VMC_DM4
VMC_DM5
VMC_DM6
VMC_DM7
E11
E3
A3
C9
F23
F27
C30
A24
VMC_WDQS0
VMC_WDQS1
VMC_WDQS2
VMC_WDQS3
VMC_WDQS4
VMC_WDQS5
VMC_WDQS6
VMC_WDQS7
D10
D5
C3
B9
E23
E28
B30
A23
VMC_RDQS0
VMC_RDQS1
VMC_RDQS2
VMC_RDQS3
VMC_RDQS4
VMC_RDQS5
VMC_RDQS6
VMC_RDQS7
D9
E4
B2
A9
D22
D28
A30
B23
FBB_CMD0 (FBC_CMD25)
FBC_CMD2
FBB_CMD3 (FBC_CMD0)
FBC_CMD7
FBB_CMD8 (FBC_CMD1)
FBB_CMD24(FBC_CMD4)
FBC_CMD30
FBC_CMD31 (NC)
MEMORY I/F C
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7
FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2
FBC_DQS_RN3
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN7
(FBC_DEBUG) FBB_DEBUG0
(NC) FBB_DEBUG1
+1.5V_GFX
FBB_CMD_RFU0
FBB_CMD_RFU1
No stuff follow CRB
R32
AC32
FBB_WCK01
FBB_WCK01_N
FBB_WCK23
FBB_WCK23_N
FBB_WCK45
FBB_WCK45_N
FBB_WCK67
FBB_WCK67_N
K31
L30
H34
J34
AG30
AG31
AJ34
AK34
J30
J31
J32
J33
AH31
AJ31
AJ32
AJ33
FB_CLAMP
K27
+FB_PLLAVDD
U27
R678
*EV@SHORT_4
R677
EV@10K_4
EC_FB_CLAMP
19,20,33
FBB_PLL_AVDD
C70 close ball K27 35mA
C81
+FB_PLLAVDD
EV@N14P
L15
C58
EV@PBY160808T-30Y-N/2A/300ohm_6
EV@22u/6.3V_8
C82
C69
FBVDDQ_SENSE_NC
TP92
F2
FBB_WCKB01
FBB_WCKB01_N
FBB_WCKB23
FBB_WCKB23_N
FBB_WCKB45
FBB_WCKB45_N
FBB_WCKB67
FBB_WCKB67_N
GC6 connect to EC
E1
F1
FBC_D00
FBC_D01
FBC_D02
FBC_D03
FBC_D04
FBC_D05
FBC_D06
FBC_D07
FBC_D08
FBC_D09
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
FBC_CLK0
FBC_CLK0_N
FBC_CLK1
FBC_CLK1_N
21
21
21
21
*[email protected]/F_4
TP12
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30
TP16
FB_GND_SENSE_NC
J27
FB_CAL_PD_VDDQ
R102
TP90
H27
FB_CAL_PU_GND
R100
H25
FB_CAL_TERM_GND
R115
G9
E9
G8
F9
F11
G11
F12
G12
G6
F5
E6
F6
F4
G4
E2
F3
C2
D4
D3
C1
B3
C4
B5
C5
A11
C11
D11
B11
D8
A8
C8
B8
F24
G23
E24
G24
D21
E21
G21
F21
G27
D27
G26
E27
E29
F29
E30
D30
A32
C31
C32
B32
D29
A29
C29
B29
B21
C23
A21
C21
B24
C24
B26
C26
VMC_DQ0
VMC_DQ1
VMC_DQ2
VMC_DQ3
VMC_DQ4
VMC_DQ5
VMC_DQ6
VMC_DQ7
VMC_DQ8
VMC_DQ9
VMC_DQ10
VMC_DQ11
VMC_DQ12
VMC_DQ13
VMC_DQ14
VMC_DQ15
VMC_DQ16
VMC_DQ17
VMC_DQ18
VMC_DQ19
VMC_DQ20
VMC_DQ21
VMC_DQ22
VMC_DQ23
VMC_DQ24
VMC_DQ25
VMC_DQ26
VMC_DQ27
VMC_DQ28
VMC_DQ29
VMC_DQ30
VMC_DQ31
VMC_DQ32
VMC_DQ33
VMC_DQ34
VMC_DQ35
VMC_DQ36
VMC_DQ37
VMC_DQ38
VMC_DQ39
VMC_DQ40
VMC_DQ41
VMC_DQ42
VMC_DQ43
VMC_DQ44
VMC_DQ45
VMC_DQ46
VMC_DQ47
VMC_DQ48
VMC_DQ49
VMC_DQ50
VMC_DQ51
VMC_DQ52
VMC_DQ53
VMC_DQ54
VMC_DQ55
VMC_DQ56
VMC_DQ57
VMC_DQ58
VMC_DQ59
VMC_DQ60
VMC_DQ61
VMC_DQ62
VMC_DQ63
D12
E12
E20
F20
VMC_CLK0
VMC_CLK0#
VMC_CLK1
VMC_CLK1#
G14
G20
FBC_DEBUG
FBC_DEBUG1
A
VMA_DQ[63:0]
VMC_DQ[63:0]
VMA_DQ[63:0]
21
VMC_DQ[63:0]
22
For Fermi
FBA_CMD2
R7
EV@10K/F_4
FBA_CMD3
R8
EV@10K/F_4
FBA_CMD5
R15
EV@10K/F_4
FBA_CMD18
R466
EV@10K/F_4
FBA_CMD19
R464
EV@10K/F_4
FBC_CMD2
R161
EV@10K/F_4
FBC_CMD3
R167
EV@10K/F_4
FBC_CMD5
R137
EV@10K/F_4
FBC_CMD18
R535
EV@10K/F_4
FBC_CMD19
R541
EV@10K/F_4
B
0815 confirm with ZQS (sDDR3)
VMC_CLK0
VMC_CLK0#
VMC_CLK1
VMC_CLK1#
R138
R125
C12
C20
22
22
22
22
+1.5V_GFX
No stuff follow CRB
F8
E8
A5
A6
D24
D25
B27
C27
C
D6
D7
C6
B6
F26
E26
A26
A27
H17 +FB_PLLAVDD
C128
C107 close to ball H17
+1.05V_GFX
C66/C67 close to ball U27
C45 close to BGA
+FB_PLLAVDD = 0.3mm 12mils
U27+H17 62mA
+1.5V_GFX
N14P-GV2
D
N14P-GT
PLACE CLOSE TO GPU BALLS
EV@22u/6.3V_8
C90
*EV@22u/6.3V_8
C50
*EV@22u/6.3V_8
PLACE CLOSE TO BGA
EV@N14P
+1.5V_GFX
C39
C546
+
C47
*EV@330u/2V_7343
+
22u x 4
stuff x2
EV@330u/2V_7343
GDDR5
R118 change to 40.2/F
R141 change to 60.4/F
sDDR3
R118=42.2/F
R141=51.1/F
PROJECT : ZRQ
Size
RSVD 330u, ZQS have one
Document Number
Rev
3A
DGPU 2/5 (Memory)
Date:
1
2
3
4
5
6
7
17
Sheet
8
of
47
1
2
3
4
5
6
7
8
18
U39D
AH8
N14P-GV2
AG8
AG9
N14P-GT
A
AJ8
IFPAB_PLLVDD
[IFPA/B_LVDS]
IFPA_IOVDD
IFPB_IOVDD
IFPAB_RSET
IFPA_TXC
IFPA_TXC_N
IFPA_TXD0
IFPA_TXD0_N
IFPA_TXD1
IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N
IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
IFPB_TXD5
IFPB_TXD5_N
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
IFPB_TXD7_N
AF7
AG7
AF6
AG6
B
AF8
AN2
AB8
AC7
AC8
AD6
IFPC_PLLVDD
IFPC_AUX_I2CW_SCL
[IFPC/D_TMDS]
IFPC_AUX_I2CW_SDA_N
IFPD_PLLVDD
IFPC_L0
IFPC_L0_N
IFPC_L1
IFPC_L1_N
IFPC_L2
IFPC_L2_N
IFPC_L3
IFPC_L3_N
IFPC_IOVDD
IFPD_IOVDD
IFPD_AUX_I2CX_SCL
IFPD_AUX_I2CX_SDA_N
IFPD_L0
IFPD_L0_N
IFPD_L1
IFPD_L1_N
IFPD_L2
IFPD_L2_N
IFPD_L3
IFPD_L3_N
IFPC_RSET
IFPD_RSET
IFPEF_PLLVDD
[IFPE/F_DP]
IFPE_IOVDD
IFPF_IOVDD
IFPEF_RSET
IFPE_AUX_I2CY_SCL
IFPE_AUX_I2CY_SDA_N
IFPE_L0
IFPE_L0_N
IFPE_L1
IFPE_L1_N
IFPE_L2
IFPE_L2_N
IFPE_L3
IFPE_L3_N
IFPF_AUX_I2CZ_SCL
IFPF_AUX_I2CZ_SDA_N
IFPF_L0
IFPF_L0_N
IFPF_L1
IFPF_L1_N
IFPF_L2
IFPF_L2_N
IFPF_L3
IFPF_L3_N
C
AG10
AP9
AP8
DACA_VDD
[DACA/B_CRT]
DACA_RED
DACA_GREEN
DACA_BLUE
NV_PLLVDD 0.3MM=12mils 78mA
L19
A
AH9
AJ9
AP5
AP6
AL7
AM7
AM8
AN8
AL8
AK8
AG3
AG2
AK1
AJ1
AJ3
AJ2
AH3
AH4
AG5
AG4
AK3
AK2
AM1
AM2
AM3
AM4
AL3
AL4
AK4
AK5
B
AB3
AB4
AD2
AD3
AD1
AC1
AC2
AC3
AC4
AC5
AF3
AF2
AE3
AE4
AF4
AF5
AD4
AD5
AG1
AF1
C
AK9
AL10
AL9
DACA_VREF
DACA_HSYNC
DACA_VSYNC
DACA_RSET
I2CA_SCL
I2CA_SDA
+1.05V_GFX
AN6
AM6
AN3
AP3
AM5
AN5
AK6
AL6
AH6
AJ6
AM9
AN9
R4
R5
EV_CRTDCLK
EV_CRTDDAT
R191
R196
[email protected]_4
[email protected]_4
C135 close to ball AD8
EV@160808-30Y/1A/30ohm_6
NV_PLLVDD
C191
EV@22u/6.3V_8
AD8
PLLVDD
C187
AE8 : 71mA
AE8
SP_PLLVDD
D
D
GPU_SP_PLLVDD 0.3MM=12mils
+1.05V_GFX
L20
AD7 : 41mA
EV@160808-0180P/1.5A/180ohm_6
C196
SP_VID_PLLVDD
AD7
VID_PLLVDD
[XTAL IN]
C178
C198
C193
XTAL_IN
XTAL_OUT
XTAL_OUTBUFF
XTAL_SSIN
H3
H2
J4
H1
CLK_27M_VGA_2
XTALOUT
R675
EV@10K/F_4
R676
EV@10K/F_4
C229
EV@10p/50V_4
EV@N14P
EV@22u/6.3V_8
Y5
1
2
3
4
EV@27MHZ
C230
EV@10p/50V_4
PROJECT : ZRQ
Size
Document Number
Date:
close to balls one by one ball
1
2
3
Rev
3A
DGPU 3/5 (Display)
4
5
6
7
Sheet
18
of
8
47
1
2
3
N14P-GT
4.99K
10K
15K
20K
24.9K
30.1K
34.8K
45.3K
U39E
[MIOA]
A
A.ROM_SI - MEMORY STRAP
B.ROM_SO - 5K pull high
D.STRAP 0 - 45k pull high
E.STRAP 1 - 5K pull down
F.STRAP 3 - 5k pull down
1000
1001
1010
1011
1100
1101
1110
1111
C.For N14P-GV2 sku
N14P-GV2 QS device ID=0x1292
1.ROM_SCLK =5K pull high
2.STRAP2= 15k pull down
3.STRAP4=45 pull down
//For N14P-GV2 QS
[MIOB]
[email protected]_4
[email protected]_4
FB_0
SMB_ALT_ADDR
VGA_DEVICE
1000
PCI_DEVIDE[4]
SUB_VENDOR
PCI_DEVID[5]
PEX_PLL_EN_TERM
0010
ROM_SI
RAMCFG[3]
RAMCFG[2]
RAMCFG[1]
RAMCFG[0]
XXXX
STRAP0
USER[3]
USER[2]
USER[1]
USER[0]
1111
STRAP1
3GIO_PADCFG[3]
3GIO_PADCFG[2]
3GIO_PADCFG[1]
3GIO_PADCFG[0]
0000
STRAP2
PCI_DEVID[3]
PCI_DEVID[2]
PCI_DEVID[1]
PCI_DEVID[0]
0100
STRAP3
SOR3_EXPOSED
SOR2_EXPOSED
SOR1_EXPOSED
SOR0_EXPOSED
0000
STRAP4
RESERVED
R7
R6
DGPU_EDIDCLK R2
DGPU_EDIDDATA R3
T4
T3
GFx_SCL
GFx_SDA
K4
K3
R164
R198
ROM_SI
ROM_SO
ROM_SCLK
R213
R163
R199
EV@10K/F_4
*EV@10K/F_4
*EV@15K/F_4
EV@10K/F_4
GPIO8_OVERT#
R668
EV@10K/F_4
JTAG_TMS
R616
*EV@10K/F_4
JTAG_TDI
R609
*EV@10K/F_4
GPIO12_ACIN
R666
EV@10K/F_4
GPIO9_ALERT#
R667
EV@10K/F_4
JTAG_TCK
R631
*EV@10K/F_4
JTAG_TRST#
R622
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
R3
R674
J2
J7
J6
J5
J3
J1
JTAG_TCK
JTAG_TMS [MISC_GPIO/I2C/JTAG/THER]
JTAG_TDI
JTAG_TDO
JTAG_TRST_N
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
I2CB_SCL
I2CB_SDA
I2CC_SCL
I2CC_SDA
I2CS_SCL
I2CS_SDA
THERMDP
THERMDN
[MISC2_ROM]
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
ROM_SCLK
ROM_CS_N
ROM_SI
ROM_SO
P6
M3
L6
P5
P7
L7
M7
N8
M1
M2
L1
M5
N3
M4
N4
P2
R8
M6
R1
P3
P4
P1
1
3 R225
MEM_VDD_CTL
LCD_BL_PWM
LCD_VCC
LCD_BLEN
RSVD
*EV@SHORT_4
EC_FB_CLAMP
17,20,33
MULTISTRAP_REF_GND
BUFRST_N
R226
3DVision
GPIO8_OVERT#
GPIO9_ALERT#
3
R227
FB_CLAMP_REQ#
Q26
EV@2N7002K
EV@10K/F_4
VGPU_PWMVID
40
GPIO12_ACIN
VGPU_PSI
VGPU_PSI
40
HPD_A
HPD_C
+3V_GFX
FRM_LCK
HPD_D
PSI stuff 10k at GPU side ready, remove power
HPD_E
HPD_B OR HPD_F
RSVD
RSVD
GPIO20/21 available on N14P-GV2
1
+3V_GFX
2
R248
EV@0_4
L_45.3K
L_15K
L_4.99K
L_45.3K
H_10K
L_10K
L_10K
L_10K
L_10K
H_4.99K
L_15K
H_45.3K
L_4.99K
L_24.9K
L_4.99K
L_45.3K
R218
R223
R221
R684
*EV@10K/F_4
R673
R211
R224
R222
R671
*EV@10K/F_4
EV@15K/F_4
Hynix
P/N
Mfr. P/N
AKG5MWUTW13
Samsung
ROM_SI
H5GQ2H24AFR-T2C
0100
K4G20325FD-FC04
0101
H4
H6
H5
H7
ROM_SCLK
R178
ROM_SI
ROM_SO
EV@10K_4
PEGX_RST#
C
page of pu 10k
+3V_GFX
+3V_GFX
R265
Q31
R266
EV@10K/F_4
EV@10K/F_4
L2
R670
L3
*EV@10K_4
dGPU_OPP# = EC control
1
GPIO12_ACIN
CEC is NC for GK107
3
3
dGPU_ALT#
R232
*EV@0_4
R231
8,33
3
2ND_MBCLK
33
Q63
EV@2N7002K
8,33
GPIO12 AC detect
AC high
DC low
4
GFx_SCL
2
2ND_MBDATA
6
1
GFx_SDA
EC/S5
D
VGA/VGA
EV@2N7002DW
2
4
33
1
Q25
EV@2N7002K
dGPU_ALT# = EC control
16
dGPU_OPP#
EV@0_4
GPU_THAL#
40
PROJECT : ZRQ
RSVD VGPU TALERT#
to throttle GPU power
*EV@MC74VHC1G08DFT2G
Size
PEGX_RST#
2
Document Number
Rev
3A
DGPU 4/5 (MIO/GPIO)
Date:
1
A
33
Vendor
3
GPIO9_ALERT#
33
EV@2N7002K
*EV@0_4
N14P_GT
R672
SMBus(VGA)
GPIO9 for ADPS circuit to infrom EC
NV dGPU VPS Alert
dGPU_OTP# = EC control
R249
H_45.3K
H_10K
R795
1
FB_CLAMP_REQ#_R
EV@N14P
dGPU_OTP#
H_4.99K
L_10K
EV@10K/F_4
*EV@0_4
+3V_GFX
+3V_GFX
2
3
L_10K
+3V
Q24
*EV@2N7002K
U43
1
H_4.99K
L_10K
STRAP4
5
CEC
Q29
L_10K
N14P_GE
STRAP3
EV@10K/F_4
GPIO12 HW throttle
over power protect
D
GPIO8 VGA thrmtrip# => inform EC
over temperature protect
N14P_GV
STRAP2
EV@0_4
2
NC
STRAP1
5
40.2K
N14M-GE/GL
STRAP0
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
+3V_GFX
N14x others
GPIO8_OVERT#
0111
ROM_SCLK
+3V_GFX
R3
+3V_GFX
DP_PLL_VDD33
ROM_SO
R214
R669
2
AM10
AP11
AM11
AP12
AN11
N13P_SCL
N13P_SDA
PCIE_MAX SPEED
ROM_SI
B
C
R685
R665
FB_1
ROM_SCLK
PCIE_SPEED_CHANGE_GEN3
8
19
ROM_SO
2
[email protected]_4
[email protected]_4
7
Logical
Strapping Bit0
+3V_GFX
VGPU_PSI
FB_CLAMP_MON
R180
R181
Logical
Strapping Bit1
+3V_GFX
R228
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#
6
Logical
Strapping Bit2
Resistor P/N
4.99K---> CS24992FB26
10K ---> CS31002FB26
15K ---> CS31502FB24
20K ---> CS32002FB29
24.9K---> CS32492FB16
30.1K---> CS33012FB18
34.8K---> CS33482FB22
45.3K---> CS34532FB18
N14P-GV2 ES device ID=0x12AD
1.ROM_SCLK =15K pull down
2.STRAP2= 30k pull high
3.STRAP4=10K pull down
//For N14P-GV2 ES
TP83
0000
0001
0010
0011
0100
0101
0110
0111
5
Logical
Strapping Bit3
STRAP3
Optimus ---> 4.99k PD
Discrete only ---> 15K PD
C1.For N14P-GT sku
N14P-GT device ID=0x0FE4
1.ROM_SCLK =15K pull down
2.STRAP2 =25K pull down
3.STRAP4 = 45k Pull down
B
4
Logical Strap Bit Mapping
PU-VDD
PD
N14P-GV2
3
4
5
6
7
Sheet
8
19
of
47
1
2
3
4
5
6
7
8
U39G
for meet Power down sequence
for +3V_GFX
D14
+VGACORE
EV@RB500V-40
+3V_GFX
+1.5V_GFX
D13
*EV@RB500V-40
GND_OPT_1
No stuff when GC6 support.
GND_OPT_2
LAYOUT NOTES:
UNDAER: WITHIN 150MILS
NEAR: WITHIN 1378MILS
A
PLACE UNDER GPU BALLS
+VGACORE
C127
C150
C122
C105
C151
C152
C93
C111
4.7uF x 15 population x10
C125
C138
C180
C200
C160
C101
C124
PLACE NEAR GPU
+VGACORE
47u x1
C154
+
C637
EV@330u/2V_7343
C139
22u x7
stuff x 1
4.7u x6
stuff x 5
C156
EV@47u/6.3V_8
C97
C144
C106
C92
EV@22u/6.3V_8
B
330u x1
RSVD by DG
0817 RSVD more NVVDD caps by NV DG
C186
C219
*EV@22u/6.3V_8
C91
C179
*EV@22u/6.3V_8
*EV@22u/6.3V_8
C214
*EV@22u/6.3V_8
C199
C113
*EV@22u/6.3V_8
*EV@22u/6.3V_8
+3V_GFX
DGPU_PGOK-1
+1.05V_GFX
R85
[email protected]_4
+3V
2
DGPU_POK4
C64
*EV@1000p/50V_4
R84
[email protected]_4
Q12
EV@MMBT3904-7-F
R82
[email protected]_4
DGPU_POK_Q
+1.5V_GFX
R86
[email protected]_4
2
DGPU_POK2
C65
*EV@1000p/50V_4
DGPU_PWROK
10
R83
EV@100K/F_4
2
R72
*EV@0_4
Q13
EV@MMBT3904-7-F
C
3
EV@N14P
C
C51
EV@1000p/50V_4
1
U1
U2
U3
U4
U5
U6
U7
U8
V1
V2
V3
V4
V5
V6
V7
V8
W2
W3
W4
W5
W7
W8
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8
N14P-GT
C116
C117
C140
C102
C136
C137
C126
C114
Q11
EV@DTC144EU
PWRGD connect to PCH
HWPG_1.5VGFX for DDR=1.5V
+3V_GFX
C16
+3V
W32
R156
[email protected]_4
EV@N14P
R142
EV@10K_4
+3V
HWPG_1.5VGFX
3
B
XVDD_001
XVDD_002
XVDD_003
XVDD_004
XVDD_005
XVDD_006
XVDD_007
XVDD_008
XVDD_009
XVDD_010
XVDD_011
XVDD_012
XVDD_013
XVDD_014
XVDD_015
XVDD_016
XVDD_017
XVDD_018
XVDD_019
XVDD_020
XVDD_021
XVDD_022
XVDD_023
XVDD_024
XVDD_025
XVDD_026
XVDD_027
XVDD_028
XVDD_029
XVDD_030
XVDD_031
XVDD_032
XVDD_033
XVDD_034
XVDD_035
XVDD_036
XVDD_037
XVDD_038
[GPU VDD]
D2
D31
D33
E10
E22
E25
E5
E7
F28
F7
G10
G13
G16
G19
G2
G22
G25
G28
G3
G30
G32
G33
G5
G7
K2
K28
K30
K32
K33
K5
K7
M13
M15
M17
M18
M20
M22
N12
N14
N16
N19
N2
N21
N23
N28
N30
N32
N33
N5
N7
P13
P15
P17
P18
P20
P22
R12
R14
R16
R19
R21
R23
T13
T15
T17
T18
T2
T20
T22
AG11
T28
T32
T5
T7
U12
U14
U16
U19
U21
U23
V12
V14
V16
V19
V21
V23
W13
W15
W17
W18
W20
W22
W28
Y12
Y14
Y16
Y19
Y21
Y23
AH11
3
A
VDD_001
VDD_002
VDD_003
VDD_004
VDD_005
VDD_006
VDD_007
VDD_008
VDD_009
VDD_010
VDD_011
VDD_012
VDD_013
VDD_014
VDD_015
VDD_016
VDD_017
VDD_018
VDD_019
VDD_020
VDD_021
VDD_022
VDD_023
VDD_024
VDD_025
VDD_026
VDD_027
VDD_028
VDD_029
VDD_030
VDD_031
VDD_032
VDD_033
VDD_034
VDD_035
VDD_036
VDD_037
VDD_038
VDD_039
VDD_040
VDD_041
VDD_042
VDD_043
VDD_044
VDD_045
VDD_046
VDD_047
VDD_048
VDD_049
VDD_050
VDD_051
VDD_052
VDD_053
VDD_054
VDD_055
VDD_056
VDD_057
VDD_058
VDD_059
VDD_060
VDD_061
VDD_062
VDD_063
VDD_064
VDD_065
VDD_066
VDD_067
VDD_068
VDD_069
VDD_070
VDD_071
VDD_072
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
GND_194
GND_195
GND_196
GND_197
GND_198
GND_199
GND_200
[GPU GND]
1
U39F
AA12
AA14
AA16
AA19
AA21
AA23
AB13
AB15
AB17
AB18
AB20
AB22
AC12
AC14
AC16
AC19
AC21
AC23
M12
M14
M16
M19
M21
M23
N13
N15
N17
N18
N20
N22
P12
P14
P16
P19
P21
P23
R13
R15
R17
R18
R20
R22
T12
T14
T16
T19
T21
T23
U13
U15
U17
U18
U20
U22
V13
V15
V17
V18
V20
V22
W12
W14
W16
W19
W21
W23
Y13
Y15
Y18
Y17
Y20
Y22
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
GND_100
3
+VGACORE
1
A2
AA17
AA18
AA20
AA22
AB12
AB14
AB16
AB19
AB2
AB21
A33
AB23
AB28
AB30
AB32
AB5
AB7
AC13
AC15
AC17
AC18
AA13
AC20
AC22
AE2
AE28
AE30
AE32
AE33
AE5
AE7
AH10
AA15
AH13
AH16
AH19
AH2
AH22
AH24
AH28
AH29
AH30
AH32
AH33
AH5
AH7
AJ7
AK10
AK7
AL12
AL14
AL15
AL17
AL18
AL2
AL20
AL21
AL23
AL24
AL26
AL28
AL30
AL32
AL33
AL5
AM13
AM16
AM19
AM22
AM25
AN1
AN10
AN13
AN16
AN19
AN22
AN25
AN30
AN34
AN4
AN7
AP2
AP33
B1
B10
B22
B25
B28
B31
B34
B4
B7
C10
C13
C19
C22
C25
C28
C7
+3V
2
DGPU_POK_Q
R155
EV@100K/F_4
C157
EV@1000p/50V_4
GC6 need system 3V to control FBVDDQ
5
PU at VR
+1.05V_GFX enable,
PU at VR
1.05V_GFX_EN
1
U36
41
41
EC_FB_CLAMP
4
FBVDDQ_EN
1
EV@MC74VHC1G08DFT2G
R527
EV@100K_4
U35
3
VGPU_PWRGD
PD at GPU
2
4
VGPU_PWRGD_R
PU at VR
17,19,33
R552
EV@0_4
VGPU_PWRGD
R554
*EV@0_4
VGPU_EN
EV@SN74AHC1G32DCKR
C571
40
8,40
PROJECT : ZRQ
PU at VR
Size
R548
Document Number
*EV@0_4
Rev
3A
DGPU 5/5 (Power/Ground)
Date:
1
D
PD at VR
2
HWPG_1.5VGFX
3
41
Q22
EV@DTC144EUA
10/15 reserve
5
C568
1
C559
D
2
3
4
5
6
7
Sheet
20
8
of
47
5
4
17
17
17
17
3
VMA_DQ[63..0]
VMA_DM[7..0]
VMA_WDQS[7..0]
VMA_RDQS[7..0]
VRAM6
D
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
17
17
17
FBA_CMD12
FBA_CMD27
FBA_CMD26
17
17
17
C
17
17
17
17
17
17
VMA_CLK0
VMA_CLK0#
FBA_CMD3
FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13
FBA_CMD5
VREFC_VMA1
VREFD_VMA1
M8
H1
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
FBA_CMD12
FBA_CMD27
FBA_CMD26
M2
N8
M3
VMA_CLK0
VMA_CLK0#
FBA_CMD3
J7
K7
K9
FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13
K1
L2
J3
K3
L3
VMA_WDQS0
VMA_RDQS0
F3
G3
VMA_DM0
VMA_DM1
E7
D3
VMA_WDQS1
VMA_RDQS1
C7
B7
FBA_CMD5
T2
L8
VMA_ZQ1
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU
RESET
ZQ
R67
EV@243/F_4
J1
L1
J9
L9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
Should be 240
Ohms +-1%
B
VRAM10
VREFCA
VREFDQ
NC#J1
NC#L1
NC#J9
NC#L9
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
F7
F2
F8
H3
H8
G2
H7
VMA_DQ2
VMA_DQ7
VMA_DQ1
VMA_DQ4
VMA_DQ3
VMA_DQ6
VMA_DQ0
VMA_DQ5
D7
C3
C8
C2
A7
A2
B8
A3
VMA_DQ8
VMA_DQ12
VMA_DQ11
VMA_DQ14
VMA_DQ9
VMA_DQ13
VMA_DQ10
VMA_DQ15
VREFC_VMA1
VREFD_VMA1
M8
H1
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
FBA_CMD12
FBA_CMD27
FBA_CMD26
M2
N8
M3
VMA_CLK0
VMA_CLK0#
FBA_CMD3
J7
K7
K9
A1
A8
C1
C9
D2
E9
F1
H2
H9
FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13
K1
L2
J3
K3
L3
VMA_WDQS2
VMA_RDQS2
F3
G3
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VMA_DM2
VMA_DM3
E7
D3
VMA_WDQS3
VMA_RDQS3
C7
B7
FBA_CMD5
T2
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_GFX
BA0
BA1
BA2
ODT
CS
RAS
CAS
WE
DML
DMU
DQSU
DQSU
RESET
ZQ
R469
EV@243/F_4
NC#J1
NC#L1
NC#J9
NC#L9
VMA_DQ30
VMA_DQ24
VMA_DQ28
VMA_DQ25
VMA_DQ29
VMA_DQ27
VMA_DQ31
VMA_DQ26
B2
D9
G7
K2
K8
N1
N9
R1
R9
17
17
17
+1.5V_GFX
A1
A8
C1
C9
D2
E9
F1
H2
H9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
DQSL
DQSL
VMA_DQ20
VMA_DQ16
VMA_DQ21
VMA_DQ18
VMA_DQ23
VMA_DQ17
VMA_DQ22
VMA_DQ19
D7
C3
C8
C2
A7
A2
B8
A3
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
CK
CK
CKE
J1
L1
J9
L9
E3
F7
F2
F8
H3
H8
G2
H7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
Should be 240
Ohms +-1%
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
VRAM5
VREFCA
VREFDQ
L8
VMA_ZQ2
B1
B9
D1
D8
E2
E8
F9
G1
G9
21
CHANNEL A: 1024MB DDR3X16
17
17
VMA_CLK1
VMA_CLK1#
FBA_CMD19
FBA_CMD18
FBA_CMD16
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
M8
H1
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
FBA_CMD12
FBA_CMD27
FBA_CMD26
M2
N8
M3
VMA_CLK1
VMA_CLK1#
FBA_CMD19
J7
K7
K9
FBA_CMD18
FBA_CMD16
FBA_CMD30
FBA_CMD15
FBA_CMD13
K1
L2
J3
K3
L3
VMA_WDQS4
VMA_RDQS4
F3
G3
VMA_DM4
VMA_DM5
E7
D3
VMA_WDQS5
VMA_RDQS5
C7
B7
FBA_CMD5
T2
L8
VMA_ZQ3
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
+1.5V_GFX
VMA_CLK0
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU
RESET
ZQ
R465
EV@243/F_4
J1
L1
J9
L9
VRAM9
VREFCA
VREFDQ
Should be 240
Ohms +-1%
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
VREFC_VMA3
VREFD_VMA3
NC#J1
NC#L1
NC#J9
NC#L9
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
E3
F7
F2
F8
H3
H8
G2
H7
VMA_DQ36
VMA_DQ34
VMA_DQ38
VMA_DQ35
VMA_DQ39
VMA_DQ32
VMA_DQ37
VMA_DQ33
D7
C3
C8
C2
A7
A2
B8
A3
VMA_DQ47
VMA_DQ40
VMA_DQ46
VMA_DQ43
VMA_DQ45
VMA_DQ42
VMA_DQ44
VMA_DQ41
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
FBA_CMD12
FBA_CMD27
FBA_CMD26
M2
N8
M3
VMA_CLK1
VMA_CLK1#
FBA_CMD19
J7
K7
K9
A1
A8
C1
C9
D2
E9
F1
H2
H9
FBA_CMD18
FBA_CMD16
FBA_CMD30
FBA_CMD15
FBA_CMD13
K1
L2
J3
K3
L3
VMA_WDQS7
VMA_RDQS7
F3
G3
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VMA_DM7
VMA_DM6
E7
D3
VMA_WDQS6
VMA_RDQS6
C7
B7
FBA_CMD5
T2
+1.5V_GFX
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
M8
H1
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VREFC_VMA3
VREFD_VMA3
VMA_ZQ4
R5
17
FBA_CMD17
17
FBA_CMD1
FBA_CMD17
TP8
FBA_CMD1
TP7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU
RESET
L8
ZQ
Should be 240
Ohms +-1%
R505
EV@243/F_4
J1
L1
J9
L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
+1.5V_GFX
VREFCA
VREFDQ
NC#J1
NC#L1
NC#J9
NC#L9
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
F7
F2
F8
H3
H8
G2
H7
VMA_DQ61
VMA_DQ59
VMA_DQ63
VMA_DQ58
VMA_DQ60
VMA_DQ57
VMA_DQ62
VMA_DQ56
D7
C3
C8
C2
A7
A2
B8
A3
VMA_DQ55
VMA_DQ49
VMA_DQ54
VMA_DQ48
VMA_DQ52
VMA_DQ50
VMA_DQ53
VMA_DQ51
B2
D9
G7
K2
K8
N1
N9
R1
R9
D
+1.5V_GFX
A1
A8
C1
C9
D2
E9
F1
H2
H9
C
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
B
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
+1.5V_GFX
+1.5V_GFX
10/14 modify
R13
R12
R10
VMA_CLK1
R468
EV@162/F_4
VREFC_VMA1
VREFD_VMA1
R467
EV@162/F_4
VMA_CLK0#
Fermi : Change to 160 ohm
1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
VREFC_VMA3
VMA_CLK1#
C19
R6
R14
C9
R11
1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
VREFD_VMA3
C8
C7
R9
+1.5V_GFX
+1.5V_GFX
A
+1.5V_GFX
+1.5V_GFX
C520
C513
C508
C512
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
C16
C515
C516
C14
C23
C10
EV@10u/6.3V_6
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
A
EV@10u/6.3V_6
C503
C11
C510
C505
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
C502
EV@10u/6.3V_6
C5
EV@10u/6.3V_6
EV@10u/6.3V_6
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
C501
C13
C504
C6
C22
C15
C17
C511
C514
C509
C507
C12
C506
EV@10u/6.3V_6
+1.5V_GFX
C18
PROJECT : ZRQ
Size
Document Number
Rev
3A
NN13P-LP DDR3 VRAM 1/2
Date:
5
4
3
2
Sheet
1
21
of
47
5
4
17
17
17
17
3
VMC_DQ[63..0]
VMC_DM[7..0]
VMC_WDQS[7..0]
VMC_RDQS[7..0]
VRAM8
D
C
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14
17
17
17
FBC_CMD12
FBC_CMD27
FBC_CMD26
17
17
17
VMC_CLK0
VMC_CLK0#
FBC_CMD3
17
17
17
17
17
17
FBC_CMD2
FBC_CMD0
FBC_CMD30
FBC_CMD15
FBC_CMD13
FBC_CMD5
VREFC_VMC1
VREFD_VMC1
M8
H1
FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
FBC_CMD12
FBC_CMD27
FBC_CMD26
M2
N8
M3
VMC_CLK0
VMC_CLK0#
FBC_CMD3
J7
K7
K9
FBC_CMD2
FBC_CMD0
FBC_CMD30
FBC_CMD15
FBC_CMD13
K1
L2
J3
K3
L3
VMC_WDQS0
VMC_RDQS0
F3
G3
VMC_DM0
VMC_DM1
E7
D3
VMC_WDQS1
VMC_RDQS1
C7
B7
FBC_CMD5
T2
L8
VMC_ZQ1
VRAM12
VREFCA
VREFDQ
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
BA0
BA1
BA2
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
CK
CK
CKE
ODT
CS
RAS
CAS
WE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
DQSL
DQSL
DML
DMU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
DQSU
DQSU
RESET
ZQ
Should be 240
Ohms +-1%
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
R166
EV@243/F_4
J1
L1
J9
L9
B
NC#J1
NC#L1
NC#J9
NC#L9
E3
F7
F2
F8
H3
H8
G2
H7
VMC_DQ3
VMC_DQ4
VMC_DQ0
VMC_DQ6
VMC_DQ1
VMC_DQ7
VMC_DQ2
VMC_DQ5
D7
C3
C8
C2
A7
A2
B8
A3
VMC_DQ8
VMC_DQ12
VMC_DQ9
VMC_DQ14
VMC_DQ10
VMC_DQ13
VMC_DQ11
VMC_DQ15
VREFC_VMC1
VREFD_VMC1
M8
H1
FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
FBC_CMD12
FBC_CMD27
FBC_CMD26
M2
N8
M3
VMC_CLK0
VMC_CLK0#
FBC_CMD3
J7
K7
K9
A1
A8
C1
C9
D2
E9
F1
H2
H9
FBC_CMD2
FBC_CMD0
FBC_CMD30
FBC_CMD15
FBC_CMD13
K1
L2
J3
K3
L3
VMC_WDQS3
VMC_RDQS3
F3
G3
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VMC_DM3
VMC_DM2
E7
D3
VMC_WDQS2
VMC_RDQS2
C7
B7
FBC_CMD5
T2
B2
D9
G7
K2
K8
N1
N9
R1
R9
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5V_GFX
22
CHANNEL B: 1024MB DDR3X16
VMC_ZQ2
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU
RESET
L8
ZQ
Should be 240
Ohms +-1%
R620
EV@243/F_4
J1
L1
J9
L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
VRAM7
VREFCA
VREFDQ
NC#J1
NC#L1
NC#J9
NC#L9
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
E3
F7
F2
F8
H3
H8
G2
H7
VMC_DQ27
VMC_DQ31
VMC_DQ25
VMC_DQ28
VMC_DQ24
VMC_DQ30
VMC_DQ26
VMC_DQ29
D7
C3
C8
C2
A7
A2
B8
A3
VMC_DQ17
VMC_DQ22
VMC_DQ18
VMC_DQ23
VMC_DQ19
VMC_DQ21
VMC_DQ16
VMC_DQ20
B2
D9
G7
K2
K8
N1
N9
R1
R9
17
+1.5V_GFX 17
17
A1
A8
C1
C9
D2
E9
F1
H2
H9
17
17
VMC_CLK1
VMC_CLK1#
FBC_CMD19
FBC_CMD18
FBC_CMD16
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VREFC_VMC3
VREFD_VMC3
M8
H1
FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
FBC_CMD12
FBC_CMD27
FBC_CMD26
M2
N8
M3
VMC_CLK1
VMC_CLK1#
FBC_CMD19
J7
K7
K9
FBC_CMD18
FBC_CMD16
FBC_CMD30
FBC_CMD15
FBC_CMD13
K1
L2
J3
K3
L3
VMC_WDQS4
VMC_RDQS4
F3
G3
VMC_DM4
VMC_DM5
E7
D3
VMC_WDQS5
VMC_RDQS5
C7
B7
FBC_CMD5
T2
VMC_ZQ3
+1.5V_GFX
VMC_CLK0
BA0
BA1
BA2
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSL
DML
DMU
DQSU
DQSU
RESET
L8
ZQ
R546
EV@243/F_4
J1
L1
J9
L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
Should be 240
Ohms +-1%
B1
B9
D1
D8
E2
E8
F9
G1
G9
VRAM11
VREFCA
VREFDQ
NC#J1
NC#L1
NC#J9
NC#L9
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
E3
F7
F2
F8
H3
H8
G2
H7
VMC_DQ38
VMC_DQ32
VMC_DQ36
VMC_DQ35
VMC_DQ39
VMC_DQ34
VMC_DQ37
VMC_DQ33
VREFC_VMC3
VREFD_VMC3
M8
H1
FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
D7
C3
C8
C2
A7
A2
B8
A3
VMC_DQ44
VMC_DQ40
VMC_DQ46
VMC_DQ42
VMC_DQ45
VMC_DQ43
VMC_DQ47
VMC_DQ41
FBC_CMD12
FBC_CMD27
FBC_CMD26
M2
N8
M3
VMC_CLK1
VMC_CLK1#
FBC_CMD19
J7
K7
K9
A1
A8
C1
C9
D2
E9
F1
H2
H9
FBC_CMD18
FBC_CMD16
FBC_CMD30
FBC_CMD15
FBC_CMD13
K1
L2
J3
K3
L3
VMC_WDQS7
VMC_RDQS7
F3
G3
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VMC_DM7
VMC_DM6
E7
D3
VMC_WDQS6
VMC_RDQS6
C7
B7
FBC_CMD5
T2
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
VMC_ZQ4
R186
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
BA0
BA1
BA2
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
CK
CK
CKE
ODT
CS
RAS
CAS
WE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
DQSL
DQSL
DML
DMU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
DQSU
DQSU
RESET
ZQ
Should be 240
Ohms +-1%
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
R539
EV@243/F_4
J1
L1
J9
L9
NC#J1
NC#L1
NC#J9
NC#L9
E3
F7
F2
F8
H3
H8
G2
H7
VMC_DQ60
VMC_DQ57
VMC_DQ63
VMC_DQ58
VMC_DQ61
VMC_DQ59
VMC_DQ62
VMC_DQ56
D7
C3
C8
C2
A7
A2
B8
A3
VMC_DQ52
VMC_DQ49
VMC_DQ55
VMC_DQ51
VMC_DQ54
VMC_DQ50
VMC_DQ53
VMC_DQ48
B2
D9
G7
K2
K8
N1
N9
R1
R9
D
+1.5V_GFX
A1
A8
C1
C9
D2
E9
F1
H2
H9
C
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
B
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
+1.5V_GFX
VMC_CLK1
R632
EV@162/F_4
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
L8
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
+1.5V_GFX
R598
+1.5V_GFX
VREFCA
VREFDQ
+1.5V_GFX
R568
R526
R96
EV@162/F_4
VREFC_VMC1
VREFD_VMC1
VREFC_VMC3
VMC_CLK0#
VREFD_VMC3
VMC_CLK1#
1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
R615
C610
R170
1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
C195
R553
C585
C566
R530
+1.5V_GFX
A
C103
C620
+1.5V_GFX
C43
C606
C556
C550
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
A
EV@10u/6.3V_6
EV@10u/6.3V_6
C119
EV@1u/10V_4
C618
C129
C600
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
+1.5V_GFX
C613
C159
C149
C603
C42
C232
C614
C605
17
+1.5V_GFX
C611
C616
C211
C44
C146
C215
C222
C134
17
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
FBC_CMD17
FBC_CMD1
FBC_CMD17
TP14
FBC_CMD1
TP18
PROJECT : ZRQ
Size
Document Number
Rev
3A
N13P-LP DDR3 VRAM 2/2
Date:
5
4
3
2
Sheet
1
22
of
47
5
4
3
2
1
Mini DP ML (DPP)
R28
R29
Layout Notes:
Place near Pin13 and Pin14
INT_DPTX0P
INT_DPTX0N
2
2
DP2_TXN2
DP2_TXP2
9
9
USB3_TXN1
USB3_TXP1
C540
C61
C545
C535
C536
SW@10u/6.3V_6
C555
C554
0.1u/10V_4
0.1u/10V_4
DP_TXN2_C
DP_TXP2_C
48
47
C67
C66
USB3_TXN1_C
USB3_TXP1_C
44
43
C553
C552
0.1u/10V_4
0.1u/10V_4
DP_TXN3_C
DP_TXP3_C
46
45
D
*SHORT_4
INT_DPTX2N
INT_DPTX2P
B0P
B0N
A0P
A0N
C0P
C0N
2
3
INT_DPTX2N_R
INT_DPTX2P_R
R32
9
9
USB2_SEL
42
41
USB3_RXN1
USB3_RXP1
9
9
USB3_SEL
R87
R88
USBP0+
USBP0-
SW@0_4
SW@0_4
USB3_SEL
7
CONFIG_1P
CONFIG_2P
35
36
USBP0+_R
USBP0-_R
37
38
12
USB2_SEL
Q54
R484
A1P
A1N
5
6
INT_DPTX3N_R
INT_DPTX3P_R
10
11
CONFIG_2CNN
CONFIG_1CNN
15
16
DP_HPD_C
18
DP_AUXN_R
R483
SS_SEL_IN SS_SEL
ADM
ADP
BDP
BDM
HS_SEL_IN HS_SEL
AUX_N
*SW@10K_4
SW@10K_4
SW@0_4
R504
SW@0_4
21
22
23
DP_HPD_OUT
17
TP5
USB3_MUX_DIS
2
DP_HPD_Q
DP_HPD
*SHORT_4
R496
SW@10K_4
R52
SW@100K_4
DP_AUXN
CONFIG_2
CONFIG_1
CHRG_OFF
CHRG_DELAY
SLEEP
CONFIG_1_PU
CONFIG_2_PU
SYS_COM_REQ
19
20
USB2_SEL
USB3_SEL
28
29
CONFIG_2P
CONFIG_1P
26
27
CONFIG_PU
Dongle_POWEREN#
25
SYS_LB_REQ
Connect to HS_SEL_IN(pin12)
Connect to SS_SEL_IN(pin7)
R512
R519
+3V
Q52
SW@AO3409
2
CONFIG_PU
Q53
SW@AO3409
2
3
HS_SEL_OUT
SS_SEL_OUT
HS_OE#_OUT
SS_OE#_OUT
[email protected]_4
[email protected]_4
C
R71
SW@0_4
SYS_COM_REQ
8
HPD_OUT
PAD
56
55
54
51
50
49
24
57
SW@0_4
R522
100K_4
3
LB_CHARGE_OFF
LB_CHG_DELAY1#
HS_OE#_IN
SS_OE#_IN/NC
RST
TEST
GND
GND
GND
R78
R79
R65
R528
BSS138P
+3V
MODE_LED
HPD_IN
53
39
33
32
34
3
+3V
CDP
CDM
NC6
NC5
NC4
NC3
NC2
NC1
NC0
USB2_MUX_DIS
+3V
C
9
8
USB2_MUX_DIS
USB3_MUX_DIS
*SW@10K_4
SW@10K_4
1
INT_DPTX3N
INT_DPTX3P
C1P
C1N
For leakage from connector
*SHORT_4
2
B1P
B1N
CONFIG_PU
+3V
R76
R77
+5V
*SHORT_4
1
DP2_TXN3
DP2_TXP3
+3V
*SW@10K_4
SW@10K_4
R33
1
+3V
R509
R502
U13
1
2
2
*SW@10K_4
SW@10K_4
SW@0_6
C551
DP_HPD_C
SEL/OE# polarity Control
R510
R503
R80
C33
INT_DPTX1P
INT_DPTX1N
*SHORT_4
*SHORT_4
23
+3V
+3V_DPSWITCH
C34
2
*SHORT_4
*SHORT_4
52
40
4
1
0.1u/10V_4 INT_DPTX1P_R
0.1u/10V_4 INT_DPTX1N_R
C31
C32
DP2_TXP1
DP2_TXN1
R26
R27
VCC
VCC
VCC/NC
VCC/NC
2
2
0.1u/10V_4 INT_DPTX0P_R
0.1u/10V_4 INT_DPTX0N_R
VCC
VCC
D
C29
C30
DP2_TXP0
DP2_TXN0
14
13
2
2
30
31
R75
SW@47K_4
+3V
TP6
C60
SW@2200p/50V_4
SW@(X)HD3SS2521_NB
+5V
R119
DP_TXP2_C
DP_TXN2_C
R516
R517
NSW@0_4 DP_TXP2_CR
NSW@0_4 DP_TXN2_CR
R499
R500
NSW@0_4
NSW@0_4
INT_DPTX2P_R
INT_DPTX2N_R
DP_TXP3_C
DP_TXN3_C
R514
R515
NSW@0_4 DP_TXP3_CR
NSW@0_4 DP_TXN3_CR
R497
R498
NSW@0_4
NSW@0_4
INT_DPTX3P_R
INT_DPTX3N_R
Q15
5
SW@10K_4
3
LB_PWR_RTN
+5V
4
1
CONFIG_1P
2
R116
CLK_SDATA
SW@0_4 6
1
USBP0-_R
C544
SW@2200p/50V_4 USBP0-_C C539
SW@2200p/50V_4 CONFIG_2CNN
USBP0+_R
C543
SW@2200p/50V_4 USBP0+_C C538
SW@2200p/50V_4 CONFIG_1CNN
4
D35
SW@SMAJ20A
SYS_COM_REQ
4
Q58
SW@FDMC4435BZ
2
8,13,14,15,32
5
R120
SW@1M_4
5
R92
SW@1M_4
Q61
SW@FDMC4435BZ
SW@2N7002DW
+3V
3
2
1
R117
SW@10K_4
R99
SW@100K/F_4
1
2
3
C94
SW@1u/6.3V_4
LB_PWR_RTN_M
+3V
Q17
5
SW@10K_4
R835
C189
[email protected]/J_4
R126
R108
SW@0_4 6
1
R494
NSW@0_4
CONFIG_2CNN
R491
[email protected]/J_4
DP_HPD_Q
R511
NSW@0_4
SW@100K/F_4
SW@2K/F_4
CONFIG_1CNN
U41
5
2
2
DP_HPD_C
1
SW@2N7002DW
LB_PWR_RTN
R46
NSW@1M_4
Q20
SW@ME2N7002K
1
R93
SW@100K/F_4
4
1
2
3
Dongle_POWEREN#
4
R140
SW@100K/F_4
3
Q16
SW@2N7002DW
1
4
CLK_SCLK
CONFIG_1P
B
R610
4
2
8,13,14,15,32
C609
R122
SW@20K_4
3
5
6
2
3
R118
SW@100K/F_4
5
CONFIG_2P
3
R113
B
SW@NL17SZ04DFT2G
LB_CHARGE_OFF
U16
SW@TC7SH08FU
+3V
DP_CAD
Behavior
LB_PWR_CNN
+5V
CN9
2
R854
DDPC_CTRLDAT
*0/J_4
4
3
R857
2
1
6
DP_AUXN
*0/J_4
R549
R538
10K_4
10K_4
+3V
DP_HPD
INT_DPTX0P
CONFIG_1CNN
INT_DPTX0N
CONFIG_2CNN
LB_PWR_CNN
DP_DDI_EN
DDPC_CTRLCLK
INT_DPTX1P
INT_DPTX3P
INT_DPTX1N
INT_DPTX3N
R816
2
Q57
5
NSW@0_4
2N7002DW
3
DP_AUXP
A
+3V
2
INT_DP_AUXDN
R532
*100K_4
C558
0.1u/10V_4
Q56
2N7002K
3
DP_AUXN_C 1
R524
100K_4
CONFIG_1P
4
6
1
2
DP_AUX_EN
2
Reserve by CRB
C549
R518
DP_AUXP_C 1
0.1u/10V_4
R537
1M_4
1
OUT 2
GND
SW@AP2331SA-7
IN
C738
0.1u/10V_4
C822
10u/6.3V_6
C823
0.1u/10V_4
C824
10u/6.3V_6
GND
HPD
LANE0_P
CONFIG1
LANE0_N
CONFIG2
GND
GND
LANE1_P
LANE3_P
LANE1_N
LANE3_N
GND
GND
LANE2_P
AUX_CH_P
LANE2_N
AUX_CH_N
GND
DP_PWR
D36
SW@SMAJ20A
R105
SW@100K_4
Q6
5
Dongle_POWEREN#
3
4
LB_PWR_RTN
4
2
Q59
SW@FDMC4435BZ
Q62
SW@FDMC4435BZ
6
1
SW@2N7002DW
LB_PWR_CNN_M
A
R123
SW@20K_4
+3V
SHELL1
SHELL2
SHELL3
SHELL4
21
22
23
24
R60
*SW@100K/F_4
R127
R144
SW@10K/F_4
SW@2K/F_4
mDP
2
LB_CHARGE_OFF
Q55
2N7002K
3
+3V
4
Q21
SW@ME2N7002K
30mil
500mA (Max.)
1
INT_DP_AUXDP
LB_PWR_RTN
LB_PWR_CNN
Q69
3
2N7002DW
2
INT_DPTX2P
DP_AUXP
INT_DPTX2N
DP_AUXN
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1
2
3
5
3
2
1
+5V
Q14
5
0/J_4
0/J_4
5
R859
R855
mDP connector
R531
NSW@100K_4
3
TMDS signal (DC couple)
2
High
1
DP signal (AC couple)
1
Low
2
DP AUX
*100K_4
PROJECT : ZRQ
Size
Document Number
Rev
3A
Mini DP/HD3SS2521
Date:
5
4
3
2
Sheet
1
23
of
47
eDP Power
5
6
4
3
0_4
R241
100K_4
IN
OUT
IN
GND
R233
R234
VIN
ON/OFF
GND
1
LCDVCC_1
R268
*SHORT_6 LCD_VIN
*SHORT_6
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
2
C264
C623
C636
C635
5
*0.1u/10V_4
*2.2u/6.3V_6
0.1u/10V_4
0.01u/16V_4
C265
22u/6.3V_8
33
2
Backlight Control
B
R244
10K_4
+5V
*TPL@SHORT_6 TP_PWR
*SHORT_4
0.1u/10V_4
*100K_4
EDP_TXP3
EDP_TXN3
2
C627
C628
0.1u/10V_4
0.1u/10V_4
EDP_TXP3_C
EDP_TXN3_C
0.1u/10V_4
0.1u/10V_4
EDP_TXP2_C
EDP_TXN2_C
EDP_TXP1_C
EDP_TXN1_C
EDP_TXP2
EDP_TXN2
2
2
EDP_TXP1
EDP_TXN1
C631
C632
0.1u/10V_4
0.1u/10V_4
2
2
EDP_TXP0
EDP_TXN0
C633
C634
0.1u/10V_4
0.1u/10V_4
R714
C640
C641
0.1u/10V_4
0.1u/10V_4
LID#
R715
31,33
EDP_TXP0_C
EDP_TXN0_C
100K_4
EDP_AUXP_C
EDP_AUXN_C
100K_4
USBP2+_R
USBP2-_R
USBP5+_R
USBP5-_R
TP_GND
3
1
RB500V-40
LVDS_BRIGHT
BL_ON
EDP_HPD
EDP_HPD
2
2
EDP_AUXP
EDP_AUXN
*0_4
EC_FPBACK#
9
9
CCD
33
R725
R724
USBP2+
USBP2-
*SHORT_4
*SHORT_4
1
Q27
DTC144EU
R235
*TPL@SHORT_6
1
4
*SHORT_6 CCD_PWR
R269
+3V
2
D16
2
Q30
2N7002DW
R229
C629
C630
2
2
LID#,EC intrnal PU
BL_ON
6
3
5
PCH_BLON
2
BL#
R712
C626
R713
2
2
eDP
+3V
R723
COLOR_ENG
PCH_BRIGHT
+3V
R267
10K_4
LCDVCC
LCDVCC
*SHORT_8
G5243AT11U
R246
100K_4
8
CN13
MP confirm 2 or 4 Lane
2
7
LCDVCC
U44
A
R251
6
eDP
1u/6.3V_4
PCH_VDDEN
4
+3V
C621
2
3
24
G_5
2
A
G_4
B
G_1
G_0
1
50398-04071-001
Reserve for GND noise
C
Touch Panel
9
9
R716
R711
USBP5+
USBP5-
C
*SHORT_4
*SHORT_4
TP_INT
Lid Switch (HSR)(move to USB/B)
10
GPIO8
Inform BIOS that it is touch panel or not
VIN
+3V
CCD_PWR
TP_PWR
C246
C247
C251
C250
C262
C263
4.7u/25V_8
1000p/50V_4
*10p/50V_4
1000p/50V_4
*TPL@10p/50V_4
TPL@1000p/50V_4
D
D
R243
*TPL@10K_4
2
Touch Panel interrupt
2
3
TP_INT_PCH
1
PROJECT : ZRQ
TP_INT
Size
Document Number
Q28
TPL@2N7002K
Date:
1
2
3
4
5
Rev
3A
CRT/LVDS/CAMERA/LID
6
7
Sheet
24
8
of
47
5
4
3
HDMI Cost Reduced level shift (HDM)
2
1
HDMI connector (HDM)
25
CN7
C523
C522
0.1u/10V_4
0.1u/10V_4
INT_HDMITX0N_C
INT_HDMITX0P_C
C528
C529
0.1u/10V_4
0.1u/10V_4
INT_HDMICLK+_C
INT_HDMICLK-_C
INT_HDMITX2N_C
INT_HDMITX1P_C
INT_HDMITX1N_C
INT_HDMITX0P_C
INT_HDMITX0N_C
INT_HDMICLK+_C
1
1
1
INT_HDMICLK-_C
R41
R42
R39
R40
470_4
470_4
470_4
470_4
470_4
+5V
HDMI_DDCCLK_MB
HDMI_DDCDATA_MB
Q49
3
3
2
R38
470_4
2
R37
470_4
2
R43
470_4
2
R44
2
Layout Notes:
Place decoupling CAPs close to Connector
1
INT_HDMICLK+
INT_HDMICLK-
INT_HDMITX1N_C
INT_HDMITX1P_C
INT_HDMITX2P_C
2
2
2
0.1u/10V_4
0.1u/10V_4
1
INT_HDMITX0N
INT_HDMITX0P
C527
C526
2
2
2
INT_HDMITX2N_C
INT_HDMITX2P_C
1
INT_HDMITX1N
INT_HDMITX1P
0.1u/10V_4
0.1u/10V_4
2
2
2
C525
C524
1
D
INT_HDMITX2N
INT_HDMITX2P
1
2
2
IN
OUT
GND
1
2
HDMI_MB_HP
C
*SHORT_4 HP_DET_CN
AP2331SA-7
2
C521
*220p/50V_4
2N7002K
D30
*14V/100p_4
D
23
21
RV5
*5V/0.2p_4
C28
C27
*1000p/50V_4
C
*1000p/50V_4
1
2
R62
*100K/F_4
20
22
ABA-HDM-022-P05
1
Q8
+3V
HDMI_5V
R45
SHELL1
D2+SHELL3
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0CK+
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP SHELL4
DET
SHELL2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
EMI (EMC)
+5V
D9
RB500V-40
+3V
+3V
INT_HDMITX2P_C
R478
2
R69
HDMI_DDCCLK_SW
*SHORT_4 HDMI_DDCCLK_COM
2
R70
2.2K_4
B
Q10
BSN20
1
R64
2.2K_4
3
+3V
*100/F_4
B
INT_HDMITX2N_C
HDMI_DDCCLK_MB
R63
1M_4
INT_HDMITX1P_C
Follow CRB 1.0 change to 2.2K
R479
+5V
*100/F_4
2
1
INT_HDMI_HPD
INT_HDMITX1N_C
HDMI_MB_HP
INT_HDMITX0P_C
R477
+3V
R53
20K_4
*100/F_4
2
D34
RB500V-40
+3V
3
Q7
2N7002K
1
+3V
HDMI-detect (HDM)
2
HDMI DDC (HDM)
INT_HDMITX0N_C
Q51
A
2
R513
HDMI_DDCDATA_SW
*SHORT_4 HDMI_DDCDATA_COM
2
R508
2.2K_4
1
INT_HDMICLK+_C
BSN20
3
R501
2.2K_4
R480
HDMI_DDCDATA_MB
*100/F_4
INT_HDMICLK-_C
A
Follow CRB 1.0 change to 2.2K
PROJECT : ZRQ
Size
Document Number
Rev
3A
HDMI (PS8101)
Date:
5
4
3
2
Sheet
1
25
of
47
1
2
3
4
5
8
MINI-CARD WLAN(MPC)
Q65
+3VPCU
Check LED signal. (active high or low)
H=5.2mm
+WL_VDD
CL_RST1#_WLAN
CL_DATA1_WLAN
CL_CLK1_WLAN
+WL_VDD
9
9
PCIE_TX3+_WLAN
PCIE_TX3-_WLAN
9
9
PCIE_RX3+_WLAN
PCIE_RX3-_WLAN
9
9
15
13
11
9
7
5
3
1
CLK_PCIE_WLANP
CLK_PCIE_WLANN
CLK_PCIE_WLAN_REQ#_R
PCIE_WAKE#_R
Reserved
Reserved
Reserved
Reserved
GND
+3.3Vaux
+3.3Vaux
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
UIM_C4
UIM_C8
+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND
GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#
LTS_AAA-PCI-092-P05
B
UIM_VPP
UIM_RESET
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V
GND
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
0_4
GND
A
R786
TP101
TP100
TP99
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
IOAC_WLANPWR#
R774
20120217 reserve R648 PU 100k.
+WL_VDD
26
20111122 change to PMOS
Low
Mini card +3V power enable
High
Mini card +3V power disable
*4.7K_4
+1.5V_MINI1_VDD
WLAN_OFF
WLAN#
WWAN#
A
33
+WL_VDD
TP98
+3V_WLAN
USBP3+
USBP3-
R749
*SHORT_8
9
9
C675
10u/6.3V_6
WLAN_CLK_SDATA
WLAN_CLK_SCLK
+1.5V_MINI1_VDD
+WL_VDD
RF_EN
33
+WL_VDD
R771
*0_4
R1 PLTRST#
R752
0_4
R2
R757
*0_4
R3
C665
0.1u/10V_4
C683
*0.1u/10V_4
C650
*0.1u/10V_4
20120221 add R1 for PLTRST#.
20120216 add R2/R3 un-stuff for iRST reserve.
IOAC_RST#
28,33
PCIERST#
28,33
+1.5V_MINI1_VDD
16
14
12
10
8
6
4
2
500mA for +1.5V
+1.5V
R323
*0_8
+1.5V_MINI1_VDD
C680
*1000p/50V_4
+WL_VDD
C668
*0.1u/10V_4
C653
*10u/6.3V_6
54
BT_POWERON
53
33
3
R740
*100K_4
33
CN18
AO3413
1
2
+3.3V: 1000mA
+3.3Vaux:330mA
+1.5V:500mA
B
LAYOUT NOTE:
CLOSE TO CONNECTOR
2011017 : stuff Q81 to enable wake function on WLAN for IOAC
check IOAC power rail can reduce Q81
20120105 Change power plant for leakage issue.
mSATA(MNC)
LAYOUT NOTE:
CLOSE TO CONNECTOR
+3V
R452
*SHORT_8
rating = 1000mA @ 128G
Leakage circuit (MPC)
+3V_SATA
C496
10u/6.3V_6
C500
C499
0.1u/10V_4
0.1u/10V_4
R748
4.7K_4
Q66
S5
R743
4.7K_4
IOAC
5
8
SMB_PCH_DAT
4
8
SMB_PCH_CLK
1
3
WLAN_CLK_SDATA
2
+3V_SATA
H=4.95mm
C
+WL_VDD
+3V_S5
6
WLAN_CLK_SCLK
C
2N7002DW
CN27
Layout Notes:
8
8
SATA_TXP1_SSD
SATA_TXN1_SSD
8
8
SATA_RXN1_SSD
SATA_RXP1_SSD
C730
C734
0.01u/16V_4 SATA_TXP1_SSD_C
0.01u/16V_4 SATA_TXN1_SSD_C
C731
C732
0.01u/16V_4 SATA_RXN1_SSD_C
0.01u/16V_4 SATA_RXP1_SSD_C
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
D
Reserved
Reserved
Reserved
Reserved
GND
+3.3Vaux
+3.3Vaux
GND
GND
SATA_Tp0
SATA_Tn0
GND
GND
SATA_Rn0
SATA_Rp0
GND
UIM_C4
UIM_C8
GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#
+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND
53
LTS_AAA-PCI-092-P05
UIM_VPP
UIM_RESET
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V
GND
*0_4
*0_4 CLK_PCI_LPC_R
GND
R461
R460
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
20111117 change mose footprint to dual type.
20120105 Change power plant for leakage issue.
+3V_S5
R462
0_4
DEVSLP1
+WL_VDD
10
R313
4.7K_4
Q38
S0
5
4
9
3
R317
4.7K_4
IOAC
CLK_PCIE_WLAN_REQ#_R
PCIE_CLKREQ_WLAN#
33
WLAN_WAKE#
2
S5
R813
0_4
R812
*0_4
1
6
PCIE_WAKE#_R
Debug
A_LFRAME#_R
A_LAD3_R
A_LAD2_R
A_LAD1_R
A_LAD0_R
R459
R458
R457
R456
R455
*SHORT_4
*SHORT_4
*SHORT_4
*SHORT_4
*SHORT_4
7,28
LPC_LFRAME#
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
PCIE_LAN_WAKE#
8,27,33
8,27,33
8,27,33
8,27,33
8,27,33
2N7002DW
R316
*0_4
R314
*0_4
D
20111118 change mose footprint to dual type.
54
Debug
7,13,16,27,28,33
PLTRST#
9
CLK_PCI_LPC
PROJECT : ZRQ
Size
Document Number
Date:
modify 20111102
1
2
3
Rev
3A
Mini Card/mSATA
4
5
6
7
Sheet
26
of
8
47
1
2
MAIN SATA HDD (HDD)
TPM (TPM)
A
27
Layout Notes:
CN16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
SATA_TXP0_C
SATA_TXN0_C
C647
C646
0.01u/16V_4
0.01u/16V_4
SATA_RXN0_C
SATA_RXP0_C
C645
C644
0.01u/16V_4
0.01u/16V_4
R318
*0_4
A
SATA_TXP0
SATA_TXN0
8
8
SATA_RXN0
SATA_RXP0
8
8
DEVSLP0
CN23
7,33
7,13,16,26,28,33
10
+5V_HDD
R737
C315
C333
C329
C308
C311
*SHORT_8
R409
CLKRUN#
PLTRST#
+5V
+3V_S5
+3V
C651
*TPM@SHORT_4
C435
R450
R449
*TPM@SHORT_4
*TPM@SHORT_4
R448
C486
*TPM@SHORT_4PCLK_TPM_C
TPM@10p/50V_4
+
0.01u/16V_4
0.01u/16V_4
*0.1u/10V_4
*0.1u/10V_4
10u/6.3V_6
*100u/6.3V_3528
10,33
IRQ_SERIRQ
7
LPCPD#
8,26,33
LPC_LAD0
8,26,33
LPC_LAD1
8,26,33
LPC_LFRAME#
9
PCLK_TPM
1
19
B
SERIRQ_R
LPCPD#_R
SATA_HDD
8,26,33
8,26,33
LED(UIF)
LPC_LAD2
LPC_LAD3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
B
TPM@TPM_CONN
3/5VPCU reset switch (CLG)
+3VPCU
Power LED
33
PWRLED#
33
SUSLED#
+3V_S5 +3VPCU
SW8
Blue
R16
300_4
3
2
R17
680_4
4
1
LED5
TP104
SWITCH_1.5
2
4
3
1
5
C
POWER LED
C
SYS_SHDN#
TP105
Amber
R23
*1M_4
R30
*1M_4
10,35,39
1
+3V_S5
*1M_4
C729
D38
0.1u/10V_4
*14V/100p_4
2
*1M_4
R21
6
R20
+3VPCU
+3VPCU
Battery
Blue
D
D
33
BATLED0#
33
BATLED1#
R24
300_4
R31
680_4
3
2
4
LED6
1
BATTERY LED
PROJECT : ZRQ
Amber
Size
Document Number
Rev
3A
SATA-HDD/ TPM
Date:
1
2
3
Sheet
4
27
of
47
4
3
Q36
(1.5A) 60 mils
+3VPCU
High
AO3413
1
3
40 mils
R298
*SHORT_6
VDD33
R304
*SHORT_6
VDDREG
C740
33
12p/50_4
IOAC_LANPWR#
X'tal 25MHz
R301
*1M_4
VDD33
VDD33_18
R1
LAN_RESET
4
3
GND
2
1
Y8
25MHz_XTAL
LAN_XTAL2
VDD10
MDI1+
MDI1MDI2+
MDI2-
VDD10
MDI3+
MDI3-
VDD33
VDD33
CARD_3V3
29
R326
CARD_3V3
1
2
3
4
5
6
7
8
9
10
11
*SHORT_612
13
14
15
16
C735
MDIP0
MDIN0
AVDD10
MDIP1
MDIN1
MIDP2
MDIN2
AVDD10
MDIP3
MDIN3
AVDD33
DVDD33
Card_3V3
SD_D7/xD_RDY
SD_D6/MS_INS#/xD_RE#
SD_D5/xD_CE#
RTL8411BA-CG
0.1u/10V_4
SP5
SP6
SP7
SP8
SP9
SP10
29
29
SP12
SP13
0_4
L5
U6
3
TX0P_R
4
3 2
TX0N_R
1
2
*HCMC0805-371MFS/0.1A/370ohm
R19
0_4
10/31 modify
TP64
10K_4
R48
TP65
1
2
8
7
0_4
4
1
3
TX1P_R
4
3 2
TX1N_R
1
2
*HCMC0805-371MFS/0.1A/370ohm
R50
0_4
R488
6
5
3
4
(1.5A) 70 mils
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
REGOUT
VDDREG
VDDREG
ENSWREG_H
SDA/SPIDI
LED3/SPIDO
SCL/LED_CR
DVDD10
LANWAKEB
DVDD33
ISOLATEB
PERSTB
CLKREQB
SD_WP/MS_D1/xD_WP#
MS_BS/xD_CLE
VDD33/18
REGOUT
VDDREG
ENSWREG R311
SDA/SPIDI
LED3/SPIDO/EEDO
SCL/LED_CR_NC
LANWAKE#
R322
ISOLATEB
*SHORT_4
1
2
8
7
VDD33
TP67
TP66
TP68
VDD10
R472
R325
1K_4
*SHORT_6 VDD33
PCIE_REQ_LAN#
SP12
R324
VDD33/18
15K/F_4
0_4
SP5
SP6
SP7
SP8
SP9
SP10
R770
*0_4
R751
0_4
R756
*0_4
C336
C335
PCIE_RXN4_C
PCIE_RXP4_C
PLTRST#
7,13,16,26,27,33
IOAC_RST#
26,33
PCIERST#
3
2
TX2N_R
TX2P_R
4
3
1
2
*HCMC0805-371MFS/0.1A/370ohm
R471
0_4
6
5
3
4
TCT
MCT
TCT
MCT
TD+
MX+
TDMXTRANSFORMER
1
2
8
7
MCT2
L11
IOAC
0.1u/10V_4
0.1u/10V_4
LAN_WAKE#
0_4
R336
*0_4
Q39
*DTC144EU
1
3
R321
S0
6
5
3
4
3
RJ45-TX1+
4
3 2
RJ45-TX11
2
HCMC0805-371MFS/0.1A/370ohm
4
1
X-TX3N
X-TX3P
4
1
3
2
3
2
RJ45-TX3RJ45-TX3+
MCT3
1
2
8
7
MCT4
L28
4
1
X-TX2N
X-TX2P
4
1
3
2
3
2
RJ45-TX2RJ45-TX2+
R476
75_4
26,33
PCIE_RX4-_LAN
PCIE_RX4+_LAN
9
9
CLK_PCIE_LANN
CLK_PCIE_LANP
PCIE_TX4-_LAN
PCIE_TX4+_LAN
9
9
9
9
C530
C533
C518
C517
C36
C35
C25
C24
*6.8p/50V_4
*6.8p/50V_4
*6.8p/50V_4
*6.8p/50V_4
*6.8p/50V_4
*6.8p/50V_4
*6.8p/50V_4
*6.8p/50V_4
MDI3+
MDI3MDI2+
MDI2MDI1+
MDI1MDI0+
MDI0-
R482
75_4
R35
75_4
R22
75_4
D29
*B88069X9231T203
C
C21
220p/3KV_1808
Reserver for EMI
RJ45 CONNECTOR (LAN)
CN6
RJ45-TX0+
RJ45-TX0RJ45-TX1+
RJ45-TX2+
RJ45-TX2RJ45-TX1RJ45-TX3+
RJ45-TX3-
IOAC
R320
*1K_4
2
2
33
R333
4
1
X-TX1P
X-TX1N
C20
0.01u/16V_4
+3V
PCIE_LAN_WAKE#
RJ45-TX0+
RJ45-TX0-
L31
TD+
MX+
TDMXTCT
MCT
TCT
MCT
TRANSFORMER
VDD33
7,26
3
2
EVDD10
SP12
SP13
S5
3
2
D
TCT
MCT
TCT
MCT
TD+
MX+
TDMXTRANSFORMER
Layout Notes:
Place decoupling CAPs close to LAN Chip
B
4
1
MCT1
U31
L27
4
1
MDI2MDI2+
4
1
X-TX0P
X-TX0N
U32
3
TX3N_R
4
3 2
TX3P_R
1
2
*HCMC0805-371MFS/0.1A/370ohm
R486
0_4
+3V
6
5
3
4
0_4
L30
4
1
MDI3MDI3+
L9
TD+
MX+
TDMXTCT
MCT
TCT
MCT
TRANSFORMER
U7
L10
Power source mode:
Pin45 :Pull-up VDD33 for SWR mode
Pull-down for LDO mde
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
29
29
29
29
29
29
R18
4
1
MDI0+
MDI0-
TERM0
C
Transformer (LAN)
MDI1+
MDI1-
SD_D4/xD_WE#
SD_D1/MS_CLK/xD_D6
SD_D0/MS_D7/xD_D5
SD_CLK/MS_D3/xD_D4
SD_CMD/MS_D6/xD_D3
SD_D3/MS_D2/xD_D2
SD_D2/xD_D7
GND
HSIP
HSIN
REFCLK_P
REFCLK_N
EVDD10
HSOP
HSON
GND
MDI0+
MDI0-
VDD10
LED0/SPICSB
GPO_NC
R281
LED1/SPICLK/EESK
U21
65
DEPOP
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
LAN_XTALI
RTL8411BA-CG
POP
1
GDDR5
SP13
R295
*0_4 VDD33/18
VDD33
12p/50_4
RTL8411AAR
R295
10K_4
LAN_XTALI
LAN_XTAL2
VDD10
2.49K/F_4
R307
D
C284
R815
AVDD33
AVDD33
RSET
AVDD10
CKXTAL2
CKXTAL1
AVDD33
XD_CD#
MS_D0/xD_D1
MS_D4/xD_D0
SD_CD#/MS_D5/xD_ALE
VDD33/18
DVDD10
LED0/SPICSB
GPO
LED1/SPISCK
C278
Mfr PN
50 mils
2
R310
100K_4
1u/6.3V_4
2
*0_8
2
R296
+3V_S5
1
5
LAN/Card reader (LAN)
LANWAKE#
9
1
CLK_PCIE_LAN_REQ#
1
2
3
4
5
6
7
8
0+
01+
2+
213+
3-
R348
*10K_4
Q41
*2N7002K
3
9
10
11
12
GND
GND
GND
GND
B
RJ45
PCIE_REQ_LAN#
0_4
R344
0_4
SURGE (LAN)
201201009: CLKREQ use S0 power domain by FAE
U8
10 mils
10 mils
VDD33
Power-on Strapping
VDD33/18
C317
C312
4.7u/6.3V_6
0.1u/10V_4
VDD33_18
C1
C273
C2
VDD10
C280
R315
1.5K/F_4
*4.7u/6.3V_6
Place close to pin 33
0.1u/10V_4
VDDREG
VDD33
40 mils
8
7
6
5
U9
8
7
6
5
1
2
3
4
RJ45-TX1RJ45-TX1+
RJ45-TX0RJ45-TX0+
1
2
3
4
8
7
6
5
8
7
6
5
*UCLAMP2512T.TCT
4.7uH/680mA
(1.5A) 60 mils
C275
4.7u/6.3V_6
C274
0.1u/10V_4
Place close to pin 53
C1 and C2 only for RTL8411AAR,
RTL8411BAR remove.
A
1
2
3
4
*UCLAMP2512T.TCT
L22
REGOUT
SDA/SPIDI
1
2
3
4
MDI1MDI1+
MDI3MDI3+
U5
EVDD10
40 mils
(1.5A) 60 mils VDD10
U33
1
2
3
4
8
1
8 7
2
7 6
3
6 5
4
5
*UCLAMP2512T.TCT
MDI2+
MDI2MDI0MDI0+
Place Close pins-- 48
30 mils
1
2
3
4
8
1
8 7
2
7 6
3
6 5
4
5
*UCLAMP2512T.TCT
RJ45-TX3RJ45-TX3+
RJ45-TX2RJ45-TX2+
A
R338
*SHORT_6
C279
C287
0.1u/10V_4
C310
C285
0.1u/10V_4
0.1u/10V_4
C307
C306
0.1u/10V_4
4.7u/6.3V_6
C286
4.7u/6.3V_6
C291
0.1u/10V_4
0.1u/10V_4
C648
C305
0.1u/10V_4
0.1u/10V_4
C283
C281
0.1u/10V_4
C649
0.1u/10V_4
C332
0.1u/10V_4
C339
0.1u/10V_4
1u/6.3V_4
PROJECT : ZRQ
Size
Place Close to LAN chip, for VDD33 pins-- 11, 12, 39, 58, 63, 64
Place connect to Pin46/47
Place Close to LAN chip, for VDD33 pins-- 3, 8, 41, 52, 61
Close to Pin29
LAN-RTL8411/CARD READER
Date:
5
4
3
Document Number
2
Sheet
1
28
of
47
Rev
3A
A
B
C
D
SD/MMC CARD READER CONNECTOR (MMC)
SP12
SP13
*SHORT_4
*SHORT_4
*SHORT_4
*SHORT_4
*SHORT_4
*SHORT_4
R741
R283
*SHORT_4 SD_WP
*SHORT_4 SD_CD#
4
SD_CLK
CARD_3V3
SD_CMD
SD_DAT3
CARD_3V3
CARD_3V3
11
10
9
8
7
6
5
4
3
2
1
CARD/DET
W/P
DATA2
DATA1
DATA0
VSS2
CLK
VDD
VSS1
CMD
CD/DATA3
+1.05V_S5
+1.5V_GFX
C300
C301
C547
C541
*0.1u/10V_4
*1000p/50V_4
*0.1u/10V_4
*1000p/50V_4
4
*1000p/50V_4
SD-CARD
+VCCIN
EMI
+3V
C532
12
28
29
CN17
SD_CD#
SD_WP
SD_DAT2
SD_DAT1
SD_DAT0
GND
28
28
SD_DAT1
SD_DAT0
SD_CLK
SD_CMD
SD_DAT3
SD_DAT2
R736
R735
R734
R733
R328
R334
GND
SP5
SP6
SP7
SP8
SP9
SP10
Stitching cap (EMC)
13
28
28
28
28
28
28
E
10 mils
+V1.05M_VCCASW
+3V_S5
C59
C48
C615
C612
C252
C254
*0.1u/10V_4
*1000p/50V_4
*0.1u/10V_4
*1000p/50V_4
*0.1u/10V_4
*1000p/50V_4
+1.35V_SUS
+3VPCU
+WL_VDD
CARD_3V3
SD_DAT0
SD_CLK
Share Pin
SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14
SP15
SP16
C652
SD_D7
SD_D6
SD_D5
SD_D4
SD_D1
SD_D0
SD_CLK
SD_CMD
SD_D3
SD_D2
SD_WP
SD_CD#
MS_INS#
MS_CLK
MS_D7
MS_D3
MS_D6
MS_D2
MS_BS
MS_D1
MS_D5
MS_D4
MS_D0
xD_RDY
xD_RE#
xD_CE#
xD_WE#
xD_D6
xD_D5
xD_D4
xD_D3
xD_D2
xD_D7
xD_CLE
xD_WP#
xD_ALE
xD_D0
xD_D1
xD_CD#
C655
C654
C736
C330
C334
C328
C341
C348
*0.1u/10V_4
*1000p/50V_4
*0.1u/10V_4
*1000p/50V_4
*0.1u/10V_4
*1000p/50V_4
*4.7u/6.3V_6
10p/50V_4
Place close to connector
HOLE(OTH)
BATT Enable short pad
HOLE10
*HG-ZRQ-2
7
8
9
6
5
4
HOLE19
*H-TE236X236BC236D165P2
HOLE22
*h-te236x236bc236d158p2
3
3
2
1
6
5
4
1
2
3
HOLE25
*HG-ZRQ-1
7
8
9
1
2
3
HOLE24
*hg-c236d118p2
7
6
8
5
9
4
1
2
3
1
2
3
HOLE17
*hg-c236d118p2
7
6
8
5
9
4
1
2
3
HOLE8
*hg-c236d118p2
7
6
8
5
9
4
2
2
SW6
3
4
2
2
1
Lid Switch
BATT_EN#
1
2
3
6
5
4
HOLE13
*h-c217d138p2
PAD5
*spad-e858x1268
CPU BKT
HOLE16
*h-c197d138p2
HOLE5
*h-c150d150n
HOLE6
*h-c150d150n
HOLE7
*h-c150d150n
HOLE21
*h-tc197bc142d142p2
1
2
3
4
5
6
GPU BKT
34
HOLE14
*HG-C236D118P2
7
6
8
5
9
4
1
2
3
HOLE15
*hg-c236d118p2
7
6
8
5
9
4
HOLE26
*H-TC197BC142D142P2
1
1
1
1
1
1
1
1
1
2
3
HOLE18
*hg-c276d118p2
7
6
8
5
9
4
1
2
3
HOLE9
*hg-c276d118p2
7
6
8
5
9
4
HOLE12
*O-ZRQ-1
7
8
9
1
2
3
1
2
3
HOLE11
*hg-c236d118p2
7
6
8
5
9
4
1
2
3
HOLE20
*hg-c236d118p2
7
6
8
5
9
4
1
3
10u/6.3V_6
0.1u/10V_4
10p/50V_4
C359
C737
1
3
PROJECT : ZRQ
Size
Document Number
Rev
3A
CARD READER CONNECTOR
Date:
A
B
C
D
Sheet
E
29
of
47
5
4
3
2
R781
30
EAPD#
*10K_4
20120910: ALC3225 has a internal MOSFET
HP-L
HP
HP-R
COMBO MIC JD
R789
22K/F_4
MIC2-VREFO
C681
10u/6.3V_6
R777
*10K_4
C405
2.2u/6.3V_6
C397
C404
0.1u/10V_4
C406
*10u/6.3V_6
MIC2-VREFO
MIC2-R
C693
2.2u/6.3V_6
MIC2-L
C721
2.2u/6.3V_6
R788
2.2K_4
MIC2_MIC
ADOGND
Place next to pin 28
D
R794
1K_4
COMBO_MIC
ADOGND
C418
10u/6.3V_6
R791
22K/F_4
ADOGND
close to pin 27
D37
*14V/100p_4
2
+
+3VCPVDD
+1.5V
*SHORT_6
0_4
R356
+3V
*0_4
2.2u/6.3V_6
R811
ADOGND
R809
D
1
HEADPHONE/Mic combo (AMP)
+5VA
1
Codec (ADO)
+5VA
C392
C386
0.1u/10V_4
ANALOG
ADOGND
Combo Jack
ADOGND
+
48
49
DIGITAL
PVDD2
JDREF
SPDIFO/GPIO2
GND
1
Sense B
Sense A
R358
*SHORT_6
+3VDVDD
*SHORT_6
HPL_SYS
R433
*SHORT_6
HPR_SYS
SPK-2
R_SPK2
D24
*14V/100p_4
22
1
1
D26
*14V/100p_4
ADOGND ADOGND
19
18
MIC2-R
17
MIC2-L
Internal Speaker (AMP)
Combo MIC
15
R395
20K/F_4
close to pin 15
ADOGND
14
13
SENSEA
R394
Output Gain Table
+5V
Pin1 - Pin6: DGND
Pin7 - Pin12: AGND
Thermal Pad: DGND
16
R431
C466
0.1u/10V_4
*SHORT_6
+5V_AMP
C472
10u/6.3V_6
HPOUT_JD
39.2K/F_4
close to U5001
U29
ANALOG
ANALOG
PCBEEP dont coupling any signals if possible
8/17 separate PCBEEP to Digital from Realtek suggestion
R_SPK2
C476
1u/16V_6
R422
1K/F_6
C475
L_SPK2
C465
1u/16V_6
R411
1K/F_6
C471
1u/16V_6
1u/16V_6 BEEP_1
R389
47K_4
C431
BEEP_2
D20
RB500V-40
D19
RB500V-40
R390
4.7K_4
100p/50V_4
SPKR
9
7
EAPD#
1.6Vrms
C430
C390
10u/6.3V_6
1u/16V_6 10
INPUT-R
INPUT-L
PCBEEP_EC
R421
1.62K/F_6
33
C424
*100p/50V_4
OUT-RP
OUT-RN
OUT-LN
OUT-LP
ANALOG
R410
1.62K/F_6
8
BYP
+5VA
Place next to pin 1
PCH_AZ_CODEC_RST#
PCH_AZ_CODEC_SYNC
+3VDVDDIO
DMIC_DATA
DMIC
C410
ADOGND
8
8
R439
C399
R380
10u/6.3V_6
33_4
*22K/F_4
L_SPK2+
L_SPK2-
8
R440
R441
8
PCH_AZ_CODEC_SDOUT
8
0
11dB
NC
0
Gain (Differential)
14dB
NC
0
0
NC
19dB
0
0
NC
NC
25dB
G1
G2
C
+5VA
6
5
R_SPK2+
R_SPK2-
2
1
L_SPK2L_SPK2+
R407
*0_4
G1
G2
11
12
R1
R416
*0_4
R2
G1
G2
R412
0_4
DIGITAL
R3
R417
0_4
R4
R_SPK2R_SPK2+
R444
R445
Layout Note:
Place very close to U5001
CN26
40mil for each signal
*SHORT_6
*SHORT_6
22p/50V_4
PCH_AZ_CODEC_BITCLK
R4
0
NC
ADOGND
Layout Note:
Place very close to U5001
PCH_AZ_CODEC_SDIN0
R3
NC
0
ADOGND
R436
Place next to pin 9
ACZ_SDIN0_R
R2
NC
C480
2.2u/6.3V_6
*20K/F_4
*SHORT_6+3V
C415
0.1u/10V_4
DMIC_CLK
R385
R1
DIGITAL
PD#
8,10
ALC1001-CGT
B
ADOGND
ADOGND
20
close to pin 13
PCBEEP
7
SIT_2SJ3052-005111F
D28
*14V/100p_4
21
ALC3225
C401
10u/6.3V_6
2
5
6
2
23
2
L_SPK2
close to pin 7
C393
0.1u/10V_4
R415
HP-R-1
1
24
DIGITAL
+3V
HP-L-1
56_4
2
26
28
25
AVSS1
AVDD1
LDO1-CAP
29
27
VREF
MIC2-VREFO
30
31
MIC1-VREFO-L
MIC1-VREFO-R
32
33
CPVEE
HP-OUT-L
HP-OUT-R
36
35
MONO-OUT
Spilt by DGND
CBN
SPK-R+
PDB
56_4
R420
GND
47
PD#
COMBO MIC JD
R408
HP-R
13
0.1u/10V_4
HP-L
3
4
C369
10u/6.3V_6
10u/6.3V_6
PVDD1
PVDD2
C365
MIC2-L
PCBEEP
46
+5VPVDD2
SPK-R-
RESET#
45
MIC2-R
12
R_SPK+
MIC1-L
SPK-L-
SYNC
44
MIC1-R
SPK-L+
11
C353
10u/6.3V_6 0.1u/10V_4
R_SPK-
PVDD1
DVDD-IO
C364
*SHORT_6
43
SDATA-IN
R350
+5V
42
L_SPK-
9
L_SPK+
8
SPK-1
10
0.1u/10V_4
LINE1-R
LDO3-CAP
C370
10u/6.3V_6
0.1u/10V_4
4
3
1
HPOUT_JD
LINE1-L
BIT-CLK
C
C366
C428
ADOGND
LINE2-L
AVDD2
C423
LINE2-R
7
C354
10u/6.3V_6 0.1u/10V_4
ADOGND
LDO2-CAP
6
C355
41
*SHORT_6 +5VPVDD1
AVSS2
SDATA-OUT
R351
+5V
40
DVSS
39
GPIO1/DMIC-CLK
38
ANALOG
5
ADOGND
CBP
4
C381
10u/6.3V_6
GPIO0/DMIC-DATA
37
DVDD
C371
0.1u/10V_4
CPVDD
U28
DIGITAL
ADOGND
3
ADOGND
2
+1.5VAVDD2
C367
10u/6.3V_6
CN20
Layout Note:
Place close to Codec
34
2.2u/6.3V_6
R352
*SHORT_6
L_SPK+
L_SPK-
R442
R443
*SHORT_6
*SHORT_6
R_SPKR_SPK+
R446
R447
*SHORT_6
*SHORT_6
L_SPK+_2
L_SPK-_2
L_SPK+_1
L_SPK-_1
R_SPK-_2
R_SPK+_2
R_SPK-_1
R_SPK+_1
*SHORT_6
*SHORT_6
1
2
3
4
5
6
7
8
B
9
10
SPK CN
C493
C492
C489
C488
C495
*68p/50V_4 *68p/50V_4 *68p/50V_4 *68p/50V_4
C494
C491
C490
*68p/50V_4 *68p/50V_4 *68p/50V_4 *68p/50V_4
INT DMIC(AMP)
HCB2012KF220T60/6A/22ohm_8
+5VA
U30
3
IN
2
A
1
GND
SHDN
SET
*G923-330T1UF
C498
5
R435
C482
C685
*10u/6.3V_6
*0.1u/10V_4
*29.4K/F_4
R355
R346
R778
R790
C679
C733
*SHORT_4
*SHORT_4
*SHORT_4
*SHORT_4
*1000p/50V_4
*1000p/50V_4
+3V
Mute(ADO)
R418
*SHORT_6
CN22
R357
*10K_4
PD#
ADOGND
+3V_DMIC
4
3
62
51
AMIC
+3V
ADOGND
R438
*10K/F_4
*10u/6.3V_6
R782
*SHORT_4
0V : Power down Class D SPK amplifer
3.3V : Power up Class D SPK amplifer
D17
RB500V-40
D18
RB500V-40 PCH_AZ_CODEC_RST#
AMP_MUTE#
Tied at one point only under
the codec or near the codec
AMP_MUTE#
33
DMIC_DATA_R
R434
D27
C483
*14V/100p_4
*22p/50V_4
D25
C474
*14V/100p_4
*22p/50V_4
DMIC_CLK_R
*SHORT_4
DMIC_DATA
A
R432
*0_4
2
C497
*0.1u/10V_4
OUT
4
*0_4
R785
1
ANALOG
L26
*0_4
R808
*SHORT_4
DMIC_CLK
1
DIGITAL
+5V
R810
2
Power(ADO)
ADOGND
PROJECT : ZRQ
Size
C730, C787 close U37 pin3 and L65
Rev
3A
REALTEK ALC3225
Date:
5
Document Number
4
3
2
Sheet
1
30
of
47
5
4
3
2
1
+5VPCU
USB3.0
C26
Active High:
1st: AL007534001 (Promate)
2nd: AL000547006 (GMT)
3rd: AL002511002 (DDS)
1u/6.3V_4
4
1
USB_BC_EN
OUT3
OUT2
OUT1
EN#
GND
8
7
6
USBPWR1
CB
1
IN1
IN2
100u/6.3V_1206
UP7534ARA8-15
9
Funcion
0
X
DCP autodetect with mouse/keyboard wakeup
1
0
S0 charging with SDP only
1
1
S0 charging with CDP or SDP only (depending on external device)
1000p/50V_4
OC#
D
SELCDP
C37
C534
5
2
2
3
31
USB Charger to 3.0
U10
USB_OC0#
D
U12
R493
1
2
3
4
BC_CEN
USBP1-_C
USBP1+_C
*SHORT_4
USBP1-_C
USBP1+_C
USB 3.0 Connector
CEN
CB1
DM
TDM
DP
TDP
SELCDP VDD
Thermal Pad
R73
R74
8
7
6
5
9
C54
*SHORT_4
*0_4
USB_CHARGE_ON
33
MAINON
33,36,37,39
USBP19
USBP1+
9
0.1u/10V_4
SLG55584A
CN8
*SHORT_4
R56
*SHORT_4
USBP1-_R
USBP1+_R
USB3_RXN0
USB3_RXP0
USB3_RXN0
USB3_RXP0
USB3_RXN0_R
USB3_RXP0_R
R57
*SHORT_4
R58
*SHORT_4
USB3_TXN0_R
USB3_TXP0_R
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
R68
VBUS
DD+
GND
SSRXSSRX+
GND
SSTXSSTX+
10K_4
R507
R506
+5VPCU
*0_4
*0_4
0.1u/10V_4
0.1u/10V_4
USB3.0 CONN
R54
USBP1-_R
R59
C
*SHORT_4
USBP1+_R
USB3_RXN0_R
USB3_RXP0_R
USB3_TXN0_R
USB3_TXP0_R
D33
D32
D5
D6
D7
D8
1
2
1
2
1
2
1
2
1
2
1
2
+3VPCU
CEN:SLG55584A----pull up
SLG55584----pull low
USB3_TXN0_C
USB3_TXP0_C
47K_4
*5V/0.2p_4
C38
*0.1u/10V_4
5
C40
C41
USB3_TXN0
USB3_TXP0
2
BC_CEN
*5V/0.2p_4
C
4
*5V/0.2p_4
33
USB_BC_ON
*5V/0.2p_4
*5V/0.2p_4
USB_BC_EN
1
USB_BC_ON
U11
TC7SH08FU
3
9
9
13
12
11
10
13
12
11
10
9
9
R492
R36
*0_4
*5V/0.2p_4
USB2.0
I/O board
1st source: AL007534000
2ns source: AL082025000
+5V_S5
U18
2
3
4
1
USBON#
+5V_S5
U17
33
4
1
USBON#
C207
1u/6.3V_4
9
IN1
IN2
OUT3
OUT2
OUT1
EN#
GND
OC#
USBPWR2
C576
5
470p/50V_4
C581
0.1u/10V_4
OUT3
OUT2
OUT1
EN#
GND
8
7
6
USBPWR3
C239
0.1u/10V_4
OC#
C188
1u/6.3V_4
1
B
8
7
6
5
CN12
UP7534BRA8-15
C599
2
2
3
IN1
IN2
9
100u/6.3V_1206
USB_OC3#
USBP6-_R
USBP6+_R
UP7534BRA8-15
USB_OC2#
13,33
R90
CN11
1
2
3
4
*SHORT_4
D11
*5V/0.2p_4
VDD
DD+
GND1
NBSWON#
24,33
LID#
+3VPCU
GND6
GND5
GND7
GND8
6
5
1 13
2 14
3
4
5
6
7
8
9
10
11
12
B
13
14
USB/B CONN
7
8
R660
USB2.0 CONN
9
9
2
D10
*5V/0.2p_4
2
R89
1
USBP4-_CN
USBP4+_CN
USBP4USBP4+
1
9
9
*SHORT_4
1
2
3
4
5
6
7
8
9
10
11
12
*SHORT_4
USBP6-_R
USBP6+_R
USBP6USBP6+
R664
*SHORT_4
A
A
PROJECT : ZRQ
Size
Document Number
Rev
3A
INT&EXT USB
Date:
5
4
3
2
Sheet
1
31
of
47
4
CN24
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
D
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0
28
27
KB_CONN
3
7
5
3
1
CP8
7
5
3
1
CP9
7
5
3
1
CP5
7
5
3
1
CP10
7
5
3
1
CP6
7
5
3
1
CP7
8
6
4
2
*100p/50Vx4
8
6
4
2
*100p/50Vx4
8
6
4
2
*100p/50Vx4
8
6
4
2
*100p/50Vx4
8
6
4
2
*100p/50Vx4
8
6
4
2
*100p/50Vx4
MY17
MY16
MX2
MX3
C481
C479
*100p/50V_4
*100p/50V_4
MX1
MX0
TOUCHPAD BOARD CONN (TPD)
MX4
MX5
MX6
MX7
+3V
R430
*SHORT_4
+5V
R429
*0_4
MY0
MY1
MY2
MY3
R428
R427
10K_4
10K_4
+3V
L38
*SHORT_6
+5V
L37
*0_6
32
C727
0.1u/10V_4
MY4
MY5
MY6
MY7
R426
R425
TPCLK
TPDATA
R423
R424
CLK_SDATA
CLK_SCLK
2,10
*SHORT_4 CLK_SDATA_R
*SHORT_4 CLK_SCLK_R
TP_INT#_D
BOARD_ID2
LOW=ELAN
HIGH=SYNAPTICS
C477
*0.1u/10V_4
C478
*0.1u/10V_4
1
2
3
4
5
6
7
8
+TPVDD
TPCLK_R
TPDATA_R
*SHORT_4
*SHORT_4
8,13,14,15,23
8,13,14,15,23
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
D
CN21
50mil
33
33
9
10
TP CN
+3V
2
5
K/B (KBC)
8
3
SMBALERT#
1
Q42
*2N7002K
+3VPCU
C
MX6
MX7
MX5
MX4
RP5
10
9
8
7
6
10K_10P8R
1 MX3
2 MX2
3 MX1
4 MX0
5
C
CPU FAN1 (THM)
KB_BL LED (KBC)
+5V
+3V
+5V
+3V
B
B
R730
1K_4
+5V
R729
10K_4
+5V
1
33
Q44
KBL@AO3413
KBL@10K_4
10K_4
CN15
FANSIG
+5V_FAN1
1
FAN1_PWM
3
FAN_PWM_CN1
Q64
MMBT3904-7-F
4
3
2
1
6
5
CPU
FAN1
30mil
KB_BL_LED
2
Q43
KBL@DTC144EU
+5V_KB
C469
1
33
3
3
2
R732
*SHORT_8
2
33
C484
R437
R731
R419
*KBL@SHORT_4
CPU FAN2 (THM)
+5V_KB_R
C470
CN25
4
3
2
1
+5V
+3V
+5V
+3V
6
5
R475
EV@1K_4
KBL@KB_backlight
R474
R473
EV@10K_4
EV@10K_4
R470
*EV@SHORT_8
A
A
CN10
FAN2SIG
+5V_FAN2
2
33
33
1
FAN2_PWM
3
Q48
EV@MMBT3904-7-F
FAN_PWM_CN2
4
3
2
1
6
5
GPU
EV@FAN2
30mil
PROJECT : ZRQ
Size
Document Number
Rev
3A
KB/TP/FAN
Date:
5
4
3
2
Sheet
1
32
of
47
5
4
L25
BLM11A05S/0.2A/120ohm_6
3
+3VPCU
+A3VPCU
+3VPCU_ECPLL
C419
0.1u/10V_4
C344
ECAGND
2.2_6
2
(For PLL Power)
0.1u/10V_4
12 mils
+3V_RTC
12 mils
+3VPCU_EC
DNBSWON#
SB_ACDC
dGPU_OPP#
C380
dGPU_OPP#
C389
C383
C723
C346
C422
0.1u/10V_4
C345
S5_ON
+3VPCU_EC and +3V_RTC
minimum trace width 12mils.
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
+3V
R359
*SHORT_4
31,36,37,39
MAINON
26
BT_POWERON
5,7
EC_PWROK
32
KB_BL_LED
30
AMP_MUTE#
24
COLOR_ENG
TP69
7
DPWROK
R372
*22_4
7
C395
*10p/50V_4
28
19
8
8
8
8
Please do not place any
pull-up resistor
on GPG0, GPG2, and GPG6
(Reserved
hardware strapping).
FB_CLAMP_REQ#
30
PCBEEP_EC
TP72
7
PCH_PWROK
34
D/C#
E51_TXD
R406
*SHORT_4
HWPG
FB_CLAMP_REQ#
SLP_A#
105
101
102
103
PCH_SPI_CLK_EC
SPI_CS0#_UR_ME
PCH_SPI_SI_EC
PCH_SPI_SO_EC
27
56
57
32
32
MY16
32
MY17
BATLED1#
TP70
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
71
72
73
35
34
107
95
94
100
SSCE0#
EC_DRAMRST_CTRL 106
36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
SM BUS
PS/2
TACH0A/GPD6(Dn)
TACH1A/TMA1/GPD7(Dn)
TMRI0/WUI2/GPC4(Dn)
TMRI1/WUI3/GPC6(Dn)
PWRSW/GPE4(Up)
RI1#/WUI0/GPD0(Up)
RI2#/WUI1/GPD1(Up)
WAKE UP
RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7(Dn)
*10K_4
D
MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA
EC_PECR_R
MBCLK
34
MBDATA
34
2ND_MBCLK
2ND_MBDATA
43_4
R339
EC_FPBACK#
85
86
89
90
8,19
8,19
H_PECI
24
4
WLAN_OFF
26
USBON#
31
TPCLK
32
TPDATA
32
24
25
28
29
30
31
MAINON
R828
100K_4
SUSON
R827
100K_4
VRON
R826
100K_4
PCH_SPI_SI_EC R341
PCH_SPI_SO_EC R747
*10K_4
*10K_4
SM BUS PU(KBC)
+3VPCU
PWRLED#
27
ME_WR#
8
SUSLED#
27
BATLED0#
27
FAN1_PWM
32
FAN2_PWM
32
SUSLED#
47
48
FANSIG
FAN2SIG
120
124
MBCLK
MBDATA
R332
R340
4.7K_4
4.7K_4
2ND_MBCLK
2ND_MBDATA
R331
R330
4.7K_4
4.7K_4
+3V_S5
32
32
ACIN
34
TEMP_MBAT
125
18
21
NBSWON#
NBSWON#
SUSB#
SUSC#
112
C
34
13,31
7,13
7,13
RSMRST#
RF_EN
ICMNT
ICMNT
ADC0/GPI0(X)
ADC1/GPI1(X)
ADC2/GPI2(X)
ADC3/GPI3(X)
ADC4/WUI28/GPI4(X)
KSO16/SMOSI/GPC3(Dn)
KSO17/SMISO/GPC5(Dn)
PWM6/SSCK/GPA6(Up)
66
67
68
69
70
C473
4,34,38
Q40
2
PROCHOT_EC
7
R329
10u/6.3V_6
2N7002K
26
34
ECAGND
APWORK
5,7
PCH_SUSPWARN#
dGPU_ALT#
19
7
A/D D/A
SPI ENABLE
TACH2/GPJ0(X)
GPJ1(X)
DAC2/TACH0B/GPJ2(X)
DAC3/TACH1B/GPJ3(X)
KSO0/PD0
KSO1/PD1
KSO2/PD2
KSO3/PD3
KSO4/PD4
KSO5/PD5
KSO6/PD6
KSO7/PD7
KSO8/ACK#
KSO9/BUSY
KSO10/PE
KSO11/ERR#
KSO12/SLCT
KSO13
KSO14
KSO15
R376
100K_4
EXTERNAL SERIAL FLASH
SSCE0#/GPG2(X)
SSCE1#/GPG0(X)
dGPU_OPP#
H_PROCHOT#
ADC5/DCD1#/WUI29/GPI5(X)
ADC6/DSR1#/WUI30/GPI6(X) UART port
ADC7/CTS1#/WUI31/GPI7(X)
RTS1#/WUI5/GPE5(Dn)
PWM7/RIG1#/GPA7(Up)
DTR1#/SBUSY/GPG1/ID7(Dn)
CTX1/WUI18/SOUT1/GPH2/SMDAT3/ID2(Dn)
CRX1/WUI17/SIN1/SMCLK3/GPH1/ID1(Dn)
FSCK/GPG7
FSCE#/GPG3
FMOSI/GPG4
FMISO/GPG5
10K_4
+3V_GFX
99
98
97
96
93
WUI42/GPH6/ID6(Dn)
WUI41/GPH5/ID5(Dn)
WUI40/GPH4/ID4(Dn)
WUI19/GPH3/ID3(Dn)
CLKRUN#/WUI16/GPH0/ID0(Dn)
19
20
L80HLAT/BAO/WUI24/GPE0(Dn)
L80LLAT/WUI7/GPE7(Up)
84
83
82
VSTBY
110
111
115
116
117
118
R342
26
PWM
DAC4/DCD0#/GPJ4(X)
DSR0#/GPG6(X)
GINT/CTS0#/GPD5(Up)
PS2DAT1/RTS0#/GPF3(Up)
DAC5/RIG0#/GPJ5(X)
PS2CLK1/DTR0#/GPF2(Up)
TXD/SOUT0/GPB1(Up)
RXD/SIN0/GPB0(Up)
76
77
78
79
dGPU_OTP#
EC_FB_CLAMP
PCH_SLP_S0#
PCH_SUSACK#
EC_FB_CLAMP
19
17,19,20
7,13
7
KBMX
B
1
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
ECAGND
32
32
32
32
32
32
32
32
EGCLK/WUI27/GPE3(Dn)
EGCS#/WUI26/GPE2(Dn)
EGAD/WUI25/GPE1(Dn)
VBAT
AVCC
3
74
11
26
50
92
114
121
CIR
58
59
60
61
62
63
64
65
B
PCH_SLP_SUS#
LAN_WAKE#
80
104
33
88
81
87
109
108
BT_POWERON
PWM0/GPA0(Up)
PWM1/GPA1(Up)
PWM2/GPA2(Up)
PWM3/GPA3(Up)
PWM4/GPA4(Up)
PWM5/GPA5(Up)
IT8587
CK32KE/GPJ7
CK32K/GPJ6
VCORE
CLK_PCI_EC
CRX0/GPC0(Dn)
CTX0/TMA0/GPB2(Dn)
PS2CLK0/TMB0/CEC/GPF0(Up)
PS2DAT0/TMB1/GPF1(Up)
PS2CLK2/WUI20/GPF4(Up)
PS2DAT2/WUI21/GPF5(Up)
2
128
IOAC_RST#
VRON
38
HWPG(KBC)
26,28
+3V
DDR=1.5V, D1 DNP and D2 POP
DDR=1.35V, D1 POP and D2 DNP
CLOCK
IT8587E/FX
12
C
SUSON
SMCLK0/GPB3(X)
SMDAT0/GPB4(X)
SMCLK1/GPC1(X)
SMDAT1/GPC2(X)
PECI/SMCLK2/WUI22/GPF6(Up)
SMDAT2/WUI23/GPF7(Up)
SSCE0#
GPIO
AVSS
37
GA20/GPB5(X)
SERIRQ/GPM6(X)
ECSMI#/GPD4(Up)
ECSCI#/GPD3(Up) LPC
WRST#
KBRST#/GPB6(X)
PWUREQ#/BBO/SMCLK2ALT/GPC7(Up)/SMCLK2ALT
75
119
123
PROCHOT_EC
LPCPD#/WUI6/GPE6(Dn)
VSS
VSS
VSS
VSS
VSS
126
5
15
23
14
4
16
SIO_A20GATE
10
SIO_RCIN#
HWPG_1.05V_EC#
5
C408
1u/6.3V_4
TP71
IRQ_SERIRQ
SIO_EXT_SMI#
SIO_EXT_SCI#
VSS
2
1
10,27
10
10
WRST#
17
LID#
27
49
91
113
122
D22
SDMK0340L-7-F
R377
100K_4
PLTRST#
LAD0/GPM0(X)
LAD1/GPM1(X)
LAD2/GPM2(X)
LAD3/GPM3(X)
LPCRST#/WUI4/GPD2(Up)
LPCCLK/GPM4(X)
LFRAME#/GPM5(X)
KSI0/STB#
KSI1/AFD#
KSI2/INIT#
KSI3/SLIN#
KSI4
KSI5
KSI6
KSI7
24,31
1
2
+3VPCU
VCC
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
U27
10
9
8
7
22
13
6
127
C391
8,26,27
LPC_LAD0
8,26,27
LPC_LAD1
8,26,27
LPC_LAD2
8,26,27
LPC_LAD3
7,13,16,26,27,28
PLTRST#
9
CLK_PCI_EC
8,26,27
LPC_LFRAME#
+3VPCU_EC
WLAN_WAKE#
26
IOAC_LANPWR#
28
USB_CHARGE_ON
31
USB_BC_ON
31
CLKRUN#
7,27
*SHORT_6 +3V_EC
0.1u/10V_4
7
34
19
S5_ON
35,36,39
IOAC_WLANPWR#
0.1u/10V_4
R343
D
33
+3VPCU_EC
3
+3VPCU
R368
1
L23
BLM11A05S/0.2A/120ohm_6
1
EC(KBC)
SM BUS ARRANGEMENT TABLE
SM Bus 1
C396
0.1u/10V_4
L24
BLM11A05S/0.2A/120ohm_6
D1
Battery
SM Bus 2
PCH/VGA
SM Bus 3
N/A
39
HWPG_1.5V
5
HWPG_1.05V
37
5,13,36
D2
HWPG_VDDR
HWPG_1.05V_S5
35
SYS_HWPG
R393
10K_4
D42
RB500V-40
D23
*RB500V-40
D40
*RB500V-40
D39
RB500V-40
D41
RB500V-40
HWPG
SM Bus 4
For test only
+3V
iRST
SW5
TP103
3
4
5
6
2
1
C368
*0.1u/10V_4
NBSWON#
TP102
A
5
A
IOAC_RST#
2
4
*Power Switch
PCIERST#
PCIERST#
1
PCI_PLTRST#
3
7
R366
*100K_4
26,28
U22
*TC7SH08FU
R362
*100K_4
PROJECT : ZRQ
Size
Document Number
Rev
3A
KBC IT8587
Date:
5
4
3
2
Sheet
1
33
of
47
4
3
VA2
VA1
PQ14
AOL1413
PJ5
3
1
34
1
2
3
2
2
5
PR196
*SHORT_4
PC113
0.1u/50V_6
PC35
0.1u/50V_6
2
Power conn
5
1
DEL
PL5,PL6
12/7
PQ29
AOL1413
VIN
PR51
220K_4
24737_ACN
4
1
2
3
4
PR78
0.01/F_0612
PD6
SBR1045SP5-13
1
1
2
3
PD11
SMAJ20A
PC52
0.1u/50V_6
PC67
PR107
2200p/50V_6 33K/F_4
4
5
24737_ACP
D
D
PC26
0.1u/50V_6
PC27
2200p/50V_6
PD5
1N4148WS
PR52
220K_4
recommend 200mA at least.
1
6
2
5
3
4
PR194
*SHORT_4
D/C#
PR109
10K_4
33
PR44
*SHORT_4
3
PQ16
IMD2AT108
2
24737_ACP
PQ26
2N7002K
PC65
0.1u/50V_6
PC126
0.1u/50V_6
1
2
PR60
100K_4
24737_VCC
PR82
20_1206
ACIN
REGN
16
24737_REGN
C
20
PD9
RB500V-40
VCC
PR203
*SHORT_6
PC72
0.47u/25V_6
BTST
PC128
47n/50V_6
5
HIDRV
PHASE
BATT_EN#
8
MBDATA
PQ18
2N7002DW
+3VPCU
PC82
0.1u/50V_6
PC83
*100p/50V_4
B
PGND
24737_BM#
PR197
*10K_4
24737_CMPOUT
11
3
24737_ILIM
10
24737_CMPIN 4
CMPOUT
PR112
TEMP_MBAT
100_4
PR114
TEMP_MBAT
1M_4
33
PR116
+3VPCU
PR198
*100K_4
*100K_4
PR117
*0_4
PR97
100_4
PR206
100K/F_4
SRN
24737_BM#
TEMP_MBAT
3
CH2
VP
CH3
6
5
4
PC135
0.1u/25V_4
For battery reverse
2
33
33
PR96
*0_4
REGN MAX voltage 6.5V
V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
=0.793V for 3.965A current limit
H_PROCHOT#
4,33,38
3
33
Pin10 ILIM=0.793V
Rsr = 0.01ohm
ICMNT
24737_CMPOUT
CH4
MBDATA
A
2
PC127
100p/50V_4
+3VPCU
PQ24
*2N7002K
MBCLK
PROJECT : ZRQ
Size
Limit set on 60W/3.16A
Add ESD diode base on EC FAE suggestion
4
3
Document Number
Rev
2A
Charger(BQ24737RGRR)
Date:
5
B
PC140
PC139
PC137
2200p/50V_6 10u/25V_1206 10u/25V_1206
24737_SRN
1
VN
PR211
*SHORT_4
24737_SRN
PR207
7.5_6
10/29
PU10
IP4223-CZ6
CH1
PC75
*680p/50V_6
1
MBDATA
2
12
24737_SRP
PR92
*100K_4
PR98
*1.62K/F_4
PQ27
*2N7002K
1
24737_SRP
PC133
0.01u/25V_4
PR108
100_4
MBCLK
PC134
0.1u/25V_4
PC136
0.1u/25V_4
CMPIN
PR209
*SHORT_4
PQ55
MDV1528
+1.05V
B-stage DNP
A
13
PC74
*47p/50V_4
3
PC73
*47p/50V_4
BAT-V
PR100
*4.7_6
ILIM
IOUT
BATT_EN#
14
PR208
10/F_6
GND
GND
GND
GND
GND
8
7
6
5
4
3
2
10 1
2
21
22
23
24
25
9
1
4
7
50458-00801-V01
PR110
316K/F_4
PR210
0.01/F_0612
24737_DL
BM#
SRP
BAT-V
PJ6
15
SCL
PR204
*SHORT_4
PR104
10K_4
DEL
PL7,PL8
12/7
24707_LX
PL16
6.8uH_7X7X3
LCDRV
9
19
PQ23
MDV1528
4
PU14
BQ24737RGRR
SDA
PR200
*SHORT_4
MBCLK
24737_DH
5
4
1
BATT_EN#
18
ACOK#
3
2
1
5
3
2
PR69
*0_4
SB_ACDC
PR61
*SHORT_4
29
PC62
4.7u/25V_8
3
2
1
33
PC59
2200p/50V_6
17 24737_BST
ACPRESENT
6
7
ACDET
PC39
0.1u/25V_4
5
PR56
100K_4
VIN
PC132
1u/16V_6
ACN
24737_ACDET 6
C
ACP
PR199
10K/F_4
33
PC69
0.1u/50V_6
PR195
63.4K/F_4
+3VPCU
PR70
*10K_4
1
24737_ACN
PR54
*SHORT_6
2
Sheet
1
34
of
47
5
4
MAIND
MAIND
3
SYS_SHDN#
36,37,39
SYS_SHDN#
2
1
35
10,27,39
PR77
*SHORT_6
VL
+3VPCU
3V_LDO
PR176
10K/F_4
D
33
SYS_HWPG
D
VIN
L(ripple current)
=(9-5)*5/(2.2u*0.3M*9)
=3.367A
Iocp=9-(3.367/2)=7.32A
Vth=7.32A*14mOhm+1mV=103.43mV
R(Ilim)=(103.43mV*8)/10uA
=82.774K
4.7u/6.3V_6
5
PC48
0.1u/25V_4
3
51225_FB2
3
2
1
51225_DL2
4
1/F_6
0.1u/50V_6
PL14
2.2uH_7X7X3
C
PQ52
MDV1595S
21
4
+
3
2
1
PC121
0.1u/50V_6
PC42
*680p/50V_6
PC119
220u/6.3V_6X4.2
PR174
10K/F_4
OCP:7.5A
L(ripple current)
=(9-3.3)*3.3/(2.2u*0.355M*9)
~2.676A
Iocp=7.5-(2.676/2)=6.16A
Vth=6.16A*14mOhm+1mV=87.27mV
R(Ilim)=(87.27mV*8)/10uA
~69.81K
PR181
*SHORT_6
VIN
+5VPCU
B
+5VPCU
MAIND
3
2
1
2
+5V_S5
PQ28
2N7002K
PC81
*2.2n/50V_4
1
PQ22
2N7002K
1
PQ17
2N7002K
1
MAIND
2
S5D
TDC : 1.5A
PEAK : 2A
Width : 80mil
2
PQ56
MDV1528Q
A
1
2
4
PQ53
MDV1528Q
3
3
4
3
PR113
*1M_6
3
PR115
1M_6
+3VPCU
5
+3VPCU
+5V
TDC : 2.4A
PEAK : 3.2A
Width : 100mil
PQ51
AO3404
PQ47
AO3404
1
+15V
PR85
22_8
3
2
+3V
TDC : 1.4A
PEAK : 1.8A
Width : 110mil
+3V_S5
TDC : 1.2A
PEAK : 1.6A
Width : 60mil
PROJECT : ZRQ
Size
4
3
2
Document Number
Rev
2A
SYSTEM 5V/3V (TPS51225)
Date:
5
PR173
6.81K/F_4
PR65
*4.7_6
22
23
GND
11
PC47
5
VIN
GND
51225_SW2
PR64
PC76
0.1u/50V_6
+5V_S5
PR55
22_8
3
8
3
2
1
+3V_S5
PR120
1M_6
1
51225_VBST2
+15V_ALWP
2
PQ30
DTC144EU
51225_DH2
9
3
S5D
S5_ON
SYS_SHDN#
+3VPCU
3.3 Volt +/- 5%
TDC : 4.7A
PEAK : 6.2A
OCP : 7.5A
Width : 200mil
1
PR118
1M_6
36,39
PC49
PC51
0.1u/50V_6
2
PD8
1PS302
PR105
22_8
A
6
10
PR90
*SHORT_6
1
PC64
0.1u/50V_6
+15V
VIN
+3VPCU
3
5
B
51225_VIN
PC57
0.1u/50V_6
2
PD7
1PS302
OCP:9A
GND
24
PC68
*680p/50V_6
GND
VO1
GND
1
2
3
PR81
10K/F_4
VFB1
GND
14
CS2
4
VFB2
CS1
PR93
*4.7_6
PC125
0.1u/50V_6
DRVL2
DRVL1
5
2
51225_CS2
+
PC131
220u/6.3V_6X4.2
PQ54
MDV1595S
69.8K/F_4
51225_FB1
SW 1
PR68
15
VCLK
18
51225_DL1
1
51225_SW1
SW 2
PU9
TPS51225RUKR
19
1/F_6
VBST1
C
PR80
15.4K/F_4
VBST2
51225_CS1
17
DRVH1
51225_VCLK
51225_VBST1
PR192
0.1u/50V_6
5
16
EN2
DRVH2
84.5K/F_4
PC58
51225_DH1
PC37
4.7u/25V_8
4
EN1
PR84
PL15
2.2uH_7X7X3
PGOOD
20
PC46
2200p/50V_6
PQ48
MDV1528
VREG3
7
51225_EN1
VREG5
4
PQ57
MDV1528
12
13
5
+5VPCU
5 Volt +/- 5%
TDC : 5.4A
PEAK : 7.2A
OCP : 9A
Width : 220mil
PR67
*100K/F_4
PR170
*SHORT_4
1
2
3
+5VPCU
PR191
*SHORT_4
PC130
2200p/50V_6
25
2
PC129
4.7u/25V_8
26
PC144
47u/25V_6X4.5
10u/6.3V_6
1
SYS_SHDN#
+
PC50
VIN
Sheet
1
35
of
47
5
4
3
36
VIN
D
D
+5VPCU
+3V
7
PR42
5
12
C
V5IN
TST
GND
13
GND
PR166
*100K/F_4
DRVL
GND
10
51211V_VBST
8
51211V_SW
6
51211V_DRVL
3
2
1
VBST
PU7
TRIP TPS51211DSCR SW
PL11
2.2uH_7X7X3
5
*SHORT_4
EN
+1.05V_S5
PR46
PC29
*SHORT_6 0.1u/50V_6
11
PR162
*4.7_6
FB
2
GND
PR165
3
51211V_TRIP
105K/F_4
51211V_TST
464K/F_4
9
4
PC107
0.1u/50V_6
PQ40
MDV1595S
3
2
1
51211V_FB
PC25
*680p/50V_6
PC108
330u/2.5V_6X4.2
PR45
10K/F_4
OCP=10A
L ripple current
=(19-1.05)*1.05/(2.2u*290k*19)
=1.555A
Vtrip=10-(1.555/2)*14mohm
=0.129V
Rlimit=0.129/10uA*8=103.293Kohm
C
+1.05V_S5
B
5
B
+1.05V
1.05 Volt +/- 5%
TDC : 6.7A
PEAK : 8A
OCP : 10A
Width : 280mil
PR43
5.1K/F_4
+
4
PR47
S5_ON
51211V_EN
*0_4
GND
PR164
16
33,35,39
MAINON
PQ43
MDV1528
DRVH
GND
31,33,37,39
PC110
4.7u/25V_8
4
51211V_DRVH
PGOOD
15
1
HWPG_1.05V_S5
14
5,13,33
PC109
2200p/50V_6
5
PC28
1u/10V_4
PR48
*100K/F_4
MAIND
MAIND
4
PQ37
MDV1528Q
3
2
1
35,37,39
+1.05V
TDC : 2.4A
PEAK : 3.2A
Width : 100mil
A
A
PROJECT : ZRQ
Size
Document Number
Rev
2A
+1.05V(TPS51211)
Date:
5
4
3
2
Sheet
1
36
of
47
5
4
TDC : 0.75A
PEAK : 1A
Width : 40mil
3
PC61
10u/6.3V_6
TDC : 0.38A
PEAK : 0.5A
Width : 20mil
D
37
+DDR_VTT_RUN
PC66
10u/6.3V_6
D
DDR_VTTREF
Close to IC
Greater than or equal 40mil
PC70
0.22u/10V_4
+5VPCU
2
PC63
10u/6.3V_6
PC78
1u/10V_4
VIN
VLDOIN
3
VTT
1
VTTSNS
5
4
VTTGND
20
HWPG_VDDR
VTTREF
10/29
33
21
PAD
PR94
*100K/F_4
PAD
22
+3V
PGOOD
V5IN
+1.35V_SUS
1.35 Volt +/- 5%
TDC : 12.6A
PEAK : 16.8A
OCP : 20A
Width : 520mil
12
8
6
VREF=1.8V
PGND
15
PC79
0.1u/50V_6
PC141
2200p/50V_4
1
13
51216_SW
11
9
S1/D2
8
51216_DRVL
PQ58
FDMS3660S
10
PC142
4.7u/25V_8
C
G1
51216_SW
+1.35V_SUS
PL17
0.68uH_7X7X3
G2
PR119 10/12
*4.7_6
+1.35V_SUS
4,5,14,15,29,41
change
+
7
6
5
PAD
51216_DRVH
PR111
2/F_6
51216_VBST
S2
S2
S2
DRVL
REF
26
TRIP
GND
18
SW
14
PC138
0.1u/50V_6
PC80
*680p/50V_6
7
51216_TRIP
MODE
PAD
PR99
15.4K/F_4
VBST
PU11
TPS51216RUKR
23
51216_MODE 19
PR95
200K/F_4
S5
PAD
16
DRVH
24
51216_S5
S3
PAD
PR106
*SHORT_4
17
25
51216_S3
VDDQSNS
SUSON
PR103
*0_4
9
33
MAINON
REFIN
31,33,36,39
D1
D1
D1
2
C
+
PC143
330u/2.5V_6X4.2
PC84
*330u/2V_7343
51216_REFIN
51216_REF
PC71
0.1u/10V_4
B
51216_S3
PR202 51216_S5
*0_4
PR201
*SHORT_6
RDSon=3.2mohm
B
PR102
10K/F_4
+1.35V_SUS
Close to output cap
PR101
30.1K/F_4
A
OCP=10A
L ripple current
=(19-1.35)*1.35/(0.68u*400k*19)
=4.611A
Vtrip=10-(4.611/2)*2.5mohm
=0.01923V
Rlimit=0.01923/10uA*8=15.389Kohm
OCP=20A
L ripple current
=(19-1.5)*1.5/(0.68u*400k*19)
=5.079A
Vtrip=20-(5.079/2)*2.5mohm
=0.04365V
Rlimit=0.04365/10uA*8=34.92Kohm
5
TDC : 0.56A
PEAK : 0.75A
Width : 20mil
51216_S3
PC77
0.01u/25V_4
Mode
Frequency
200K
400K
Tracking Discharge
100K
300K
Tracking Discharge
MAIND
+1.5V
S3
S5
S0
1
1
S3 (mainon off)
0
1
+1.35VSUS
REF
VTT
ON
ON
ON
ON
ON
OFF
A
PROJECT : ZRQ
Size
S4/S5
0
0
OFF
OFF
3
2
Document Number
Rev
2A
DDR 1.35V(TPS51216)
OFF
Date:
4
PQ59
*AO3404
10/12 reserve
DDR=1.5V,PC9032 & PQ9016 POP
DDR=1.35V
OCP=10A
PR95=15.4K/F_4
PR97=30.1K/F_4
DDR=1.5V
OCP=20A
PR95=35.7K/F_4
PR97=51K/F_4
35,36,39
Discharge mode
MAIND 2
1
PR205 *SHORT_4
DDR_VTTT_PG_CTRL
3
stuff for C8 ODT power off
4
Sheet
1
37
of
47
4
1
5
VCC_SENSE
12
VSS_SENSE
Parallel
PR128
*10_4
B
VBAT
51622_NC
51622_CSP1
18
51622_CSN1
19
51622_CSN2
20
51622_CSP2
21
51622_PU3
1
2
PR152
2.94K/F_4
PC98
0.12u/10V_4
+VCCIN
TDC : 13A
PEAK : 32A
OCP : 40A
VCORE Load Line :
-2mV/A
Close with
phase1 inductor
C
22
PAD
PR138
*0_4
33
34
35
36
PAD
PAD
39
40
37
38
PAD
4
17
Close to the
VR side.
+
PR141
22.6K/F_4
16
14
28
V5A
THERM
SLEWA
15
11
10
F-IMAX
B-RAMP
GND
51622_PWM2
D
PR136
*SHORT_8
PR140
430K/F_4
PR133
10K/F_4
51622_PWM1
5
+VCCIN
PC14
4700p/25V_4
26
IMON
N/C
6
PR151
10K/F_4_3435KNTC
51622_SLEWA
51622_B-RAMP
51622_F-IMAX
51622_O-USR
PU3
GFB
COMP
VFB
51622_COMP
PC8
100p/50V_4
PC90
*330p/50V_4
PR5
5.76K/F_4
PR127
*10_4
2.7K/F_4
*SHORT_4
+VCCIN
*SHORT_4
*0_4
PR16
PR8
PR14
PR129
VRON
VRON_CPU
9
CSP2
*SHORT_4
*SHORT_4
33
5
PR131
PR9
IMVP_PWRGD
O-USR
VR_ON
41
42
23
CSN2
29
24
51622_GFB
CSN1
SKIP
13
8
PU5
TPS51622RSM
PGOOD
51622_IMON
51622_VRON
N/C
CSP1
PR146
75K/F_4
7
PWM2
OCP-I
51622_SKIP#
51622_VFB
PR22
*100K/F_4
PR137
*100K/F_4
+3V_S5
PC11
*0.1u/25V_4
PWM1
VDIO
51622_VREF
5,10
51622_VBAT
ALERT
12
3
+3V
PC13
*0.1u/25V_4
51622_V5A
VCLK
51622_OCP-I
1
27
2
VR_SVID_DATA
VREF
VDD
VR_SVID_ALERT#
VR_SVID_DATA
DROOP
32
VR_SVID_ALERT#
5
VR_HOT
25
31
5
C
51622_VREF
51622_VDD
PR130
*56_4
PR7
56_4
PR6
*75/F_4
30
VR_SVID_CLK
51622_DROOP
VR_SVID_CLK
51622_THERM
DCR= 1mOhm
PC101
*330u/2V_7343
9
PU12
CSD97374CQ4M
51622_CSN1
PC5
1500p/50V_4
H_PROCHOT#
5
PR10
130/F_4
PC94
0.1u/10V_4
4,33,34
PC118
47u/25V_6X4.5
4
3
3
51622_CSP1
Close to VR
PC95
2200p/50V_4
PC92
4.7u/25V_8
PL9
0.24uH_7X7X4
2
PC100
22u/6.3V_8
PAD
1
PC89
22u/6.3V_8
BOOT
CS_SW1
PC97
0.1u/10V_4
PC96
0.22u/25V_6
BOOT_R PGND
5
4
2.21K/F_4
CS_BST1 7
PR135
2.2/F_6
VIN
VSW
PR18 *SHORT_4
6
PWM
PR17
CS_BSTR1
SKIP#
PR15
2.2_6
8
PC12
1000p/50V_6
1
51622_PWM1
VDD
PR23
10K/F_4
PR132
10/F_6
PC15
1000p/50V_4
PC7
1u/10V_4
51622_SKIP#
Add 11 GND VIAs
for thermal pad
+1.05V_VCCST
+
2
PC99
1u/10V_4
PC93
4.7u/25V_8
PC9
0.1u/50V_6
+5V_S5
+5V_S5
PR148
100K/F_4_4250NTC
PR149
*39.2K/F_4
PR144
150K/F_4
PR150
39K/F_4
PR19
*90.9K/F_4
PR143
499K/F_4
PR21
75K/F_4
PR145
9.31K/F_4
PR20
150K/F_4
PR142
100K/F_4
PC6
0.33u/6V_4
PC10
1u/6.3V_4
51622_VRON
D
2
38
Place NTC close to the
VCORE Hot-Spot.
51622_VREF
PR134
1_6
+3V_S5
3
PR147
9.09K/F_4
5
PC91
*0.01u/50V_4
B
Close to the
CPU side.
+3V_S5
PR11
*SHORT_4
51622_PU3
+3V_S5
PR13
*SHORT_4
51622_CSP2
51622_PWM2
51622_CSN2
PR139
PR12
*SHORT_4 *0_4
A
A
PROJECT : ZRQ
Size
Document Number
Rev
2A
+VCCIN(TPS51622)
Date:
5
4
3
2
Sheet
1
38
of
47
1
2
3
39
+3VPCU
+3V
PC87
0.1u/25V_6
PU15
16
PR216
*100K/F_4
A
1
10/29
2
33
14
HWPG_1.5V
15
MAINON
7
PR217
*SHORT_4
8
9
PR122
8.06K/F_4
PR214
121K/F_4
PH
VIN
PH
VIN
PH
PW RGD
BOOT
EN
VSNS
COMP
GND
RT/CLK
GND
SS
AGND
10
11
A
PL18
1uH_7X7X3
12
*SHORT_6
13
PR215
6
PC151
0.1u/50V_6
PR213
100K/F_4
R1
3
PC148
0.1u/10V_4
4
PC149
10u/6.3V_6
PC150
10u/6.3V_6
1.5V_VSNS
5
PR212
113K/F_4
R2
22
21
20
19
18
17
PC88
1000p/50V_4
TPS54318RTER
VIN
PAD
PAD
PAD
PAD
PAD
PAD
PC147
10u/6.3V_6
+1.5V
+1.5V
1.5Volt +/- 5%
TDC : 0.6A
PEAK : 0.8A
Width : 40mil
V0=0.8*(R1+R2)/R2
PC145
*100p/50V_4
PC85
1500p/50V_4
PC146
0.01u/25V_4
DDR=1.5V ,This block DNP
B
B
VIN
PD10
DA2J10100L
VIN
PR123
1M_4
1
PQ42
AO3409
PR62
22_8
+1.05V
PR91
22_8
+1.5V
PR155
22_8
+15V
PR126
*22_8
PR124
1M_4
35,36,37
3
MAIND
PR125
1M_4
2
2
1
PQ33
*2N7002K
PQ32
2N7002K
PC86
*2200p/50V_4
C
VL
SYS_SHDN#
PR161
200K/F_4
PC105
0.1u/50V_6
PR153
200K_6
10,27,35
10/12 reserve
DDR=1.5V POP
3
PR160
887/F_4
PR159
10K_6_NTC
2.469V
3
2
+
1
2
-
4
3
LM393_PIN2
S5_ON
2
PQ36
2N7002K
PU13A
BA10393F
+
7
PQ38
2N7002K
PC106
0.1u/50V_6
1
Note placement position
VL
PR121
*100K/F_6
2
PQ25
2N7002K
8
Need fine tune
for thermal protect point
PR158
*SHORT_6
1
PQ41
DTC144EU
C
2
PQ20
2N7002K
1
PQ31
DTC144EU
1
2
MAINON
1
31,33,36,37
1
S5_ON 2
S5_ON
1
33,35,36
3
3
3
3
MAIND
3
MAINON_ON_G
3
2
+5V
3
PR163
1M_6
Thermal protection
+3V
2
PR157
200K/F_4
1
PQ39
2N7002K
5
D
6
D
PU13B
BA10393F
For EC control thermal protection (output 3.3V)
PROJECT : ZRQ
Size
Document Number
Rev
2A
+1.5V/+1.8V/Thermal protect
Date:
1
2
3
4
Sheet
5
39
of
47
5
4
+3V
3
40
+5V_S5
PQ21
EV@2N7002K
PR187
EV@18K/F_4
3
R6
PR186
*EV@SHORT_4
C1
PC54
EV@2700p/50V_4
R4
2
R5
7
1642_COMP
12
1642_FB
11
10
REFADJ
PHASE2
REFIN
TALERT#/ISEN2
COMP
LGATE2
FB
GND/PW M3
FBRTN
TSNS/ISEN3
19
1642_PHASE2
14
GPU_THAL#
20
1642_LGATE2
16
PC40
13
PC152
EV@10u/25V_8
PC123
EV@10u/25V_8
PC117
PC36
4
PQ44
EV@AON6752
RDSon 2.2mohm
1642_TSNS
Add 3 GND VIAs
for thermal pad
1642_FBRTN
PL12
[email protected]_LDCR
DRC=0.76mohm
12/7
change to
10x10
+
B
+3V
PR74
EV@10K/F_4
GPU_THAL#
1642_PVCC
PR72
EV@10K/F_4
1642_ISEN1
1642_VREF
PR179
1642_TSNS
PR89
EV@1K/F_4
GPU_VCCP_SENSE
PC31
EV@330u/2V_7343
PC114
EV@10u/6.3V_6
1
PR167
EV@10K/F_4
C
12/7 add
10U/25V_8*2
+VGACORE
22
PR189
EV@100_4
GPU_THAL#
19
20
+VGACORE
1642_FBRTN
GPU_VSSP_SENSE
PR185
*EV@SHORT_4
A
PC111
1
2
3
5
4
PR59
PC55
EV@33p/50V_4
16
PC32
PR49
EV@1000p/[email protected]_6
5
1642_BOOT2
PC154
EV@10u/25V_8
BOOT2
1642_UGATE2
PC122
EV@47u/25V_6X4.5
PC153
EV@10u/25V_8
VREF
17
18
+
2
UGATE2
1642_LGATE1
PC30
EV@330u/2V_7343
1642_REFIN
VID
23
+VGPU_CORE
1 Volt +/- 5%
TDC : 40A
PEAK : 58A
OCP : 70A
Width : 1800mil
VIN
PQ15
EV@AON6414AL
PC115
EV@10u/6.3V_6
6
LGATE1
1642_ISEN1
PC34
1642_REFADJ
PGOOD
1642_PHASE1
+
PC112
8
DSBL/ISEN1
24
15
PQ45
EV@AON6752
RDSon 2.2mohm
+VGACORE
PR193
*EV@SHORT_4
D
DRC=0.76mohm
12/7
change to
10x10
PC41
5
1642_VREF
PSI
1642_BOOT1
PC38
1642_VID
PHASE1
1
1
2
3
16
BOOT1
EN
1642_UGATE1
PC33
PR50
EV@1000p/50V_6
[email protected]_6
R3
PC53
PR188
EV@2K/F_4
PR190
1
4
PVCC
2
5
PR172
EV@10K_4
PR184
*EV@1K/F_4
R1
PR73
EV@10K_4
1642_PSI
PR87
EV@20K/F_4
0816 remove GPU_STDBY from NV reply
B
3
1642_PGOOD
*EV@SHORT_4
R2
1642_EN
UGATE1
1
2
3
PR83
VGPU_PWMVID
*EV@SHORT_4
21
TON
PAD
19
PR66
VGPU_PWRGD
9
25
PC43
PC124
4
PC60
PR86
EV@4700p/25V_4 [email protected]/F_4
20
PC56
EV@1u/6.3V_4
C
VGPU_PSI
*EV@SHORT_4
PL13
[email protected]_LDCR
12/7
47/25V
change to
10U/25V_8*2
+VGACORE
1642_PVCC
PR88
EV@20K/F_4
19
PR53
PU8
EV@ UP1642RQAG
1642_TON
PR180
PC45
EV@10K/F_4
+3V_S5 +3V
0815 PSI PU 10K at GPU side arealdy
PC116
5
4
PR63
1
2
3
VGPU_EN
PR79
EV@100K_4
8,20
PR183
PR178
*EV@SHORT_4
PR171
[email protected]_6
D
PR75
*EV@10K_4
VIN
PQ46
EV@AON6414AL
PR177
PR175
EV@100K/F_4_4250NTC*[email protected]/F_4
PR182
EV@100_4
Place NTC close to the
VGPU Hot-Spot.
A
PROJECT : ZRQ
Size
Document Number
Rev
2A
+VGPU_CORE(UP1642PQAG)
Date:
5
4
3
2
Sheet
1
40
of
47
5
4
3
2
1
41
VIN
+5V_S5
+3V
7
PR32
12
V5IN
PU6
TRIP EV@TPS51211DSCR
SW
TST
DRVL
GND
GND
13
GND
PC104
*EV@1u/10V_4
5
10
8
1.5GFX_SW
6
1.5GFX_DRVL
+1.5V_GFX
PL10
[email protected]_7X7X3
3
2
1
2
D
5
PR36
VBST
11
PR28
*[email protected]_6
FB
1.5GFX_TRIP
EV@100K/F_4
1.5GFX_TST
EV@464K/F_4
*EV@SHORT_4
modify +1.5V_GPU enable pin 0814
EN
9
PR156
+
4
4
3
4
PR31
PC21
*EV@SHORT_6 [email protected]/50V_6
1.5GFX_VBST
1.5GFX_DRVH
DRVH
GND
PR35
1.5GFX_EN
+1.05V_GFX
+1.5V_GFX
+3V_GFX
PQ35
EV@MDV1528
PGOOD
GND
FBVDDQ_EN
1
15
20
HWPG_1.5VGFX
HWPG_1.5VGFX
14
20
16,17,18,20
17,20,21,22,29
16,19,20,33
PC19
PC20
EV@2200p/50V_6 [email protected]/25V_8
5
PC22
EV@1u/10V_4
PR33
EV@100K/F_4
GND
D
16
0815 stuff PR177 to enable
+1.05V_GFX
PC103
1.5GFX_FB
OCP=10A
L ripple current
=(19-1.5)*1.5/(2.2u*290k*19)
=2.165A
Vtrip=10-(2.165/2)*14mohm
=0.1248V
Rlimit=0.1248/10uA*8=99.87Kohm
PC17
*EV@680p/50V_6
3
2
1
PQ34
EV@MDV1595S
PC102
EV@330u/2V_7343
PR154
EV@10K/F_4
+1.5V_GFX
1.5 Volt +/- 5%
TDC : 6.3A
PEAK : 8.4A
OCP : 10A
Width : 250mil
DDR=1.5V ,This block DNP
C
C
+1.05V_GFX
PR27
EV@1M_4
PR25
EV@22_8
PR24
EV@1M_4
dGPU_D1
3
PQ6
EV@MDV1528Q
3
2
1
PR26
EV@1M_4
2
2
PQ7
EV@2N7002K
1
PQ8
EV@PDTC143TT
PQ5
EV@2N7002K
+1.05V_GFX
PC16
+1.05V_GFX
TDC : 2.3A
PEAK : 3A
Width : 100mil
2
PR29
EV@100K_4
1
1
2
1
PR30
*EV@SHORT_4
1.05V_GFX_EN
PC18
*EV@1u/10V_4
4
3
3
modify +1.05V_GFX enable pin 0814
20
+1.05V_S5
+15V
5
VIN
+3VPCU
B
+3V_GFX
PR40
EV@1M_4
+15V
PR41
EV@22_8
B
PR34
EV@1M_4
3
VIN
2
2
PQ12
EV@2N7002K
PQ11
EV@PDTC143TT
1
PR37
EV@100K_4
PQ10
EV@2N7002K
PQ9
EV@AO3404
+3V_GFX
PC23
+3V_GFX
TDC : 0.76A
PEAK : 1A
Width : 40mil
2
PC24
*EV@1u/10V_4
1
1
2
1
PR39
EV@1M_4
2
DGPU_PWR_EN
1
PR38
*EV@SHORT_4
10
3
3
3
dGPU_D
+1.5V_GFX
PR58
*EV@1M_4
+1.35V_SUS
+15V
PR168
*EV@22_8
PR169
*EV@1M_4
1
2
3
3
A
PQ13
*EV@RJK03K5DPA
4
3
3
dGPU_D2
5
VIN
PR57
*EV@1M_4
2
2
2
PQ50
*EV@2N7002K
1
PR76
*EV@100K_4
PQ19
*EV@PDTC143TT
PQ49
*EV@2N7002K
PC120
2
PC44
*EV@1u/10V_4
1
1
FBVDDQ_EN
+1.5V_GFX
+1.5V_GFX
TDC : 6.3A
PEAK : 8.4A
OCP : 10A
Width : 250mil
A
1
PR71
*EV@0_4
PROJECT : ZRQ
10/12 reserve
Size
Document Number
Rev
2A
+1.5V_GFX/+1.05V_GFX/+3V_GFX
Date:
5
4
3
2
Sheet
1
41
of
47
1
2
3
4
5
8
42
VGA power up sequence
+3VPCU
PCH
MOSFET
A
+3V_GFX
A
dGPU_PWR_EN
VGA_VID
VIN
+VGPU_CORE
VGPU_EN
VIN
PWM
+1.5V_GFX
+1.05V_S5
VGPU_PWRGD
PWM
OR
Gate
FBVDDQ_EN
HWPG_1.5VGFX
VGPU_PWRGD
EC_FB_CLAMP
MOSFET
DGPU_PWROK
+1.05V_GFX
1.05V_GFX_EN
EC
B
B
Power States
PEX_RST
Trise >= 1uS
C
Tfail <=500nS
ACTIVE IN
VIN
+10V~+19V
MAIN POWER
ALWAYS
ALWAYS
+3V_RTC
+3V~+3.3V
RTC POWER
ALWAYS
ALWAYS
+3VPCU
+3.3V
EC POWER
ALWAYS
ALWAYS
+5VPCU
+5V
USB CHARGE POWER
ALWAYS
ALWAYS
+15V
+15V
CHARGE PUMP POWER
ALWAYS
ALWAYS
+3V_S5
+3.3V
LAN/BT POWER
S5_ON
S0-S5
+5V_S5
+5V
USB POWER
S5_ON
S0-S5
+5V
+5V
HDD/SPK/HDMI POWER
MAINON
S0
+3V
+3.3V
PCH/GPU/Peripheral component POWER
MAINON
S0
+1.35VSUS
+1.35V
CPU/SODIMM/MD POWER
SUSON
S0-S3
+DDR_VTT_RUN
+0.675V
SODIMM/MD Termination POWER
MAINON
S0
LCDVCC
+3.3V
LCD POWER
LVDS_VDDEN
S0
+1.5V
+1.5V
MINI CARD/NEW CARD POWER
MAINON
S0
+1.05V
+1.05V
PCH CORE VCCST POWER
MAINON
S0
+VCCIN
variation
CPU CORE POWER
VRON
S0
+VGPU_CORE
variation
External GPU POWER
VGPU_EN
S0
+3V_GFX
+3.3V
External GPU POWER
dGPU_PWR_EN S0
+1.5V_GFX
+1.5V
External GPU POWER
FBVDDQ_EN
+1.05V_GFX
+1.05V
External GPU POWER
1.05V_GFX_EN S0
S0
CPU NTC
Thermal
Protection
CPU
CORE PWR
H_PROCHOT#
PM_THRMTRIP#
SYS_SHDN#
WIRE-AND
H/W Throttling
3V/5 V
SYS PWR
HSW ULT
C
GPU NTC
Thermal
Protection
SM-Bus1
FAN1_PWM
CPU FAN
FAN2_PWM
GPU FAN
EC
GPU
CORE PWR
GPIO12_ACIN
D
SM-Bus1
I/O 3.3V
CONTROL
SIGNAL
dGPU_ALT#
PEX_RST timing
DESCRIPTION
dGPU_OTP#
PEGX_RST#
VOLTAGE
dGPU_OPP#
PLTRST#
DGPU_HOLD_RST#
PCH
Thermal Follow Chart
POWER PLANE
GPU_THAL#
VGA Reset
GPIO12 HW throttle
over power protect
D
dGPU
dGPU_OPP# EC notify HW throttle over power protect
dGPU_ALT# for ADPS circuit to infrom EC NV dGPU VPS Alert
dGPU_OTP# VGA thrmtrip# => inform EC over temperature protect
PROJECT : ZRQ
Size
2
3
4
5
6
7
Rev
3A
PWR Status & GPU PWR CRL & THRM
Date:
1
Document Number
Sheet
8
42
of
47
5
4
Battery Mode
3
VIN
3
+3VPCU
+3V_S5
10
2
VIN
BAT-V
+3.3V_DSW
2
depend on A measure
result to implement
for B test
+15V
EN1
PWR
11
EN2
S5
+3VPCU
D
+5V_S5
5b
VL
3V/5V
VR
3V_LDO
3 +5VPCU
43
3
+5VPCU
Support Deep Sx
1
+3VPCU
1
3
2
4
+3.3V_DSW
CHARGER
EN
Battery
D
3
3
8
S5_ON
NBSWON#
1 VIN
18
+1.35V_SUS
DDR VDDQ
VR
14 SB_ACDC
EC
30
15
HWPG
+3VCC_S5
DSW PWR
Delay DSW power well 10ms
DPWROK
SUS PWR
+1.05V
RSMRST#
ASW PWR
ACPRESENT
DNBSWON#
PWRBTN#
SUSC#
16
20
SUSB#
S3
S5
7
24
HWPG_VDDR
PG
6 DPWROK
13 RSMRST#
23
+DDR_VTT_RUN
+3VPCU or +3.3V_DSW
PWR
BTN
19
DDR_VTTREF
5a DSW_ON
SPI PWR
SLP_S4#
SLP_S3#
+3V_S5
+V1.05DX_MODPHY
HSIO PWR
PCH_SUSACK#
SUSACK
PCH_SUSPWARN#
SUSWRAN
PCH_SLP_SUS#
SLP_SUS#
PLL PWR
+1.05V
+1.05V
PCH
DDR_PG_CTRL
22
MAINON
31
24
HWPG_VDDR
3
26
12
+1.5V
1.5V
VR
HWPG_1.5V
29
SUSON
VRON
S5_ON
IMVP_PWRGD
31
EC_PWROK
SYS_PWROK
36
31
32b 21 17 8
38
?
CORE PWR
RESET#
+3V
27
MOS1
0 ohm
MOS2
10K ohm
+1.05V
SVID
+1.05V_S5
9
25
MAINON
12
1 VIN
21
+VCCIN
1
33
31
IMVP
VR
VIN
9
36
+1.05V_S5
PG
HWPG_1.05V
34
12
EN
EN
+1.05V_S5
VR
PG
IMVP_PWRGD
30a
B
VCCST PWR
HWPG_1.05V
EC_PWROK
SVID
G
MOS3
+1.05V_VCCST
VR_EN
28
PROCPWRGD
VCCST_PWRGD_EN
SYS_PWROK
HWPG_1.05V_EC#
37
22
VRON_CPU
+5V
+1.05V_VCCST
VDDQ PWR
VCCST_PWRGD
+1.05V
+1.35V_SUS
CPU
VR_READY
21
IMVP_PWRGD
+3VPCU
34
+3V_S5
HDA PWR
VCCST_PWRGD_EN
3
SYS_PWROK
SM_PG_CNTL1
+5VPCU
38
PLTRST#
HWPG_1.5V
RUN PWR
3
SDIO PWR
PLTRST#
+VCCIN
MAINON
B
30a
PCH_CLK
35
C
+3V
PCH_PWROK
DDR_PG_CTRL
EN
PG
29
HWPG_1.05V
EC_PWROK
CORE PWR
PLTRST#
17
MAINON
SUSON
+3VPCU
EC_PWROK
?
HWPG_1.05V_EC#
21
+0.75V_ON
+0.75V_ON
C
APWROK
34
32a
A
A
S5_ON
MAINON
PCH
8
21
SVID
37
VRON_CPU
32a
VRON
32b
HWPG+1ms
CPU
PROJECT : ZRQ
Size
Document Number
Rev
3A
Power Sequence
Date:
5
4
3
2
Sheet
1
43
of
47
1
2
3
4
5
6
7
8
+3V
+3V_S5
SDRAM
2.2K
2.2K
4.7K
+3.3V_RUN
AP2 SMB_PCH_CLK
2N7002DW
Level shift
A
AH1 SMB_PCH_DAT
4.7K
CLK_SCLK
A
CLK_SDATA
Touch PAD
+WL_VDD
XDP
4.7K
4.7K
+3V_S5
2N7002DW
Level shift
Haswell
ULT
WLAN_CLK_SCLK
WLAN_CLK_SDATA
WLAN
+3V_S5
2.2K
2.2K
B
B
AN1 SMB_ME0_CLK
AK1 SMB_ME0_DAT
+3V_S5
*2.2K
*2.2K
AU3 SMB_ME1_CLK
+3V_S5
*2N7002DW
Level shift
AH3 SMB_ME1_DAT
+3V_S5
3V3MISC
C
C
10K
10K
4.7K
4.7K
+3V_GFX
116 2ND_MBDATA
2N7002DW
Level shift
115 2ND_MBCLK
SIO
ITE8587
+3VPCU
100
10K
D
dGPU
Battery
10K
100
110 MBCLK
D
111 MBDATA
Charger
PROJECT : ZRQ
Size
Document Number
Rev
3A
Block Diagram
Date:
1
2
3
4
5
6
7
Sheet
44
8
of
47
5
4
3
MDV1528Q
SYS_HWPG
45
+5V_S5
S5D
2
VGPU_PWRGD
9
3V_LDO
1
PWRGD
PWR
D
MDV1528Q
+5VPCU
EN!
EN2
Vin
VIN
MAIND
D
VGPU Core
Vin
uP1642
4
TPS51225
3V_LDO
PWRGD
S5_Vout
3V/5V
1
+5V
+VGPU_CORE
Vout
EN
VGPU_EN
S3_Vout
+3VPCU
AO3404
+3V_S5
AO3404
+3V
7
PCH
VIN
S5D
2
HWPG_1.5VGFX
10
MAIND
PWRGD
4
VIN
Vin
+1.5V_GFX
Vout
+1.5V_GFX
TPS51211
EN
EC_FB_CLAMP
AO3404
C
+3V_GFX
EC
OR Gate
FBVDDQ_EN
C
VGPU_PWRGD
dGPU_PWR_EN
9
PCH
VGPU_EN
7
HWPG_1.05V
MDV1528Q
+1.05V
PWRGD
VIN
+1.05V_S5
Vin
TPS51211
MAIND
Vout
4
+1.05V_S5
IMVP_PWRGD
EN
S5_ON
2
MDV1528Q
EC
10
B
1.05V_GFX_EN
VIN
AND Gate
MAINON
4
+1.05V_GFX
PWRGD
HWPG_1.5VGFX
EC
Vin
VGPU_PWRGD
CPU VCCIN
TPS51622
+VCCIN
Vout
B
EN
9
VRON_CPU
VRON
HWPG_VDDR
HWPG_1.5V
SUSON
3
PWRGD
EC
+1.35V_SUS
S5 EN
S5_Vout
+1.35V_SUS
DDR_VTTT_PG_CTRL
PCH
S3 EN
MAINON
PWRGD
DDR_VTTREF
+3VPCU
TPS51216
Vin
S3_Vout
Vin
+1.5V
TPS54318
Vout
+1.5V
EN
+DDR_VTT_RUN
MAINON
4
A
A
+0.75V_ON
EC
VIN
PROJECT : ZRQ
Size
Document Number
Date:
Rev
3A
ULT PWR CONTROL
5
4
3
2
Sheet
1
45
of
47
5
4
Version
Model
3
2
1
CHANGE LIST
1A
ZRQ
2A
D
1
Add R806 Pull down for EDP_HPD(Intel check List).(Page 02)
2
Add R811 and reserve R809 for Codec Vendor request.(Page 30)
3
Change R345 footprint from 0402 to 0603.(Page 14)
4
Change U10 to correct PN AL007534001.(Page 31)
5
Improve IMVP_PWRGD voltage to low , so del R66,Q9 , R61,Q50 ,R495 and add U55 , C767 , R807. (Page 10)
6
Change CN12 to 12 PIN connect_DFFC12FR034 (Page 31)
7
Change SW6 from DHP0BTEPV00 to DHPATE2CK03.(Page 29)
8
Move Hall sensor funtion to USB/B.(Page 24)
9
Add R828 100K PD for MAINON. Upgrade U27 from AJ085870F02 to AJ085870F03. (Page33)
10
Collect netname +V1.05S_VCCPCPU to +V3.3S_VCCSDIO. (Page11)
11
Q7 change from PMF780SN to BAM70020002. (Page25)
12
Correct U41 footprint to ssop5-p-a-toshiba-b. (Page23)
13
Change LED5,LED6 P/N from BEB00024ZA0 to BEB00028ZA0. (Page27)
14
Del Q5, Q47,R51,R25 , add U56,C768 . (Page13)
15
DEL PL5,PL6,PL7,PL8 . (Page34_power)
16
Change PR145 from CS28872FB08 to CS29312FB13 . (Page38_Power)
17
18
C
20
21
Change PC123 from CC64704MZ10 to CH6104KEA00 . (Page40_Power)
22
Add PC152,PC153,PC154 to CH6104KEA00 . (Page40_Power)
23
Change PL12,PL13 from CV+24P0MZ00 to CV+36T0MZ01 10X10 size . (Page40_Power)
24
SWAP USB0 and USB1 . (Page09)
25
Change CN27 to DFHS52FR044 ,same as CN18 (Page 26)
26
add CN12 PIN4 for USBPWR3. (Page 31)
27
CN9 change frootprint to dp-adis0022-p001a-20p-smt. (Page 23)
28
Depop R728 and Pop R727 to sove Deep S3 can't wakep issue. (Page 10)
29
Del C429. (Page20)
Change CN9 PN to DFTD20FR001 . (Page23)
32
Add C735_0.1u for Vendor request . (Page28)
33
Add C736_0.1u and reserve C727_4.7u for Vendor request . (Page29)
34
Change R348 Pu hign to +3V . (Page28)
35
TEMP_MBAT from battery connect pin 5 to pin 6 (BATT_EN#) . (Page34)
36
Change R354(PCH_PWROK) from 10 k to 100K . (Page07)
37
Reserve R808 ,R810_0 Ohm . (Page30)
38
Change JP18 Packing and PN same as JP19 . (Page37)
39
Add R835 for Vendor request. (Page23)
40
Change R491 from 1M to 5.1M . (Page23)
41
Change R691 from 121 to 120ohm(Intel Check list) . (Page04)
42
Change SUSLED# power from +3V_S5 to +3V_PCU . (Page27)
43
Change CN13 to DFHS40FS047 (H=4) ,due to PE request. Footprint is “gs12401-1011-40p-r-nh-smt. (Page24)
VGPU_PSI Pull high from +3V to +3V_S5. (Page40)
B-SMT USE RTL8411BA-CG need Depop R295 and change U21 PN to AL008411004. (Page28)
46
C590,C591 change from 18P to 12P(Y6). (Page09)
47
C278,C284 change from 27P to 12P(Y8). (Page28)
Depop R147,R106,R94,R534 and Pop R91,R95,R146,R533 to support Qual Mode. (Page10)
49
Pop PR184. (Page40_Power)_內
內內內內
50
Change PU8 from AL001642000 to AL001642001. (Page40_Power)_內
內內內內
51
PC6 EOD Part change to CH4331K9B06. (Page38_Power)
52
PC5,PC85 EOD Part change to CH21506KB14. (Page38,39_Power)
53
Change U27 from AJ085870F03 to AJ085870F04. (Page33)_內
內內內內
54
Add level Shift funtion. (Page25)
55
Depop PR75. (Page40_Power)_內
內內內內
56
Change PC15 to 1000p_50V(CH21006JB10). (Page38_Power)_內
內內內內
57
Depop PR75. (Page40_Power)_內
內內內內
1
Depop R226, Pop Q26(BAM70020002) ,R795 (CS31002FB26) for CG6 funtion.(Page19)
2
Swap Pin 25 and Pin 32.(Page33)
3
Del D31,C519 , and Add Q69,C738,C822,C823,C824 for SDA request.(Page23)
4
Add Test Pad on SW5 ,SW8 for SMT request.(Page27,33)
5
Add C317_4.7u for Vendor request.(Page28)
6
SWAP CLKOUT_PCIE.(Page09)
7
Pop R477, R478, R479, R480 _100ohm(CS11002FB22)for HDMI EMI Issue.(Page25)
8
Pop C655,C654_10p(CH01006JB08) for SD CLK EMI issue .(Page29)
9
Pop Bitclk C399_22p(CH02206JB08) for EMI issue .(Page30)
10
DePop PR117 .(Page34)
11
C285 change from 0402 to 0603 size .(Page28)
12
Del CN5,C272,C253 footprint .(Page13)
13
Depop R336 ,Pop R333 for Lan can't link to exlorer .(Page28)
14
Depop R348 .(Page28)
15
Reserve R812 for PCIE_LAN_WAKE# .(Page26)
16
Add R815,C740 and pop R310 for softstart of Lan VCC.(Page28)
17
R608 connect to CLK_PCIE_REQ4# .(Page09)
18
Depop SW5 .(Page33)
B
19
Del JP Resistor 0.001/F_3720 (CS+0018FL00): JP5,JP6,JP10,JP11,JP12,JP13,JP14,JP15,JP17,JP18,JP19,JP20,JP21,JP16.
20
Del 0_4 (CS00002JB38) to SHORT PAD_4 : PR8,PR9,PR11,PR13,PR16,PR18,PR30,PR35,PR38,PR44,PR61,PR66,PR83,PR106,
PR131,PR139,PR165,PR170,PR178,PR180,PR185,PR191,PR193,PR194,PR196,PR200,PR204,PR205,PR209,PR211,PR217,PR186
21
Del 0_6 (CS00003J951) to SHORT PAD_6 : PR31,PR46,PR54,PR77,PR90,PR181,PR201,PR203,PR215,PR158
22
Del 0_8 (CS00004JA40) to SHORT PAD_8 : PR136
23
Add R813_0 OHM.(Page26)
24
25
A
C
45
48
3A
Add R826(VRON) ,R827SON) 100k to Gnd. (Page33)
31
44
B
Change PR129 from CS22672FB12 to CS22702FB14 . (Page38_power)
19
30
D
Change C740 from 0603 ot 0402 size.(Page28)
Depop Q39 , R276,Pop R321 and change R320 to 1K to meet Lanwake signal spec.(Page28)
A
Depop L9,L11,L31,L28 , and Pop R34,R47,R49,R55,R490,R487,R485,R481.(Page28)
26
27
Del JP7, JP8, JP9(CS+001AGM13).(Page05)
Change to 0402 shortpad:R45,R69,R173,R215,R236,R237,R239,R274,R277,R283,R288,R311,R328,R334,R353,R404,R409,R419,R423,R424,R425,R426,R430,R432,R434,R448,R449,R450,
R513,R570,R573,R587,R591,R596,R625,R641,R652,R653,R678,R695,R712,R719,R722,R733,R734,R735,R736,R741,R758,R759,R760,R761,R762,R763,R764,R765,
DOC NO.
28
Change to 0603 shortpad:R107,R111,R158,R194,R197,R212,R229,R233,R234,R252,R269,R298,R303,R304,R338,R350,R351,R352,R356,R358,RR411,415,R418,R422,R431,R433,R440,R441,
29
R442,R443,R444,R445,R446,R447,R540,R745,R766,R767
Change to 0805 shortpad:R165,R174,R179,R190,R217,R268,R270,R452,R470,R559,R560,R732,R737,R749
30
Change R408,R420 from 47 ohm to 56 ohm.(Page30)
31
Change R411, R422 from shortpad to 0603 footprint.(Page30)
PROJECT MODEL
:
ZRQ
APPROVED BY:
DATE:
DRAWING BY:
REVISON:
PROJECT : ZRQ
Size
PART NUMBER:
4
3
Rev
3A
Change list-1
Date:
5
Document Number
2
Sheet
1
46
of
47
5
4
Version
Model
3B
ZRQ
D
3
2
1
CHANGE LIST
R276 change fro m 10K to 1K , Depop R320. (PCIE_LAN_WAKE#)_內
內內內內
1
2
Change C24 KB Conn PN to DFFC26FR063 .(Page 32)_內
內內內內
3
Change U27 EC to E version AJ085870F05 .(Page 33)_內
內內內內.
4
Fine tune Amp Gain =>R422,R411 change from 0 ohm to 1k , and pop R421,R410 to 1.62K .(Page 30)
5
Change TEMP_MBAT from Pin 6 to Pin 5 of PJ1 .(Page 34)
6
Depop Q24 , and Add R228 to solve level abnormal issue for CG6 .(Page 19)
7
Add R816 and net "LB_PWR_CNN_Q" to stuff Q69 always for safety issue .(Page 19)
8
Reserve R855,R859 and add R854,R857 .(Page 23)
9
10
For WHQL Change USB Port1 and Port4
Add new on Board RAM HYNIX H5TC4G63AFR-PRBA RAM ID:0000
11
Del L35,L36,L6,L7,L8,L29,L12,L13,L32,L16,L34
D
3C
1
Change to 0402 shortpad: R725,R724,R711,R716,R26,R27,R28,R29,R32,R33,R483,R484,R493,R492,R56,R57,R58,R59,
R90,R89,R660,R664,R702,R638,R639,R651,R225,R346,R355,R778,R785,R790,R73 , R455,R456,R457,R458,R459,R343,R406,R596
2
For HDMI 7-2 issue change R37,R38,R39,R40,R41,R42,R43,R44 To 470 ohm and remove R478,R479,R477,R480 (Page 25)
3
For TI HD3SS2521 issue R77,R79,R502,R503 need mount 10K, change R528 from 100 ohm to 0 ohm and remove R854,R857 , add R855,R859. (Page 23)
4
Change to 0603 shortpad: R373,R337,R382,R297,R235,R326,R322,L38,R385,R220,R254,R359
3F
1. Add C245 for intel request for G3 can't boot issue
C
C
B
B
A
A
DOC NO.
PROJECT MODEL
:
ZRQ
APPROVED BY:
DATE:
DRAWING BY:
REVISON:
PROJECT : ZRQ
Size
PART NUMBER:
4
3
Rev
3A
Change list-2
Date:
5
Document Number
2
Sheet
1
47
of
47

drc pc55

Transcription

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