Compal LA-4841P - Schematics. www.s

Transcription

A
B
C
D
E
1
1
Compal Confidential
2
2
Schematic Document
Cantiga + ICH9
2008 / 12 / 10
Rev:1.0
3
3
4
4
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2007/1/15
2008/1/15
Deciphered Date
Title
Cover Sheet
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
1.0
LA-4841P
Date:
A
B
C
D
Sheet
Monday, December 15, 2008
E
1
of
45
A
B
C
Compal confidential
D
E
MLK 14
File Name : LA-4841P
ZZZ1
1
Thermal Sensor
ADT7421ARMZ
PCB
Penryn -4MB (Socket P)
1
uFCPGA-478 CPU
P.4
P.4,5,6
Fan conn
CRT
P.4
H_A#(3..35)
667/800MHz 1.05V
P.15
DDR2 667/800MHz 1.8V
Intel Cantiga MCH
LVDS Panel Interface
MXM II VGA/B
NB9M-GS 512M
P.33
P.16
TSSOP-64
Clock Generator
ICS9LPRS397AKLFT
FSB
H_D#(0..63)
P.17
CK505
DDR2-SO-DIMM X2
BANK 0, 1, 2, 3
P.13,14
Dual Channel
1329pin BGA
USB conn x 4
P.7,8,9,10,11,12
P.30
2
2
PCI
CardBus Controller
O2MICRO OZH24
DMI X4
C-Link
P.26
USB2.0
1394
Intel ICH9-M
Media Card
676pin BGA
PCI-E BUS
Azalia
BT Conn
SATA Slave
Camera
P.18,19,20,21
10/100/1000 LAN
REALTEK P.22
RTL8111C-GR
Mini-CardX1
(WLAN)
P.24
Mini-CardX1
P.30
SATA Master
Express Card
P.30
Express Card
P.27
P.27
P.24
3
3
Mini-Card-3
P.23
RJ45/11 CONN
LPC BUS
Audio CODEC
ALC272
P.25
AMP & Audio Jack
P.25
ENE KB926
P.28
SATA HDD Connector
Touch Pad CONN.
Power On/Off CKT.
P.29
Int.KBD
P.29
P.23
BIOS(System/EC)
P.28
CDROM Conn.
P.23
4
DC/DC Interface CKT.
RTC CKT.
Power Circuit DC/DC
Power OK CKT.
Compal Secret Data
2007/1/15
Issued Date
2008/1/15
Deciphered Date
Title
4
Block diagram
Rev
1.0
LA-4841P
Date:
A
B
C
D
Sheet
E
2
of
45
A
Voltage Rails
O MEANS ON
X MEANS OFF
Symbol Note :
+5VS
+3VS
: means Digital Ground
+1.5VS
power
plane
+0.9V
+VCCP
+5VALW
+1.8V
: means Analog Ground
+CPU_CORE
+B
+3VALW
@ : means just reserve , no build
DEBUG@ : means just reserve for debug.
+VGA_CORE
+2.5VS
+1.8VS
State
+1.2VS
+0.9VGA
1
S0
O
O
O
O
S1
O
O
O
O
S3
O
O
O
X
S5 S4/AC
O
O
X
X
S5 S4/ Battery only
O
X
X
X
S5 S4/AC & Battery
don't exist
X
X
X
X
SMBUS Control Table
1
SOURCE
INVERTER
BATT
SERIAL
EEPROM
THERMAL
SENSOR
(CPU)
SODIMM
CLK CHIP
LCD
MINI CARD
X
X
V
X
V
X
X
V
X
X
X
X
X
X
X
X
ICH9
X
X
X
X
V
V
V
X
Cantiga
X
X
X
X
X
X
X
V
SMB_EC_CK1
SMB_EC_DA1
KB926
SMB_EC_CK2
SMB_EC_DA2
KB926
SMB_CK_CLK1
SMB_CK_DAT1
LCD_CLK
LCD_DAT
I2C / SMBUS ADDRESSING
DEVICE
HEX
ADDRESS
DDR SO-DIMM 0
A0
10100000
DDR SO-DIMM 1
A4
10100100
CLOCK GENERATOR (EXT.)
D2
11010010
Compal Secret Data
2005/03/10
Issued Date
Deciphered Date
2006/03/10
Title
Notes List
Rev
1.0
LA-4841P
Date:
A
Sheet
3
of
45
5
4
3
2
1
No need in check list
XDP_DBRESET#
@ R51
1
2
1K_0402_5%
XDP_TDI
R5
1
2
54.9_0402_1%
XDP_TMS
R4
1
2
54.9_0402_1%
+VCCP
D
H_A20M#
H_FERR#
H_IGNNE#
19
19
19
19
H_STPCLK#
H_INTR
H_NMI
H_SMI#
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1
A6
A5
C4
A20M#
FERR#
IGNNE#
H_STPCLK#
H_INTR
H_NMI
H_SMI#
D5
C6
B4
A3
STPCLK#
LINT0
LINT1
SMI#
M4
N5
T2
V3
B2
D2
D22
D3
F6
RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
H1
E2
G5
H_ADS#
H_BNR#
H_BPRI#
H5
F21
E1
H_DEFER#
H_DRDY#
H_DBSY#
F1
H_BR0#
IERR#
INIT#
D20
B3
H_IERR#
H_INIT#
LOCK#
H4
H_LOCK#
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
C1
F3
F4
G3
G2
H_RESET#
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
HIT#
HITM#
G6
E4
H_HIT#
H_HITM#
BR0#
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#
H_A20M#
H_FERR#
H_IGNNE#
B
DEFER#
DRDY#
DBSY#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
THERMAL
PROCHOT#
THERMDA
THERMDC
ICH
19
19
19
K3
H2
K2
J3
L1
ADS#
BNR#
BPRI#
ADDR GROUP_1
H_ADSTB#1
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#1
C
7
A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
1
2
54.9_0402_1%
R35
1
2
54.9_0402_1%
THERMTRIP#
H_DEFER# 7
H_DRDY# 7
H_DBSY# 7
H_BR0#
7
H_INIT#
19
H_LOCK# 7
H_RESET# 7
H_RS#0 7
H_RS#1 7
H_RS#2 7
H_TRDY# 7
H_HIT# 7
H_HITM# 7
C
+3VS
XDP_TCK
XDP_TDI
XDP_TMS
XDP_TRST#
XDP_DBRESET#
XDP_DBRESET# 20
H_PROCHOT#
R146
2
1 56_0402_5%
D21
A24
B25
H_THERMDA_R
H_THERMDC_R
R57
R53
1
1
2 100_0402_5%
2 100_0402_5%
C7
H_THERMTRIP#
C5
1
+VCCP
H_THERMDA
H_THERMDC
H_THERMTRIP# 7,19
+3VS
H_THERMDA, H_THERMDC routing together,
Trace width / Spacing = 10 / 10 mil
H CLK
BCLK[0]
BCLK[1]
H_ADS# 7
H_BNR# 7
H_BPRI# 7
0.1U_0402_16V4Z
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#[17..35]
J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1
CONTROL
7
7
7
7
7
7
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_ADSTB#0
XDP/ITP SIGNALS
H_ADSTB#0
R11
XDP_TCK
This shall place near CPU
ADDR GROUP_0
7
D
XDP_TRST#
CONN@
JCPU1A
H_A#[3..16]
A22
A21
CLK_CPU_BCLK
CLK_CPU_BCLK#
Thermal Sensor EMC1402-1-ACZL-TR
1
C13
2
U2
1
VDD
SCLK
8
EC_SMB_CK2
H_THERMDA
2
D+
SDATA
7
EC_SMB_DA2
H_THERMDC
2
2200P_0402_50V7K
L_THERM#
3
D-
ALERT#
6
4
THERM#
GND
5
R16
1
2
10K_0402_5%
EC_SMB_CK2 29,33
EC_SMB_DA2 29,33
EMC1402-2-ACZL-TR MSOP 8P
Address:100_1100
CLK_CPU_BCLK 15
CLK_CPU_BCLK# 15
C76
10U_1206_16V4Z~N
2
1
+5VS
C88
1000P_0402_50V7K~N
2
1
FAN Control circuit
RESERVED
7
+3VS
B
C77
1
2
10U_1206_16V4Z~N
U3
1
2
3
4
FAN1_POWER
29
EN_DFAN1
EN_DFAN1
+3VS
8
7
6
5
JFAN1
40mil
R61
10K_0402_5%
1
2
3
1
2
3
4
5
GND
GND
29 FAN_SPEED1
@
R17
56_0402_5%
2
C94
0.01U_0402_16V7K
ACES_85205-03001
CONN@
1
2 2
1
2
+VCCP
GND
GND
GND
GND
RT9027BPS SO 8P
1
Penryn
VEN
VIN
VO
VSET
FAN1
B
E
H_PROCHOT#
C
OCP#
3
1
@ Q2
MMBT3904_SOT23
OCP#
20
+VCCP
A
2
A
1
R18
56_0402_5%
Compal Secret Data
H_IERR#
2006/02/13
Issued Date
2006/03/10
Deciphered Date
Title
Penryn(1/3)-AGTL+/ITP-XDP
Rev
1.0
LA-4841P
Date:
5
4
3
2
Sheet
1
4
of
45
4
3
2
1
+CPU_CORE
2 1K_0402_5%
2 1K_0402_5%
T2
T3
No need in
T4
T5
check list
T6
15 CPU_BSEL0
15 CPU_BSEL1
15 CPU_BSEL2
1
1
AD26
C23
D25
C24
AF26
AF1
A26
C3
B22
B23
C21
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
BSEL[0]
BSEL[1]
BSEL[2]
MISC
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DSTBN#3
H_DSTBP#3
H_DINV#3
R26
U26
AA1
Y1
COMP0
COMP1
COMP2
COMP3
E5
B5
D24
D6
D7
AE6
H_DPRSTP#
H_DPSLP#
H_DPWR#
H_PWRGOOD
H_CPUSLP#
H_PSI#
DATA GRP 2
V_CPU_GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
H_DSTBN#2 7
H_DSTBP#2 7
H_DINV#2 7
H_D#[48..63] 7
H_DSTBN#3 7
H_DSTBP#3 7
H_DINV#3 7
H_DPRSTP# 7,19,43
H_DPSLP# 19
H_DPWR# 7
H_PWRGOOD 19
H_CPUSLP# 7
H_PSI#
43
To IMVP
Penryn
layout note: Rout H_DPRSTP# from ICH9 to IMVP6 then to GMCH & CPU
layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs
CPU_BSEL
166
0
CPU_BSEL1
1
CPU_BSEL0
1
200
0
1
0
266
0
0
0
R24
R25
R26
Resistor placed within
0.5" of CPU pin.Trace
should be at least 25
mils away from any other
toggling signal.
COMP[0,2] trace width is
18 mils. COMP[1,3] trace
width is 4
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
VCCA[01]
VCCA[02]
B26
C26
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
AD6
AF5
AE5
AF4
AE3
AF3
AE2
VCCSENSE
AF7
VCCSENSE
VSSSENSE
AE7
VSSSENSE
D
+VCCP
C
Check 220u?
1
+ C10
330U_D2E_2.5VM_R7
2
0814 Change to 220uF
0819 Change to C_D2E
+1.5VS
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
43
43
43
43
43
43
43
1
C12
2
1
C11
2
VCCSENSE 43
Near pin B26
No stuff 27.4 pull down near IMVP for testing
VSSSENSE 43
B
Penryn
.
For 8 layer condition
Length match within 25 mils.
The trace width/space/other is
20/7/25.
+VCCP
1
B
CPU_BSEL2
R23
27.4_0402_1%
2
1
@ R52
@ R22
H_DSTBN#1
H_DSTBP#1
H_DINV#1
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
+CPU_CORE
CONN@
JCPU1C
7
54.9_0402_1%
2
1
7
7
7
N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24
DATA GRP 1
C
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DSTBN#1
H_DSTBP#1
H_DINV#1
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DSTBN#2
H_DSTBP#2
H_DINV#2
27.4_0402_1%
2
1
H_DSTBN#0
H_DSTBP#0
H_DINV#0
H_D#[16..31]
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
54.9_0402_1%
2
1
7
7
7
7
E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25
DATA GRP 0
D
H_D#[32..47]
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H_DINV#0
0.01U_0402_16V7K
CONN@
JCPU1B
H_D#[0..15]
DATA GRP 3
7
10U_0805_6.3V6M
5
For 6 layer
Z=27.4 ohm
VCCSENSE, VSSSENSE/ 14mils (MS),
16mils (SL) width, 7mils space, 25mils
space to other signals Mismatch =25mils.
1
V_CPU_GTLREF
2
R27
1K_0402_1%
R28
1
2 100_0402_1%
VCCSENSE
R30
1
2 100_0402_1%
VSSSENSE
2
R29
2K_0402_1%
+CPU_CORE
Close to CPU pin AD26
within 500mils.
Close to CPU pin
within 500mils.
A
A
Compal Secret Data
2006/02/13
Issued Date
2006/03/10
Deciphered Date
Title
Rev
1.0
LA-4841P
Date:
5
4
3
2
Sheet
1
5
of
45
5
4
3
2
1
High Frequence Decoupling
10uF 0805 X5R -> 85 degree.
Place these caps inside
the CPU socket.
+CPU_CORE
D
CONN@
JCPU1D
C
( Left side on Top ).
2
1
C202
10U_0805_6.3V6M
2
1
C529
10U_0805_6.3V6M
2
1
C232
10U_0805_6.3V6M
2
1
C255
10U_0805_6.3V6M
2
1
C505
10U_0805_6.3V6M
2
1
C504
10U_0805_6.3V6M
2
1
C254
10U_0805_6.3V6M
2
1
C257
10U_0805_6.3V6M
2
1
( Right side on Top side).
2
D
C214
10U_0805_6.3V6M
the CPU socket.
+CPU_CORE
the CPU socket cavity.
1
C162
10U_0805_6.3V6M
2
1
C197
10U_0805_6.3V6M
2
1
C252
10U_0805_6.3V6M
2
1
C190
10U_0805_6.3V6M
2
1
C203
10U_0805_6.3V6M
2
1
C200
10U_0805_6.3V6M
2
1
C161
10U_0805_6.3V6M
2
1
C199
10U_0805_6.3V6M
2
1
C208
10U_0805_6.3V6M
2
( Right side on Top ).
C226
10U_0805_6.3V6M
+CPU_CORE
1
( Left side on Bottom ).
2
1
C501
10U_0805_6.3V6M
2
1
C508
10U_0805_6.3V6M
2
1
C514
10U_0805_6.3V6M
2
1
C519
10U_0805_6.3V6M
2
1
C522
10U_0805_6.3V6M
2
C533
10U_0805_6.3V6M
C
+CPU_CORE
1
( Right side on Bottom ).
2
1
C502
10U_0805_6.3V6M
2
1
C510
10U_0805_6.3V6M
2
1
C515
10U_0805_6.3V6M
2
1
C520
10U_0805_6.3V6M
2
1
C526
10U_0805_6.3V6M
2
C532
10U_0805_6.3V6M
+CPU_CORE
2
1
+
2
1
+
2
330U_D2E_2.5VM_R9
+
C250
2
1
C258
+
330U_D2E_2.5VM_R9
1
C198
the CPU socket.
330U_D2E_2.5VM_R9
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
C196
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
1
330U_D2E_2.5VM_R9
B
A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3
ESR <= 1.5m ohm
the CPU socket.
B
Capacitor > 880 uF
( Right side on Top side).
Place these inside
socket cavity on L8
(North side
Secondary)
+VCCP
Penryn
.
1
2
1
C213
0.1U_0402_10V6K
2
C209
0.1U_0402_10V6K
1
2
C212
0.1U_0402_10V6K
1
2
1
C185
0.1U_0402_10V6K
2
1
C183
0.1U_0402_10V6K
2
C184
0.1U_0402_10V6K
A
A
Compal Secret Data
2006/02/13
Issued Date
2006/03/10
Deciphered Date
Title
Rev
1.0
LA-4841P
Date:
5
4
3
2
Sheet
1
6
of
45
H_RS#_0
H_RS#_1
H_RS#_2
B6
F12
C8
H_RS#0
H_RS#1
H_RS#2
H_CPURST#
H_CPUSLP#
B
H_VREF
A11
B11
H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4
H_BPRI# 4
H_BR0#
4
H_DEFER# 4
H_DBSY# 4
CLK_MCH_BCLK 15
CLK_MCH_BCLK# 15
H_DPWR# 5
H_DRDY# 4
H_HIT#
4
H_HITM# 4
H_LOCK# 4
H_TRDY# 4
20,29,43 VGATE
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
5
5
5
5
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
5
5
5
5
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
4
4
4
4
4
H_RS#0
H_RS#1
H_RS#2
4
4
4
2
+1.8V
1
C386
1
2
R42
1K_0402_1%
V_DDR_MCH_REF
1
2
R43
1K_0402_1%
C121
2
CFG9
CFG12
CFG13
CFG16
CFG19
CFG20
PM_BMBUSY#
H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1
PM_PWROK_R
PLT_RST#_NB
THERMTRIP#
DPRSLPVR
T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
R29
B7
N33
P32
AT40
AT11
T20
R32
BG48
BF48
BD48
BC48
1
1
C55 @
C53 @
BH47
BG47
10P_0402_50V8J
BE47
2
2 10P_0402_50V8J
BH46
BF46
BG45
BH44
BH43
BH6
BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1
F1
A47
SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1
BC28
AY28
AY36
BB36
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1
BA17
AY16
AV16
AR13
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1
BD17
AY17
BF15
AY13
M_ODT0
M_ODT1
M_ODT2
M_ODT3
SM_RCOMP
SM_RCOMP#
BG22
BH21
SMRCOMP
SMRCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
BF28
BH28
SMRCOMP_VOH
SMRCOMP_VOL
SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#
AV42
AR36
BF17
BC36
V_DDR_MCH_REF
B38
A38
E41
F41
CLK_MCH_DREFCLK
CLK_MCH_DREFCLK#
MCH_SSCDREFCLK
MCH_SSCDREFCLK#
F43
E43
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
AE41
AE37
AE47
AH39
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
AE40
AE38
AE48
AH40
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
AE35
AE43
AE46
AH42
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
AD35
AE44
AF46
AH43
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4
B33
B32
G33
F33
E33
T30
T31
T32
T33
T34
GFX_VR_EN
C34
T35
PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
AH37
AH36
AN36
AJ35
AH34
PEG_CLK
PEG_CLK#
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
13
13
14
14
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
13
13
14
14
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
13
13
14
14
M_ODT0
M_ODT1
M_ODT2
M_ODT3
R328
R329
SM_REXT
TP_SM_DRAMRST#
R39
R40
13
13
14
14
D
13
13
14
14
+1.8V
2 80.6_0402_1%
2 80.6_0402_1%
1
1
2 10K_0402_1%
2 499_0402_1%
1
1
T29 PAD
CLK_MCH_DREFCLK 15
CLK_MCH_DREFCLK# 15
MCH_SSCDREFCLK 15
MCH_SSCDREFCLK# 15
CLK_MCH_3GPLL 15
CLK_MCH_3GPLL# 15
C
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
20
20
20
20
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
20
20
20
20
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
20
20
20
20
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
20
20
20
20
B
+VCCP
CL_CLK0
CL_DATA0
M_PWROK
CL_RST#
CL_VREF
CL_CLK0 20
CL_DATA0 20
M_PWROK 20
CL_RST# 20
R100
1K_0402_1%
CL_VREF
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#
N28
M28
G36
E36
K36
H36
CLKREQ#_7
MCH_ICH_SYNC#
TSATN#
B12
TSATN#
HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC
B28
B30
B29
C29
A28
T36
T48
T63
T64
C181
0.1U_0402_16V4Z
1
R99
511_0402_1%
2
CLKREQ#_7 15
MCH_ICH_SYNC#
20
TSATN#
2
1
R521 56_0402_5%
T99
T100
T101
T102
T103
+VCCP
0814 Add pull up R
A
0905 Add test point
CANTIGA_1p0
Compal Secret Data
within 100 mils from NB
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
CLK
CFG5
CFG6
CFG7
H_DPRSTP#
1
221_0603_1%
2
1
13,14 V_DDR_MCH_REF
MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2
PM_PWROK_R
2
0_0402_5%
2
0_0402_5%
R322
R323
1
2
R523 100_0402_5%
2
0_0402_5%
2
R324
PLT_RST#
1
R56
Layout Note:
V_DDR_MCH_REF
trace width and
spacing is 20/20.
H_SWNG
2
20 PM_BMBUSY#
5,19,43 H_DPRSTP#
13 PM_EXTTS#0
14 PM_EXTTS#1
AR24
AR21
AU24
AV20
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
10K_0402_5%
15 MCH_CLKSEL0
15 MCH_CLKSEL1
15 MCH_CLKSEL2
PAD T8
PAD T9
9
CFG5
9
CFG6
9
CFG7
PAD T37
9
CFG9
PAD T65
PAD T40
PAD T67
PAD T47
PAD T10
PAD T66
9
CFG16
PAD T68
PAD T39
9
CFG19
9
CFG20
1
R408
1
@ R407
0.1U_0402_16V4Z
C391
R83
1
0913 Delete V_DDR_MCH_REF from POWER circuit
0.1U_0402_16V4Z
1
100_0402_1%
2
1
0.1U_0402_16V4Z
R46
H_RCOMP
24.9_0402_1%
2
1
1K_0402_1%
1
2
2K_0402_1%
2
1
A
H_VREF
2
NC
R45
RSVD22
RSVD23
RSVD24
RSVD25
PM
20,29 ICH_PWROK
+VCCP
T41
T44
T73
T74
BG23
BF23
BH18
BF18
10K_0402_5%
PM_EXTTS#1
5
5
5
5
18,22,24,28,29,33 PLT_RST#
4,19 H_THERMTRIP#
20,43 DPRSLPVR
+VCCP
RSVD20
SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1
DMI
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
R82
1
PM_EXTTS#0
CANTIGA_1p0
Layout Note:
H_RCOMP / H_VREF / H_SWNG
trace width and spacing is 10/20
AY21
+3VS
H_AVREF
H_DVREF
H_RCOMP Dual core 24.9 ohm_1% pull down
Quad core 16.9 ohm_1% pull down
H_SWNG Dual core 100 ohm_1% pull down
Quad core 75 ohm_1% pull down
T28
R333
1K_0402_1%
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
1
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
2
RSVD15
RSVD16
RSVD17
AP24
AT21
AV24
AU20
2
B15
K13
F13
B13
B14
2
1
T25
T26
T27
B31
B2
M1
SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1
1
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
1
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
DDR CLK/ CONTROL/COMPENSATION
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
1
L9
M8
AA6
AE5
2
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
1
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
2
L10
M7
AA5
AE6
SMRCOMP_VOL
NA lead free
1
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
R332
3.01K_0402_1%
2
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
C400
J8
L3
Y13
Y1
0.01U_0402_25V7K
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
2
R331
1K_0402_1%
SMRCOMP_VOH
C404
H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DBSY#
CLK_MCH_BCLK
CLK_MCH_BCLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
2.2U_0603_6.3V4Z
C398
H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9
2
1
M36
N36
R33
T33
AH9
AH10
AH12
AH13
K12
AL34
AK34
AN35
AM35
T24
2
C12
E11
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
1
+1.8V
T7
T11
T12
T13
T14
T15
T16
T17
T18
T19
T20
T21
T22
T24
GRAPHICS VID
H_RESET#
H_CPUSLP#
H_RESET#
H_CPUSLP#
H_SWING
H_RCOMP
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
ME
C5
E3
A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20
CFG
H_SWNG
H_RCOMP
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
MISC
C
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
0.01U_0402_25V7K
D
F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
M11
J1
J2
N12
J6
P2
L2
R2
N9
L6
M5
J3
N2
R1
N5
N6
P13
N8
L7
N10
M3
Y3
AD14
Y6
Y10
Y12
Y14
Y7
W2
AA8
Y9
AA13
AA9
AA11
AD11
AD10
AD13
AE12
AE9
AA2
AD8
AA3
AD3
AD7
AE14
AF3
AC1
AE3
AC3
AE11
AE8
AG2
AD6
1
RSVD
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
2
U4B
2.2U_0603_6.3V4Z
C403
U4A
H_D#[0..63]
4
5
3
H_A#[3..35] 4
HOST
5
4
HDA
5
Near B3 pin
2006/02/13
Issued Date
2006/03/10
Deciphered Date
Title
Cantiga(1/6)-AGTL/DMI/DDR
Rev
1.0
LA-4841P
Date:
5
4
3
2
Sheet
1
7
of
45
5
4
3
2
1
D
D
14 DDR_B_D[0..63]
B
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
SA_RAS#
SA_CAS#
SA_WE#
BB20
BD20
AY20
DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14
BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
A
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_A_BS#0 13
DDR_A_BS#1 13
DDR_A_BS#2 13
DDR_A_RAS# 13
DDR_A_CAS# 13
DDR_A_WE# 13
DDR_A_DQS[0..7]
DDR_A_DQS#[0..7]
DDR_A_MA[0..14]
13
13
13
13
CANTIGA_1p0
AK47
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
B
BD21
BG18
AT25
MEMORY
SA_BS_0
SA_BS_1
SA_BS_2
DDR_A_DM[0..7]
MEMORY
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
SYSTEM
C
AJ38
AJ41
AN38
AM38
AJ36
AJ40
AM44
AM42
AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36
AW36
BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12
BB9
BA9
AU10
AV9
BA11
BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5
AN10
AM11
AM5
AJ9
AJ8
AN12
AM13
AJ11
AJ12
DDR
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
U4E
SYSTEM
U4D
DDR
13 DDR_A_D[0..63]
SB_BS_0
SB_BS_1
SB_BS_2
BC16
BB17
BB33
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
SB_RAS#
SB_CAS#
SB_WE#
AU17
BG16
BF14
DDR_B_RAS#
DDR_B_CAS#
DDR_B_WE#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14
AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_BS#0 14
DDR_B_BS#1 14
DDR_B_BS#2 14
DDR_B_RAS# 14
DDR_B_CAS# 14
DDR_B_WE# 14
DDR_B_DM[0..7]
14
DDR_B_DQS[0..7]
DDR_B_DQS#[0..7]
DDR_B_MA[0..14]
14
14
C
14
B
CANTIGA_1p0
A
A
Compal Secret Data
2006/02/13
Issued Date
2006/03/10
Deciphered Date
Title
Cantiga(2/6)-DDR2 A/B CH
Rev
1.0
LA-4841P
Date:
5
4
3
2
Sheet
1
8
of
45
5
4
3
2
1
U4C
R56 within 500 mils from
pin T37,T36
16 BIA_PWM
16 GMCH_ENBKL
R81 1
+3VS
R80
1
16 GMCH_EDID_CLK_LCD
16 GMCH_EDID_DAT_LCD
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
2 10K_0402_5% UMA@ CTRL_DATA
GMCH_EDID_CLK_LCD
GMCH_EDID_DAT_LCD
M33
K33
J33
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
2.4K for check
list
M29
16 GMCH_LVDSA016 GMCH_LVDSA116 GMCH_LVDSA2T38
GMCH_LVDSA0GMCH_LVDSA1GMCH_LVDSA2GMCH_LVDSA3-
16 GMCH_LVDSA0+
16 GMCH_LVDSA1+
16 GMCH_LVDSA2+
T46
GMCH_LVDSA0+
GMCH_LVDSA1+
GMCH_LVDSA2+
GMCH_LVDSA3+
L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
H47
E46
G40
A40
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3
H48
D45
F40
B40
A41
H38
G37
J37
GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA
F25
H25
K25
TVA_DAC
TVB_DAC
TVC_DAC
H24
TV_RTN
C31
E32
TV_DCONSEL_0
TV_DCONSEL_1
1
2
150_0402_1%
UMA@
R75
R76
1
2
150_0402_1%
UMA@
G28
CRT_GREEN
J28
CRT_RED
G29
CRT_IRTN
H32
J32
J29
E29
L29
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC
+VCC_PEG
Strap Pin Table
PEGCOMP trace width
and spacing is 20/25 mils.
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39
PEG_NRX_GTX_N0
PEG_NRX_GTX_N1
PEG_NRX_GTX_N2
PEG_NRX_GTX_N3
PEG_NRX_GTX_N4
PEG_NRX_GTX_N5
PEG_NRX_GTX_N6
PEG_NRX_GTX_N7
PEG_NRX_GTX_N8
PEG_NRX_GTX_N9
PEG_NRX_GTX_N10
PEG_NRX_GTX_N11
PEG_NRX_GTX_N12
PEG_NRX_GTX_N13
PEG_NRX_GTX_N14
PEG_NRX_GTX_N15
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40
PEG_NRX_GTX_P0
PEG_NRX_GTX_P1
PEG_NRX_GTX_P2
PEG_NRX_GTX_P3
PEG_NRX_GTX_P4
PEG_NRX_GTX_P5
PEG_NRX_GTX_P6
PEG_NRX_GTX_P7
PEG_NRX_GTX_P8
PEG_NRX_GTX_P9
PEG_NRX_GTX_P10
PEG_NRX_GTX_P11
PEG_NRX_GTX_P12
PEG_NRX_GTX_P13
PEG_NRX_GTX_P14
PEG_NRX_GTX_P15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
C568
C537
C538
C539
C540
C541
C542
C543
C544
C545
C546
C547
C548
C549
C550
C551
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
PEG_NTX_GRX_N0
PEG_NTX_GRX_N1
PEG_NTX_GRX_N2
PEG_NTX_GRX_N3
PEG_NTX_GRX_N4
PEG_NTX_GRX_N5
PEG_NTX_GRX_N6
PEG_NTX_GRX_N7
PEG_NTX_GRX_N8
PEG_NTX_GRX_N9
PEG_NTX_GRX_N10
PEG_NTX_GRX_N11
PEG_NTX_GRX_N12
PEG_NTX_GRX_N13
PEG_NTX_GRX_N14
PEG_NTX_GRX_N15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
C552
C553
C554
C555
C556
C557
C558
C559
C560
C561
C562
C563
C564
C565
C566
C567
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
VGA@ 0.1U_0402_16V7K
PEG_NTX_GRX_P0
PEG_NTX_GRX_P1
PEG_NTX_GRX_P2
PEG_NTX_GRX_P3
PEG_NTX_GRX_P4
PEG_NTX_GRX_P5
PEG_NTX_GRX_P6
PEG_NTX_GRX_P7
PEG_NTX_GRX_P8
PEG_NTX_GRX_P9
PEG_NTX_GRX_P10
PEG_NTX_GRX_P11
PEG_NTX_GRX_P12
PEG_NTX_GRX_P13
PEG_NTX_GRX_P14
PEG_NTX_GRX_P15
PEG_NRX_GTX_N[0..15]
PEG_NRX_GTX_N[0..15] 33
R74
CFG[4:3]
Reserved
CFG5 (DMI select)
0 = DMI x 2
1 = DMI x 4
0 = The iTPM Host Interface is enable
*
CFG6
1 = The iTPM Host Interface is disable
PEG_NRX_GTX_P[0..15]
PEG_NRX_GTX_P[0..15] 33
1 =(TLS)chiper suite with confidentiality
*
Reserved
CFG9
0 = Reverse Lane,15->0, 14->1
(PCIE Graphics Lane Reversal)
1 = Normal Operation,Lane Number in order
*
0 = Enable
1 = Disable
*
CFG11
Reserved
CFG[13:12] (XOR/ALLZ)
00
01
10
11
CFG[15:14]
Reserved
CFG16 (FSB Dynamic ODT)
0 = Disabled
= Reserved
= XOR Mode Enabled
= All Z Mode Enabled
= Normal Operation(Default)
1 = Enabled
PEG_NTX_GRX_P[0..15] 33
D
CFG8
CFG10 (PCIE Lookback enable)
PEG_NTX_GRX_N[0..15] 33
*
0 =(TLS)chiper suite with no confidentiality
CFG7 (Intel Management
Engine Crypto strap)
*
*
CFG[18:17]
Reserved
CFG19 (DMI Lane Reversal)
0 = Normal Operation
C
(Lane number in Order)
*
1 = Reverse Lane
CFG20 (PCIE/SDVO concurrent) 0 = Only PCIE or SDVO is operational.
*
1 = PCIE/SDVO are operating simu.
CANTIGA_1p0
R334
1.02K_0402_1%
UMA@
7
CFG5
7
CFG6
7
CFG7
7
CFG9
7
CFG16
@ R66
1
2 2.21K_0402_1%~D
@ R58
1
2 2.21K_0402_1%~D
@ R59
1
2 2.21K_0402_1%~D
@ R55
1
2 2.21K_0402_1%~D
@ R70
1
2 2.21K_0402_1%~D
CFG[5:16] have internal pullup
+3VS
R334
B
000 = FSB 1066MHz
010 = FSB 800MHz
011 = FSB 667MHz
Others = Reserved
CFG[2:0] FSB Freq select
PEG_COMPI
PEG_COMPO
2
0_0402_5%
R675
VGA@
R95
1
2
49.9_0402_1%
T37
T36
1
1
2
CRT_VSYNC
1
17 CRT_VSYNC
CRT_BLUE
2
R74
1
2
150_0402_1%
UMA@
3VDDCCL
3VDDCDA
CRT_HSYNC
E28
VGA
17 3VDDCCL
17 3VDDCDA
17 CRT_HSYNC
UMA@
R483 2.2K_0402_5%
1
2 GMCH_EDID_CLK_LCD
UMA@
R484 2.2K_0402_5%
1
2 GMCH_EDID_DAT_LCD
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3
CRT_B
CRT_G
CRT_R
0_0402_5%
R676
VGA@
+3VS
B42
G38
F37
K37
0_0402_5%
R144
1
1
0_0402_5%
R143
C
CRT_B
CRT_G
CRT_R
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3
2
2
2
1
0_0402_5%
R142
17
17
17
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3
TV
UMA place 75 ohm
GRAPHICS
GMCH_LVDSACGMCH_LVDSAC+
C44
B43
E37
E38
C41
C40
B37
A37
PCI-EXPRESS
16 GMCH_LVDSAC16 GMCH_LVDSAC+
2
2.37K_0402_1%~D
LVDS
For Cantiga:2.37kohm
For Crestline:2.4kohm
For Calero: 1.5Kohm
L32
G32
M32
GMCH_LVDDEN
1
R94
16 GMCH_LVDDEN
D
BIA_PWM
GMCH_ENBKL
2 10K_0402_5% UMA@ CTRL_CLK
7
CFG19
7
CFG20
@ R72
1
2 2.21K_0402_1%~D
@ R73
1
2 2.21K_0402_1%~D
B
R75
CFG[19:20] have internal pulldown
0_0402_5%
VGA@
0_0402_5%
VGA@
0_0402_5%
VGA@
R76
0_0402_5%
VGA@
A
A
Compal Secret Data
Issued Date
2006/02/13
Deciphered Date
2006/03/10
Title
Cantiga(3/6)-VGA/LVDS/TV
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Rev
1.0
LA-4841P
Date:
5
4
3
2
Sheet
1
9
of
45
5
4
+3VS_DAC_CRT
3
C56
C373
VTT
CRT
PLL
A LVDS
A PEG
AXF
VTTLF1
VTTLF2
VTTLF3
2
C66
10U_0805_10V4Z
HV
PEG
2
+1.5VS
+VCCP_D
R69
1
2
100_0603_1%
1
2
1
2
1
2
1
2
@ D3
2
+VCCP
@ R113
1
2
10_0402_5%
1
R114
1
2
0_0402_5%
+3VS_HV
CH751H-40PT_SOD323-2
+3VS
+1.8V_LVDS
UMA@
VGA@
40 mils
R110 UMA@
1
2
0_0603_5%
1
UMA@ 1
2
2
+1.8V
1
+1.8V_TXLVDS
C418
0_0603_5%
1
2 UMA@
1
2
10U_0805_10V4Z
0_0402_5%
2
C414
0_0402_5%
1
1000P_0402_50V7K
0_0402_5%
2
1U_0603_10V4Z
C186
1
2
C186
C115
1
+VCC_PEG
R112
1
2
0_0603_5%
B
+1.5VS_QDAC
A8
L1
AB2
1
2
1
+1.05VS_DMI
20mils
VTTLF
DMI
2
1
C204
10U_0805_10V4Z
SM CK
A CK
TV
HDA
1
C187
C173
VGA@
AH48 456mA
AF48
AH47
AG47
+VCC_PEG
10U_0805_10V4Z
C407
VGA@
VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VCC_DMI_4
1732mA
C98
CRESTLINE_1p0
VGA@
V48
U48
V47
U47
U46
+1.05VS_DMI
+VCCP
L12
1
2
BLM18PG121SN1D_0603
+3VS_HV
0.1U_0402_16V4Z
0_0402_5%
VGA@
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5
+1.05VS_PEGPLL
+1.8V_TXLVDS
105.3mA
C97
0_0402_5%
VGA@
C35
B35
A35
U4
0_0402_5%
VGA@
VCC_HV_1
VCC_HV_2
VCC_HV_3
2
2
10U_0805_10V4Z
118.8mA
0.01U_0402_25V7K~N
VCCD_LVDS_1
VCCD_LVDS_2
LVDS
VCCD_PEG_PLL
M38
L37
K47
0.47U_0603_10V7K
C65
C174
D TV/CRT
AA47
VCC_TX_LVDS
2
+1.8V_SM_CK
2
+
C62
10U_0805_10V4Z
50mA
BF21
BH20
BG20
BF20
0.47U_0603_10V7K
C385
VGA@
A
0.1U_0402_16V4Z
VCCD_HPLL
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
1
C117
VCCD_QDAC
AF1
1
C63
0.1U_0402_16V4Z
0.47U_0603_10V7K
C382
0_0402_5%
C114
L28
157.2mA
CANTIGA_1p0
C413
UMA@
48.363mA
124mA
R109
1
2
0_0805_5%
0.1U_0402_16V4Z
C116
VCCD_TVDAC
+1.8V_LVDS
C405
2
+1.5VS
R64
1
2
0_0805_5% UMA@
+VCCP
220U_D2_4VY_R15M
M25
60.31mA
C401
2
1
1
C179
VCC_HDA
+V1.05VS_AXF
10U_0805_10V4Z
A32
B22
B21
A21
C176
+1.05VS_PEGPLL
VCCA_TV_DAC_1
VCCA_TV_DAC_2
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
0.1U_0402_16V4Z
+1.5VS_QDAC
B24
A24
+VCCP
L9
1
2
MBK2012121YZF_0805
321.35mA
C410
58.67mA
VCCA_SM_CK_1
VCCA_SM_CK_2
VCCA_SM_CK_3
VCCA_SM_CK_4
VCCA_SM_CK_5
VCCA_SM_CK_NCTF_1
VCCA_SM_CK_NCTF_2
VCCA_SM_CK_NCTF_3
VCCA_SM_CK_NCTF_4
VCCA_SM_CK_NCTF_5
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_7
VCCA_SM_CK_NCTF_8
AN28
AP25
AN25
AN24
AM28
AM26
AM25
AL25
AM24
AL24
AM23
AL23
50mA
+1.5VS_TVDAC
+1.05VS_HPLL
2
C
0.1U_0402_16V4Z
C402 UMA@
2
0.1U_0402_16V4Z
0.01U_0402_25V7K~N
C401 UMA@
B
2
2
1
C95
TVA 24.15mA
TVB 39.48mA
TVX 24.15mA
HDMI disable connected to GND
1
1
+1.05VS_MPLL
26mA AP28
+3VS_DAC_CRT
1
2
UMA@ C115
2
1
1
+1.5VS_TVDAC
+VCCP
L29
1
2
MBK2012121YZF_0805
0.022U_0402_16V7K
2
1
POWER
+1.8V
R102
1
2
0_0805_5%
+VCC_PEG
2
1U_0603_10V4Z
0.1U_0402_16V4Z
1
C123
2
C122
2
1
1U_0603_10V4Z
1
+1.05VS_HPLL
1
2
10U_0805_10V4Z
2
C72
2
UMA@
C387
1
+1.05VS_A_SM_CK
C104
1U_0603_10V4Z
4.7U_0805_10V4Z
10U_0805_10V4Z
C103
1
C83
2
C388
C82
2
R71
1
2
0_0603_5%
+3VS_DAC_CRT
1
10U_0805_10V4Z
C68
220U_D2_4VY_R15M
R50
1
2
0_0805_5%
VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
VCCA_SM_6
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16
+1.05VS_A_SM
2
VCCA_PEG_PLL
720mA AR20
0.1U_0402_16V4Z
+VCCP
+
AA48
UMA@
1
@
UMA@
A SM
+1.05VS_PEGPLL
C175
2
1
0.1U_0402_16V4Z
2
1
VCCA_PEG_BG
50mA
1
C
AD48
1
+VCCP
L14
1
2
10U_FLC-453232-100K_0.25A_10%
C102
+1.5VS
C69
414uA
+1.5VS_PEG_BG
R97
1
2
0_0603_5%
+1.8V_SM_CK
+1.05VS_DPLLB
0.1U_0402_16V4Z
VSSA_LVDS
1U_0603_10V4Z
VCCA_LVDS
J47
C413 UMA@
2
2
D
C96
1
1000P_0402_50V7K
2
2
2
1
UMA@
C87
+1.8V_TXLVDS
2
1
10U_0805_10V4Z
VCCA_MPLL
13.2mA J48
UMA@
UMA@
C113
139.2mA AE1
1
2
10U_0805_10V4Z
+1.05VS_MPLL
1
1
1
2
L13
10U_FLC-453232-100K_0.25A_10%
10U_0805_10V4Z
VCCA_HPLL
1
2
10U_0805_10V4Z
VCCA_DPLLB
24mA AD1
1
10U_0805_10V4Z
64.8mA L48
+1.05VS_HPLL
2
UMA@
C178
+1.05VS_DPLLB
+
C174
VCCA_DPLLA
1
0.1U_0402_16V4Z
64.8mA F47
2
2.2U_0805_16V4Z
+1.05VS_DPLLA
1
4.7U_0805_10V4Z
2
0.1U_0402_16V4Z
C408 UMA@
C405 UMA@
0.01U_0402_25V7K~N
2
1
2 0_0402_5%~D
2
0.47U_0603_10V7K
R836 1
UMA@
1
VCCA_DAC_BG
VSSA_DAC_BG
+
C182
A25
B25
+3VS_DAC_CRT
1
0.1U_0402_16V4Z
+3VS_DAC_BG
U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1
C173
2.68mA
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
C191
220U_D2_4VY_R15M
+3VS_DAC_CRT
VCCA_CRT_DAC_1
VCCA_CRT_DAC_2
C384
B27
A26
4.7U_0805_10V4Z
73mA
+3VS_DAC_BG
D
+VCCP
R101
1
2
0_0603_5%
+V1.05VS_AXF
852mA
C370
220U_D2_4VY_R15M
2
+VCCP
U4H
C383
1
+VCCP
0.1U_0402_16V4Z
C411 UMA@
C407 UMA@
0.01U_0402_25V7K~N
2
1
+1.05VS_DPLLA
L11
UMA@
1
2
BLM18PG181SN1D_0603
1
2
+3VS
R350
1
2
0_0603_5%
UMA@
+1.8V
UMA@
A
VGA@
Compal Secret Data
2006/02/13
Issued Date
2006/03/10
Deciphered Date
Title
Cantiga(4/6)-PWR
Custom
Rev
1.0
LA-4841P
Date:
5
4
3
2
Sheet
1
10
of
45
5
4
3
2
1
+VCCP
U4G
330U_V_2.5VM
VCC_SM_36/NC
VCC_SM_37/NC
VCC_SM_38/NC
VCC_SM_39/NC
VCC_SM_40/NC
VCC_SM_41/NC
VCC_SM_42/NC
Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42
AJ14
AH14
VCC_AXG_SENSE
VSS_AXG_SENSE
6326.84mA
+VCCP
10U_0805_10V4Z 0.1U_0402_16V4Z
1
C78
1
C57
1
C100
1
C79
1
C80
+
1U_0603_10V4Z
2
VGA@
VGA@ VGA@
2
2
VGA@
2
2
10U_0805_10V4Z
330U_V_2.5VM
VGA@
W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16
0.1U_0402_16V4Z
1
4.7U_0603_6.3V6M
1
C99
VGA@
2
2
0.22U_0402_10V4Z
C
2
1
2
1U_0603_10V4Z
Title
1
C163
2006/03/10
Deciphered Date
2
1U_0603_10V4Z
Compal Secret Data
2006/02/13
1
0.47U_0402_6.3V6K
2
C145
1
0.22U_0603_10V7K
2
C146
1
0.22U_0603_10V7K
2
C81
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C67
1
C71
AV44 VCCSM_LF1
BA37 VCCSM_LF2
AM40 VCCSM_LF3
AV21 VCCSM_LF4
AY5 VCCSM_LF5
AM10 VCCSM_LF6
BB13 VCCSM_LF7
C70
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
CANTIGA_1p0
Issued Date
C101
VGA@
D
2
A
1
C86
VGA@
B
CANTIGA_1p0
PAD T42
PAD T43
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC SM LF
AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23
BA36
BB24
BD16
BB21
AW16
AW13
AT13
VCC GFX NCTF
VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
POWER
1
AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29
VCC GFX
B
2
2
+VCCP
POWER
VCC_35
2
1
0317 change value
VCC NCTF
T32
C148 2
1
VCC CORE
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
+
C164
AE33
AC33
AA33
Y33
W33
V33
U33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23
1
0.01U_0402_16V7K
C147
2
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
10U_0805_10V4Z
C165
2
1
C120
C
2
1
0.1U_0402_16V4Z
C119
2
1
0.22U_0402_10V4Z
C143
2
1
0.22U_0402_10V4Z
C118
+
10U_0805_10V4Z
C374
220U_D2_4VY_R15M
1
AG34
AC34
AB34
AA34
Y34
V34
U34
AM33
AK33
AJ33
AG33
AF33
10U_0805_10V4Z
D
+1.8V
U4F
+VCCP
3000mA
VCC SM
Extnal Graphic: 1210.34mA
integrated Graphic: 1930.4mA
Cantiga(5/6)-PWR/GND
Rev
1.0
LA-4841P
Date:
5
4
3
A
2
Sheet
1
11
of
45
5
4
3
2
1
U4J
C
B
VSS
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6
CANTIGA_1p0
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
BA16
VSS_235
AU16
AN16
N16
K16
G16
E16
BG15
AC15
W15
A15
BG14
AA14
C14
BG13
BC13
BA13
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
AN13
AJ13
AE13
N13
L13
G13
E13
BF12
AV12
AT12
AM12
AA12
J12
A12
BD11
BB11
AY11
AN11
AH11
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
Y11
N11
G11
C11
BG10
AV10
AT10
AJ10
AE10
AA10
M10
BF9
BC9
AN9
AM9
AD9
G9
B9
BH8
BB8
AV8
AT8
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS
VSS NCTF
D
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1
VSS_351
VSS_352
VSS_353
VSS_354
U24
U28
U25
U29
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17
VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5
BH48
BH1
A48
C1
A3
VSS SCB
AU48
AR48
AL48
BB47
AW47
AN47
AJ47
AF47
AD47
AB47
Y47
T47
N47
L47
G47
BD46
BA46
AY46
AV46
AR46
AM46
V46
R46
P46
H46
F46
BF44
AH44
AD44
AA44
Y44
U44
T44
M44
F44
BC43
AV43
AU43
AM43
J43
C43
BG42
AY42
AT42
AN42
AJ42
AE42
N42
L42
BD41
AU41
AM41
AH41
AD41
AA41
Y41
U41
T41
M41
G41
B41
BG40
BB40
AV40
AN40
H40
E40
AT39
AM39
AJ39
AE39
N39
L39
B39
BH38
BC38
BA38
AU38
AH38
AD38
AA38
Y38
U38
T38
J38
F38
C38
BF37
BB37
AW37
AT37
AN37
AJ37
H37
C37
BG36
BD36
AK15
AU36
BG21
L12
AW21
AU21
AP21
AN21
AH21
AF21
AB21
R21
M21
J21
G21
BC20
BA20
AW20
AT20
AJ20
AG20
Y20
N20
K20
F20
C20
A20
BG19
A18
BG17
BC17
AW17
AT17
R17
M17
H17
C17
NC
U4I
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
D
C
B
E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48
CANTIGA_1p0
A
A
Compal Secret Data
2006/02/13
Issued Date
2006/03/10
Deciphered Date
Title
Cantiga(6/6)-PWR/GND
Rev
1.0
LA-4841P
Date:
5
4
3
2
Sheet
1
12
of
45
5
4
3
2
1
Close to VREF pins of SO-DIMM
+1.8V
8 DDR_A_DQS#[0..7]
V_DDR_MCH_REF
DDR_A_D8
DDR_A_D9
Layout Note:
Place near JDIM1
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D14
DDR_A_D15
+1.8V
DDR_A_D16
DDR_A_D17
2
DDR_A_DQS#2
DDR_A_DQS2
1
+
C84
C108
1
330U 2.5V Y D2
2
0.1U_0402_16V4Z
2
1
C130
0.1U_0402_16V4Z
2
1
C131
C154
2
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C169
2
2.2U_0603_6.3V6K
2
1
C166
C149
1
2.2U_0603_6.3V6K
C124
2
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
C105
2.2U_0603_6.3V6K
2
1
DDR_A_D18
DDR_A_D19
@
2
DDR_A_D29
DDR_A_D24
DDR_A_DM3
DDR_A_D26
DDR_A_D27
C
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V
DDR_CKE0_DIMMA
7 DDR_CKE0_DIMMA
8
DDR_A_BS#2
DDR_A_BS#2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
8
8
+0.9VS
2
1
2
1
2
7
M_ODT1
M_ODT1
1
DDR_A_D37
DDR_A_D36
2
DDR_A_DQS#4
DDR_A_DQS4
C168
C153
C152
C129
C128
C107
C167
C151
C150
C127
C126
C125
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
C106
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
DDR_A_CAS#
DDR_CS1_DIMMA#
8 DDR_A_CAS#
7 DDR_CS1_DIMMA#
DDR_A_V
1
DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#
DDR_A_BS#0
DDR_A_WE#
DDR_A_D35
DDR_A_D34
DDR_A_D40
DDR_A_D44
B
DDR_A_DM5
DDR_A_D41
DDR_A_D46
Layout Note:
Place these resistor
closely JP41,all
trace length Max=1.5"
DDR_A_D49
DDR_A_D48
DDR_A_V
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D54
DDR_A_D50
DDR_A_MA5
DDR_A_MA8
RP14
1
2
DDR_A_MA1
DDR_A_MA3
RP13 56_0404_4P2R_5% RP17 56_0404_4P2R_5%
1
4
4
1 DDR_A_MA7
2
3
3
2 DDR_A_MA6
4
3
4
3
DDR_A_D61
DDR_A_D60
RP22 56_0404_4P2R_5%
1 DDR_CKE0_DIMMA
2 DDR_A_MA12
DDR_A_DM7
DDR_A_D59
DDR_A_D58
RP7 56_0404_4P2R_5% RP15 56_0404_4P2R_5%
DDR_A_RAS#
1
4
4
1 DDR_A_MA9
DDR_CS0_DIMMA# 2
3
3
2 DDR_A_BS#2
RP6
A
DDR_A_BS#0
DDR_A_MA10
RP5
56_0404_4P2R_5%
1 DDR_A_MA0
2 DDR_A_BS#1
RP1 56_0404_4P2R_5% RP2
DDR_CS1_DIMMA# 2
3
4
M_ODT1
1
4
3
56_0404_4P2R_5%
1 M_ODT0
2 DDR_A_MA13
DDR_A_CAS#
DDR_A_WE#
+3VS
56_0404_4P2R_5% RP16 56_0404_4P2R_5%
1
4
4
1 DDR_A_MA4
2
3
3
2 DDR_A_MA2
56_0404_4P2R_5% RP8
1
4
4
2
3
3
CLK_SMBDATA
CLK_SMBCLK
14,15,20,24 ICH_SM_DA
14,15,20,24 ICH_SM_CLK
C58
0.1U_0402_16V4Z
1
1
2
2
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
C59
2.2U_0603_6.3V6K
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SA0
SA1
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
P-TWO_A5652C-A0G16
SO-DIMM A
REVERSE
DDR_A_DM0
DDR_A_D6
DDR_A_D7
1
2
1
2
DDR_A_D13
DDR_A_D12
D
DDR_A_DM1
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR0 7
M_CLK_DDR#0 7
DDR_A_D11
DDR_A_D10
DDR_A_D20
DDR_A_D21
DDR_A_DM2
PM_EXTTS#0 7
DDR_A_D23
DDR_A_D22
DDR_A_D28
DDR_A_D25
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D31
DDR_A_D30
DDR_CKE1_DIMMA
DDR_A_MA14
DDR_CKE1_DIMMA 7
C
DDR_A_MA14 8
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
DDR_A_MA13
DDR_A_BS#1 8
DDR_A_RAS# 8
DDR_CS0_DIMMA# 7
M_ODT0
7
DDR_A_D32
DDR_A_D33
DDR_A_DM4
DDR_A_D39
DDR_A_D38
DDR_A_D45
DDR_A_D47
B
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D43
DDR_A_D42
DDR_A_D52
DDR_A_D53
M_CLK_DDR1
M_CLK_DDR#1
M_CLK_DDR1 7
M_CLK_DDR#1 7
DDR_A_DM6
DDR_A_D51
DDR_A_D55
DDR_A_D57
DDR_A_D56
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
R32
10K_0402_5%
2
1
D
DDR_A_D5
DDR_A_D0
R31
10K_0402_5%
2
1
DDR_A_D2
DDR_A_D3
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
C220
DDR_A_DQS#0
DDR_A_DQS0
8 DDR_A_MA[0..13]
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
0.1U_0402_16V4Z
DDR_A_D4
DDR_A_D1
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
C201
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2.2U_0805_16V4Z
8 DDR_A_DM[0..7]
8 DDR_A_DQS[0..7]
1
7,14
JDIM2
8 DDR_A_D[0..63]
A
Bottom side
Issued Date
56_0404_4P2R_5% RP23 56_0404_4P2R_5%
DDR_CKE1_DIMMA 1
2
4
1 DDR_A_MA14
R96
56_0402_5%
3
2 DDR_A_MA11
Compal Secret Data
2007/1/15
Deciphered Date
2008/1/15
Title
DDR2 SO-DIMM I
Rev
1.0
LA-4841P
Date:
5
4
3
2
Sheet
1
13
of
45
5
4
3
2
1
Close to VREF pins of SO-DIMM
8 DDR_B_DQS#[0..7]
+1.8V
8 DDR_B_D[0..63]
+DDR_MCH_REF1
8 DDR_B_DM[0..7]
DDR_B_D10
DDR_B_D11
+1.8V
2
DDR_B_D17
DDR_B_D20
1
+
2
C189
C155
2
1
330U 2.5V Y D2
C133
2
1
0.1U_0402_16V4Z
C132
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
1
C109
0.1U_0402_16V4Z
2
1
C177
C138
2
1
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
1
C160
2
2.2U_0603_6.3V6K
2
1
C139
2.2U_0603_6.3V6K
C112
2.2U_0603_6.3V6K
1
DDR_B_DQS#2
DDR_B_DQS2
@
DDR_B_D18
DDR_B_D19
DDR_B_D28
DDR_B_D25
DDR_B_DM3
C
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
DDR_B_D30
DDR_B_D31
7 DDR_CKE2_DIMMB
8
DDR_B_BS#2
DDR_CKE2_DIMMB
DDR_B_BS#2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
+0.9VS
8
8
DDR_B_V
2
1
2
1
2
8 DDR_B_CAS#
7 DDR_CS3_DIMMB#
1
7
M_ODT3
DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#
DDR_B_CAS#
DDR_CS3_DIMMB#
M_ODT3
DDR_B_D32
DDR_B_D33
2
C159
C172
C137
C158
C136
C111
C171
C170
C157
C156
C135
C134
C110
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
2
1
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
DDR_B_BS#0
DDR_B_WE#
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
B
DDR_B_DM5
Layout Note:
Place these resistor
closely JP42,all
trace length Max=1.5"
DDR_B_V
RP18
1
2
DDR_B_MA10
DDR_B_BS#0
RP10 56_0404_4P2R_5% RP26 56_0404_4P2R_5%
DDR_B_MA14
1
4
4
1
DDR_B_MA11
2
3
3
2
DDR_B_MA0
DDR_B_BS#1
RP12 56_0404_4P2R_5% RP19 56_0404_4P2R_5%
DDR_B_MA8
1
4
4
1
DDR_B_MA5
2
3
3
2
4
3
DDR_B_D51
DDR_B_D50
RP24 56_0404_4P2R_5%
DDR_B_MA12
1
DDR_B_MA9
2
DDR_B_D56
DDR_B_D61
DDR_B_DM7
DDR_B_D59
DDR_B_D58
13,15,20,24 ICH_SM_DA
13,15,20,24 ICH_SM_CLK
RP3
1
2
M_ODT3
2
DDR_CS3_DIMMB# 1
+3VS
C61
56_0404_4P2R_5% RP20 56_0404_4P2R_5%
DDR_B_MA4
4
4
1
DDR_B_MA2
3
3
2
56_0404_4P2R_5% RP4
3
4
4
3
56_0404_4P2R_5% RP25
4
3
DDR_CKE3_DIMMB 1
2
R335 56_0402_5%
0.1U_0402_16V4Z
1
1
2
2
56_0404_4P2R_5%
DDR_B_MA13
1
M_ODT2
2
DDR_B_DM1
M_CLK_DDR2
M_CLK_DDR#2
M_CLK_DDR2 7
M_CLK_DDR#2 7
DDR_B_D14
DDR_B_D15
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDR_B_D21
DDR_B_D16
PM_EXTTS#1 7
DDR_B_DM2
DDR_B_D22
DDR_B_D23
DDR_B_D29
DDR_B_D24
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D26
DDR_B_D27
DDR_CKE3_DIMMB
C
DDR_CKE3_DIMMB 7
DDR_B_MA14
DDR_B_MA14 8
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDR_B_BS#1
DDR_B_RAS#
DDR_CS2_DIMMB#
DDR_B_BS#1 8
DDR_B_RAS# 8
DDR_CS2_DIMMB# 7
M_ODT2
DDR_B_MA13
M_ODT2
7
DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D39
DDR_B_D38
DDR_B_D44
DDR_B_D45
B
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
M_CLK_DDR3
M_CLK_DDR#3
M_CLK_DDR3 7
M_CLK_DDR#3 7
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D57
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
R33
1
P-TWO_A5692A-A0G16-N
2.2U_0603_6.3V6K
2
D
SO-DIMM B
REVERSE
2
+3VS
10K_0402_5%
A
Bottom side
DDR_B_BS#2
DDR_CKE2_DIMMB
Issued Date
Compal Secret Data
1
2
C60
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
2
1
R34
RP9
DDR_B_CAS#
DDR_B_WE#
CLK_SMBDATA
CLK_SMBCLK
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
1
DDR_B_D12
DDR_B_D13
10K_0402_5%
RP11 56_0404_4P2R_5% RP21 56_0404_4P2R_5%
DDR_CS2_DIMMB# 1
DDR_B_MA7
4
4
1
DDR_B_RAS#
DDR_B_MA6
2
3
3
2
A
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_MA3
DDR_B_MA1
4
3
DDR_B_D42
DDR_B_D43
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
DDR_B_D6
DDR_B_D7
1
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_DM0
2
DDR_B_D8
DDR_B_D9
DDR_B_D5
DDR_B_D4
7,13
C222
DDR_B_D2
DDR_B_D3
Layout Note:
Place near JDIM2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
C221
DDR_B_DQS#0
DDR_B_DQS0
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
0.1U_0402_16V4Z
DDR_B_D0
DDR_B_D1
8 DDR_B_MA[0..13]
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
2.2U_0805_16V4Z
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
8 DDR_B_DQS[0..7]
D
V_DDR_MCH_REF
JDIM1
2007/1/15
Deciphered Date
2008/1/15
Title
DDR2 SO-DIMM II
56_0404_4P2R_5%
Rev
1.0
LA-4841P
Date:
5
4
3
2
Sheet
1
14
of
45
5
4
3
2
1
+3VS_CK505
FSC
FSB
FSA
CLKSEL2
CLKSEL1
CLKSEL0
CPU
MHz
SRC
MHz
PCI
MHz
REF
MHz
DOT_96 USB
MHz
MHz
R971
1
2
0_0805_5%
Routing the trace at least 10mil
+3VS
CLK_XTAL_OUT
1
1
C1189
1
C1190
1
C1191
1
C1192
1
C1193
1
C1194
C1195
CLK_XTAL_IN
0
0
0
266
100
33.3
14.318
96.0
48.0
0
0
1
133
100
33.3
14.318
96.0
48.0
0
1
0
200
100
33.3
14.318
96.0
48.0
0
1
1
166
100
33.3
14.318
96.0
48.0
2
1
0
0
333
100
33.3
14.318
96.0
0
1
100
100
33.3
14.318
96.0
48.0
1
1
0
400
100
33.3
14.318
96.0
48.0
1
1
1
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
0905 Connect to +VCCP
2
+1.05VS_CK505
+VCCP
1
Place close to U55
2
C1196
22P_0402_50V8J
48.0
1
2
0.1U_0402_16V4Z
14.31818MHZ_16P
Y7
D
10U_0805_10V4Z
1
1
D
R972
1
2
0_0805_5%
2
C1197
22P_0402_50V8J
+1.05VS_CK505
1
0.1U_0402_16V4Z
1
C1198
C1199
2
10U_0805_10V4Z
2
1
10U_0805_10V4Z
0.1U_0402_16V4Z
1
1
1
C1201
C1202
C1203
C1200
2
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
2
1
C1204
2
0.1U_0402_16V4Z
+3VS_CK505
Reserved
@ R973
1
2
+VCCP
56_0402_5%
7
7
4
4
NB
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
R_MCH_BCLK#
R_MCH_BCLK
R_CPU_BCLK#
R_CPU_BCLK
U55
+3VS_CK505
2 0_0402_5%
1
2
+VCCP
R991
20 CLK_14M_ICH
1
CLK_SMBDATA
CLK_SMBCLK
1
2
R998
1K_0402_5%
R1003
1
2
0_0402_5%
CPU_BSEL1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
CLK_XTAL_OUT
CLK_XTAL_IN
MCH_CLKSEL1 7
R1000
R1001
R1004
R1006
R1008
27 CLK_PCI_CB
24 CLK_DEBUG_PORT
29 CLK_PCI_EC
CLK_PCI_TPM
18 PCI_CLK
1
5
R_CKPWRGD
FSB
2 33_0402_1% FSC
PAD T120
1
FSB
@
R1009
0_0402_5%
1
1
1
1
1
2
2
2
2
2
33_0402_5%
33_0402_1%
33_0402_1%
33_0402_5%
33_0402_1%
R_CLK_PCI_CB
PCI2_TME
R_CLK_PCI_EC
27_SEL
ITP_EN
2
0905 Connect PCI_CLK
1
5
CPU_BSEL2
20 CLK_48M_ICH
2
7 CLKREQ#_7
1
2
R1017
1K_0402_5%
R1013
1
R1014 1
2 33_0402_1%
FSA
2 0_0402_5%
R_CLKREQ#_7
+1.05VS_CK505
MCH_CLKSEL2 7
7 CLK_MCH_DREFCLK
7 CLK_MCH_DREFCLK#
NB (UMA)
1
FSC
@
R1011
1K_0402_5%
@
R1025
0_0402_5%
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
+3VS_CK505
R1016
1
2
10K_0402_5%
R1020
1
2
0_0402_5%
Express Card
1 0_0402_5%
1 0_0402_5%
R1024 VGA@2
R1026 VGA@2
1 0_0402_5%
1 0_0402_5%
PCI_STOP#
CPU_STOP#
VDD_SRC_IO
SRC_10#
SRC_10
CLKREQ_10#
SRC_11
SRC_11#
CLKREQ_11#
SRC_9#
SRC_9
CLKREQ_9#
VSS_SRC
CLKREQ_4#
SRC_4#
SRC_4
VDD_SRC_IO
CLKREQ_3#
H_STP_PCI#
H_STP_CPU#
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
H_STP_PCI# 20
H_STP_CPU# 20
R_CLK_Rob#
R_CLK_Rob
R_CLKREQ#_ROB
R_PCIE_SATA
R_PCIE_SATA#
R_CLKSATAREQ#
R_CLK_PCIE_LAN#
R_CLK_PCIE_LAN
R_CLKREQ#_GLAN
R988
R989
R990
R992
R994
R995
R996
R997
R999
R_CLK_PCIE_MCARD#
R_CLK_PCIE_MCARD
R1002 1
R1005 1
R1007 1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
CPU_STP
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
CLK_PCIE_Rob# 24
CLK_PCIE_Rob 24
ROBSON_REQ#10
CLK_PCIE_SATA 19
CLK_PCIE_SATA# 19
CLKSATAREQ# 20
CLK_PCIE_LAN# 22
CLK_PCIE_LAN 22
GLAN_REQ#9 22
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
WLAN_REQ#4 24
CLK_PCIE_MCARD# 24
CLK_PCIE_MCARD 24
MiniCard_Roboson
ICH_SATA
GLAN
MiniCard_WLAN
S IC ICS9LPRS397AKLFT MLF 72P CLK GEN
R_PCIE_ICH#
R_PCIE_ICH
R1010 1
R1012 1
2
2
0_0402_5%
0_0402_5%
R_MCH_3GPLL#
R_MCH_3GPLL
R1015 1
R1018 1
2
2
0_0402_5%
0_0402_5%
SSCDREFCLK# UMA@
SSCDREFCLK UMA@
R1022 1
R1023 1
2
2
0_0402_5%
0_0402_5%
VGA@
VGA@
R1067 1
R1195 1
2
2
0_0402_5%
0_0402_5%
CLK_PCIE_ICH# 20
CLK_PCIE_ICH 20
ICH
CLK_MCH_3GPLL# 7
CLK_MCH_3GPLL 7
NB_3GPLL
B
+1.05VS_CK505
R_MCH_DREFCLK
R_MCH_DREFCLK#
MCH_SSCDREFCLK# 7
MCH_SSCDREFCLK 7
NB_SSC (UMA)
CLK_NVSS_27M 33
CLK_NV_27M 33
VGA_27M (DIS)
2
VGA (Discrete)
33 CLK_PCIE_VGA
33 CLK_PCIE_VGA#
R1019 UMA@2
R1021 UMA@2
C
CKPWRGD/PD#
FS_B/TEST_MODE
VSS_REF
XTAL_OUT
XTAL_IN
VDD_REF
REF_0/FS_C/TEST_
REF_1
SDA
SCL
NC
VDD_PCI
PCI_1
PCI_2
PCI_3
PCI_4/SEL_LCDCL
PCIF_5/ITP_EN
VSS_PCI
+VCCP
B
EXPCARD_REQ#16 28
CLK_PCIE_EXPR 28
CLK_PCIE_EXPR# 28
+1.05VS_CK505
VDD_48
USB_0/FS_A
USB_1/CLKREQ_A#
VSS_48
VDD_IO
SRC_0/DOT_96
SRC_0#/DOT_96#
VSS_IO
VDD_PLL3
LCDCLK/27M
LCDCLK#/27M_SS
VSS_PLL3
VDD_PLL3_IO
SRC_2
SRC_2#
VSS_SRC
SRC_3
SRC_3#
2
R987
20 CK_PWRGD
@
R993
1K_0402_5%
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
+3VS_CK505
MCH_CLKSEL0 7
@
R986
1K_0402_5%
C
R_CLKREQ#_EXPCARD R977 1
R_PCIE_EXPR
R979 1
R_PCIE_EXPR#
R981 1
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
CPU_BSEL0
1
2
R984
1K_0402_5%
2
2
1
1
GND
VDD_CPU
CPU_0
CPU_0#
VSS_CPU
CPU_1
CPU_1#
VDD_CPU_IO
CLKREQ_7#
SRC_8/CPU_ITP
SRC_8#/CPU_ITP#
VDD_SRC_IO
SRC_7
SRC_7#
VSS_SRC
CLKREQ_6#
SRC_6
SRC_6#
VDD_SRC
5
CPU
1
1
2
2
1
FSA
R983
1
2
2.2K_0402_5%
R985
1
2
0_0402_5%
R976
R978
R980
R982
CLK_MCH_BCLK#
CLK_MCH_BCLK
CLK_CPU_BCLK#
CLK_CPU_BCLK
+3VS
27_SEL
1 = ITP/ITP#
0 = Enable DOT96 & SRC1(UMA)
1 = Enable SRC0 & 27MHz(DIS)
+3VS_CK505
1
1 = Overclocking of CPU and SRC NOT allowed
+3VS_CK505
@ R1029
10K_0402_5%
A
VGA@
R1030
10K_0402_5%
+3VS_CK505
13,14,20,24 ICH_SM_DA
R1112
2
R1032
10K_0402_5%
1
R1132
2
CLK_SMBCLK
0_0402_5%
2
PCI2_TME
Compal Secret Data
R1034
10K_0402_5%
@
2006/02/13
Issued Date
2006/03/10
Deciphered Date
Title
Size
Date:
5
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
A
1
1
27_SEL
UMA@
R1033
10K_0402_5%
CLK_SMBDATA
2
SB, MINI PCI
R1031
10K_0402_5%
1
2
2
1
ITP_EN
1
0_0402_5%
13,14,20,24 ICH_SM_CLK
2
EXPCARD_REQ#16 1
R90
ROBSON_REQ#10 1
R89
CLKSATAREQ#
1
R88
GLAN_REQ#9
1
R87
WLAN_REQ#4
1
R85
CLKREQ#_7
1
R60
0 = Overclocking of CPU and SRC Allowed
1
PCI2_TME
0 = SRC8/SRC8#
2
ITP_EN
4
3
2
Clock Generator CK505
Document Number
Rev
1.0
LA-4841P
Sheet
1
15
of
45
A
B
C
D
E
1
1
JEPICO Conn.
2
2
+5VALW
W=60mils
3
2
R136
1
1K_0402_5%
2
SI2301BDS-T1-E3 1P SOT23
Q6
3
29 LCD_VCC_TEST_EN
LCD_VCC_TEST_EN
3
1
1
UMA@
1
VGA@
2 R662
1
0_0402_5%
C46
2
2
G
3
GMCH_LVDDEN 2
D8
VGA_LVDDEN
2
R138
10K_0402_5%
2
1
9 GMCH_LVDDEN
33 VGA_LVDDEN
1
1
BSS138_NL_SOT23
D
S
7.3
D
Q9
29
W=60mils
S
D9
EC_ENBKL
1
2
1
R135
47K_0402_5%
100_0603_1%
R137
1 1
2
G
EC_ENBKL
R21
G
D
Q7
2N7002LT1G_SOT23
+3VS
29
S
2
+3VS
1
D26
CH751H-40_SC76
1
2
D25
CH751H-40_SC76
1
2
BKOFF#
BKOFF#
@
+LCDVDD
2 R655
1
UMA@ 0_0402_5%
9 GMCH_ENBKL
EC_ENBKL
LVDSAC+ UMA@ R508
LVDSAC- UMA@ R510
1
1
2
2
0_0402_5%
0_0402_5%
GMCH_LVDSAC+
GMCH_LVDSAC-
LVDSA0+
LVDSA0-
UMA@ R1196
UMA@ R570
1
1
2
2
0_0402_5%
0_0402_5%
GMCH_LVDSA0+
GMCH_LVDSA0-
LVDSA1+
LVDSA1-
UMA@ R595
UMA@ R596
1
1
2
2
0_0402_5%
0_0402_5%
GMCH_LVDSA1+
GMCH_LVDSA1-
LVDSA2+
LVDSA2-
UMA@ R597
UMA@ R598
1
1
2
2
0_0402_5%
0_0402_5%
GMCH_LVDSA2+
GMCH_LVDSA2-
UMA@ R599
UMA@ R600
1
1
2
2
0_0402_5% GMCH_EDID_CLK_LCD
0_0402_5% GMCH_EDID_DAT_LCD
4.7K_0402_5%
2
+LCDVDD
LCD
DISPOFF#
R652
GMCH_LVDSAC+ 9
GMCH_LVDSAC- 9
GMCH_LVDSA0+ 9
GMCH_LVDSA0- 9
GMCH_LVDSA1+ 9
GMCH_LVDSA1- 9
GMCH_LVDSA2+ 9
GMCH_LVDSA2- 9
+LCDVDD
C43
1
2 R651
1
VGA@ 0_0402_5%
33 VGA_ENBKL
C41
R652
2.2K_0402_5%
VGA@
0.047U_0402_16V7K
100K_0402_5%
UMA@
4.7U_0805_10V4Z 0.1U_0402_16V4Z
2
2
@
3
EDID_CLK_LCD
EDID_DAT_LCD
GMCH_EDID_CLK_LCD
GMCH_EDID_DAT_LCD
9
9
LCD/PANEL BD. Conn.
Routing Diagram
R41
+3VS
2 47K_0402_5%
1
JLVDS1
MXMII Conn.
LVDS
R
29
LVDS Bus
BIA_PWM
BIA_PWM
2
@ R20
LVDSA0LVDSA0+
60 MIL
+LCDVDD
INVT_PWM
1
10_0402_5%
1
2
LCD_DET#
NB
Use Daisy chain to route
9
LCD_DET#
L55
2
1
0_0805_5%
+LCDVDD_L
+3VS
1
C36
@ 1U_0603_10V4Z
2
C796
220P_0402_50V7K
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
32
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
BIST
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
INVERTER Conn.
INVT_PWM
29
DAC_BRIG
JIVT1
INVT_PWM
DISPOFF#
DAC_BRIG
INVPWR_B+
1
2
3
4
5
6
7
DAC_BRIG
INVT_PWM
DISPOFF#
1
C415
1
C416
1
C417
2
470P_0402_50V7K
2
470P_0402_50V7K
2
470P_0402_50V7K
C32
0.1U_0603_50V4Z
29
R19
1
2
0_0805_5%
INVPWR_B+
LVDSACLVDSAC+
MOLEX_53780-0790
CONN@
2
2
C34
1
1
33 VGA_LVDSAC+
33 VGA_LVDSAC-
EDID_DAT_LCD
EDID_CLK_LCD
33 VGA_LVDSA0+
33 VGA_LVDSA0-
+3VS
1
GND1
GND2
2
ACES_88242-3001
CONN@
Except pin 29
29
LVDSA2LVDSA2+
C797
33 VGA_LVDSA1+
33 VGA_LVDSA1-
220P_0402_50V7K
33 VGA_LVDSA2+
33 VGA_LVDSA2-
Follow HEL80's pin definition
4
BIST
LVDSA1LVDSA1+
R630
R633
1
1
2
2
0_0402_5% VGA@ LVDSAC+
0_0402_5% VGA@ LVDSAC-
VGA_LVDSA0+
VGA_LVDSA0-
VGA_LVDSAC+
VGA_LVDSAC-
R634
R635
1
1
2
2
0_0402_5% VGA@LVDSA0+
0_0402_5% VGA@ LVDSA0-
VGA_LVDSA1+
VGA_LVDSA1-
R601
R602
1
1
2
2
0_0402_5% VGA@ LVDSA1+
0_0402_5% VGA@ LVDSA1-
VGA_LVDSA2+
VGA_LVDSA2-
R603
R604
1
1
2
2
0_0402_5% VGA@ LVDSA2+
0_0402_5% VGA@ LVDSA2-
0208 Add C796 , C797 for EMI
4
B+
33 VGA_CLK_LCD
33 VGA_DAT_LCD
VGA_CLK_LCD
VGA_DAT_LCD
R644 1
R645 1
B
0_0402_5% VGA@ EDID_CLK_LCD
0_0402_5% VGA@ EDID_DAT_LCD
0.1U_0603_50V4Z
Issued Date
Compal Secret Data
2007/1/15
Deciphered Date
2008/1/15
Title
CRT CONN/LCD CONN
Custom
Rev
1.0
LA-4841P
Date:
A
2
2
C
D
E
Sheet
16
of
45
4
3
+5VS
@
C431
2
For EMI
2
1
C27
2
2
0.1U_0402_16V4Z
2
R368
1
10K_0402_5%
R325
9
CRT_VSYNC
CRT_VSYNC
Y
1
0_0402_5%
+CRT_VCC
C26
1
2
0.1U_0402_16V4Z
UMA@
1
2CRT_VSYNC_B
R123
30_0402_5%
2
74AHCT1G125GW_SOT353-5
Close to GMCH
Close to VGA
C24
2
VSYNC_L
1
2
0_0603_5%
1
A
Y
4
1
1
1
2
C399
2
C435
C4
D_CRT_VSYNC
R107
1
2
2.2K_0402_5%
1
2
2.2K_0402_5%
R77 R108
+3VS
原本為10K
D
UMA@
Q3
2
R126
2
G
3
D
1
S
VGA_DDC_DATA_C
1
3
S
VGA_DDC_CLK_C
1
0_0402_5%
3VDDCDA
9
1
0_0402_5%
3VDDCCL
9
UMA@
BSS138_NL_SOT23
D
16
17
2
R84
Q5
BSS138_NL_SOT23
VGA@
2
R127
VGA@
2
R78
1
VGA_DDCDATA
0_0402_5%
1
VGA_DDCCLK
0_0402_5%
33
33
SUYIN_070549FR015S208CR
CONN@
VGA_DDC_DATA_C
1
2
C25
U5
1
2
2K_0402_5%
3
3
2
2
HSYNC_L
2
5
1
1
0_0402_5%
2
4.7P_0402_50V8C
C397
U6
74AHCT1G125GW_SOT353-5
P
OE#
33 VGA_VSYNC
D_CRT_HSYNC
4
G
2
R392
VGA@
2
R393
33 VGA_HSYNC
C
A
3
VGA@
2
2
4.7P_0402_50V8C
+3VS
VGA_DDC_CLK_C
1
2
C
3
2CRT_HSYNC_B
30_0402_5%
G
CRT_HSYNC
1
R124
P
OE#
UMA@
DDC_MD2
1
C3
1
2
R326 0_0603_5%
5
1
1
C433
1
C28
@
R6
+3VS
100P_0402_50V8J
1
2
R103
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
100P_0402_50V8J
@
C432
2
100P_0402_50V8J
1
100P_0402_50V8J
@
C430
1
JCRT1
15P_0402_50V8J
CRT_B_C
+CRT_VCC
9
3
2
CRT_G_C
4.7P_0402_50V8C
CRT_HSYNC
2
+CRT_VCC +CRT_VCC
原本為4.7K
MSEN#
1
2 CRT_R_L
L25
BK1608LL121-T 0603
1
2 CRT_G_L
L20
BK1608LL121-T 0603
1
2 CRT_B_L
L21
1 BK1608LL121-T 0603
15P_0402_50V8J
CRT_B
29
CRT_R_C
22P_0402_50V8J
CRT_G
9
C6
0.1U_0402_16V4Z
+3VS
UMA@
2
1
R376
0_0402_5%
UMA@
2
1
R374
0_0402_5%
UMA@
2
1
R375
0_0402_5%
R364
150_0402_1%
2
1
9
D22
@ DAN217_SC59
1
0_0402_5%
22P_0402_50V8J
CRT_R
1
0_0402_5%
22P_0402_50V8J
9
2
R125
VGA@
2
R98
R366
150_0402_1%
2
1
33 VGA_CRT_B
1
1
2
2K_0402_5%
1
1
0_0402_5%
R367
150_0402_1%
2
1
33 VGA_CRT_G
2
W=40mils
RB411DT146 SOT23
1
VGA@
D
D52
2.2K_0402_5%
2
1
2
G
+CRT_VCC
W=40mils
VGA@
2
R63
1
C436
D20
@ DAN217_SC59
1
D27
@ DAN217_SC59
1
CRT
33 VGA_CRT_R
2
0.1U_0402_16V4Z
5
B
B
A
A
Title
<Title>
Size
Document Number
CustomLA-4841P
Date:
5
4
3
2
Rev
1.0
1
Sheet
17
of
45
5
4
3
2
1
+3VS
D
R1035 1
2 8.2K_0402_5%
PCI_DEVSEL#
R1036 1
2 8.2K_0402_5%
PCI_STOP#
R1037 1
2 8.2K_0402_5%
PCI_TRDY#
R1038 1
2 8.2K_0402_5%
PCI_FRAME#
R1039 1
2 8.2K_0402_5%
PCI_PLOCK#
R1040 1
2 8.2K_0402_5%
PCI_IRDY#
R1041 1
2 8.2K_0402_5%
PCI_SERR#
R1042 1
2 8.2K_0402_5%
PCI_PERR#
27 PCI_AD[0..31]
U56B
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
+3VS
R1043 1
2 8.2K_0402_5%
R1044 1
2 8.2K_0402_5%
PCI_PIRQB#
PCI_PIRQA#
R1045 1
2 8.2K_0402_5%
PCI_PIRQC#
R1046 1
2 8.2K_0402_5%
PCI_PIRQD#
R1047 1
2 8.2K_0402_5%
PCI_PIRQE#
R1048 1
2 8.2K_0402_5%
PCI_PIRQF#
R1049 1
2 8.2K_0402_5%
PCI_PIRQG#
R1050 2
1 8.2K_0402_5%
PCI_PIRQH#
R1051 1
2 8.2K_0402_5%
PCI_REQ0#
R1052 1
2 8.2K_0402_5%
PCI_REQ1#
R1053 1
2 8.2K_0402_5%
PCI_REQ2#
R1054 1
2 8.2K_0402_5%
PCI_REQ3#
C
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
D11
C8
D9
E12
E9
C9
E10
B7
C7
C5
G11
F8
F11
E7
A3
D2
F10
D5
D10
B3
F7
C3
F3
F4
C1
G7
H7
D1
G5
H6
G1
H3
J5
E1
J6
C4
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PCI
F1
G4
B6
A7
F13
F12
E6
F6
PCI_REQ0#
PCI_GNT0#
PCI_REQ1#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
D8
B4
D6
A5
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
D3
E3
R1
C6
E4
C2
J4
A4
F5
D7
PCI_IRDY#
PCI_PAR
PCI_PCIRST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PLTRST#
PCICLK
PME#
C14
D4
R2
PCI_PLTRST#
PCI_CLK
H4
K6
F2
G2
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
Interrupt I/F
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
PCI_REQ0# 27
PCI_GNT0# 27
D
PCI_REQ2#
PCI_REQ3#
PCI_GNT3#
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
27
27
27
27
PCI_IRDY# 27
PCI_PAR 27
PCI_DEVSEL# 27
PCI_STOP# 27
PCI_TRDY# 27
PCI_FRAME# 27
PCI_CLK 15
EC_PME# 20,29
C
PCI_PIRQG# 27
ICH9M REV 1.0
C2
2
@
1
R10
1
@
2
PCI_CLK
33_0402_5%
22P_0402_50V8J
A16 swap override Strap
Low= A16 swap override Enble
PCI_GNT3# High= Default*
Boot BIOS Strap
B
PCI_GNT0#
SPI_CS#1
Boot BIOS Location
PCI_PCIRST#
PCI_RST# 27
SPI
1
1
0
R1056
100K_0402_5%
2
1K_0402_5%
1
0
PCI
1
1
LPC
2
@R1055
1
R1057
0_0402_5%
1
+3VALW
*
PCI_GNT0#
@ R1060
1
A
2
1K_0402_5%
2
1K_0402_5%
2
@ U58
Y
4
PLT_RST#
PLT_RST# 7,22,24,28,29,33
MC74VHC1G08DFT2G SC70 5P
R1061
0_0402_5%
1
R1059
100K_0402_5%
2
SPI_CS1#_R
@ R1058
1
B
1
3
20
SPI_CS1#_R
2
P
PCI_PLTRST#
+3VALW
G
5
PCI_GNT3#
2
1
B
A
A
Compal Secret Data
2006/02/13
Issued Date
2006/03/10
Deciphered Date
Title
Size
Date:
5
4
3
2
ICH9(1/4)-PCI/INT
Document Number
Rev
1.0
LA-4841P
Sheet
1
18
of
45
5
4
3
2
1
+RTCVCC
+3VS
SM_INTRUDER#
2
1M_0402_5%
LAN100_SLP
2
330K_0402_1%
ICH_INTVRMEN
2
330K_0402_1%
1
R1062
1
R1064
1
R1065
GATEA20
R1063
1
2
10K_0402_5%
KB_RST#
R1066
1
2
10K_0402_5%
D
D
+RTCVCC
B22
A22
INTVRMEN
LAN100_SLP
E25
GLAN_CLK
C13
LAN_RSTSYNC
ICH_RTCX1
R1069
1
C
+1.5VS
ICH_RTCX2
2
10M_0402_5%
C1211
4.7P_0402_50V8J
1
1
2
2
R1073
C1212
4
2
3
2
GLAN_COMP
23
23
23
23
ODD
B
ODD_IRX_DTX_N0_C
ODD_IRX_DTX_P0_C
ODD_ITX_DRX_N0
ODD_ITX_DRX_P0
B10
GPIO56
B28
B27
GLAN_COMPI
GLAN_COMPO
HDA_BIT_CLK
HDA_SYNC
AE7
HDA_RST#
ADC_ACZ_SDIN0
HDA_SDIN1
AF4
AG4
AH3
AE5
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDOUT
AG5
HDA_SDOUT
AG7
AE8
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34
AG8
SATALED#
AJ16
0.01U_0402_50V7K
AH16
PSATA_ITX_DRX_N0C1213 1
PSATA_ITX_DRX_N0_C AF17
2
PSATA_ITX_DRX_P0C1214 1
PSATA_ITX_DRX_P0_C AG17
2
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
0.01U_0402_50V7K
0.01U_0402_50V7K
ODD_ITX_DRX_N0 C1215 1
2 ODD_ITX_DRX_N0_C
ODD_ITX_DRX_P0
1
2 ODD_ITX_DRX_P0_C
C1216
0.01U_0402_50V7K
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
PAD T123
PAD T124
PSATA_IRX_DTX_N0_C
PSATA_IRX_DTX_P0_C
PSATA_ITX_DRX_N0
PSATA_ITX_DRX_P0
LAN_TXD0
LAN_TXD1
LAN_TXD2
AF6
AH4
32.768KHZ_12.5P_MC-146
23
23
23
23
D13
D12
E13
HDARST#
25 ADC_ACZ_SDIN0
28 HDA_SDIN1
HDD
LAN_RXD0
LAN_RXD1
LAN_RXD2
HDA_BITCLK
HDA_SYNC
4.7P_0402_50V8J
Y8
1
24.9_0402_1% 1
F14
G13
D14
AH13
AJ13
AG14
AF14
FWH4/LFRAME#
K3
LPC_FRAME#
LDRQ0#
LDRQ1#/GPIO23
J3
J1
LPC_DRQ0#
A20GATE
A20M#
N7
AJ27
GATEA20
H_A20M#
DPRSTP#
DPSLP#
AJ25
AE23
H_DPRSTP_R#
H_DPSLP#
R1071
1
R1072
1
LPC_FRAME# 24,29
+VCCP
T121 PAD
T122 PAD
2
ICH_INTVRMEN
LAN100_SLP
GATEA20 29
H_A20M# 4
FERR#
AJ26
R_H_FERR#
CPUPWRGD
AD22
H_PWRGOOD
IGNNE#
AF25
H_IGNNE#
INIT#
INTR
RCIN#
AE22
AG25
L3
H_INIT#
H_INTR
KB_RST#
NMI
SMI#
AF23
AF24
H_NMI
H_SMI#
R1070
56_0402_5%
H_DPRSTP#
2
0_0402_5%
H_DPRSTP# 5,7,43
H_DPSLP# 5
1
RTCRST#
SRTCRST#
INTRUDER#
RTC
LPC
A25
F20
C22
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
H_FERR#
2
56_0402_5%
H_PWRGOOD 5
H_FERR# 4
3/28 add 56ohm
H_IGNNE# 4
within 2" from R1557
H_INIT# 4
H_INTR 4
KB_RST# 29
+VCCP
C
1
2
JOPEN1
@
ICH_RTCRST#
SRTCRST#
SM_INTRUDER#
K5
K4
L6
K2
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
H_NMI 4
H_SMI# 4
STPCLK#
AH27
H_STPCLK#
THRMTRIP#
AG26
THRMTRIP_ICH#
TP12
AG27
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
AH11
AJ11
AG12
AF12
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
AH9
AJ9
AE10
AF10
SATA_CLKN
SATA_CLKP
AH18
AJ18
SATARBIAS#
SATARBIAS
AJ7
AH7
R1075
56_0402_5%
H_STPCLK# 4
R1078
2 54.9_0402_1%
1
2
JOPEN2
@
1U_0603_10V4Z
RTCX1
RTCX2
LAN / GLAN
CPU
2
C1210
C23
C24
IHDA
2
1
ICH_RTCX1
ICH_RTCX2
SATA
1U_0603_10V4Z
1
C1220
1
LPC_AD[0..3] 24,29
U56A
2
20K_0402_5%
2
20K_0402_5%
1
2
R1109
PLACE UNDER OPNE DOOR
1
1
R1068
H_THERMTRIP# 4,7
placed within 2" from
ICH8M
CLK_PCIE_SATA#
CLK_PCIE_SATA
R1081
1
CLK_PCIE_SATA# 15
CLK_PCIE_SATA 15
2
24.9_0402_1%
Within 500 mils
ICH9M REV 1.0
XOR CHAIN ENTRANCE STRAP:RSVD
B
+3VS
@ R1082
1
@ R1083
1
ACZ_SDOUT
2
1K_0402_5%
25 ACZ_SYNC
28 HDA_SYNC_MDC
ICH_RSVD
2
1K_0402_5%
1
R315
1
R306
HDA_SYNC
2
33_0402_5%
2
33_0402_5%
ICH_RSVD 20
25 ACZ_BITCLK
28 HDA_BITCLK_MDC
+COINCELL
1
R817
1
@R818
HDA_BITCLK_AUDIO_R
2
1
0_0402_5%
R1198
HDA_BITCLK_MDC_R
2
1
0_0402_5%
R1130
2 33_0402_5%HDA_BITCLK
2
33_0402_5%
@
1
25 ACZ_RST#
2
25 ACZ_SDOUT
28 HDA_SDOUT_MDC
1
R316
1
R307
HDARST#
2
33_0402_5%
2
33_0402_5%
1
R317
1
R312
HDA_SDOUT
2
33_0402_5%
modify_11/12
2
33_0402_5%
3
2
RTCVREF
28 HDA_RST_MDC#
Z4012
R1234
1K_0402_5%~D
+RTCVCC
A
A
1
D55
BAT54CW_SOT323~D
1
27.4
C1451
1U_0603_10V4Z~D
Compal Secret Data
2
2006/02/13
Issued Date
2006/03/10
Deciphered Date
Title
ICH9(2/4)_LAN,HD,IDE,LPC
Rev
1.0
LA-4841P
Date:
5
4
3
2
Sheet
1
19
of
45
U56C
PAD
T125
4 XDP_DBRESET#
ICH8 don't have
7 PM_BMBUSY#
29 EC_LID_OUT#
2SB_SPKR
@ 10K_0402_5%
1
R1096
low-->default
+3VS
GPIO49
1
2
10K_0402_5%
R1101
@
VGATE
1
R1102
C
WL_WAKE_R_ICH_WAKE#
22,24,28 WL_WAKE_R_ICH_WAKE#
+3VALW
R1108
R1110
R1111
R1113
R1114
R1115
R1116
R1117
R1163
R1119
1
R1229
29
29
2ICH_PCIE_WAKE#
0_0402_5%
1
2
10K_0402_5%
1
2
8.2K_0402_5%
1
2
1K_0402_5%
1
2
10K_0402_5%
1
2
10K_0402_5%
1
2
10K_0402_5%
1
2
10K_0402_5%
1
2
10K_0402_5%
CL_RST#1
1
2
10K_0402_5%
1
2
8.2K_0402_5%
CLGPIO5
EC_PME# 18,29
GPIO49
CLGPIO5
26
SB_SPKR
MCH_ICH_SYNC#
ICH_RSVD
SB_SPKR
7 MCH_ICH_SYNC#
19 ICH_RSVD
PAD T133
PAD T134
PAD T135
ICH_PCIE_WAKE#
ICH_RI#
XDP_DBRESET#
CLKRUN#
E20
M5
AJ23
WAKE#
SERIRQ
THRM#
D21
VRMPWRGD
A20
TP11
AG19
AH21
AG21
A21
C12
C21
AE18
K1
AF8
AJ22
A9
D19
L1
AE19
AG22
AF21
AH24
A8
GPIO1
GPIO6
GPIO7
GPIO8
GPIO12
GPIO13
GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5
M7
AJ24
B21
AH20
AJ20
AJ21
SPKR
MCH_SYNC#
TP3
TP8
TP9
TP10
EC_LID_OUT#
EC_SMI#
C10
PWROK
G20
SLP_S3#
SLP_S4#
SLP_S5#
GLAN_RXN
GLAN_RXP
1 C1221GLAN_TXN_C
1 C1222GLAN_TXP_C
L29
L28
M27
M26
PERN2
PERP2
PETN2
PETP2
WLAN
24
24
24
24
PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3
0.1U_0402_16V7K~N2
0.1U_0402_16V7K~N2
PCIE_RXN3
PCIE_RXP3
1 C1223PCIE_C_TXN3
1 C1224PCIE_C_TXP3
J29
J28
K27
K26
PERN3
PERP3
PETN3
PETP3
28
28
28
28
PCIE_RXN4
PCIE_RXP4
PCIE_TXN4
PCIE_TXP4
0.1U_0402_16V7K~N2
0.1U_0402_16V7K~N2
PCIE_RXN4
PCIE_RXP4
1 C1225PCIE_C_TXN4
1 C1226PCIE_C_TXP4
G29
G28
H27
H26
PERN4
PERP4
PETN4
PETP4
24
24
24
24
PCIE_RXN5
PCIE_RXP5
PCIE_TXN5
PCIE_TXP5
0.1U_0402_16V7K~N2
0.1U_0402_16V7K~N2
PCIE_RXN5
PCIE_RXP5
1 C1228PCIE_C_TXN5
1 C1227PCIE_C_TXP5
E29
E28
F27
F26
PERN5
PERP5
PETN5
PETP5
C29
C28
D27
D26
PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
+3VS
29
EC_SWI#
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
EC_SWI#
USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11
Q106
SSM3K7002FU_SC70-3
ICH_SMBDATA
1
D
2
2.2K_0402_5%
R1124
S
3
13,14,15,24 ICH_SM_DA
D
S
1ICH_SMBCLK
3
G
13,14,15,24 ICH_SM_CLK
2
2
G
5
6
7
8
+5VS
Q107
SSM3K7002FU_SC70-3
AG2
AG1
Within 500 mils
1 @
C1218
4.7P_0402_50V8C
2
R695 100_0402_5%
M_PWROK
1
2
ICH_PWROK 7,29
1
2
@ R1097
10K_0402_5%
DPRSLPVR 7,43
T127 PAD
M2
1
2
0_0402_5% R1098
ICH_LOW_BAT#
B13
PWRBTN#
R3
PWRBTN_OUT#
LAN_RST#
D20
RSMRST#
D22
1
2
R1100 0_0402_5%
R_EC_RSMRST#
R5
CK_PWRGD_R
R6
M_PWROK
SLP_M#
B16
CL_CLK0
CL_CLK1
F24
B19
CL_CLK0
CL_DATA0
CL_DATA1
F22
C19
CL_DATA0
CL_VREF0
CL_VREF1
C25
A19
CL_VREF0_ICH
CL_RST0#
CL_RST1#
F21
D18
CL_RST#
PBTN_OUT# 29
R_EC_RSMRST# R1104
1
R1105 1
2 0_0402_5%
2 10K_0402_5%
CK_PWRGD 15
M_PWROK 7
+3VS
T129 PAD
CL_CLK0
7
0.1U_0402_16V4Z
1
CL_DATA0 7
CL_RST#
R1107
453_0402_1%
C
2
+3VALW
R1118
NA lead free
7
D54
A16
C18
C11
C20
R1106
2
3.24K_0402_1%
1
C1219
2
@
1
ACIN
29,37,38
RB411DT146 SOT23
1
2
10K_0402_5%
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
V27
V26
U29
U28
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
DMI_RXN0 7
DMI_RXP0 7
DMI_TXN0 7
DMI_TXP0 7
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
Y27
Y26
W29
W28
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
DMI_RXN1 7
DMI_RXP1 7
DMI_TXN1 7
DMI_TXP1 7
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
AB27
AB26
AA29
AA28
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
DMI_RXN2 7
DMI_RXP2 7
DMI_TXN2 7
DMI_TXP2 7
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
AD27
AD26
AC29
AC28
DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3
DMI_RXN3 7
DMI_RXP3 7
DMI_TXN3 7
DMI_TXP3 7
T26
T25
CLK_PCIE_ICH#
CLK_PCIE_ICH
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
USBP0N
USBP0P
USBP1N
USBP1P
SPI_CLK
USBP2N
SPI_CS0#
USBP2P
SPI_CS1#/GPIO58/CLGPIO6 USBP3N
USBP3P
SPI_MOSI
USBP4N
SPI_MISO
USBP4P
USBP5N
OC0#/GPIO59
USBP5P
OC1#/GPIO40
USBP6N
OC2#/GPIO41
USBP6P
OC3#/GPIO42
USBP7N
OC4#/GPIO43
USBP7P
OC5#/GPIO29
USBP8N
OC6#/GPIO30
USBP8P
OC7#/GPIO31
USBP9N
OC8#/GPIO44
USBP9P
OC9#/GPIO45
USBP10N
OC10#/GPIO46
USBP10P
OC11#/GPIO47
USBP11N
USBP11P
USBRBIAS
USBRBIAS#
USB
AF29
AF28
AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2
DMI_IRCOMP
1
R1103
0_0402_5%
2
@
1
R656
0_0402_5%
2
POK
R_EC_RSMRST#
29 EC_RSMRST#
B
CLK_PCIE_ICH# 15
CLK_PCIE_ICH 15
R1120
1
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N8
USB20_P8
USB20_N9
USB20_P9
USB20_N10
USB20_P10
24.9_0402_1%
2
USB20_N0 31
USB20_P0 31
USB20_N1 31
USB20_P1 31
USB20_N2 31
USB20_P2 31
USB20_N3 24
USB20_P3 24
USB20_N4 31
USB20_P4 31
USB20_N5 31
USB20_P5 31
USB20_N6 24
USB20_P6 24
USB20_N7 28
USB20_P7 28
USB20_N8 31
USB20_P8 31
USB20_N9 31
USB20_P9 31
USB20_N10
USB20_P10
Within 500 mils
+1.5VS
USB0
USB1
Camera
3G/TV
BlueTooth
FingerPrinter
WLAN
Express Card
USB2
USB3
Mini Card2
A
ICH9M REV 1.0
Compal Secret Data
2006/02/13
2006/03/10
Deciphered Date
Title
ICH9(3/4)_DMI,USB,GPIO,PCIE
Rev
1.0
LA-4841P
Date:
5
4
39
R1125
22.6_0402_1%
ICH_SMBCLK 24,28
Issued Date
10K_1206_8P4R_5%
D
4.7P_0402_50V8C
2
RP41
N4
N5
N6
P6
M1
N2
M4
M3
N3
N1
P5
P3
USBRBIAS
ICH_SMBDATA 24,28
2
10K_1206_8P4R_5%
2
2.2K_0402_5% R1123
5
6
7
8
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
1
1
10K_1206_8P4R_5%
RP40
31
31
31
31
1
1
29
29
29
RSMRST circuit
PERN1
PERP1
PETN1
PETP1
D23
D24
F23
10_0402_5%
1 @
C1217
T126 PAD
@
R1092
@
0.1U_0402_16V7K~N2
0.1U_0402_16V7K~N2
SPI_CS1#_R
@
R1091
10_0402_5%
CLK_14M_ICH 15
CLK_48M_ICH 15
ICH_PWROK
BATLOW#
MEM_LED/GPIO24
GPIO10/SUS_PWR_ACK
GPIO14/AC_PRESENT
WOL_EN/GPIO9
GLAN_RXN
GLAN_RXP
GLAN_TXN
GLAN_TXP
+3VALW
1
5
6
7
8
4
3
2
1
S4_STATE#/GPIO26
CK_PWRGD
22
22
22
22
RP39
USB_OC#3
USB_OC#5
USB_OC#10
USB_OC#11
SLP_S3#
SLP_S4#
SLP_S5#
CLPWROK
N29
N28
P27
P26
D25
E23
4
3
2
1
C16
E16
G17
DPRSLPVR/GPIO16
GLAN
18 SPI_CS1#_R
USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#0
SLP_S3#
SLP_S4#
SLP_S5#
CLK_14M_ICH
+3VS
U56D
ME_EC_DATA1
3G
A
SUSCLK
ICH_SUSCLK
1
2
8.2K_0402_5%
ME_EC_CLK1
Express Card
4
3
2
1
CLK_14M_ICH
CLK_48M_ICH
P1
R1089
ICH9M REV 1.0
B
EC_SWI#
USB_OC#1
USB_OC#2
USB_OC#4
H1
AF3
CLK14
CLK48
PMSYNC#/GPIO0
L4
CLKSATAREQ#
@
ICH_LOW_BAT#
STP_PCI#
STP_CPU#
EC_SMI#
EC_SCI#
EC_SMI#
EC_SCI#
PAD T130
PAD T132
15 CLKSATAREQ#
2EC_PME#
0_0402_5%
1
R1230
A14
E19
OCP#
ISOLATEB
LANWAKE_R_ICH_WAKE#
22,24,28 LANWAKE_R_ICH_WAKE#
SMBALERT#/GPIO11
H_STP_PCI#
R_STP_CPU#
4
OCP#
22 ISOLATEB
0825 Change GPIO pin assignment
0612 Change GPIO pin assignment
22,24,28 ICH_PCIE_WAKE_R_ECARD#
A17
2 VRMPWRGD
0_0402_5%
checklist pull hi
ICH_PCIE_WAKE_R_ECARD#
M6
EC_LID_OUT#
1
R1099
2
PAD T128
100K_0402_5%
@
SUS_STAT#/LPCPD#
SYS_RESET#
PM_BMBUSY#
ICH_PCIE_WAKE#
SERIRQ
EC_THERM#
29 SERIRQ
29 EC_THERM#
7,29,43
RI#
R4
G19
PCI_CLKRUN#
27,29 PCI_CLKRUN#
High -->No boot
F19
SUS_STAT#
XDP_DBRESET#
GPIO21
GPIO19
GPIO36
GPIO37
Direct Media Interface
+3VS
15 H_STP_PCI#
15 H_STP_CPU#
ICH_RI#
AH23
AF19
AE21
AD20
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37
1
EC_SCI#
SMBCLK
SMBDATA
LINKALERT#/GPIO60/CLGPIO4
SMLINK0
SMLINK1
2
PM_BMBUSY#
G16
A13
E17
C17
B18
2
CLKSATAREQ#
ICH_SMBCLK
ICH_SMBDATA
CL_RST#1
ME_EC_CLK1
ME_EC_DATA1
SATA
GPIO
24,28 ICH_SMBCLK
24,28 ICH_SMBDATA
OCP#
Place closely pin H1
CLK_48M_ICH
SPI
R1095
D
EC_THERM#
2 2.2K_0402_5%
2 2.2K_0402_5%
PCI-Express
R1093
@ R1094
R1085 1
R1087 1
+3VALW
PCI_CLKRUN#
SMB
R1090
1
Place closely pin AF3
Clocks
@ R1088
2
SYS GPIO
Power MGT
R1086
3
MISC
GPIO
Controller Link
R1084
4
SERIRQ
1
2
10K_0402_5%
1
2
8.2K_0402_5%
1
2
8.2K_0402_5%
1
2
10K_0402_5%
1
2
10K_0402_5%
1
2
8.2K_0402_5%
1
2
8.2K_0402_5%
2
5
+3VS
3
2
Sheet
1
20
of
45
5
4
3
+RTCVCC
22U_0805_6.3V6M~D 646mA
C1235
2
1
1
C1236
2
C1237
2
1
2
2.2U_0603_6.3V4Z
22U_0805_6.3V6M~D
D45
1
2
ICH_V5REF_RUN
20 mils
1
2
1
1
2
10U_0805_10V4Z
C1254
1U_0603_10V4Z
C1255
C1258
2
B
VCC1_5_A[18]
VCC1_5_A[19]
AC21
VCC1_5_A[20]
G10
G9
VCC1_5_A[21]
VCC1_5_A[22]
AC12
AC13
AC14
VCC1_5_A[23]
VCC1_5_A[24]
VCC1_5_A[25]
1
2
+1.5VS
C1263
VCC1_5_A[17]
AC18
AC19
1
11mA
VCC1_5_A[26]
VCC1_5_A[27]
VCC1_5_A[28]
VCC1_5_A[29]
VCC1_5_A[30]
VCCLAN1_05[1]
VCCLAN1_05[2]
19/78/78mA
A12
B12
1
2
L100
1UH_20%_0805~D
VCCLAN3_3[1]
VCCLAN3_3[2]
A27
VCCGLANPLL
D28
D29
E26
E27
VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
80mA
1
2
C1269
2.2U_0603_6.3V4Z
2
A10
A11
23mA
+1.5VS
10U_0805_10V4Z
A
1
+1.5VS
1
C1270
1
C1271
1mA
2
+3VS
A26
AJ4
AJ3
VCCSUS1_05[1]
VCCSUS1_05[2]
AC8
F17
2
1
2
(DMI)
2
1
2
1
11mA
T140
T141
VCCSUS1_5[1]
VCCSUS1_5[2]
F18
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
A18
D16
D17
E22
VCCSUS3_3[5]
AF1
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7
Add 0.1uF
1
2
0.1U_0402_16V4Z
1
C1252
+3VALW
0.1U_0402_16V4Z
11mA
AD8 VCCSUS1_5_ICH_1
VCCCL3_3[1]
VCCCL3_3[2]
1
C1253
+3VS
2
2
T142
VCCSUS1_5_ICH_2
1
+3VALW
2
T143
C1257
0.1U_0402_16V4Z
212mA
G22
+3VALW
1
2
1
2
1
2
VCCCL1_05_ICH
1
G23
T144
C1264
19/73/73mA
A24
B24
+LAN_IO
1
2
VCC_LAN1_05_INT_ICH_1
1
2
C1267
VCC_LAN1_05_INT_ICH_2
0.1U_0402_16V4Z~D
2
0_0603_5%
B9
F9
G3
G6
J2
J7
K7
VCCHDA
VCCCL1_5
2
+3VS
@
GLAN POWER
0.1U_0402_16V4Z
C1268
1
R1129
2
2
1
308mA
VCCSUSHDA
VCCCL1_05
2
1
1
2
@
2
0.1U_0402_16V4Z
C1266 0.1U_0402_16V4Z~D
VCCUSBPLL
+3VS
C1265 1U_0603_10V4Z
+LAN_IO
2
USB CORE
AJ5
AA7
AB6
AB7
AC6
AC7
11mA
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
+3VS
1
+3VS
C1261
0.022U_0402_16V7K~D
0.1U_0402_16V4Z
AC9
AD19
AF20
AG24
AC20
C1260
0.022U_0402_16V7K~D
C1262
VCC1_5_A[9]
VCC1_5_A[10]
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A[13]
VCC1_5_A[14]
VCC1_5_A[15]
VCC1_5_A[16]
AC10
VCC3_3[3]
VCC3_3[4]
VCC3_3[5]
VCC3_3[6]
C1259
0.1U_0402_16V4Z~D
+1.5VS
AC11
AD11
AE11
AF11
AG10
AG11
AH10
AJ10
ATX
1U_0603_10V4Z
1
VCC3_3[7]
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
C1244
+1.5VS
2
VCC1_5_A[1]
VCC1_5_A[2]
VCC1_5_A[3]
VCC1_5_A[4]
VCC1_5_A[5]
VCC1_5_A[6]
VCC1_5_A[7]
VCC1_5_A[8]
2mA
AJ6
C1243
1U_0603_10V4Z
AC16
AD15
AD16
AE15
AF15
AG15
AH15
AJ15
1
AG29
VCC3_3[2]
+VCCP
0.1U_0402_16V4Z
C1256
VCC3_3[1]
C1240
2
C1242
2
1342mA
+1.5VS
VCCSATAPLL
48mA
1
5ohm@100MHz
1
2
+VCCP
L98
BLM18PG181SN1_0603~D
C1250
2
1
AJ19
ARX
1
47mA
V_CPU_IO[1]
V_CPU_IO[2]
+1.5VS
C1239
10U_0805_10V4Z
2
0.1U_0402_16V4Z
L99
10UH_LB2012T100MR_20%_0805~D
1
2
23mA
C1249
+1.5VS
C1306
1U_0603_10V6K~D
W23
Y23
AB23
AC23
0.1U_0402_16V4Z
2
1
C1238
2
C1248
1
1
VCC_DMI[1]
VCC_DMI[2]
VCC3_3[8]
VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]
L97
BLM18PG181SN1_0603~D
1
2
0.01U_0402_16V7K
0.1U_0402_16V4Z
20 mils
2
C1246
ICH_V5REF_SUS
R29
2
C1245
VCCDMIPLL
AA26
AA27
AA3
AA6
AB1
AA23
AB28
AB29
AB4
AB5
AC17
AC26
AC27
AC3
AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29
AD4
AD5
AD6
AD7
AD9
AE12
AE13
AE14
AE16
AE17
AE2
AE20
AE24
AE3
AE4
AE6
AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27
AF5
AF7
AF9
AG13
AG16
AG18
AG20
AG23
AG3
AG6
AG9
AH12
AH14
AH17
AH19
AH2
AH22
AH25
AH28
AH5
AH8
AJ12
AJ14
AJ17
AJ8
B11
B14
B17
B2
B20
B23
B5
B8
C26
C27
E11
E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28
H29
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1
1
C1232
C1233
C1247
R1128
100_0402_5%~D
C
VCCA3GP
D46
VCC1_5_B[1]
VCC1_5_B[2]
VCC1_5_B[3]
VCC1_5_B[4]
VCC1_5_B[5]
VCC1_5_B[6]
VCC1_5_B[7]
VCC1_5_B[8]
VCC1_5_B[9]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCC1_5_B[47]
VCC1_5_B[48]
VCC1_5_B[49]
A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
0.1U_0402_16V4Z
0.1U Change to 1U
+5VALW +3VALW
V5REF_SUS
AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
F25
G25
H24
H25
J24
J25
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23
W24
W25
K23
Y24
Y25
VCC1_05[1]
VCC1_05[2]
VCC1_05[3]
VCC1_05[4]
VCC1_05[5]
VCC1_05[6]
VCC1_05[7]
VCC1_05[8]
VCC1_05[9]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
4.7U_0603_6.3V6M
2
C1241
1U_0603_10V6K~D
V5REF
CORE
2mA AE1
1634mA
VCCRTC
VCCP_CORE
ICH_V5REF_SUS
A6
PCI
C1234
220U_D2_4VM
2
+
1
U56E
22U_0805_6.3VAM
1
2
1
D
R1127
100_0402_5%~D
1
2
A23
2mA
VCCPSUS
1
2
+1.5VS
BLM21PG600SN1D_0805~D
+3VS
1
U56F
G3: 6uA
ICH_V5REF_RUN
VCCPUSB
2
40 mils
L96
+5VS
C1230
0.1U_0402_16V4Z
1
C1231
1U_0603_10V4Z~D
C1229
0.1U_0402_16V4Z
20 mils
0ohm Change to BEAD
2
+VCCP
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25
VSS_NCTF[1]
VSS_NCTF[2]
VSS_NCTF[3]
VSS_NCTF[4]
VSS_NCTF[5]
VSS_NCTF[6]
VSS_NCTF[7]
VSS_NCTF[8]
VSS_NCTF[9]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]
A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29
D
C
B
ICH9M REV 1.0
A
VCCGLAN3_3
2
ICH9M REV 1.0
4.7U_0603_6.3V6M~D
Compal Secret Data
2006/02/13
Issued Date
2006/03/10
Deciphered Date
Title
ICH9(4/4)_POWER&GND
Rev
1.0
LA-4841P
Date:
5
4
3
2
Sheet
1
21
of
45
5
4
3
2
1
+3VALW
W=60mils
1
EN_WOL# 29
GLAN_TXP
23
HSIP
GLAN_TXN
24
HSIN
GLAN_REQ#9
33
CLKREQB
15 CLK_PCIE_LAN
26
REFCLK_P
15 CLK_PCIE_LAN#
27
REFCLK_N
60mil
20
PLT_RST#
+LAN_VDD_L
60mil
+LAN_VDD
+3VS
1
+LAN_IO
1
R1222
2
R327
1K_0402_5%
20,24,28 LANWAKE_R_ICH_WAKE#
1
SROUT12
5
FB12
ENSR
64
RSET
2 0_0402_5% LANWAKE# 19
ISOLATEB
ISOLATEB
2
20
R1205
15K_0402_5%
45
47
48
44
LED3
LED2
LED1
LED0
54
55
56
57
MDIP0
MDIN0
MDIP1
MDIN1
MDIP2
MDIN2
MDIP3
MDIN3
3
4
6
7
9
10
12
13
DVDD12
DVDD12
DVDD12
DVDD12
DVDD12
DVDD12
21
32
38
43
49
52
EVDD12
EVDD12
22
28
VDD33
VDD33
VDD33
VDD33
16
37
46
53
36
LAN_XTAL1
60
LAN_XTAL2
61
Y6
1
2
2
25MHZ_20P_1BX25000CK1A
1
2
1
C423
27P_0402_50V8J
C422
27P_0402_50V8J
L92, C788, C778
close to U28(Pin 1) <200mil
TP58 3.6K_0402_5%
2
TP59
TP60
LAN_EEDI R1199
@
1
@
@
B
LAN_LED3
LAN_LED2
LAN_LED1
LAN_LED0
LANWAKEB
ISOLATEB
C421
LAN_DVDD12
30mil
1
C389
1
C390
CKTAL1
CKTAL2
65
EXPOSE_PAD
25
EGND
31
EGND
15
17
18
34
35
39
40
41
42
NC
NC
NC
NC
NC
NC
NC
NC
NC
+LAN_IO
LAN_AVDD12
VDDSR
63
+LAN_VDDSR
AVDD33
AVDD33
2
59
LAN_AVDD33
AVDD12
AVDD12
AVDD12
AVDD12
8
11
14
58
IGPIO
OGPIO
50
51
W=40mils
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
1
2
3
4
5
6
7
8
9
10
11
12
TCT1
TD1+
TD1TCT2
TD2+
TD2TCT3
TD3+
TD3TCT4
TD4+
TD4-
MCT1
MX1+
MX1MCT2
MX2+
MX2MCT3
MX3+
MX3MCT4
MX4+
MX4-
24
23
22
21
20
19
18
17
16
15
14
13
RJ45_TX3RJ45_TX3+
RJ45_TX2RJ45_TX2+
5
6
7
8
1
C1440
1
C1426
LAN_AVDD12
LAN_DVDD12
LAN_CABDT
@
R1206
1
C1441
1000P_1206_2KV7K
+3VS
LAN_LED2 1
C1423
0.1U_0402_10V7K~N
C1422
0.1U_0402_10V7K~N
C1421
0.1U_0402_10V7K~N
0.1U_0402_10V7K~N C1435
0.1U_0402_10V7K~N C1449
0.1U_0402_10V7K~N C1420
0.1U_0402_10V7K~N C1434
C395
Amber LED+
LAN_LED0
1 R105
2 LAN_ACTIVITY#
220_0402_5%
RJ45_TX3-
11
Amber LED-
RJ45_TX3+
7
PR4+
RJ45_RX1-
6
PR2-
RJ45_TX2-
5
PR3-
RJ45_TX2+
4
PR3+
RJ45_RX1+
3
PR2+
RJ45_TX0-
2
PR1-
RJ45_TX0+
1
PR1+
2
2
LAN_LED3 1
LED2_LED3
2
+LAN_IO
LINK_100_1000#
R359
10K_0402_5%
D5
LAN_LED1 1
2
0_0402_5%
1
2
0_0402_5%
R321
1
2
0_0402_5%
R1224
1
2
0_0402_5%
LAN_LED3 1
10
SHLD2
16
SHLD1
15
SHLD2
14
SHLD1
13
PR4-
Green LEDGreen LED+
TYCO_3-440470-4
CONN@
LED2_LED3 1 R106
2
220_0402_5%
LED1_LED3 1 R79
2 LINK_100_1000#
220_0402_5%
D6
R7
2
LED1_LED3
2
8
9
+LAN_IO
2
350uH_GSL5009LF
1
2
12
+LAN_IO
R1223
2
1
JLAN1
+LAN_IO
RJ45_TX0RJ45_TX0+
A
2
1
B
2
D4
RJ45_RX1RJ45_RX1+
1
These caps close to U47: Pin 8, 11, 14, 58
1
RP42
LAN_AVDD12
1
LAN_CABDT
2
C
LAN_AVDD12
2
2
0.1U_0402_16V7K~N
2
0.1U_0402_16V7K~N
D2
4
3
2
1
2
L24
FBML10160808121LMT_0603
2
1
+LAN_IO
+LAN_VDDSR
1
C419 1
2
V_DAC
LAN_MDIN3
LAN_MDIP3
V_DAC
LAN_MDIN2
LAN_MDIP2
V_DAC
LAN_MDIN1
LAN_MDIP1
V_DAC
LAN_MDIN0
LAN_MDIP0
2
1
1
C1442 1
0.01U_0402_16V7K
1 C1436
R2
0_0603_5%
75_1206_8P4R_5%
T51
0.01U_0402_16V7K
D
W=40mils
1
+LAN_VDD
2
0.1U_0402_16V7K~N
2
0.1U_0402_16V7K~N
R358
10K_0402_5%
2
2
C792 close to U47(PIN63)
, then C783 close to C792
L101
FBML10160808121LMT_0603
2
1
10K_0402_5%
C1415 1
2
R1203
0_0805_5%
LAN_MDIP0
LAN_MDIN0
LAN_MDIP1
LAN_MDIN1
LAN_MDIP2
LAN_MDIN2
LAN_MDIP3
LAN_MDIN3
RTL8111C-GR_QFN64_9X9
C409 1
2
1
+LAN_IO
+LAN_VDDSR
PERSTB
2 0_0402_5% 62
2
2.49K_0402_1%
2
LANWAKE_R_ICH_WAKE#
1 R1231
1 R1204
EEDO
EEDI/AUX
EESK
EECS
1
2
0.1U_0402_10V7K~N
22U_1206_6.3V6M
1
C412
2
1
C396
7,18,24,28,29,33
L23
1
2
4.7UH_1098AS-4R7M_1.3A_20%
1
0.1U_0402_10V7K~N
+LAN_VDD
2
0.1U_0402_10V7K~N C1439
GLAN_TXN
2
1
0.1U_0402_10V7K~N
20
2
1
0.1U_0402_10V7K~N C1438
GLAN_TXP
2
1
0.1U_0402_10V7K~N C1425
20
2
C452
2
C453
2
1
1
HSON
GLAN_RXN
1
2
3
HSOP
30
GLAN_RXP
20
2
1
+LAN_IO
29
20
1
These caps close to U47: Pin 21, 32, 38, 43, 49, 52
U47
0.1U_0402_16V7K~N
1 GLAN_RXP_C
0.1U_0402_16V7K~N
1 GLAN_RXN_C
15 GLAN_REQ#9
1
2
LAN_DVDD12
2
R1221
0_0603_5%
22U_1206_6.3V6M
2
G
S
C1437
2
C1447
These caps close to U47: Pin 16, 37, 46, 53
D
Q27
SSM3K7002FU_SC70-3
C
2
1
C1433
0.1U_0402_10V7K~N
1 1.5M_0402_5%
1
C1419
0.1U_0402_10V7K~N
2@ R1201
2
1
C394
0.1U_0402_10V7K~N
EN_WOL
2
1
C406
0.1U_0402_10V7K~N
1
D
2
1
C1432
0.1U_0402_10V7K~N
R1200
470K_0402_5%
1
22U_1206_6.3V6M
G
3
2
2
C420
@
0.1U_0402_10V7K~N
1
1
0.1U_0402_10V7K~N C1448
2
0.1U_0402_10V7K~N C1450
S
4+3VALW_Q1
SI3456BDV-T1-E3_TSOP6
2
B+_BIAS
LAN_DVDD12
1.5A
22U_1206_6.3V6M
1
C1431
1U_0603_10V6K
+LAN_VDD
L22
FBMA-L11-322513-201LMA40T_1210
D
Q108
6
5
2
1
+LAN_IO
A
2
Compal Secret Data
Issued Date
2007/1/15
Deciphered Date
2008/1/15
Title
Broadcom BCM5787M
Custom
Rev
1.0
LA-4841P
Date:
5
4
3
2
1
Sheet
22
of
45
5
4
3
2
1
L1
SATA HDD CONN
19 PSATA_IRX_DTX_N0_C
@ R304 1
PSATA_ITX_DRX_P0
PSATA_ITX_DRX_N0
@ R308 1
@ R314 1
C393
IRX_DTX_N0_C 2
2 0_0402_5%
1 3900P_0402_50V7K
19 PSATA_IRX_DTX_P0_C
@ R305 1
IRX_DTX_P0_C
2 0_0402_5%
1 3900P_0402_50V7K
19 PSATA_ITX_DRX_P0
19 PSATA_ITX_DRX_N0
1
+5VS
2
+5VS_HD
JSATA1
D
2 0_0402_5%
2 0_0402_5%
2
1
2
3
4
5
6
7
ITX_DRX_P0
ITX_DRX_N0
FBMA-L11-160808-301LMA20T_1206~D
GND
A+
AGND
BB+
GND
SATA ODD CONN
C392
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+5VS_HD
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
D
JSATA2
close JSATA2
ODD_ITX_DRX_P0
ODD_ITX_DRX_N0
19 ODD_ITX_DRX_P0
19 ODD_ITX_DRX_N0
19 ODD_IRX_DTX_N0_C
19 ODD_IRX_DTX_P0_C
C326
C327
1
1
ODD_IRX_DTX_N0
2
2 0.01U_0402_50V7K ODD_IRX_DTX_P0
0.01U_0402_50V7K
SUYIN_127043FB022S338ZR_RV
CONN@
+5VS
+5VS
+5VS_HD
10U_0805_10V4Z
10U_0805_10V4Z~N
0.1U_0402_16V7K~N
1
1
1
C575
C574
150U_B2_6.3VM_R45M
2
2
1
+
C
1
C296
2
2
C376
2
1
C503
2
2
0.1U_0402_16V7K~N
1
C506
C498
1
C377
GND
RX+
RXGND
TXTX+
GND
8
9
10
11
12
13
DP
5V
5V
MD
GND
GND
GND
GND
14
15
SUYIN_127382FR013S52_NR
0.1U_0402_16V4Z
1
1
2
3
4
5
6
7
2
C499
2
C
1000P_0402_50V7K~N
1U_0603_10V4Z
1000P_0402_50V7K~N
Close to ODD Conn
Close to SATA HDD
+1.8VS
0dB
1
-3.5dB
1
2
1
2
1
2
U23
19 PSATA_IRX_DTX_N0_C
C1272
+1.8VS
1
2
3
AI+
AI-
7
8
BO+
BO-
R290 1
R292 1
2
0.01U_0402_16V7K
2 0_0402_5%
2 0_0402_5%
34
13
SEL0_A
SEL0_B
@ R293 1
@ R294 1
2 0_0402_5%
2 0_0402_5%
33
14
SEL1_A
SEL1_B
R295 1
R298 1
2 0_0402_5%
2 0_0402_5%
32
15
SEL2_A
SEL2_B
R299 1
R300 1
2 0_0402_5%
2 0_0402_5%
31
16
SEL3_A
SEL3_B
R616 1
R617 1
2 5.1K _0402_1%
2 5.1K _0402_1%
30
29
EN_A
EN_B
2 470_0402_5%
19
IREF
@ R352 1
+1.8VS
R301 1
R303 1
2 0_0402_5%
2 0_0402_5%
11
12
CLKIN+
CLKIN-
VDD
VDD
VDD
VDD
VDD
AVDD
1
6
10
23
28
5
AO+
AO-
27
26
BIBI+
21
22
OUT+
OUT-
17
18
@ R285 1
@ R286 1
2 0_0402_5%
2 0_0402_5%
SD_A
SD_B
36
35
@ R288 1
@ R289 1
2 0_0402_5%
2 0_0402_5%
GND
GND
GND
GND
AGND
25
20
9
4
24
PAD
37
1
PSATA_ITX_DRX_P0
PSATA_ITX_DRX_N0
C1251 1
2 0.01U_0402_16V7K
2
19 PSATA_ITX_DRX_P0
19 PSATA_ITX_DRX_N0
19 PSATA_IRX_DTX_P0_C
R1074
470_0402_5%~D
B
1
2
1
2
1
2
0.1U_0402_16V4Z~N
1.2x
De-emphasis
0
0.1U_0402_16V4Z~N
C290
1
SEL3_ [A:B]
*
0.1U_0402_16V4Z~N
C289
1x
0.1U_0402_16V4Z~N
C288
0
*
Output De-emphasis Adjustment
0.1U_0402_16V4Z~N
C287
Swing
C691
SEL2_ [A:B]
10U_1206_16V4Z
C286
Output Swing Control
C1053
4700P_0402_25V7K~D
2
1
ITX_DRX_P0
C1052
4700P_0402_25V7K~D
2
1
ITX_DRX_N0
B
IRX_DTX_N0_C
IRX_DTX_P0_C
Equalizer Selection
SEL0_ [A:B] SEL1_ [A:B]
*
PI2EQX3201BZFE_TQFN36_6X5~D
Compliance Channel
0
0
no equalization
0
1
[0:2.5dB] @ 1.6 GHz
1
1
0
[2.5:4.5dB] @ 1.6 GHz
1
[4.5:6.5dB] @ 1.6 GHz
A
A
Issued Date
Compal Secret Data
2007/1/15
2008/1/15
Deciphered Date
Title
HDD/CDROM
Rev
1.0
LA-4841P
Date:
5
4
3
2
Sheet
1
23
of
45
A
B
C
D
E
Mini-Express Card for 3G Or TV Tuner
+3VS
1
1
2
+1.5VS
1
C193
4.7U_0805_10V4Z
2
1
C180
0.1U_0402_16V4Z
2
+3VALW
1
C195
4.7U_0805_10V4Z
2
1
C194
0.1U_0402_16V4Z
2
1
C192
0.1U_0402_16V4Z
2
1
C188
0.1U_0402_16V4Z
JMINI3
WL_WAKE_R_ICH_WAKE#
1
@R1232
+3VS
1
R661
15 CLK_PCIE_Rob#
15 CLK_PCIE_Rob
20_0402_5% WL_WAKE#
3G_CLKREQ#
2
10K_0402_5%
CLK_PCIE_Rob#
CLK_PCIE_Rob
R284 0_0402_5%
PLT_RST#
1
2
CLK_DB_R
20
20
PCIE_RXN5
PCIE_RXP5
20
20
PCIE_TXN5
PCIE_TXP5
2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
54
+3VS
LPC_FRAME_R#
1
LPC_AD3_R
@R2801
LPC_AD2_R
@ R2821
LPC_AD1_R
@ R2811
LPC_AD0_R
@ R2831
@R287
MINI2_OFF#
+1.5VS
2 LPC_FRAME#
LPC_AD3
0_0402_5%
2
0_0402_5%
LPC_AD2
2
0_0402_5%
LPC_AD1
2
LPC_AD0
0_0402_5%
2
0_0402_5%
LPC_FRAME# 19,29
LPC_AD[0..3]
19,29
PLT_RST# 7,18,22,28,29,33
+3VALW
ICH_SMBCLK
ICH_SMBDATA
ICH_SMBCLK 20,28
ICH_SMBDATA 20,28
USB20_N3 20
USB20_P3 20
(WWAN_LED#)
+3VS
2
1
2005/09/27 modified.
Base on OPTION GTM351E Datasheet Rev0.1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
Vcc 3.3V +/- 8%
Peak Icc 2750mA
with max supply droop 50mA
Average Icc 1000mA
GND1
@
R737
10K_0402_5%
FOX_AS0B226-S56N-7F
CONN@
2
20,22,28 WL_WAKE_R_ICH_WAKE#
R388
1
20_0402_5%
1
MINI2_OFF#
D
@ Q52
2N7002_SOT23
2
G
3G_OFF#
3G_OFF# 29
3
S
Mini-Express Card---WLAN
+3V_WLAN
3
3
2
0_0402_5%
+3V_WLAN
+3VS
+3VS
JMINI2
15 CLK_DEBUG_PORT
20
20
PCIE_RXN3
PCIE_RXP3
20
20
PCIE_TXN3
PCIE_TXP3
+3V_WLAN
PLT_RST#
CLK_DEBUG_PORT
R384 1 0_0402_5%
2 CLK_DB_R
PCIE_RXN3
1
PCIE_RXP3 R4031
R404
PCIE_C_RXN3
2
20_0402_5% PCIE_C_RXP3
0_0402_5%
PCIE_TXN3
PCIE_TXP3
1
@ R406
4
2
0_0402_5%
53
GND1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
54
2
1
C456
2
1
2
10K_0402_5%
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
LPC_FRAME# 19,29
MINI_RF_OFF#
2
2R373
R343
USB20_N6
USB20_P6
LED_WLAN#
2
100K_0402_5%
R389
1
20_0402_5%
+1.5VS
D
MINI_RF_OFF#
1
0_0402_5%1
0_0402_5%
0.1U_0402_16V4Z~N
2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
4.7U_0805_10V4Z~N
C489
1
15 CLK_PCIE_MCARD#
15 CLK_PCIE_MCARD
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
@ R1233
1
1
R86
LPC_AD[0..3] 19,29
MINI_RF_OFF#
PLT_RST# 7,18,22,28,29,33
+3V_WLAN
@ Q109
2N7002_SOT23
2
G
WL_OFF#
0.01U_0402_16V7K~N
WL_OFF# 29
S
1
3
ICH_PCIE_WAKE#
31 WLAN_ACTIVE
31
BT_ACTIVE
15 WLAN_REQ#4
ICH_PCIE_WAKE#
WLAN_ACTIVE
@ R380 1 0_0402_5%
2 MINI_PIN3
BT_ACTIVE @ R381 1 0_0402_5%
2 MINI_PIN4
WLAN_REQ#4
0.01U_0402_16V7K~N
C500
1
+1.5VS
1
R412
+1.5VS
ICH_SM_CLK 13,14,15,20
ICH_SM_DA 13,14,15,20
2
C488
C485
1
2
0.01U_0402_16V7K~N
USB20_N6 20
USB20_P6 20
LED_WLAN# 32
+5VS
+1.5VS
4
+3V_WLAN
FOX_AS0B226-S56N-7F
CONN@
2007/1/15
Issued Date
Compal Secret Data
2008/1/15
Deciphered Date
Title
Mini-Card/LED
Rev
1.0
LA-4841P
Date:
A
B
C
D
Sheet
E
24
of
45
5
4
3
2
1
2
2
+3VS
R302
R313
100K_0402_5%
@
For EMI
MIC2_R
2
2
2
15
LINE2-R(PORT E)
2.2U_0603_6.3V6K
MIC2_C_L
16
MIC2_L(PORT F)
C141
2.2U_0603_6.3V6K
MIC2_C_R
17
MIC2_R(PORT F)
23
24
LINE1_OUT_L
35
LINEL
LINER
LINE1_OUT_R
36
LOUT2-L(PORT A)
39
LOUT2-R(PORT A)
41
LINE1_L(PORT C)
SPDIFO2
45
LINE1_R(PORT C)
DMIC_CLK1/2
46
NC
43
1000P_0402_50V7K~N
C677
1000P_0402_50V7K~N
+MIC1_VREFO
26
1
R593
1
R589
2
6.8K_0402_5%
2
6.8K_0402_5%
AMP_LEFT 26
10mil
AMP_RIGHT 26
1
LINE2-L(PORT E)
C672
1
1
14
DVDD_IO
DVDD
9
38
U22
25
2
0.1U_0402_16V4Z
R92
2.2K_0402_5%
ACZ_SYNC
1
2 R_MIC_JD
R614
20K_0402_1%
HP_JD
2
1 R_HP_JD
@ R611
39.2K _0402_1%
CPLS HP-JD
2
1
R615
5.1K _0402_1%
R572
2
1
EAPD
0_0402_5%
1
@
2
1
10P_0402_50V8J
C674
10P_0402_50V8J
C682
10P_0402_50V8J
C686
@
2
26
@
2
MIC1_L(PORT B)
SDATA_IN
MIC1_R(PORT B)
CBN
30
CBP
29
12
PCBEEP
11
RESET#
37
MIC1_VREFO_L
28
HPOUT-R(PORT I)
32
HP_ROUT
HPOUT-L(PORT I)
33
HP_LOUT
SYNC
SDATA_OUT
GPIO0/DMIC1/2
GPIO3/DMIC3/4
SENSE A
SENSE B
VREF
27
JDREF
40
47
EAPD
CPVEE
31
48
SPDIFO1
DVSS1
DVSS2
ACZ_BITCLK_CODEC
1
2
R610 0_0402_5%
AC97_SDIN0_CODEC
1
2 0_0402_5%
R613
C142 1
2.2U_0603_6.3V6K
2
MONO_OUT
2
3
13
34
4
7
1
8
22
5
MIC_JD
6
21
10
ACZ_SDOUT
19 ACZ_SDOUT
BIT_CLK
2
1
1
2
R612 10_0402_5% C673 10P_0402_50V8J
AVSS1
AVSS2
10mil
JMIC1
C37
ACZ_BITCLK 19
ADC_ACZ_SDIN0
CPLS HP-JD
19
modify_11/12
+MIC1_VREFO
@ C667
1000P_0402_50V7K~N
@ C668
1000P_0402_50V7K~N
+AC97_VREF
MIC-L
+MIC1_VREFO
27 ohm
26
HPR
1
2
R546
27.4_0603_1%
HPL
1
2
R554
27.4_0603_1%
26
220P_0402_50V7K
PLUG_IN
PLUG_IN
HPR
HPR
HPL
HPL
HPR
R131
HPL
0_0402_5%
@
1
C39
220P_0402_50V7K
2
2
R130
0_0402_5%
@
C50
10P_0402_50V8J
+AC97_VREF=10mil
1
26
42
2
C681
20K_0402_1%
R569
2.2U_0603_6.3V6K
C1452
0.1U_0402_16V4Z
1
1
2
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
1
ACZ_SYNC
ACZ_RST#
MIC2-VREF
44
1
19
MONO_IN
19
DMIC_CLK3/4
MIC-L
2
26
ACZ_RST#
LINE2-VREF
MIC-R
MIC-R
2
MIC-L 1
C_MIC1_L
2
C689 2.2U_0603_10V6K
MIC-R1
C_MIC2_R
2
C690 2.2U_0603_10V6K
MONO_IN
20
MIC_JD
MIC_JD
1
1
2
2
C51
1
2
3
4
5
6
7
8
9
10
11
12
G1
G2
C
ACES_87212-1200
CONN@
10P_0402_50V8J
12/13 Modified this symbol for pin 13 and 14.
Do not re-copy this symbol for other use
1
10mil
LINE1-VREF
10mil
R111
2.2K_0402_5%
C1453
10U_0805_10V4Z
2
18
19
S
D
Q25
SSM3K7002FU_SC70-3
@
0.1U_0402_16V4Z
2
C140
C
S
D
2
G
PLUG_IN
Q24
SSM3K7002FU_SC70-3
@
C685
C669
2
+MIC2_VREFO
1
3
26
C666
10U_1206_16V4Z
2
26
MIC2_L
1
1
C680
HP_JD
D
2
G
2
26
40mil
0.1U_0402_16V4Z
1
AVDD2
C687
10U_1206_16V4Z
1
1
C671
AVDD1
L41 1
2
FBM-L11-160808-800LMT_0603
1
+3VS
1
+AVDD_AC97
D
PLUG_IN#
0_0603_5%
1
2
R568
0.1U_0402_16V4Z
PLUG_IN#
3
20mil
+VDDA
1
1
HD Audio Codec
100K_0402_5%
@
ALC272-GR_LQFP48
GND
modify_11/12
GNDA
R900
U50
2
GND
3
VIN
NC
VOUT
4
RT9198-4GPBG SOT-23 5P 4.75V
1
C882
2
1
2
3
1
2
R1161
2
0_0603_5%
R1171
2
0_0603_5%
R1181
2
0_0603_5%
5
0.1U_0402_16V7K~N
EN
C883
A
C881
0.1U_0402_16V7K~N
4.7U_0805_10V4Z
10K_0603_1%
1
2
0_0603_5%
INTSPK_L1
INTSPK_L2
INTSPK_R1
INTSPK_R2
D18 SM05T1G_SOT23-3~D
@
1
2
3
4
5
6
1
2
3
4
GND1
GND2
ACES_88231-0400
CONN@
Compal Secret Data
Issued Date
2008/05/07
2009/05/07
Deciphered Date
26
26
26
INTSPK_L2
26
Title
HD CODEC 92HD81
Size
Date:
5
INTSPK_L1
A
C884
2
4.7U_0805_10V4Z~N
1
JSPK2
2
100P_0402_25V8K
INTSPK_L2
C16
@
R1151
+5VS
Speaker Connector
3
1
100P_0402_25V8K
INTSPK_L1
C15
@
2
0_0603_5%
@
2 GNDA
0_0603_5%
100P_0402_25V8K
INTSPK_R2
C9
@
1
@ R129
D14 SM05T1G_SOT23-3~D
GNDA
GNDR14 1
100P_0402_25V8K
INTSPK_R1
C8
@
GND
+VDDA
Place U50 close to U6
INTSPK_R2
B
INTSPK_R1
B
4
3
2
Document Number
Rev
1.0
LA-4841P
Sheet
1
25
of
45
A
B
C
D
E
R537
W=40Mil
C651
10U_0805_10V4Z
D10
U18
C642 1
0.47U_0603_10V7K
25 AMP_RIGHT
25
C638 1
0.47U_0603_10V7K
2
C650 1
0.47U_0603_10V7K
2
C636 1
0.47U_0603_10V7K
AMP_LEFT
10K_0402_5% 2
7
2
2
AMP_R
17
AMP_L
GAIN0
2
2 10K_0402_5%
@ R512 1
2 10K_0402_5%
@ R573 1
GAIN1
18
SPK_R1
1
R505
INTSPK_R1
2
0_0603_5%
INTSPK_R1 25
20
13
11
1
GND
1
2
GND
GND
3
4
ROUT-
14
SPK_R2
1
R504
INTSPK_R2
2
0_0603_5%
INTSPK_R2 25
LOUT+
4
SPK_L1
1
R502
INTSPK_L1
2
0_0603_5%
INTSPK_L1 25
LOUT-
8
SPK_L2
1
R503
INTSPK_L2
2
0_0603_5%
INTSPK_L2 25
L58
1
MIC2_R_L
2
1
@ C52
NC
12
BYPASS
10
MIC_L_3
2
0_0603_5%
100P_0402_50V8J
MIC_GND
D12
2
+MIC2_VREFO
D53
1R132 1
R134
3
0_0402_5%
@
2
2 4.7K_0402_5%
2
@
1
2
GND
GND
3
4
C654
MIC2_L
25
4
220P_0402_50V7K
modify_11/12
PSOT05C-LF-T7 SOT-23-3
RB751V_SOD323
R805
MIC_R1
1
2
1
1K_0402_5%
C769
1
L59
1
MIC2_R_R
2
1
@ C54
100P_0402_50V8J
MIC_R_3
2
0_0603_5%
1
C770
220P_0402_50V7K
ACES_88231-02001
1
2
1
2
1
1K_0402_5%
MIC2_R
25
2
MIC_GND
2 1U_0603_10V4Z
P3017THF TSSOP 20P
1
21
R801
ACES_88231-02001
SHUTDOWN
+3VS
2 10K_0402_5%
ROUT+
LIN-
19
1
2
MIC_GND
GNDA
MIC_L1
2 10K_0402_5%
0_0603_5%
@
2 4.7K_0402_5%
RB751V_SOD323
R513 1
LIN+
5
R1228
1R128 1
2
+MIC2_VREFO
3
RIN-
9
@ R506
1
RIN+
GND1
GND2
GND3
GND4
4
R520 1
1
2
+5VS
VDD
PVDD1
PVDD2
2
L102 1
2
MBK1608121YZF_0603
1 +5VS
0_0402_5%
2
C648
0.1U_0402_16V4Z
2
1
16
15
6
1
3
3
2
R170
100K_0402_5%
Q31
SSM3K7002FU_SC70-3
3
S
1
C624
2
R171
1
PLUG_IN
2
PLUG_IN
25
GAIN0
GAIN1
GAIN
@
25
0
0
6dB
0
1
10dB
1
0
15.6dB
1
1
21.6dB
1K_0402_5%
R507
*
2
2
G
EC_MUTE#
100P_0402_50V8J
29
CH751H-40_SC76
1
2.7K_0402_5%
D
1
1
D28
2
EAPD
Change to 100p from 0.01u for EMI
-1012
Buzzer need to support ICH/PCM_SPK/Battery_low and WL_on/off
2
2
1
+VDDA
R626
10K_0402_5%
2
C695
2
1
1
1U_0603_10V4Z
R624
10K_0402_5%
C366
1
BEEP#
R156
1
2
1
R311
2
560_0402_5%
1U_0603_10V4Z
2
C688
2
29
1
1
EC Beep
C
47K_0402_5%
2
B
3
E
2
MONO_IN
MONO_IN 25
1U_0603_10V4Z
1
2
Q36
R623
2SC2411K_SC59 2.4K_0402_5%
C367
2
47K_0402_5%
2
1
R160
2
560_0402_5%
1U_0603_10V4Z
1
R157
1
1
1
SB_SPKR
1
D11
RB751V_SOD323
R310
10K_0402_5%
2
20
ICH Beep
2
1
Compal Secret Data
Issued Date
2007/1/15
2008/1/15
Deciphered Date
Title
AMP/Audio Jack
Rev
1.0
LA-4121P
Date:
A
B
C
D
Sheet
E
26
of
45
5
4
+1.8VS_CR
AP2301GN_SOT23-3
Q34
3
1
@ R525 1
106
2 0_0402_5%~D
67
73
79
81
15
14
91
92
120
125
7
102
103
122
MC_3V#
SDCLK_MSCLK
SDDATA3
SDDATA2
SDDATA1
SDDATA0
SD_CMD
SD_WP
SDCD#
MS_D1/XD_D7
XD_D6
XD_D5
XD_D4
MS_BS/XD_D3
MS_D0/XD_D2
MS_D2/XD_D1
MS_D3/XD_D0
XD_CE#
XD_RB#
XD_CLE
XD_ALE
XD_WE#
XD_RE#
XD_WPO#
MS_CD#
XD_CD#
95
93
89
87
88
90
94
96
119
100
118
109
105
101
98
99
97
MSDATA1
R594
22K_0402_5%
Layout Note: Place close to
OZ129 and Shield GND.
C643
2
1
OZ129XI
15P_0402_50V8J
X3
1
2
MSBS
MSDATA0
MSDATA2
MSDATA3
1
C676
@
2
C635
2
1
OZ129XO
15P_0402_50V8J
C
+3VS_CR
SDCLK
+3VS
1
MEDIA_LED
3
MC_3V#
2
8
9
10
13
126
127
128
R241
470_0402_5%
U45
AP2301GN_SOT23-3
2
1
2
1
2
2
1
1
2
2
2
1
5.1K_0402_1%
1
270P_0402_50V7K
2
C659
56.2_0402_1%
56.2_0402_1%
R559
A
1
2
G
S SSM3K7002FU_SC70-3
MSCLK
1
C325
10P_0402_50V8J
2
3 in 1 Card Reader
L16
2
1
0_0603_5%
1
1
1
1
2
2
2
2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
SDDATA0
SDDATA1
SDDATA2
SDDATA3
SDCLK_MSCLK
SD_WP
SD_CMD
SDCD#
SDCLK_MSCLK
MSCD#
MSDATA0
MSBS
MSDATA3
MSDATA2
P-TWO_CU8042-A0G1G-P
4
3
2
1
Layout Note: Shield GND for
IEEE1394_TPA and TPB
B
J3IN1
TPA+ GND
TPA- GND
TPB+
TPBJ1394A
R199 1
2 22_0402_5%
SDCLK
R200 1
2 22_0402_5%
MSCLK
6
5
6
9
10
2
3
7
11
4
1
5
8
VDD_SD
DAT0_SD
DAT1_SD
DAT2_SD
CD/DAT3_SD
CLK_SD
WP_SD
CMD_SD
CD_SD
VSS_SD
VSS_SD
19
13
14
16
18
20
15
17
21
12
22
23
VCC_MS
VCC_MS
SCLK_MS
INS_MS
SDIO_MS
BS_MS
RESERVED_MS
RESERVED_MS
VSS_MS
VSS_MS
GND
GND
PROCO_MDR019-C0-1202
CONN@
R1219
A
R571
Compal Secret Data
Issued Date
2007/09/01
Deciphered Date
2008/09/01
Title
Rev
1.0
LA-4841P
Date:
4
OZ129_Card Reader / 1394
Custom
Layout Note: Place close to OZ129 Chipset.
5
2
C1444
2
2
MSDATA1
R235
R238
R236
R237
C324
10P_0402_50V8J
1
3
Q82
OZH24TN LQFP 128P_14X14
IEEE1394TPA+/- and IEEE1394TPB+/Same Wire Length
IEEE1394_TPAP0
IEEE1394_TPAN0
IEEE1394_TPBP0
IEEE1394_TPBN0
MC_3V#
1
C332
1U 10V Z Y5V 0603
1U_0603_10V4Z
56.2_0402_1%
56.2_0402_1%
1
C656
C323
D
IEEE1394_TPBIAS0
R555
2
85
86
+3VS_CR
R547
+3VS_CR
1
MSCD#
1
24.576MHz_16P_3XG-24576-43E1
R1216
@
1
NC
NC
NC
NC
NC
NC
NC
NC
82
80
77
70
69
65
LED behave:
Idel ---------> low
Accress data --> always high
B
4
113
111
112
107
108
110
117
114
PHY_TEST0
PHY_TEST1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
20,29 PCI_CLKRUN#
1 100K_0402_5%
MC_3V#
SD_CLK/MS_CLK
SD_D3
SD_D2
SD_D1
SD_D0
SD_CMD
SD_WP
SD_CD#
+3VS
AGND
AGND
AGND
AGND
AGND
AGND
R524 2
IEEE1394_TPBIAS0
IEEE1394_TPAP0
IEEE1394_TPAN0
IEEE1394_TPBP0
IEEE1394_TPBN0
2
IDSEL
PCI_CLK
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PCI_REQ#
PCI_GNT#
PCI_RST#
INTA#
PME#
CLKRUN#
CBS_IDSEL
CLK_PCI_CB
PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_PAR
PCI_REQ0#
PCI_GNT0#
PCI_RST#
PCI_PIRQG#
CB_PME#
2
12
16
33
66
68
104
115
116
121
123
124
1
100_0402_5%
76
75
74
72
71
D
CLK_PCI_CB
R514
PCI_AD21
AVCC
AVCC
AVCC
AVCC
5
45
42
39
40
41
43
44
17
18
1
11
3
6
VCC3.3
VCC3.3
VCC3.3
VCC3.3
C/BE3#
C/BE2#
C/BE1#
C/BE0#
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
26
56
PCI_VCC
PCI_VCC
2
1
1
3
2
CLK_PCI_CB
PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_PAR
PCI_REQ0#
PCI_GNT0#
PCI_RST#
PCI_PIRQG#
CB_PME#
28
38
46
55
TPBIAS
TPA+
TPATPB+
TPB-
2
0.1U_0402_10V6K
15
18
18
18
18
18
18
18
18
18
18
PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
OZ129XI
OZ129XO
OZH24TN
1
4.7U_ 0603_6.3V
PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
83
84
4.7P_0402_50V8C
18
18
18
18
78
XI
XO
2
5.9K_0402_1%
2
10_0402_5%~D
C
REF
R542
1
G
Q21
SSM3K7002FU_SC70-3
1
D
S
2
G
PLACE C1139, C1140
AS CLOSE AS U44
C345
SUSP
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
L15
1
2
FBM-L11-160808-601LMT_0603
4.7U_ 0603_6.3V
R1215
470_0402_5%
19
20
21
22
23
24
25
27
29
30
31
32
34
35
36
37
47
48
49
50
51
52
53
54
57
58
59
60
61
62
63
64
+3VS_PHY
+3VS
0.1U_0402_10V6K
+1.8VS_CR
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
2
C337
PLACE C1136, C1137, C1138
AS CLOSE AS U44
D
1
AS CLOSE AS U44
C343
0.1U_0402_10V6K
18 PCI_AD[0..31]
U44
1
0.1U_0402_10V6K
2
PLACE C1141, C1142 AS CLOSE AS U44
+3VS_PHY
C621
4.7U_ 0603_6.3V
1
C619
C660
0.1U_0402_10V6K
2
+3VS
C675
4.7U_ 0603_6.3V
2
1
0.1U_0402_10V6K
1
C632
0.1U_0402_10V6K
C679
C620
4.7U_ 0603_6.3V
G
D
2
C647
0.01U_0402_25V7K~N
R1214
1
2
100K_0402_5%
1
SUSP
2
D
S
36,42
3
+3VS
S
+1.8V
3
2
1
Sheet
27
of
45
5
4
3
2
1
Express card
D
+1.5VS
C91
2
U11
1
0.1U_0402_16V4Z~N
12
14
1.5Vin
1.5Vin
+3VS
C74
C85
7,18,22,24,29,33
2
2
PLT_RST#
2
4
+3VALW
1
0.1U_0402_16V4Z~N
PLT_RST#
SYSON
CPUSB#
3.3Vin
3.3Vin
17
1.5Vout
1.5Vout
3.3Vout
3.3Vout
3
5
AUX_IN
6
SYSRST#
2
2
PERST#
1
STBY#
NC
10
CPPE#
GND
9
20,22,24 ICH_PCIE_WAKE_R_ECARD#
+3VALW_PEC
4.7U_0805_10V4Z~N
19
OC#
SHDN#
EXPR_CPUSB#
8
PERST#
1
16
C92
0.1U_0402_16V4Z~N
7
1
C93
2
2
CPUSB#
18
RCLKEN
+3VS_PEC
4.7U_0805_10V4Z~N
P2231NL_QFN20
+1.5V_CARD Max. 650mA, Average 500mA
C
20
20
1
C89
+3VALW_PEC
15
AUX_OUT
20
SUSP#
29,33,36,40,41 SUSP#
1
C90
0.1U_0402_16V4Z~N
+3VS_PEC
1
0.1U_0402_16V4Z~N
29,36,41 SYSON
4.7U_0805_10V4Z~N
+1.5VS_PEC
11
13
JEXP1
+1.5VS_PEC
Express Card Power Switch
+3V_CARD Max. 1300mA, Average 1000mA
1
C75
0.1U_0402_16V4Z~N
1
USB20_N7
R48 1
2 0_0402_5% USB20_N7_R2
USB20_N7
USB20_P7
R47 1
2 0_0402_5% USB20_P7_R 3
USB20_P7
EXPR_CPUSB#
4
5
6
ICH_SMBCLK
7
20,24 ICH_SMBCLK
ICH_SMBDATA
8
20,24 ICH_SMBDATA
9
+1.5VS_PEC
10
ICH_PCIE_WAKE_R_ECARD#
PCIE_PME#_R
1 R37
20_0402_5%
11
12
+3VALW_PEC
PERST#
13
14
+3VS_PEC
15
EXPCARD_REQ#16
16
15 EXPCARD_REQ#16
CPUSB#
17
CLK_PCIE_EXPR#
18
15 CLK_PCIE_EXPR#
CLK_PCIE_EXPR
19
15 CLK_PCIE_EXPR
20
PCIE_RXN4
21
20
PCIE_RXN4
PCIE_RXP4
22
20
PCIE_RXP4
23
PCIE_TXN4
24
20
PCIE_TXN4
PCIE_TXP4
25
20
PCIE_TXP4
26
27
28
29
30
1
C73
2
D
GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND
C
GND
GND
GND
GND
2
FOX_1CX41201_26P_LT-S
CONN@
MDC Conn.
JMDC1
19 HDA_SDOUT_MDC
19 HDA_SYNC_MDC
19 HDA_SDIN1
19 HDA_RST_MDC#
2 @
33_0402_5%
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
2
4
6
8
10
12
20mil
+MDC_VCC
1
GND
GND
GND
GND
GND
GND
1
R49
1
3
5
7
9
11
19
13
14
15
16
17
18
2
HDA_BITCLK_MDC
C1429
@
22P_0402_50V8J
Connector for MDC Rev1.5
ACES_88018-124G
CONN@
B
B
+3VALW
1
C748
3
C749
1U_0603_10V4Z
2 @
G
2
1
Q51
SI2301BDS_SOT23
@
D
MDC_ON#
S
29
0.1U_0402_16V4Z
@
1
2
R735
100K_0402_5%
@
W=40mils
+MDC_VCC
C750
4.7U_0805_10V4Z
@
1
2
C751
0.1U_0402_16V4Z
@
9/29 follow HEL80's
A
A
Compal Secret Data
2007/1/15
Issued Date
Deciphered Date
2008/1/15
Title
EXPRESS CARD
Custom
Rev
1.0
LA-4841P
Date:
5
4
3
2
Sheet
1
28
of
45
+3VALW
2
19
19
20
19,24
19,24
19,24
19,24
19,24
1
CLK_PCI_EC
R272
2
1
@ C282
2
15 CLK_PCI_EC
7,18,22,24,28,33 PLT_RST#
R228
@ 10_0402_5%
1
+3VALW
2
47K_0402_5%
C268
15P_0402_50V8J
GATEA20
KB_RST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
2
0.1U_0402_16V4Z
30
1
KSI[0..7]
1
2
3
4
5
7
8
10
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
CLK_PCI_EC
PLT_RST#
EC_RST#
12
13
37
20
38
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
30
KSO[0..15]
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
R263 2
1 4.7K_0402_5%
EC_SMB_CK1
R262 2
1 4.7K_0402_5%
BT_ON#
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
77
78
79
80
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
+3VS
EC_SMB_DA2
EC_SMB_CK2
R264 2
1 4.7K_0402_5%
R265 2
1 4.7K_0402_5%
PAD T57
31
MSEN#
TP_DATA
TP_CLK
R309 1
44
44
4,33
4,33
2 10K_0402_5%
1
1
EC_MUTE#
R230
SLP_S3#
SLP_S5#
EC_SMI#
LID_SW#
6
14
15
16
17
18
EC_PME#
19
18,20 EC_PME#
R2571
2 0_0402_5% 25
33 VGA_THER#
@
FAN_SPEED1 28
4 FAN_SPEED1
KILL_ON#
29
30 KILL_ON#
E51_TXD
30
31
ON_OFF
32
30 ON_OFF
PWR_LED#
34
30,32 PWR_LED#
NUMLED#
36
PAD T59
2 47K_0402_5%
2 47K_0402_5%
2 10K_0402_5%
1
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
20 SLP_S3#
20 SLP_S5#
20 EC_SMI#
+5VS_HD
R271
4.7K_0402_5%
1
2
1
2
+3VALW
R270
4.7K_0402_5%
R229
KSO1
KSO2
BT_ON#
122
123
83
84
85
86
87
88
EC_MUTE#
CHGVADJ 38
EC_MUTE# 26
VGA_ON
WL_OFF#
TP_CLK
TP_DATA
VGA_ON 33
WL_OFF# 24
TP_CLK
30
TP_DATA 30
R274
SPI_PULLDOWN 2
EN_WOL#
@
1 4.7K_0402_5%
EN_WOL# 22
VGATE
VGATE
1
2
R419
SPI_CLK_R
0.1U_0402_16V4Z~N
+3VALW
FRD#SPI_SO
FWR#SPI_SI
SPI_CLK
FSEL#SPICS#
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
73
74
89
90
91
92
93
95
121
127
LCD_DET#
LCD_DET# 16
MSEN#
MSEN#
17
FSTCHG
FSTCHG 38
BATT_CHG_LED#
BATT_CHG_LED# 32
CAPSLED#
T58 PAD
BATT_LOW_LED#
BATT_LOW_LED# 32
SCRLED#
T56 PAD
SYSON
SYSON
28,36,41
VR_ON
VR_ON
43
ACIN
ACIN
20,37,38
C251
100P_0402_25V8K
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
100
101
102
103
104
105
106
107
108
EC_RSMRST#
EC_LID_OUT#
EC_ON
EC_SWI#
ICH_PWROK
BKOFF#
3G_OFF#
MDC_ON#
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
110
112
114
115
116
117
118
SLP_S4#
EC_ENBKL
USB_EN
EC_THERM#
SUSP#
PBTN_OUT#
LCD_VCC_TEST_EN
GPI
SPI Flash (8Mb*1)
@ C507
1
2 0_0402_5%
7,20,43
119
120
126
128
XCLK1
XCLK0
KB926QFD2_LQFP128
16
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
SPI Flash ROM
V18R
11
24
35
94
113
15P_0402_50V8J
4
OSC
1
2
NC
OSC
15P_0402_50V8J
ACES_85205-0400
CONN@
C297
NC
C292
BIST
C314
1
2
0.1U_0402_16V4Z~N
20mils
2 R437
1
10K_0402_5%
U37
124 C322 1
C270 2
FSEL#SPICS# 2
1SPI_CS#
R439
15_0402_5%
FRD#SPI_SO 1
2SPI_SO
15_0402_5% R275
1
2
3
4
CS#
SO
WP#
GND
VCC
HOLD#
SCLK
SI
8
7
6
5
SPI_CLK_R 1
15_0402_5%
SPI_SI 1
MX25L1605AM2C-12G_SO8 15_0402_5%
SPI_CLK
2
R420
2 FWR#SPI_SI
R438
EC_RSMRST# 20
EC_LID_OUT# 20
EC_ON
30
EC_SWI# 20
ICH_PWROK 7,20
BKOFF#
16
3G_OFF# 24
MDC_ON# 28
SLP_S4# 20
EC_ENBKL 16
USB_EN 31
EC_THERM# 20
SUSP#
28,33,36,40,41
PBTN_OUT# 20
LCD_VCC_TEST_EN 16
2 4.7U_0603_6.3V6M
1 0.1U_0402_16V4Z
ECAGND
3
1
2
3
4
97
98
99
109
BIST
ECAGND
X2
32.768KHZ_12.5PF_Q13MC14610002
LID_SW#
LID_SW# 3
VOUT
GND
+3VALW
Q1
APX9132ATI-TRL_SOT23-3
VDD
2
1
1
2
3
4
1
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
GPIO
JECDB1
E51_TXD
2
2
67
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
AGND
XCLKI
XCLKO
2 0.01U_0402_16V7K
BATT_TEMP 44
BATT_OVP 44
ADP_I
38
SPI Device Interface
GND
GND
GND
GND
GND
+3VALW
C273 1
BATT_TEMP
BATT_OVP
ADP_I
AD_BID
M/B rev:0.1; 0.2; 0.3; 1.0
Voltage:0.0; 0.4; 0.8; 1.0
38
DAC_BRIG
DAC_BRIG 16
EN_DFAN1
EN_DFAN1 4
IREF
IREF
38
M_PWROK_EC 1
2
R256 0_0402_5%
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
AD_BID
1
R231
C272
15K_0402_5% 0.1U_0402_16V4Z
2
69
XCLKO 1 R278
2 XCLKI
@ 20M_0603_5%
ACOFF
68
70
71
72
PS2 Interface
SM Bus
INVT_PWM 16
BEEP#
26
ACOFF
63
64
65
66
75
76
R277
Place under open door location
R266 0_0402_5%
1
2
BEEP#
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
DA Output
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
21
23
26
27
PWM Output
AD
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
+5VALW
EC_SMB_DA1
2007-09-19 change Brd ID
R232
47K_0402_5%
@
Rb
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
KSI[0..7]
KSO[0..15]
+3VALW
1
GATEA20
KB_RST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
EC_SCI#
PCI_CLKRUN#
20
EC_SCI#
20,27 PCI_CLKRUN#
Board ID
1
Ra
VCC
VCC
VCC
VCC
VCC
VCC
U29
1
+EC_AVCC
AVCC
2
L18
2
1
+3VALW
2 FBM-11-160808-601-T_0603
C481
C482
1000P_0402_50V7K~N
0.1U_0402_16V4Z~N
1
ECAGND2
2
1
FBM-11-160808-601-T_0603 L19
9
22
33
96
111
125
2
1
2
1
C291
1000P_0402_50V7K~N
2
1
C269
1000P_0402_50V7K~N
EC_PME# 18,20
2
1
C493
0.1U_0402_16V4Z~N
EC_PME#
1
C277
0.1U_0402_16V4Z~N
R405
10K_0402_5%
2
C285
0.1U_0402_16V4Z~N
C281
0.1U_0402_16V4Z~N
+3VALW
1
+EC_AVCC
LID Switch
Issued Date
Compal Secret Data
2007/1/15
Deciphered Date
2008/1/15
Title
BIOS & EC I/O Port
Rev
1.0
LA-4841P
Date:
Sheet
29
of
45
A
B
C
D
INT_KBD CONN.
+3VALW
1
R297
100K_0402_5%
2
Power Button
D15
2
PWR_ON-OFF_BTN#
1
51ON#
3
1
ON_OFF
29
51ON#
37
29
KSI[0..7]
29
KSO[0..15]
KSI[0..7]
KSO[0..15]
CHN202UPT SC-70
1
+3VALW
2
2
R296
4.7K_0402_5%
1
EC_ON
3
29
D
Q26
1
@
EC_ON
D13
RLZ20A_LL34
2
1
C1418
1000P_0402_50V7K~N
1
R291
0_0402_5%
2
2
G
E
KSO8
C449
100P_0402_25V8K
KSI7
C235
100P_0402_25V8K
KSI3
C239
100P_0402_25V8K
KSI6
C236
100P_0402_25V8K
KSO9
C249
100P_0402_25V8K
KSI5
C237
100P_0402_25V8K
KSI2
C240
100P_0402_25V8K
KSO0
C441
100P_0402_25V8K
KSI1
C241
100P_0402_25V8K
KSO1
C442
100P_0402_25V8K
KSO10
C248
100P_0402_25V8K
KSO2
C443
100P_0402_25V8K
KSO11
C247
100P_0402_25V8K
KSI4
C238
100P_0402_25V8K
KSI0
C242
100P_0402_25V8K
KSO3
C444
100P_0402_25V8K
KSO12
C246
100P_0402_25V8K
KSO4
C445
100P_0402_25V8K
KSO13
C245
100P_0402_25V8K
KSO5
C446
100P_0402_25V8K
KSO14
C244
100P_0402_25V8K
KSO6
C447
100P_0402_25V8K
KSO15
C243
100P_0402_25V8K
KSO7
C448
100P_0402_25V8K
JKB1
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
G1
G2
1
For EMI
ACES_85202-2505L
@CONN
SW/B CONN.
2
2
G2
G1
+5VALW
2-3:ON, 1-2:OFF
JFN1
@
1
R1131
100K_0402_5%
4
3
26
15
6
5
ACES_85201-0405
ME@
TP50
KILL_ON#
2
1
+3VALW
2
R12
@
0_0402_5%
3
2
1
5
4
29,32 PWR_LED#
+3VS
4
3
2
1
PWR_ON-OFF_BTN#
PWR_LED#
3
2
1
SW1
1BS003-1210L_3P
Wireless_SW
29 KILL_ON#
3
3
JTP1
TP_CLK
TP_DATA
TP_CLK
TP_DATA
1
2
Issued Date
2007/1/15
1
ACES_85201-06051
@CONN
3
@
2
1
2
3
4
5
6
GND
GND
D24
SM05T1G_SOT23-3~D
@
4
Compal Secret Data
@
2
1
2
100P_0402_25V8K
4
1
2
3
4
5
6
7
8
1
+5VS
C300
0.01U_0402_16V7K
100P_0402_25V8K C1417
29
29
C1416
Touch PAD/B CONN.
2008/1/15
Deciphered Date
Title
PWR_OK/BTN/TP
Rev
1.0
LA-4841P
Date:
A
B
C
D
Sheet
E
30
of
45
+5VALW
CM1293-04SO_SOT23-6
+USB_AS
USB_P1
0.1U_0402_16V4Z
GND
IN
IN
EN#
8
7
6
5
OUT
OUT
OUT
OC#
2
C434
C223
R155
30K_0402_5%
150U_B2_6.3VM_R45M
1 2
C228
1
2
3
4
USB_EN#
+
RT9711BPS SO 8P
2
USB_EN#
USB_N1
D
Q14
SSM3K7002FU_SC70-3
2
G
1
0.1U_0402_16V4Z
CH1
2
Vn
3
CH2
CH4
4
Vp
5
CH3
6
USB_P0
1
80 mils
1
1
1
U12
3
USB_OC#0 20
S
R154
100K_0402_5%
2
+USB_AS
20
USB20_N0
20
USB20_P0
R1
USB20_P0
R3
2
1
0_0402_5%
2
1
0_0402_5%
USB_N0
USB_P0
C253
U14
1
GND
IN
IN
EN#
OUT
OUT
OUT
OC#
R38
30K_0402_5%
2
20
USB20_N1
2
0_0402_5%
USB_OC#2 20
USB_EN#
USB_EN#
1
1
D
3
R44
20
USB20_P1
R54
S
USB20_P1
R62
2
1
0_0402_5%
2
1
0_0402_5%
USB_N1
USB_P1
Q13
SSM3K7002FU_SC70-3
2
G
+USB_BS/+USB_CS =80mils
+USB_BS
+USB_BS
8
7
6
5
20
20
USB20_N8
USB20_P8
20
20
USB20_N9
USB20_P9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
USB20_N8
USB20_P8
1
OUT
OUT
OUT
OC#
R36
30K_0402_5%
2
2
USB_OC#1 20
D29
IO1
VIN
4
+5VS
USB_EN#
D
S
Q8
SSM3K7002FU_SC70-3
2
G
10K_0402_5%
Bluetooth
BT_LED#
BT_LED#
D
3
ACES_85201-06051
CONN@
Camera
1
2
G
S
+3VALW
USB20_N4
USB20_P4
1
2
3
4
5
6
7
8
BT_ACTIVE
WLAN_ACTIVE
BTON_LED
USB20_N4
USB20_P4
+BT_VCC
ACES_87212-0800
10K_0402_5%
2
@
R8
0_0402_5%
20
20
R606
1
+3VS
1
+3VS
+5VS
Q43
2N7002_SOT23
1
2
3
4
5
6
GND
GND
BT_ACTIVE
WLAN_ACTIVE
R9
0_0402_5%
2
1
2
3
4
5
6
7
8
2
USB20_P5
USB20_N5
JBT1
24
24
1
32
JFP1
USB20_P5
USB20_N5
GND1
GND2
GND3
GND4
E&T_3703-E12N-03R
ME@
R605
Fingerprint
+5VS
1
C759
4.7U_0805_10V4Z
1
2
2
C29
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
S
Q4
SSM3K7002FU_SC70-3
2
G
2
100K_0402_5%
R15
2
D1
@
PSOT24C_SOT23
1
2
3
4
5
6
7
1
2
3
4
5
GND1
GND2
C760
1U_0603_10V4Z
Q56
SI2301BDS_SOT23
1
USB_N2
1
USB_P2
0_0402_5%
1
0_0402_5%
3
2
2
2
W=40mils
+BT_VCC
C761
4.7U_0805_10V4Z
ACES_88266-05001
CONN@
1
2
C762
0.1U_0402_16V4Z
1
1
USB_EN
USB20_N2
USB20_P2
2
2
USB20_N2
USB20_P2
USB_EN#
3
USB_EN
1
R755
D
R13
20
20
R1226
10K_0402_5%
29
BT_ON#
JCAM1
+5VALW
D
29
3
1
G
C30
S
20
20
5
6
7
8
1
2
3
4
5
6
7
8
9
10
11
12
G1
G2
2
PRTR5V0U2X_SOT143-4
@
1
2
USB20_P5
3
1
USB20_N5
USB20_N9
USB20_P9
+5VS
GND IO2
3
1
VCC
DD+
GND
JUSB3
GND
IN
IN
EN#
RT9711BPS SO 8P
0.1U_0402_16V4Z
+USB_CS
U13
USB_EN#
1
JUSB2
1
2
3
4
SUYIN_020173MR004G565ZR
ME@
+5VALW
C64
GND1
GND2
GND3
GND4
W=80mils
USB20_N1
USB_OC#3 20
1
2
3
4
5
6
7
8
+USB_AS
2
80 mils
VCC
DD+
GND
SUYIN_020173MR004G565ZR
CONN@
8
7
6
5
RT9711BPS SO 8P
0.1U_0402_16V4Z
1
2
3
4
1
USB_EN#
JUSB1
W=80mils
USB20_N0
+USB_CS
1
2
3
4
USB_N0
@ D19
+5VALW
80 mils
+USB_AS
Issued Date
Compal Secret Data
2007/1/15
Deciphered Date
2008/1/15
Title
USB/BlueTooth/FP/Felcia
Rev
1.0
LA-4841P
Date:
Sheet
31
of
45
5
4
3
2
1
D
D
+5VALW
White
R93
2.2K_0402_5%
1
2
1 LED3 PWR_LED#
2
PWR_LED# 29,30
19-213A/T1D-CP2Q2HY/3T 0603 WHITE
C
C
2
A
+5VALW
Amber
LED2
4
3
BATT_LOW_LED#
B
R710
3.3K_0402_5%
1
2
R711
3.3K_0402_5%
1
2
+5VALW
1
BATT_CHG_LED#
Blue
BATT_LOW_LED# 29
BATT_CHG_LED# 29
HT-297UD/CB _BLUE/AMB_0603
2
B
+5VS
Amber
LED5
4
A
R708
3.3K_0402_5%
1
2
R709
3.3K_0402_5%
1
2
+5VS
3
BT_LED#
1
LED_WLAN#
Blue
BT_LED# 31
LED_WLAN# 24
HT-297UD/CB _BLUE/AMB_0603
B
B
A
A
Compal Secret Data
Issued Date
2007/1/15
2008/1/15
Deciphered Date
Title
PWR_OK/BTN/TP
Rev
1.0
LA-4841P
Date:
5
4
3
2
Sheet
1
32
of
45
5
4
3
PEG_NRX_GTX_N[0..15]
2
1
PEG_NRX_GTX_N[0..15] 9
PEG_NRX_GTX_P[0..15]
PEG_NRX_GTX_P[0..15] 9
PEG_NTX_GRX_N[0..15]
PEG_NTX_GRX_N[0..15] 9
PEG_NTX_GRX_P[0..15]
PEG_NTX_GRX_P[0..15] 9
JP57B
D
PEG_NRX_GTX_N1
PEG_NRX_GTX_P1
JP57A
1
3
5
7
9
11
13
15
17
19
21
23
B+
PEG_NRX_GTX_N15
PEG_NRX_GTX_P15
PEG_NRX_GTX_N14
PEG_NRX_GTX_P14
C
PEG_NRX_GTX_N13
PEG_NRX_GTX_P13
PEG_NRX_GTX_N12
PEG_NRX_GTX_P12
PEG_NRX_GTX_N11
PEG_NRX_GTX_P11
PEG_NRX_GTX_N10
PEG_NRX_GTX_P10
PEG_NRX_GTX_N9
PEG_NRX_GTX_P9
PEG_NRX_GTX_N8
PEG_NRX_GTX_P8
PEG_NRX_GTX_N7
PEG_NRX_GTX_P7
PEG_NRX_GTX_N6
PEG_NRX_GTX_P6
PEG_NRX_GTX_N5
PEG_NRX_GTX_P5
PEG_NRX_GTX_N4
PEG_NRX_GTX_P4
B
PEG_NRX_GTX_N3
PEG_NRX_GTX_P3
PEG_NRX_GTX_N2
PEG_NRX_GTX_P2
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
GND
GND
GND
GND
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN
RUNPWROK
5VRUN
GND
GND
GND
PEX_RX15#
PEX_RX15
GND
PEX_RX14#
PEX_RX14
GND
PEX_RX13#
PEX_RX13
GND
PEX_RX12#
PEX_RX12
GND
PEX_RX11#
PEX_RX11
GND
PEX_RX10#
PEX_RX10
GND
PEX_RX9#
PEX_RX9
GND
PEX_RX8#
PEX_RX8
GND
PEX_RX7#
PEX_RX7
GND
PEX_RX6#
PEX_RX6
GND
PEX_RX5#
PEX_RX5
GND
PEX_RX4#
PEX_RX4
GND
PEX_RX3#
PEX_RX3
GND
PEX_RX2#
PEX_RX2
GND
PRSNT2#
PEX_TX15#
PEX_TX15
GND
PEX_TX14#
PEX_TX14
GND
PEX_TX13#
PEX_TX13
GND
PEX_TX12#
PEX_TX12
GND
PEX_TX11#
PEX_TX11
GND
PEX_TX10#
PEX_TX10
GND
PEX_TX9#
PEX_TX9
GND
PEX_TX8#
PEX_TX8
GND
PEX_TX7#
PEX_TX7
GND
PEX_TX6#
PEX_TX6
GND
PEX_TX5#
PEX_TX5
GND
PEX_TX4#
PEX_TX4
GND
PEX_TX3#
PEX_TX3
GND
PEX_TX2#
PEX_TX2
2
4
6
8
10
12
14
16
18
20
22
24
PEG_NRX_GTX_N0
PEG_NRX_GTX_P0
+1.8VS
15 CLK_PCIE_VGA#
15 CLK_PCIE_VGA
7,18,22,24,28,29
SUSP#
+5VS
28,29,36,40,41
PLT_RST#
29
VGA_ON
4,29 EC_SMB_DA2
4,29 EC_SMB_CK2
29 VGA_THER#
17 VGA_HSYNC
17 VGA_VSYNC
17 VGA_DDCCLK
17 VGA_DDCDATA
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
PEG_NTX_GRX_N15
PEG_NTX_GRX_P15
15 CLK_NVSS_27M
15 CLK_NV_27M
CLK_PCIE_VGA#
CLK_PCIE_VGA
VGA_ON
VGA_CRT_HSYNC
VGA_CRT_VSYNC
VGA_DDC_CLK
VGA_DDC_DATA
CLK_NVSS_27M
CLK_NV_27M
PEG_NTX_GRX_N14
PEG_NTX_GRX_P14
PEG_NTX_GRX_N13
PEG_NTX_GRX_P13
PEG_NTX_GRX_N12
PEG_NTX_GRX_P12
PEG_NTX_GRX_N11
PEG_NTX_GRX_P11
PEG_NTX_GRX_N10
PEG_NTX_GRX_P10
PEG_NTX_GRX_N9
PEG_NTX_GRX_P9
PEG_NTX_GRX_N8
PEG_NTX_GRX_P8
PEG_NTX_GRX_N7
PEG_NTX_GRX_P7
+3VALW
+5VALW
36 VGA_PWGOD#
PEG_NTX_GRX_N6
PEG_NTX_GRX_P6
VGA_PWGOD#
PEG_NTX_GRX_N5
PEG_NTX_GRX_P5
PEG_NTX_GRX_N4
PEG_NTX_GRX_P4
+1.5VS
PEG_NTX_GRX_N3
PEG_NTX_GRX_P3
PEG_NTX_GRX_N2
PEG_NTX_GRX_P2
D
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
207
209
211
213
215
217
219
221
223
225
227
229
PEX_RX1#
GND
PEX_RX1
PEX_TX1#
GND
PEX_TX1
PEX_RX0#
GND
PEX_RX0
PEX_TX0#
GND
PEX_TX0
PEX_REFCLK#
PRSNT1#
PEX_REFCLK
TV_C/HDTV_Pr
CLK_REQ#
GND
PEX_RST#
TV_Y/HDTV_Y
RSVD
GND
RSVD
TV_CVBS/HDTV_Pb
SMB_DAT
GND
SMB_CLK
VGA_RED
THERM#
GND
VGA_HSYNC
VGA_GRN
VGA_VSYNC
GND
DDCA_CLK
VGA_BLU
DDCA_DAT
GND
IGP_UCLK#
LVDS_UCLK#
IGP_UCLK
LVDS_UCLK
GND
GND
RSVD
LVDS_UTX3#
RSVD
LVDS_UTX3
RSVD
GND
IGP_UTX2#
LVDS_UTX2#
IGP_UTX2
LVDS_UTX2
GND
GND
IGP_UTX1#
LVDS_UTX1#
IGP_UTX1
LVDS_UTX1
GND
GND
IGP_UTX0#
LVDS_UTX0#
IGP_UTX0
LVDS_UTX0
GND
GND
IGP_LCLK#/DVI_B_CLK#
LVDS_LCLK#
IGP_LCLK/DVI_B_CLK
LVDS_LCLK
DVI_B_HPD/GND
GND
RSVD
LVDS_LTX3#
RSVD
LVDS_LTX3
GND
GND
IGP_LTX2#/DVI_B_TX2#
LVDS_LTX2#
IGP_LTX2/DVI_B_TX2
LVDS_LTX2
GND
GND
LVDS_LTX1#
IGP_LTX1/DVI_B_TX1
LVDS_LTX1
GND
GND
LVDS_LTX0#
IGP_LTX0/DVI_B_TX0
LVDS_LTX0
DVI_A_HPD
GND
DVI_A_CLK#
DDCC_DAT
DVI_A_CLK
DDCC_CLK
GND
LVDS_PPEN
DVI_A_TX2#
LVDS_BL_BRGHT
DVI_A_TX2
LVDS_BLEN
GND
DDCB_DAT
DVI_A_TX1#
DDCB_CLK
DVI_A_TX1
2V5RUN
GND
GND
DVI_A_TX0#
3V3RUN
DVI_A_TX0
3V3RUN
GND
3V3RUN
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
PEG_NTX_GRX_N1
PEG_NTX_GRX_P1
PEG_NTX_GRX_N0
PEG_NTX_GRX_P0
VGA_TV_CRMA
VGA_TV_CRMA
VGA_TV_LUMA
VGA_TV_LUMA
VGA_TV_COMPS
VGA_TV_COMPS
VGA_CRT_R
VGA_CRT_R 17
VGA_CRT_G
VGA_CRT_G 17
VGA_CRT_B
VGA_CRT_B 17
C
VGA_LVDSACVGA_LVDSAC+
VGA_LVDSAC- 16
VGA_LVDSAC+ 16
VGA_LVDSA2VGA_LVDSA2+
VGA_LVDSA2- 16
VGA_LVDSA2+ 16
VGA_LVDSA1- 16
VGA_LVDSA1+ 16
VGA_LVDSA0- 16
VGA_LVDSA0+ 16
VGA_DAT_LCD
VGA_CLK_LCD
ENVDD
VGA_DAT_LCD 16
VGA_CLK_LCD 16
VGA_LVDDEN 16
VGA_ENBKL
VGA_ENBKL 16
B
+3VS
ACES_88990-2D08
ACES_88990-2D08
B+
C1443
0.1U_0603_25V7K
VGA@
+1.8VS
2
C424
1
4.7U_0805_10V4Z
VGA@ 2
1
+3VS
1
C425
0.1U_0402_16V4Z
2 VGA@
C426
1
4.7U_0805_10V4Z
VGA@ 2
+5VS
1
1
C427
0.1U_0402_16V4Z
2 VGA@
C429
0.1U_0402_16V4Z
2 VGA@
A
A
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
Title
Custom
MXM Connector
Rev
1.0
LA-4841P
Date:
5
4
3
2
Sheet
1
33
of
45
H30
HOLEA
H11
HOLEA
H12
HOLEA
D
H13
HOLEA
1
H29
HOLEA
H10
HOLEA
1
H28
HOLEA
H9
HOLEA
1
H8
HOLEA
1
1
H7
HOLEA
1
1
H22
HOLEA
H6
HOLEA
1
H18
HOLEA
1
1
H21
HOLEA
1
H20
HOLEA
1
1
H17
HOLEA
H19
HOLEA
1
H_4P2
H16
HOLEA
1
H_3P7
H15
HOLEA
H5
HOLEA
1
H14
HOLEA
H4
HOLEA
2
1
1
H_3P0
H3
HOLEA
1
H2
HOLEA
1
D
3
1
4
1
5
1
H27
HOLEA
1
H26
HOLEA
1
H25
HOLEA
1
1
1
H_3P2
H24
HOLEA
1
C
H23
HOLEA
1
C
H31
HOLEA
1
H_5P6
H33
HOLEA
FD1
FD2
FD3
FD4
@
1
@
1
@
1
1
H_3P1N
1
H_4P4
@
B
B
1
H34
HOLEA
H36
HOLEA
1
1
H35
HOLEA
1
H37
HOLEA
A
A
Issued Date
Compal Secret Data
2007/1/15
2008/1/15
Deciphered Date
Title
Screws
Rev
1.0
LA-4841P
Date:
5
4
3
2
Sheet
1
34
of
45
A
KAL80 POWER UP SEQUENCE
ACIN/BATT-IN
51ON#
(only BATT-IN)
← 126ms →
5VALW/3VALW
RSMRST#
Suspend Clock (32KHz)
ICH9 internal clock
SUSCLK
ON/OFF#
EC_ON
PWRBTN_OUT#
SYSON#
1.8V
SLP_S5#
SLP_S4#
SLP_S3#
SUSP#
+5VS
+3VS
644ms
←→
244ms
→ ←←→
864us
360ms
←→
1.59ms ←
→ 2.74ms
←250ms
→
← → 30.6us
←→30us
←→
← 3.88s → 888us
←→ 104us
112us
←→ ←→
+1.5VS
2.02ms
→1.46ms
←
←→ 24.1ms
← → 1.20ms
←→ 5.26ms
←→
+0.9VS
VCCP
VR_ON
CPU_CORE
A
This signal is
asserted high when
both SLP_S3# and
VRMPWRGD are high
VGATE
A
CK_PWRGD
1.03ns
←
→
←114ms→ 1.20ms
←→
1.06ms ←
→
←2.20ms→
CLK_MCH_BCLK
ICH_PWROK
PCI_RST#
H_PWRGOOD
H_RESET#
Title
<Title>
Size
Document Number
CustomLA-4841P
Date:
A
Rev
1.0
Sheet
35
of
45
A
B
+3VALW to +3VS Transfer
+3VALW
+5VALW to +5VS Transfer
+3VS
4A
B+_BIAS
C
+5VALW
+5VS
D
+1.8V to +1.8VS Transfer
8A
+1.8V
SI4800DY_SO8
2 10U_0805_10V4Z~N
2
1
SUSP
1
2
R197
1
100K_0402_5%
D
3
RUNON
Q18
2
2
G
C465
2
1
C256
1
C278
S
S
S
G
SI4800DY_SO8
2 10U_0805_10V4Z~N
2
3VS_GATE
2
D
D
D
D
1
2
3
4
1
C284
1
VGA@
C283
10U_0805_10V4Z~N
2
2
0.1U_0402_16V4Z~N
RUNON 1
2 1 5VS_GATE
R267
C279
47K_0402_5%
0.01U_0402_25V7K~N
2
0.1U_0402_16V4Z~N
C264
0.01U_0402_25V7K~N
1
1
1
8
7
6
5
33 VGA_PWGOD#
VGA_PWGOD#
SUSP
+CPU_CORE
4.7A
U41
1
C271
S
S
S
G
U39
1
C211
R1227
47K_0402_5%
1
D
D
D
D
10U_0805_10V4Z~N
1
2
3
4
2
+VCCP
0.1U_0402_16V4Z~N
2
G
1 R665
2
@ 0_0402_5%
3
1
R198
330K_0402_5%
+1.8VS
B+_BIAS
U40
8
7
6
5
E
8
7
6
5
1
D
D
D
D
10U_0805_10V4Z~N
1
2
3
4
S
S
S
G
C727
SI4800DY_SO8
2 10U_0805_10V4Z~N
VGA@
VGA@
1
C728
1
0.1U_0402_16V4Z~N
2
VGA@ 2
C697
VGA@
1
1.8VS ON 1
1.8VS_GATE
2
R608
1
100K_0402_5%
C696
VGA@
D
0.01U_0402_25V7K~N
2 VGA@
Q48
VGA@
+3VALW
2
1
2
R409
SYSON
1
D
S
Q42
SSM3K7002FU_SC70-3
2
G
2
28,29,41
1
SYSON#
SYSON
3
2
100K_0402_5%
R365
10K_0402_5%
1
+5VALW
R340
3
3
D
S
Q32
SSM3K7002FU_SC70-3
2
G
R338
10K_0402_5%
3
S Q33
SSM3K7002FU_SC70-3
1
1
2
470_0402_5%
2
1
D
SUSP
2
G
R382
D
SUSP
2
G
S Q39
SSM3K7002FU_SC70-3
1
SUSP
D
S Q37
SSM3K7002FU_SC70-3
2
G
S Q38
SSM3K7002FU_SC70-3
4
Compal Secret Data
2007/1/15
Issued Date
D
2
G
S Q12
SSM3K7002FU_SC70-3
R383
470_0402_5%
3
SUSP
3
R391
470_0402_5%
1
1
D
2
G
SYSON -> SUSP# -> VGA_ON->VGA_PWGOD
1
470_0402_5%
+1.5VS
+3VS
2
R351
470_0402_5%
2
R133
2
1
SYSON#
4
+5VS
3
+0.9VS
1
+1.8V
3
Discharge circuit-1
1
1
2
28,29,33,40,41 SUSP#
SUSP
SUSP#
1
SUSP
3
27,42
2
100K_0402_5%
2008/1/15
Deciphered Date
Title
DC/DC Circuits
Rev
1.0
LA-4841P
Date:
A
B
C
D
Sheet
E
36
of
45
4
3
2
1
PC1
2200P_0402_50V7K~D
PR1
@ 56K_0402_5%~D
@
ADPIN
VIN
1
1
VS
2
8
VinDe_IN3
+
P
VinDe_Ref
2
-
O
1
PC9
1000P_0402_50V7K~D
1
2
P
O
LM393DR_SO8
51ON#
Vin Detector
L-->H
H-->L
typ.
17.841
17.210
Min.
17.449
16.813
C
1
Max.
18.234
17.597
PC12
0.1U_0603_25V7K~D
2
PC11
2
1
PQ1
TP0610K-T1-E3_SOT23-3
1
51ON#_Gate
1
30
1
7
2
2
PR12
22K_0402_5%~D
1
2
0.22U_1206_25V7K
1
PR11
100K_0402_5%~D
RTCVREF
3.3V
PU1B
C
3
20,29,38
PR7
10K_0402_5%~D
PD1
RLZ4.3B_LL34
PR9
10K_0402_5%~D
1
VS
CHGRTCP
ACIN
VinDe_Out
LM393DR_SO8
8
2
RLS4148_LL34-2
-
4
6
+
G
1
1
1
2
PJP1
@ JUMP_43X118
1 1
2 2
PD3
2
BATT+
5
PR14
68_1206_5%
PR4
1K_0402_5%~D
2
32.3
RLS4148_LL34-2
PR10
68_1206_5%
D
PR5
10K_0402_5%~D
1
2
2
2
PU1A
G
2
PR6
22K_0402_1%~D
2
1
PR8
19.6K_0402_1%~D
2
1
2
PD2
1
N41
VIN
1
PC8
1
1
PC7
1000P_0402_50V7K~D
2
1
PC6
100P_0402_50V8J~D
2
1
1
PC5
2
1
2
1
PR3
82.5K_0402_1%~D
PC10
0.1U_0402_16V7K~D
ACES_88290-044G
@
1000P_0402_50V7K~D
6
PC4
100P_0402_50V8J~D
1000P_0402_50V7K~D
5
PC3
4
2
1
4
2
3
PC2
100P_0402_50V8J~D
3
VIN
1
VIN
2
2
2
2
D
2
PR2
1M_0402_1%~N
1
2
2
1
2
1
1
PL1
SMB3025500YA_2P
1
0.01U_0402_25V7K~D
PJPDC1
4
5
RTCVREF
PR13
200_0805_5%
APL5156-33DI-TRL_SOT89-3
+5VALWP
PJP2
@ JUMP_43X118
1 1
2 2
VIN
2
1
GND
1
2
2
B
VOUT
4.7U_0805_6.3V6K~D
PC13
1
3
2
PU3
B
PC14
1U_0805_25V4Z~D
+5VALW
PJP4
@ JUMP_43X118
1 1
2 2
+3VALWP
PJP6
@ JUMP_43X118
1 1
2 2
+3VALW
+1.5VSP
PJP8
@ JUMP_43X118
1 1
2 2
+1.5VS
+0.9VSP
PJP7
@ JUMP_43X118
1 1
2 2
+0.9VS
A
A
+VCCPP
PJP10
@ JUMP_43X118
1 1
2 2
PJP12
@ JUMP_43X118
1 1
2 2
+VCCP
+1.8VP
PJP11
@ JUMP_43X118
1 1
2 2
PJP13
@ JUMP_43X118
1 1
2 2
+1.8V
Compal Secret Data
Issued Date
2006/10/1
2007/5/01
Deciphered Date
Title
DCIN / Precharge
KFW11
Date:
5
4
3
2
Rev
1.0
Sheet
1
37
of
45
B
ACSET
24
2ACOP 7 ACOP
PC34
0.47U_0603_16V7K~N
2
4
2
2
AO4712_SO8
PC30
1U_0603_10V6K~D
1
LODRV
23
PGND
22
LEARN
21
CELLS
20
DL_CHG
1
2
2
4
3
2
1
G
S
S
S
4
2
3
1
2
5
6
7
8
PR29
4.7_1206_5%~D
PQ8
BATT+
1
2
RLS4148_LL34-2
PC28
0.1U_0603_25V7K~D
PR28
0.02_2512_1%
PC33
10U_1206_25V6M~D
2
PQ7
FDS4435BZ_SO8
D
D
D
D
5
6
7
8
1
1
1
PL3
10U_LF919AS-100M-P3_4.5A_20%
1
2
1
5
6
7
8
LX_CHG
PD7
2
1
1
PC19
25
REGN
2
4.7U_1206_25V6K~D
PH
4
/BATDRV
PR22
100K_0402_1%~D
PC32
10U_1206_25V6M~D
ACDRV
ACDET
1
1
1
2
PC26
2
DH_CHG
PR32
100K_0402_1%~D
CP setting
PC22
26
AO4466_SO8
1
4
5
6
PC29
0.01U_0402_25V7K~D
@
4.7U_1206_25V6K~D
2
1
HIDRV
PR27
2.2_0603_5%~D
BTST 1
2
2
ACN
ACP
PQ6
1
2
3
1
+3VALW
1000P_0402_50V7K~D
1
27
REGN
2
PR31
56.2K_0402_1%~D
1
2
PC23
1
8
9
ACOFF
2
29
VREF
PC36
0.1U_0603_25V7K~D
PC37
0.1U_0603_25V7K~D
1
2
PR34
54.9K_0402_1%
Fsw : 300KHz
AGND
1
2
Input UVP : 16.98V
PC35
0.1U_0402_16V7K~D
1
2
OVPSET
1
OVPSET
Input OVP : 22.3V
2
Iadapter=(Vacset/Vvdac)*(0.1/PR217)=4.27A
2
BTST
ACSET
PR33
340K_0402_1%~D
Icharge=(Vsrset/Vvdac)*(0.1/PR222)=3A
PVCC
28
PC31
680P_0603_50V7K~D
ACDET
90W adapter
CHG_B+
1
3
2
1
2
ACN
ACDRV
PR30
54.9K_0402_1%
1
PC16
0.1U_0805_25V7K
1
2
PVCC
CHGEN#
CHGEN
PC18
0.1U_0603_25V7K~D
ACP
1
PU4
1
1
1
PC17
0.1U_0603_25V7K~D
PR25
340K_0402_1%~D
PC27
2.2U_0805_25V6K
2
JUMP_43X118
PC21
2
2
@
PC25
3
2
4
2
0.01U_0402_25V7K~D
PJP14
1
PC24
0.1U_0402_16V7K~D
1
2
2
2
B+
PR21
0.015_2512_1%
8
7
6
5
D
D
D
D
PR24
100K_0402_1%~D
2
1
1
S
S
S
G
E
1000P_0402_50V7K~D
1
1
2
3
4
PC20
0.01U_0402_25V7K~D
2
1
1
2
3
4
2
PR23
3.3_1210_5%~D
S
S
S
G
PR26
1
1
D
D
D
D
PQ5
FDS4435BZ_SO8
PC15
0.01U_0603_50V7K~D
2
3.3_1210_5%~D
2
1 2
8
7
6
5
D
4.7U_1206_25V6K~D
2
1
PQ4
FDS4435BZ_SO8
VIN
1
C
3
2
1
A
SRP
19
SRP
SRN
18
SRN
BAT
17
TP
29
SRSET
16
IADAPT
15
1
11
1
2
0_0402_5%~D
VADJ
PC39
0.1U_0603_25V7K~D
14
BATDRV
IREF
2
PR42
10_0603_5%~D
PC41
@0.01U_0402_25V7K~D
ACGOOD#
ADP_I
@
SUYIN_060003FA002G201NL
0.486V
0.5A
2.916V
3A
REGN
S
2
PC45
0.1U_0402_16V7K~D
S
PQ13
SSM3K7002F_SC59-3
PQ14
SSM3K7002F_SC59-3
2
G
1
1
3
1
D
PR46
100K_0402_1%~D
CHGEN#
D
S
PQ15
SSM3K7002F_SC59-3
2
G
29 FSTCHG
S
4
PR52
340K_0402_1%~D
CHGVADJ
0V
Battery Voltage/per cell
3V
3.3V
4.2V
Compal Secret Data
2006/10/1
Issued Date
2007/5/01
Deciphered Date
Title
Size
B
Date:
A
1
1
3
ACOFF
D
2
G
2
PR50
499K_0402_1%~D
2
GATE
2
PR49
100K_0402_1%~D
PQ16
RHU002N06_SOT323-3
2
G
PQ11
SSM3K7002F_SC59-3
PR45
200K_0402_1%~D
1
VADJ
1
CHGVADJ
1
29
2
PR44
@ 0_0402_5%~D
PR48
210K_0402_1%~D
1
2
1
1
B+_BIAS
B
3
@
2
D
VREF
2
2
2
1
PC44
1
2
1SS355_SOD323-2
1
1
1
PR53
2
2
PD9
220K_0402_5%
2
PR51
1
PC46
0.1U_0603_25V7K~D
2
1
4
220K_0402_5%
PR47
+5VALW
0.1U_0805_25V7M~N
3
3
2
100_0805_5%~D
470K_0402_5%~D
1
B+
PQ12
TP0610K-T1-E3_SOT23-3
1
20,29,37
VREF
VREF
PR43
S
2
G
Current
3
1
2
G1
G2
IREF
PC42
100P_0402_50V8J~D
D
2
+COINCELL
PR40
100K_0402_1%~D
ACIN
1
29
PJP15
@
PR39
100K_0402_1%~D
COIN RTC Battery
1
2
3
4
VREF
2
3
PR38
100K_0402_1%~D
2
@
2
BQ24751ARHDR_QFN28_5X5
IADAPT
1
29
2
RTCVREF
PR37
2
1
47K_0402_1%~D
1
/BATDRV
ICHG setting
ACGOOD
1
13
1
ACGOOD#
1
12
2
2
ACSET
1
VADJ
PC40
0.1U_0603_25V7K~D
1
+3VALW
VDAC
3
PR86
1
2
1
VREF
PR87
0_0402_5%~D
@
2
PC38
1U_0603_10V6K~D
2
1
PR35
100K_0402_1%~D
1
2GATE
3
PQ9
SI2301BDS-T1-E3_SOT23-3
10
C
D
Charger
Document Number
Rev
1.0
KFW11
Sheet
E
38
of
45
5
4
3
2
1
ISL6237_B+
ISL6237_B+
B+
VBST2
VBST1
17
LL1
16
PC59
0.1U_0603_25V7K~D
LX5
DRVL1
18
DL5
PGND
22
VOUT1
10
FB1
11
VSW
9
25
LL2
1
2
3
DL3
23
DRVL2
FB3
30
VOUT2
VL
32
REFIN2
@
2VREF_ISL6237
1
2
1
PC52
2200P_0402_50V7K~D
2
1
4
3
2
1
LX3
PC51
4.7U_0805_25V6K~D
2
1
3
2
1
PQ20
AO4712_SO8
1
PC58
0.1U_0603_25V7K~D
DH5
PR58
BST5A 2
1
0_0603_5%~D
PR60
61.9K_0402_1%~D
1
2
24
+5VALWP
1
+ PC62
330U_D3L_6.3VM_R25M
2
PR62
10K_0402_1%~D
1
2
1 BST3A
0_0603_5%~D
D
PL4
2
1
4.7UH_PCMC063T-4R7MN_5.5A_20%
PC61
15
5
6
7
8
4.7U_0805_6.3V6K~D
PC55
2
1
19
DRVH1
PC56
1U_0603_10V6K~D
1
2
PR57
4.7_1206_5%~D
2
1
1U_0603_10V6K~D
7
LDO
V5DRV
DRVH2
4
2
2
1
4
3
TP
26
PR55
2
V5FILT
33
DH3
8
7
6
5
PQ19
AO4712_SO8
VIN
PU5
PC60
PR56
680P_0603_50V7K~D 4.7_1206_5%~D
2
1
2
1
2
1
C
PR59
0_0402_5%~D
1
2
2
330U_D3L_6.3VM_R25M
+
PR61
10K_0402_1%~D
1
PC57
6
1
2
3
4
1
PC53
0.1U_0603_25V7K~D
PC54
1
2
2
AO4466_SO8
AO4466_SO8
PC50
4.7U_0805_25V6K~D
2
1
8
7
6
5
PQ18
PL5
1
2
4.7UH_PCMC063T-4R7MN_5.5A_20%
+3VALWP
5
6
7
8
VL
PQ17
680P_0603_50V7K~D
2
1
PC49
2200P_0402_50V7K~D
2
1
D
PC48
4.7U_0805_25V6K~D
2
1
PR54
0_0805_5%
1
2
PC47
4.7U_0805_25V6K~D
2
1
PJP16
@ JUMP_43X118
1 1
2 2
FB5
C
VREF2
PC63 0.22U_0603_10V7K~D
8
LDOREFIN
Rds(on) = 18m ohm(max) ; Rds(on) = 15m ohm(typical)
28
EN_LDO
PGOOD1
13
@ PR63
6237_SKIP 2
GND
21
5
1
2
2VREF_ISL6237
2
2
PR70
0_0402_5%~D
PC65
1U_0603_10V6K~D
0.047U_0603_16V7K~D
1
2
2
PQ21
TP0610K-T1-E3_SOT23-3
PC66
2
2VREF_ISL6237 1
1
2
PR71
1
806K_0603_1%
1
POK
20
PR67
TRIP1
12
ILM1
2
TRIP2
31
ILIM2
2
255K_0402_1%~D
1
1
255K_0402_1%~D
B
SN0806081RHBR_QFN32_5X5
6237_TON
1
VL
0_0402_5%~D
2
PR68
TONSE
EN2
2
6237_EN2 27
0_0402_5%~D
1
1
EN1
PR73
@ 47K_0402_5%~D
0_0402_5%~D
3
PGOOD2
6237_NC
PR72
2
1
NC
14
@ PR69
0_0402_5%~D
VL
44 MAINPWON
6237_EN1
4
2
Fsw=300kHz
PC64
0.22U_0603_25V7-K
PC67
0.047U_0402_16V7K~N
2
1
Iocp=9A
EN_LDO
VREF3
20
PR65
100K_0402_1%~D
2
2
1
1
PD10
RLZ5.1B_LL34
1
2
PR66
200K_0402_5%~D
1
2
VS
B
29
PR64
1
3.3VALWP
Imax=6A
SKIPSEL
5VALWP
PR74
@
Imax=6A
0_0402_5%~D
Iocp=9A
Fsw=400kHz
@
PD11
1
2
1SS355_SOD323-2
A
A
Compal Secret Data
2006/10/1
Issued Date
Deciphered Date
2007/05/30
Title
+3VALWP, +5VALWP
Custom
Date:
Rev
1.0
KFW11
5
4
3
2
Sheet
1
39
of
45
5
4
3
2
1
D
D
PJP17
@ JUMP_43X118
1 1
2 2
6268_B+
UG_1.5V
PR75
6268_1.5V
1
PR76
2
1
10K_0402_1%~D
@
2
1
0_0603_5%~D
+5VS
BOOT_1.5V
Imax=3.5A
2
PC70
Iocp=6A
0.1U_0603_25V7K~D
1
1
2
1
1.5VSP
PHASE_1.5V
PC69
10U_1206_25V6M~D
@
10U_1206_25V6M~D
PC68
2
B+
VIN
BOOT
UG
PHASE
3
C
PGOOD
GND
2
15
16
1
8
2
PVCC
PR78
1
5
6
7
8
PR77
0_0603_5%~D
4.7_0603_5%~D
2 6268_1.5V
PC71
1
2
14
Fsw=294kHz
PQ22
AO4466_SO8
4
C
6268_1.5V
VCC
LG
13
PGND
12
LG_1.5V
+1.5VSP
PL6
4.7U_D104C-919AS-4R7N_5.2A_20%
1
2
5
6
7
8
2
+1.5VSP
1
PC76
680P_0603_50V8J~D
PR82
2K_0402_1%~D
1
4
2
PQ23
AO4712_SO8
2
PR81
5.11K_0402_1%~D
1
1
PR83
2
PR84
45.3K_0402_1%~D
PC78
0.01U_0402_25V7K~D
1
2
1
2
49.9K_0402_1%~D
PR85
1.33K_0402_1%~D
2
2
PC79
2200P_0402_50V7K~D
1
2
PC77
22P_0402_50V8J~D
1
1
3
2
1
PU6
ISL6268CAZ-T_SSOP16
+ PC73
PC74
220U_6.3V_M
4.7U_0805_6.3V6K~D
2
2
ISEN_1.5V
1
1
PR79
4.7_1206_5%~D
2 1
11
VO
10
0.1U_0402_16V7K~D
FB
PC75
FSET
ISEN
9
2
@
EN
COMP
5
6
SUSP#
PR80
0_0402_5%~D
1
2
1
28,29,33,36,41
PC72
2.2U_0603_6.3V6K~D
7
2
1
4
3
2
1
2.2U_0603_6.3V6K~D
B
B
A
A
Issued Date
Compal Secret Data
2006/10/1
Deciphered Date
2007/05/30
Title
1.5VSP
Size
Date:
5
4
3
2
Document Number
Rev
1.0
KFW11
1
Sheet
40
of
45
5
4
3
2
1
D
PC98
1U_0402_6.3V6K~D
2
2
1
PC97
1U_0402_6.3V6K~D
1
D
PR108
2
2
+5VALWP
1
PC100
0.1U_0603_25V7K~D
+5VALWP
2 PR111
ISL6228_B+
+5VALWP
PC101
0.1U_0603_25V7K~D
2 PR112
1
1
10_0603_1%
1
ISL6228_B+
10_0603_1%
2
2
PR113
PC105
1000P_0402_50V7K~D PR115
22K_0402_1%~D
2
1
2
1
1
2
2
VIN2
3
VCC2
4
6
5
VCC1
29
PR120
8
FB1
PGOOD2
28
9
VO1
FB2
27
2
12.1K_0402_1%~D
OCSET1
VO2
26
1
4
SYSON
PQ31
FDS6670AS_NL_SO8
.01U_0402_16V7K~D
2
PQ30
FDS8884_SO8
@ 0.01U_0402_25V7K~D
UG_VCCPP 13
UGATE1
PHASE2
23
4
4
1
D
D
D
D
2
2
2.2_0603_5%~D
PC122
1U_0402_6.3V6K~D
1
2
4
Imax=6A
LG_VCCPP
G
0.1U_0402_16V7K~D
3
2
1
1
PC121
1U_0402_6.3V6K~D
1
2
+5VALWP
+VCCPP
1
PR131
+5VALWP BST_1.8VP 1
+1.8VP
2
1.8U_D104C-919AS-1R8N_9.5A_30%
1
PQ32
FDS6670AS_NL_SO8
2
PC120
DCR 7.6m ohm(max)
B
PL9
1
PR130
4.7_1206_5%~D
5
6
7
8
BOOT2
LX_1.8VP
PC114
2
PR128
12.1K_0402_1%~D
1
UG_1.8VP
1
3
2
1
22
21
PVCC2
20
LGATE2
19
PGND2
18
17
PR129
PC118
0_0603_5%~D
0.1U_0402_16V7K~D
UGATE2
PGND1
BOOT1
LGATE1
14
1BST_VCCPP
1 2
16
2
PVCC1
S
S
S
G
ISL6228_B+
2
D
D
D
D
8
7
6
5
1
15
2
28,29,36
PC111
+
PC119
220U_D2_4VM
24
5
6
7
8
PHASE1
1
12
2
EN2
PR126
0_0402_5%~D
1
2
PC113
4.7U_1206_25V6K~D
25
PC123
680P_0603_50V8J~D
OCSET2
1
PU8
ISL6228HRTZ-T_QFN28_4X4
PC112
4.7U_1206_25V6K~D
2
1
EN1
2
11
1
2
2
12.1K_0402_1%~D
1
2
3
2
1
B
+
2
PR124
10
LX_VCCPP
1.8U_D104C-919AS-1R8N_9.5A_30%
PR127
4.7_1206_5%~D
1
8
7
6
5
PQ29
FDS8884_SO8
2
PC117
680P_0603_50V8J~D
+
1
1
2
@1
PC116
220U_D2_4VM
+VCCPP
PC115
220U_D2_4VM
PL8
PR123
FB2_+1.8VP
68K_0402_1%~D
1
2
3
PC110
4.7U_1206_25V6K~D
1
2
PC109
4.7U_1206_25V6K~D
2
1
2
PR125
12.1K_0402_1%~D
PR121
681_0402_1%~D
1000P_0402_50V7K~D
34K_0402_1%~D
PR122
PC107
2
1
1
2
+5VALWP
1K_0402_1%~D
@
ISL6228_B+
PC108
.01U_0402_16V7K~D
1
2
1
1
2
GND_T
S
S
S
1
FSET2
PR119
VIN1
68K_0402_1%~D
FSET1
PGOOD1
7
PR118
1
2
C
1
1
2
PR117
PC106
2
1
PR114
PC104
18K_0402_1%~D
1000P_0402_50V7K~D
PR116
90.9K_0402_1%~D
681_0402_1%~D
C
1
2
1000P_0402_50V7K~D
1
1K_0402_1%~D
@
2
2
1
0_0402_5%~D
2
1
PC99
0.01U_0402_25V7K~D
@
ISL6228_B+
PC103
680P_0402_50K X7R~D
1
2
PC102
470P_0402_50V8J~D
2
2
2.2_0603_1%~D
1
PJP19
@ JUMP_43X118
1 1
2 2
B+
SUSP#
1
28,29,33,36,40
1
2
PR110
PR109
1
2.2_0603_1%~D
2
+1.8VP
DCR 7.6m ohm(max)
1.8VP
Imax=6A
LG_1.8VP
Iocp=9A
Iocp=9A
Fsw=366kHz
Fsw=303kHz
A
A
Compal Secret Data
Issued Date
2006/10/1
Deciphered Date
2007/5/01
Title
VCCPP/1.8VP
Size
Date:
5
4
3
2
Document Number
Rev
1.0
KFW11
Sheet
1
41
of
45
5
4
3
2
1
D
D
PJP21
@ JUMP_43X118
2
2
1
1
+1.8V
VCNTL
6
GND
NC
5
3
VREF
NC
7
4
VOUT
NC
8
TP
9
+3VALW
PC129
2
1
1
2
APL5331KAC-TRL_SO8~N
1
1
2
PC133
10U_0805_6.3V6M~D
RHU002N06_SOT323-3
C
+0.9VSP
PC131
2
1
S
2
3
PQ33
PR137
2
PC132
@
0.1U_0402_16V7K~D
D
2
G
1K_0402_1%~D
0_0402_5%~D
1
2
SUSP
1
27,36
1
PR136
4.7U_0805_6.3V6K~D
VIN
2
1
PR134
1K_0402_1%~D
C
2
PC128
4.7U_0805_6.3V6K~D
PU10
1
0.1U_0402_16V7K~D
B
B
A
A
Issued Date
Compal Secret Data
2005/10/1
2007/05/30
Deciphered Date
Title
+0.9VSP
Custom
Date:
Rev
1.0
KFW11
5
4
3
2
Sheet
1
42
of
45
5
4
3
2
1
5
5
5
PC142
100U_25V_M
1
2
PR156
10K_0402_1%~D
2
1
1
3.65K_1206_1%
PR155
2
1
1 2
4
2
3
2
1
+5VS
1
2
1
2
4
29.1
ISEN1
ISEN2
2
+CPU_B+
0.36UH_ETQP4LR36WFC_24A_20%
4
1
3
2
PC157
680P_0603_50V8J~D
1
PR168
1_0402_5%~D
PR169 @ 0_0402_5%~D
1
2
2
PR164
4.7_1206_5%~D
SI4634DY-T1-E3_SO8
PU11
1
4.7_1206_5%~D
680P_0603_50V8J~D
PR154
PC147
2
1 2
5
PQ38
VSUM
PR170 1_0603_5%~D
PC159
1U_0603_10V6K~D
2
PC136
100U_25V_M
PC141
10U_1206_25V6M~D
2
1
PC135
10U_1206_25V6M~D
2
1
5
3
2
1
5
6
7
8
3
2
1
3
2
1
2.2_0603_5%~D
0.22U_0603_10V7K~D
3
2
1
ISEN1
PL12
PQ39
SI4634DY-T1-E3_SO8
24
ISEN2
23
VDD
1VDD_CPU 22
GND
Vin_CPU
21
VIN
20
VSUM
19
VO
18
DFB
17
DFB
VSEN_CPU
VDIFF
1
PHASE_CPU2
UGATE_CPU2
PR163
PC155
BOOT_CPU2
1
2
1
2
PC152
10U_1206_25V6M~D
25
PQ37
SI7686DP-T1-E3_SO8
4
2
NC
PR158 @ 0_0402_5%~D
1
2
PC148
1
2
ISEN1
VCC_PRM
PC150
10U_1206_25V6M~D
26
LGATE_CPU2
3.65K_1206_1%
BOOT2
PVCC_CPU
+CPU_CORE
PR157
1_0402_5%~D
PR167
10K_0402_1%~D
2
1
27
2
C
1
28
UGATE2
1
3
0.22U_0603_16V7K~D
PR166
PHASE2
COMP
VSUM
PC149
10U_1206_25V6M~D
2
1
VW
0.36UH_ETQP4LR36WFC_24A_20%
4
1
29
FB2
2
D
3
2
1
PGND2
FB
+
LGATE_CPU1
5
6
7
8
30
DROOP
9
10
31
4
5
6
7
8
OCSET
VW
PC140
10U_1206_25V6M~D
2
1
1
1
2
PC143
1U_0603_10V6K~D
0.01U_0402_25V7K~D
PC139
2
1
PC138
1U_0603_10V6K~D
2
1
PC137
0.01U_0402_25V7K~D
2
1
8
COMP
PQ36
SI4634DY-T1-E3_SO8
37
VID0
OCSET
PVCC
LGATE2
PR172
1K_0402_1%~D
PC160
1
2
B
0.22U_0603_16V7K~D
VCC_PRM
ISEN2
PR174
1
1
2
+CPU_B+
PC163 10_0603_5%~D
Fsw=300kHz
2
1K_0402_1%~D
0.1U_0603_25V7K~D
PC164 0.022U_0603_25V7K
1
2
2
2.61K_0402_1%~D
2
1
11K_0402_1%~D
1
2
2
PR179
1
2
PR178 0_0402_5%~D
PC167 180P_0402_50V8J~D
1
2
VSSSENSE
2
PR177
1
PC166
0.022U_0603_25V7K
2
PC165
@0.022U_0603_25V7K
1
VSUM
1
2
PH2
PR180 1K_0402_1%~D PR181 3.57K_0402_1%~D
10KB_0603_5%_ERTJ1VR103J
PC168 0.068U_0603_50V7K~N
1
2
PC169
0.22U_0603_16V7K~D
2
1
1
VCC_PRM
38
SOFT
1
A
VID1
NTC
7
12
2
5
5
CPU_VID2
5
CPU_VID1
5
CPU_VID0
5
29
CPU_VID3
39
6
SOFT
FB2_CPU
0_0402_5%~D
VID2
40
VID3
41
NTC
PC162 1000P_0402_50V7K~D
2
1
2
255_0402_1%~D
1
2
PR176
VID4
42
VID5
43
VID6
44
VR_ON
45
32
2
1
VCCSENSE
DPRSLPVR
LGATE1
2
PR175
5
46
CLK_EN#
VR_TT#
220P_0402_50V7K~D
PR173
1
DPRSTP#
47
48
GND
33
5
ISL6262ACRZ-T_QFN48_7X7
2
1
2
1
PHASE_CPU1
34
PR171 97.6K_0402_1%~D PC158 470P_0402_50V7K~D
1
2
2
1
PC161
UGATE_CPU1
PGND1
PC156 1000P_0402_50V7K~D
B
35
PHASE1
16
1
UGATE1
RBIAS
FB_CPU 11
PC154
1
2
1000P_0402_50V7K~D
PR165 6.81K_0402_1%~D
1
2
PC145
2 1
2
PQ35
SI4634DY-T1-E3_SO8
4
36
PMON
DROOP
PR162 11.5K_0402_1%~D
1
2
1
BOOT1
4
RTN
2
@ 100K_0603_1%_TH11-4H104FT
1
2
@ 0.015U_0402_16V7K
PC151
0.068U_0603_50V7K~N PC153
1
2
PSI#
+
PL11
PR152
BOOT_CPU1
3
RBIAS
PH1
2 1
2
VSEN
PR160 147K_0402_1%~D
1
2
3V3
49
10K_0402_1%~D
2 PMON
15
PR161
VR_TT#
@ 4.22K_0402_1%
1
PR159
2
1
RTN
C
PC146
1
14
1U_0603_10V6K~D
PGOOD
1
PQ34
SI7686DP-T1-E3_SO8
5
6
7
8
1
H_PSI#
POW_MON
1
VDIFF
5
VGATE
PL10
FBMA-L18-453215-900LMA90T_1812
1
2
B+
4
2.2_0603_5%~D 0.22U_0603_10V7K~D
13
2
1
7,20,29
2
1
PR151
2
PR153
499_0402_1%~D
1.91K_0402_1%~D
PC144
1U_0603_10V6K~D
+3VS
0_0402_5%~D
2
3V3_CPU
PR147
1
+3VS
0_0402_5%~D
2
2
1
PR1480_0402_5%~D
VID5
2
1
PR1490_0402_5%~D
VID4
2
1
PR1420_0402_5%~D
VID3
2
1
PR1500_0402_5%~D
VID2
2
1
PR1460_0402_5%~D
VID1
2
1
PR1430_0402_5%~D
VID0
2
1
PR1440_0402_5%~D
PR141
1
CLK_EN#
0_0402_5%~D
2
VID6
PR140
1
5,7,19 H_DPRSTP#
DPRSTP#_CPU
7,20 DPRSLPVR
5600P_0402_25V7K
+CPU_B+
PR138
1_0603_5%~D
499_0402_1%~D
1
2
DPRSLPVR_CPU
PR145
VR_ON_CPU
0_0402_5%~D
2
1
PR139
CLK_EN#_CPU
D
CPU_VID4
@
CPU_VID5
1
VR_ON
PC134
2
CPU_VID6
2
+5VS
PC170 0.22U_0603_10V7K~D
2
1
A
Compal Secret Data
2007/1/15
Issued Date
Deciphered Date
2008/1/15
Title
+CPU_CORE
Custom
Rev
1.0
KFW11
Date:
5
4
3
2
Sheet
1
43
of
45
5
4
3
2
1
1.BAT+
2.BAT+
3.ID
4.B/I
5.SMC
6.SMD
7.TS
8.GND
9.GND
GND
GND
2
3
PD15
DA204U_SOT323~D
1
2
2
3
1
2 BATT_TEMP
BATT_TEMP 29
2
PR183
1K_0402_5%~D
1
BATT_SMC
1
2
3
4
5
6
7
8
9
BATT_SMD
PR198
PC175
0.1U_0402_16V7K~D
@
2
1
1K_0402_5%~D
2
1
@
10
11
Place clsoe to EC pin
PR182
47K_0402_5%~D
PJP22
1
2
3
4
5
6
7
8
9
Battery Connect/OTP
@
@
1
2
PC173
1000P_0402_50V7K~D
BATT_B/I
SMART
Battery:
D
+3VALWP
PC174
100P_0402_50V8J~D
1
2
PC172
0.01U_0402_25V7K~D
1
BATT++
2
1
2
1
2
PC171
100P_0402_50V8J~D
BATT+
@
PL13
SMB3025500YA_2P
1
PJPB1 battery connector
C
@
3
2
3
1
BATT++
PD14
DA204U_SOT323~D
BATT+
1
@
PD13
DA204U_SOT323~D
D
PD12
DA204U_SOT323~D
+3VALWP
PR184
1K_0402_5%~D
2
1
1
2
+3VALWP
PR185
6.49K_0402_1%~D
C
SUYIN_200275MR009G186ZL
1
2
EC_SMB_DA1 29
PR186
100_0402_5%~D
CPU
1
2
PH1 under CPU botten side :
CPU thermal protection at 90 +-3 degree C
Recovery at 50 +-3 degree C
EC_SMB_CK1 29
PR187
100_0402_5%~D
VL
VS
2
1
BATT+
1
B
2
2
1
PR192
205K_0402_1%~D
1
8
+
2
-
PD16
P
3
0
1
OTP_OUT 1
4
2
MAINPWON 39
1SS355_SOD323-2
PU12A
LM358ADR_SO8
1
2
PR197
150K_0402_1%~D
2
2
OTP_IN-
PR195
150K_0402_1%~D
PH3
100K_0603_1%_TH11-4H104FT
1
PC178
1000P_0402_50V7K~D
2
2
PR196
105K_0402_1%~D
OTP_IN+
2
1
6
1
G
VL
1
PU12B
PR193
61.9K_0402_1%~D
1
2
LM358ADR_SO8
BATT_IN
5
1
-
0
VL
PR191
147K_0402_1%~D
1
2
2
1
2
8
P
BATT_OVP
G
29
BATT_OUT7
+
PC176
0.1U_0603_25V7K~D
PR189
10.7K_0402_1%~D
PR190
499K_0402_1%~D
4
PR194
10K_0402_1%~D
1
2
PC177
0.01U_0402_25V7K~D
B
CPU
2
VS
1
PR188
340K_0402_1%~D
PC179
1U_0603_10V6K~D
OVP voltage :
LI-3S :13.50V--BATT-OVP=1.5V
BATT-OVP=0.111*BATT+
A
A
Issued Date
Compal Secret Data
2005/10/1
2007/05/30
Deciphered Date
Title
BATTERY CONN
Custom
Date:
Rev
1.0
KFW11
5
4
3
2
Sheet
1
44
of
45
5
4
3
2
Version Change List ( P. I. R. List )
Item Page#
Title
Date
Request
Owner
1
Page 1/1
Issue Description
Solution Description
Rev.
1
D
D
2
3
4
5
6
7
8
9
10
11
12
C
C
13
14
15
16
17
18
19
20
21
22
B
B
23
24
25
26
27
28
29
30
31
32
A
A
2007/1/15
Issued Date
Compal Secret Data
2008/1/15
Deciphered Date
Title
PW PIR-1
Rev
1.0
KFW11
Date:
5
4
3
2
Sheet
1
45
of
45

Compal LA-4841P - Schematics. www.s

Transcription

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