IALAA Minnesota 10A/10AG

Transcription

A
B
C
D
E
1
2
1
IALAA
Minnesota 10A/10AG
2
LA3631P REV 1A Schematic
3
3
AMD Turion,Sempron/ATI RX690/RS690MC / ATI SB600
2007-05-04 Rev. 1A
4
4
Compal Secret Data
Security Classification
2007/5/4
Issued Date
Deciphered Date
2008/5/4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
Compal Electronics, Inc.
Title
Cover
Size
B
Date:
Document Number
IALAA-Minnesota10A LA3631P
Monday, May 14, 2007
Rev
1A
Sheet
E
1
of
45
A
B
Compal confidential
C
D
IALAA Minnesota10A FUNCTION BLOCK
E
DIAGRAM
File Name : IALAA Minnesota10A LA3631P
P/N :
Clock Generator
ICS951462AGLFT
Thermal Sensor
GMT G781P8F
PAGE 13
PAGE 6
AMD S1 CPU 638 pin
Turion 64 X2
Turion 64
Sempron
4
CPU VID
533/667MHz
(1.8V)
FANController
SO-DIMM x 2(DDRII)
Memory Bus
BANK 0,1,2,3
4
PAGE 8,9
16x16 1000MHZ
PAGE 39
PAGE 24
ATI-RX/RS690MC
x1 PCI-E
Mini Card-WLAN
PAGE 24
VGA M26P Embeded
x1 PCI-E
TV-OUT Conn.
New Card
3
465 pin BGA
page 14
PAGE 28
PAGE 10,11,12
VGA Conn
LAN
RTL8111B-1G
MiniCard w/ 3G (Port 8)
RTL8101E-10/100M
A-Link Express II
USB 2.0
PCI
480MHz(5V)
PAGE 29
USB Port * 2 (Port 0, 1)
Int. Camera (Port 7)
PAGE 29
USB Port 0 be debug port.
PAGE 29
ATI-SB600
Primary SATA
3.3V,5V
1.5GHz(150MB/s)
548 pin BGA
CardBus/ 5IN1/ 1394
PCI8412-1394/CardBus/5IN1
SATA
PAGE 16,17,18,19
2
Finger Printer (Port 5)
PAGE 24
PAGE 25
x4 PCIE
33MHz (3.3V)
RJ-45
PAGE 25
x1 PCI-E
page 15
PAGE 42
HD DVD
page 27
page 20
DC/DC Interface
Power Buttom
x1 PCI-E
page 15
HDMI Conn.
PAGE 22
HT
CRT Conn.
3
RTC Battery
PAGE 1,2,3,4,5,6,7
PAGE 6
LVDS Conn
PAGE 41
RealTek WLAN (Port3)
SATA HDD0
PAGE 21
Secondary
PATAATA-100 (5V)
PAGE 22, 23
Bluetooth (Port 4)
PAGE 29
PAGE 24
USB/B (Port 6, 2)
NewCard (Port 9)
PAGE 29
PAGE 28
IDE ODD
DCIN&DETECTOR
PAGE 28
2
PAGE 36
LPC
BATT CONN/OTP
33MHz (3.3V)
PAGE 37
CARD BUS
SOCKET
1394-Port
PAGE 22
PAGE 23
5 IN 1 Conn
Debug Port
PAGE 34
PAGE 22
Azalia
Embedded Controller
SPI
24MHz(3.3V)
PAGE 30
ENE KB926
PAGE 26
Int.
K/B
Matrix
PS2
BIOS
Track
Pad
Scan
KB
PAGE 31
PAGE 33
PAGE 33
HD CODEC
ALC268-GR
CHARGER
Audio Amplifier
APA2057APAGE 27
PAGE 38
3V/5V/
PAGE 39
MDC w/Rev1.5
1.8V/1.2V
PAGE 28
PAGE 40
2.5V/0.9V/1.5V
PAGE 41
1
CPU_CORE
PAGE 42
Compal Secret Data
2007/5/4
Issued Date
Deciphered Date
2008/5/4
A
B
C
D
Title
Black Diagram
Size Document Number
CustomIALAA-Minnesota10A LA3631P
Date:
Rev
1A
Sheet
E
2
of
45
1
A
B
C
D
Voltage Rails
1
2
SIGNAL
STATE
Power Plane
Description
S1
S3
S5
VIN
Adapter power supply (19V)
ON
ON
ON
B+
AC or battery power rail for power circuit.
ON
ON
ON
+RTCVCC
RTC power
ON
ON
ON
+VSB
B+ switched power rail
ON
ON
ON
+5VALW
5V always on power rail
ON
ON
ON
+3VALW
3.3V always on power rail
ON
ON
ON
E
SLP_S3# SLP_S5#
+VALW
+V
+VS
Clock
HIGH
HIGH
ON
ON
ON
ON
HIGH
HIGH
ON
ON
ON
LOW
S3 (Suspend to RAM)
LOW
HIGH
ON
ON
OFF
OFF
S4 (Suspend to Disk)
LOW
LOW
ON
OFF
OFF
OFF
S5 (Soft OFF)
LOW
LOW
ON
OFF
OFF
OFF
Full ON
S1(Power On Suspend)
+1.2VALW
1.2V always on power rail
ON
ON
ON
+1.8V
1.8V power rail
ON
ON
OFF
+0.9V
0.9V switched power rail
ON
ON
OFF
+5VS
5VS switched power rail
ON
OFF
OFF
+3VS
3.3VS switched power rail
ON
OFF
OFF
Vcc
Ra
+2.5VS
ON
OFF
OFF
Board ID
+1.8VS
ON
OFF
OFF
+1.5VS
ON
OFF
OFF
+CPU_CORE
Core voltage for CPU
ON
OFF
OFF
+1.2V_HT
ON
OFF
OFF
0
1
2
3
4
5
6
7
1
ID Table for AD channel
3.3V +/- 5%
100K +/- 5%
Rb
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC
V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V
V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V
V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V
2
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
External PCI Devices
Device
IDSEL#
1394/ CardBus/ 5IN1
AD20
REQ#/GNT#
Interrupts
2/ 2
PIRQE/F/G
EC SM Bus1 address
3
EC SM Bus2 address
Device
HEX
Address
Smart Battery
16H
0001 011X b
CPU Thermal-G781P8F
24C16
A0H
1010 000X b
VGA Thermal-
Device
ATi SB600 SM Bus address
SM Bus0 address
Device
HEX
BTN_ID
0
1
2
3
4
5
6
7
HEX
Address
98H
1001 100X b
BTO
BOM STURCTURE
3
SM Bus1 address
Address
Clock GEN.
(ICS951462AGLFT)
DDR DIMM0
A4
A6
DDR DIMM1
4
Mini Card-WLAN
4
Mini Card-3G
New Card
2007/5/4
Issued Date
Deciphered Date
2008/5/4
A
B
Compal Secret Data
C
D
Title
Notes List
Date:
Rev
1A
Sheet
E
3
of
45
5
4
<10> H_CADIP[0..15]
D
<10> H_CADIN[0..15]
3
H_CADIP[0..15]
H_CADOP[0..15]
H_CADIN[0..15]
H_CADON[0..15]
2
1
H_CADOP[0..15] <10>
D
H_CADON[0..15] <10>
+1.2V_HT
JP27A
H_CADIP15
H_CADIN15
H_CADIP14
H_CADIN14
H_CADIP13
H_CADIN13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8
H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0
C
<10>
<10>
<10>
<10>
H_CLKIP1
H_CLKIN1
H_CLKIP0
H_CLKIN0
D4
D3
D2
D1
VLDT_A3
VLDT_A2
VLDT_A1
VLDT_A0
VLDT_B3
VLDT_B2
VLDT_B1
VLDT_B0
AE5
AE4
AE3
AE2
N5
P5
M3
M4
L5
M5
K3
K4
H3
H4
G5
H5
F3
F4
E5
F5
N3
N2
L1
M1
L3
L2
J1
K1
G1
H1
G3
G2
E1
F1
E3
E2
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
T4
T3
V5
U5
V4
V3
Y5
W5
AB5
AA5
AB4
AB3
AD5
AC5
AD4
AD3
T1
R1
U2
U3
V1
U1
W2
W3
AA2
AA3
AB1
AA1
AC2
AC3
AD1
AC1
J5
K5
J3
J2
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
Y4
Y3
Y1
W1
P3
P4
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLOUT_H1
L0_CTLOUT_L1
T5
R5
L0_CTLOUT_H0
L0_CTLOUT_L0
R2
R3
HTT Inter face
VLDT=500mA
1
C107
2
4.7U_0805_10V4Z
H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADOP10
H_CADON10
H_CADOP9
H_CADON9
H_CADOP8
H_CADON8
H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADOP3
H_CADON3
H_CADOP2
H_CADON2
H_CADOP1
H_CADON1
H_CADOP0
H_CADON0
VLDT CAP.
+1.2V_HT
250 mil
1
C102
4.7U_0805_10V4Z
2
1
C103
4.7U_0805_10V4Z
2
B
1 51_0402_1%
1 51_0402_1%
2
2
<10> H_CTLIP0
<10> H_CTLIN0
H_CTLIP0
H_CTLIN0
N1
P1
L0_CTLIN_H0
L0_CTLIN_L0
1
C104
0.22U_0603_16V4Z
2
1
C106
180P_0402_50V8J
2
1
C112
180P_0402_50V8J
C
2
Near CPU Socket
H_CLKOP1
H_CLKON1
H_CLKOP0
H_CLKON0
H_CTLOP0
H_CTLON0
C101
0.22U_0603_16V4Z
2
<10>
<10>
<10>
<10>
C497
+1.2V_HT
R52
R51
1
C503
H_CTLOP0 <10>
H_CTLON0 <10>
1
2
@ 0.01U_0402_25V4Z
1
2
@ 0.01U_0402_25V4Z
1
2
@ 0.01U_0402_25V4Z
C1447 Near H_CADIP/N[2..4] and
H_CLKIP/N0 near CPU BOT Side
C1448 Near H_CADIP/N[5..7] and
H_CTLIP/N0 near CPU BOT Side
B
FOX_PZ63823-284S-41F
C496
Athlon 64 S1
Processor Socket
AMD : 49.9 1%
ATI : 51 1%
VCC GND
C1449 Near H_CADOP/N[0..1]
near CPU BOT Side
GND1
For IALAA Only-Change Layer Bridge for HOST3 CADOP/N[0..7]
A
A
Compal Secret Data
2007/5/4
Issued Date
Deciphered Date
2008/5/4
5
4
3
2
Title
S1g1 HT I/F
Custom IALAA-Minnesota10A
Date:
Rev
1A
LA3631P
Sheet
1
4
of
45
A
B
C
D
E
Processor DDR2 Memory Interface
<9> DDR_B_D[63..0]
2
R91
1K_0402_1%
+CPU_M_VREF
1
2
1
2
C156
1000P_0402_25V8J
1
R90
1K_0402_1%
C151
0.1U_0402_16V4Z
2
1
4
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
+CPU_M_VREF
JP27B
+0.9V
DDR_A_CLK2
Need to link SD000006980
+1.8V
3
TP2
R331 1
R335 2
<8>
<8>
<8>
<8>
DDR_CS3_DIMMA#
DDR_CS2_DIMMA#
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#
<9>
<9>
<9>
<9>
DDR_CS3_DIMMB#
DDR_CS2_DIMMB#
DDR_CS1_DIMMB#
DDR_CS0_DIMMB#
<9> DDR_CKE1_DIMMB
<9> DDR_CKE0_DIMMB
<8> DDR_CKE1_DIMMA
<8> DDR_CKE0_DIMMA
<8> DDR_A_MA[15..0]
2
<8> DDR_A_BS#2
<8> DDR_A_BS#1
<8> DDR_A_BS#0
<8> DDR_A_RAS#
<8> DDR_A_CAS#
<8> DDR_A_WE#
VTT_SENSE
2
1 39.2_0402_1%
39.2_0402_1%
Y10
M_ZN AE10
M_ZP AF10
DDR_CS3_DIMMA#
DDR_CS2_DIMMA#
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#
M_VREF
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT_SENSE
M_ZN
M_ZP
V19
J22
V22
T19
MA0_CS_L3
MA0_CS_L2
MA0_CS_L1
MA0_CS_L0
DDR_CS3_DIMMB# Y26
DDR_CS2_DIMMB# J24
DDR_CS1_DIMMB# W24
DDR_CS0_DIMMB# U23
MB0_CS_L3
MB0_CS_L2
MB0_CS_L1
MB0_CS_L0
DDRII Cmd/Ctrl//Clk
W17
D10
C10
B10
AD10
W10
AC10
AB10
AA10
A10
1
DDR_A_CLK#2
2
C148
1.5P_0402_50V9C
DDR_A_CLK1
1
MA0_CLK_H2
MA0_CLK_L2
MA0_CLK_H1
MA0_CLK_L1
Y16 DDR_A_CLK2
AA16 DDR_A_CLK#2
E16 DDR_A_CLK1
F16 DDR_A_CLK#1
MB0_CLK_H2
MB0_CLK_L2
MB0_CLK_H1
MB0_CLK_L1
AF18
AF17
A17
A18
DDR_B_CLK2
DDR_B_CLK#2
DDR_B_CLK1
DDR_B_CLK#1
MB0_ODT1
MB0_ODT0
MA0_ODT1
MA0_ODT0
W23
W26
V20
U19
DDR_B_ODT1
DDR_B_ODT0
DDR_A_ODT1
DDR_A_ODT0
MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
J25
J26
W25
L23
L25
U25
L24
M26
L26
N23
N24
N25
N26
P24
P26
T24
DDR_B_MA15
DDR_B_MA14
DDR_B_MA13
DDR_B_MA12
DDR_B_MA11
DDR_B_MA10
DDR_B_MA9
DDR_B_MA8
DDR_B_MA7
DDR_B_MA6
DDR_B_MA5
DDR_B_MA4
DDR_B_MA3
DDR_B_MA2
DDR_B_MA1
DDR_B_MA0
DDR_A_CLK2 <8>
DDR_A_CLK#2 <8>
DDR_A_CLK1 <8>
DDR_A_CLK#1 <8>
DDR_A_CLK#1
H26
J23
J20
J21
MB_CKE1
MB_CKE0
MA_CKE1
MA_CKE0
DDR_A_MA15
DDR_A_MA14
DDR_A_MA13
DDR_A_MA12
DDR_A_MA11
DDR_A_MA10
DDR_A_MA9
DDR_A_MA8
DDR_A_MA7
DDR_A_MA6
DDR_A_MA5
DDR_A_MA4
DDR_A_MA3
DDR_A_MA2
DDR_A_MA1
DDR_A_MA0
K19
K20
V24
K24
L20
R19
L19
L22
L21
M19
M20
M24
M22
N22
N21
R21
MA_ADD15
MA_ADD14
MA_ADD13
MA_ADD12
MA_ADD11
MA_ADD10
MA_ADD9
MA_ADD8
MA_ADD7
MA_ADD6
MA_ADD5
MA_ADD4
MA_ADD3
MA_ADD2
MA_ADD1
MA_ADD0
DDR_A_BS#2
DDR_A_BS#1
DDR_A_BS#0
K22
R20
T22
MA_BANK2
MA_BANK1
MA_BANK0
MB_BANK2
MB_BANK1
MB_BANK0
K26 DDR_B_BS#2
T26 DDR_B_BS#1
U26 DDR_B_BS#0
DDR_B_BS#2 <9>
DDR_B_BS#1 <9>
DDR_B_BS#0 <9>
DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#
T20
U20
U21
MA_RAS_L
MA_CAS_L
MA_WE_L
MB_RAS_L
MB_CAS_L
MB_WE_L
U24 DDR_B_RAS#
V26 DDR_B_CAS#
U22 DDR_B_WE#
DDR_B_RAS# <9>
DDR_B_CAS# <9>
DDR_B_WE# <9>
C150
1.5P_0402_50V9C
DDR_B_CLK2
1
DDR_B_CLK2 <9>
DDR_B_CLK#2 <9>
DDR_B_CLK1 <9>
DDR_B_CLK#1 <9>
DDR_CKE1_DIMMB
DDR_CKE0_DIMMB
DDR_CKE1_DIMMA
DDR_CKE0_DIMMA
2
DDR_B_CLK#2
DDR_B_ODT1 <9>
DDR_B_ODT0 <9>
DDR_A_ODT1 <8>
DDR_A_ODT0 <8>
DDR_B_MA[15..0] <9>
2
C149
1.5P_0402_50V9C
DDR_B_CLK1
1
DDR_B_CLK#1
2
C568
1.5P_0402_50V9C
<9> DDR_B_DM[7..0]
FOX_PZ63823-284S-41F
Athlon 64 S1
Processor
Socket
<9>
<9>
<9>
<9>
<9>
<9>
<9>
<9>
<9>
<9>
<9>
<9>
<9>
<9>
<9>
<9>
DDR_B_DQS7
DDR_B_DQS#7
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS0
DDR_B_DQS#0
DDR_B_D63
DDR_B_D62
DDR_B_D61
DDR_B_D60
DDR_B_D59
DDR_B_D58
DDR_B_D57
DDR_B_D56
DDR_B_D55
DDR_B_D54
DDR_B_D53
DDR_B_D52
DDR_B_D51
DDR_B_D50
DDR_B_D49
DDR_B_D48
DDR_B_D47
DDR_B_D46
DDR_B_D45
DDR_B_D44
DDR_B_D43
DDR_B_D42
DDR_B_D41
DDR_B_D40
DDR_B_D39
DDR_B_D38
DDR_B_D37
DDR_B_D36
DDR_B_D35
DDR_B_D34
DDR_B_D33
DDR_B_D32
DDR_B_D31
DDR_B_D30
DDR_B_D29
DDR_B_D28
DDR_B_D27
DDR_B_D26
DDR_B_D25
DDR_B_D24
DDR_B_D23
DDR_B_D22
DDR_B_D21
DDR_B_D20
DDR_B_D19
DDR_B_D18
DDR_B_D17
DDR_B_D16
DDR_B_D15
DDR_B_D14
DDR_B_D13
DDR_B_D12
DDR_B_D11
DDR_B_D10
DDR_B_D9
DDR_B_D8
DDR_B_D7
DDR_B_D6
DDR_B_D5
DDR_B_D4
DDR_B_D3
DDR_B_D2
DDR_B_D1
DDR_B_D0
AD11
AF11
AF14
AE14
Y11
AB11
AC12
AF13
AF15
AF16
AC18
AF19
AD14
AC14
AE18
AD18
AD20
AC20
AF23
AF24
AF20
AE20
AD22
AC22
AE25
AD26
AA25
AA26
AE24
AD24
AA23
AA24
G24
G23
D26
C26
G26
G25
E24
E23
C24
B24
C20
B20
C25
D24
A21
D20
D18
C18
D14
C14
A20
A19
A16
A15
A13
D12
E11
G11
B14
A14
A11
C11
MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0
DDR_B_DM7
DDR_B_DM6
DDR_B_DM5
DDR_B_DM4
DDR_B_DM3
DDR_B_DM2
DDR_B_DM1
DDR_B_DM0
AD12
AC16
AE22
AB26
E25
A22
B16
A12
MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0
DDR_B_DQS7
DDR_B_DQS#7
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS0
DDR_B_DQS#0
AF12
AE12
AE16
AD16
AF21
AF22
AC25
AC26
F26
E26
A24
A23
D16
C16
C12
B12
MB_DQS_H7
MB_DQS_L7
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_H4
MB_DQS_L4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0
D DRII Data
JP27C
+1.8V
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
AA12
AB12
AA14
AB14
W11
Y12
AD13
AB13
AD15
AB15
AB17
Y17
Y14
W14
W16
AD17
Y18
AD19
AD21
AB21
AB18
AA18
AA20
Y20
AA22
Y22
W21
W22
AA21
AB22
AB24
Y24
H22
H20
E22
E21
J19
H24
F22
F20
C23
B22
F18
E18
E20
D22
C19
G18
G17
C17
F14
E14
H17
E17
E15
H15
E13
C13
H12
H11
G14
H14
F12
G12
DDR_A_D63
DDR_A_D62
DDR_A_D61
DDR_A_D60
DDR_A_D59
DDR_A_D58
DDR_A_D57
DDR_A_D56
DDR_A_D55
DDR_A_D54
DDR_A_D53
DDR_A_D52
DDR_A_D51
DDR_A_D50
DDR_A_D49
DDR_A_D48
DDR_A_D47
DDR_A_D46
DDR_A_D45
DDR_A_D44
DDR_A_D43
DDR_A_D42
DDR_A_D41
DDR_A_D40
DDR_A_D39
DDR_A_D38
DDR_A_D37
DDR_A_D36
DDR_A_D35
DDR_A_D34
DDR_A_D33
DDR_A_D32
DDR_A_D31
DDR_A_D30
DDR_A_D29
DDR_A_D28
DDR_A_D27
DDR_A_D26
DDR_A_D25
DDR_A_D24
DDR_A_D23
DDR_A_D22
DDR_A_D21
DDR_A_D20
DDR_A_D19
DDR_A_D18
DDR_A_D17
DDR_A_D16
DDR_A_D15
DDR_A_D14
DDR_A_D13
DDR_A_D12
DDR_A_D11
DDR_A_D10
DDR_A_D9
DDR_A_D8
DDR_A_D7
DDR_A_D6
DDR_A_D5
DDR_A_D4
DDR_A_D3
DDR_A_D2
DDR_A_D1
DDR_A_D0
MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0
Y13
AB16
Y19
AC24
F24
E19
C15
E12
DDR_A_DM7
DDR_A_DM6
DDR_A_DM5
DDR_A_DM4
DDR_A_DM3
DDR_A_DM2
DDR_A_DM1
DDR_A_DM0
MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0
W12
W13
Y15
W15
AB19
AB20
AD23
AC23
G22
G21
C22
C21
G16
G15
G13
H13
DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS0
DDR_A_DQS#0
DDR_A_D[63..0] <8>
4
3
DDR_A_DM[7..0] <8>
DDR_A_DQS7 <8>
DDR_A_DQS#7 <8>
DDR_A_DQS6 <8>
DDR_A_DQS#6 <8>
DDR_A_DQS5 <8>
DDR_A_DQS#5 <8>
DDR_A_DQS4 <8>
DDR_A_DQS#4 <8>
DDR_A_DQS3 <8>
DDR_A_DQS#3 <8>
DDR_A_DQS2 <8>
DDR_A_DQS#2 <8>
DDR_A_DQS1 <8>
DDR_A_DQS#1 <8>
DDR_A_DQS0 <8>
DDR_A_DQS#0 <8>
FOX_PZ63823-284S-41F
1
1
Athlon 64 S1
Processor Socket
Compal Secret Data
2007/5/4
Issued Date
Deciphered Date
2008/5/4
A
B
C
Title
S1g1 DDRII I/F
D
Date:
2
Rev
1A
LA3631P
Sheet
E
5
of
45
D39
+1.8V
1
+1.2V_HT
R53
R54
B7
A7
F10
RESET_L
PWROK
LDTSTOP_L
AF4
AF5
SIC
SID
2 44.2_0402_1% CPU_HTREF1 P6
2 44.2_0402_1% CPU_HTREF0 R6
1
1
HTREF1
HTREF0
1
R53&R54 place them to CPU within 1"
A:PA_IXP600AD12
2
1
1
R333
169_0402_1%
2
A:PA_IXP600AD12
1
C545
<13> CPUCLK0_L
2
3900P_0402_50V7K
A9
A8
C
+1.8V
2
R86
CPU_TEST25_H_BYPASSCLK_H
1
510_0402_5%
2
R48
2
R49
2
R50
CPU_TEST25_L_BYPASSCLK_L
1
510_0402_5%
CPU_TEST19_PLLTEST0
1
300_0402_5%
CPU_TEST18_PLLTEST1
1
300_0402_5%
G10
DBRDY
AA9
AC9
AD9
AF9
TMS
TCK
TRST_L
TDI
E9
E8
G9
H10
AA7
C2
D7
E7
F7
C7
AC8
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12
THERMDC_CPU
THERMDA_CPU
Thermal Sensor
GMT G781P8F
B: Change to GMT G781P8F from DVT.
C3
AA6
W7
W8
Y6
AB6
TEST7
TEST6
THERMDC
THERMDA
TEST3
TEST2
P20
P19
N20
N19
RSVD0
RSVD1
RSVD2
RSVD3
+3VS
C111
2200P_0402_50V7K
B
1
2
U6
THERMDA_CPU 2
DXP+
VCC
1
THERMDC_CPU 3
DXN-
ALERT#
6
THERM#
4
GND
5
<15,30> EC_SMB_CK2
8
SCLK
<15,30> EC_SMB_DA2
7
SDATA
1
2
R26
R25
P22
R22
C105
0.1U_0402_16V4Z
+1.8V
CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
RSVD4
RSVD5
RSVD6
RSVD7
NOTE: HDT TERMINATION IS REQUIRED
FOR REV. Ax SILICON ONLY.
A
PSI# <42>
2007/5/4
Issued Date
E10
CPU_DBREQ#
TDO
AE9
CPU_TDO
TEST29_H
TEST29_L
C9
C8
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N
CPU_PROCHOT#_1 .8
3
2
R490
3
Q11
11
@
10K_0402_5%
1
2 R42
0_0402_5%
@
H_PROCHOT# <16>
R88
80.6_0402_1%
1
2
C
ROUTE AS 80 Ohm DIFFERENTIAL PAIR
PLACE IT CLOSE TO CPU WITHIN 1"
TEST24
TEST23
TEST22
TEST21
TEST20
AE7
AD7
AE8
AB8
AF7
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
J7
H8
AF8
AE6
K8
C4
RSVD8
RSVD9
H16
B18
RSVD10
RSVD11
B3
C1
RSVD12
RSVD13
RSVD14
H6
G6
D5
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
R24
W18
R23
AA8
H18
H19
TP8
TP9
TP10
CPU_TEST21_SCANEN
TP7
+1.8V
VID1
CPU_PRESENT#
CPU_TEST26_BURNIN#
CPU_TEST26_BURNIN#
CPU_TEST21_SCANEN
1
R47
1
R56
1
R57
2
300_0402_5%
2
1K_0402_5%
2
300_0402_5%
1
R55
2
300_0402_5%
B
HDT Connector
JP9
1
3
5
7
9
11
13
15
17
19
21
23
2
4
6
8
10
12
14
16
18
20
22
24
26
+3VS
U20D
HDT_RST# 11
A
12 LDT_RST#
B
13
O
SN74LVC08APW_TSSOP14
@ SAMTEC_ASP-68200-07
Deciphered Date
2008/5/4
4
MP:Reserve pull up resistor
R490 for H_PROCHOT#
1
@ 10K_0402_5%
2
300_0402_5%
2
SB_PWRGD <16,30>
A
Compal Secret Data
5
2
R41
1
R43
@ MMBT3904_SOT23-3
DBREQ_L
D
FOX_PZ63823-284S-41F
2
1
@ 220_0402_5% R77
2
1
@ 220_0402_5% R76
2
1
@ 220_0402_5% R75
2
1
@ 220_0402_5% R74
2
1
@ 220_0402_5% R73
G781P8F_MSOP8
TP15
A3
MAINPWON <36,37,39>
H_THERMTRIP# <16>
+3V_SB
CLKIN_H
CLKIN_L
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
TP4
TP5
TP6
TP3
TP11
+1.8V
VDDIO_FB_H
VDDIO_FB_L
CPU _DBRDY
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1
PSI_L
<42>
<42>
<42>
<42>
<42>
<42>
C
<13> CPUCLK0_H
R44
680_0402_5%
W9
Y9
TP1
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
2 3900P_0402_50V7K
1
C547
VDD_FB_H
VDD_FB_L
1
MMBT3904_SOT23-3
VID5
VID4
VID3
VID2
VID1
VID0
AC6 CPU_PRESENT#
1
E
<40> VDDIOFB_H
LDT_RST#
CPU_PRESENT_L
A5
C6
A6
A4
C5
B5
3
B
F6
E6
<42> CPU_VCC_SENSE
<42> CPU_VSS_SENSE
VID5
VID4
VID3
VID2
VID1
VID0
MISC
2
2
R89
680_0402_5%
<16> LDT_RST#
CPU_SIC
1
300_0402_5%
2
R332
THERMTRIP_L
PROCHOT_L
AF6 CPU_THERMTRIP#_R
CPU_PROCHOT#_1.8
AC7
C
LDT_STOP#
VDDA2
VDDA1
PCIRST# <16,22>
R35
2
0_0402_5%
R36
2
0_0402_5%
@
1
Q10
E
LDT_RST#
H_PW RGD
LDT_STOP#
A:PA_IXP600AD12
1
CH751H-40PT_SOD323-2
B
F8
F9
D
2
2
300_0402_5%
JP27D
R87
680_0402_5%
<11,16> LDT_STOP#
R37
1
R38
2
10K_0402_5%
2
H_PW RGD
<16> H_PWRGD
C:Update THERMTRIP# control circuit.
1
2
C119
100U_D2_10VM
+2.5VDDA
VDDA=300mA
L16
3300P_0402_50V7K
1
2
1 FBM_L11_201209_300L_0805
1
1
1
+
4.7U_0805_10V4Z
C132
C131
C139
0.22U_0603_16V4Z
2
2
2
2
1
14
A:Need to re-Link "SGN00000200"
2
P
+2.5VS
3
G
4
7
5
Title
S1g1 CTRL
Date:
Wednesday, May 16, 2007
Rev
1A
LA3631P
Sheet
1
6
of
45
5
4
3
2
1
+CPU_CORE
+CPU_CORE
1
45level
+ C544
45@ 820U_E9_2_5V_M_R7
2
1
1
+ C576
45@ 820U_E9_2_5V_M_R7
2
+
1
C560
330U_D2_2.5VY_R9M
2
+ C602
330U_D2_2.5VY_R9M
2
Near CPU Socket
+CPU_CORE
1
C123
22U_0805_6.3V6M
2
1
C146
22U_0805_6.3V6M
2
1
C125
22U_0805_6.3V6M
2
+CPU_CORE
1
C
1
C144
22U_0805_6.3V6M
2
2
1
1
C138
0.22U_0603_16V4Z
2
C122
22U_0805_6.3V6M
2
+CPU_CORE
C143
0.22U_0603_16V4Z
1
1
C124
22U_0805_6.3V6M
2
1
C145
22U_0805_6.3V6M
2
1
C126
22U_0805_6.3V6M
2
1
C142
22U_0805_6.3V6M
2
+CPU_CORE
1
C129
0.01U_0402_25V4Z
2
C136
180P_0402_50V8J
2
Under CPU Socket
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
Power
VDD(+CPU_CORE) decoupling.
D
AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4
+CPU_CORE
JP27E
AC4
AD2
G4
H2
J9
J11
J13
K6
K10
K12
K14
L4
L7
L9
L11
L13
M2
M6
M8
M10
N7
N9
N11
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
V6
V8
V10
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
V12
V14
W4
Y2
J15
K16
L15
M16
P16
T16
U15
V16
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
P18
P21
P23
P25
R17
T18
T21
T23
T25
U17
V18
V21
V23
V25
Y25
+1.8V
FOX_PZ63823-284S-41F
VDDIO decoupling.
Athlon 64 S1
Processor Socket
+1.8V
+1.8V
1
C153
22U_0805_6.3V6M
2
1
1
C152
22U_0805_6.3V6M
2
C155
0.22U_0603_16V4Z
2
1
C154
0.22U_0603_16V4Z
2
+0.9V
Under CPU Socket
VTT decoupling.
B
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
M11
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
D
C
FOX_PZ63823-284S-41F
Near Power Supply
1
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
Ground
JP27F
Athlon 64 S1
Processor Socket
C: Change to NBO CAP
B
+ C577
220U_Y_4VM
2
Between CPU Socket and DIMM
+1.8V
+0.9V
1
C163
0.22U_0603_16V4Z
2
1
C177
0.22U_0603_16V4Z
2
C164
0.22U_0603_16V4Z
2
+1.8V
1
1
2
1
1
C160
0.01U_0402_25V4Z
2
C172
0.22U_0603_16V4Z
1
2
+1.8V
C159
0.01U_0402_25V4Z
1
1
2
1
C158
180P_0402_50V8J
2
C165
180P_0402_50V8J
2
1
A
1
1
1
C183
4.7U_0805_10V4Z
2
1
C182
4.7U_0805_10V4Z
2
1
C162
4.7U_0805_10V4Z
2
C161
4.7U_0805_10V4Z
C555
4.7U_0805_10V4Z
2
1
C548
0.22U_0603_16V4Z
2
1
C549
0.22U_0603_16V4Z
2
1
C559
1000P_0402_25V8J
2
2
1
C140
4.7U_0805_10V4Z
2
1
C137
4.7U_0805_10V4Z
2
1
2
C133
0.22U_0603_16V4Z
1
C134
0.22U_0603_16V4Z
2
1
C130
1000P_0402_25V8J
2
1
C552
180P_0402_50V8J
2
1
C127
1000P_0402_25V8J
2
1
C550
180P_0402_50V8J
2
1
2
C147
180P_0402_50V8J
1
C128
180P_0402_50V8J
2
A
Near CPU Socket Left side.
Compal Secret Data
2007/5/4
Deciphered Date
2008/5/4
4
C554
1000P_0402_25V8J
2
Issued Date
5
1
Near CPU Socket Right side.
C: Change to NBO CAP
+ C652
220U_Y_4VM
2 @
1
C176
+0.9V
180P_0402_50V8J
A: Add C165 and C176
to follow AMD Layout
review recommand for
EMI
+1.8V
2
2
180PF Qt'y follow the distance between
CPU socket and DIMM0. <2.5inch>
C157
180P_0402_50V8J
C556
4.7U_0805_10V4Z
3
2
Title
S1g1 PWR & GND
Date:
Rev
1A
LA3631P
Sheet
1
7
of
45
5
4
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_DM3
DDR_A_D26
DDR_A_D27
C
DDR_CKE0_DIMMA
<5> DDR_CKE0_DIMMA
DDR_CS2_DIMMA#
DDR_A_BS#2
<5> DDR_CS2_DIMMA#
<5> DDR_A_BS#2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#
<5> DDR_A_BS#0
<5> DDR_A_WE#
DDR_A_CAS#
DDR_CS1_DIMMA#
<5> DDR_A_CAS#
<5> DDR_CS1_DIMMA#
DDR_A_ODT1
<5> DDR_A_ODT1
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
B
DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_DM7
DDR_A_D58
DDR_A_D59
A
<9,13,17,24,28> SMB_CK_DAT0
<9,13,17,24,28> SMB_CK_CLK0
+3VS
1
C237
0.1U_0402_16V4Z
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
P-TWO_A5692A-A0G16-N
DDR_A_D[0..63]
DDR_A_D4
DDR_A_D5
DDR_A_DM[0..7]
DDR_A_DM[0..7] <5>
DDR_A_DM0
DDR_A_DQS[0..7]
DDR_A_D6
DDR_A_D7
DDR_A_DQS[0..7] <5>
DDR_A_MA[0..15]
DDR_A_MA[0..15] <5>
DDR_A_DQS#[0..7]
DDR_A_D12
DDR_A_D13
B: RP4 swap for Express Card.
DDR_CKE0_DIMMA
DDR_CS2_DIMMA#
DDR_A_BS#2
DDR_A_DQS#[0..7] <5>
DDR_A_DM1
DDR_A_CLK1 <5>
DDR_A_CLK#1 <5>
DDR_A_D14
DDR_A_D15
+DIMM_VREF
1
DDR_A_D20
DDR_A_D21
2
DDR_A_DM2
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
1
2
DDR_A_MA4
DDR_A_MA0
DDR_A_BS#1
DDR_CS0_DIMMA#
+1.8V
B: RP3 swap for Express Card.
R148
1K_0402_1%
R132
1K_0402_1%
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
DDR_A_MA10
DDR_A_BS#0
DDR_A_D30
DDR_A_D31
DDR_CKE1_DIMMA
DDR_CKE1_DIMMA <5>
DDR_A_MA15
DDR_A_MA14
DDR_CS3_DIMMA#
DDR_A_ODT0
DDR_A_MA13
DDR_A_RAS#
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_MA14
DDR_A_MA15
DDR_CKE1_DIMMA
DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#
DDR_A_ODT0
DDR_A_MA13
DDR_A_BS#1 <5>
DDR_A_RAS# <5>
DDR_CS0_DIMMA# <5>
1
C238
1
C204
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C290
1
C655
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C274
1
C654
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C196
1
C244
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C254
1
C199
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
2
3
4
1
C232
1
C213
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
47_0804_8P4R_5%
RP5
8
1
7
2
6
3
5
4
1
C185
1
C218
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
47_0804_8P4R_5%
RP8
8
1
7
2
6
3
5
4
1
C293
1
C258
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
47_0804_8P4R_5%
RP4
8
1
7
2
6
3
5
4
47_0804_8P4R_5%
RP7
8
1
7
2
6
3
5
4
47_0804_8P4R_5%
RP3
8
1
7
2
6
3
5
4
47_0804_8P4R_5%
RP21
8
1
7
2
6
3
5
4
D
8
7
6
5
C
47_0804_8P4R_5%
DDR_A_ODT0 <5>
DDR_CS3_DIMMA#
DDR_CS3_DIMMA# <5>
DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
B
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_CLK2 <5>
DDR_A_CLK#2 <5>
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
R121 2
R123 2
A
1 0_0402_5%
1 0_0402_5%
Compal Secret Data
2007/5/4
Issued Date
4
1
2
3
4
RP20
Deciphered Date
2008/5/4
3
Title
DDRII SO-DIMM 0
5
8
7
6
5
C: RP20 swap for DDR Shielding\. 47_0804_8P4R_5%
DDR_A_CAS#
DDR_A_WE#
DDR_CS1_DIMMA#
DDR_A_ODT1
2
DDR_A_MA2
DDR_A_MA11
DDR_A_MA6
DDR_A_MA7
DDR_A_D[0..63] <5>
2
D
+1.8V
RP6
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
1
DDR_A_D8
DDR_A_D9
1
+0.9V
2
DDR_A_D2
DDR_A_D3
2
1
DDR_A_DQS#0
DDR_A_DQS0
3
+1.8V
C249
0.1U_0402_16V4Z
DDR_A_D0
DDR_A_D1
+DIMM_VREFJP31
1 VREF
3 VSS
5 DQ0
7 DQ1
9 VSS
11 DQS0#
13 DQS0
15 VSS
17 DQ2
19 DQ3
21 VSS
23 DQ8
25 DQ9
27 VSS
29 DQS1#
31 DQS1
33 VSS
35 DQ10
37 DQ11
39 VSS
C243
1000P_0402_25V8J
+1.8V
2
Date:
Rev
1A
LA3631P
Sheet
1
8
of
45
5
4
+DIMM_VREF
3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
D
C203
1000P_0402_25V8J
DDR_B_D0
DDR_B_D1
2
1
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
RP23
DDR_B_D[0..63]
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
+1.8V
+0.9V
+1.8V
JP33
1
2
+1.8V
DDR_B_D4
DDR_B_D5
DDR_B_DM[0..7]
DDR_B_DM0
DDR_B_DQS[0..7]
DDR_B_D6
DDR_B_D7
DDR_B_MA[0..15]
DDR_B_DQS#[0..7]
DDR_B_D12
DDR_B_D13
DDR_B_RAS#
DDR_B_BS#1
DDR_B_MA0
DDR_B_MA2
DDR_B_D[0..63] <5>
DDR_B_DM[0..7] <5>
DDR_B_DQS[0..7] <5>
8
7
6
5
1
2
3
4
2
C246
1
C245
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C261
1
C267
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C257
1
C268
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C277
1
C695
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C222
1
C241
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C229
1
C273
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C658
1
C256
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C215
1
C235
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
47_0804_8P4R_5%
DDR_B_MA[0..15] <5>
RP13
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_DQS#[0..7] <5>
8
7
6
5
DDR_B_DM1
1
2
3
4
D
47_0804_8P4R_5%
DDR_B_CLK1 <5>
DDR_B_CLK#1 <5>
RP10
DDR_B_D14
DDR_B_D15
DDR_CS2_DIMMB#
DDR_B_BS#2
DDR_CKE0_DIMMB
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_DM3
DDR_B_D26
DDR_B_D27
C
DDR_CKE0_DIMMB
<5> DDR_CKE0_DIMMB
DDR_CS2_DIMMB#
DDR_B_BS#2
<5> DDR_CS2_DIMMB#
<5> DDR_B_BS#2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#
<5> DDR_B_BS#0
<5> DDR_B_WE#
DDR_B_CAS#
DDR_CS1_DIMMB#
<5> DDR_B_CAS#
<5> DDR_CS1_DIMMB#
DDR_B_ODT1
<5> DDR_B_ODT1
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
B
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_DM7
DDR_B_D58
DDR_B_D59
A
<8,13,17,24,28> SMB_CK_DAT0
<8,13,17,24,28> SMB_CK_CLK0
+3VS
C207
0.1U_0402_16V4Z
1
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
QTC_C111A-052SP31
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDR_B_D20
DDR_B_D21
RP9
DDR_B_MA5
DDR_B_MA8
DDR_B_MA9
DDR_B_MA12
DDR_B_DM2
DDR_B_D22
DDR_B_D23
RP11
DDR_B_D28
DDR_B_D29
DDR_B_MA3
DDR_B_MA1
DDR_B_MA10
DDR_B_BS#0
DDR_B_DQS#3
DDR_B_DQS3
4
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
DDR_B_D30
DDR_B_D31
DDR_CKE1_DIMMB
RP12
DDR_B_WE#
DDR_B_CAS#
DDR_CS1_DIMMB#
DDR_B_ODT1
DDR_CKE1_DIMMB <5>
DDR_B_MA15
DDR_B_MA14
8
7
6
5
1
2
3
4
C
47_0804_8P4R_5%
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
RP22
DDR_CS3_DIMMB#
DDR_B_MA13
DDR_B_ODT0
DDR_CS0_DIMMB#
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
DDR_B_BS#1
DDR_B_RAS#
DDR_CS0_DIMMB#
DDR_B_ODT0
DDR_B_MA13
DDR_CS3_DIMMB#
DDR_B_BS#1 <5>
DDR_B_RAS# <5>
DDR_CS0_DIMMB# <5>
RP14
DDR_CKE1_DIMMB
DDR_B_MA15
DDR_B_MA14
DDR_B_ODT0 <5>
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
DDR_CS3_DIMMB# <5>
DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D38
DDR_B_D39
B
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_CLK2 <5>
DDR_B_CLK#2 <5>
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
R423 1
2
R427
+3VS
A
2 4.7K_0402_5%
1
0_0402_5%
Compal Secret Data
2007/5/4
Deciphered Date
2008/5/4
3
Title
DDRII SO-DIMM 1
5
1
2
3
4
47_0804_8P4R_5%
Issued Date
2
8
7
6
5
2
Date:
Rev
1A
LA3631P
Sheet
1
9
of
45
5
4
<15> PCIE_GTX_C_MRX_P[0..15]
<15> PCIE_GTX_C_MRX_N[0..15]
3
2
PCIE_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_N[0..15]
1
PCIE_MTX_C_GRX_P[0..15] <15>
PCIE_MTX_C_GRX_N[0..15] <15>
U5B
C
<25> PCIE_MRX_C_LANTX_P2
<25> PCIE_MRX_C_LANTX_N2
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
Y7
AA7
GPP_RX2P
GPP_RX2N
PART 2 OF 5
<24> PCIE_MRX_C_WLANTX_P3
<24> PCIE_MRX_C_WLANTX_N3
AB9
AA9
GPP_RX3P
GPP_RX3N
<16> SB_RX2P
<16> SB_RX2N
W11
W12
GPP_RX0P(SB_RX2P)
GPP_RX0N(SB_RX2N)
PCIE I/F GPP
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
J1
H2
K2
K1
K3
L3
L1
L2
N2
N1
P2
P1
P3
R3
R1
R2
T2
U1
V2
V1
V3
W3
W1
W2
Y2
AA1
AA2
AB2
AB1
AC1
AE3
AE4
PCIE_MTX_GRX_P15
PCIE_MTX_GRX_N15
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_N0
C97
1
C95
1
C91
1
C89
1
C84
1
C82
1
C80
1
C78
1
C76
1
C73
1
C71
1
C64
1
C60
1
C56
1
C45
1
GPP_TX2P
GPP_TX2N
AD4 PCIE_MTX_LANRX_P2
AE5 PCIE_MTX_LANRX_N2
C53
C52
GPP_TX3P
GPP_TX3N
AD5 PCIE_MTX_WLANRX_P3
AD6 PCIE_MTX_WLANRX_N3
C44
C43
GPP_TX0P(SB_TX2P)
GPP_TX0N(SB_TX2N)
AD8
AE8
SB_TX2P_C
SB_TX2N_C
C48
C49
C99 1
2VGA@ 0.1U_0402_16V7K
C98 1
2VGA@ 0.1U_0402_16V7K
C96 1
VGA@
0.1U_0402_16V7K
2
C94 1
2VGA@ 0.1U_0402_16V7K
C90 1
VGA@
0.1U_0402_16V7K
2
C88 1
2VGA@ 0.1U_0402_16V7K
C83 1
VGA@
0.1U_0402_16V7K
2
C81 1
2VGA@ 0.1U_0402_16V7K
C79 1
2VGA@ 0.1U_0402_16V7K
C77 1
2VGA@ 0.1U_0402_16V7K
C74 1
2VGA@ 0.1U_0402_16V7K
C72 1
2VGA@ 0.1U_0402_16V7K
C68 1
2VGA@ 0.1U_0402_16V7K
C63 1
2VGA@ 0.1U_0402_16V7K
C59 1
2VGA@ 0.1U_0402_16V7K
C46 1
2VGA@ 0.1U_0402_16V7K
C100 1
1
1
1
2
1
1
1
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
2VGA@ 0.1U_0402_16V7K
0.1U_0402_16V7K
2 0.1U_0402_16V7K
D
PCIE_MTX_C_LANRX_P2 <25>
PCIE_MTX_C_LANRX_N2 <25>
2 WLAN@ 0.1U_0402_16V7K
2 WLAN@ 0.1U_0402_16V7K
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
C
PCIE_MTX_C_WLANRX_P3 <24>
PCIE_MTX_C_WLANRX_N3 <24>
SB_TX2P <16>
SB_TX2N <16>
<4> H_CADOP[0..15]
<16> SB_RX3P
<16> SB_RX3N
AA11
AB11
GPP_RX1P(SB_RX3P)
GPP_RX1N(SB_RX3N)
<16> SB_RX0P
<16> SB_RX0N
W14
W15
SB_RX0P
SB_RX0N
<16> SB_RX1P
<16> SB_RX1N
AB12
AA12
SB_RX1P
SB_RX1N
AA14
AB14
GPP_TX1P(SB_TX3P)
GPP_TX1N(SB_TX3N)
PCIE I/F SB
PCE_ISET(NC)
PCE_TXISET(NC)
AD7
AE7
SB_TX3P_C
SB_TX3N_C
C51
C50
1
1
SB_TX0P
SB_TX0N
AE9
AD10
SB_TX0P_C
SB_TX0N_C
C40
C39
1
1
SB_TX1P
SB_TX1N
AC8
AD9
SB_TX1P_C
SB_TX1N_C
C42
C41
1
1
PCE_PCAL(PCE_CALRP)
PCE_NCAL(PCE_CALRN)
AD11
AE11
R22
R23
1
1
2
2
<4> H_CADON[0..15]
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
SB_TX3P <16>
SB_TX3N <16>
R19
R18
R21
R22
U22
U21
U18
U19
W19
W20
AC21
AB22
AB20
AA20
AA19
Y19
H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADOP3
H_CADON3
H_CADOP2
H_CADON2
H_CADOP1
H_CADON1
H_CADOP0
H_CADON0
T24
R25
U25
U24
V23
U23
V24
V25
AA25
AA24
AB23
AA23
AB24
AB25
AC24
AC25
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD0P
HT_RXCAD0N
<4> H_CLKOP1
<4> H_CLKON1
W21
W22
HT_RXCLK1P
HT_RXCLK1N
<4> H_CLKOP0
<4> H_CLKON0
Y24
W25
SB_TX0P <16>
SB_TX0N <16>
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
SB_TX1P <16>
SB_TX1N <16>
562_0402_1%
2K_0402_1%
+VDDA12_PKG2
VGAR1@216MQA6AVA11FG_FCBGA465_RS690M
B
C1445 Near H_CADOP/N[2..4] and
H_CLKOP/N0 near NB TOP Side
C70
C69
1
2
@ 0.01U_0402_25V4Z
1
2
@ 0.01U_0402_25V4Z
C1446 Near H_CADOP/N[5..7] and
H_CTLOP/N0 near NB TOP Side
GND1
GND2
For IALAA Only-Change Layer Bridge for HOST3 CADOP/N[0..7]
<4> H_CTLOP0
<4> H_CTLON0
A
+VDDHT_PKG
R46
R40
H_CADIP[0..15]
H_CADIN[0..15]
H_CADIP[0..15] <4>
H_CADIN[0..15] <4>
U5A
H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADOP10
H_CADON10
H_CADOP9
H_CADON9
H_CADOP8
H_CADON8
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
H_CADOP[0..15]
H_CADON[0..15]
1
1
H_CTLOP0
H_CTLON0
P24
P25
2 49.9_0402_1%
2 49.9_0402_1%
A24
C24
HT_RXCAD15P
HT_RXCAD15N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD8P
HT_RXCAD8N
HT_RXCLK0P
HT_RXCLK0N
HT_RXCTLP
HT_RXCTLN
HT_RXCALP
HT_RXCALN
PART 1 OF 5
HYPER TRANSPORT I/F
D
G5
G4
J8
J7
J4
J5
L8
L7
L4
L5
M8
M7
M4
M5
P8
P7
P4
P5
R4
R5
R7
R8
U4
U5
W4
W5
Y4
Y5
V9
W9
AB7
AB6
PCIE GFX I/F
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0
HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N
P21
P22
P18
P19
M22
M21
M18
M19
L18
L19
G22
G21
J20
J21
F21
F22
H_CADIP15
H_CADIN15
H_CADIP14
H_CADIN14
H_CADIP13
H_CADIN13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N
N24
N25
L25
M24
K25
K24
J23
K23
G25
H24
F25
F24
E23
F23
E24
E25
H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0
HT_TXCLK1P
HT_TXCLK1N
L21
L22
H_CLKIP1 <4>
H_CLKIN1 <4>
HT_TXCLK0P
HT_TXCLK0N
J24
J25
H_CLKIP0 <4>
H_CLKIN0 <4>
HT_TXCTLP
HT_TXCTLN
N23 H_CTLIP0
P23 H_CTLIN0
HT_TXCALP
HT_TXCALN
C25 R39
D24
1
B
H_CTLIP0 <4>
H_CTLIN0 <4>
2 100_0402_1%
A
Compal Secret Data
2007/5/4
Issued Date
Deciphered Date
2008/5/4
5
4
3
Title
RX690/RS690MC HT/VMEM
2
Custom
Date:
Sheet
1
10
of
45
Rev
1A
+1.8VS
L11
+AVDD
1
2
FBM-L11-201209-300LMA30T_0805
1
C108
0.1U_0402_16V4Z
C114
2.2U_0603_6.3V4Z
PLLVDD18=625mA
1
2
2
<14> UMA_CRT_R
<14> UMA_CRT_G
<14> UMA_CRT_B
<14> UMA_CRT_VSYNC
<14> UMA_CRT_HSYNC
C522
1U_0402_6.3V4Z
GND to B10
R58
+3VS
UMA_CRT_SCL
2
HDMI@ 24K_0402_5%
UMA_CRT_SDA
1
2
R61 HDMI@ 24K_0402_5%
R68
1
+1.8VS
1
C514
@ 10U_0805_10V4Z
1
2
2
HTPVDD=200mA
C520
1U_0402_6.3V4Z
1
C117
2.2U_0603_6.3V4Z
1
2
2
+3VS
R70
1
C10
C11
C5
B5
SYSRESET#
POWERGOOD
LDTSTOP#
ALLOW_LDTSTOP
2
1 10K_0402_5% C23
B23
HTTSTCLK
HTREFCLK
1 10K_0402_5%
TVCLKIN
OSCIN
OSCOUT(PLLVDD12)
F2
E1
GFX_CLKP
GFX_CLKN
<13> SBLINKCLK
<13> SBLINKCLK#
G1
G2
SB_CLKP
SB_CLKN
D6
D7
C8
C7
B8
A8
DFT_GPIO0
DFT_GPIO1
DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5
2
2
2
2
2
2
1
1
1
1
1
1
@ 3K_0402_5%
@ 3K_0402_5%
@ 3K_0402_5%
@ 3K_0402_5%
@ 3K_0402_5%
@ 3K_0402_5%
<16> BMREQ#
<15> UMA_LCD_CLK
<15> UMA_LCD_DAT
+3VS
R71
R72
DFT_GPIO0
DFT_GPIO1
DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5
UMA_LCD_CLK
UMA_LCD_DAT
1 @ 4.7K_0402_5%
2 4.7K_0402_5%
NB_STRAP_DATA
2
1
NB_STRAP_DATA
2
10K_0402_5%
2
@ 10K_0402_5%
B
2 1
B2
A2
B4
AA15
AB15
C14
B3
C3
A3
BMREQ#
I2C_CLK
I2C_DATA
THERMALDIODE_P
THERMALDIODE_N
UMA_TZOUT0+
UMA_TZOUT0UMA_TZOUT1+
UMA_TZOUT1UMA_TZOUT2+
UMA_TZOUT2-
TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN
E15
D15
H15
G15
LPVDD
LPVSS
D14
E14
+LPVDD
LVDDR18D_1
LVDDR18D_2
LVDDR18A_1(LVDDR33_1)
LVDDR18A_2(LVDDR33_2)
A12
B12
C12
C13
+LVDDR18D
LVSSR1
LVSSR3
LVSSR5
LVSSR6
LVSSR7
LVSSR8
A16
A14
D12
C19
C15
C16
LVSSR12
LVSSR13
F14
F15
L14
+LVDDR18D
LVDS_DIGON
LVDS_BLON
LVDS_BLEN
DVO_D0(GPP_TX0P)
DVO_D1(GPP_TX0N)
DVO_D2(DEBUG6)
DVO_D3(GPP_RX0P)
DVO_D4(GPP_RX0N)
DVO_D5(DEBUG9)
DVO_D6(DEBUG10)
DVO_D7(GPP_TX1N)
DVO_D8(GPP_TX1P)
DVO_D9(GPP_RX1N)
DVO_D10(GPP_RX1P)
DVO_D11(DEBUG15)
DVO_VSYNC(DEBUG0)
DVO_DE(DEBUG2)
DVO_HSYNC(DEBUG1)
DVO_IDCKP(DEBUG14)
DVO_IDCKN(DEBUG13)
1
1
C109
0.1U_0402_16V4Z
<15>
<15>
<15>
<15>
<15>
<15>
+1.8VS
2
2
C116
2.2U_0603_6.3V4Z
MBC1608121YZF_0603
L54
+LVDDR33A
LVDDR33=180mA
C505
0.1U_0402_16V4Z
UMA_TXCLK+ <15>
UMA_TXCLK- <15>
UMA_TZCLK+ <15>
UMA_TZCLK- <15>
1
1
2
+3VS
1
2
2
C537
4.7U_0805_10V4Z
GND to C15
+3VS C499
0.1U_0402_16V4Z
+LVDDR33A
LVDS_ENBKL
2
2K_0402_5%
1
R488
UMA@
LVDS_ENVDD
LVDS_ENBKL
1
A
2
B
4
LVDS_ENVDD 5
2
2K_0402_5%
A
3
UMA_ENBKL <30>
U20B
O
B
U20A
O
+3VS
MP:Add R488 and
NB_PWRGD
R489 for LCD
flash issue
E12
G12
F12
2
1
GND to A14, D12
1
R489
TMDS_HPD
DDC_DATA
TESTMODE
STRP_DATA
DFT_GPIO0
+3VS
Q12
A15
B16
C17
C18
B17
A17
A18
B18
GND to E14
<15>
<15>
<15>
<15>
<15>
<15>
6
UMA_ENVDD <15>
UMA@
C:Set to DVD@
1
2
AD14 PCIE_MTX_DVDRX_P0 C409
1
2
AD15 PCIE_MTX_DVDRX_N0 C414
AE15
AD16
PCIE_MRX_C_DVDTX_P0
AE16
PCIE_MRX_C_DVDTX_N0
AC17
AD18
C62
1
AE19 PCIE_MTX_NEWRX_N1
C61
1
AD19 PCIE_MTX_NEWRX_P1
AE20
PCIE_MRX_C_NEWTX_N1
AD20
PCIE_MRX_C_NEWTX_P1
AE21
DVD@
DVD@
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_MTX_C_DVDRX_P0 <24>
PCIE_MTX_C_DVDRX_N0 <24>
<24>
<24>
2 NEW@
2 NEW@
<28>
<28>
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_MTX_C_NEWRX_N1 <28>
PCIE_MTX_C_NEWRX_P1 <28>
AD13
AC13
AE13
AE17
AD17
+1.8VS
POWER PLAY HI: 1.2V
LOW: 1.0V
Won't Support in IALAA
E
3
1
MMBT3904_SOT23-3
PULL HIGH
(internally
pulled high)
RS690
DFT_GPIO1
Memor y
side port
not available
Bypass the loading
of EEPROM straps
and us e Hardware
default values
DEFAULT
NB_LDTSTOP#
DEFAULT
C
<6,16> LDT_STOP#
C2
B11
A11
2
R63
1
UMA_LCD_CLK
1
UMA@ 4.7K_0402_5%
UMA_LCD_DAT
1
UMA@ 4.7K_0402_5%
HTPVDD
HTPVSS
<13> GFX_PCIE
<13> GFX_PCIE#
C110
1U_0402_6.3V4Z
C:Set to UMA@
2
R64
2
R62
DACSCL
DACSDA
B24
B25
NB_PWRGD
NB_LDTSTOP#
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
RSET
+NB_HTPVDD
R65
R298
R301
R59
R67
R60
R66
RED
GREEN
BLUE
DACVSYNC
DACHSYNC
PLLVDD(PLLVDD18)
PLLVSS
<13> NB_REFCLK
+PLLVDD12
PLLVDD12=70mA
B6
A6
C
Y
COMP
A10
B10
R45 2
<13> HTREFCLK
+PLLVDD12
B21
AVDDQ
AVSSQ
+NB_PLLVDD
<16> ALLOW_LDTSTOP
L15
1
2
MBC1608121YZF_0603
UMA_CRT_SCL
UMA_CRT_SDA
<15,17,24,25,28,30,34> NB_RST#
<30> NB_PWRGD
GND to B25
+1.2V_HT
2 715_0402_1%
1
<14> UMA_CRT_SCL
<14> UMA_CRT_SDA
+NB_HTPVDD
L52
1
2
MBC1608121YZF_0603
UMA_TV_CRMA C21
UMA_TV_LUMA C20
2 UMA_TV_COMPS D19
@ 75_0402_1%
UMA_CRT_R
E19
UMA_CRT_G
F19
UMA_CRT_B
G19
C6
A5
<14> UMA_TV_CRMA
<14> UMA_TV_LUMA
1
R300
L13
1
2
MBK2012221YZF 0805 1
+AVDDQ
UMA_TXOUT0+
UMA_TXOUT0UMA_TXOUT1+
UMA_TXOUT1UMA_TXOUT2+
UMA_TXOUT2-
14
+NB_PLLVDD
B14
B15
B13
A13
H14
G14
D17
E17
P
+1.8VS
A21
A22
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
G
GND to A22
+1.8VS
PART 3 OF 5
7
C523
1U_0402_6.3V4Z
AVDD1
AVDD2
AVSSN1
AVSSN2
AVDDDI
AVSSDI
14
2
MBC1608121YZF_0603
B22
C22
G17
H17
A20
B20
P
2
AVDDQ=200mA
2
G
1
R69
1K_0402_5%
2
1
C113
2.2U_0603_6.3V4Z
1
2
U5C
R79
10K_0402_5%
L12
1
2
MBC1608121YZF_0603
1
2UMA_TV_CRMA
R317
150_0402_1%
1
2UMA_TV_LUMA
R316
150_0402_1%
1
2 UMA_CRT_R
R299
UMA@ 150_0402_1%
1
2 UMA_CRT_G
R297
UMA@ 150_0402_1%
1
2 UMA_CRT_B
R295
UMA@ 150_0402_1%
C115
2.2U_0603_6.3V4Z
+1.8VS
C513
2.2U_0603_6.3V4Z
7
+AVDDQ
2
C504
0.1U_0402_16V4Z
LVTM
+1.8VS
2
1
CRT/TVOUT
GND to B20
1
PLL PWR
2
L50
1
2
1 MBC1608121YZF_0603
+LPVDD
AVDD=100mA
PM
C519
2.2U_0603_6.3V4Z
CLOCKs
2
+3VS
AVDDI=250mA
1
MIS.
DVO
1
C515
0.1U_0402_16V4Z
PULL
LOW
Memor y
side port
available
RS690 only
DFT_GPIO5
These pin straps are used to configure PCI-E GPP mode:
Enable debug bus via the memory
IO pads, if available in the package
111: register defined (register default to Config E) DEFAULT
110: 4-0-0-0-0 Config A
101: 4-4 Config B
100: 4-2-2 Config C
011: 4-2-1-1 Config D
010: 4-1-1-1-1 Config E
others: register defined (register default to Config E)
use default values DEFAULT
use the memory data b us
to ou tput the debug bus
Compal Secret Data
Issued Date
I2C Master can
load strap values
from EEPROM if
conne cted, or use
default values if
not c onnected
DFT_GPIO[4:2]
2007/5/4
Deciphered Date
2008/5/4
Title
RX690/RS690MC VIDEO_IF/CLOCK GEN
Custom
Date:
Sheet
11
of
45
Rev
1A
5
4
3
2
1
+1.2V_HT
1
@ 330U_D2E_2.5VM
L43
C54
10U_0805_10V4Z
C430
2
2
1
1U_0402_6.3V4Z
1
1U_0402_6.3V4Z
1
1U_0402_6.3V4Z
D22
M1
AC11
+VDDHT_PKG
+VDDA12_PKG1
+VDDA12_PKG2
VDDHT_PKG
VDDA12_PKG1
VDDA12_PKG2
C530
2
C529
C446
10U_0805_10V4Z
C433
10U_0805_10V4Z
+1.8VS
VDDA12(VDDPLL_1)
VDDA12(VDDPLL_2)
VSSA12(VSSPLL_1)
VSSA12(VSSPLL_2)
C502
E7
F7
F9
G9
C474
+NB_VDDPLL
VDD_DVO1(VDDR_1)
VDD_DVO2(VDDR_2)
VDD_DVO3(VDDR_3)
+NB_VDDC
VDD_CORE=5A
0.1U_0402_16V4Z
2
2
2.2U_0603_6.3V4Z
1
0.1U_0402_16V4Z
L41 1
2
FBMA-L11-201209-221LMA30T_0805
L44 1
2
FBMA-L11-201209-221LMA30T_0805
+1.2V_HT
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
C424
C498
VDDR3_1
VDDR3_2
AC12
AD12
AE12
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+
2
330U_D2E_2.5VM
C511
1
D11
E11
VDDR3=70mA
2
2
2
2
2
2
C479
+3VS
C
VDDA18_1(VDDA12_13)
VDDA18_2(VDDA12_14)
VDDA18_3(VDDA12_15)
VDDA18_4(VDDA12_16)
VDDA18_5(VDDA12_17)
VDDA18_6(VDDA12_18)
VDDA18_7(VDDA12_19)
VDDA18_8(VDDA12_20)
A4
A7
A9
A19
B9
B19
C9
D9
D20
G20
H11
J11
J19
L11
L13
L15
L17
M12
M14
N11
N13
N15
P12
P14
P17
R11
R13
R15
U11
U12
U14
U15
1
1
1
1
1
1
0.1U_0402_16V4Z
2
2
2
2
+VDDA12
C500
C441
C453
C512
C506
C463
C471
1
1
1
1
+VDDA12
VDDA_12=2.5A
10U_0805_10V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VDD18_1
VDD18_2
AB3
AB4
AC3
AD2
AE1
AE2
U7
W7
10U_0805_10V4Z
0.1U_0402_16V4Z
C448
C493
C470
C490
C486
J14
J15
VDD_18=2mA
C521
C485
L45
2
1
FBMA-L11-201209-221LMA30T_0805
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
10U_0805_10V4Z
0.1U_0402_16V4Z
2 1U_0402_6.3V4Z
2 1U_0402_6.3V4Z
10U_0805_10V4Z
C58
C483
+1.2V_HT
1
1
C447
0.1U_0402_16V4Z
C492
C489
VDDA12_1
VDDA12_2
VDDA12_3
VDDA12_4
VDDA12_5
VDDA12_6
VDDA12_7
VDDA12_8
VDDA12_9
VDDA12_10
VDDA12_11
VDDA12_12
C480
+1.8VS
VDD_HT2
VDD_HT3
VDD_HT4
VDD_HT5
VDD_HT6
VDD_HT7
VDD_HT8
VDD_HT9
VDD_HT10
VDD_HT11
VDD_HT12
VDD_HT13
VDD_HT14
VDD_HT15
0.1U_0402_16V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C491
2
2
2
2
2
0.1U_0402_16V4Z
1
1
1
1
1
+VDDA12
C510
C442
C456
C465
C445
C432
B1
C1
D1
D2
D3
E2
E3
F4
E6
G7
L9
M9
0.1U_0402_16V4Z
VDD_HT(I/O only)=800mA
D
VDD_HT1 PART 4 OF 5
0.1U_0402_16V4Z
AA17
AB17
AB19
AC18
AC19
AC20
AD21
AD22
AD23
AD24
AE23
AE24
AE25
W17
Y17
1
2
+1.2V_HT
FBMA-L11-201209-221LMA30T_0805
VDDA_12=2.5A
U5D
10U_0805_10V4Z
POWER
C55
+1.2V_HT
L49
1
2
MBC1608121YZF_0603
C516
4.7U_0805_10V4Z
+NB_VDDPLL
1
2
2
1
VDDPLL=50mA
C501
1U_0402_6.3V4Z
GND to F9, G9.
+VDDA12_PKG1
1
2
C484
4.7U_0805_10V4Z
B
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
L24
P13
P20
P15
R12
R14
R20
W23
Y25
AD25
U20
H25
W24
Y22
AC23
D25
G24
AC14
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
AC22
R23
C4
AE22
T23
T25
AE14
R17
H23
M17
A23
AC15
F17
D4
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
M13
AC16
H12
B7
VSS59
VSS60
VSS61
VSS62
PAR 5 OF 5
GROUND
2
+
C57
U5E
A25
F11
D23
E9
G11
Y23
P11
R24
AE18
M15
J22
G23
J12
L12
L14
L20
L23
M11
M20
M23
M25
N12
N14
VSSA2
VSSA3
VSSA4
VSSA5
VSSA6
VSSA7
VSSA8
VSSA9
VSSA10
VSSA11
V12
V11
V14
F3
V15
A1
H1
G3
J2
H3
VSSA13
J6
VSSA15
VSSA16
VSSA17
VSSA18
VSSA19
VSSA20
VSSA21
VSSA22
F1
L6
M2
M6
J3
P6
T1
N3
VSSA24
VSSA25
VSSA26
VSSA27
VSSA28
R6
U2
T3
U3
U6
VSSA30
Y1
VSSA32
VSSA33
VSSA34
VSSA35
VSSA36
VSSA93
VSSA94
VSSA95
VSSA37
VSSA38
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45
VSSA46
VSSA47
VSSA48
VSSA49
VSSA50
VSSA51
W6
AC2
Y3
Y9
Y11
Y12
Y14
AA3
R9
AD1
AC5
AC6
AC7
AD3
AC9
AC10
G6
Y15
AC4
P9
AE6
AE10
M3
D
C
B
A
A
Compal Secret Data
2007/5/4
Issued Date
Deciphered Date
2008/5/4
5
4
3
Title
RX690/RS690MC Power/GND
2
Custom
Date:
Sheet
1
12
of
45
Rev
1A
B
C
0.1U_0402_16V4Z
L56
1
C590
2
2
1
1
C595
2
1
C593
2
1
C170
2
1
C636
2
1
C167
2
1
C594
2
1
1
C171
2
2
+3VS_CLK_VDDA
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z 0.1U_0402_16V4Z
C596
0.1U_0402_16V4Z
2
1
2
2
1
@
CPUCLK0_H <6>
U25
1
2
MBC1608121YZF_0603
+3VS_CLK_VDDREF
1
C599
2.2U_0603_6.3V4Z
2
2
1
+3VS_CLK_VDD48
C597
0.1U_0402_16V4Z
+3VS_CLK_VDDREF
VDD_REF=50mA
1
2
2 CLK_RESET
10K_0402_5%
VDDCPU
VDDSRC
VDDSRC
VDDSRC
VDDSRC
VDD48
VDDATIG
VDDREF
VDDHTT
53
15
22
29
45
8
38
1
58
GNDCPU
GNDSRC
GNDSRC
GNDSRC
GNDSRC
GND48
GNDATIG
GNDREF
GNDHTT
XTALIN_CLK
3
X1
XTALOUT_CLK
4
X2
R390
@ 1M_0402_5%
CLK_RESET
1
1
R378
Y3
2
+3VS_CLK
2
C603
33P_0402_50V8J
1
2
54
14
23
28
44
5
39
2
60
1
2
14.31818MHZ_20P_6X1430004201
C631
33P_0402_50V8J
<8,9,17,24,28> SMB_CK_CLK0
<8,9,17,24,28> SMB_CK_DAT0
1
R394
CLKIREF
2
475_0402_1%
11
61
RESET_IN#
NC
9
10
SMBCLK
SMBDAT
48
IREF
PLACE CLOSE TO U62
WITHIN 0.5 INCH
R101
261_0402_1%
VDDA
GNDA
50
49
CPUCLK8T0
CPUCLK8C0
CPUCLK8T1
CPUCLK8C1
56
55
52
51
CPUCLK0
CPUCLK0#
SRCCLKT6
SRCCLKC6
ATIGCLKT0
ATIGCLKC0
ATIGCLKT1
ATIGCLKC1
ATIGCLKT2
ATIGCLKC2
ATIGCLKT3
ATIGCLKC3
SRCCLKT5
SRCCLKC5
SRCCLKT4
SRCCLKC4
SRCCLKT3
SRCCLKC3
SRCCLKT2
SRCCLKC2
SRCCLKT0
SRCCLKC0
SRCCLKT1
SRCCLKC1
SRCCLKT7
SRCCLKC7
16
17
41
40
37
36
35
34
30
31
18
19
20
21
24
25
26
27
47
46
43
42
12
13
SBLINKCLK_R
SBLINKCLK#_R
GFX_PCIE_R
GFX_PCIE_R#
CLKREQA#
CLKREQB#
CLKREQC#
57
32
33
CLKREQ_WLAN#
CLKREQ_DVD#
CLKREQ_NEW#
48MHz_1
48MHz_0
7
6
CLK_CB
CLK_USB
R369
R379
1
1
2 FBMA-11-100505-900T
2 33_0402_5%
FS1/REF1
FS0/REF0
FS2/REF2
HTTCLK0
63
64
62
59
FS1
FS0
FS2
CLK_HTREFCLK
R95
R94
R96
R97
1
1
2
1
2
2
1
2
R99 1
R100 1
2
+3VS_CLK
L58
+3VS
1
2
MBC1608121YZF_0603
1
1
C588
2.2U_0603_6.3V4Z
L17
10U_0805_10V4Z
2
H
+3VS
VDDA=50mA
0.1U_0402_16V4Z 0.1U_0402_16V4Z
@ 10U_0805_10V4Z
+3VS_CLK_VDD48
1
0.1U_0402_16V4Z
C179
10U_0805_10V4Z
C592
VDD_48=50mA
1
2
MBC1608121YZF_0603
G
+3VS_CLK
1
2
CHB2012U121_0805
+3VS
F
+3VS_CLK
VDD=500mA
to link "SM010007E00"
L57
1
E
C169
10U_0805_10V4Z
+3VSNeed
D
C168
0.1U_0402_16V4Z
A
2 47.5_0402_1%
2 47.5_0402_1%
CPUCLK0_L <6>
SBLINKCLK
R366
R365
R397
R396
1
1
1
1
2
2
2
2
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
SBLINKCLK
SBLINKCLK#
GFX_PCIE
GFX_PCIE#
SBSRCCLK_R
R360
SBSRCCLK_R# R359
CLK_PCIE_VGA_R R373
CLK_PCIE_VGA_R# R372
1
1
1
1
2
2
2
2
33_0402_5%
33_0402_5%
VGA@ 33_0402_5%
VGA@ 33_0402_5%
1
R356
1
R355
GFX_PCIE
1
R92
GFX_PCIE#
1
R93
SBLINKCLK <11>
SBLINKCLK# <11>
GFX_PCIE <11>
GFX_PCIE# <11>
SBLINKCLK#
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
SBSRCCLK
SBSRCCLK
SBSRCCLK#
CLK_PCIE_VGA
CLK_PCIE_VGA#
SBSRCCLK <16>
SBSRCCLK# <16>
CLK_PCIE_VGA <15>
CLK_PCIE_VGA# <15>
C:Set R377 and R376 with DVD@
CLK_DVD_R
CLK_DVD_R#
CLK_NEW_R
CLK_NEW_R#
CLK_PCIE_LAN_R
CLK_PCIE_LAN_R#
CLK_WLAN_R
CLK_WLAN_R#
R377
R376
R404
R403
R402
R401
R368
R367
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
DVD@ 33_0402_5% CLK_DVD
DVD@ 33_0402_5% CLK_DVD#
NEW@33_0402_5%
CLK_NEW
NEW@33_0402_5%
CLK_NEW#
33_0402_5%
CLK_PCIE_LAN
33_0402_5%
CLK_PCIE_LAN#
WLAN@ 33_0402_5% CLK_WLAN
WLAN@ 33_0402_5% CLK_WLAN#
CLKREQ_WLAN# <24>
CLKREQ_DVD# <24>
CLKREQ_NEW# <28>
CLK_DVD <24>
CLK_DVD# <24>
CLK_NEW <28>
CLK_NEW# <28>
CLK_PCIE_LAN <25>
CLK_PCIE_LAN# <25>
CLK_WLAN <24>
CLK_WLAN# <24>
MP:Chg. R369 from
33Ohm to 90Ohm Bead.
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
C:Set R370 and R371
with DVD@
CLK_48M_CB <22>
USBCLK_EXT <17>
1
R354
1
R353
CLK_PCIE_VGA 1
R352
CLK_PCIE_VGA# 1
R351
CLK_PCIE_LAN
1
R102
CLK_PCIE_LAN# 1
R103
CLK_NEW
1
R407
CLK_NEW#
1
R406
CLK_DVD
1
R371
CLK_DVD#
1
R370
CLK_WLAN
1
R362
CLK_WLAN#
1
R361
2
49.9_0402_1%
2
49.9_0402_1%
2 VGA@
49.9_0402_1%
2 VGA@
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2 NEW@
49.9_0402_1%
2 NEW@
49.9_0402_1%
2 DVD@
49.9_0402_1%
2 DVD@
49.9_0402_1%
2 WLAN@
49.9_0402_1%
2 WLAN@
49.9_0402_1%
SBSRCCLK#
2
CLK_14M_SIO <34>
SB_OSC_INT <17>
NB_REFCLK <11>
HTREFCLK <11>
HTREFCLK
ICS951462AGLFT_TSSOP64
HTREFCLK
+3VS
3
CLKREQ_WLAN#
+3VS_CLK
CLKREQ_DVD#
USB
COMMENT
0
0
0
Hi-Z
100.00
Hi-Z
48.00
Reserved
0
0
1
X
100.00 X/3
X/6
48.00
Reserved
0
1
0
180.00
100.00
60.00
30.00
48.00
Reserved
R106
2
1
2.2K_0402_5%
Hi-Z
PCI
R110
2
1
2.2K_0402_5%
HTT
R105
2
1
2.2K_0402_5%
SRCCLK
[2:1]
R109
2
1
2.2K_0402_5%
CPU
R104
2
1
2.2K_0402_5%
FS2 FS1 FS0
R108
2
1
2.2K_0402_5%
EXT CLK FREQUENCY SELECT TABLE(MHZ)
CLKREQ_NEW#
1
R398
1
R386
1
R395
1
R107
2
49.9_0402_1%
3
2
100K_0402_5%
2
100K_0402_5%
2
100K_0402_5%
FS0
FS1
FS2
0
1
1
220.00
100.00
36.56
73.12
48.00
Reserved
1
0
0
100.00
100.00
66.66
33.33
48.00
Reserved
1
0
1
133.33
100.00
66.66
33.33
48.00
Reserved
1
1
1
200.00
100.00
66.66
33.33
48.00
Normal ATHLON64 operation
@
@
@
4
4
Compal Secret Data
Issued Date
2007/5/4
Deciphered Date
2008/5/4
A
B
C
D
E
Title
Clock Generator
F
Custom
Date:
G
Sheet
13
of
H
45
Rev
1A
A
B
C
D
CRT CONNECTOR
E
JP24
MP:Update D29 to meet CRT.
+CRT_VCC
L6
1
2
FCM2012C-800_0805
UMA@
+5VS
+R_CRT_VCC
D29
2
L4
C21
CRT_B_L
1
2
1
C16
2
1
C13
2
C:EMI solution to add
C13,C16,C21 in BOM with
22P value.
+CRT_VCC
2
G
2
D
S
C38
@
470P_0402_50V8J
D_CRT_HSYNC
1
L40
2
UMA@ 10_0402_5%
H SYNC
D_CRT_VSYNC
1
L42
2
UMA@ 10_0402_5%
VSYNC
U17
UMA@
SN74AHCT1G125GW_SOT353-5
TV-OUT CONNECTOR
2
2
C24
@
2 470P_0402_50V8J
2
D5
@ DAN217_SC59
3
2
3
1
D4
@ DAN217_SC59
2
1
3
P
OE#
Y
1
C427
UMA@
1
3
2
4
A
3
2
G
CRT_VSYNC
C425
UMA@
5
1
2
UMA@
0.1U_0402_16V4Z
1
10P_0402_50V8J
3
U16
UMA@
+CRT_VCC
C:Chg. PN to SB770020010.
1
10K_0402_5%
UMA@
10P_0402_50V8J
4
Y
G
P
OE#
5
1
2
R282
1
<11> UMA_CRT_VSYNC
CRT_DDC_CLK
2N7002_SOT23-3
UMA@
A
1
C426
CRT_DDC_DAT
2N7002_SOT23-3
UMA@
Q5
1
3
R18
UMA@
19.1K_0402_1%
D
S
G
CRT_HSYNC 2
R21
UMA@
19.1K_0402_1%
Q4
1
3
<11> UMA_CRT_SCL
<11> UMA_CRT_HSYNC
A: Follow AMD command.
+3VS
+CRT_VCC
2
1
UMA@ ACES_85201-1205
<11> UMA_CRT_SDA
2
0.1U_0402_16V4Z
UMA@
2
1
L3
1
2
FCM2012C-800_0805
UMA@
B:As EMI request
L3,L4,L6 need to link
SM010009L00
1
C428
CRT_G_L
1
C422
1
2
1
2
3
4
5
6
7
8
9
10
11
12
CRT_B_L
22P_0402_50V8J
2
1
C37
UMA@
2
@ 0.1U_0402_16V4Z
22P_0402_50V8J
2
1
C25
UMA@
6P_0402_50V8K
1
C17
UMA@
6P_0402_50V8K
R16
UMA@
6P_0402_50V8K
R19
UMA@
2
1
150_0402_1%
R20
UMA@
2
1
150_0402_1%
<11> UMA_CRT_B
2
1
150_0402_1%
CRT_B
1
CRT_G_L
1
2
FCM2012C-800_0805
UMA@
1
F2
1
RB491D_SOT23 1A_6VDC_MINISMDC110
22P_0402_50V8J
CRT_G
<11> UMA_CRT_G
+CRT_VCC
CRT_DDC_CLK
CRT_DDC_DAT
VSYNC
H SYNC
CRT_R_L
2
<11> UMA_CRT_R
CRT_R_L
2
CRT_R
+3VS
2 C524
@ 22P_0402_50V8J
1
<15> VGA_TV_CRMA
<11> UMA_TV_CRMA
1
R288
1
R287
2
VGA@
2
UMA@
1
R290
1
R289
2
VGA@
2
UMA@
0_0402_5%
TV_LUMA
0_0402_5%
L51
TV_CRMA
0_0402_5%
0_0402_5%
L53
1
2
MBK1608121YZF_0603
1
2
MBK1608121YZF_0603
JP26
1
<11> UMA_TV_LUMA
1
1
<15> VGA_TV_LUMA
R310
150_0402_1%
2
1
C533
100P_0402_25V8K
2
2 C528
@ 22P_0402_50V8J
C517
100P_0402_25V8K
2
2
R307
150_0402_1%
1
TV_CRMA_L
TV_LUMA_L
1
4
3
2
1
1
C536
2
100P_0402_25V8K
C535
2
100P_0402_25V8K
4
3
2
1
ALLTO_C10877-104A1-L_4P
4
2007/5/4
Issued Date
Deciphered Date
2008/5/4
B
TV-OUT Conn.
1.
2.
3.
4.
Compal Secret Data
A
6
5
C
D
Title
Size
B
Date:
Y
C
Y
C
ground
ground
(luminance+sync)
(crominance)
4
TV-OUT, LVDS CONNECTOR
Document Number
Sheet
E
14
of
Rev
1A
45
PCEI_GTX_C_MRX_P13
PCEI_GTX_C_MRX_N13
PCEI_GTX_C_MRX_P12
PCEI_GTX_C_MRX_N12
PCEI_GTX_C_MRX_P11
PCEI_GTX_C_MRX_N11
C
PCEI_GTX_C_MRX_P10
PCEI_GTX_C_MRX_N10
PCEI_GTX_C_MRX_P9
PCEI_GTX_C_MRX_N9
PCEI_GTX_C_MRX_P8
PCEI_GTX_C_MRX_N8
PCEI_GTX_C_MRX_P7
PCEI_GTX_C_MRX_N7
PCEI_GTX_C_MRX_P6
PCEI_GTX_C_MRX_N6
PCEI_GTX_C_MRX_P5
PCEI_GTX_C_MRX_N5
PCEI_GTX_C_MRX_P4
PCEI_GTX_C_MRX_N4
PCEI_GTX_C_MRX_P3
PCEI_GTX_C_MRX_N3
PCEI_GTX_C_MRX_P2
PCEI_GTX_C_MRX_N2
PCEI_GTX_C_MRX_P1
PCEI_GTX_C_MRX_N1
B
PCEI_GTX_C_MRX_P0
PCEI_GTX_C_MRX_N0
<20> VGA_HPD
<20> VGA_DVI_SCLK
<20> VGA_DVI_SDATA
<20> VGA_DVI_TXD0<20> VGA_DVI_TXD0+
<20> VGA_DVI_TXC+
A:Delete
<20> VGA_DVI_TXCVGA_SMB_DAT/CLK
bec'z delete
HDMI/1932 fun..
<6,30> EC_SMB_CK2
<6,30> EC_SMB_DA2
+5VALW
+CRT_VCC
<26,28,30,35,38> SUSP#
A
<30> VGA_ENBKL
<14> VGA_TV_LUMA
<14> VGA_TV_CRMA
VGA_ENVDD
ENVDD
1
+LCDVDD
1
Q3
2
2
PCIE_GTX_C_MRX_P[0..15] <10>
Q2
2N7002_SOT23-3
C4
B:Set "@".
D
@ 4.7U_0805_10V4Z
2
3
R6
100_0402_5%
D
PCEI_GTX_C_MRX_P[0..15]
2
G
1
3
S
AO3413_SOT23
+LCDVDD Width: 80mils
1
+LCDVDD
1
+2.5VS
C3
0.047U_0402_16V4Z
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
R7
100K_0402_5%
2
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
C2
@ 4.7U_0805_10V4Z
+3VS
BKOFF#
2
4.7K_0402_5%
1
R279
1
C401
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
1
C413
1
C9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
DAC_BRIG
2
@ 68P_0402_50V8J
INVT_PWM
2
@ 68P_0402_50V8J
BKOFF#
2
@ 68P_0402_50V8J
2LCD_EDID_CLK
@ 68P_0402_50V8J
2LCD_EDID_DATA
@ 68P_0402_50V8J
1
C407
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
1
C7
JP3
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
LCD_TZOUT1LCD_TXOUT0+
LCD_TXOUT0LCD_TXOUT1+
LCD_TXOUT1LCD_TXOUT2LCD_TXOUT2+
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
LCD_EDID_CLK
LCD_EDID_DATA
+LCDVDD_C
+LCDVDD_C
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
2
GND2
GND1
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
C1
0.1U_0402_16V4Z
B:Set "@".
B+
+INV
L34
1
2
FBMA-L11-201209-221LMA30T_0805
1
2
EMI
32
31
1
C389
0.1U_0402_25V4Z
2
C390
68P_0402_50V8J
C
JP4
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
LCD_TZOUT0LCD_TZOUT0+
LCD_TZOUT1+
LCD_TZOUT1-
+3VS
BKOFF#
DAC_BRIG
INVT_PWM
LCD_TXCLKLCD_TXCLK+
LCD_TXOUT0+
LCD_TXOUT1LCD_TXOUT2LCD_TXOUT2+
+INV
ACES_88242-3001
LVDS30CON@
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
LCD_EDID_CLK
LCD_EDID_DATA
L36
1
+LCDVDD
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
80mil
1
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
1
C403
0.1U_0402_16V4Z
A:Follow ISKAA modify for HDMI1932.
2
+LCDVDD_C
0_0805_5%
1
C394
22U_A_4VM
2
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
GND
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
GND
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
LCD_TZCLK+
LCD_TZCLK-
+3VS
BKOFF#
DAC_BRIG
INVT_PWM
LCD_TXCLKLCD_TXCLK+
BKOFF# <30>
1
DAC_BRIG <30>
INVT_PWM <30>
C415
2
+INV
ACES_88242-4001
LVDS40CON@
+
B
2
CLK_PCIE_VGA <13>
CLK_PCIE_VGA# <13>
LCD_EDID_DATA
LCD_EDID_CLK
LCD_EDID_CLK
LCD_EDID_DATA
NB_RST# <11,17,24,25,28,30,34>
R8
R9
LCD_TXCLKLCD_TXCLK+
LCD_TXCLKLCD_TXCLK+
LCD_TZCLKLCD_TZCLK+
1
1
2007/5/4
Issued Date
Deciphered Date
3
UMA_LCD_CLK
UMA_LCD_DAT
UMA_LCD_CLK <11>
UMA_LCD_DAT <11>
R255 1
R256 1
2 LVDS30@ 0_0402_5%
2 LVDS30@ 0_0402_5%
UMA_TXCLK- <11>
UMA_TXCLK+ <11>
R257 1
R258 1
2 LVDS30@ 0_0402_5%
2 LVDS30@ 0_0402_5%
UMA_TXOUT0- <11>
UMA_TXOUT0+ <11>
R259 1
R260 1
2 LVDS30@ 0_0402_5%
2 LVDS30@ 0_0402_5%
UMA_TXOUT1- <11>
UMA_TXOUT1+ <11>
R268 1
R269 1
2 LVDS30@ 0_0402_5%
2 LVDS30@ 0_0402_5%
UMA_TXOUT2- <11>
UMA_TXOUT2+ <11>
R261 1
R262 1
2 LVDS40@ 0_0402_5%
2 LVDS40@ 0_0402_5%
UMA_TZOUT0- <11>
UMA_TZOUT0+ <11>
R266 1
R267 1
2 LVDS40@ 0_0402_5%
2 LVDS40@ 0_0402_5%
UMA_TZOUT1- <11>
UMA_TZOUT1+ <11>
R263 1
R264 1
2 LVDS40@ 0_0402_5%
2 LVDS40@ 0_0402_5%
UMA_TZOUT2- <11>
UMA_TZOUT2+ <11>
LCD_TZCLKLCD_TZCLK+
R271 1
R270 1
2 LVDS40@ 0_0402_5%
2 LVDS40@ 0_0402_5%
UMA_TZCLK- <11>
UMA_TZCLK+ <11>
2008/5/4
4
2 UMA@ 0_0402_5%
2 UMA@ 0_0402_5%
Compal Secret Data
VGA@ JAE_WB3F200VD1R1000~D
5
80mil
1 2
PCIE_GTX_C_MRX_N[0..15] <10>
AO3413_SOT23
1
R5
470_0805_5%
PCIE_MTX_C_GRX_P[0..15] <10>
PCEI_GTX_C_MRX_N[0..15]
2
PCIE_MTX_C_GRX_N[0..15] <10>
PCIE_MTX_C_GRX_P[0..15]
+3VS
R2
2K_0402_5%
1
PCIE_MTX_C_GRX_N[0..15]
C:Change Q1 and Q3 same as Q52,
use same part in BOM.
2
1
VGA_ENVDD
3
+1.8VS
Q1
0.1U_0402_16V4Z
PCEI_GTX_C_MRX_P14
PCEI_GTX_C_MRX_N14
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
+3V_SB
2
UMA@ 0_0402_5%
2
PCEI_GTX_C_MRX_P15
PCEI_GTX_C_MRX_N15
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
1
R1
<11> UMA_ENVDD
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
G
+1.5VS
LCD/PANEL BD. Conn.
D
+3VS
1
G
D
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
2
D
B+
+2.5VS
3
S
4
JP23
S
5
VGA BOARD Conn.
2
Title
Size
B
Date:
A
CRT CONNECTOR
Document Number
Sheet
1
Rev
1A
15
of
45
4
3
U26A
PCIE_CALRP
PCIE_CALRN
R413
2
1 0_0402_5%
E27
PCIE_CALI
2
R112
+3V_SB
1
R125
1
R127
1
R126
1
R129
<6> LDT_RST#
<28,30> EC_SWI#
EC_SWI#
2
100K_0402_5%
1
R416
ALLOW_LDTSTOP
EC_SWI#
<30> PM_SLP_S3#
<30> PM_SLP_S5#
<30> PBTN_OUT#
<6,30> SB_PWRGD
SB_TEST0
2
@ 2.2K_0402_5%
SB_TEST1
2
@ 2.2K_0402_5%
SB_TEST2
2
@ 2.2K_0402_5%
H_THERMTRIP#
2
4.7K_0402_5%
SB_TEST0
SB_TEST1
SB_TEST2
<6> H_THERMTRIP#
H_THERMTRIP#
<30> GATEA20
<30> EC_KBRST#
<34> LPC_DRQ1#
<11> BMREQ#
<22,30,34> SERIRQ
SB_32KHI
CPU_PG/LDT_PG
INTR/LINT0
NMI/LINT1
INIT#
SMI#
SLP#/LDT_STP#
IGNNE#/SIC
A20M#/SID
FERR#
STPCLK#/ALLOW_LDTSTP
CPU_STP#/DPSLP_3V#
DPSLP_OD#/GPIO37
DPRSLPVR
LDT_RST#/DPRSTP#/PROCHOT#
PCI_PME#/GEVENT4#
RI#/EXTEVNT0#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
SUS_STAT#
TEST0
TEST1
TEST2
S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
WAKE#/GEVENT8#
BLINK/GPM6#
SMBALERT#/THRMTRIP#/GEVENT2#
D7
C25
AF26
AG26
LPC_PME#/GEVENT3#
LPC_SMI#/EXTEVNT1#
GA20IN
KBRST#
AG24
AG25
AH24
AH25
AF24
AJ24
AH26
W22
AF23
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
SERIRQ
D2
C1
X1
X2
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#/ROMA10
CBE1#/ROMA1
CBE2#/ROMWE#
CBE3#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
PAR/ROMA19
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
XTAL
SB_32KHO
A3
B2
F7
A5
E3
B5
B3
G9
E9
F9
D9
F4
E7
C2
G7
PCIRST#
W7
Y1
W8
W5
AA5
Y3
AA6
AC5
AA7
AC3
AC7
AJ7
AD4
AB11
AE6
AC9
AA3
AJ4
AB1
AH4
AB2
AJ3
AB3
AH3
AC1
AH2
AC2
AH1
AD2
AG2
AD1
AG1
AB9
AF9
AJ5
AG3
AA2
AH6
AG5
AA1
AF7
Y2
AG8
AC11
AJ8
AE2
AG9
AH8
AH5
AD11
AF2
AH7
AB12
AG4
AG7
AF6
D3
F5
VBAT
RTC_GND
E1
D1
PCI_REQ#2 <22>
PCI_GNT#2 <22>
TP14
B
PCI_PIRQE# <22>
PCI_PIRQF# <22>
PCI_PIRQG# <22>
-
TP17
H_PROCHOT# <6>
+SB_VBAT
A
2
C679
2
1
C251
1U_0402_6.3V4Z
C:Follow AMD
AP, the series
resistor should
be 500 Ohm
R437
120_0402_5%
1
2
W=20mils
2
RTC Battery
+
BATT1
+RTCBATT
1+RTCBATT
2
D35
BAS40-04_SOT23-3
45@ ML1220T13RE
+RTCVCC
1
R436
2
120_0402_5% 1
J4
@ JUMP_43X39
2
+CHGRTC
C700
0.1U_0402_16V4Z
4
OUT
NC
3
1
IN
NC
2
1
Y4
1
R417
20M_0603_5%
1
C250
0.1U_0402_16V4Z
SB_32KHI
2
1
1
D
TP16
1
18P_0402_50V8J
1
8.2K_0402_5%
PCI_C/BE#0 <22>
PCI_C/BE#1 <22>
PCI_C/BE#2 <22>
PCI_C/BE#3 <22>
PCI_FRAME# <22>
PCI_DEVSEL# <22>
PCI_IRDY# <22>
PCI_TRDY# <22>
PCI_PAR <22>
PCI_STOP# <22>
PCI_PERR# <22>
PCI_SERR# <22>
+SB_VBAT
C688
2
R415
C
218S6ECLA13FG_FCBGA548_SB600
SBR1@
R422
20M_0603_5%
2
1
PCIRST#
PCI_AD[0..31] <18,22>
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
AD3
AF1
AF4
AF3
RTCCLK
RTC_IRQ#/GPIO69
B:Change to 8.2K_0402
PCIRST# <6,22>
PCI_AD[0..31]
LPC
<30,34> LPC_AD0
<30,34> LPC_AD1
<30,34> LPC_AD2
<30,34> LPC_AD3
<30,34> LPC_FRAME#
B
AC26
W26
W24
W25
AA24
AA23
AA22
AA26
Y27
AA25
AH9
B24
W23
AC25
AJ9
2 22_0402_5%
1
E29
E28
PCIRST#
PCICLK5 R136 1
PCICLK0 <18>
PCICLK1 <18>
CLK_PCI_SIO <34>
CLK_PCI_EC <30>
PCICLK4 <18>
CLK_PCI_CB <22>
PCICLK6 <18>
2
1 562_0402_1%
1 2.05K_0402_1%
<11> ALLOW_LDTSTOP
1 ALLOW_LDTSTOP
1K_0402_5%
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
2
2
<6,11> LDT_STOP#
+1.8VS
T25
T26
T22
T23
M25
M26
M22
M23
R412
R411
<6> H_PW RGD
C
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
CPU
+PCIE_VDDR
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
P29
P28
M29
M28
K29
K28
H29
H28
2 22_0402_5%
2 22_0402_5%
3
<10>
<10>
<10>
<10>
<10>
<10>
<10>
<10>
SB_RX0P_C
SB_RX0N_C
SB_RX1P_C
SB_RX1N_C
SB_RX2P_C
SB_RX2N_C
SB_RX3P_C
SB_RX3N_C
PCICLK2 R419 1
PCICLK3 R421 1
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
PCI CLKS
2
2
2
2
2
2
2
2
PCI INTERFACE
1
1
1
1
1
1
1
1
ACPI / WAKE UP EVENTS
D
C632
C635
C641
C642
C634
C633
C640
C639
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
SPDIF_OUT/PCICLK7/GPIO41
U2
T2
U1
V2
W3
U3
V1
T1
RTC
<10>
<10>
<10>
<10>
<10>
<10>
<10>
<10>
PCIE_RCLKP
PCIE_RCLKN
PCI EXPRESS INTERFACE
J24
J25
1
B:Swap PCICLK7 and PCICLK2 for debug CLK fail issue.
SB600 SB
<13> SBSRCCLK
<13> SBSRCCLK#
2
2
5
Close to SB600 pin E1
A
32.768KHZ_12.5P_1TJS125BJ4A421P
SB_32KHO
2
18P_0402_50V8J
Compal Secret Data
2007/5/4
Issued Date
Deciphered Date
2008/5/4
5
4
3
Title
SB600-PCI_EXP/PCI/LPC/RTC
2
Custom
Date:
Sheet
1
16
of
45
Rev
1A
5
4
3
2
1
U26B
2
R118
1
R119
2 NB_RST#_R
8.2K_0402_5%
1
R134
2 EC_RSMRST#
2.2K_0402_5%
B:Chg. name to HDD_LED# and
dis-connect with EC bec'z
chg. to KB926.
R120
1
+3VS
<32> HDD_LED#
+3VALW
MP:Add U35 and C740, reserve
R1178 for LAN Leakage
problem.
5
1
P
U35
NB_RST# 4
<11,15,24,25,28,30,34> NB_RST#
2
0.1U_0402_16V4Z
2
A
1
2
R414
0_0402_5%
@
3
@
1
R115
USB_48M_EXT
2
0_0402_5%
1
<13> USBCLK_EXT
R130
@ 10K_0402_5%
2
L23
MBC1608121YZF_0603
2
1
+3V_SB
X1 @ 48MHZ_4P_FN4800002
OSC_48MHZ 1 R116
2 USB_48M_EXT
VDD
OUT 3
@ 30_0402_5%
1 OE
2
GND 2
4
1
C217
@ 12P_0402_50V8J
B
B:Chg. to SPI, DEL
EC_FLASH# from GPM1#
B:Del GPIO1 bec'z not tri-state pin for app..
<27> SB_SPKR
R409
R410
R408
1
2 10K_0402_5%
SIDERST#
1
2 2.2K_0402_5%
SMB_CK_CLK0
1
2 2.2K_0402_5%
SMB_CK_DAT0
SIDERST#
SMB_CK_CLK0
SMB_CK_DAT0
<8,9,13,24,28> SMB_CK_CLK0
<8,9,13,24,28> SMB_CK_DAT0
SATA_X2
AC12
SATA_ACT#/GPIO67
AG10
E2
B23
A_RST#
RSMRST#
14M_OSC
A17
USBCLK
A14
USB_RCOMP
A10
A11
USB_ATEST0
USB_ATEST1
A27
A26
B26
B27
D23
B29
A23
C26
D26
C28
A4
C27
B28
C3
F3
USB_HSDP9+
USB_HSDM9USB_HSDP8+
USB_HSDM8USB_HSDP7+
USB_HSDM7USB_HSDP6+
USB_HSDM6USB_HSDP5+
USB_HSDM5USB_HSDP4+
USB_HSDM4USB_HSDP3+
USB_HSDM3USB_HSDP2+
USB_HSDM2USB_HSDP1+
USB_HSDM1USB_HSDP0+
USB_HSDM0-
USB_OC0#/GPM0#
USB_OC1#/GPM1#
USB_OC2#/GPM2#
USB_OC3#/GPM3#
USB_OC4#/GPM4#
USB_OC5#/DDR3_RST#/GPM5#
USB_OC6#/GEVENT6#
USB_OC7#/GEVENT7#
USB_OC8#/AZ_DOCK_RST#/GPM8#
USB_OC9#/SLP_S2/GPM9#
SSMUXSEL/SATA_IS3#/GPIO0
ROM_CS#/GPIO1
SPKR/GPIO2
SMARTVOLT/SATA_IS2#/GPIO4
SHUTDOWN#/GPIO5
GHI#/SATA_IS1#/GPIO6
WD_PWRGD/GPIO7
DDC1_SDA/GPIO8
DDC1_SCL/GPIO9
SATA_IS0#/GPIO10
LLB#/GPIO66
IDE_IORDY
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR#
IDE_IOW#
IDE_CS1#
IDE_CS3#
AB29
AA28
AA29
AB27
Y28
AB28
AC27
AC29
AC28
W28
W27
IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30
AD28
AD26
AE29
AF27
AG29
AH28
AJ28
AJ27
AH27
AG27
AG28
AF28
AF29
AE28
AD25
AD29
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS#/GPIO32
J3
J6
G3
G2
G6
LAN_RST#/GPIO13
ROM_RST#/GPIO14
C23
G5
N3
P2
W4
TEMP_COMM
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64
P5
P7
P8
T8
T7
VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60
V5
L7
M8
V6
M6
P4
M7
V7
AZ_BITCLK
AZ_SDOUT
AZ_SDIN3/GPIO46
AZ_SYNC
AZ_RST#
N2
M2
K2
L3
K3
AC_BITCLK/GPIO38
AC_SDOUT/GPIO39
ACZ_SDIN0/GPIO42
ACZ_SDIN1/GPIO43
ACZ_SDIN2/GPIO44
AC_SYNC/GPIO40
AC_RST#/GPIO45
L1
L2
L4
J2
J4
M3
L5
SCL0/GPOC0#
SDA0/GPOC1#
SCL1/GPOC2#
SDA1/GPOC3#
BT_DET#
1
R479
+3VS
1
R128
1
R466
2
5IN1@ 1K_0402_5%
2
100K_0402_5%
0: 5IN1 Disable
1: 5IN1 Enable
+3VS
C
BT_DET#
1
R124
1
R122
A:ISKAA-Add for CIR floating casue S3 shut down issue
B:Chg. name to CIR_EN#
5IN1_EN
CIR_EN#
SB_INT_FLASH_SEL <31>
EC_THERM# <30>
B:Move SB_INT_FLASH_SEL to GPIO63 bec'z
GPIO1 is not tri-state pin in SB600
AZ_BITCLK
AZ_SDOUT
A Z_SYNC
AZ_RST#
2
100K_0402_5%
2
CIR@ 1K_0402_5%
BT_DET# <29>
SPK_SEL <26>
AZ_SDIN3_HD <26>
AC97_SDOUT <18>
AZ_SDIN0_MD <28>
E23
AC21
AD7
AE7
AA4
T4
D4
AB19
33_0402_5% 2
1 R158
AZ_BITCLK_HD <26>
MDC@33_0402_5% 2
1 R160
AZ_BITCLK_MD <28>
33_0402_5% 2
1 R161
AZ_SDOUT_HD <26>
MDC@33_0402_5% 2
1 R163
AZ_SDOUT_MD <28>
33_0402_5% 2
1 R155
AZ_SYNC_HD <26>
A Z_SYNC
MDC@33_0402_5% 2
1 R157
AZ_SYNC_MD <28>
33_0402_5% 2
1 R152
AZ_RST_HD# <26>
AZ_RST#
MDC@33_0402_5% 2
1 R154
AZ_RST_MD# <28>
AZ_BITCLK
AZ_SDOUT
B
B:Del HDMI audio fun. bec'z remove SiI1932.
AZ_RST#
2
10K_0402_5%
10K_0402_5% 2
CIR_EN#
FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52
SBR1@
D
B:1.Add PU R479 for BT_DET#
+3VS
2.Chg. BT_DET# from GPIO0 to GPIO51.
5IN1_EN
M4
T3
V4
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_SDIORDY <28>
INT_IRQ15 <28>
IDE_SDA0 <28>
IDE_SDA1 <28>
IDE_SDA2 <28>
IDE_SDDACK# <28>
IDE_SDDREQ <28>
IDE_SDIOR# <28>
IDE_SDIOW# <28>
IDE_SDCS1# <28>
IDE_SDCS3# <28>
IDE_SDD[0..15] <28>
B:Chg. name to 5IN1_EN
FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49
GPIO/ SMBUS
<28> SIDERST#
AD18
A8
B8
C7
C8
A6
B6
B4
C4
C5
C6
<30> EC_SCI#
<30> EC_SMI#
+3VS
SATA_X1
H12
G12
E12
D12
E14
D14
G14
H14
D16
E16
D18
E18
G16
H16
G18
H18
D19
E19
G19
H19
<28> USBP9+
<28> USBP9<24> USBP8+
<24> USBP8<29> USBP7+
<29> USBP7<29> USBP6+
<29> USBP6<29> USBP5+
<29> USBP5<29> USBP4+
<29> USBP4<24> USBP3+
<24> USBP3<29> USBP2+
<29> USBP2<29> USBP1+
<29> USBP1<29> USBP0+
<29> USBP0-
<28> EXP_CPPE#
<30> EC_LID_OUT#
1
SATA_CAL
USB OC
C236
@ 0.1U_0402_16V4Z
2
AF12
AD16
USB INTERFACE
2
1 USB_RCOMP
11.8K_0402_1%
TP13
TP12
NB_RST#_R
NC7SZ08P5X_NL_SC70-5
1
R1178
NB_RST#_R
EC_RSMRST#
USB_48M_EXT
B
Y
G
C
C740
SATA_X2
2 10K_0402_5%
SATA_RX0+
SATA_RX0SATA_RX1+
SATA_RX1SATA_RX2+
SATA_RX2SATA_RX3+
SATA_RX3-
OSC / RST
<30> EC_RSMRST#
<13> SB_OSC_INT
SATA_CAL
1
1K_0402_1%
SATA_X1
AJ20
AH20
AJ17
AH17
AJ16
AH16
AJ13
AH12
AZALIA
<21> SATA_DTX_C_SRX_P0
<21> SATA_DTX_C_SRX_N0
SATA_X2
P-ATA 66/100
2
2
1 C186
SB600 SB
SERIAL ATA
10P_0402_50V8J 2
SATA_TX0+
SATA_TX0SATA_TX1+
SATA_TX1SATA_TX2+
SATA_TX2SATA_TX3+
SATA_TX3-
SPI ROM
R113
10M_0402_5%
AH21
AJ21
AH18
AJ18
AH13
AH14
AJ11
AH11
HW MONITOR
SATA_X1
Y2
25MHZ_20P
D
SATA_STX_DRX_P0
SATA_STX_DRX_N0
1
1 C195
1
10P_0402_50V8J 2
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
1
1
A C97
C662
C665
<21> SATA_STX_C_DRX_P0
<21> SATA_STX_C_DRX_N0
1
R140
A:PA_IXP600AF3 reserve for SB600 prior to A21.
A
A
Compal Secret Data
2007/5/4
Issued Date
Deciphered Date
2008/5/4
5
4
3
Title
SB600-USB/ACPI/AC97/GPIO
2
Custom
Date:
Sheet
1
17
of
45
Rev
1A
5
4
3
2
1
D
D
+3VS
1
1
1
1
R145
@ 10K_0402_5%
<16,22>
<16,22>
<16,22>
<16,22>
<16,22>
2
R146
10K_0402_5%
2
1
<17> AC97_SDOUT
<16> PCICLK4
<16> PCICLK6
<16> PCICLK1
<16> PCICLK0
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
R151
R138
R150
@ 2.2K_0402_5% @ 2.2K_0402_5% @ 2.2K_0402_5%
2
2
2
2
R144
10K_0402_5%
2
2
R147
@ 10K_0402_5%
2
R133
10K_0402_5%
R142
@ 2.2K_0402_5%
1
1
1
R149
@ 2.2K_0402_5%
2
R420
10K_0402_5%
2
R139
@ 10K_0402_5%
2
2
R418
@ 2.2K_0402_5%
Debug Straps
1
+3VS
1
+3VS
1
+3VS
1
+3VS
1
Standard Straps
C
C
AC_SDOUT
PULL
HIGH
PULL
LOW
USE
DEBUG
STRAPS
IGNORE
DEBUG
STRAPS
<int'l PD>
PCI_CLK4
<PCICLK4>
USE INT.
PLL48
PCI_CLK6
<PCICLK6>
PCI_CLK1
<CLK_PCI_LAN>
CPU IF=AMD
ROM TYPE:
DEFAULT
USE EXT.
48MHZ
CPU IF=Intel
PCI_CLK0
<PCICLK0>
H,
H = Reserve
H,
L = LPC ROM
L,
H = SPI ROM
L,
L = FWH ROM
PULL
HIGH
DEFAULT
PULL
LOW
PCI_AD23
<A11 only>
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
USE
LONG
RESET
USE PCI
P LL
USE ACPI
BCLK
USE IDE
P LL
USE DEFAULT DISABLE
PCIE STRAPS BOOTFAIL
TIMER
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
USE
SHORT
RESET
BYPASS
PCI PLL
BYPASS
ACPI
BCLK
BYPASS IDE
P LL
USE EEPROM ENABLE
PCIE STRAPS BOOTFAIL
TIMER
DEFAULT
DEFAULT
DEFAULT
B
Un-Used Inputs Setting--GPIO pins
Un-Used Inputs Setting--GPM pins
Un-Used Inputs Setting--GPM pins
GPIO4/SMARTVOLT/SATA_IS2#
Config. GPIO to Output Mode.
GPIO56/VIN3
GPM5#/DDR3_RST#/USB_OC5#
Config. for internal PU.
GPIO5/SHUTDOWN#
GPIO57/VIN4
GEVENT5#/S3_STATE
Config. for internal PU.
GPIO7/WD_PWRGD
GPIO58/VIN5
GPIO8/DDC1_SDA
GPIO59/VIN6
GPIO9/DDC1_SCL
GPIO60/VIN7
GPIO10/SATA_IS0#
GPIO61/TEMPIN0
GPIO41/PCICLK7/SPDIF_OUT
GPIO50/FANIN0
GPIO51/FANIN1
GPOC2#/SCL1
GPIO52/FANIN2
GPOC3#/SDA1
GPIO53/VIN0
GPIO54/VIN1
B
A
A
Compal Secret Data
5
Deciphered Date
2008/5/4
4
3
Title
SB600-IDE/SATA/STRAPS
GPIO55/VIN2
2007/5/4
Issued Date
2
Custom
Date:
Sheet
1
18
of
45
Rev
1A
+3VS
B:Update footprint w/o
wrong polar mark.
L64
1
2
MBC1608121YZF_0603
C671 2
1 1U_0402_6.3V4Z
+1.2V_HT
U26C
2
+
2
2
2
2
2
2
2
2
2
2
SB_VDD_33=150mA
+
2
2
2
2
2
2
1
22U_A_4VM
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
+1.2VS_SB_VDD
+3V_SB
C678
C253
C230
C234
1
22U_A_4VM
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
0.1U_0402_16V4Z
2
1
1
1
+3V_SB
SB_S5_33=15mA
+1.2V_SB
2
2
2
2
2
1
1
1
1
1
+1.2V_SB
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@ 10U_0805_10V4Z
SB_AVDDCK_12=80mA
+PCIE_VDDR
SB_PCIEPVDDR_12=450mA
2
1
FBMA-L11-201209-221LMA30T_0805
+1.2V_HT
+1.2V_HT
+
C646
C187
C192
C189
C648
C649
2
+PCIE_VDDR
1
22U_A_4VM
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
1
1
1
1
1
L59
2
1
MBK2012601YZF_0805
C650 1
C647 1
+PCIE_PVDD
F27
F28
F29
G26
G27
G28
G29
J27
J29
L25
L26
L29
N29
PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
PCIE_VDDR_8
PCIE_VDDR_9
PCIE_VDDR_10
PCIE_VDDR_11
PCIE_VDDR_12
PCIE_VDDR_13
U29
PCIE_PVDD
U28
PCIE_PVSS
SB_PCIEPVDD_12=35mA
+PCIE_PVDD
1U_0402_6.3V4Z
2
2 22U_0805_6.3V6M
GND to U28
MP:Change C647 to 22u for sequence and L59 to
DCR is 0.4Ohm to meet AMD requirement.
S5_1.2V_1
S5_1.2V_2
S5_1.2V_3
S5_1.2V_4
V29
V28
V27
V26
V25
V24
V23
V22
U27
T29
T28
T27
T24
T21
P27
PCIE_VSS_42
PCIE_VSS_41
PCIE_VSS_40
PCIE_VSS_39
PCIE_VSS_38
PCIE_VSS_37
PCIE_VSS_36
PCIE_VSS_35
PCIE_VSS_34
PCIE_VSS_33
PCIE_VSS_32
PCIE_VSS_31
PCIE_VSS_30
PCIE_VSS_29
PCIE_VSS_28
3.3V Standby PWR
1.2V Standby PWR
PCIE Analog PWR
L60
G4
H1
H2
H3
S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6
PLLVDD_SATA_1
PLLVDD_SATA_2
2
1
2
MBC1608121YZF_0603
1 1U_0402_6.3V4Z
+XTLVDD_ATA
+XTLVDD_ATA
AC16
XTLVDD_SATA
+1.2V_SATA
AE14
AE16
AE18
AE19
AF19
AF21
AG22
AG23
AH22
AH23
AJ12
AJ14
AJ19
AJ22
AJ23
L63
AVDD_SATA_1
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_4
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7
AVDD_SATA_8
AVDD_SATA_9
AVDD_SATA_10
AVDD_SATA_11
AVDD_SATA_12
AVDD_SATA_13
AVDD_SATA_14
AVDD_SATA_15
SB_AVDDSATA_12=300mA
2
1
FBMA-L11-201209-221LMA30T_0805
+1.2V_HT
C668
C661
C197
C194
C206
SB_AVDDC_33=5mA
2
+1.2V_SATA
1
22U_A_4VM
2 1U_0402_6.3V4Z
2 1U_0402_6.3V4Z
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
1
1
1
1
+3V_SB
+3V_SB
SB_AVDDTX_33=250mA
C669
C224
C228
C211
C212
C673
C675
2
1
1
1
1
1
1
2
2
2
2
2
2
SB_AVDDRX_33=250mA
1
22U_A_4VM
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3V_SB
+1.2V_SB
SB_AVDDCK_12=90mA
2 2.2U_0603_6.3V4Z
2 0.1U_0402_16V4Z
+SB_AVDD
+1.2V_SB
2
2
2
2
1
1
1
1
A12
AVDDC
A13
AVSSC
A18
A19
B19
B20
B21
USB_PHY_1.2V_1
USB_PHY_1.2V_2
USB_PHY_1.2V_3
USB_PHY_1.2V_4
USB_PHY_1.2V_5
SB_AVDD_33=1mA
GND to A13
C198
C666
C667
C201
AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDTX_4
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
AVDDRX_4
SB_AVDDC_33=15mA
+3V_SB
C670 1
C221 1
B9
B11
B13
B16
B18
A9
B10
B12
B14
B17
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+1.8VS
AVDD
AVSS
AA27
AE11
+V5_VREF
V5_VREF
SB_V5_VREF_5=5mA
A24
2 +3.3V_AVDDCK
SB_AVDDCK_33=10mA
AVDDCK_3.3V
A22
AVDDCK_1.2V
+1.2V_AVDDCK
SB_AVDDCK_12=40mA
B22
PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27
D27
D28
D29
F26
G23
G24
G25
H27
J23
J26
J28
K27
L22
L23
L24
L27
L28
M21
M24
M27
N27
N28
P22
P23
P24
P25
P26
L65
1
2
MBC1608121YZF_0603
+3VS
1
2
2.2U_0603_6.3V4Z
C683
1
2
0.1U_0402_16V4Z
L61
1
2
MBC1608121YZF_0603
+3VS
GND to M1
AVSSCK
AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24
AVSS_USB_25
AVSS_USB_26
AVSS_USB_27
AVSS_USB_28
AVSS_USB_29
AVSS_USB_30
AVSS_USB_31
AVSS_USB_32
AVSS_USB_33
AB14
AB16
AB18
AC14
AC18
AC19
AD12
AD19
AD21
AE12
AE21
AF11
AF14
AF16
AF18
AG11
AG12
AG13
AG14
AG16
AG17
AG18
AG19
AG20
AG21
AH10
AH19
A16
C9
C10
C11
C12
C13
C14
C16
C17
C18
C19
C20
D11
D21
E11
E21
F11
F12
F14
F16
F18
F19
F21
G11
G21
H11
H21
J11
J12
J14
J16
J18
J19
+SB_AVDD
C685
AVSS_SATA_1
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_5
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8
AVSS_SATA_9
AVSS_SATA_10
AVSS_SATA_11
AVSS_SATA_12
AVSS_SATA_13
AVSS_SATA_14
AVSS_SATA_15
AVSS_SATA_16
AVSS_SATA_17
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_20
AVSS_SATA_21
AVSS_SATA_22
AVSS_SATA_23
AVSS_SATA_24
AVSS_SATA_25
AVSS_SATA_26
AVSS_SATA_27
HW Monitor PWR
CPU_PWR
SB_CPU_PWR=10mA
1
C188
0.1U_0402_16V4Z
N1
M1
Special PWR/GND
C248
C239
C686
C682
C242
A2
A7
F1
J5
J7
K1
C209
SB600 SB
AD14
AJ10
L22
+3VS
U26D
+PLLVDD_ATA
USB PHY Digi. PWR
+
2
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
Core PWR
SB_VDD_12=500mA
M13
M17
N12
N15
N18
R13
R17
U12
U15
U18
V13
V17
A20
A21
A29
B1
B7
B25
C21
C22
C24
D6
E24
F2
F23
G1
J1
J8
L6
L8
M9
M12
M15
M18
N13
N17
P1
P6
P21
R12
R15
R18
T6
T9
U13
U17
V3
V8
V12
V15
V18
V21
W1
W9
Y29
AA11
AA14
AA18
AC6
AC24
AD9
AD23
AE3
AE27
AG6
AJ1
AJ25
AJ29
+
C214
1
1
1
1
1
POWER
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
SB_PLLVDDSATA_12=65mA
USB Analog PWR
C202
C208
C219
C205
C216
C220
+1.2VS_SB_VDD
SB600 SB
+
L20
1
2
MBK2012221YZF 0805
+1.2V_HT
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
VDDQ_16
VDDQ_17
VDDQ_18
VDDQ_19
VDDQ_20
VDDQ_21
VDDQ_22
VDDQ_23
VDDQ_24
VDDQ_25
VDDQ_26
VDDQ_27
VDDQ_28
3.3V I/O PWR
1
1
1
1
1
1
1
1
1
1
A25
A28
C29
D24
L9
L21
M5
P3
P9
T5
V9
W2
W6
W21
W29
AA12
AA16
AA19
AC4
AC23
AD27
AE1
AE9
AE23
AH29
AJ2
AJ6
AJ26
+PLLVDD_ATA
SATA Analog PWR
C190
C227
C193
C200
C240
C191
C233
C226
C210
C676
1 C657
220U_Y_4VM
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3.3V_AVDDCK
C659 1
2 2.2U_0603_6.3V4Z
C660 1
2
0.1U_0402_16V4Z
GND to B22
+5VS
R131 1
+3VS
2
D8
2 1K_0402_5%
+V5_VREF
2
1
C225
1U_0603_10V4Z
1
2
1
C223
0.1U_0402_16V4Z
SBR1@ 218S6ECLA13FG_FCBGA548_SB600
+1.2V_HT
L62
SBR1@
1
2
MBC1608121YZF_0603
+1.2V_AVDDCK
C663
1
2 2.2U_0603_6.3V4Z
C664
1
2
0.1U_0402_16V4Z
GND to B22
Compal Secret Data
Issued Date
2007/5/4
Deciphered Date
2008/5/4
Title
SB600-Power/GND
Custom
Date:
Sheet
19
of
45
Rev
1A
3
2
+3VS
1
2
2
@ JUMP_43X79
1
1
1
1
R1176
HDMI@
19.1K_0402_1%
R1177
HDMI@
19.1K_0402_1%
VGA_DVI_SDATA
<15> VGA_DVI_SDATA
3
D
2
3
Q135
1
HDMI_SCLK
D
S
2N7002_SOT23-3
HDMI@
B:1.Level shift circuit for HDMI.
2.Reserve DDC PU Resistor and HPD PU Resistor.
HDMI_SDATA
2N7002_SOT23-3
HDMI@
G
VGA_DVI_SCLK
<15> VGA_DVI_SCLK
Q134
1
D
2
C270
HDMI@
0.1U_0402_16V4Z
S
B:Need to open solder door
of J1 for HDMI fun. PWR.
VGA_HPD
<15> VGA_HPD
G
1
2
RB491D_SOT23
1
HDMI@
D
2
J1
R430
@
24K_0402_5%
2
F1
1
2
D10
2
+HDMI_5V_OUT
R431
@
24K_0402_5%
2
R429
HDMI@
2.2K_0402_5%
HDMI@
1A_6VDC_MINISMDC110
1
+HDMI_5V_OUT
MP:change R431 and R430 to 24K; R1176
and R1177 to 19.2K, follow ATI ER.
1
MP:Update HDMI Hot Plug DET circuit.
MP:Update D10 to meet HDMI.
+5VS
1
2
4
2
5
B:Remove HDMI transistor, SiI1932; and support by GPU only.
HDMI Connector
<15> VGA_DVI_TXD1-
VGA_DVI_TXD1-
1
L68
1
2 R440
0_0402_5%
@
1
2
HDMI_R_D1-
VGA_DVI_TXC-
<15> VGA_DVI_TXC-
1
L66
2
1
2 R432
0_0402_5%
@
1
2
2
3
3
HDMI_R_CK-
JP35
HDMI_HPD
PreMP:Change to common choke for EMI
4
C
<15> VGA_DVI_TXD1+
<15> VGA_DVI_TXD2-
VGA_DVI_TXD1+
4
3
3
HDMI@ WCM-2012-900T_0805
1
2 R441
0_0402_5%
@
VGA_DVI_TXD2-
1
L69
2 R442
0_0402_5%
@
1
1
2
2
4
4
3
3
4
HDMI_R_D1+
HDMI_R_D2-
HDMI@ WCM-2012-900T_0805
1
2 R434
0_0402_5%
@
VGA_DVI_TXC+
<15> VGA_DVI_TXC+
VGA_DVI_TXD0-
<15> VGA_DVI_TXD0-
4
+HDMI_5V_OUT
1
L67
HDMI_SDATA
HDMI_SCLK
HDMI_R_CK+
HDMI_R_CK-
2 R435
0_0402_5%
@
HDMI_R_D0-
HDMI_R_CK+
HDMI_R_D0-
1
1
2
2
HDMI_R_D0+
HDMI_R_D1-
4
4
3
3
HDMI_R_D1+
HDMI_R_D2-
PreMP:Change to common choke for EMI
<15> VGA_DVI_TXD2+
VGA_DVI_TXD2+
HDMI@ WCM-2012-900T_0805
1
2 R444
0_0402_5%
@
HDMI_R_D2+
HDMI@ WCM-2012-900T_0805
1
2 R438
0_0402_5%
@
VGA_DVI_TXD0+
<15> VGA_DVI_TXD0+
HDMI_R_D2+
HDMI_R_D0+
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+
C
20
21
22
23
TYCO_1939864-1
HDMI@
+HDMI_5V_OUT
2
HDMI_HPD
A
3
G
2
4
VGA_HPD
2
B
R425
100K_0402_5%
HDMI@
U34
HDMI@
Y
2 C694
0.1U_0402_16V4Z
HDMI@
1
1
1
B
P
OE#
5
1
C739
0.1U_0402_16V4Z
HDMI@
MP:Update HDMI Hot Plug DET circuit, to add U34, C739.
A
A
Compal Secret Data
2007/5/4
Issued Date
Deciphered Date
2008/5/4
5
4
3
2
Title
SiI1392&HDMI Connector
Custom
Rev
1A
Date:
Sheet
1
20
of
45
5
4
3
2
1
SATA HDD Conn.
+5VS
Place closely JP25 SATA CONN.
JP34
D
D
1
1
C684
10U_0805_10V4Z
2
1
C680
10U_0805_10V4Z
2
2
C687
0.1U_0402_16V4Z
1
2
1
C689
0.1U_0402_16V4Z
2
GND
A+
AGND
BB+
GND
C690
0.1U_0402_16V4Z
+3VS
1
C697
@ 10U_0805_10V4Z
2
1
C691
1
1
C693
@ 0.1U_0402_16V4Z @ 0.1U_0402_16V4Z
2
2
2
C696
@ 0.1U_0402_16V4Z
24
23
GND
GND
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
SATA_STX_C_DRX_P0 <17>
SATA_STX_C_DRX_N0 <17>
SATA_DTX_SRX_N0
SATA_DTX_SRX_P0
C699
C698
1
1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
SATA_DTX_C_SRX_N0 <17>
SATA_DTX_C_SRX_P0 <17>
+3VS
+5VS
OCTEK_SAT-22SO1G_RV
C
C
B
B
A
A
Compal Secret Data
2007/5/4
Issued Date
Deciphered Date
2008/5/4
5
4
3
Title
HDD/CDROM
2
Custom
Date:
Sheet
1
21
of
45
Rev
1A
5
4
+3VS
3
2
1
+AVDD_7412
+3VS
2
C281
2
1
C289
2
1
2
C278
C282
10U_0805_10V4Z
10U_0805_10V4Z
0.01U_0402_25V4Z
1
1
C294
2
1
C296
2
2
0.01U_0402_25V4Z
C295
1
2 VSSPLL
0.1U_0402_16V4Z
D
1
C319
1
C299
1
4.7U_0805_10V4Z
+3VS
D
2
1U_0603_10V4Z
C
1
22_0402_5%
1
22_0402_5%
1
22_0402_5%
MSCLK_SDCLK_SMELWP#
MSBS_SDCMD_SMWE#
MSD3_SDD3_SMD3
MSD2_SDD2_SMD2
MSD1_SDD1_SMD1
MSD0_SDD0_SMD0
VCCP
VCCP
P1
W8
K1
K19
VR_PORT
VR_PORT
U19
P15
SD_CD#
MS_CD#
SM_CD#
A7
E8
B6
A6
C7
B7
MS_CLK/SD_CLK/SM_EL_WP#
MS_BS/SD_CMD/SM_WE#
MS_DATA3/SD_DAT3/SM_D3
MS_SDIO(DATA0)/SD_DAT0/SM_D0
place near Chip 8412
2
CLK_48M_CB
R196
33_0402_5%
A4
C5
C6
A5
B5
E6
E7
SD_CLK/SM_RE#
SD_CMD/SM_ALE
SD_DAT0/SM_D4
SD_DAT1/SM_D5
SD_DAT2/SM_D6
SD_DAT3/SM_D7
SD_WP/SM_CE#
G5
SC_PWR_CTRL
B4
A3
SM_CLE
XD_CD#/SM_PHYS_WP#
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
M1
M2
M3
M6
M5
N1
N2
N3
P3
R1
R2
P5
R3
T1
T2
W4
W7
R8
U8
V8
W9
V9
U9
R9
V10
U10
R10
W11
V11
U11
P11
R11
C/BE3#
C/BE2#
C/BE1#
C/BE0#
P2
U5
V7
W10
C286
2
0.1U_0402_16V4Z
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
2
1
2
C301
2
0.01U_0402_25V4Z
1
+VCC_5IN1
C284
1U_0603_10V4Z
MSBS_SDCMD_SMWE#
SMRE
5 IN 1 LED
+5VS
SDWP#_SMCE#
PCI_AD[0..31]
SM_RB
PCI_AD[0..31] <16,18>
R254
5IN1@
120_0402_5%
D24
5IN1@
HT-191NB_BLUE_0603
C:Chg. Q32 and Q23 PN to
SB770020010.
5IN1_LED
2
G
R225
10K_0402_5%
S
Q32
5IN1@
2N7002_SOT23-3
<13> CLK_48M_CB
R181 1
1
R175
1394@
2
56.2_0402_1%
2
1
C276
1394@
R180
1394@
2
B:ISKAE,re-link to
"AMP_440168-2_4P-S"
56.2_0402_1%
56.2_0402_1%
2
1
1
P-TWO_CU804B-A0G1G-P
1394@
R179
1394@
1
C285
R170
1394@1
R169 1
1394@
1394@
R186 6.34K_0402_1%
T18
1
2
T19
XTPBIAS0
R13
XTPA0+
V14
XTPA0W14
XTPB0+
V13
XTPB0W13
W17
2
1U_0402_6.3V4Z
V16
1394@
W16
2 1K_0402_1% V15
2 1K_0402_1%W15
CPS
R12
5.1K_0402_1%
4
3
2
1
220P_0402_50V8J
B
GND TPA+
GND TPAGND TPB+
GND TPB-
R178
1394@
1
8
7
6
5
R177
1394@
2
1
JP37
56.2_0402_1%
2
1
C280
1394@
1U_0402_6.3V4Z
+3VS
2
MC_PWRON#
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
G528P1UF_SO8
5IN1@
X_OUT R18
X_IN
R19
R0
R1
TPBIAS0
TPA0P
TPA0N
TPB0P
TPB0N
TPBIAS1
TPA1P
TPA1N
TPB1P
TPB1N
CPS
XO
XI
X_OUT
PCLK
PRST#
GRST#
RI_OUT#/PME#
L1
K3
K5
L5
SUSPEND#
J5
SPKROUT
H3
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
G1
H5
H2
H1
J1
J2
J3
SCL
SDA
G2
G3
VR_EN#
K2
CLK_PCI_CB
8412@
R189
@ 10_0402_5%
PCI_PERR#
PCI_SERR#
PCI_REQ#2
PCI_GNT#2
<16>
<16>
<16>
<16>
1
R194
100_0402_5%
8402@
2
PCM_SPK <27>
PCI_PIRQE# <16>
PCI_PIRQF# <16>
PCI_PIRQG# <16>
SERIRQ <16,30,34>
DEVICE_ID
5IN1_LED
2
R191
1 R200
1
R199
1
+3VS
10K_0402_5%
2 300_0402_5%
2
300_0402_5%
C738 1
222P_0402_50V8J
C737 1
222P_0402_50V8J
1
C311
0.1U_0402_16V4Z
+VCC_5IN1
41
XD-VCC
MSD0_SDD0_SMD0
MSD1_SDD1_SMD1
MSD2_SDD2_SMD2
MSD3_SDD3_SMD3
SDD0_SMD4
SDD1_SMD5
SDD2_SMD6
SDD3_SMD7
33
34
35
36
37
38
39
40
XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7
MSBS_SDCMD_SMWE#
SMELWP#
SDCMD_SMALE
XD_CD#
SM_RB
SMRE
SDWP#_SMCE#
SMCLE
30
31
29
23
25
26
27
28
XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
32
24
XD-GND
XD-GND
MP: Add C737 and
C738 for EMI
request
4 IN 1 CONN
X_IN
GND
GND
42
18
N.C.
N.C.
TAITW_R007-530-L3
5IN1@
A
2007/5/4
Deciphered Date
4
3
B
SD-VCC
MS-VCC
15
9
SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-CMD
SD-CD-SW
SD-CD-COM
SD-WP-SW
SD-WP-COM
16
19
20
11
12
13
21
22
43
44
SDCLK
MSD0_SDD0_SMD0
MSD1_SDD1_SMD1
MSD2_SDD2_SMD2
MSD3_SDD3_SMD3
MSBS_SDCMD_SMWE#
SD_CD#
MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-INS
MS-BS
SD-GND
SD-GND
MS-GND
MS-GND
8
4
3
5
7
6
2
14
17
1
10
MSCLK
MSD0_SDD0_SMD0
MSD1_SDD1_SMD1
MSD2_SDD2_SMD2
MSD3_SDD3_SMD3
MS_CD#
MSBS_SDCMD_SMWE#
+VCC_5IN1
SDWP#_SMCE#
B:IALAA only to add Pin47
and Pin48 to link to GND.
A
Bottom Side, Normal Insertion
2008/5/4
Title
Compal Secret Data
5
S
JP36
2 43K_0402_5%
Issued Date
D
CLK_PCI_CB <16>
PCIRST# <6,16>
47
48
C304
Q23
MC_PWRON#
2
5IN1@ G
2N7002_SOT23-3
C309
@ 22P_0402_50V8J
1
18P_0402_50V8J
R188
5IN1@
470_0805_5%
DEVICE_ID
+3VS
R193 1
2
+VCC_5IN1
R195
10K_0402_5%
5 in 1 CardReader Conn.
R192
1
2
43K_0402_5%
R190
1K_0402_1%
C283
5IN1@
+5VS
PCI_PAR <16>
PCI_FRAME# <16>
PCI_TRDY# <16>
PCI_IRDY# <16>
PCI_STOP# <16>
PCI_DEVSEL# <16>
CLK_PCI_CB
2
4.7U_0805_10V4Z
1U_0603_10V4Z
<16>
<16>
<16>
<16>
2 R184
1 PCI_AD20
100_0402_5%
1
VSSPLL
X2
24.576MHz_16P_3XG-24576-43E1
U7
R6
W5
V5
V6
U6
N5
R7
W6
L3
L2
2
8412@
PCI7412ZHK_PBGA257
R17
C310
2
18P_0402_50V8J
R14
U13
U14
CLOSE TO CHIP
R174 1
2 CPS
4.7K_0402_5%
1394@
VSSPLL
AGND
AGND
AGND
+3VS
PAR
FRAME#
TRDY#
IRDY#
STOP#
DEVSEL#
IDSEL
PERR#
SERR#
REQ#
GNT#
C297
5IN1@
1
TEST0
CLK_48
PHY_TEST_MA
1
C292
5IN1@
0.1U_0402_16V4Z
2
PCI7412
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
8
7
6
5
2
2 1K_0402_1% P12
CLK_48M_CB F1
P17
2 4.7K_0402_5%
2
22K_0402_5%
1
R173 1
2
100K_0402_5%
U9
1
2
3
4
1
2
2
100K_0402_5%
C
R182
10K_0402_5%
2
SMCLE
XD_CD#
2
100K_0402_5%
+VCC_5IN1
D
1
1
C320
22P_0402_50V8J
1
R176
5IN1@
1
R168
5IN1@
1
R187
5IN1@
1
R167
5IN1@
5 In 1 Card Power Switch
+3VS
1
MP: Add R196 and
C320 in BOM as EMI
request.
SMRE
SDCMD_SMALE
SDD0_SMD4
SDD1_SMD5
SDD2_SMD6
SDD3_SMD7
SDWP#_SMCE#
2
C302
2 2
SDCLK
2
5IN1@ R213
MSCLK
2
5IN1@ R214
SMELWP#
2
5IN1@ R215
E9
A8
B8
1
C343
2
SD_CD#
MS_CD#
MC_PWR_CTRL_0
MC_PWR_CTRL_1/SM_R/B#
0.01U_0402_25V4Z
1
1
C8
F8
VDDPLL_33
VDDPLL_15
P13
P14
U15
AVDD_33
AVDD_33
AVDD_33
MC_PWRON#
SM_RB
C288
C291
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
U11B
PCI8412:5IN1 + 1394 + CardBus
PCI8402:5IN1 + 1394
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
C298
1 2
1
3
2
1
2
C279
1
0.1U_0402_16V4Z
1
L26
1
C275
+3VS
MBK1608301YZF_0603
1
2
0.01U_0402_25V4Z
1 1
L25
+CB_VDDPLL33
0.01U_0402_25V4Z
3
MBK1608301YZF_0603
0.1U_0402_16V4Z
2
1
2
TI PCI8412 PCI/1394/5IN1
Size
Document Number
Date:
Sheet
Tuesday, May 15, 2007
1
22
of
45
Rev
1A
5
4
3
2
1
CardBus Power Switch
+S1_VCC C352
U13
9
+S1_VCC
12V
0.1U_0402_16V4Z
+5VS
C349
PCMCIA@
C324
C287
C308
C303
5
6
0.1U_0402_16V4Z
C341
R202
S1_A16_C 1
2
PCMCIA@ 33_0402_5%
2
C314
S1_CD1#
1
PCMCIA@
100P_0402_25V8K
2
C342
S1_CD2#
1
PCMCIA@
100P_0402_25V8K
S1_RST
C15
CRST#/RESET
S1_BVD2
B12
CAUDIO/BVD2(SPKR#)
S1_CD1#
S1_CD2#
S1_VS1
S1_VS2
N15
B11
A13
B16
CCD1#/CD1#
CCD2#/CD2#
CVS1/VS1#
CVS2/VS2#
E10
A_USB_EN#
8412@ PCI7412ZHK_PBGA257
F6
F9
F12
F14
J6
J14
L6
L14
P6
P8
P10
1
A2
A17
A18
B1
B2
B3
B17
B18
B19
C1
C2
C3
C16
C17
C18
C19
D2
D3
D17
D18
E5
N14
P18
T3
T17
U1
U2
U3
U4
U12
U16
U17
U18
V1
V2
V3
V4
V12
V17
V18
V19
W2
W3
W12
W18
SHDN
CPAR/A13
CFRAME#/A23
CTRDY#/A22
CIRDY#/A15
CSTOP#/A20
CDEVSEL#/A21
CBLOCK#/A19
CPERR#/A14
CSERR#/WAIT#
CREQ#/INPACK#
CGNT#/WE#
CSTSCHG/BVD1(STSCHG#/RI#)
CCLKRUN#/WP(IOIS16#)
CCLK/A16
CINT#/READY(IREQ#)
PCI 7412
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
C361
1
+S1_VPP C339
1
C334
1
VCCD0
VCCD1
VPPD0
VPPD1
1
2
15
14
20mil
@ 0.1U_0402_16V4Z
2
@ 10U_0805_10V4Z
2
@ 0.01U_0402_25V4Z
2
@ 1U_0603_10V4Z
D
OC
VCCD0#
VCCD1#
VPPD0
VPPD1
8
PCMCIA@
TPS2211AIDBR_SSOP16
2
VCCD1#
+3VS
0_0402_5%
1
R217
PCMCIA@
43K_0402_5%
JP21
1
B10 S1_D2
C4
D1
E1
E2
E3
F2
F3
R216
F5
G6
2
H17 S1_A18
M19 S1_D14
GND
H14
E19
G15
F17
G18
F19
H15
G19
C12
C14
G17
A12
A11
F18
E12
RSVD/D2
RSVD/VD0/VCCD1#
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
R229
PCMCIA@
10K_0402_5%
7
S1_A13
S1_A23
S1_A22
S1_A15
S1_A20
S1_A21
S1_A19
S1_A14
S1_WAIT#
S1_INPACK#
S1_WE#
S1_BVD1
S1_WP
S1_A16
S1_RDY#
B:Set to "@".
3.3V
3.3V
16
CC/BE3#/REG#
CC/BE2#/A12
CC/BE1#/A8
CC/BE0#/CE1#
VPPD1
VCCD0#
VPPD0
B9
A9
C9
3
4
2
E13
E18
H18
L17
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
A15
J19
VCCB
VCCB
S1_REG#
S1_A12
S1_A8
S1_CE1#
@ 4.7U_0805_10V4Z
DATA/VD2/VPPD1
CLOCK/VD1/VCCD0#
LATCH/VD3/VPPD0
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
B
CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3
+3VS
0.1U_0402_16V4Z
10
2
@ 0.1U_0402_16V4Z
+S1_VCC
+S1_VCC
1
2
Near to PCMCIA slot.
C260
PCMCIA@
10U_0805_10V4Z
1
2
C259
PCMCIA@
0.1U_0402_16V4Z
+S1_VCC
+S1_VPP
1
2
C266
PCMCIA@
10U_0805_10V4Z
1
2
C265
PCMCIA@
0.1U_0402_16V4Z
S1_D4
S1_D6
S1_CE1#
S1_OE#
S1_A9
S1_A13
S1_WE#
+S1_VCC
S1_A16_C
S1_A12
S1_A6
S1_A4
S1_A2
S1_A0
S1_D1
S1_WP
S1_D11
S1_D13
S1_D15
S1_VS1
S1_IOWR#
S1_A18
S1_A20
+S1_VCC
S1_A22
S1_A24
S1_VS2
S1_WAIT#
S1_REG#
S1_BVD1
S1_D9
S1_CD2#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
GND
DATA3
DATA4 DATA5
DATA6 DATA7
CE1#
ADD10
OE#
ADD11
ADD9
ADD8
ADD13 ADD14
WE#
READY
VCC
VPP
ADD16 ADD15
ADD12
ADD7
ADD6
ADD5
ADD4
ADD3
ADD2
ADD1
ADD0
DATA0
DATA1 DATA2
WP
GND
GND
CD1#
DATA11 DATA12
DATA13 DATA14
DATA15
CE2#
VS1#
IORD#
IOWR# ADD17
ADD18 ADD19
ADD20 ADD21
VCC
VPP
ADD22 ADD23
ADD24 ADD25
VS2#
RESET
WAIT# INPACK#
REG#
BVD2
BVD1
DATA8
DATA9 DATA10
CD2#
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
S1_D3
S1_D5
S1_D7
S1_A10
S1_A11
S1_A8
S1_A14
S1_RDY#
+S1_VPP
S1_A15
S1_A7
S1_A5
S1_A3
S1_A1
S1_D0
S1_D2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
S1_CD1#
S1_D12
S1_D14
S1_CE2#
S1_IORD#
S1_A17
S1_A19
S1_A21
+S1_VPP
S1_A23
S1_A25
S1_RST
S1_INPACK#
S1_BVD2
S1_D8
S1_D10
C
+S1_VPP
+S1_VPP
B
PCMCIA@
FOX_WZ21131-P4-8F_LT
C:Symol with wrong Layout Symbol. Update Footprint
"DC000003D00 (FOX_1CA41121-TC-4F_68P_LT)"
F7
F10
F13
G14
H6
K6
K14
M14
N6
P7
P9
C
C10
A10
F11
E11
C11
B13
C13
A14
B14
B15
E14
A16
D19
E17
F15
H19
J17
J15
J18
K15
K17
K18
L15
L18
L19
M17
M18
N19
M15
N17
N18
P19
C354
PCMCIA@
C364
VPP
1
C347
B:Set to "@".
0.1U_0402_16V4Z
B:Set to "@".
S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3
40mil
5V
5V
@ 4.7U_0805_10V4Z
0.1U_0402_16V4Z
U11A
13
12
11
+3VS
D
0.1U_0402_16V4Z
PCMCIA@
VCC
VCC
VCC
A
A
Compal Secret Data
2007/5/4
Issued Date
2008/5/4
Deciphered Date
5
4
3
2
Title
TI PCI8412/CB socket
Size
Document Number
Date:
Sheet
1
23
of
45
Rev
1A
+3VALW_DVD
Mini-Express Card for 3G
+3VS
1
C729
@
0.1U_0402_16V4Z
+3VS
<11> PCIE_MRX_C_DVDTX_N0
<11> PCIE_MRX_C_DVDTX_P0
<11> PCIE_MTX_C_DVDRX_N0
<11> PCIE_MTX_C_DVDRX_P0
+3VS
53
GND1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
54
2
C423
0.1U_0402_16V4Z
2
B:Add +1.5VS on 3G connector to
support PCIE I/F of HD DVD fun.
+UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
+1.5VS
+UIM_PWR
C725
DVD@
0.01U_0402_25V7K
C:Chg. PN to SC1BAS16000
3G@ BAS16_SOT23-3
3G_OFF#
2
NB_RST#
+3VALW_DVD
1
2
R485
@ 0_0603_5%
1
2
C:Set to DVD@
C723
DVD@
0.1U_0402_16V4Z
1
C724
4.7U_0805_10V4Z
2
DVD@
D28
C2: JP1.7 as NC pin
for sordring issue
with PJP1.
1
R278
R275
@ 0_0402_5%
@ 0_0402_5%
A51 request to reserve from ISKAA
+3VALW
SMB_CK_CLK0
SMB_CK_DAT0
Small/B already had ESD IC
MP:Swap USB2+/- and USB8+/- for
CAMERA problem.
3G_LED# <32>
R265
3G@
4.7K_0402_5%
SMB_CK_CLK0 <8,9,13,17,28>
SMB_CK_DAT0 <8,9,13,17,28>
+UIM_PWR
+UIM_PWR
USBP8- <17>
USBP8+ <17>
1
<13> CLK_DVD#
<13> CLK_DVD
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
4.7U_0805_10V4Z
UIM_RESET
UIM_CLK
1
3G@
C388
0.1U_0402_16V4Z
UIM_DATA
2
3G@
JP1
8
7
6
5
4
3
2
1
2
<13> CLKREQ_DVD#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
2
1
C391
+1.5VS
JP5
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
GND
GND
6
5
4
3
2
1
ACES_85201-06051
FOX_AS0B226-S40N-7F
3G@
Mini-Express Card for WLAN
+3VS
+3V_WLAN
Kill SWITCH
C495
WLAN@
0.01U_0402_25V4Z
1
2
C469
WLAN@
0.1U_0402_16V4Z
1
C386
WLAN@
0.1U_0402_16V4Z
C487
4.7U_0805_10V4Z
2
WLAN@
+3VALW
1
2
D14
+3VALW
2
2
C467
WLAN@
4.7U_0805_10V4Z
+1.5VS
2
@ DAN217_SC59
+1.5VS
+3VS_WLAN
5
4
3
2
1
3
2
1
R246
100K_0402_5%
1
+3V_WLAN
G2
G1
1
SW5
A: For WLAN Wake up event.
JP7
<30> PCIE_WAKE#
<29> WLAN_BT_DATA
<29> WLAN_BT_CLK
<13> CLKREQ_WLAN#
PCIE_WAKE#
<13> CLK_WLAN#
<13> CLK_WLAN
<10> PCIE_MRX_C_WLANTX_N3
<10> PCIE_MRX_C_WLANTX_P3
<10> PCIE_MTX_C_WLANRX_N3
<10> PCIE_MTX_C_WLANRX_P3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
GND1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
54
KILL_SW# <30>
1BS003-1210L_3P
WLAN@
+3V_WLAN
XMIT_OFF#
NB_RST#
C387 WLAN@ 0.1U_0402_16V4Z
1
2
NB_RST# <11,15,17,25,28,30,34>
+3V_WLAN
SMB_CK_CLK0
SMB_CK_DAT0
<30> WL_OFF#
2
KILL_SW#
1
USBP3- <17>
USBP3+ <17>
D25
P
PCIE_WAKE#
2
100K_0402_5%
B
Y
A
G
1
R323
5
2
C543
WLAN@
0.1U_0402_16V4Z
1
2
0_1206_5%
WLAN@
3
C461
WLAN@
0.01U_0402_25V4Z
1
1
R294
3
+3VS_WLAN
4
3G_OFF# 1
2
XMIT_OFF#
WLAN@ CH751H-40PT_SOD323-2
U15
WLAN@ NC7SZ08P5X_NL_SC70-5
A:Add USB I/F with WLAN conn.,
reserve to support Realtek WLAN.
FOX_AS0B226-S40N-7F
WLAN@
Compal Secret Data
Issued Date
2007/5/4
Deciphered Date
2008/5/4
Title
Size
B
Date:
MINI PCI SLOT
Document Number
Rev
1A
Sheet
24
of
45
5
4
3
2
1
1
2
+3V_LAN
R25
3.6K_0402_5%
+3V_LAN
U4
U2
PCIE_PTX_IRX_P2
29
HSOP
2 0.1U_0402_16V7K
PCIE_PTX_IRX_N2
30
HSON
<10> PCIE_MTX_C_LANRX_P2
23
HSIP
<10> PCIE_MTX_C_LANRX_N2
24
HSIN
26
REFCLK_P
27
REFCLK_N
20
PERSTB
+LAN_CTRL18
1
VCTRL18
+LAN_CTRL15
63
VCTRL15
64
RSET
19
LANWAKEB
36
ISOLATEB
A:For LAN Wake up
+3V_LAN
<13> CLK_PCIE_LAN
<13> CLK_PCIE_LAN#
1
100K_0402_5%
EC_PME#
2
R31
<11,15,17,24,28,30,34> NB_RST#
Y1
LAN_X1 2
B:For 8111C only.
1LAN_X2
+3V_LAN
25MHZ_20P
100M@
1
1
27P_0402_50V8J
2
2
C65
C66
R291 1
8111C@
0_0603_5%
2
R483
1
R284 1
2
R283
27P_0402_50V8J
+3VS
EEDO
EDDI/AUX
EESK
EECS
2 2K_0402_1%
1
1G@ 2.49K_0402_1%
EC_PME#
<30> EC_PME#
2 1K_0402_1%
1
R482
+3V_LAN
1
C728 +
8111C@
22U_A_4VM
C
2
1
+3V_LAN_R
2
0_0603_5%
8111C@
1
+
C726
8111C@
22U_A_4VM
2
2
LAN_X2
15K_0402_5%
B:1.For 8111C only.
2.Chg. 100U to 22Ux2 bec'z no enough space.
60
C727
1
8111C@
C438
0.1U_0402_16V4Z
1000P_0402_25V8J
2
1
C429
0.1U_0402_16V4Z
54
55
56
57
LAN_LINK#
LAN_ACTIVITY#
MDIP0
MDIN0
MDIP1
MDIN1
3
4
6
7
LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1-
MDIP2
MDIN2
MDIP3
MDIN3
9
10
12
13
LAN_MDI2+
LAN_MDI2LAN_MDI3+
LAN_MDI3-
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
15
21
32
33
38
41
43
49
52
58
16
37
53
46
LED3
LED2
LED1
LED0
CKXTAL1
61
CKXTAL2
62
GVDD
65
EXPOSE_PAD
25
EGND
VDD33
VDD33
VDD33
VDD33
31
EGND
AVDD33
2
AVDD33
59
AVDD18
AVDD18
AVDD18
AVDD18
5
8
11
14
2
17
18
35
34
39
40
42
50
51
4
3
2
1
DO
DI
SK
CS
GND
NC
NC
VCC
5
6
7
8
2
NC
NC
NC
NC
NC
NC
NC
NC
NC
EVDD18
22
EVDD18
28
1
0.01U_0402_25V4Z
1 49.9_0402_1%
1 49.9_0402_1%
2
2
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C455
0.1U_0402_16V4Z
1
2
C451
0.1U_0402_16V4Z
2
0_0603_5%
8111B@
1
2
C472
0.1U_0402_16V4Z
1
1
+3V_LAN
+AVDD33
LAN_MDI2LAN_MDI2+
4
5
6
TCT2
TD2+
TD2-
24
23
22
MCT2
MX2+
MX2-
21
20
19
0.1U_0402_16V4Z
2
2
1
1
L47
1
2
C476
0.1U_0402_16V4Z
1
2
C478
0.1U_0402_16V4Z
1
2
C459
0.1U_0402_16V4Z
TCT4
TD4+
TD4-
MCT4
MX4+
MX4-
15
14
13
RJ45_MIDI0RJ45_MIDI0+
+LAN_VDD18
40mil
Mount for
8101E and
8111C.
1
C444 +
8101E@
22U_A_4VM
2
1
L46
Q6
+LAN_CTRL15
1
8111B@
2SB1188T100R_SC62-3
2
0_0603_5% 1
8101E@
+
2
+LAN_VDD18
1
2
C452
22U_A_4VM
1
C440
0.1U_0402_16V4Z
2
2
2
2
4
+LAN_VDD15
1
C473
8111B@
1000P_0402_25V8J
2
B:Mount for 8101E and 8111B.
Mount for
8101E Only
2
1
B
JP28
1 300_0402_5%
+3V_LAN
RJ45_MIDI3-
2
R345
1
Green LED-
9
Green LED+
8
PR4-
7
PR4+
RJ45_MIDI1-
6
PR2-
RJ45_MIDI2-
5
PR3-
RJ45_MIDI2+
4
PR3+
RJ45_MIDI1+
3
PR2+
RJ45_MIDI0-
2
PR1-
RJ45_MIDI0+
1
PR1+
300_0402_5%
+3V_LAN
2
10
RJ45_MIDI3+
12
Amber LED-
11
Amber LED+
C166
1
2
RJ45_GND
R78
75_0402_1%
GST5009 for GIGA LAN
TST1284 for 10/100 LAN
8111B@
2SB1188T100R_SC62-3
2
0_0603_5% 1
8101E@
+ C464
8111B@
22U_A_4VM
2
1000P_1206_2KV7K
Place these components
colsed to LAN chip
5
C565
68P_0402_50V8J
1
1
R80
SHLD4
16
SHLD3
15
SHLD2
14
SHLD1
13
TYCO_1734819-3
LANGND
1
1
C141
C174
A
75_0402_1%
2
A
0.1U_0402_16V4Z
C:Symbol is wrong, need to update.
C:Swap LED signals
1
75_0402_1%
C135
0.01U_0402_25V4Z
8111C@
0_0603_5%
B:Reserve for 8111C.
40mil
1
L48
+
C482
8101E@
22U_A_4VM
2
2
LAN_ACTIVITY#
2
C121
0.01U_0402_25V4Z
1
40mil
40mil
R81
75_0402_1%
1
1
C437
Mount for 8111B Only
+LAN_CTRL18
1
1
10
11
12
1
0.1U_0402_16V4Z
+3V_LAN
LAN_MDI0LAN_MDI0+
C120
0.01U_0402_25V4Z
0.1U_0402_16V4Z
+3V_LAN
2
C477
LAN Conn.
18
17
16
2
1
2
C435
8101E@
R84
1
0.1U_0402_16V4Z
A:Sync up with ISKAE to replace
L46/L47/L48 to Resistor.
B:L46, need to POP for 8101E and 8111C
MCT3
MX3+
MX3-
C118
0.01U_0402_25V4Z
0.1U_0402_16V4Z
B:Chg. PN from SB194350080 to SB211880000.
LAN_MDI1LAN_MDI1+
TCT3
TD3+
TD3-
1G@
0.5u_GST5009
0_0603_5%
2
C466
C
C439
Q42
LAN_MDI0LAN_MDI0+
7
8
9
1
0.1U_0402_16V4Z
2
0_0603_5%
+AVDD18
Mount
for
8101E
Only
LAN_MDI1LAN_MDI1+
1
C481
+3V_LAN
+AVDD33
1
C434
10U_0805_10V4Z
2
C454
C601
68P_0402_50V8J
MCT1
MX1+
MX1-
1
R481
2
R387
TCT1
TD1+
TD1-
0.1U_0402_16V4Z
+LAN_VDD15
LAN_LINK#
1
2
3
1
2
C475
+LAN_VDD15
1
R480
U23
LAN_MDI3LAN_MDI3+
2
C436
Place Close to Chip
2
2
B
2
C460
8101E@
8101E@ R28
C458 2
1 R27
8101E@
R83
0_0402_5%
0.1U_0402_16V4Z
R293
2
8101E@
1
1
0.01U_0402_25V4Z
8101E@
R82
0_0402_5%
1 49.9_0402_1%
1 49.9_0402_1%
1
2
C450
D
B:Mount for 8101E and 8111B.
8101E@
2
2
0.1U_0402_16V4Z
+LAN_VDD15
Place Close to Chip
R26
R24
1
2
C468
+LAN_VDD18
8111B@ RTL8111B_QFN64
8101E@
C449 2
1
2
+3V_LAN
+AVDD18
CLKREQ_LAN
Mount for 8101E Only
+LAN_VDD18
C47
1
0.1U_0402_16V4Z
AT93C46-10SI-2.7_SO8
R292
LAN_X1
45
47
48
44
3
2 0.1U_0402_16V7K
1
2
1
C93
3
D
C92
2
<10> PCIE_MRX_C_LANTX_P2
<10> PCIE_MRX_C_LANTX_N2
2
RJ45_GND
Compal Secret Data
Issued Date
2007/5/4
2008/5/4
Deciphered Date
3
2
Title
0.1U_0402_16V4Z
2
4.7U_0805_10V4Z
RTL8111B(1G)/8101E(10/100)
Size
Document Number
Date:
Sheet
1
25
of
45
Rev
1A
5
4
+5VALW_VDDA
VIN
VOUT
5
2
DELAY SENSE or ADJ
6
7
ERROR
CNOISE
1
GND
3
+VDDA
4.75v
2
0.1U_0402_16V4Z
C376
8
SD
R221
69.8K_0603_1%
C353
@ 4.7U_0805_10V4Z
SI9182DH-AD-T1-E3_MSOP8
B:Set to "@".
1
C380
4.7U_0805_10V4Z
4
C360
0.1U_0402_16V4Z
D
<15,28,30,35,38> SUSP#
+3V_DVDD
0.1U_0402_16V4Z
+AVDD_HD
4
3
NC2 2
NC1 1
2
1
2
C591
MIC@
ACES_85204-0200N
MIC@
C714
1U_0402_6.3V4Z
1
2
C711
1
C350
MIC1_L
<27> MIC1_L
C351
MIC1_R
<27> MIC1_R
C356
C355
<27> MONO_IN
C707
<17> AZ_RST_HD#
B:Chg. to link w/ SB600 bec'z chg. to KB926.
<27> NBA_PLUG
<27> MIC_SENSE
B:Remove NBA_PLUG on SENSE B.
R456
1
2
9
1
DVDD
DVDD_IO
38
25
36
AMP_RIGHT
16
MIC2_L
HP_OUT_L
39
17
MIC2_R
HP_OUT_R
41
23
LINE1_L
NC
45
24
LINE1_R
DMIC_CLK
46
CD_L
NC
CD_R
NC
44
20K_0402_1%
R464
1
2 MIC@ 20K_0402_1%
<30> EAPD
CD_GND
SENSE A
A
SENSE B
5
MIC1_R
PCBEEP
SPK output to AMP
AMP_RIGHT <27>
C
HP output to AMP
AMP_RIGHT_HP <27>
AZ_BITCLK_HD
BIT_CLK
6
AZ_BITCLK_HD
SDATA_IN
8
AZ_SDIN3_HD_R
MONO_OUT
37
LINE1_VREFO
29
GPIO1
31
MIC1_VREFO_L
28
MIC1_VREFO_R
32
MIC2_VREFO
30
VREF
27
JDREF
40
NC
33
AVSS1
AVSS2
26
42
RESET#
SYNC
SDATA_OUT
GPIO0
GPIO3
SENSE A
SENSE B
47
EAPD
48
SPDIFO
4
7
DVSS1
DVSS2
Codec Signals
39.2K
PORT-A (PIN 39, 41)
20K
PORT-B (PIN 21, 22)
10K
PORT-C (PIN 23, 24)
5.1K
PORT-D (PIN 35, 36)
39.2K
PORT-E (PIN 14, 15)
20K
PORT-F (PIN 16, 17)
10K
PORT-G (PIN 43, 44)
5.1K
PORT-H (PIN 45, 46)
4
AMP_LEFT <27>
R454
@ 10_0402_5%
AZ_BITCLK_HD <17>
MIC1_L
DGND
Impedance
C367
@1000P_0402_25V8J
AMP_LEFT_HP <27>
1
R453
2
33_0402_5%
AZ_SDIN3_HD <17>
1
10mil
10mil
10mil
C708
@ 10P_0402_50V8J
2
+MIC1_VREFO_L
+MIC1_VREFO_R
+MIC2_VREFO
C720 1
C721
1
10U_0805_10V4Z
2
B
2
100P_0402_25V8K
R224
20K_0402_1%
ALC268-GR_LQFP48
Sense Pin
2
LINE_OUT_R
1
B
1
NC
2
20
100P_0402_25V8K
100P_0402_25V8K
19
1
2
MIC1_C_L
1
2
21
1U_0402_6.3V4Z
MIC1_C_R
1
2
22
1U_0402_6.3V4Z
1
2
100P_0402_25V8K
12
1
2
100P_0402_25V8K
11
SENSE_A
SENSE_B
100P_0402_25V8K
1
15
2
3
13
34
L27
1
2
+3VS
FBMA-L11-160808-800LMT_0603
1
C329
2
35
5
C330
680P_0402_50V7K
LINE_OUT_L
43
39.2K_0402_1%
C328
NC
10
1
2
14
<17> AZ_SDOUT_HD
2
2
C368
@ 1000P_0402_25V8J
2
AMP_LEFT
<17> AZ_SYNC_HD
NBA_PLUGR455
1
C332
0.1U_0402_16V4Z
18
<17> SPK_SEL
1
C331
680P_0402_50V7K
2
JP16
2
100P_0402_25V8K
MIC2_L
2
MIC@ 1U_0402_6.3V4Z
MIC2_R
2
MIC@ 1U_0402_6.3V4Z
2
100P_0402_25V8K
10U_0805_10V4Z
2
1
R380
+MIC2_VREFO
C
1
C337
INT_MIC 1
2
MIC@ 4.7K_0402_5%
C338
1
C346
1
1
C345
220P_0402_50V8J
1
20mil C327
2
AVDD2
L29 1
0.1U_0402_16V4Z
680P_0402_50V7K
2
FBMA-L11-160808-800LMT_0603 1
1
1
1
C373
C372
C359
C366
C371
10U_0805_10V4Z
2
2
2
2
0.1U_0402_16V4Z
U29
100P_0402_25V8K
AVDD1
40mil
+VDDA
D
R222
24K_0402_1%
2
2
1
R219
0_0402_5%
2
1
R226 @ 0_0402_5%
<28,30,32,35,40> SYSON
1
+VDDA
B:Need to link SA091820030
U31
L28 1
2
FBMA-L11-160808-800LMT_0603
2
1
+5VALW
1
HD Audio Codec
3
Adjustable Output
+MIC1_VREFO_R
+MIC1_VREFO_L
AGND
DGND To AGND Bypass
C369
0.1U_0402_16V4Z
1
R247
1
R207
1
R206
1
R233
1
R218
C370
0.1U_0402_16V4Z
2
0_0603_5%
2
0_0603_5%
2
0_0603_5%
2
0_0603_5%
2
0_0603_5%
A
DGND
AGND
Compal Secret Data
2007/5/4
Issued Date
Deciphered Date
2008/5/4
3
2
Title
Size
B
Date:
HD CODEC ALC861D
Document Number
Sheet
1
Rev
1A
26
of
45
A
B
C
D
+5VS
+3VS
SPKL+
SPKL-
HP_EN
HP_R
HP_L
17
18
HP_R
HP_L
INR_H
INL_H
SET/SD#
28
BEEP
25
CP+
CPBIAS
CVSS
15
HVSS
16
GND
PGND
PGND
CGND
GND
2
23
7
13
29
CVSS
1
1
2
1
2
2
G
L9
1
1
JP6
L10
SPK_R1
SPK_R2
2 0_0603_5%
2
0_0603_5%
1
2
1 NC1
2 NC2
3
4
ACES_85204-0200N
C:Add in BOM by EMI
+MIC1_VREFO_L +MIC1_VREFO_R
10mil
10mil
2
R243
4.7K_0402_5%
JP39
5
4
<26> MIC_SENSE
MIC1_R
<26> MIC1_R
MIC1_L
MONO_IN <26>
2
1U_0402_6.3V4Z
1
2
R452
2.4K_0402_5%
2
2
8
L33
MIC1_R_1
1
2
KC FBM-L11-160808-121LMT 0603
L32
MIC1_L_1
1
2
KC FBM-L11-160808-121LMT 0603
1
1
C383
C384
@
D17
3
6
2
1
7
FOX_JA6033L-5S1-TR
J2
JUMP_43X39
@
2
Q60
MMBT3904_SOT23-3
2
B
3
3
4
ACES_85204-0200N
C175
@ 10P_0402_50V8J
2
1
C
1
1 NC1
2 NC2
D3 PACDN042Y3R_SOT23-3
2
R443
1
2
560_0402_5%
C173
10P_0402_50V8J @
1
2
3
R451
20K_0402_5%
1
2
L19
SPK_L1
SPK_L2
1
R242
4.7K_0402_5%
C706
1
2
in BOM by EMI
JP18
2 0_0603_5%
2
0_0603_5%
2
+VDDA
2
C701 1
1U_0402_6.3V4Z
3
SPKR+
SPKR-
C722
Microphone-In Jack
R446
1
2
560_0402_5%
1
1
Right Speaker Connector
1
<26> MIC1_L
PCI Beep
5
P
2
SPKL+
SPKL-
A:sync up with ISKAE to replace L to R.
26
12
14
3
L18
1
AMP_BEEP
2
1U_0402_6.3V4Z
AMP_CP+
AMP_CP1
2.2U_0603_6.3V4Z
AMP_BIAS
1
2.2U_0603_6.3V4Z
2
0.1U_0402_16V4Z
2
2
2
1
1
8
9
24
LOUT+
LOUT-
4
6
R445
10K_0402_5%
C702 1
1U_0402_6.3V4Z
1
2
/AMP EN
D6 PACDN042Y3R_SOT23-3
2
C:Add
Left Speaker Connector
+3VS
EC Beep
C713
AGND
J3
JUMP_43X39
@
2
27
B:Co-Layout for
APA2056A and APA2057A
<17> SB_SPKR
5
4
10
20
1
22
21
APA2057ARI-TRL_TSSOP28
<30> BEEP#
14
13
12
11
10
09
08
1
2
2
C344
1
C336
Gain HP 0dB
SPK 10dB
19
ROUT+
ROUT-
1
1
SPKR+
SPKR-
INR_A
INL_A
2
C719
VCC
CD2#
D2
CP2
SD2#
Q2
Q2#
ENCODER_DIR <30>
ENCODER_PULSE <30>
SM05_SOT23
HP_EN
AMP_RHPIN_L
2
24K_0402_5%
AMP_LHPIN_L
2
EC_EAPD#
24K_0402_5%
C333
CD1#
D1
CP1
SD1#
Q1
Q1#
GND
74LCX74MTC_TSSOP14
2
1
2
3
1
1
C716
1
AMP_EN#
2 100K_0402_5%
2 AMP_RHPIN R458
2.2U_0603_6.3V4Z
2 AMP_LHPIN R459
2.2U_0603_6.3V4Z
U28
220P_0402_50V8J
1
C709
1
C712
2
2
1
2
3
4
5
6
7
220P_0402_50V8J
<26> AMP_LEFT_HP
1
C715
1
<26> AMP_RIGHT_HP
1
2
R462 10K_0402_5%
Y
74LVC1G14GW_SOT353-5
2
3
5
AMPL
3
R223 1
3
4
AMPR
2
0.22U_0402_10V4Z
2
0.22U_0402_10V4Z
R208 1
2 100K_0402_5%
+5VS
B
1
1
C340
1
C348
2.2U_0603_6.3V4Z
<26> AMP_LEFT
COM
1
4
VDD
CVDD
U30
PVDD
PVDD
2
A
1
2
R461 10K_0402_5%
2
U32
SW_XRE094_3P
11
1
C374
HVDD
C718
1
10U_0805_10V4Z
2
2
1U_0402_6.3V4Z
C335
1
0.1U_0402_16V4Z
C357
680P_0402_50V7K
W=40mil
+3VS
0.1U_0402_16V4Z
C710
0.1U_0402_16V4Z
1
A
0.01U_0402_25V4Z
2
C365
2
0.01U_0402_25V4Z
+5VS
0.1U_0402_16V4Z
1
1
+3VS
+AMP_HVDD
2
0_0603_5%
2
@ 0_0603_5%
DIP
1
R227
1
R220
R460
10K_0402_5%
R457
100K_0402_5%
2
1
DIP
2
+5VS
<26> AMP_RIGHT
R463
10K_0402_5%
SW6
C326
0.01U_0402_25V4Z @
B:1.For 2057 reserve
R198 mount, Q25 unmount
Add R484 for gain adj
2.Remove R198, R484 and Q25
C717
1
+3VS
NC
2
EC_EAPD#
1
1U_0402_6.3V4Z
4
1 @ 0_0402_5%
+3VS
C:Chang PN to
DEB00000600
1
R205
100K_0402_5%
R201
2
<30> EC_EAPD_R#
Volume Control
1
C325
@ 0.01U_0402_25V4Z
2
HP_EN
1
2
E
3
E
2
1
2
R244 20_0402_5%
1
2
20_0402_5%
C381
A:Set PCMCIA@ on CardBus Beep circuit
B:Remove NSE_DPR circuit, bec'z chg. to KB926.
2007/5/4
Issued Date
Deciphered Date
2008/5/4
B
4
3
6
2
1
2
C
D
8
C382
Title
Size
B
Date:
2
2
3
1
Compal Secret Data
A
<26> NBA_PLUG
HPR
HPL
1
R240
@
0_0402_5%
2
R241
@
0_0402_5%
1
7
FOX_JA6033L-5S1-TR
D18
@
AGND
1
SM05_SOT23
1
1
HP_L
L31 1
HPR_R
2
KC FBM-L11-160808-121LMT 0603
L30 1
HPL_R
2
KC FBM-L11-160808-121LMT 0603
10P_0402_50V8J
HP_R
10P_0402_50V8J
1
1
@ R447
10K_0402_5%
R245
D36
1
C704
0.01U_0402_25V4Z
PCMCIA@
1
2
560_0402_5%
PCMCIA@
2
1
2
5
R448
2
<22> PCM_SPK
C703 1
1U_0402_6.3V4Z
2 PCMCIA@
JP38
Headphone-Out Jack
CardBus Beep
AMP&Audio Jack/MDC
Document Number
Sheet
E
Rev
1A
27
of
45
+5VS
MDC 1.5 Conn.
1
+3V_SB
2
C562
[email protected]_0805_10V4Z
+3VS
2 IDE_SDIORDY
4.7K_0402_5%
1
R382
2
C315
NEW@
0.1U_0402_16V4Z
1
2
1
C305
@ 10U_0805_10V4Z
2
C731
@
1
2
C732
@
1
2
<17> IDE_SDIOW#
<17> IDE_SDIORDY
<17> INT_IRQ15
<17> IDE_SDA1
<17> IDE_SDA0
<17> IDE_SDCS1#
2
1
R374
100K_0402_5%
+1.5VS
C306
NEW@
0.1U_0402_16V4Z
1
2
1
+5VS
C307
@ 10U_0805_10V4Z
2
C317
NEW@
0.1U_0402_16V4Z
IDE_SDIORDY
+5VS
1
2
C318
@ 10U_0805_10V4Z
2
R348
1 SEC_CSEL
470_0402_5%
1
C734
@ 0.1U_0402_16V4Z
+3VALW_CARD
+3VS_CARD
Imax = 0.275A
C312
NEW@
1
2
C313
NEW@
10U_0805_10V4Z
1
2
1
2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
2
OCTEK_CDR-50JL1G
+1.5VS_CARD
Imax = 1.35A
C321
NEW@
0.1U_0402_16V4Z
C316
NEW@
10U_0805_10V4Z
Imax = 0.75A
1
2
C323
NEW@
0.1U_0402_16V4Z
1
2
C322
NEW@
10U_0805_10V4Z
A:This symbol is for IALAA
only, to add these two
pins for Boss Hole.
1
2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
C733
@
1
C730
@
2
0.1U_0402_16V4Z
2
B:Set to "@"
1
SIDE_RST#
0.1U_0402_16V4Z
1 1
@ 10_0402_5% @ 10P_0402_50V8J
MDC@
ACES_88018-124G
+3V_SB
8
O
1
2
IDE_SDDREQ <17>
IDE_SDIOR# <17>
IDE_SDDACK# <17>
IDE_PDIAG#1
W=80mils
2
R363
2
+5VS
100K_0402_5%
IDE_SDA2 <17>
IDE_SDCS3# <17>
+5VS
1
C584 0.1U_0402_16V4Z
1
C735 1
2
C736
@
2
0.1U_0402_16V4Z
2
SIDE_RST#
IDE_SDD7
IDE_SDD6
IDE_SDD5
IDE_SDD4
IDE_SDD3
IDE_SDD2
IDE_SDD1
IDE_SDD0
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
52
C571
Connector for MDC Rev1.5
+3VS
B
U20C
JP29
AZ_BITCLK_MD <17>
51
13
14
15
16
17
18
GND
GND
GND
GND
GND
GND
1 AZ_SDIN0_MD_R
MDC@33_0402_5%
2
R357
10
2
0.1U_0402_16V4Z
IDE_SDD[0..15]
<17> IDE_SDD[0..15]
R358
<17> AZ_SDIN0_MD
NB_RST#
7
2
4
6
8
10
12
0.1U_0402_16V4Z
AZ_SDIN0_MD_R
<17> AZ_RST_MD#
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
0.1U_0402_16V4Z
<17> AZ_SYNC_MD
A
+3V_SB
JP14
1
3
5
7
9
11
9
<17> SIDERST#
<11,15,17,24,25,30,34> NB_RST#
<17> AZ_SDOUT_MD
0.1U_0402_16V4Z
2
14
2
1
C580
P
C563
[email protected]_0402_16V4Z
2
0.1U_0402_16V4Z
2
1
C578
0.1U_0402_16V4Z
+3VS
52
C569
MDC@1000P_0402_25V8J
10U_0805_10V4Z
2
1
1
C579
G
1
1
C586
C585
10U_0805_10V4Z
51
1
2
Place Components closely to ODD Conn.
ODD CONN
C:Reserve
C730~C736 by EMI.
@
0.1U_0402_16V4Z
B:relink DC030006O00.
JP20
+3V_SB
<17> USBP9<17> USBP9+
U12
1
R203
2EXP_CPPE#
100K_0402_5%
+3VS
+3V_SB
share with USB OC PIN
need always pull high
+1.5VS
CP_USB#
EXP_CPPE#
<15,26,30,35,38> SUSP#
<26,30,32,35,40> SYSON
1
1
2
1
D
A
3
S
RCLKEN 2
G
Q22
2N7002_SOT23-3
NEW@
G Vcc
B
1
3
2
2
CLKREQ#
5
2
R183
NEW@
10K_0402_5%
C300
NEW@
0.1U_0402_16V4Z
3.3Vout1
3.3Vout2
1.5Vin1
1.5Vin2
14
15
4
3
2
CPUSB#
CPPE#
STBY#
SHDN#
SYSRST#
7
8
Aux_out
20
1.5Vout1
1.5Vout2
16
17
OC#
23
RCLKEN
PERST#
22
9
3.3Vaux_in
18
19
GND
R185
NEW@
10K_0402_5%
NB_RST#
21
3.3Vin1
3.3Vin2
11
+3VS
+3VS
1
+3VS
5
6
60mils
CP_USB#
+3VS_CARD
<8,9,13,17,24> SMB_CK_CLK0
<8,9,13,17,24> SMB_CK_DAT0
+1.5VS_CARD
40mil
+3VALW_CARD
<16,30> EC_SWI#
+3VALW_CARD
40mil
+1.5VS_CARD
PERST#
+3VS_CARD
<17> EXP_CPPE#
<13> CLK_NEW#
<13> CLK_NEW
RCLKEN
PERST#
CLKREQ#
EXP_CPPE#
<11> PCIE_MRX_C_NEWTX_N1
<11> PCIE_MRX_C_NEWTX_P1
NC1
NC2
NC3
NC4
NC5
2 CP_USB#
NEW@100K_0402_5%
1
10
12
13
24
1
R204
<11> PCIE_MTX_C_NEWRX_N1
<11> PCIE_MTX_C_NEWRX_P1
NEW@
TPS2231PWPR_PWP24
C:Swap PCIE Tx/Rx signals.
27
28
U10
Y
4
NEW@
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
GND
PETn0
GND
PETp0
GND
GND
GND
29
30
31
32
GND
GND
FOX_1CH411ASC-MN
NEW@
CLKREQ_NEW# <13>
Compal Secret Data
Issued Date
2007/5/4
Deciphered Date
2008/5/4
Title
Size
B
Date:
TPM/ ODD CONNECTORS
Document Number
Sheet
28
Rev
1A
of
45
Int.Check
Camera
Conn
5VS or 3VS
+5VALW
JP11
1
2
3
4
5
GND1
GND2
+5VS
W=20mils
1
2
R484 CAMERA@ 0_0603_5%
1
2
R343 @
0_0603_5%
1
2
3
4
5
6
7
+USB_VCCC
1
2
USBP7- <17>
USBP7+ <17>
C598
FP@
0.1U_0402_16V4Z
1
2
JP17
5
4
3
2
1
FP@
ACES_85201-0505
+5VS
D32
USBP7+
VIN
IO1
3
IO2 GND
1
4
4
3
3
USBP5-
<17> USBP0+
1
1
L21
2
2
3
VIN
IO1
+5VALW
IO2 GND
1
+5VALW
+USB_VCCC
C231
@ 4.7U_0805_10V4Z
4
VIN
IO1
2
3
IO2 GND
1
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
8
7
6
5
USB CONN.2
1
G528P1UF_SO8
2
+USB_VCCC
W=60mils
C672
0.1U_0402_16V4Z
1
1
2
4
+
C677
2
C:Remove R135 and R141, leave
Chock for AMD plateform
1
1
2
0.1U_0402_16V4Z
2
C674
1000P_0402_25V8J
L24
<17> USBP1<17> USBP1+
GND
JP32
4
4
3
3
1
1
2
2
1
2
3
4
USBP1-_R
USBP1+_R
+5VALW
WCM2012F2S-900T04_0805
VCC
DD+
GND
GND
GND
GND
GND
5
6
7
8
P-TWO_CU304G-A0G1G-P
CIR@
IRM-V538/TR1_3P
C375
CIR@
4.7U_0805_10V4Z
USBP0+_R
@ PRTR5V0U2X_SOT143-4
@ 150U_Y_6.3VM
U33
Vout
5
6
7
8
USB_EN#
<30> USB_EN#
1
GND
GND
GND
GND
P-TWO_CU304G-A0G1G-P
C653
R230
CIR@
100_0805_5%
<30> CIR_IN
VCC
DD+
GND
U7
B:Set to "@"
VCC
1000P_0402_25V8J
JP30
USBP0-_R
+5VALW
GND
2
1
2
3
4
USBP5+
2
1
2
3
4
2
2
0.1U_0402_16V4Z
C644
USBP0-_R
USBP0+_R
D34
4
3
1
WCM2012F2S-900T04_0805
<17> USBP0-
+5VALW_CIR
1
D7
USBP7-
CIR
C643
2
C:Remove R114 and R117, leave
Chock for AMD plateform
+3VS
2
+
C681
150U_Y_6.3VM
<17> USBP5<17> USBP5+
ACES_88266-05001
CAMERA@
4
W=60mils
+3VS
1
C566
0.1U_0402_16V4Z
CAMERA@
USBP7USBP7+
USB CONN. 1
Fingerprint Conn
+CAM_VDD
D9
USBP1-_R
4
VIN
IO1
2
3
IO2 GND
1
USBP1+_R
USB Small Board
BlueTooth Interface
+5VS
+5VALW
+3VS
+USB_VCCA
U27
2
1
2
3
4
1
3
R346
1
2
G
3
USB_EN#
C705
@4.7U_0805_10V4Z
S
1
G
D
D
1
2
2
BT@ 100K_0402_5%
2
BT@
C558
1000P_0402_25V8J
Q52
BT@AO3413_SOT23
G528P1UF_SO8
+USB_VCCA
JP22
1
2
3
4
5
6
7
8
9
10
11
12
+BT_VCC
Q51
BT@
2N7002_SOT23-3
+5VALW
JP12
12
11
D12
GND2
GND1
USBP6-
<17> USBP4+
<17> USBP4<24> WLAN_BT_CLK
<17> BT_DET#
<30> BT_RST#
<24> WLAN_BT_DATA
+BT_VCC
(MAX=200mA)
BT_DETACH
1
2
Module ID
Indication for polarity of reset
Reset input High Active --> Low ,
Reset input Low Active --> Open
8
7
6
5
B:Set to "@"
1
Pull high at SB600 side
OUT
OUT
OUT
FLG
R477
4.7K_0402_5%
C570
BT@
2
C567
BT@
10
9
8
7
6
5
4
3
2
1
10
9
8
7
6
5
4
3
2
1
4
VIN
IO1
2
3
IO2 GND
1
USBP6+
USBP6-
<17> USBP6+
<17> USBP6-
USBP6+
<17> USBP2+
<17> USBP2-
USBP2+
USBP2-
MP:Swap USB2+/- and USB8+/- for
CAMERA problem.
+5VALW
ACES_85201-1205
D11
USBP2-
4
VIN
IO1
2
3
IO2 GND
1
USBP2+
ACES_87213-1000G
BT@
1
<30> BT_PWR
C557
BT@
0.1U_0402_16V4Z
S
R347
1M_0402_5%
BT@
GND
IN
IN
EN#
B:Add PD 4.7K bec'z chg. to KB926.
Compal Secret Data
10U_0805_10V4Z 0.1U_0402_16V4Z
Issued Date
2007/5/4
Deciphered Date
2008/5/4
Title
Size
B
Date:
USB Conn.
Document Number
Rev
1A
Sheet
29
of
45
5
4
3
2
1
+3VALW
1
C575
1
L55
2
0.1U_0402_16V4Z
ECAGND
2
0_0603_5%
0.1U_0402_16V4Z
1 C572
1
C582
0.1U_0402_16V4Z
1
2
C540
2
2
0.1U_0402_16V4Z
C546
2
2
0.1U_0402_16V4Z
2
C600
1000P_0402_25V8J
1
1
B:Chg. U24 from KB910 to KB926.
C551
1000P_0402_25V8J
D
CLK_PCI_EC
1
<16>
<16>
<16,22,34>
<16,34>
<16,34>
<16,34>
<16,34>
<16,34>
2
R339
@ 10_0402_5%
1
C553
@ 22P_0402_50V8J
1
2
3
4
5
7
8
10
GATEA20
EC_KBRST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
CLK_PCI_EC 12
13
ECRST#
37
20
38
<16> CLK_PCI_EC
<11,15,17,24,25,28,34> NB_RST#
2
<17> EC_SCI#
<35> STB_WLAN
+3VALW
R340
47K_0402_5%
2
1
2
C561
ECRST#
1
0.1U_0402_16V4Z
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
77
78
79
80
<32,33> EC_REVBTN#
C
<32,33> KSI[0..7]
<32,33> KSO[0..17]
KSI[0..7]
KSO[0..17]
+5VALW
RP17
1
2
3
4
8
7
6
5
<31,37>
<31,37>
<6,15>
<6,15>
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_DA2
EC_SMB_CK2
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
21
23
26
27
PWM Output
AD
INVT_PWM <15>
BEEP# <27>
ENCODER_DIR <27>
ACOFF <38>
BATT_TEMPA
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
63
64
65
66
75
76
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
68
70
71
72
DAC_BRIG <15>
EN_DFAN1 <34>
IREF <38>
83
84
85
86
87
88
EC_EAPD_R# <27>
USB_EN# <29>
WL_BT_LED# <32>
SATTLATE_LED# <32>
TP_CLK <33>
TP_DATA <33>
DA Output
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
<32,33> EC_PLAYBTN#
<32,33> EC_STOPBTN#
<32,33> EC_FRDBTN#
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
BATT_TEMPA
AVCC
VCC
VCC
VCC
VCC
VCC
VCC
U24
67
1
9
22
33
96
111
125
+3VALW
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
PSCLK1/GPIO4A
KSI4/GPIO34
PSDAT1/GPIO4B
KSI5/GPIO35
PSCLK2/GPIO4C
PS2 Interface
KSI6/GPIO36
PSDAT2/GPIO4D
KSI7/GPIO37
TP_CLK/PSCLK3/GPIO4E
KSO0/GPIO20
TP_DATA/PSDAT3/GPIO4F
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
SDICS#/GPXOA00
KSO4/GPIO24
SDICLK/GPXOA01
KSO5/GPIO25 Int. K/B
SDIDO/GPXOA02
KSO6/GPIO26 Matrix
SDIDI/GPXID0
SPI
Device
Interface
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
SPIDI/RD#
KSO10/GPIO2A
SPIDO/WR#
SPI Flash ROM SPICLK/GPIO58
KSO11/GPIO2B
KSO12/GPIO2C
SPICS#
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
CIR_RX/GPIO40
KSO16/GPIO48
CIR_RLC_TX/GPIO41
KSO17/GPIO49
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
GPIO BATT_LOW_LED#/GPIO54
SCL1/GPIO44
SDA1/GPIO45
SUSP_LED#/GPIO55
SM
Bus
SCL2/GPIO46
SYSON/GPIO56
SDA2/GPIO47
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
97
98
99
109
ADP_IR
MODE#
BTN_ID
73
74
89
90
91
92
93
95
121
127
1
C587
ADP_I <38>
2
0.22U_0402_10V4Z
BATT_TEMPA <37>
BATT_OVP <38>
+3VALW
MODE# <32>
KILL_SW# <24>
BTN_ID <32>
MODE#
2
100K_0402_5%
1
R470
Analog BTN ID definition,
Please see page 3.
+3VALW
2
R383
1
100K_0402_5%
+5VS
TP_CLK
1
4.7K_0402_5%
TP_DATA
1
4.7K_0402_5%
STRAP
STB_LAN <35>
STB_SB <35>
VGATE <42>
119
120
126
128
D
R364
100K_0402_5%
1
2
ADP_IR
BTN_ID
TP_CLK
TP_DATA
ECAGND
1
0.01U_0402_25V4Z
2
C574
STRAP
2
R338
2
R337
2
R471
C
1
4.7K_0402_5%
EC_SI_SPI_SO <31>
EC_SO_SPI_SI <31>
EC_SPICLK <31>
SPI_CS# <31>
CIR_IN <29>
ENCODER_PULSE <27>
FSTCHG <38>
BATT_FULL_LED# <32>
CAPS_LED# <33>
BATT_CHG_LOW_LED# <32>
POWER_LED# <32>
SYSON <26,28,32,35,40>
VR_ON <42>
ACIN_R
+3VALW
2
R341
1
100K_0402_5%
D33
1
<32,36> ACIN
ACIN_R
2
4.7K_0804_8P4R_5%
B
R315
100
101
102
103
104
105
106
107
108
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
110
112
114
115
116
117
118
V18R
124
GPI
EC_RSMRST# <17>
EC_LID_OUT# <17>
EC_ON <32>
EC_SWI# <16,28>
SB_PWRGD <6,16>
BKOFF# <15>
WL_OFF# <24>
ALI/MH# <37,38>
CURSOR_LED <33>
B
+3VALW
IE_BTN#
2
100K_0402_5%
NB_PWRGD <11>
ENBKL
EAPD <26>
EC_THERM# <17>
BT_PWR <29>
BT_RST# <29>
IE_BTN# <32>
IE_BTN#
ENBKL
AGND
XCLK1
XCLK0
69
15P_0402_50V8J
4
1
IN
OUT
2
NC
NC
1
C542
Y5
122
123
GND
GND
GND
GND
GND
C RY1
C RY2
3
2
15P_0402_50V8J
A
1
2
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
2C RY2
1
@ 20M_0603_5%
C541
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
11
24
35
94
113
C RY1
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
<16> PM_SLP_S3#
<16> PM_SLP_S5#
<17> EC_SMI#
<32> LID_SW#
<15,26,28,35,38> SUSP#
<16> PBTN_OUT#
<25> EC_PME#
<24> PCIE_WAKE#
<34> FAN_SPEED1
<35> VLDT_EN
<34> E51_TXD
<34> E51_RXD
<32> ON/OFFBTN#
<32> PWR_SUSP_LED
<33> NUM_LED#
KB926QFA1_LQFP128_14X14
1
R330
2
0_0402_5% VGA@
1
R1173
VGA_ENBKL <15>
2
0_0402_5% UMA@
1
R1174
UMA_ENBKL <11>
2
@ 2K_0402_5%
1
R1175
B:Set R1175 with "@".
ECAGND
A
32.768KHZ_12.5P_1TJS125BJ4A421P
MP:ENE's recommend, change C541 and C542 from 10P to 27P.
MP:ENE's recommend, change back C541 and C542 from 27P to 15P.
Compal Secret Data
2007/5/4
Issued Date
Deciphered Date
2008/5/4
5
4
3
2
Title
ENE-KB910
Date:
Rev
1A
Sheet
1
30
of
45
+3VALW
+5VALW
C527
+5VALW
R318
100K_0402_5%
A0
A1
A2
GND
1
2
3
4
R325
1
INT_SPI_CS#
1
100K_0402_5%
2
22_0402_5%
4
Y
3
AT24C16AN-10SU-2-7_SO8
U21
R303
2
R305
5
VCC
WP
SCL
SDA
G Vcc
8
7
6
5
1
0.1U_0402_16V4Z
2
U22
<30,37> EC_SMB_CK1
<30,37> EC_SMB_DA1
2
1
0.1U_0402_16V4Z C538
1
2
B
A
2
1
INT_FLASH_EN#
1
100K_0402_5%
2
SPI_CS#
SPI Flash (8Mb*1)
B:Chg. to SPI ROM.
+3VALW
C507
0.1U_0402_16V4Z
SPI_CS#
<30> EC_SPICLK
<30> EC_SO_SPI_SI
1
R472
EC_SPICLK
1
R473
2
R474
1
20mils
U19
2
8
VCC
3
W
7
HOLD
VSS
4
INT_SPI_CS#
2
1 S
0_0402_5% @
SPI_CLK_R
2
6 C
0_0402_5%
1 EC_SO_SPI_SI_R 5 D
Q 2
0_0402_5%
SST25LF080A_SO8-200mil
EC_SI_SPI_SO_R
2
R475
1
0_0402_5%
EC_SI_SPI_SO <30>
JP50
<30> SPI_CS#
<17> SB_INT_FLASH_SEL
EC_SI_SPI_SO_R
1
3
5
7
1
3
5
7
2
4
6
8
2
4
6
8
INT_FLASH_EN#
SPI_CLK_R
EC_SO_SPI_SI_R
+3VALW
@ E&T_2941-G08N-00E~D
C:Chg. PN to LTC00000200
Compal Secret Data
Issued Date
2007/5/4
Deciphered Date
2008/5/4
Title
Size
B
Date:
BIOS& I/O PORT
Document Number
Rev
1A
Sheet
31
of
45
4
3
Power Button
For debug only
D2
2
3
MODE# <30>
2
IEBTN# 1
51_ON#
3
DAN202UT106_SC70-3
Lid SW
IE_BTN# <30>
BTN
51_ON#
+3VALW
TOP
B:Remove
SW1 from DVT for
interfere issue.
DAN202UT106_SC70-3
B:Chg. to SOT-23 type.
2
D1
1
1
100K_0402_5%
3
2
4
2
4
ON/OFFBTN_R# 1
3
3
10K
2
G
2
1
2
2
120_0402_5%
BATT_CHG_LOW_LED# <30>
BATT_FULL_LED#
1
HT-191NB_BLUE_0603
BATT_FULL_LED# <30>
2
2 300_0402_5% 2
WL&BT LED
10K
2
G
1
D
2
Q26
2N7002_SOT23-3
3
POWER_LED# <30>
DTA114YKAT146_SOT23-3
WL_BT_LED# <30>
D26
1
VF=1.9V
1
WLAN@ HT-191UD_AMBER_0603
1
HT-191UD_AMBER_0603
SYSON
Q31
1
R235
2
120_0402_5%
2
1
HT-191NB_BLUE_0603
B:Chg. to link SC5191NB000
3G LED
+5VS
C
POWER LED
47K
1
2
2
R250 WLAN@ 300_0402_5%
2
+5VALW
3
+5VS
2
C378
D21
1
BATT_CHG_LOW_LED#
1
HT-191UD_AMBER_0603
R234 1
D27
D38
LID_SW# <30>
1
PWR_SUSP_LED <30>
S
1
R232
VOUT
D22
2
2
300_0402_5%
VDD
2N7002_SOT23-3
BATT CHARGE/FULL LED
1
R231
D
+5VALW
C377
1
3
SYSON <26,28,30,35,40>
Q27
2N7002_SOT23-3
3
S
2
G
1
HT-191NB_BLUE_0603
D
2
2
120_0402_5%
S
1
R252
+5VALW
2
D19
RLZ20A_LL34
C358
0.01U_0402_25V4Z
SYSON
Q30
D
C
Q38
2N7002_SOT23-3
S
1
R236
47K_0402_5%
SUSPEND LED
47K
Q37
1
2
1
1
R251
10K_0402_5%
+5VALW
D20
D
2
G
3
2
<30> EC_ON
ACIN <30,36>
51_ON# <36>
DAN202UT106_SC70-3
@ SMT1-05-A_4P
ACES_85201-1005N
AC IN LED
51_ON#
3
TEST@
SMT1-05-A_4P
U14
APX9132ATI-TRL_SOT23-3
ON/OFFBTN# <30>
2
1
0.1U_0402_16V4Z
3
1
EC_PLAYBTN#
EC_STOPBTN#
EC_FRDBTN#
EC_REVBTN#
<30> BTN_ID
1
6
5
<30,33> KSO0
<30,33>
<30,33>
<30,33>
<30,33>
1
2
3
4
5
6
7
8
9
10
GND
GND
6
5
ON/OFFBTN_R# 1
IEBTN#
2
3
MODEBTN#
4
KSI1
5
KSI2
6
KSI3
7
KSI5
8
9
10
11
12
2
GND
D13
1
SW1
1
SW4
JP2
D
+3VALW
+3VALW
R228
1
SW/LED Connector
MODEBTN#
2
10P_0402_50V8J
5
D37
R249
1
3G@
2
2
120_0402_5%
VF=2.8V
1
3G@HT-191NB_BLUE_0603
Satellite LED
3G_LED# <24>
B
B
+5VS
3
B:Chg. HDD LED control circuit
bec'z chg. to KB926.
47K
Q130
2N7002_SOT23-3
HDD LED
D23
1
Q33
SATEL@
2
SATTLATE_LED# <30>
S
2
D
1
2
R253
120_0402_5%
10K
1
3
HT-191NB_BLUE_0603
B:Chg. from 120 to 100 to
make LED more brightness.
2
G
+5VS
1
D15
S
D
1
100K_0402_5%
1
3
2
G
2
R476
Q131
2N7002_SOT23-3
1
R238
2
SATEL@ 100_0402_5%
HDD_LED# <17>
VF=2.8V
1
2
SATEL@ 12-21-BHC-ZL1M2RY-2C_BLUE
D16
1
R239
2
SATEL@ 100_0402_5%
A
2
SATEL@
1
A
12-21-BHC-ZL1M2RY-2C_BLUE
Compal Secret Data
2007/5/4
Issued Date
Deciphered Date
2008/5/4
5
4
3
2
Title
Comm. SW/ Sub Conn./LEDS
Date:
Sheet
1
32
of
Rev
1A
45
5
4
3
2
KEYBOARD CONN.
TP Conn.
1
KSO2
KSI[0..7]
1
C630
1
C616
KSO0
1
C629
KSO4
1
C615
KSO3
1
C628
KSO5
1
C614
KSO14
1
C627
KSO6
1
C613
KSO7
1
C626
KSO13
1
C612
KSO8
1
C625
KSO9
1
C611
KSO10
1
C624
KSO11
1
C610
KSO12
1
C623
KSO15
1
C609
KSI7
1
C622
KSI2
1
C608
KSI3
1
C621
KSI4
1
C607
KSI0
1
C620
KSI5
1
C606
KSI6
1
C619
KSI1
1
C605
CAPS_LED#
1
C604
CURSOR_LED
1
C618
NUM_LED#
1
C617
KSI[0..7] <30,32>
KSO[0..15]
KSO1
KSO[0..15] <30,32>
JP19
JP15
D
+5VS
TP_DATA
TP_CLK
<30> TP_DATA
<30> TP_CLK
SW_R
SW_L
14
13
G2
G1
12
11
10
9
8
7
6
5
4
3
2
1
12
11
10
9
8
7
6
5
4
3
2
1
SW_R
SW_L
TP_DATA
TP_CLK
1
C573
1
C564
1
C583
1
C581
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
2
@ 33P_0402_50V8J
2
@ 33P_0402_50V8J
2
@ 33P_0402_50V8J
2
@ 33P_0402_50V8J
ELCO_086212012340800
TP Button
SW2
SW_L
SW3
1
3
2
4
SW_R
1
3
2
4
C
SMT1-05-A_4P
6
5
6
5
SMT1-05-A_4P
KSO2
KSO1
KSO0
KSO4
KSO3
KSO5
KSO14
KSO6
KSO7
KSO13
KSO8
KSO9
KSO10
KSO11
KSO12
KSO15
KSI7
KSI2
KSI3
KSI4
KSI0
KSI5
KSI6
KSI1
1
R389
2
300_0402_5%
+3VS
1
R388
2
300_0402_5%
+3VS
2
1
CAPS_LED# R391 300_0402_5%
CURSOR_LED
NUM_LED#
+3VS
CAPS_LED# <30>
CURSOR_LED <30>
NUM_LED# <30>
ACES_88170-3400
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
2
100P_0402_25V8K
D
C
For EMI Request
B
B
A
A
Compal Secret Data
2007/5/4
Issued Date
Deciphered Date
2008/5/4
5
4
3
2
Title
KB/Touch Pad& hibernation
Date:
Sheet
1
33
of
Rev
1A
45
D
E
FD3
FD2
5
4
GND
GND
3
2
1
3
2
1
C:Chg. PN to
SC1BAS16000
1
R312
1
C531
@ 1000P_0402_25V8J
M1
R80x100
1
M7
R80x100
M8
R80x100
M9
R80x100
CLK_PCI_SIO <16>
@
H3
H_C252D118
@
1
1
@
H33
H_O118X197D118X197N
H5
H_O197X55D158X16
1
1
1
@
1
H9
H_C236D122
3
@
H28
H_O173X59D134X20
H37
H_O173X59D134X20
H8
H17
H_C236B73D43 H_C236B73D43
@
H35
H36
H_C236B73D43 H_C236B73D43
@
1
@
1
@
1
@
1
1
H11
H_C236D122
@
@
CLK_14M_SIO <13>
H21
H20
H15
H16
H_C276BC185D165H_C276BC185D165H_C276BC185D165H_C276BC185D165
@
Compal Secret Data
2007/5/4
Issued Date
@ ACES_85201-2005
Deciphered Date
2008/5/4
B
@
1
@
C
@
@
4
1
@
1
H25
H19
H_O158X59DO118X20 H_O158X59DO118X20
A
H31
H_C252D118
H18
H_C236D43
@
1
R85
H12
H_S315D118
@
@
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ1#
NB_RST#
2 @ 0_0402_5%
CLK_PCI_SIO
SERIRQ
@
1
H26
H_S315D118
1
@
1
H13
H_S315D118
H29
H_O173X59D134X20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
H1
H_C252D118
@
@
@
1
@
1
@
1
4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
H14
H_C236D122
@
JP10
@
1
@ ACES_85205-0400
+3VS
H2
H_C252D118
@
H22
H_C276D158
1
H4
H_C118D118N
LPC Debug Port
H10
H24
H_C252D118 H_C252D118
@
@
C692
22P_0402_50V8J
LPC Debug card
H27
H_C252D118
1
E51_RXD
E51_TXD
@
1
3
H30
H_C252D118
@
H23
H_C276D158
2
+5VALW
@
R424
22_0402_5%
JP13
1
2
3
4
H7
H_C236D146
1
1
H6
H_C276D157
1
10
LPC_AD0 <16,30>
1
LPC_AD0
H32
H_C252D118
1
2
Screw Hole
LPC_AD2 <16,30>
1
9
NB_RST# <11,15,17,24,25,28,30>
1
3
LPC_DRQ1# <16>
1
8
LPC_AD2
@
2
1
4
@
E51_TXD <30>
1
7
@
M11
R80x100
1
LPC_DRQ1#
2
R426
0_0402_5%
NB_RST#
@
M10
R80x100
1
1
5
@
1
E51_TXD
@ DEBUG_PAD
1
2
3
4
@
M6
R80x100
1
R428
@ 0_0402_5%
1
2
6
For EC
M5
R80x100
@
1
LPC_FRAME#
@
1
1
2
<16,30> LPC_FRAME#
LPC_AD1
M4
R80x100
1
@
1
<16,30> LPC_AD1
LPC_AD3
CF2
1
@
M3
R80x100
1
<16,30> LPC_AD3
2
CF6
1
@
1
C532
@ 1000P_0402_25V8J
1
1
R450
0_0402_5%
1
1
SERIRQ
<16,22,30> SERIRQ
CF3
1
@
2
1
E51_RXD
<30> E51_RXD
CF7
1
@
M2
R80x100
@
<30> FAN_SPEED1
H34
+3VALW
R449
@ 0_0402_5%
1
2
CF4
1
@
EMI Shielding Clip PADs
ACES_85205-03001
2
10K_0402_5%
CF10
1
@
@
2
CF9
1
@
CF5
1
@
2
+3VS
CF8
1
@
1
B:FAN circuit to PWM like
SWAP PU5.5, PU5.6
R281 change to 10K
Q46 change to IRLML5103PBF
R314 conn to +FAN1
FD5
@
1
2
D31
BAS16_SOT23-3
2
2
2
5.1K_0402_5%
FD4
@
JP8
1
1
1
C508
22U_B_10VM
1
CF1
1
@
+FAN1
+
1
R314
D30
1SS355_SOD323-2
AO3409_SOT23
R308
@ 10K_0402_5%
@
Need to link SC1SS355010
2
Q46
FD6
@
1
3
FAN1_ON
2
1
100_0402_5%
P@ LM358DT_SO8
1
P
-
R313
2
+
6
PU5B
0 7
4
<30> EN_DFAN1
G
1
5
G
FBFAN
1
10K_0402_5%
ENFAN
1
10K_0402_5%
2
R309
2
R281
D
8
+5VS
C2:Chg. to
AO3409 for
Fan High
speed problem
S
VS
FD1
@
1
@
1
FAN Conn
1
C
1
B
1
A
D
Title
FAN & MDC
Date:
Rev
1A
Sheet
E
34
of
45
B
S
C379
2
1
+VSB
SUSP
2
2
G
G
Q35
2N7002_SOT23-3
2N7002_SOT23-3
S
D
S
2
1
1
3
2
1
+0.9V
+2.5VS
2
+1.5VS
Q24
2N7002_SOT23-3
S
R433
470_0805_5%
R272
@ 470_0805_5%
D
B:Add PD 100K bec'z KB926 is tri-state pin.
S
D
2 SUSP
G
Q40
2N7002_SOT23-3
S
D
2 SUSP
G
Q57
S
2N7002_SOT23-3
2 SUSP
G
Q39
@ 2N7002_SOT23-3
3
1
2
1
R280
470_0805_5%
C:Chg. PN to
SB770020010.
1
1U_0402_6.3V4Z
1 R248
2
10K_0402_5%
C385
D
2
G
3
2
470_0805_5%
R237
D
2
10K_0402_5%
B:Chg. to POP material for discharge.
2
Q34
+5VALW
B:1.Chg. PWR SW Q132 and Q133 from AO4422 to SI3456BDV +3VALW
2.Remove Energy Star 4.0 function.
+3VALW
TO +3V_LAN
+3VALW TO +3V_SB
+3V_SB
PJ21
2
1
C269
Q20
STAR@
0.1U_0603_25V4Z
STAR@
2
2N7002_SOT23-3
2
1
STAR@
47K_0402_5%
STB_LAN#
1
3
+5VALW
S
R34
STAR@
100K_0402_5%
D
2 STB_LAN#
G
STAR@
2N7002_SOT23-3
S
D
1
S
Q7
STAR@
2N7002_SOT23-3 2
2
G
2
Q8
R165
STAR@
100K_0402_5%
3
C87
STAR@
0.1U_0603_25V4Z
STB_SB#
D
S
+5VALW
2
G
<30> STB_SB
C:Chg.Q17,Q20,Q7,Q8,Q48,Q49,Q54,Q55
PN to SB770020010.
+3VALW TO +3V_WLAN
+1.2VALW TO +1.2V_SB
+1.2VALW
+1.2V_SB
+3V_WLAN
1
1
2
2
S
1
3
STB_12SB# control
circuit and chagne control signl
to STB_SB#
STB_WLAN#
STB_SB#
Q54
D
D
S
S
2
G
Q55
STAR@
2N7002_SOT23-3
1
2
S
C638
STAR@
0.1U_0603_25V4Z
2
G
<30> STB_WLAN
2 STB_SB#
G
STAR@
2N7002_SOT23-3
1
2 STB_WLAN#
G
STAR@
2N7002_SOT23-3
2
1
R400 STAR@
47K_0402_5%
D
Q50
STAR@
2N7002_SOT23-3
R327
STAR@
100K_0402_5%
Compal Secret Data
2007/5/4
Issued Date
Deciphered Date
2008/5/4
A
R324
STAR@
100K_0402_5%
R405
STAR@
470_0805_5% B:Remove
1
1
1
S
C526
STAR@
0.1U_0603_25V4Z
2
4
1
1
C651
C656
STAR@
STAR@
STAR@
10U_0805_10V4Z
2
2
SI3456BDV-T1-E3_TSOP6
1U_0603_10V4Z
2
10U_0805_10V4Z
C645
STAR@
Q21
STAR@
2N7002_SOT23-3
4
2
S
Q48
STAR@
2N7002_SOT23-3
1
G
2
+VSB
1
D
3
1
Q49
STB_WLAN# 2
G
C637
STAR@
10U_0805_10V4Z
1
3
G
R320
STAR@
470_0805_5%
D
3
4
2
1
R306 STAR@
47K_0402_5%
1
2
S
4
1
1
C494
C509
1
1
C518
C525
STAR@
STAR@
10U_0805_10V4Z
1U_0603_10V4Z
STAR@
STAR@
STAR@
2
2
10U_0805_10V4Z
2
2
10U_0805_10V4Z
+VSB
1
@ JUMP_43X79
Q56
6
5
2
1
D
Q47
6
5
2
1
2
D
1
@ JUMP_43X79
1
2
2
3
2
R172
STAR@
100K_0402_5%
PJ23
PJ22
3
+3VALW
Q9
STAR@
2N7002_SOT23-3
1
R30
R29
STAR@
470_0805_5%
2
1U_0603_10V4Z
3
+VSB
1
1
3
S
2 STB_SB#
G
STAR@
2N7002_SOT23-3
2
C86
STAR@
3
3
S
STAR@
1
1
2
1
2
1
S
2
G
<30> STB_LAN
1
C67
STAR@
D
2
D
Q17
D
STB_LAN#
B:Remove Energy Star 4.0 function.
C85
STAR@
10U_0805_10V4Z
3
1
C75
10U_0805_10V4Z
STAR@
10U_0805_10V4Z
R143
STAR@
470_0805_5%
1
1
C255
STAR@
1U_0603_10V4Z
2
2
2
1
D
2
G
1
4
G
S
3
G
STAR@
2
1
R164 STAR@
47K_0402_5%
STB_SB#
C252
STAR@
10U_0805_10V4Z
3
2
4
1 1
2
1
1
6
5
2
1
D
3
C271
STAR@
1
+VSB
1
10U_0805_10V4Z
C272
10U_0805_10V4Z
STAR@
6
5
2
1
2
Q132 @ JUMP_43X79
3
1
1
2
2
@ JUMP_43X79
2
2
Q133
R32
STAR@
100K_0402_5%
+3V_LAN
PJ20
1 1
+3VALW
1
2
S
SI4800BDY_SO8
1
1
2
1
C247
D
2
1
C:Chg. PN to
SB770020010.
R212
C:Chg. PN to
SB770020010.
1
C362
3
Q19
SUSP
2
2
G
G
2N7002_SOT23-3 2N7002_SOT23-3
1
2
3
4
Q29
2N7002_SOT23-3
2
1
VLDT_EN#
R478
100K_0402_5%
1
Q16
S
S
S
G
3
1
+VSB
1
C363
D
D
D
D
0.1U_0402_25V4Z
1
2
R166
Q36
8
7
6
5
4.7U_0805_10V4Z
2
D
3
C262
2
1
2
1U_0402_6.3V4Z
2 R137
1
330K_0402_5%
SI4800BDY_SO8
1
1
C263
2
1
2
3
4
3
S
S
S
G
0.01U_0402_25V7K
4.7U_0805_10V4Z
2
C264
D
D
D
D
470_0805_5%
Q18
8
7
6
5
10K_0402_5%
S
S
R209
10K_0402_5%
S
D
2
G
1
R197
+5VS
1
4.7U_0805_10V4Z
1
1
1
D
4.7U_0805_10V4Z
1
3
2
2
470_0805_5%
1
Q44
SUSP
2
2
2N7002_SOT23-3G
G
2N7002_SOT23-3
<26,28,30,32,40> SYSON
Q28
2N7002_SOT23-3
2
G
2
S
Q43
1
1
2
<15,26,28,30,38> SUSP#
SYSON#
<41> SYSON#
D
1
+5VALW
D
C457
C:Chg.Q13,Q15,Q16,Q19,Q34,Q35,Q43,Q44 <30> VLDT_EN
PN to SB770020010.
+5VALW TO +5VS
+3VS
1
+5VALW
1
+3VALW
1U_0402_6.3V4Z
2 R286
1
+VSB
330K_0402_5%
SUSP
<41> SUSP
2
+3VALW TO +3VS
C462
2
C431
10U_0805_10V4Z
R285
1
3
S
1
2
3
S
D
1
2
3
R211
10K_0402_5%
R210
10K_0402_5%
2
C443
3
Q15
VLDT_EN#
2
2
G
2N7002_SOT23-3G
2N7002_SOT23-3
C180
2
1
Q13
8
7
6
5
0.01U_0402_25V7K
D
1
1
1
4
2
R111
Q41
IRF8113PBF_SO8
4.7U_0805_10V4Z
2
2
3
C184
2
+5VALW
+5VALW
4.7U_0805_10V4Z
1U_0402_6.3V4Z
1 R98
2
+VSB
33K_0402_5%
1
1
1
C178
3
0.1U_0402_25V4Z
4
4.7U_0805_10V4Z
1
1
C181
1
2
3
470_0805_5%
Q14
IRF8113PBF_SO8
8
7
6
5
+1.8VS
3
+1.8V
E
1
+1.8V TO +1.8VS
C:Chg.Q14,Q41 part to reduce low Rdson part.
+1.2V_HT
D
1
+1.2VALW TO +1.2V_HT
+1.2VALW
C
B:Q18 and Q36, need to link "SB548000310"
C:Q14 and Q41, change part to reduce Rds(on) to improve PWR drop.
MP: Update R137 and R286 from 22K to 330K and C247 and C457 from 0.1U Y5V
to 0.01U X7R to meet PWR SEQ, and update C180 and C385 to 25V to meet PWR
request.
2
A
B
C
D
Title
Size
B
Date:
DC-DC INTERFACE
Document Number
Sheet
E
Rev
1A
35
of
45
A
B
C
D
VS
VIN
1
PR2
5.6K_0402_5%
3
+
2
-
1
1
1
2
PACIN
LM393DG_SO8
PC6
0.1U_0402_16V7K
2
0.068U_0402_10V6K
2
1
PR8
10K_0402_1%
1
Vin Detector
RTCVREF
3.3V
High 18.384 17.901 17.430
Low 17.728 17.257 16.976
2
VIN
PACIN <38>
PR7
10K_0402_1%
PD1
RLZ4.3B_LL34
2
2
PC5
4
PR6
20K_0402_1%
1
O
1
@ SINGA_2DW-0005-B03
ACIN <30,32>
PU1A
1
8
2
PC4
100P_0402_50V8J
PR4
10K_0402_1%
1
2
2
1
PC3
1000P_0402_50V7K
PR5
22K_0402_1%
1
2
1
2
PC2
100P_0402_50V8J
2
4
1
3
-
PC1
1000P_0402_50V7K
2
-
1
+
2
VS
PR3
84.5K_0402_1%
2
1
1
+
2
DC_IN_S2
2
10A_125V_451010MRL
P
1
G
DC_IN_S1
PJP1
1
DC301001Q00
PR1
1M_0402_1%
1
2
VIN
PL1
HCB4532KF-800T90_1812
1
2
PF1
1
1
2
BATT+
PD3
RLS4148_LL34-2
1
1
PD2
RLS4148_LL34-2
PR9
68_1206_5%
PR10
68_1206_5%
PQ1
N1
3
1
2
PR11
1K_1206_5%
2
2
PR12
200_0603_5%
1
2
1
VS
1
1
1
CHGRTCP
2
2
1
PD4
RLS4148_LL34-2
N3
1
2
PR13
1K_1206_5%
B+
2
2
2
1
2
PR15
22K_0402_1%
<32> 51_ON#
VIN
PC8
0.1U_0603_25V7K
2
PC7
0.22U_1206_25V7K
2
PR14
100K_0402_1%
1
2
PR16
1K_1206_5%
TP0610K-T1-E3_SOT23-3
PR20
499K_0402_1%
LM393DG_SO8
2
2
PC13
1000P_0402_50V7K
1 VL
PR23
34K_0402_1%
PR25
66.5K_0402_1%
1
6
2
PC12
1000P_0402_50V7K
5
-
PR24
499K_0402_1%
PR26
191K_0402_1%
PC11
1000P_0402_50V7K
2
2
RB715F_SOT323-3
+
O
1
3
7
2
<38> ACON
@ RLZ16B_LL34
PU1B
1
1
2
1
<6,37,39> MAINPWON
8
PD6
PD5
PC10
1U_0805_25V4Z
2
1
1
2
1
2
GND
PC9
10U_0805_6.3V6M
P
N2
G
2
4
IN
1
OUT
2
3
PR19
2.2M_0402_5%
2
1
2
3.3V
PR18
100K_0402_1%
1
2
1
VL
PU2 G920AT24U_SOT89-3
1
+CHGRTC
PR22
560_0603_5%
1
2
2
PR17
200_0603_5%
PR21
560_0603_5%
1
2
1
1
RTCVREF
3
3
2
1
+3VALW
2
+1.8VP
2
PQ2
1
1
+1.8V
Precharge detector
15.97V/14.84V FOR
ADAPTOR
@ JUMP_43X118
(8A,320mils ,Via NO.= 16)
PJ4
2
@
2
1
1
+5VALW
PJ5
+1.5VSP
2
JUMP_43X118
2
1
+1.5VS
PQ3
DTC115EUA_SC70-3
2
(3.0A,120mils ,Via NO.=6)
1
1
+VSB
@ JUMP_43X39
PACIN
S
RHU002N06_SOT323-3
PJ6
2
1
2
G
@ JUMP_43X118
+VSBP
2
D
+5VALWP
PJ7
2
+0.9VP
2
1
1
+0.9V
3
+5VALWP
PR27
47K_0402_1%
2
1
1
PJ3
1
JUMP_43X118
1
2
@
3
PJ2
+3VALWP
@ JUMP_43X79
(120mA,40mils ,Via NO.= 2)
PJ9
+1.2VALWP
2
2
1
1
+1.2VALW
@ JUMP_43X118
(8A,320mils ,Via NO.=16)
4
4
PJ11
+2.5VSP
2
2
1
1
+2.5VS
@ JUMP_43X39
(1A,40mils ,Via NO.=2)
Issued Date
Compal Secret Data
2007/5/4
Deciphered Date
2008/5/4
A
B
C
Title
DCIN & DETECTOR
Size
Document Number
R ev
1A
Date:
Sheet
D
36
of
45
A
B
C
D
PH1 under CPU botten side :
CPU thermal protection at 92 degree C
Recovery at 56 degree C
VS
VL
2
VL
VMB
PR28
47K_0402_1%
1
PC14
0.1U_0603_25V7K
PR31
47K_0402_1%
1
2
8
1
PR32
13.7K_0402_1%
1
2
PC16
0.01U_0402_25V7K
3
TM_REF1
2
-
1
2
1SS355_SOD323-2
1
VL
PR37
100K_0402_1%
1
2
1
3
4
LM393DG_SO8
2
PR39
100K_0402_1%
2
1
+3VALWP
PC18
1000P_0402_50V7K
1
1
2
PR36
15.4K_0402_1%
PR38
6.49K_0402_1%
2
1
2
ALI/MH# <30,38>
1
1
PC17
0.22U_0805_16V7K
2
2
2
PR35
100_0402_1%
PR34
100_0402_1%
PD7
2
1
O
OCTEK_BTJ-09HA1G
PQ4
DTC115EUA_SC70-3
PU3A
+
P
PR33
1K_0402_1%
PC15
1000P_0402_50V7K
G
2
+3VALWP
1
MAINPWON <6,36,39>
1
PH1
100K_0603_1%_TH11-4H104FT
1
BATT+
2
PL2
HCB4532KF-800T90_1812
1
2
1
BATT_S1
2
GND
GND
1
2
3
4
5
6
7
8
9
2
10
11
1
2
3
4
5
6
7
8
9
1
PJP2
1
PF2
15A_65V_451015MRL
1
2
PR29 1K_0402_1%
1
2
1
2
PR30
47K_0402_1%
1
PR40
1K_0402_1%
2
2
2
PH2 near main Battery CONN :
BAT. thermal protection at 92 degree C
Recovery at 56 degree C
BATT_TEMPA <30>
EC_SMB_DA1 <30,31>
EC_SMB_CK1 <30,31>
2
VL
1
VL
2
PR42
47K_0402_1%
1
2
1
D
3
PR48
0_0402_5%
2
S
1
2
1
2
2
1
2
2
1
2
PC20
0.22U_1206_25V7K
@
PC19
0.22U_0805_16V7K
8
+
6
-
PU3B
PD8
P
5
2
7
G
O
1
3
1SS355_SOD323-2
LM393DG_SO8
@
PQ6
RHU002N06_SOT323-3
2
G
PC22
0.1U_0402_16V7K
1
2
PR47
100K_0402_1%
1
<39,40> POK
2
1
PR45
100K_0402_1%
PR46
22K_0402_1%
1
2
VL
1
PC21
0.1U_0603_25V7K
3
B+
+VSBP
TM_REF1
4
1
3
PR44
15.4K_0402_1%
PR43
13.7K_0402_1%
1
2
PQ5 TP0610K-T1-E3_SOT23-3
1
PR41
47K_0402_1%
PH2
100K_0603_1%_TH11-4H104FT
@
4
4
Issued Date
Compal Secret Data
2007/5/4
Deciphered Date
2008/5/4
A
B
C
Title
BATTERY CONN / OTP
Size
Document Number
R ev
1A
Date:
Sheet
D
37
of
45
A
B
C
D
75W Iadapter=0~3.947A PR49=0.02 ohm CP=3.71A PR66=10.7K
5
ICOMP
CSIN
20
6
VCOMP
CSIP
19
7
ICM
PHASE
18
LX_CHG
8
VREF
UGATE
17
DH_CHG
PQ41
DTC115EUA_SC70-3
10
BOOT
16
ACLIM
VDDP
15
VADJ
LGATE
14
PGND
13
CHLIM
11
BST_CHG 1
2
2.2_0603_5%
6251VDDP
2
2 PR69
1
10K_0402_1%
2
1
PR68
10K_0402_1%
9
10.7K_0402_1%
6251VREF 1 PR66
2
12
ACOFF 2
GND
1
2
5
6
7
8
1
1
D
1SS355_SOD323-2
PC109
D
D
D
D
DTC115EUA_SC70-3
0.1U_0603_25V7K
PC36
BST_CHGA 2
1
0.1U_0603_25V7K
PD10
1
26251VDD
4.7_0603_5%
PR67
PL3
16UH_LF919AS-160M=P3_3.7A_20%
CHG
1
2
1
4
2
3
2
BATT+
PR62
0.02_2512_1%
PC38
SI4800BDY-T1-E3_SO8
DL_CHG
ISL6251AHAZ-T_QSOP24
PACIN
SI4800BDY-T1-E3_SO8
PQ18
PC37
4.7U_0805_6.3V6K
2
G
RHU002N06_SOT323-3
G
S
S
S
0_0603_5%
1
PQ20
S
PQ16
4
3
2
1
PR229
2
PR63
2
1
RHU002N06_SOT323-3
ACON
<36> ACON
0.1U_0402_16V7K
2
15.4K_0402_1%
PD15
2
5
6
7
8
PR65
1
<30> IREF
PR61
@ 0_0402_5%
VIN
200K_0402_1%
CSOP
PR118
2.2_0603_5%
1
S
2
G
PC35
1
2
2
PACIN 1
2
PR64
22K_0402_1%
1
<36> PACIN
D PQ17
3
<30> ADP_I
2
PQ14
1
21
PR72
D
D
D
D
2
ACOFF <30>
1
3
CSOP
1
1 PR60
2
100_0402_1%
6251VREF
CSON
G
S
S
S
1
2
0.01U_0402_25V7K
1 PR59
2
10K_0402_1%
1
2
PC34
100P_0402_50V8J
PR117
20_0603_5%
1
2
PC29
0.047U_0603_25V7M
1
2
PR56
20_0603_5%
1
2
PC32 PR57 20_0603_5%
0.1U_0603_25V7K
1
2
CELLS
3
4
CSON
2
1SS355_SOD323-2
ACOFF#
4
3
2
1
PC30
@ 680P_0402_50V7K
CSON1
2
PC33
1
2
BATT+
VIN
1
22
PR54
10K_0402_1%
1
2
PR51
47K_0402_1%
PD14
1
PC39
2
EN
FDS4435BZ_SO8
SUSP# <15,26,28,30,35>
10U_1206_25V6M
2
6251_EN 3
1
1
ACSET ACPRN
23
8
7
6
5
D
D
D
D
3
24
PC105
DCIN 1
2
4.7U_1206_25V6K
4.7U_1206_25V6K
1
DCIN
1
2
2
1
2
PC31 6800P_0402_25V7K
S
4.7U_1206_25V6K
S
S
S
G
2
2
1
2
PD19
RB715F_SOT323-3
1
1
1
PR230 100K_0402_1%
1
2
PU4
PC27
1
2.2U_0603_6.3V6K VDD
PQ12
DTC115EUA_SC70-3
2
PR58
150K_0402_1%
RHU002N06_SOT323-3
2 1
PC24
@ 0.1U_0603_25V7K
PQ13
DTC115EUA_SC70-3
D
3
1
3
PQ15
2
G
1
1
2
2
PR55
10K_0402_1%
<30,37> ALI/MH#
2FSTCHG
1
2
3
4
PC25
3
6251VDD
PR53
0_0402_5%
2
1
<30> FSTCHG
2
6251VDD 1
PC23
1
1
2
3
1
PR50
200K_0402_1%
DTA144EUA_SC70-3
2
PR231
100K_0402_1%
2
1
PC142
5600P_0402_25V7K
FDS4435BZ_SO8
PQ10
PQ51
DTC115EUA_SC70-3
PC172
0.1U_0603_25V7K
8
7
6
5
D
D
D
D
10U_1206_25V6M
DCIN
1
@
S
S
S
G
2
3
P3
PC26
0.1U_0603_25V7K
B++
CSIP
CS IN
2
FDS4435BZ_SO8
PR52
47K_0402_1%
2
1
1
1
FDS4435BZ_SO8
1
PQ11
2
JUMP_43X118
1
2
@
2
3
PQ52
TP0610K-T1-E3_SOT23-3
1
2
8
7
6
5
D
D
D
D
2
S
S
S
G
1
1
2
3
4
2
4
3
2
1
1
2
3
4
PJ13
1
G
S
S
S
4
1
D
D
D
D
PQ7
120W Iadapter=0~6.315A PR49=0.010 ohm CP=5.936A PR66=19.6K PR69=4.53K
3
5
6
7
8
1
PQ9
B+
2
PQ8
VIN
90W Iadapter=0~4.737A PR49=0.015 ohm CP=4.459A PR66=19.6K
PR49
0.02_2512_1%
P3
2
Iadp=0~3.6A
P2
PR70
3
1
1
3
6251VREF
1
2
@ 28.7K_0402_1%
PR71
PQ40
2
2
@ 47K_0402_1%
@ SI2301BDS-T1-E3_SOT23-3
IREF=1.016*Icharge
IREF=0.508V~3.048V
BATT Type
ALI/MH#
Charge Current
CC=0.5~3A
CV=12.6V(6 CELLS LI-ION)
IREF
3 CELL
3.3V
1.5A
1.524V
6 CELL
3.3V
3.0A
3.048V
9 CELL
3.3V
3.0A
3.048V
3
3
-
2
1
2
LM358DT_SO8
2
4
10K_0402_1%
1
2
PU5A
3
+
0
2
1
4
2007/5/4
Deciphered Date
B
4
2008/5/4
A
LI-3S :13.5V----BATT-OVP=1.5V
LI-4S :18V----BATT-OVP=2V
BATT-OVP=0.111*BATT+
Compal Secret Data
Issued Date
PC41
0.01U_0402_25V7K
2
PR75
105K_0402_1%
1
G
<30> BATT_OVP
1
8
PR184
PR233
@ 20K_0402_1%
PR74
PR73
499K_0402_1% 340K_0402_1%
2
1
E
P
@ 0.01U_0402_25V7K
C
PQ53
@ 2SC2411KT146_SOT23-3
2
B
3
1
2
PR232
@ 100K_0402_1%
2
1
1
6251_EN
PC40
0.01U_0402_25V7K
VS
6251VREF
PC173
CSON 1
2
1
VMB
C
Title
CHARGER
Size
Document Number
R ev
1A
Date:
Sheet
D
38
of
45
5
4
3
2
1
PJ18
2
2
1
1
LL2
16
DRVL2
VO1
17
PGND2
VFB1
COMP1
COMP2
CS1
CS2
VREF2
TONSEL
GND
PGOOD1
PGOOD2
12
29
0_0402_5%
EN2
EN1
19
VREG3
10
EN3
1
2
RLZ5.1B_LL34
2
2
B
1
10K_0402_1%
PC45
4.7U_1206_25V6K
2
1
5
6
7
8
4
3
2
1
TPS51120_CS1
TPS51120_CS2
2
TPS51120RHBR_QFN32_5X5
2
C
+VCC_TPS51120
1
1
+3VALWP
PR90
100K_0402_1%
1
2
2 1 PR89
1
FB5
PR85
10K_0402_1%
PC56
10U_0805_6.3V6M
2
1
PD11
VS
PC58
2.2U_0805_25V6K
1
806K_0603_1%
PR86
2
+3.3V_RTC_LDO
3
2
7
23
18
4
31
5
30
11
+
PR87
0_0402_5%
2
VFB2
32
PR105
PC95
@ 680P_0603_50V7K
1
PAD
VO2
6
SKIPSEL
8
33
2
2
24
2
PGND1
1
@
PC52
330U_D3L_6.3VM_R25M
15
1
DRVH2
PR129
@ 4.7_1206_5%
1
DL_5V
2
DRVL1
25
PQ23
SI4810BDY-T1-E3_SO8
PC51
1000P_0402_50V7K
LX_5V
PR78
10.2K_0402_1%
2
DH_5V
26
1
27
PR81
2.49K_0402_1%
1
2
VBST2
PC49
0.1U_0603_25V7K
1
2
12
14
DRVH1
32 QFN 5X5LL1
EN5
2
G
S
S
S
9
13
PR77
0_0603_5%
1
5
6
7
8
28
+5VALWP
PL5
3.3UH_SIL1045R-3R3PF_8.2A_30%
1
2
D
D
D
D
21
VBST1
FB3
1
PC57
0.047U_0603_16V7K
D
D
D
D
PC47
VREG5
V5FILT
@ 680P_0603_50V7K
PR88
0_0402_5%
2
1
10U_0805_10V4Z
2
1
G
S
S
S
DL_3V
VIN
20
VL
<6,36,37> MAINPWON
OCP=8A
4
3
2
1
LX_3V
22
1
2
3
4
PC94
PQ21
SI4800BDY-T1-E3_SO8
PR84
14.7K_0402_1%
1
2
8
7
6
5
PQ24
SI4810BDY-T1-E3_SO8
D
D
D
D
PR128
@4.7_1206_5%
D
PR83
14.7K_0402_1%
1
2
S
S
S
G
1
2
3
4
1
DH_3V
2
2
PC50
PR79
0.1U_0603_25V7K 0_0603_5%
2
1
1
2
S
S
S
G
@
PR186
0_0603_5%
1
2
1
2
PR80
10K_0402_1%
+
1
1000P_0402_50V7K
PC53
2
1
1
PL6
3.3UH_SIL1045R-3R3PF_8.2A_30%
2
1
PR82
4.22K_0402_1%
1
2
C
PC54
330U_D3L_6.3VM_R25M
+3VALWP
PR185
0_0603_5%
1
2
PU6
SI4800BDY-T1-E3_SO8
OCP=8A
VL
PR76
5.1_0603_5%
2
1
PC55
1000P_0402_50V7K
2
1
8
7
6
5
D
D
D
D
PQ22
+VCC_TPS51120
PC48
0.1U_0603_25V7K
2
1
D
PC46
1U_0603_10V6K
2
1
2
PC78
@ 680P_0402_50V7K
PC44
4.7U_1206_25V6K
2
1
JUMP_43X118
PC43
4.7U_1206_25V6K
2
1
1
@
PC42
4.7U_1206_25V6K
2
1
B+
B
@
POK <37,40>
A
A
Compal Secret Data
2007/5/4
Issued Date
Deciphered Date
2008/5/4
+5V/+3V
5
4
3
Title
2
Custom
Date:
Sheet
1
39
of
Rev
1A
45
A
B
C
D
PJ14
2
1
B+
1
JUMP_43X118
1
2
2
PC61
4.7U_1206_25V6K
+5VALWP
PC62
4.7U_1206_25V6K
1
2
PC65
2.2U_0805_10V6K
D
D
D
D
1
8
7
6
5
2
PR92
2.2_0603_5%
2
PC64
0.1U_0603_25V7K
1
1
1
PD12
2
1
PR91
0_1206_5%
1
PC63
4.7U_0805_6.3V6K
@
1
1
2
PC60
4.7U_1206_25V6K
2
1
PC59
4.7U_1206_25V6K
2
1
2
ISEN1
ISEN2
22
2
LGATE1
LGATE2
27
3
PGND1
PGND2
26
9
10
8
15
VOUT1
VSEN1
EN1
PG1
VOUT2
VSEN2
EN2
PG2/REF
20
19
21
16
11
OCSET1
OCSET2
18
ISE_1.2V
5
6
7
8
PR101
2K_0402_1%
1
2
PQ28
SI4810BDY-T1-E3_SO8
PR99
@ 4.7_1206_5%
PC74
0.01U_0402_25V7K
PR104
2.21K_0402_1%
2
PC73
220U_D2_4VM_R15
VSE_1.2V
2
PR106
0_0402_5%
POK <37,39>
2
1
PR109
@ 0_0402_5%
1
PC77
@0.1U_0402_16V7K
PR110
6.49K_0402_1%
2
1
ISL6227CAZ-T_SSOP28
PR112
100K_0402_1%
2
13
+
2
1
1
1
1
4
3
2
1
DL_1.2V
+1.2VALWP
2
PR103
0_0402_5%
PC75
@ 680P_0603_50V8J
1
DDR
GND
1
1
PR113
100K_0402_1%
2
PC76
@ 0.1U_0402_16V7K
1
2
PR111
@ 0_0402_5%
2
G
S
S
S
LX_1.2V
1
7
PR97
0_0603_5%
PL8
1.8U_D104C-919AS-1R8N_9.5A_30%
1
2
2
25
DH_1.2V-2
1
PHASE2
2
2
PHASE1
1
1
VSE_1.8V
2
PR107
0_0402_5%
1
1
<26,28,30,32,35> SYSON
PR108
10K_0402_1%
D
D
D
D
UGATE2
4
+1.2VALWP
4
3
2
1
28
VCC
VIN
UGATE1
24
PQ26
SI4800BDY-T1-E3_SO8
1
DL_1.8V
PR102
0_0402_5%
PC71
0.01U_0402_25V7K
DH_1.2V-1
5
PC69
0.1U_0402_16V7K
2
1
2
2
ISE_1.8V
BST_1.2V-2
1
PR94
0_0603_5%
2
PQ27
SI4810BDY-T1-E3_SO8 PR100
2K_0402_1%
1
2
23
2
PR96
0_0603_5%
BOOT2
2 1
DH_1.8V-1
BOOT1
5
6
7
8
2
SOFT2
D
D
D
D
PR93
0_0603_5%
D
D
D
D
S
S
S
G
2
1
2
3
4
PC72
@ 680P_0603_50V8J
1
2
2
2
1
1
PR98
10K_0402_1%
1
1
2
2
2
2BST_1.8V-2 6
PC67
0.01U_0402_25V7K
1
17 2
G
S
S
S
2
1
PR95
@ 4.7_1206_5%
PR188
0_0402_5%
1
2
@PR187
0_0402_5%
8
7
6
5
+
1
PC70
PC68
0.1U_0402_16V7K
2
1
<6> VDDIOFB_H
PC66
0.01U_0402_25V7K PU7
2
1
12 SOFT1
14
BST_1.8V-1
1
2
3
4
PL7
1.8U_D104C-919AS-1R8N_9.5A_30%
1
2 LX_1.8V
220U_D2_4VM_R15
3
BST_1.2V-1
+1.8VP
1
DAP202U_SOT323-3
S
S
S
G
+1.8VP
2
PQ25
SI4800BDY-T1-E3_SO8
3
3
4
4
Issued Date
Compal Secret Data
2007/5/4
Deciphered Date
2008/5/4
A
B
C
Title
1.8V / 1.2V
Size
Document Number
R ev
1A
Date:
Sheet
D
40
of
45
3
2
PJ19
D
PU12
2
VIN
1
EN
ADJ
4
5
GND
GND
7
GND
GND
8
VO
@ JUMP_43X79
PC91
4.7U_0805_6.3V6K
6
PR125
22K_0402_1%
2
PR126
20K_0402_1%
PC93
0.1U_0402_16V7K
2
1
PR127
10K_0402_1%
2
+3VS
PC92
10U_1206_6.3V7K
1
G965-18ADJP1UF_SO8
1
+2.5VSP
3
1
1
1
2
2
1
2
+3VS
2
D
1
1
4
2
5
C
C
PJ16
@ JUMP_43X79
2
1
1
+1.8V
+3VS
5
3
VREF
NC
7
4
VOUT
NC
8
TP
9
1
B
5
3
VREF
NC
7
4
VOUT
NC
8
TP
9
+5VALW
2
2
1
PC101
@ 0.1U_0402_16V7K
+0.9VP
1
1
PC99
2
PR137
1K_0402_1%
S
PQ33
2
6
NC
3
1
VCNTL
GND
D
2
G
PC100
10U_1206_6.3V7K
2
VIN
2
1
1
1
2
PR115
1.15K_0402_1%
PR138
0_0402_5%
1
2
2
<35> SYSON#
PU10
1
PJ10
@ JUMP_43X79
2
1
PC98
1U_0603_6.3V6M
APL5331KAC-TRL_SO8
2
1
PC79
4.7U_0805_6.3V6K
+3VALW
1
6
NC
2
B
VCNTL
GND
2
PR136
1K_0402_1%
1
PC97
4.7U_0805_6.3V6K
VIN
2
1
2
2
PU9
1
PC83
1U_0603_6.3V6M
0.1U_0402_16V7K
RHU002N06_SOT323-3
2
1
PR116
PC81
1K_0402_1% 0.1U_0402_16V7K
1
1
S
+1.5VSP
2
PC80
@ 0.1U_0402_16V7K
D
2
G
2
2
PR114
0_0402_5%
1
1
1
SUSP
PC82
10U_1206_6.3V7K
2
<35> SUSP
3
APL5331KAC-TRL_SO8
PQ29
RHU002N06_SOT323-3
A
A
2007/5/4
Issued Date
Compal Secret Data
2008/5/4
Deciphered Date
5
4
3
2
Title
0.9V//1.5V/2.5V
Size
Document Number
R ev
1A
Date:
Sheet
1
41
of
45
5
4
3
2
1
+CPU_CORE
CPU_B+
+5VS
+3VS
1
B+
8774CSP1
PHASEGD
CSN1
15
8774CSN1
GND
18
SHDN#
IC
40
TIME
FB
11
PR208
2K_0402_1%
8774FB 1
2
CCI
9
8774CCI
1
CCV
3
POUT
20
REF
DH2
21
8774DH2
7
TON
LX2
22
8774LX2
24
8774DL2
2
OFS
4
VRHOT#
DL2
23
CSP2
13
8774CSP2
CSN2
14
8774CSN2
2
1
PC167
0.22U_0603_16V7K
2
1
PR222
10_0402_1%
2
0_0402_5%
2
PR214
1
220P_0603_50V8J
2
PC150
1
PC143
220U_25V_M
10_0402_1%
2
PR218
0_0402_5%
PL11
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
2
B
PD18
EC31QS04
1
2
CPU_VCC_SENSE <6>
PR225
4.22K_0402_1%
2
2
1 1
PC168
220P_0603_50V8J
4
3
2
1
PR224
4.7_1206_5%
2
5
6
7
8
D
D
D
D
4
3
2
1
PQ49
FDS6676AS_SO8
G
D 5
S
D 6
S
D 7
S
D 8
<6> CPU_VSS_SENSE
G
S
S
S
PQ48
PQ50
PMBT2222A_SOT23-3
2
PR223
10_0402_5%
FDS6676AS_SO8
1
2
PR226
0_0402_5%
PC148
2200P_0402_50V7K
2
1
PC161
@ 220P_0402_25V8K
4
3
1
<6> PSI#
C
CPU_B+
2
PQ47
RHU002N06_SOT323-3
PC147
0.1U_0603_25V7K
2
1
3
2
1
PR211
1
1
1
3
S
2
G
PR204
10_0402_5%
1
2
PC155
0.1U_0603_16V7K
B
D
PR203
PH3
2.1K_0402_1%
10KB_0603_5%_ERTJ1VR103J
1
2
1
2
2
12
1
PC166
4700P_0402_25V7K
2
2
PR221
100K_0402_1%
2
1
S
PR220
100K_0402_1%
4
3
2
1
2
PR209
20K_0402_1%
PC160
@ 220P_0402_25V8K
PGND2
SKIP#
PQ43
FDS6676AS_SO8
G
D 5
S
D 6
S
D 7
S
D 8
5
6
7
8
2 N77 1
PC157
8774BST2 470P_0402_50V8J
10
PR217
0_0402_5%
+5VS
PQ45
RHU002N06_SOT323-3
BST2
4700P_0402_25V7K
2
1
8
18774SKIP# 39
D
2
G
3
6
PC154
1
5
2
38
1
8774SHDN#
71.5K_0402_1%
1 8774TIME
TWO-PH
PR200
4.22K_0402_1%
1
16
2
CSP1
1
PWRGD
2
1
PC165
10U_1206_25VAK
2
1
8774PWRGD
1
27
PC146
10U_1206_25VAK
2
1
PGND1
PD17
EC31QS04
D5
PC164
10U_1206_25VAK
2
1
8774DL1
36
PC145
10U_1206_25VAK
2
1
26
D5
1
DL1
PL10
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
2
2
D4
37
PC144
10U_1206_25VAK
2
1
35
2
D
+CPU_CORE
8774DH1A
2
0_0603_5%
2
PC153
220P_0603_50V8J
LX1
D4
1
PR195
PC163
10U_1206_25VAK
2
1
D3
8774LX1
PQ44
FDS6676AS_SO8
PR198
4.7_1206_5%
1
1
2
8774DH1
28
+
PQ42
SI7840DP-T1-E3_SO8
PQ46
SI7840DP-T1-E3_SO8
29
8774OFS
PC162
470P_0402_50V8J
5
DH1
EP
1
PR216
169K_0603_1%
1 2
D2
34
2
1
2
PR213
20K_0402_1%
33
D3
8774REF
1
2
PC159
0.1U_0603_25V7K 8774TON
1
2
PR212
200K_0402_1%
1
8774REF
D2
1
3
2
1
CPU_B+
30
PR193
PC152
2.2_0603_5%
0.22U_0603_16V7K
8774BST1
1
28774BST1A
1
2
1
1
2
PC158
0.1U_0402_16V7K
BST1
8774CCV
2
1
PC156
150P_0402_50V8J 8774POUT
1
2
PR210
10K_0402_1%
POUT
D1
8774VCC
PR207
2
1
2
PR206
@ 100K_0402_1%
32
41
<30> VR_ON
C
D1
8774PHASEGD 17
1
2
PR202
100K_0402_1%
+3VS
PR205
0_0402_5%
1
2
25
2
<30> VGATE
5
VDD
D
D
D
D
<6> VID5
THRM
G
S
S
S
<6> VID4
D0
1
<6> VID3
VCC
31
8774BST2A 1
2
PR215
2.2_0603_5%
1
PR219
0_0603_5%
<6> VID2
4
19
D0
GNDS
<6> VID1
0_0402_5%
1
0_0402_5%
1
0_0402_5%
1
0_0402_5%
1
0_0402_5%
1
0_0402_5%
1
0_0402_5%
2
4
3
2
1
8774VCC
PR191
2
PR192
2
PR194
2
PR196
2
PR197
2
PR199
2
PR201
1
<6> VID0
2
PU13
MAX8774GTL+_TQFN40
PC149
2.2U_0603_6.3V6K
1
2
PR189
10_0402_5%
2
PR190
10K_0402_1%
2
1
PC151
2.2U_0603_6.3V6K
1
2
D
PL9
HCB4532KF-800T90_1812
1
2
8774DH2A
PH4
PR227
10KB_0603_5%_ERTJ1VR103J
2.1K_0402_1%
1
2
1
2
1
2
PC170
@220P_0402_25V8K
2
1
PC169
0.1U_0603_16V7K
1
2
PC171
@ 220P_0402_25V8K
1
PR228
0_0402_5%
2
A
A
2007/5/4
Issued Date
Compal Secret Data
2008/5/4
Deciphered Date
+CPU_CORE
5
4
3
Title
2
Custom
Date:
Sheet
1
42
of
R ev
1A
45
POWER PIR LIST
page
DVT
Reason for change
Modify list
37
Design change PF2 value
Change PF2 Fuse from 12A to 15A
38
Design change PU4 schematic
Add PR117,PR118.
Change value PC29,PC32,PR56,PR57,PQ18
Remove PR232,PR233,PC173,PC105
42
improve CPU-core ripple
Change PR214,PR222 from 100 to 10
Change PC155,PC169 from 0.22u to 0.1u
Change PR213
Add EMI soultion
from 31.6K to 20K
Change PC150,PC153,PC168
from 680P to 220P
Change boost resistors PR193,PR215 from 0 to 2.2
Change low-side mosfet PQ43,PQ44,PQ48,PQ49 at CPU-core.
PVT
37
Design change PH1 temperature set value
Change PR36
from 22K to 15.4K
Pre-MP
37
Design change PH1 temperature set value
Change PR44 from 22K to 15.4K
Compal Secret Data
Issued Date
2007/5/4
Deciphered Date
2008/5/4
Title
PIR
Size
Document Number
Rev
1A
Date:
Sheet
43
of
45
5
4
3
2
1
HW4 Product Improvement Record (P.I.R.)
Phase:
D
to
Date:
Page# Action Plan
(add; del; change)
01. 2007/2/12
Location or
Net_List
Before value
(Attached file)
Writer:
After value
(Attached file)
Detail Discretion and Root Cause
Rev. DL/DM Check
D
P30
Rev 0.3 LA-3631P Implement items:
C
01.
02.
03.
04.
05.
06.
07.
08.
09.
10.
11.
12.
13.
14.
P06 Update THERMTRIP# control circuit, follow AMD request.
P07 Change C652 and C557 to SGN00000800
P08 Swap RP20 signals for DDR shielding.
P11,P13,P24 Set BOM Structure for UMA@, DVD@
ALL Change 2N7002 main source to SB770020010 for unit.
P27 Add D6, D3, ESD Diod for EMI, Chenge Encoder, SW6, PN to DEB00000600
15 Unit Q1,Q3,Q52 w/ same part.
24,P34 Change D31 and D28 to SC1BAS16000
P14 Add C13,C16,C21 with 22P for EMI.
P16 Change R436 and R437 to 120 Ohm to meet ADM request
P29 Remove R113, R117, R135 and R141 to leave chock for AMD platform
P28 Reserve C730~C736 by EMI request.
P21 Swap JP28 LED behaivor signals.
P28 Swap JP20 RX/TX Lanes sigals for Express Card cna't detect issue.
C
01. P24 Cut JP1.7 Pad for soldring issue.
02. P34 Change Q46 to SB934090000 for Fan can't meet Max. speed issue.
01. P22 Reserve C737, C738 for EMI solution
02. P6 Reserve R490 for PROCHOT funcation
03. P11 Add R488, R489 for LCD flash when boot issue
Rev 1A LA-3631P Implement items:
B
B
01.
02.
03.
04.
05.
06.
07.
08.
09.
10.
P22 Add R196 and C320 in BOM as EMI requirment.
P17 Add U35 and C740, reserve R1178 for LAN Leakage problem
P19 Change C647 to 22u for sequence and L59 to DCR is 0.4Ohm to meet AMD requirement.
P20 Change R431 and R430 to 24K; R1176 and R1177 to 19.2K, follow ATI ER.
P13 Change R369 from 33Ohm to 90Ohm Bead.
P30 ENE's recommend, change back C541 and C542 from 27P to 15P.
P06 Reserve pull up resistor R490 for H_PROCHOT#
P24/P29 Swap USB2+/- and USB8+/- for CAMERA problem.
P14/P20 Change D10 and D29 part to meet HDMI and CRT power requirment.
P20 Update HDMI Hot Plug DET circuit, to add U34, C739.
A
A
Compal Secret Data
2007/5/4
Issued Date
Deciphered Date
2008/5/4
5
4
3
2
Title
PIR
Size
Date:
Document Number
Rev
1A
Sheet
1
44
of
45
5
4
3
2
1
PJP1
45@ Part
45@
DC-IN JACK
ZZZ
D
PCB
D
DAZ02500101 LA-3631P
U5
U5
U5
U26
CHIPSET(R1)
UMAR1@
RS690MC
U4
UMAR3@
RS690MC
VGAR3@
C473
RX690
SBR3@
U4
SB600
L46
LAN
8101E@
RTL8101E
8101E@
1000P_0402_25V8J
8111C@
RTL8111C
8111C@
0_0603_5%
C464
8101E@
22U_A_4VM
R480
C
C
8101E@
0_0603_5%
U23
TRANSFORMER
100M@
TST1284
U11
Card BUS
8402@
PCI8402
B
B
A
A
Compal Secret Data
2007/5/4
Issued Date
Deciphered Date
2008/5/4
5
4
3
2
Title
PIR
Size
Date:
Document Number
Rev
1A
Sheet
1
45
of
45

IALAA Minnesota 10A/10AG

Transcription

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