A 36-inch Surface-conduction Electron-emitter Display (SED)

Transcription

A 36-inch Surface-conduction Electron-emitter Display (SED)
71.1 / T. Oguchi
71.1: Invited Paper: A 36-inch Surface-conduction Electron-emitter
Display (SED)
T. Oguchi, E. Yamaguchi, K. Sasaki, K. Suzuki, S. Uzawa
SED Inc., Kanagawa, Japan
K. Hatanaka
Canon Inc., Kanagawa, Japan
We have developed a 36-inch surface-conduction electron-emitter
display (SED), consisting of surface conduction electron emitters
(SCEs) and a phosphor screen for CRTs. The main features of the
prototype are luminance of 400 cd/m2, contrast ratio of 10,000: 1
in a dark room, and response time of <1 ms. The SED panel offers
sufficient performance for application to TVs.
1.
The SCE cathode plate consists of a simple matrix-wire structure,
so the SED is driven by line sequential scanning, as shown in
Figure 2. The scanning circuit generates the scan signal, the
amplitude of which is Vscan, and the signal modulation circuit
generates a pulse width modulation signal which is synchronized
with the scan signal.
Introduction
We proposed a 10-inch surface-conduction electron-emitter
display (SED), consisting of surface conduction electron emitter
(SCE) cathode plate and anode plate with CRT phosphor
materials in 1997 [1]. Since the SED has the potential for high
image quality with a simple device structure, it may be suitable
for large-sized FPDs.
We have now developed a 36-inch surface-conduction electronemitter display (SED) which uses a production process for largeformat displays. The main features of the prototype such as
luminance, contrast ratio and response time have achieved good
performances comparable to those of CRTs.
2.
Anode plate
Scan signal
0
0
Va
0
Scanning circuit
Abstract
Vscan
Vsig
Vscan
0
0
0
Cathode plate
Modulation signal
SCE
0 Vsig 0 Vsig
Signal modulation circuit
Structure of SED
The SED has a simple device structure as shown in Figure 1,
consisting of SCE cathodes on a glass plate and a high-voltage
anode plate. Ink-jet printing is used to deposit a thin palladium
oxide film on the cathode plate. Electron emission portions are
formed by applying voltage to the thin palladium oxide film
placed between two electrodes. The anode plate has a stripepatterned phosphor screen with color filter layer covered with a
metal backing film.
Black
matrix
Luminescence
Color filter
Metal back
SCE cathode
Electrode
3.
A Large-screen SED
3.1
A 36-inch Prototype
To demonstrate a large-screen SED, we developed a 36-inch
diagonal SED prototype with 1280 (H)×3 (R/G/B)×768 (V) pixels
consisting of cathode plate, anode plate and thin spacers, which
allow the panel vacuum structure to be sustained under
atmospheric pressure. Thin spacers are placed on the printed wires
to avoid disturbing the electron paths. The cathode plate and
anode plate are sealed by frit glass and a low melting point metal.
The thickness of the panel was 7.3 mm, which is the sum of 2.8
mm (cathode plate), 2.8 mm (anode plate) and 1.7 mm (vacuum
spacing). The panel weight is 7.8 kg. The anode plate has a stripepatterned P-22 (R/G/B) phosphor screen with color filter layer
covered with a metal backing film.
Phosphor
Glass substrate
Figure 2. Method of driving SED
Electron
beam
Va
Glass substrate
Va
Vf
nm
Electron tunneling
The SCE cathode plate is made as follows. The simple matrix
wires are fabricated by the printing method, and a thin palladium
oxide film is deposited by ink-jet printing. After electron emission
portions are formed, thin spacers are placed on the printed wires.
An illustration of the SCE cathode plate is shown in Figure 3.
Figure 1. Structure of SED
ISSN/0005-0966X/05/3602-1929-$1.00+.00
ISSN/0005-0966X/05/3601-0006-$1.00+.00 © 2005 SID
SID 05 DIGEST • 1929
71.1 / T. Oguchi
1000
6
100
5
Electron emission portion
10
4
10,000:1
1
3
0.1
2
Luminance
Ie
0.01
1
0.001
0
5
Scanning wire
Ie [µA]
写真でなく
絵にするか
もしれませ
ん
Electrode
Luminance [cd/ ㎡]
Spacer
10
Vf [V]
15
20
Signal wire
Figure 4. Contrast design for SED
Insulator
Cathode plate
3.2.3
Figure 3. An illustration of SCE cathode plate
3.2
Image Quality Design
3.2.1
Luminance Design
The luminance of the prototype panel is given by
L[cd/m 2 ] =
1
π ⋅ S pixel [ µm 2 ]
⋅ η[lm/W ] ⋅ I e [ µA] ⋅ Va [V ] ⋅ Pw [ µs] ⋅ Freq [ Hz ]
where
S pixel
: area of pixel (205 × 615
efficiency,
Ie
µm 2
: electron emission current,
η
),
Va :
Reflectance Design
Figure 5(a) shows a microscopic image of the anode plate viewed
from the anode glass plate and Figure 5(b) shows a cross section
of the microscopic image along the dashed line in Figure 5(a).
Each pixel comprises stripe-patterned R/G/B phosphors and the
: emission
pixel size is 205×615μ m. The octagonal opening is the color
filter and phosphor beneath the color filter. The outside area of the
opening is black matrix, which reduces the reflection of ambient
light. Assuming that total diffuse reflectance is the same, the
luminance increases 50% with the combination of color filter and
phosphor, in comparison with the combination of a neutral density
filter and phosphor. In the prototype panel, the ratio of the
opening is 31%, and a diffuse reflectance is 6.3%
(a)
anode voltage,
Red
Pw : driving pulse width, Freq : driving frequency.
In the prototype panel, panel luminance is 400 cd/m2 at
3.2.2
Pw = 12 μ
s,
Freq = 60 Hz, I e = 5.2μ
Blue
615μ
μ m
Va =
A.
615μ
μ m
10 kV,
Green
Contrast Design
SCE shows non-linear Ie-Vf characteristic. Therefore, it is
possible to drive each pixel selectively with a simple matrix
connection without active devices. Ie – Vf characteristic and
Luminance – Vf characteristic are shown in Figure 4. By setting
an appropriate driving voltage, SED can achieve a large
luminance contrast ratio. In the prototype, panel luminance is 400
cd/m2 with a signal voltage of 18.9 V and is 0.04 cd/m2 with a
scanning voltage of 10.3V. A high luminance contrast ratio of
10,000: 1 is obtained.
205μ
μ m
(b)
Metal back
Phosphor
Color filter
Anode glass plate
Black matrix
Figure 5. Enlarged photo of anode plate
1930 • SID 05 DIGEST
71.1 / T. Oguchi
3.3
Characteristics
Figure 6 shows the response time characteristic of the SED where
Va = 10 kV, Pw = 8.7μ s, and Ie = 3μ A. The 1/10 luminance
decay time is shorter than 1 millisecond. The response
characteristic of the SED is limited by the phosphor, so a high
response speed is accomplished by the SED.
Relative luminance [au]
The specifications of the prototype are shown in Table 1, and an
HD picture on the prototype is shown in Figure 7. The main
features of the prototype panel such as luminance, contrast,
response time and so on have achieved sufficient performance for
application to TV.
100
80
Blue
Green
Red
60
40
Figure 7. HD-picture of the prototype
20
4.
0
0
1
2
3
Time [ms]
4
Figure 6. Response time characteristic of SED
5
Conclusion
We have developed a 36-inch surface-conduction electron-emitter
display (SED). The main features of the prototype such as
luminance, contrast ratio and response time have achieved
sufficient performance for application to TV. The SED provides
high image quality comparable to that of CRTs.
5.
Acknowledgements
The authors would like to thank Toshiba Corporation for their
useful support.
Table 1. Specifications of the prototype
Screen size (mm)
787.2×472.3 (H×V)
Pixel pitch (mm)
0.205×0.615 (H×V)
6.
References
[1] E. Yamaguchi, K. Sakai, I. Nomura et al. : Journal of the SID
5/4, pp. 345-348 (1997).
1280×3×768
Number of pixels
(H×RGB×V)
Color arrangement
RGB-stripe
Phosphors
P22
2
Peak luminance (cd/m )
400
Contrast ratio
10,000: 1
Diffuse reflectance
6.3%
Response time
<1 ms
Panel thickness (mm)
7.3
Panel weight (kg)
7.8
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