some aspects of power system network reliability

Transcription

some aspects of power system network reliability
SOME ASPECTS OF POWER SYSTEM
NETWORK RELIABILITY STUDIES
by
VELAMURY SANKAR
Department of Electrical Engineering
THESIS SUBMITTED
IN FULFILMENT OF THE REQUIREMENTS FOR
THE AWARD OF THE DEGREE OF
DOCTOR OF PHILOSOPHY
to the
INDIAN INSTITUTE OF TECHNOLOGY, DELHI
INDIA
MAY, 1992
Brbirtitta
to
fitg parrnts
(Katt) Sri tirlanturu littralltt-tangarn
anb
iCaks4tni Narasanutta
CERTIFICATE
This is to certify that the thesis entitled 'SOME ASPECTS OF POWER SYSTEM
NETWORK RELIABILITY STUDIES" which is being submitted by Mr. VELAMURY
SANKAR to the Indian Institute of Technology, Delhi, for the award of the degree of
Doctor of Philosophy in Electrical Engineering, is a record of bona fide research work
carried out by him. He has worked under our guidance and supervision and has fulfilled the
requirements for the submission of this thesis, which has attained the standard required for
a Ph.D. degree of this institute. The results in this thesis have not been submitted elsewhere
for the award of any degree or diploma.
C,(V. C. PRASAD)
Professor
(K. S. PRAKASA RAO)
Professor
Department of Electrical Engineering
Indian Institute of Technology, Delhi
New Delhi- 110 016, INDIA.
ACKNOWLEDGEMENTS
I have great pleasure in expressing my deep sense of
gratitude to my supervisors Prof. K. S. Prakasa Rao and
Prof. V. C. Prasad for their guidance, supervision and
encouragement during the course of this work.
I in grateful to the authorities of Jawaharlal Nehru
Technological University, Hyderabad, for sponsoring me under QIP
to pursue my research work.
I am very much thankful to my colleagues at J. N. T. U.
College of Engineering, Anantapur who have been very co-operative
during this period. In particular, I am very much grateful to
Prof. T. B. Krishna Swamy, Prof. T. B. Parthasarathy, Prof. K. V.
Desikachar, Prof. K. Raja Reddy, Prof. S. Kamakshaiah, Dr. N.
Sreenivasulu, Dr. P. Vivekananda and Sri K. Prabhakara Rao for
their advice and encouragement. My special thanks are due to Sri
K. S. R. Anjaneyulu for his help and co-operation.
I am very much grateful to Prof. C. S. Indulkar, Head of
the Department of Electrical Engineering at I. I. T. Delhi for
his encouragement and providing all necessary facilities.
Special thanks are due to Sri N. D. R. Sarma for his keen
interest in the work and for several helpful suggestions.
I wish to thank Dr. V. Bapi Raju, Dr. S. Raghu Kumar and Sri
J. Satish for their co-operation at various stages of the work.
I am very much thankful to my friends Dr. D. Nageswara Rao
and Sri K. V. Subba Rao for their suggestions and encouragement.
iii
I am very much grateful to Sri K. V. R. Murthy, Dr. V. V. L.
Kantha Rao and Sri K. Bhattacharya for their help during the
final stages of this work.
My co-researchers Dr.K.L.Puttabuddhi, Dr. D.Das, Dr.(Ms.)
M.S. Thomas, Sri L. Hari, Sri G.G.Bhise, Sri K. Ramalingam and
others provided a congenial research atmosphere.
I am very much thankful to Mr. Fateh Singh for his cooperation in the Computing laboratory. I wish to acknowledge
Mr. Saraswat and Mr. Arora for preparing the diagrams of this
thesis. I am thankful to Mr. Sanjay for printing the thesis
neatly.
I am very much grateful to Sri J. G. Sastry and his family
for their support and encouragement.
I wish to appreciate my wife Savitri, for her patience,
understanding and encouragement throughout the period of this
work. Finally, I appreciate my sons Sravan and Sravanth for their
lively company which provided me the necessary relaxations.
VOLAeā€”jok-49
.%
V. SANKAR
iv
ABSTRACT
Analysis of systems from reliability point of view is of
great interest currently. Several systems are representable by
graphs. Of late, various graph theoretic techniques are
increasingly being used to evaluate the reliability of a system.
Most of these methods require generation of paths/cutsets. In
this thesis, some new techniques are developed for generating
pathsets and several types of cutsets for single-input singleoutput networks and multi-input multi-output networks with
specific reference to power system networks.
In Chapter 1, a review of various methods of reliability
analysis is presented.
In Chapter 2, all basic paths are generated without
generating all paths. This is done for single-input single-output
networks. Boolean algebra is then used on these basic paths to
generate all minimal vertex cutsets. A new type of cutset called
"system minimal vertex cutset" is also introduced in this
chapter. This is useful for a power system network with
probabilities assigned to buses.
Normally, methods for generation of minimal edge cutsets,
using paths, multiply all paths from input to output using
Boolean algebra- However, in Chapter 3 it is shown that a subset
of all paths called "independent pathset" is enough from this
point of view. When these paths are multiplied in the Boolean
sense, all minimal edge cutsets are shown to be contained in the
product expansion. A similar dual relationship between
independent minimal edge cutsets and all paths is also
established. Further, new bounds on the cardinalities of minimal
edge cutsets and minimal vertex cutsets are explored in this
chapter. Some new bounds on the number of paths and number of
minimal edge cutsets are derived. These are sometimes better than
the well known bounds of appropriate powers of 2. Some examples
are given to illustrate that these new bounds are reached in
practice for some graphs.
In the existing literature, not much attention was given to
the problem of enumeration of system minimal edge cutsets. A
similar problem corresponding to the vertices is not pursued at
all. In Chapter 4, two new algorithms are presented, one for
generation of system minimal edge cutsets and the other for the
generation of system minimal vertex cutsets for power system
networks. All paths, from all inputs, to all load points are
generated simultaneously using what is called "all path tree". By
multiplying all paths from the all path tree using Boolean
algebra, all system minimal edge cutsets are generated. Some new
generalized Boolean simplification rules are developed to
simplify the product terms. Similarly, all basic paths to all
load points from every input are determined using "all basic path
tree". System and load point minimal vertex cutsets are
determined by multiplying the basic paths of the basic path tree,
using Boolean algebra and the generalized Boolean simplification
rules mentioned earlier. Further, bounds on the cardinalities of
vi
system minimal edge cutsets and system minimal vertex cutsets are
also derived in this chapter.
The path and basic path concepts of single-input singleoutput networks are generalized to multi-input multi-output
networks, with application to power system networks in Chapter 5.
These are called "minimal edge system connected subgraph" and
"minimal vertex system connected subgraph" respectively.
Algorithms are presented for generating these system connected
subgraphs. The all path tree, the all basic path tree and Boolean
algebra are used in a different way for generating these
subgraphs.
In Chapter 6, an algorithm is developed for generating all
system minimal edge cutsets directly without using paths for
power system networks. This algorithm makes use of layering the
graph where, each layer contains vertices adjacent to its
preceding layer. This helps to generate sets of vertices
containing the input without duplication.
Capacities of elements are considered in Chapter 7 to
evaluate the reliability of a system which has to meet the
required flow from the input to the output. In this context,
paths and edge cutsets are called weighted pathsets and weighted
cutsets respectively. A comprehensive algorithm is developed for
generating all minimal weighted pathsets that give the required
flow from the input to the output for directed networks. This
makes use of only a subset of all paths called "forward paths".
Boolean algebra is shown to be useful to determine minimal
vi i
weighted cutsets from minimal weighted pathsets. These concepts
are applied to HVDC converter equipment failure analysis. The
a.c. to d.c. converter equipment circuit is treated as a directed
network by incorporating capacity constraints. Weighted cutsets
of this graph are then obtained using the above methods. Further,
the weighted cutset approach is also adopted for power system
networks. The undirected edges in the graph of a power system
network are replaced by a pair of anti-parallel edges. The
minimal weighted cutsets are then generated.
A summary of the conclusions of the thesis is presented in
Chapter 8. Scope for further research work is also mentioned.
viii
CONTENTS
Page No.
ABSTRACT
LIST OF FIGURES
xv
LIST OF TABLES
xx
CHAPTER 1: INTRODUCTION
1
1.1 INTRODUCTION
1
1.2 LITERATURE REVIEW
2
1.2.1 State enumeration methods 4
1.2.2 Network modification Methods4
a)Series-parallel systems4
b) Star-delta transformations5
c)Hayes' theorem
6
1.2.3 Topological formulae
6
1.2.4 Path generation methods
7
1.2.5 Cutset generation methods8
a) Edge cutset generation methods9
b) Vertex cutset generation methods12
c)Mixed cutsets
13
1.2.6 Reliability expression
13
1.2.7 Multi-output networks
16
1.2.8 Power system networks
18
1.2.9 Networks with flows
20
1.3 NOTATION AND DEFINITIONS
22
1.4 SCOPE OF THE THESIS
25
CHAPTER 2: MINIMAL VERTEX CUTSETS
29
2.1 INTRODUCTION
29
ix
2.2 BASIC PATHS
31
2.2.1 Algorithm 2.1: Generation of basic
paths
31
2.2.2 Properties of basic paths35
2.2.3 Justification of Algorithm 2.137
2.2.4 Discussion
2.3 MINIMAL VERTEX CUTSETS
38
45
2.3.1 Algorithm 2.2: Generation of minimal
vertex cutsets
47
2.3.2 Justification of Algorithm 2.249
2.3.3 Discussion
2.4 RELIABILITY EXPRESSIONS
53
59
2.4.1 Reliability expression using basic
paths
59
2.4.2 Unreliability expression using minimal
vertex cutsets
62
2.5 SYSTEM MINIMAL VERTEX CUTSETS 64
2.6 CONCLUSIONS
68
CHAPTER 3: INDEPENDENT PATHS AND EDGE CUTSETS70
3.1 INTRODUCTION
70
3.2 INDEPENDENT PATHS
73
3.2.1 Properties of independent paths73
3.2.2 Method for obtaining independent paths74
3.3 RELATIONSHIP BETWEEN INDEPENDENT PATHS AND
MINIMAL EDGE CUTSETS
77
3.3.1 Discussion
83
3.4 RELATIONSHIP BETWEEN INDEPENDENT MINIMAL
EDGE CUTSETS AND PATHS
86
3.5 CARDINALITY OF MINIMAL CUTSETS AND PATHS90
3.6 NUMBER OF EDGE CUTSETS AND PATHS96
3.6.1 Number of edge cutsets
96
3.6.2 Number of paths
98
3.7 CONCLUSIONS
103
CHAPTER 4: SYSTEM MINIMAL CUTSETS FROM PATHS104
4.1 INTRODUCTION
104
4.2 ALL PATH TREE
106
4.2.1 Algorithm 4.1: Generation of all path
tree
108
4.2.2 Properties of all path tree111
4.2.3 Justification of Algorithm 4.1113
4.3 SYSTEM MINIMAL EDGE CUTSETS
114
4.3.1 Generalized Boolean simplification
rules
117
4.3.2 Algorithm 4.2: Generation of system
minimal edge cutsets using all path
tree
124
4.3.3 Justification Algorithm 4.2128
4.3.4 Generation of load point minimal edge
cutsets
4.4 ALL BASIC PATH TREE
131
133
4.4.1 Algorithm 4.3: Generation of all basic
path tree
xi
136
4.4.2 Properties of all basic path tree139
4.4.3 Justification of Algorithm 4.3141
4.5 GENERATION OF SYSTEM AND LOAD POINT MINIMAL
VERTEX CUTSETS
143
4.5.1 Algorithm 4.4: Generation of multioutput minimal vertex cutsets145
4.5.2 Properties of multi-output minimal
vertex cutsets
147
4.5.3 Justification of Algorithm 4.4150
4.5.4 Algorithm 4.5: System minimal vertex
cutsets
153
4.5.5 Justification of Algorithm 4.5156
4.5.6 Algorithm 4.6: Load point minimal
vertex cutsets
158
4.5.7 Justification of Algorithm 4.6160
4.6 CARDINALITY OF SYSTEM MINIMAL CUTSETS161
4.6.1 Cardinality of a system minimal edge
cutset
163
4.6.2 Cardinality of a system minimal vertex
cutset
4.7 CONCLUSIONS
CHAPTER 5: SYSTEM CONNECTED SUBGRAPHS
5.1 INTRODUCTION
166
172
175
175
. 5.2 MINIMAL EDGE SYSTEM CONNECTED SUBGRAPHS177
5.2.1 Algorithm 5.1: Generation of ,minimal
edge system connected subgraphs181
xii
5.2.2 Properties of minimal edge system
connected subgraphs
185
5.2.3 Justification of Algorithm 5.1188
5.3 MINIMAL VERTEX SYSTEM CONNECTED SUBGRAPHS190
5.3.1 Boolean Simplification Rules194
5.3.2 Algorithm 5.2: Generation of minimal
vertex system connected subgraphs196
5.3.3 Properties of minimal vertex system
connected subgraphs
200
5.3.4 Justification of Algorithm 5.2206
5.4 CONCLUSIONS
CHAPTER 6: EDGE CUTSETS BY LAYERING
6.1 INTRODUCTION
209
211
211
6.2 MINIMAL EDGE CUTSETS BY LAYERING212
6.2.1 Description of the Algorithm of
Arun Kumar and Lee
212
6.2.2 Drawbacks of the algorithm of
Arun Kumar and Lee
215
6.2.3 Notation,definitionsand
modifications
217
6.2.4 Algorithm 6.1: Generation of minimal
edge cutsets by layering220
6.2.5 Justification of Algorithm 6.1227
6.3 SYSTEM MINIMAL EDGE CUTSETS BY LAYERING233
6.3.1 Algorithm 6.2: Generation of system
minimal edge cutsets by layering237
6.3.2 Justification of Algorithm 6.2241
6.3.3 Discussion
6.4 CONCLUSIONS
249
258
CHAPTER 7: PATHSETS OF NETWORKS WITH FLOWS259
7.1 INTRODUCTION
259
7.2 MINIMAL WEIGHTED PATHSETS
264
7.2.1 Algorithm 7.1: Generation of all paths
using Breadth-First-Search technique266
7.2.2 Algorithm 7.2: Generation of minimal
weighted pathsets
267
7.2.3 Justification of Algorithm 7.2278
7.2.4 Relationship between minimal weighted
cutsets and pathsets
282
7.3 PROPERTIES OF MINIMAL WEIGHTED PATHSETS AND
CUTSETS
286
7.4 DISCUSSION
296
7.5 APPLICATIONS
301
7.5.1 HVDC networks
303
7.5.2 Power system networks
304
7.6 CONCLUSIONS
CHAPTER 8: CONCLUSIONS
306
309
8.1 INTRODUCTION
309
8.2 CONCLUSIONS
309
8.3 FURTHER SCOPE
314
REFERENCES
317
APPENDIX
336
CURRICULAM VITAE
343
xiv