Nanoelectronics and Nano-Architectonics

MARCO-FENA
Nanoelectronics and Nano-Architectonics
- Towards Robust Integrated Nanosystems
Kang L. Wang
MARCO Center on
Functional Engineered Nano Architectonics -- FENA
University of California, Los Angeles
Westwood, CA 90095-1594
MARCO - FENA
MARCO Focus Center -- FENA
2
The term “Architectonics” is derived
from a Greek word meaning the
Science of master builder –
Mastering the building of
Nanoelectronics and Nanosytems –
NanoLegos
2
Grand Challenge in Nanoelectronics
ƒ 1968-2003 (CMOS)
throughput by
108-109
¾ Transistor count increasing
to 108-109 transistors/chip
¾ Price per transistor
decreases 7 orders of
magnitude
¾ Volume decreasing 6-7
orders of magnitude
¾ Power decreases 7 orders of
magnitude
¾ Moore’s second observation
– increasing cost of
manufacture -- Self
assembly
(G. Moore, ISSCC 2003)
3
Performance Space
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¾ Functional
The next?
10 nm
100nm
Technology node
V. V. Zhirnov, D.J.C. Herr: New Frontiers: Self-Assembly and Nanoelectronics. IEEE
Computer 34 (1): 34-43 (2001)
3
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Current Issues, Challenges &
Opportunities
ƒ
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ƒ Efficient logic functionality
-- Low power
Nonideal
Fundamental limits
ƒ From functional
Power dissipation
nanomaterials and new device
Increase number of
with alternate state variables
interconnects
ƒ Utilization of quantum effects
Slow increase of density
ƒ Novel Architectures for new
and functionality
devices
Complexity in design
Small current drive
ƒ Higher functional throughput
Device variations –
ƒ Reduced or having min
Reliability and
number of interconnects
reproducibility
ƒ Homogeneous cells
ƒ Low Power and robust
• Increase of
manufacture cost ƒ Directed Self Assembly
4
4
Nanoelectronics -- Next Generations
• Fewer electrons
• Massive number of interconnects
• Power consumption
Gate Length (nm)
Number of electron (per Gate)
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106
1000
100
10
1970
1980
1990
2000
2010
10
19
10
18
10
17
10
16
10
15
10
2020
14
-3
10000
Doping Concentration (cm )
Major Issues
Year
104
Ultimate
CMOS
Nanoelectronics
Quantum
computing/
information
Room temperature
Si based devices
Low temperature
devices
Alternate
architectures
102
“Single” Electron Devices
1
0.1
1970
1990
2010
2030
2050
Year
5
Single electron detection made
5
CMOS Device Scaling Continues
---20 0
3
45nm Node
–20
1
2007
32nm Node 2 ––
–
2009
50nm Length
(IEDM2002)
22nm Node
2011
30nm
Prototype
(IEDM2000)
25 nm
20nm Prototype
(VLSI2001)
15nm
16 nm node ---201
2013
1-3nm
3–
201
11nm node
7
2015
15nm Prototype
(IEDM2001)
10nm Prototype 7nm
(DRC 2003)
Limit ~ 5-7 nm
6
Na
Na notu
no be
wi
res s,
, ..
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90nm Node
2003 65nm Node
2005
8 nm node
2017
5nm
Si CMOS becoming less Si
Heterogeneous integration
3nm
6
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Mission Statement of FENA :
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To create and investigate new nanoengineered functional materials and devices,
and computational architectures for new
information processing systems beyond the
limits of conventional CMOS technology.
7
FENA - Participating Universities
ƒ Distributed Research Model
ƒ Multi-Institutional
University of Minnesota
Dept. Electrical and Computer Eng.
University of California at Berkeley
MIT
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Dept. Electrical Eng. and Computer Sciences
Dept. Biological Engineering
UC at Santa Barbara
State University of New York
at Stony Brook
Dept. Materials
Dept. Electrical and Computer Eng.
Dept. Physics
UCLA
North Carolina State University
Dept. Electrical Eng.
Dept. Mathematics
Dept. Chemistry and Biochemistry
Dept. Material Science and Eng.
Dept. Electrical Eng.
University of California at Riverside
Arizona State University
Dept. Electrical Eng.
Dept. Mechanical Eng.
Dept. Chemistry
Mathematics
Dept. Electrical Eng.
University of Southern California
Dept. Electrical Eng and Electrophysics
Dept. Chemistry
California Institute of Technology
Dept. Chemistry
Dept. Materials Science
Dept. Applied Physics
MULTI-DISCIPLINARY
MULTI-DISCIPLINARY TEAM
TEAM
MATERIAL
MATERIAL SCIENTISTS
SCIENTISTS
CHEMISTS
CHEMISTS
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PHYSICISTS
PHYSICISTS
BIOENGINEERS
BIOENGINEERS
MATHEMATICIANS
MATHEMATICIANS
FENA Quick Facts
•
•
•
•
Principal Investigators: 28
Students & Researchers: 60
Universities Involved: 11
Admin Headquarters: UCLA
ELECTICAL
ELECTICAL ENGINEERS
ENGINEERS
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MARCO - FENA Funding Stream
Semiconductor Industry Association
Semiconductor Industry Supplier Sponsors
Management
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Funding
FCRP Governing
Council
Focus Centers
9
9
FENA – Research Theme
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TOP-DOWN VISONS
Theme 5: New computational and information
processing technologies/paradigms suitable
for novel nanodevices – Richard Kiehl
Theme 4: Novel devices for high functionality
and heterogeneous integration - Kang Wang
Theme 2: Synthesis & manufacturing methods
for nanoscale ordered materials & structures -Evelyn Hu
Theme 3:
Simulation and
computations of
novel engineered
nanomaterials
and devices –
Russ Caflisch
Theme 1: Novel materials from atomic and
molecular levels – Fraser Stoddart
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BOTTOM-UP SOLUTIONS
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Building Blocks: Novel Materials from
Atomic and Molecular Levels
Aim: To use bottom-up synthesis and fabrication approaches to create and
assemble new nanoscale functional materials and nano structures.
ƒ Nanostructured Material
O
O
O
O
+N
+N
O
O
N+
O
S
S
S
S
O
O
O
N+
S
S
S
N
S
S
N
S
S
P
N
N
+
N
+
O
N
+
O
Ro tary Mo le c ular
S witc h
O
OMe
S
Line ar Mo lec ular
S witc h
O
O
CH2
O
O
a) Nanopatterning Self assembly - Chemical and
N
O
S
O
O
ƒ Nano Patterning
O
O
+
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S
O
d) Atomic Interfacial Layers
biological self-synthesis
b) Nano-patterning self-assembly polymers
c) Nanowires and Nanogrids Utilizing Self-assembled
Templates
d) Virus Engineering to Grow and Self Assemble
Interconnects
S Me
N
S Me
S
S
+
N
ƒ Functional Molecular NanoMaterials
O
O
O
memory using SiGeC/Si hetero-nanocrystals
a) Structural ordering of organic polymers
b) Nanowire Sensors
c) Functional Molecular Materials
(c)
(b)
O
+
a) Molecular Recognition
b) Fabrication of Nanowires/Nanotubes
c) Evaporation Induced Self-Assembl Single electron
(a )
O
O
O
O
O
O
O
OMe
Me O
Me O
Mo le c ular
Dio de
O
O
CH2
O
O
Me O
Me O
Functional molecular electronic components, 2
switches: a) Catenane b) Rotazene and c) a diode.
GCAT
CGTA
Organic polymer thin film transistors:
nanoscale transistor functionality.
CT
G A
A CG
T
CG
TA TGC
A
11
Polyaniline/Au conductive polymers. Applications: Molecular recognition allowing polymers to selfsensors, conductive connecstors, nanogrids,
assemble into nanowires, grids or nanopatterns.
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Self Assembly: Principles
ƒ Physical self assembly
¾
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¾
¾
¾
Ge Wires
ƒ Chemical and Bio
chemical self assembly
¾
¾
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Mechanical Field –
templating, strain, etc.
Use of structured strain
Electrical and magnetic
(including photon) fields
Surface energy – catalyst
seeding
Chemical bonding
Conjugating - e.g., triple
conjugation of QDs will be
achieved at the Y-Junction, while
QDs are trapped at the junction
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Self-Assembled Molecular Memories
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Au electrodes
-4
2
10
nd
bias cycle
Pd nanowire
-5
ON
Current (A)
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10
st
1 bias cycle
-6
NC
N
10
-7
rd
3 bias cycle
10
-8
10
-9
NC
NH2
N
H
2-amino-4,5-imidazoledicarbonitrile
(AIDCN)
OFF
Pd
Vswitch
-10
Au
10
0
13
1
2
3
4
(V)
ƒ LocalizationVoltage
-- regimented
ƒ Field assisted
ƒ Physical, chemical, and
biochemical
5
SiO2
Si
Yang Yang of UCLA
13
Nanowires -
In2O3 NO2 Sensor
ƒ
1 .0
I (µΑ)
0 .8
0 .6
5 p pb
0 .4
10 ppb
0 .0
0
2
4
6
10 0 p p b
T im e (s)
500 ppb
8
1 0 x1 0
3
30
1000
25
Dopant:
20
15
10
Before
5
20
30
500
HCl
40
D ia m e te r s (n m )
I (nA)
0
Polyaniline Nanofibers
2.4
OFF
2.0
-1000
-1.0
R/R0
1.8
1.6
After NO2 In
-0.5
0.0
V (V)
0.5
1.0
On/off ratio: 1.2 × 106;
‰ Lowest detectable level: 5 ppb;
‰ Response time: 5 s for 100 ppm NO2, 17
min for 5 ppb
‰
1.4
1.2
1.0
0.8
0
-500
0.9 ppm NH3 Vapor
2.2
14
50 pp b
35
Counts
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0 .2
ON
0
100
200
300
Time (s)
400
500
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Chemical and Biochemical process for
Integrated Circuit Architectonics
NANO-ASSEMBLED CIRCUIT COMPONENTS
•SYNTHESIS OF CIRCUIT
BUILDING BLOCKS
A circuit block
•DROP-IN ONTO EXISTING
TECHNOLOGY
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ƒ
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Chemical Conjugated bonding
Nano self assembly of nano particles
Anchoring the components – to
nanowires
Mihri Ozkan
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Assembly of Organic and Inorganic
Nano Legos (A bottom-up approach)
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(A)
(B)
Example: Nano particles with Biotin-Avidin
Example: Nano particles
with with amine groups
bridged with dialdehydes
Two
particles
nonwith
complementary
Twonano
individual
nanowith
particles
recognition
Bivalent
linker
that directly
recognition
groups, whichto
can
bridged
usingof nano
groups complementary
eachbe
other
recognizes
the surface
(C) bispecific linker moleculesparticles
Example: Nano Au assembly with disulfide groups
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16
FET as Demonstration (1)
Drain
CNFET
(B*)
Gate
(B)
Gate
N-type SWCNT
C*
(A)
(A*)
MWCNT
Source
Pd atoms
(metalized DNA)
MWCNT
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MOSFET
Source
17
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CMOS Demonstration (2)
Combinational
CNFET Inverter
CMOS
Inverter
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Vdd
18
Vin
Vout
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QD Functionalization at Nanotube-ends for
Short and Long CNTs (Configuration 1)
QDs
(B)
QDs at the end of the CNT
QDs
bundles
Variable band gap
(A)
(B)
QDs at the end
of the CNT
bundles
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(A)
(2.1eV)
CNT
(4.0 eV)
CNT
CdSe
CdSe
200 nm
CNT bundle
CNT
CNT bundle
ZnS
ZnS
ZnS
ZnS
ZnS
ZnS
2 µm
CdSe
200 nm
CNT
CdSe
2 µm
ZnS capped CdSe at the ends of a CNT
AQD
CNT
~500 nm in
withfor
QDtubes
conjugation
at both
conjugation
at length
CNT-ends
as long as
4µm.ends
Band diagram of a
QD-CNT-QD heterostructure
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Nanomaterials –
Enabling Heterogeneous Integration
Nanostructures enable the reduction of
defects and
Free from the constraint of crystalline
substrates
High performance, large area
Heterogeneous nanosystems!!
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20
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ƒ New nanoelectronics
¾ Spin as a variable
ƒ Ultimate CMOS and beyond
ƒ Nano photonics
ƒ Molecular devices
ƒ Spintronics
¾ Nanomagnetics
¾ Coherent wave
ƒ Nano bio devices
ƒ Sensors and Fluidics; Nanotransducers
ƒ Quantum coherence devices
(and Systems)
Performance space
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What else can be put on Si??
in Integrated Nanosystems
Market sectors
Application space
(Heterogeneous
Integration)
Self Assembly
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CG
T A TG C
A
CT
G A
A CG
T
MARCO - FENA
GCAT
CGTA
Heterogeneous integration of nanosystems
O O O OOO O O
N
C
C
N
O
O
Chromophore
N+
CH2
OH
HO
• Increasing functionalities
N+
CH2
Coupling layer
2)n
(CH
2)n
(CH
SiO2
SiO2
•Self adapting and correcting
•Reduced cost
• Interface
The schematic of a structure with covalently
coupled single chromophore molecule
and its
on SiO • Process compatibility
attached nano
-scale MOSF
ET.
22
• Self assembly
2
22
Power Density, Consumption and Clock
Frequency
MPU physical gate length (nm)
9 13 18
-15
10
12
10
28
37
700
350
1500
53 130
500
1000
70 200
3000
6000 10000
10
10
9
10
8
10
7
10
Nuclear Reactor
10
Pentium Pro
Pentium
-18
10
Extrapolated value: i486
3x10-20J@5nm
kT ln2 ≈ 3x10-21 J
4x1011Hz@5nm
-19
10
-20
10
5
Year
10
Hot Plate
8086
80286
8080
i386
00 99 97 95 93 89 82
85
10
1
4004
0.1
100
1000
Technology node (nm)
2016 13 10 06 04 02
23
100
Pentium IV
Pentium III
Pentium II
-17
2
10
-16
10
Power Density (W/cm )
On-chip clock frequency (Hz)
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11
Power-delay product (J/device)
1000
10000
78
74
71
Sources: ITRS 2002 and Osman Unsal and Isreal Koren, IEEE Proceedings., Vol. 91, No. 7, 2003.23
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MSI K7T266 Pro-2 Raid
Motherboard
Done by Trubador on 26 Feb 2002
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Power Consumption
Power (W/sq cm)
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ƒ Small static power consumption
• Subthreshold current
ƒ Power consumption = fs*Cout*Vdd2
10
3
10
2
10
1
10
0
10
Major
problems
ITRS
Switching
Tunneling
Off Current
-1
10
-2
10
-3
10
Gate
Drain
100
Feature Size (nm)
25
25
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I think that there’s a world
market for about 5 computers.
26
Thomas J. Waston, Sr.
IBM Chairman of the Board, ca1946
The ENIAC machine occupied a
room 30 x 50 ft. (van Pelt Library, U Penn)
Size: 7.44mm x 5.29mm; 174,569
transistors; 0.5 um CMOS
Created by Jan Van der Spiegel
August 27, 1997.
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Robustness
For an activation energy of ∆
−1 − ∆ / 2kT
Z e
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b
a
−1 ∆ / 2kT
Z e
Probability ratio of the two states :
Pa
= exp ( −∆ / kT )
Pb
At 125 C (400K)
Assume Activation Energy: 1 eV (Si-Si bond of 3.37 eV)
The error: exp ( −∆ / kT ) = 6.9x10-14
For an activation Energy (hydrogen bonding) 0.168 eV
The error: exp ( −∆ / kT ) = 6.1x10-3
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Nanoscale Architectures and
Information Processing Paradigms
Aim: To investigate novel information processing architectures
based on the unique features of nano devices
ƒ
Cellular Nonlinear Network Architectures
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a)
b)
ƒ
Neuromorphic Architectures
a)
b)
ƒ
Theoretical and Experimental study on New Computational System
Cellular Architectures Based on Nonlineaer Phase Dynamics in
2DArrays
Associative pattern recognition based on CMOS/SET hybrid arrays
CrossNet Arrays using CMOL
Information Processing Paradigms Based on the Dynamics of
Biological Systems: dynamic associative memory
METALL CONTACTS
SiO2
Output
Neuron
B2
B1
B3
SiO2
EDGE CMOSs
B4
BM
B5
(CMOS)
QUANTUM BARRIER
QUANTUM WELL
Synapse
(SET)
28
Schematic of a CrossNet switching
plaquette. Green dots with arrows are
three-terminal single electron switches.
A1
A2
A3
A4
A5
A6
AN
Input
A neuromorphic model, investigate fan out
through capacitance SET devices &
robustness.
QUANTUM BARRIER
QUANTUM WELL
QUANTUM BARRIER
COMMON CONDUCTIVE SUBSTRATE
Cellular automata or CNN based on
semiconductor tunneling
nanostructure array
28
New computational and information processing
technologies/paradigms suitable for nanodevices
• Reversible computing
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• Homogeneous Cells:
Cellular automata consisting of
2-dimensional arrays of 3dimensional lattice array of
nanocells.
• Self adaptive, fault
tolerant, or error correction
automata using nanodevices
(e.g., single-electron
transistors, single molecules,
single spin,etc.)
• Automata integrating
CMOS and other nano devices
including large molecules
29
ƒ Identified the critical
problems
Large number of wiring
¾
¾ Design complexity
¾
¾
ƒ Common
problems/Challenges for
Nano devices
Low drive current
¾
¾ Leakage, defects, errors
¾
¾ Power issue
¾
¾
ƒ Unique features –
Quantum effects
¾
¾ Interactive neighbors
¾
¾ Cannot have many global
wirings
¾
¾
ƒ Complexity of fabrication
29
In A Nutshell
FENA: To explore radically new approaches to giga and
tera scale architectures for future nanosystems
MARCO - FENA
Parallel information processing
Defect and Fault tolerance : Self repair, self learning systems
ƒ Top view to provide our vision of the Center and for
planning of the research
ƒ Bottom up approach from functional materials and
nanoarchitecture
ƒ Novel Nano materials and building blocks by design
ƒ Robust nanodevice structures
¾
¾
Ultimate CMOS and SOI CMOS leading to seamless transition to
quantum devices and other new devices
Molecular devices
ƒ Process compatibility with Si – Directed Self Assembly
¾
30
High level processing
ƒ NanoElectronics >> Heterogeneous NanoSystems (new
state variables)
30
Methods for Self-assembly
ƒ Physical self assembly
MBE, GSMBE, CVD, etc.
¾ Templates: Electrochemical, mechanical, Sol gel, etc.
¾
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ƒ Chemical self assembly
Molecular self assembly, polymer self assembly, protein, DNA,
bio-molecular, etc.
¾ Colloidal self assembly
¾
ƒ Bio self assembly
¾
Peptide, Protein and Virus engineering
ƒ User defined surface dip pen
ƒ Key Issues:
Uniform size
Controlled placement
ƒ Directed processes
¾
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Physical mechanisms, Chemical Mechanisms, and
Biochemical Processes
31