Master Thesis “Flexible Query Processor on NetFPGA” Application and Middleware Systems

Application and Middleware Systems
Research Group, I13 (Prof. Dr. H. - A. Jacobsen)
Master Thesis
“Flexible Query Processor on NetFPGA” – Port, Adaptation, and Debugging of a
Custom-designed Stream Processor
By advance in the technology Big data analytic has introduced itself as one of the major challenges, gaining large
attention in the current research fields. As a trend to address some of shortcomings in event stream processing and in
response to the growing demands for low-latency and high-throughput processing, we have proposed a customdesigned flexible query processor (FQP). The proposed processor has the capability of accepting new queries
(instructions) in an on-line fashion separating it from the state-of-art works. FQP features a hardware part namely online reconfigurable query engine (ORQE) as its processing core which we have realized on FPGA development board
(ML-505). ORQE has on-line programmable block (OP-Block) as its major building block. OP-Blocks are multi-port
processors with the capability of being attached together in different topologies like LEGO puzzles.
This thesis extends the current design of FQP, which is
already implemented on ML-505 board, by porting it to
NetFPGA board. The main feature of NetFPGA board is
its specialty to work as network nodes. Therefore, we work
on two case studies related to event stream processing to
realize on FQP. As the processor porting task is done,
running new test cases is rather straight forward since
they are expressed in instructions and no change in
hardware is required. This processor is under
development to add more features and capabilities; as a
result, there is a good chance to profoundly pinpoint
issues faced in the debugging phases.
Description of the task
Prerequisites
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FQP design understanding
NetFPGA setup
Porting FQP design to NetFPGA board
Debugging
Experiments
Documentation
Use Multiple NetFPGA boards to realize a large design
(future work)
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Full understanding of hardware design
Sufficient experience of working with FPGAs and
Xilinx-ISE development tools
Basic knowledge of working with Linux
environments
References
Mohammadreza Najafi, Mohammad Sadoghi, Hans-Arno Jacobsen, “Flexible query processor on FPGAs,”
Proceedings of the VLDB Endowment 6(12), 1310--1313, VLDB Endowment, 2013
Contact
Mohammadreza Najafi
Technical University Munich
Department of Computer Science
Application and Middleware Systems Research Group (I 13)
Boltzmannstrasse 3
Room 01.06.060
85748 Garching, Germany
Email: mohammadreza.najafi @in.tum.de